212 řádky
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212 řádky
13 KiB
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<div id="projectname">HIP: Heterogenous-computing Interface for Portability
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<a href="#func-members">Functions</a> </div>
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<div class="headertitle">
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<div class="title">Fence Functions</div> </div>
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<div class="contents">
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
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<tr class="memitem:ga675c8823d497b2fd91abc42085e5ae25"><td class="memItemLeft" align="right" valign="top">__device__ void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Fence.html#ga675c8823d497b2fd91abc42085e5ae25">__threadfence_block</a> (void)</td></tr>
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<tr class="memdesc:ga675c8823d497b2fd91abc42085e5ae25"><td class="mdescLeft"> </td><td class="mdescRight">threadfence_block makes writes visible to threads running in same block. <a href="#ga675c8823d497b2fd91abc42085e5ae25">More...</a><br/></td></tr>
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<tr class="separator:ga675c8823d497b2fd91abc42085e5ae25"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8ed093b29d5c05d46a1240e7a35a6d13"><td class="memItemLeft" align="right" valign="top">__device__ void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Fence.html#ga8ed093b29d5c05d46a1240e7a35a6d13">__threadfence</a> (void)</td></tr>
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<tr class="memdesc:ga8ed093b29d5c05d46a1240e7a35a6d13"><td class="mdescLeft"> </td><td class="mdescRight">threadfence makes wirtes visible to other threads running on same GPU. <a href="#ga8ed093b29d5c05d46a1240e7a35a6d13">More...</a><br/></td></tr>
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<tr class="separator:ga8ed093b29d5c05d46a1240e7a35a6d13"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga21e7328a2daaf9e376d10b5c6b3de0ae"><td class="memItemLeft" align="right" valign="top">__device__ void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__Fence.html#ga21e7328a2daaf9e376d10b5c6b3de0ae">__threadfence_system</a> (void)</td></tr>
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<tr class="memdesc:ga21e7328a2daaf9e376d10b5c6b3de0ae"><td class="mdescLeft"> </td><td class="mdescRight">threadfence_system makes writes to pinned system memory visible on host CPU. <a href="#ga21e7328a2daaf9e376d10b5c6b3de0ae">More...</a><br/></td></tr>
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<tr class="separator:ga21e7328a2daaf9e376d10b5c6b3de0ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2f939e9a335b10734b40f1fd46991884"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2f939e9a335b10734b40f1fd46991884"></a>
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__device__ unsigned </td><td class="memItemRight" valign="bottom"><b>__hip_ds_bpermute</b> (int index, unsigned src)</td></tr>
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<tr class="separator:ga2f939e9a335b10734b40f1fd46991884"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaced40f2846a0414d0b90bdd2cae6eca0"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaced40f2846a0414d0b90bdd2cae6eca0"></a>
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__device__ float </td><td class="memItemRight" valign="bottom"><b>__hip_ds_bpermutef</b> (int index, float src)</td></tr>
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<tr class="separator:gaced40f2846a0414d0b90bdd2cae6eca0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga016187496c3f11bae508a2d0d21918d4"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga016187496c3f11bae508a2d0d21918d4"></a>
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__device__ unsigned </td><td class="memItemRight" valign="bottom"><b>__hip_ds_permute</b> (int index, unsigned src)</td></tr>
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<tr class="separator:ga016187496c3f11bae508a2d0d21918d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8248086c4758076d9d353f92ed6704fa"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8248086c4758076d9d353f92ed6704fa"></a>
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__device__ float </td><td class="memItemRight" valign="bottom"><b>__hip_ds_permutef</b> (int index, float src)</td></tr>
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<tr class="separator:ga8248086c4758076d9d353f92ed6704fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga262e42f79cb97357201feea4fcf97bfd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga262e42f79cb97357201feea4fcf97bfd"></a>
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__device__ unsigned </td><td class="memItemRight" valign="bottom"><b>__hip_ds_swizzle</b> (unsigned int src, int pattern)</td></tr>
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<tr class="separator:ga262e42f79cb97357201feea4fcf97bfd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga40f5ef0dab6d896939d893d1c4ab9a87"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga40f5ef0dab6d896939d893d1c4ab9a87"></a>
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__device__ float </td><td class="memItemRight" valign="bottom"><b>__hip_ds_swizzlef</b> (float src, int pattern)</td></tr>
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<tr class="separator:ga40f5ef0dab6d896939d893d1c4ab9a87"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6082c8f9ba522980ca0afecc6f7a53cf"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6082c8f9ba522980ca0afecc6f7a53cf"></a>
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__device__ int </td><td class="memItemRight" valign="bottom"><b>__hip_move_dpp</b> (int src, int dpp_ctrl, int row_mask, int bank_mask, bool bound_ctrl)</td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<p>CUDA 8 device function features </p>
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<h2>Kernel launching </h2>
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<hr/>
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<dl class="section warning"><dt>Warning</dt><dd>The HIP memory fence functions are currently not supported yet. If any of those threadfence stubs are reached by the application, you should set "export HSA_DISABLE_CACHE=1" to disable L1 and L2 caches.</dd></dl>
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<p>On AMD platforms, the threadfence* routines are currently empty stubs. </p>
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<h2 class="groupheader">Function Documentation</h2>
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<a class="anchor" id="ga8ed093b29d5c05d46a1240e7a35a6d13"></a>
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<td class="memname">__device__ void __threadfence </td>
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<td>(</td>
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<td class="paramtype">void </td>
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<td class="paramname"></td><td>)</td>
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<td></td>
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</table>
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</div><div class="memdoc">
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<p>threadfence makes wirtes visible to other threads running on same GPU. </p>
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<p>void</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">void</td><td></td></tr>
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</dd>
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</dl>
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<dl class="section warning"><dt>Warning</dt><dd>__threadfence is a stub and map to no-op, application should set "export HSA_DISABLE_CACHE=1" to disable both L1 and L2 caches. </dd></dl>
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<a class="anchor" id="ga675c8823d497b2fd91abc42085e5ae25"></a>
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<td class="memname">__device__ void __threadfence_block </td>
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<td>(</td>
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<td class="paramtype">void </td>
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<td class="paramname"></td><td>)</td>
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<td></td>
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</div><div class="memdoc">
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<p>threadfence_block makes writes visible to threads running in same block. </p>
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<p>void</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">void</td><td></td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section warning"><dt>Warning</dt><dd>__threadfence_block is a stub and map to no-op. </dd></dl>
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<a class="anchor" id="ga21e7328a2daaf9e376d10b5c6b3de0ae"></a>
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<td class="memname">__device__ void __threadfence_system </td>
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<td>(</td>
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<td class="paramtype">void </td>
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<td class="paramname"></td><td>)</td>
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<td></td>
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<p>threadfence_system makes writes to pinned system memory visible on host CPU. </p>
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<p>void</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramname">void</td><td></td></tr>
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</dd>
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</dl>
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<dl class="section warning"><dt>Warning</dt><dd>__threadfence_system is a stub and map to no-op. </dd></dl>
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Generated on Mon Dec 19 2016 04:03:43 for HIP: Heterogenous-computing Interface for Portability by  <a href="http://www.doxygen.org/index.html">
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</a> 1.8.6
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