2019-03-14 19:39:20 -07:00
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/*************************************************************************
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2020-01-16 16:02:42 -08:00
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* Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved.
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2020-01-15 17:54:27 -07:00
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* Modifications Copyright (c) 2019-2020 Advanced Micro Devices, Inc. All rights reserved.
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2019-03-14 19:39:20 -07:00
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*
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* See LICENSE.txt for license information
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************************************************************************/
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#ifndef NCCL_COMM_H_
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#define NCCL_COMM_H_
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#include "transport.h"
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#include "p2p.h"
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// [RCCL]
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#include "clique/CliqueManager.h"
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// [/RCCL]
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2019-11-21 13:41:10 -08:00
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#if defined(__HIP_PLATFORM_HCC__) || defined(__HCC__) || defined(__HIPCC__)
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#else
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#if CUDART_VERSION < 9000
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struct cudaLaunchParams {
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void *func;
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dim3 gridDim;
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dim3 blockDim;
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void **args;
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size_t sharedMem;
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cudaStream_t stream;
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};
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#endif
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#endif
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#define CACHE_LINE_SIZE 64
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#define MEM_ALIGN 4096
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#define CUDA_IPC_MIN 2097152UL
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// Channels / LL tuning
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#define NCCL_LL_THREAD_THRESHOLD 8
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#define NCCL_LL128_THREAD_THRESHOLD 8
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#define NCCL_SIMPLE_THREAD_THRESHOLD 64
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struct ncclSendMem {
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union {
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struct {
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uint64_t head;
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char pad1[CACHE_LINE_SIZE-sizeof(uint64_t)];
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void* ptrExchange;
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char pad2[CACHE_LINE_SIZE-sizeof(void*)];
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};
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char pad3[MEM_ALIGN];
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};
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char buff[1]; // Actually larger than that
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};
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struct ncclRecvMem {
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union {
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struct {
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uint64_t tail;
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char pad1[CACHE_LINE_SIZE-sizeof(uint64_t)];
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int sizesFifo[NCCL_STEPS];
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void* ptrsFifo[NCCL_STEPS];
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};
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char pad4[MEM_ALIGN];
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};
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char buff[1]; // Actually larger than that
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};
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struct ncclComm {
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struct ncclChannel channels[MAXCHANNELS];
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struct ncclPeerInfo* peerInfo;
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struct ncclTopoSystem* topo;
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void* bootstrap;
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// Bitmasks for ncclTransportP2pSetup
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int connect;
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uint32_t* connectSend;
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uint32_t* connectRecv;
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int rank; // my rank in the communicator
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int nRanks; // number of GPUs in communicator
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int cudaDev; // my cuda device index
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int64_t busId; // my PCI bus ID in int format
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int node;
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int nNodes;
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int localRanks;
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enum { GROUP, PARALLEL } launchMode;
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hipStream_t userStream;
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bool userStreamSet;
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hipEvent_t doneEvent;
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bool checkPointers;
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// Counter to make sure collectives match (needed for bcast/reduce
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// where syncs are not symmetric).
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uint64_t opCount;
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uint64_t lastOpCount;
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// Channels for collectives
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int nChannels;
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// Channels (per peer) for p2p
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int p2pnChannels;
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int p2pnChannelsPerPeer;
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int p2pChannels[MAXCHANNELS];
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// Buffer sizes
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int buffSizes[NCCL_NUM_PROTOCOLS];
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// Algorithm/Protocols thresholds
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ssize_t threadThresholds[NCCL_NUM_ALGORITHMS][NCCL_NUM_PROTOCOLS];
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float latencies[NCCL_NUM_FUNCTIONS][NCCL_NUM_ALGORITHMS][NCCL_NUM_PROTOCOLS];
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float bandwidths[NCCL_NUM_FUNCTIONS][NCCL_NUM_ALGORITHMS][NCCL_NUM_PROTOCOLS];
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int maxThreads[NCCL_NUM_ALGORITHMS][NCCL_NUM_PROTOCOLS];
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// An internal CUDA stream for NCCL kernel CGMD launches
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int groupCudaStream;
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hipStream_t groupStream;
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// Whether there has been a fatal error in this communicator.
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ncclResult_t fatalError;
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// Flag to ask NCCL kernels to abort
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volatile uint32_t *abortFlag;
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// Device side of the communicator
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struct ncclDevComm *devComm;
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// Host copy of the devComm (to free CUDA allocs)
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struct ncclDevComm hostDevComm;
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// Intra-process sync
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int intraRank;
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int intraRanks;
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int* intraBarrier;
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int intraPhase;
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// Storage for deferred intra-process launch
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hipLaunchParams * intraParams;
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hipLaunchParams *myParams;
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int* intraCudaDevs;
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int* intraCGMode; // Whether we can use CUDA9 CGMD or not
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int* intraCC; // Only to check all have the same ComputeCap and disable CGMode if not
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struct ncclWorkElem args;
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void* argsptr;
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// Global proxy thread
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pthread_t proxyThread;
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struct ncclProxyState proxyState;
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// Whether this communicator uses collNet
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int collNetSupport;
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// Store info of async operations
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struct ncclInfo* asyncOps;
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int asyncOpCount;
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size_t asyncTotalSize;
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//list of async p2p operation queued in a group semantics
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struct ncclP2Plist* p2pSends;
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struct ncclP2Plist* p2pRecvs;
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int p2pSendCount;
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int p2pRecvCount;
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// [RCCL]
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bool alltoallDisable; // RCCL AllToAll/Scatter/Gather API
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CliqueManager* cliqueManager; // CliqueManager handles pointer collection / distribution for clique-based kernels
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int rootPid; // Process ID of root
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// [/RCCL]
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2019-03-14 19:39:20 -07:00
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};
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#endif
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