From 03e6266c644be8e1a86f8ff2ee19166a04bb3755 Mon Sep 17 00:00:00 2001
From: foreman <dl.constructicon@amd.com>
Date: Mon, 10 Sep 2018 12:09:51 -0400
Subject: [PATCH] P4 to Git Change 1603601 by jatang@jatang-opencl-hsa-stg5 on
 2018/09/10 11:55:05

	SWDEV-126897 - Fix segfault in HSAIL/ROCm path.

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocvirtual.cpp#68 edit
---
 rocclr/runtime/device/rocm/rocvirtual.cpp | 25 ++++++++++++++---------
 1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/rocclr/runtime/device/rocm/rocvirtual.cpp b/rocclr/runtime/device/rocm/rocvirtual.cpp
index 4af1354d6e..c0679a7170 100644
--- a/rocclr/runtime/device/rocm/rocvirtual.cpp
+++ b/rocclr/runtime/device/rocm/rocvirtual.cpp
@@ -2059,23 +2059,28 @@ bool VirtualGPU::submitKernelInternal(const amd::NDRangeContainer& sizes, const
           break;
         }
         case amd::KernelParameterDescriptor::HiddenDefaultQueue: {
+          uint64_t vqVA = 0;
           amd::DeviceQueue* defQueue = kernel.program().context().defDeviceQueue(dev());
-
-          if (!createVirtualQueue(defQueue->size()) || !createSchedulerParam()) {
-            return false;
+          if (nullptr != defQueue) {
+            if (!createVirtualQueue(defQueue->size()) || !createSchedulerParam()) {
+              return false;
+            }
+            gpuKernel.setDynamicParallelFlag(true);
+            vqVA = getVQVirtualAddress();
           }
-          gpuKernel.setDynamicParallelFlag(true);
-          uint64_t vqVA = getVQVirtualAddress();
           WriteAqlArgAt(const_cast<address>(parameters), &vqVA, it.size_, it.offset_);
           break;
         }
         case amd::KernelParameterDescriptor::HiddenCompletionAction: {
-          Memory* schedulerMem = dev().getRocMemory(schedulerParam_);
-          AmdAqlWrap* wrap = reinterpret_cast<AmdAqlWrap*>(reinterpret_cast<uint64_t>(schedulerParam_->getHostMem()) + sizeof(SchedulerParam));
-          memset(wrap, 0, sizeof(AmdAqlWrap));
-          wrap->state = AQL_WRAP_DONE;
+          uint64_t spVA = 0;
+          if (nullptr != schedulerParam_) {
+            Memory* schedulerMem = dev().getRocMemory(schedulerParam_);
+            AmdAqlWrap* wrap = reinterpret_cast<AmdAqlWrap*>(reinterpret_cast<uint64_t>(schedulerParam_->getHostMem()) + sizeof(SchedulerParam));
+            memset(wrap, 0, sizeof(AmdAqlWrap));
+            wrap->state = AQL_WRAP_DONE;
 
-          uint64_t spVA = reinterpret_cast<uint64_t>(schedulerMem->getDeviceMemory()) + sizeof(SchedulerParam);
+            spVA = reinterpret_cast<uint64_t>(schedulerMem->getDeviceMemory()) + sizeof(SchedulerParam);
+          }
           WriteAqlArgAt(const_cast<address>(parameters), &spVA, it.size_, it.offset_);
           break;
         }