SWDEV-403960 - [catch2][dtest] Enable xnack+ check condition (#364)
Change-Id: I9627d75d0d3258cf261c8e4bfe6c7c3c35c8f9c1
This commit is contained in:
کامیت شده توسط
GitHub
والد
2e029a8529
کامیت
042234e0b2
@@ -81,13 +81,16 @@ static void TstCoherency(int *Ptr, bool HmmMem) {
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// Getting gpu frequency
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if (IsGfx11()) {
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HIPCHECK(hipDeviceGetAttribute(&peak_clk, hipDeviceAttributeWallClockRate, 0));
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HIPCHECK(hipDeviceGetAttribute(&peak_clk,
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hipDeviceAttributeWallClockRate, 0));
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} else {
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HIPCHECK(hipDeviceGetAttribute(&peak_clk, hipDeviceAttributeClockRate, 0));
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HIPCHECK(hipDeviceGetAttribute(&peak_clk,
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hipDeviceAttributeClockRate, 0));
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}
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if (!HmmMem) {
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HIP_CHECK(hipHostGetDevicePointer(reinterpret_cast<void **>(&Dptr), Ptr, 0));
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HIP_CHECK(hipHostGetDevicePointer(reinterpret_cast<void **>(&Dptr),
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Ptr, 0));
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if (IsGfx11()) {
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CoherentTst_gfx11<<<1, 1, 0, strm>>>(Dptr, peak_clk);
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} else {
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@@ -122,58 +125,13 @@ static void TstCoherency(int *Ptr, bool HmmMem) {
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// The following test is failing on Nvidia platform hence disabled it for now
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#if HT_AMD
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TEST_CASE("Unit_malloc_CoherentTst") {
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if ((setenv("HSA_XNACK", "1", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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REQUIRE(false);
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}
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// The following code block is used to check for gfx906/8 so as to skip if
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// any of the gpus available
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int fd1[2]; // Used to store two ends of first pipe
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pid_t p;
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if (pipe(fd1) == -1) {
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fprintf(stderr, "Pipe Failed");
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REQUIRE(false);
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}
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/* GpuId[0] for gfx90a exists--> 1 for yes and 0 for no*/
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int GpuId[1] = {0};
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p = fork();
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if (p < 0) {
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fprintf(stderr, "fork Failed");
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REQUIRE(false);
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} else if (p > 0) { // parent process
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close(fd1[1]); // Close writing end of first pipe
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// Wait for child to send a string
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wait(NULL);
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// Read string from child and close reading end.
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read(fd1[0], GpuId, 2 * sizeof(int));
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close(fd1[0]);
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if (GpuId[0] == 0) {
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WARN("This test is applicable for MI200."
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"Skipping the test!!");
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exit(0);
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}
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} else { // child process
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close(fd1[0]); // Close read end of first pipe
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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if (CheckIfFeatSupported(CTFeatures::CT_FEATURE_FINEGRAIN_HWSUPPORT, prop.gcnArchName)) {
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WARN("gfx90a gpu found on this system!!");
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GpuId[0] = 1;
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}
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// Write concatenated string and close writing end
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write(fd1[1], GpuId, 2 * sizeof(int));
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close(fd1[1]);
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exit(0);
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}
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// Test Case execution begins from here
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int stat = 0;
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if (fork() == 0) {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "xnack+");
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if (p) {
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// Test Case execution begins from here
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int stat = 0;
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int managed = 0;
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HIPCHECK(hipDeviceGetAttribute(&managed, hipDeviceAttributeManagedMemory,
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0));
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@@ -185,23 +143,10 @@ TEST_CASE("Unit_malloc_CoherentTst") {
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Ptr = reinterpret_cast<int*>(malloc(SIZE));
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TstCoherency(Ptr, HmmMem);
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free(Ptr);
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if (YES_COHERENT) {
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// exit() with code 10 which indicates pass
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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exit(9);
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}
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} else {
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SUCCEED("GPU 0 doesn't support hipDeviceAttributeManagedMemory "
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"attribute. Hence skipping the testing with Pass result.\n");
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}
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REQUIRE(YES_COHERENT);
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}
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} else {
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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#endif
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@@ -212,55 +157,12 @@ TEST_CASE("Unit_malloc_CoherentTst") {
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// The following test is failing on Nvidia platform hence disabling it for now
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#if HT_AMD
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TEST_CASE("Unit_malloc_CoherentTstWthAdvise") {
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if ((setenv("HSA_XNACK", "1", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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REQUIRE(false);
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}
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// The following code block is used to check for gfx906/8 so as to skip if
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// any of the gpus available
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int fd1[2]; // Used to store two ends of first pipe
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pid_t p;
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if (pipe(fd1) == -1) {
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fprintf(stderr, "Pipe Failed");
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REQUIRE(false);
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}
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/* GpuId[0] for gfx90a exists--> 1 for yes and 0 for no */
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int GpuId[1] = {0};
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p = fork();
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if (p < 0) {
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fprintf(stderr, "fork Failed");
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REQUIRE(false);
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} else if (p > 0) { // parent process
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close(fd1[1]); // Close writing end of first pipe
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// Wait for child to send a string
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wait(NULL);
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// Read string from child and close reading end.
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read(fd1[0], GpuId, 2 * sizeof(int));
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close(fd1[0]);
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if (GpuId[0] == 0) {
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WARN("This test is applicable for MI200."
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"Skipping the test!!");
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exit(0);
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}
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} else { // child process
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close(fd1[0]); // Close read end of first pipe
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "gfx90a");
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if (p) {
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WARN("gfx90a gpu found on this system!!");
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GpuId[0] = 1;
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}
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// Write concatenated string and close writing end
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write(fd1[1], GpuId, 2 * sizeof(int));
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close(fd1[1]);
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exit(0);
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}
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int stat = 0;
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if (fork() == 0) {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "xnack+");
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if (p) {
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int stat = 0;
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int managed = 0;
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HIP_CHECK(hipDeviceGetAttribute(&managed, hipDeviceAttributeManagedMemory,
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0));
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@@ -275,25 +177,10 @@ TEST_CASE("Unit_malloc_CoherentTstWthAdvise") {
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SquareKrnl<<<1, 1, 0, strm>>>(Ptr);
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HIP_CHECK(hipStreamSynchronize(strm));
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HIP_CHECK(hipStreamDestroy(strm));
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if (*Ptr == 16) {
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// exit() with code 10 which indicates pass
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free(Ptr);
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exit(10);
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} else {
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// exit() with code 9 which indicates fail
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free(Ptr);
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exit(9);
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}
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} else {
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SUCCEED("GPU 0 doesn't support hipDeviceAttributeManagedMemory "
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"attribute. Hence skipping the testing with Pass result.\n");
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REQUIRE (*Ptr == 16);
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}
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} else {
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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#endif
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@@ -303,55 +190,12 @@ TEST_CASE("Unit_malloc_CoherentTstWthAdvise") {
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// The following test is failing on Nvidia platform hence disabling it for now
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#if HT_AMD
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TEST_CASE("Unit_mmap_CoherentTst") {
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if ((setenv("HSA_XNACK", "1", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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REQUIRE(false);
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}
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// The following code block is used to check for gfx906/8 so as to skip if
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// any of the gpus available
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int fd1[2]; // Used to store two ends of first pipe
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pid_t p;
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if (pipe(fd1) == -1) {
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fprintf(stderr, "Pipe Failed");
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REQUIRE(false);
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}
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/* GpuId[0] for gfx90a exists--> 1 for yes and 0 for no */
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int GpuId[1] = {0};
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p = fork();
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if (p < 0) {
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fprintf(stderr, "fork Failed");
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REQUIRE(false);
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} else if (p > 0) { // parent process
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close(fd1[1]); // Close writing end of first pipe
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// Wait for child to send a string
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wait(NULL);
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// Read string from child and close reading end.
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read(fd1[0], GpuId, 2 * sizeof(int));
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close(fd1[0]);
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if (GpuId[0] == 0) {
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WARN("This test is not applicable for MI200."
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"Skipping the test!!");
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exit(0);
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}
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} else { // child process
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close(fd1[0]); // Close read end of first pipe
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "gfx90a");
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if (p) {
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WARN("gfx90a gpu found on this system!!");
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GpuId[0] = 1;
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}
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// Write concatenated string and close writing end
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write(fd1[1], GpuId, 2 * sizeof(int));
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close(fd1[1]);
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exit(0);
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}
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int stat = 0;
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if (fork() == 0) {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "xnack+");
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if (p) {
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int stat = 0;
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int managed = 0;
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HIP_CHECK(hipDeviceGetAttribute(&managed, hipDeviceAttributeManagedMemory,
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0));
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@@ -371,21 +215,10 @@ TEST_CASE("Unit_mmap_CoherentTst") {
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if (err != 0) {
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WARN("munmap failed\n");
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}
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if (YES_COHERENT) {
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exit(10);
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} else {
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exit(9);
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}
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} else {
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SUCCEED("GPU 0 doesn't support hipDeviceAttributeManagedMemory "
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"attribute. Hence skipping the testing with Pass result.\n");
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}
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REQUIRE(YES_COHERENT);
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}
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} else {
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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#endif
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@@ -395,55 +228,12 @@ TEST_CASE("Unit_mmap_CoherentTst") {
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// The following test is failing on Nvidia platform hence disabling it for now
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#if HT_AMD
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TEST_CASE("Unit_mmap_CoherentTstWthAdvise") {
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if ((setenv("HSA_XNACK", "1", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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REQUIRE(false);
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}
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// The following code block is used to check for gfx906/8 so as to skip if
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// any of the gpus available
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int fd1[2]; // Used to store two ends of first pipe
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pid_t p;
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if (pipe(fd1) == -1) {
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fprintf(stderr, "Pipe Failed");
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REQUIRE(false);
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}
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/* GpuId[0] for gfx90a exists--> 1 for yes and 0 for no */
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int GpuId[1] = {0};
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p = fork();
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if (p < 0) {
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fprintf(stderr, "fork Failed");
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REQUIRE(false);
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} else if (p > 0) { // parent process
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close(fd1[1]); // Close writing end of first pipe
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// Wait for child to send a string
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wait(NULL);
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// Read string from child and close reading end.
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read(fd1[0], GpuId, 2 * sizeof(int));
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close(fd1[0]);
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if (GpuId[0] == 0) {
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WARN("This test is applicable for MI200."
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"Skipping the test!!");
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exit(0);
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}
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} else { // child process
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close(fd1[0]); // Close read end of first pipe
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "gfx90a");
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if (p) {
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WARN("gfx90a gpu found on this system!!");
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GpuId[0] = 1;
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}
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// Write concatenated string and close writing end
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write(fd1[1], GpuId, 2 * sizeof(int));
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close(fd1[1]);
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exit(0);
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}
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int stat = 0;
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if (fork() == 0) {
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hipDeviceProp_t prop;
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HIPCHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "xnack+");
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if (p) {
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int stat = 0;
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int managed = 0;
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HIP_CHECK(hipDeviceGetAttribute(&managed, hipDeviceAttributeManagedMemory,
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0));
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@@ -466,26 +256,15 @@ TEST_CASE("Unit_mmap_CoherentTstWthAdvise") {
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bool IfTstPassed = false;
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if (*Ptr == 81) {
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IfTstPassed = true;
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}
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}
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int err = munmap(Ptr, SIZE);
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if (err != 0) {
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WARN("munmap failed\n");
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}
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if (IfTstPassed) {
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exit(10);
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} else {
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exit(9);
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}
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} else {
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SUCCEED("GPU 0 doesn't support hipDeviceAttributeManagedMemory "
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"attribute. Hence skipping the testing with Pass result.\n");
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}
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REQUIRE(IfTstPassed);
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}
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} else {
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result != 10) {
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REQUIRE(false);
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}
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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#endif
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