SWDEV-403960 - [catch2][dtest] Enable xnack+ check condition (#364)
Change-Id: I9627d75d0d3258cf261c8e4bfe6c7c3c35c8f9c1
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2e029a8529
коміт
042234e0b2
@@ -137,7 +137,8 @@ set(TEST_SRC
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hipMallocAsync.cc
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hipStreamAttachMemAsync.cc
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hipMemRangeGetAttributes_old.cc
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hipMemGetAddressRange.cc)
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hipMemGetAddressRange.cc
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hipHmmOvrSubscriptionTst.cc)
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hip_add_exe_to_target(NAME MemoryTest2
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TEST_SRC ${TEST_SRC}
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@@ -0,0 +1,104 @@
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/*
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Copyright (c) 2021-Present Advanced Micro Devices, Inc. All rights reserved.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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/* Test Case Description: This test case tests the working of OverSubscription
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feature which is part of HMM.*/
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#include <hip_test_common.hh>
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#define INIT_VAL 2.5
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#define NUM_ELMS 268435456 // 268435456 * 4 = 1GB
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#define ITERATIONS 10
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#define ONE_GB 1024 * 1024 * 1024
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// Kernel function
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__global__ void Square(int n, float *x) {
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int index = blockIdx.x * blockDim.x + threadIdx.x;
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int stride = blockDim.x * gridDim.x;
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for (int i = index; i < n; i += stride) {
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x[i] = x[i] + 10;
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}
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}
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static void OneGBMemTest(int dev) {
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int DataMismatch = 0;
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float *HmmAG = nullptr;
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hipStream_t strm;
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HIP_CHECK(hipStreamCreate(&strm));
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// Testing hipMemAttachGlobal Flag
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HIP_CHECK(hipMallocManaged(&HmmAG, NUM_ELMS * sizeof(float),
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hipMemAttachGlobal));
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// Initializing HmmAG memory
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for (int i = 0; i < NUM_ELMS; i++) {
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HmmAG[i] = INIT_VAL;
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}
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int blockSize = 256;
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int numBlocks = (NUM_ELMS + blockSize - 1) / blockSize;
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dim3 dimGrid(numBlocks, 1, 1);
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dim3 dimBlock(blockSize, 1, 1);
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HIP_CHECK(hipSetDevice(dev));
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for (int i = 0; i < ITERATIONS; ++i) {
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Square<<<dimGrid, dimBlock, 0, strm>>>(NUM_ELMS, HmmAG);
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}
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HIP_CHECK(hipStreamSynchronize(strm));
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for (int j = 0; j < NUM_ELMS; ++j) {
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if (HmmAG[j] != (INIT_VAL + ITERATIONS * 10)) {
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DataMismatch++;
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break;
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}
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}
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if (DataMismatch != 0) {
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WARN("Data Mismatch observed when kernel launched on device: " << dev);
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REQUIRE(false);
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}
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HIP_CHECK(hipFree(HmmAG));
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HIP_CHECK(hipStreamDestroy(strm));
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}
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TEST_CASE("Unit_HMM_OverSubscriptionTst") {
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// Checking if xnack is enabled
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hipDeviceProp_t prop;
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HIP_CHECK(hipGetDeviceProperties(&prop, 0));
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char *p = NULL;
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p = strstr(prop.gcnArchName, "xnack+");
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if (p) {
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size_t FreeMem, TotGpuMem;
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HIP_CHECK(hipMemGetInfo(&FreeMem, &TotGpuMem));
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int NumGB = (TotGpuMem/(ONE_GB));
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int TotalThreads = (NumGB + 10);
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WARN("Launching " << TotalThreads);
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WARN(" processes to test OverSubscription.");
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std::thread Thrds[TotalThreads];
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for (int k = 0; k < TotalThreads; ++k) {
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Thrds[k] = std::thread(OneGBMemTest, 0);
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}
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for (int k = 0; k < TotalThreads; ++k) {
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Thrds[k].join();
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}
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} else {
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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@@ -652,87 +652,54 @@ TEST_CASE("Unit_hipMemAdvise_TstAccessedByFlg4") {
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}
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}
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/* Allocate memory using aligned_alloc(), assign PreferredLocation flag to
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the allocated memory and launch a kernel. Kernel should get executed
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successfully without hang or segfault*/
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#if __linux__ && HT_AMD
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TEST_CASE("Unit_hipMemAdvise_TstAlignedAllocMem") {
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if ((setenv("HSA_XNACK", "1", 1)) != 0) {
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WARN("Unable to turn on HSA_XNACK, hence terminating the Test case!");
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REQUIRE(false);
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}
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// The following code block checks for gfx90a,940,941,942 so as to skip if the device is not
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// The following code block checks for xnack+
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// so as to skip if the device is not xnack+
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hipDeviceProp_t prop;
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int device;
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HIP_CHECK(hipGetDevice(&device));
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HIP_CHECK(hipGetDeviceProperties(&prop, device));
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std::string gfxName(prop.gcnArchName);
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if (CheckIfFeatSupported(CTFeatures::CT_FEATURE_HMM, prop.gcnArchName)) {
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if (gfxName.find("xnack+") != std::string::npos) {
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int stat = 0;
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if (fork() == 0) {
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// The below part should be inside fork
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int managedMem = 0, pageMemAccess = 0;
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HIP_CHECK(hipDeviceGetAttribute(&pageMemAccess,
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hipDeviceAttributePageableMemoryAccess, 0));
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WARN("hipDeviceAttributePageableMemoryAccess:" << pageMemAccess);
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HIP_CHECK(hipDeviceGetAttribute(&managedMem, hipDeviceAttributeManagedMemory, 0));
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WARN("hipDeviceAttributeManagedMemory: " << managedMem);
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if ((managedMem == 1) && (pageMemAccess == 1)) {
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int *Mllc = nullptr, MemSz = 4096 * 4, NumElms = 4096, InitVal = 123;
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// Mllc = reinterpret_cast<(int *)>(aligned_alloc(4096, MemSz));
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Mllc = reinterpret_cast<int*>(aligned_alloc(4096, 4096*4));
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for (int i = 0; i < NumElms; ++i) {
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Mllc[i] = InitVal;
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}
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hipStream_t strm;
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int DataMismatch = 0;
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HIP_CHECK(hipStreamCreate(&strm));
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// The following hipMemAdvise() call is made to know if advise on
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// aligned_alloc() is causing any issue
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HIP_CHECK(hipMemAdvise(Mllc, MemSz, hipMemAdviseSetPreferredLocation, 0));
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HIP_CHECK(hipMemPrefetchAsync(Mllc, MemSz, 0, strm));
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HIP_CHECK(hipStreamSynchronize(strm));
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MemAdvise2<<<(NumElms/32), 32, 0, strm>>>(Mllc, NumElms);
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HIP_CHECK(hipStreamSynchronize(strm));
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int managedMem = 0, pageMemAccess = 0;
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HIP_CHECK(hipDeviceGetAttribute(&pageMemAccess,
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hipDeviceAttributePageableMemoryAccess, 0));
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WARN("hipDeviceAttributePageableMemoryAccess:" << pageMemAccess);
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HIP_CHECK(hipDeviceGetAttribute(&managedMem, hipDeviceAttributeManagedMemory, 0));
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WARN("hipDeviceAttributeManagedMemory: " << managedMem);
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if ((managedMem == 1) && (pageMemAccess == 1)) {
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int *Mllc = nullptr, MemSz = 4096 * 4, NumElms = 4096, InitVal = 123;
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// Mllc = reinterpret_cast<(int *)>(aligned_alloc(4096, MemSz));
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Mllc = reinterpret_cast<int*>(aligned_alloc(4096, 4096*4));
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for (int i = 0; i < NumElms; ++i) {
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Mllc[i] = InitVal;
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}
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hipStream_t strm;
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int DataMismatch = 0;
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HIP_CHECK(hipStreamCreate(&strm));
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// The following hipMemAdvise() call is made to know if advise on
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// aligned_alloc() is causing any issue
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HIP_CHECK(hipMemAdvise(Mllc, MemSz, hipMemAdviseSetPreferredLocation, 0));
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HIP_CHECK(hipMemPrefetchAsync(Mllc, MemSz, 0, strm));
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HIP_CHECK(hipStreamSynchronize(strm));
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MemAdvise2<<<(NumElms/32), 32, 0, strm>>>(Mllc, NumElms);
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HIP_CHECK(hipStreamSynchronize(strm));
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for (int i = 0; i < NumElms; ++i) {
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if (Mllc[i] != (InitVal + 10)) {
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DataMismatch++;
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}
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}
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if (DataMismatch != 0) {
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WARN("DataMismatch observed!!");
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exit(9); // 9 for failure
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} else {
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exit(10); // 10 for Pass result
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}
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} else {
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SUCCEED("GPU 0 doesn't support ManagedMemory with hipDeviceAttributePageableMemoryAccess "
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"attribute. Hence skipping the testing with Pass result.\n");
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exit(Catch::ResultDisposition::ContinueOnFailure);
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}
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} else {
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wait(&stat);
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int Result = WEXITSTATUS(stat);
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if (Result == Catch::ResultDisposition::ContinueOnFailure) {
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WARN("GPU 0 doesn't support ManagedMemory with hipDeviceAttributePageableMemoryAccess "
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"attribute. Hence skipping the testing with Pass result.\n");
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} else {
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if (Result != 10) {
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REQUIRE(false);
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}
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}
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}
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REQUIRE(DataMismatch == 0);
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}
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} else {
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SUCCEED("Memory model feature is only supported for gfx90a, gfx940, gx941, gfx942, Hence"
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"skipping the testcase for this GPU " << device);
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WARN("Memory model feature is only supported for gfx90a, gfx940, gx941, gfx942, Hence"
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"skipping the testcase for this GPU " << device);
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}
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HipTest::HIP_SKIP_TEST("GPU is not xnack enabled hence skipping the test...\n");
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}
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}
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#endif
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