From 04745adf7a8115b452a254e38ecb93c11bb7d223 Mon Sep 17 00:00:00 2001
From: Sarbojit Sarkar <sarbojit.sarkar@amd.com>
Date: Mon, 8 Nov 2021 08:10:57 +0000
Subject: [PATCH] SWDEV-310181 - Fix for mGPU dtest failure

Change-Id: Id0898bd45e23f2d637bef25a3e69f26d9dc40785


[ROCm/clr commit: 2afeacc858646ab20f7284532ff728a9e6c2c09b]
---
 projects/clr/rocclr/platform/command.cpp | 27 ++++++++++--------------
 projects/clr/rocclr/platform/memory.cpp  |  2 +-
 2 files changed, 12 insertions(+), 17 deletions(-)

diff --git a/projects/clr/rocclr/platform/command.cpp b/projects/clr/rocclr/platform/command.cpp
index a8d907d051..96c50245c8 100644
--- a/projects/clr/rocclr/platform/command.cpp
+++ b/projects/clr/rocclr/platform/command.cpp
@@ -504,24 +504,19 @@ bool TwoMemoryArgsCommand::validatePeerMemory(){
   if (queue_device->settings().rocr_backend_) {
     const std::vector<Device*>& srcDevices = memory1_->getContext().devices();
     const std::vector<Device*>& dstDevices = memory2_->getContext().devices();
-    // destination and source devices are not same hence
     // explicit allow access is needed for P2P access
-    if (srcDevices.size() == 1 &&
-        dstDevices.size() == 1 &&
-        srcDevices[0] != dstDevices[0]) {
-      device::Memory* mem1 = memory1_->getDeviceMemory(*srcDevices[0]);
-      if (!mem1->getAllowedPeerAccess()) {
-        void* src = reinterpret_cast<void*>(mem1->virtualAddress());
-        accessAllowed = srcDevices[0]->deviceAllowAccess(src);
-        mem1->setAllowedPeerAccess(true);
-      }
+    device::Memory* mem1 = memory1_->getDeviceMemory(*srcDevices[0]);
+    if (!mem1->getAllowedPeerAccess() && srcDevices.size() == 1) {
+      void* src = reinterpret_cast<void*>(mem1->virtualAddress());
+      accessAllowed = srcDevices[0]->deviceAllowAccess(src);
+      mem1->setAllowedPeerAccess(true);
+    }
 
-      device::Memory* mem2 = memory2_->getDeviceMemory(*dstDevices[0]);
-      if (!mem2->getAllowedPeerAccess()) {
-        void* dst = reinterpret_cast<void*>(mem2->virtualAddress());
-        accessAllowed &= dstDevices[0]->deviceAllowAccess(dst);
-        mem2->setAllowedPeerAccess(true);
-      }
+    device::Memory* mem2 = memory2_->getDeviceMemory(*dstDevices[0]);
+    if (!mem2->getAllowedPeerAccess() && dstDevices.size() == 1) {
+      void* dst = reinterpret_cast<void*>(mem2->virtualAddress());
+      accessAllowed &= dstDevices[0]->deviceAllowAccess(dst);
+      mem2->setAllowedPeerAccess(true);
     }
   }
   return accessAllowed;
diff --git a/projects/clr/rocclr/platform/memory.cpp b/projects/clr/rocclr/platform/memory.cpp
index 5a42a435ed..6a309e42ae 100644
--- a/projects/clr/rocclr/platform/memory.cpp
+++ b/projects/clr/rocclr/platform/memory.cpp
@@ -459,7 +459,7 @@ bool Memory::setDestructorCallback(DestructorCallBackFunction callback, void* da
 void Memory::signalWrite(const Device* writer) {
   // Disable cache coherency layer for HIP
   if (!amd::IS_HIP) {
-    // (the potential race condition below doesn't matter, no critical
+    // (The potential race condition below doesn't matter, no critical
     // section needed)
     ++version_;
     lastWriter_ = writer;