* Enabling clique for any XGMI-connected topology, adding tuning
* Updating CHANGELOG for clique tuning
* Re-working clique barrier system to work on multi-process / multi-gpu
[ROCm/rccl commit: e796b1645c]
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@@ -152,10 +152,6 @@ static ncclResult_t setupLaunch(struct ncclQueueInfo* eqInfo, int usingCudaGraph
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}
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STORE(&channel->workFifo[(channel->workFifoTail-1)%NCCL_MAX_OPS].elems[0].active, 2);
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{ // [RCCL] Wait for any clique-based collectives
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NCCLCHECK(comm->cliqueManager->WaitForPointers());
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} // [/RCCL]
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if (c == 0) {
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// Find the first operation, choose the kernel accordingly and pass it as the first argument.
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// Note that changing cuda launch argument after capture is not supported by cudaGraph
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@@ -480,12 +476,6 @@ static ncclResult_t computeColl(struct ncclInfo* info /* input */, struct ncclWo
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info->datatype,
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info->op))
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{
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// Declare the input / output pointers being used (to exchange via IPC with other ranks)
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NCCLCHECK(info->comm->cliqueManager->DeclarePointers(info->comm->opCount,
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info->sendbuff,
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info->recvbuff));
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info->algorithm = NCCL_ALGO_RING;
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info->protocol = NCCL_PROTO_CLIQUE;
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// Determine the number of channels to use for clique-kernel
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@@ -497,6 +487,9 @@ static ncclResult_t computeColl(struct ncclInfo* info /* input */, struct ncclWo
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&work->clique.nChannels));
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work->clique.count = info->count;
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work->funcIndex = FUNC_INDEX(info->coll, info->op, info->datatype, info->algorithm, info->protocol);
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// Setup pointers to where all the input/output pointers will be
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NCCLCHECK(info->comm->cliqueManager->WaitForPointers(work));
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return ncclSuccess;
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}
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} // [RCCL]
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@@ -631,11 +624,6 @@ static ncclResult_t ncclEnqueueCollKernel(ncclComm_t comm, struct ncclQueueElem*
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if (proxyArgs->subs[0].nsteps) NCCLCHECK(ncclProxySaveColl(proxyArgs, comm->nRanks));
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comm->lastChannel++;
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// [RCCL] Setup pointers to where all the input/output pointers will be
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if (proxyArgs->protocol == NCCL_PROTO_CLIQUE) {
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NCCLCHECK(comm->cliqueManager->SetCliqueArgs(work));
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}
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// [/RCCL]
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work->coll.bid = bid % nChannels;
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NCCLCHECK(getNextOp(channel, NULL, work));
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//INFO(NCCL_COLL, "Host enqueue: bid %d channel %d index %ld nThreads %d funcIndex %d count %ld nChannels %d",
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@@ -890,6 +878,20 @@ ncclResult_t ncclCudaGraphHostSetup(ncclComm_t comm, cudaGraph_t graph) {
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}
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ncclResult_t ncclEnqueueCheck(struct ncclInfo* info) {
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// [RCCL] Check for clique-based kernel support
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{
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if (info->comm->cliqueManager->IsSupported(info->coll,
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info->count,
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info->datatype,
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info->op))
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{
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// Declare the input / output pointers being used (to exchange via IPC with other ranks)
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// This is done immediately, and does not block
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NCCLCHECK(info->comm->cliqueManager->DeclarePointers(info->sendbuff, info->recvbuff));
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}
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}
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// [/RCCL]
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// Launch asynchronously if needed
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if (ncclAsyncMode()) {
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ncclResult_t ret = ncclSuccess;
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