SWDEV-475255 - MM Engine Decoding Throughput

Implemented DEC activity for now due to ENC activity is unavailable in
amdsmi.

Signed-off-by: Li Ma <li.ma@amd.com>
Change-Id: I34bb56e6e0d8d2ab91243f8932f0ac10cb2d1e9f


[ROCm/rdc commit: b17abf93fa]

projects/rdc/python_binding/RdcReader.py

@@ -5,6 +5,8 @@ from RdcUtil import RdcUtil
 default_field_ids = [
         rdc_field_t.RDC_FI_GPU_MEMORY_USAGE,
         rdc_field_t.RDC_FI_GPU_MEMORY_TOTAL,
+        rdc_field_t.RDC_FI_GPU_MM_ENC_UTIL,
+        rdc_field_t.RDC_FI_GPU_MM_DEC_UTIL,
         rdc_field_t.RDC_FI_OAM_ID,
         rdc_field_t.RDC_FI_POWER_USAGE,
         rdc_field_t.RDC_FI_GPU_CLOCK,

projects/rdc/python_binding/rdc_bootstrap.py

@@ -87,6 +87,8 @@ class rdc_field_t(c_int):
      RDC_FI_GPU_UTIL = 500
      RDC_FI_GPU_MEMORY_USAGE = 501
      RDC_FI_GPU_MEMORY_TOTAL = 502
+     RDC_FI_GPU_MM_ENC_UTIL = 503
+     RDC_FI_GPU_MM_DEC_UTIL = 504
      RDC_FI_ECC_CORRECT_TOTAL = 600
      RDC_FI_ECC_UNCORRECT_TOTAL = 601
      RDC_FI_ECC_SDMA_SEC = 602