Restructure the folder

Move rocm_smi related function to rocm_smi folder. Move amd_smi to
top level include/ and src/ folder. Remove obsolte oam folder.
Change the CMakeLists.txt to update folder locations.

Change-Id: I52e6be739e49f3b0545865f25364787f5985e9c3
このコミットが含まれているのは:
Bill(Shuzhou) Liu
2022-09-20 14:57:30 -04:00
コミット 0c91ef919d
98個のファイルの変更177行の追加1715行の削除
+4171
ファイルの表示
ファイル差分が大きすぎるため省略します 差分を読み込み
+48
ファイルの表示
@@ -0,0 +1,48 @@
/*
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2022, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef AMD_SMI_INCLUDE_AMD_SMI_COMMON_H_
#define AMD_SMI_INCLUDE_AMD_SMI_COMMON_H_
#endif // AMD_SMI_INCLUDE_AMD_SMI_COMMON_H_
+65
ファイルの表示
@@ -0,0 +1,65 @@
/*
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2022, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef AMD_SMI_INCLUDE_AMD_SMI_DEVICE_H_
#define AMD_SMI_INCLUDE_AMD_SMI_DEVICE_H_
#include "amd_smi/amd_smi.h"
namespace amd {
namespace smi {
class AMDSmiDevice {
public:
explicit AMDSmiDevice(device_type_t device) : device_type_(device) {}
virtual ~AMDSmiDevice() {}
device_type_t get_device_type() const { return device_type_;}
private:
device_type_t device_type_;
};
} // namespace smi
} // namespace amd
#endif // AMD_SMI_INCLUDE_AMD_SMI_DEVICE_H_
+82
ファイルの表示
@@ -0,0 +1,82 @@
/*
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2022, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef AMD_SMI_INCLUDE_IMPL_AMD_SMI_DRM_H_
#define AMD_SMI_INCLUDE_IMPL_AMD_SMI_DRM_H_
#include <unistd.h>
#include <vector>
#include <memory>
#include <mutex> // NOLINT
#include "amd_smi/amd_smi.h"
#include "amd_smi/impl/amd_smi_lib_loader.h"
namespace amd {
namespace smi {
class AMDSmiDrm {
public:
amdsmi_status_t init();
amdsmi_status_t cleanup();
int get_drm_fd_by_index(uint32_t gpu_index) const;
amdsmi_status_t amdgpu_query_info(int fd, unsigned info_id,
unsigned size, void *value);
amdsmi_status_t amdgpu_query_fw(int fd, unsigned info_id, unsigned fw_type,
unsigned size, void *value);
amdsmi_status_t amdgpu_query_hw_ip(int fd, unsigned info_id,
unsigned hw_ip_type, unsigned size, void *value);
amdsmi_status_t amdgpu_query_vbios(int fd, void *info);
private:
using DrmCmdWriteFunc = int (*)(int, unsigned long, void *, unsigned long);
std::vector<int> drm_fds_; // drm file descriptor by gpu_index
AMDSmiLibraryLoader lib_loader_; // lazy load libdrm
DrmCmdWriteFunc drm_cmd_write_; // drmCommandWrite
std::mutex drm_mutex_;
};
} // namespace smi
} // namespace amd
#endif // AMD_SMI_INCLUDE_IMPL_AMD_SMI_DRM_H_
+21 -25
ファイルの表示
@@ -1,11 +1,9 @@
/*
* =============================================================================
* ROC Runtime Conformance Release License
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2018, Advanced Micro Devices, Inc.
* Copyright (c) 2022, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
@@ -43,38 +41,36 @@
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_EXCEPTION_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_EXCEPTION_H_
#ifndef AMD_SMI_INCLUDE_IMPL_AMD_SMI_GPU_DEVICE_H_
#define AMD_SMI_INCLUDE_IMPL_AMD_SMI_GPU_DEVICE_H_
#include <exception>
#include <string>
#include "rocm_smi/rocm_smi.h"
#define THROW_IF_NULLPTR_DEREF(PTR) \
assert((PTR) != nullptr); \
if ((PTR) == nullptr) { \
throw amd::smi::rsmi_exception(RSMI_STATUS_INVALID_ARGS, __FUNCTION__); \
}
#include "amd_smi/amd_smi.h"
#include "amd_smi/impl/amd_smi_device.h"
#include "amd_smi/impl/amd_smi_drm.h"
namespace amd {
namespace smi {
/// @brief Exception type which carries an error code to return to the user.
class rsmi_exception : public std::exception {
class AMDSmiGPUDevice: public AMDSmiDevice {
public:
rsmi_exception(rsmi_status_t error, const std::string description) :
err_(error), desc_(description) {}
rsmi_status_t error_code() const noexcept { return err_; }
const char* what() const noexcept override { return desc_.c_str(); }
explicit AMDSmiGPUDevice(uint32_t gpu_id, AMDSmiDrm& drm):
AMDSmiDevice(AMD_GPU), gpu_id_(gpu_id), drm_(drm) {}
uint32_t get_gpu_id() const;
amdsmi_status_t amdgpu_query_info(unsigned info_id,
unsigned size, void *value) const;
amdsmi_status_t amdgpu_query_hw_ip(unsigned info_id, unsigned hw_ip_type,
unsigned size, void *value) const;
amdsmi_status_t amdgpu_query_fw(unsigned info_id, unsigned fw_type,
unsigned size, void *value) const;
amdsmi_status_t amdgpu_query_vbios(void *info) const;
private:
rsmi_status_t err_;
std::string desc_;
uint32_t gpu_id_;
AMDSmiDrm& drm_;
};
} // namespace smi
} // namespace amd
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_EXCEPTION_H_
#endif // AMD_SMI_INCLUDE_IMPL_AMD_SMI_GPU_DEVICE_H_
+82
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@@ -0,0 +1,82 @@
/*
Copyright (c) 2020 - present Advanced Micro Devices, Inc. All rights reserved.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
*/
#ifndef AMD_SMI_INCLUDE_IMPL_AMD_SMI_LIB_LOADER_H_
#define AMD_SMI_INCLUDE_IMPL_AMD_SMI_LIB_LOADER_H_
#include <dlfcn.h>
#include <string.h>
#include <map>
#include <iostream>
#include <mutex> // NOLINT(build/c++11)
#include "amd_smi/amd_smi.h"
namespace amd {
namespace smi {
class AMDSmiLibraryLoader {
public:
AMDSmiLibraryLoader();
amdsmi_status_t load(const char* filename);
template<typename T> amdsmi_status_t load_symbol(T* func_handler,
const char* func_name);
amdsmi_status_t unload();
~AMDSmiLibraryLoader();
private:
void* libHandler_;
std::mutex library_mutex_;
};
template<typename T> amdsmi_status_t AMDSmiLibraryLoader::load_symbol(
T* func_handler,
const char* func_name) {
if (!libHandler_) {
return AMDSMI_STATUS_FAIL_LOAD_MODULE;
}
if (!func_handler || !func_name) {
return AMDSMI_STATUS_FAIL_LOAD_SYMBOL;
}
std::lock_guard<std::mutex> guard(library_mutex_);
*reinterpret_cast<void**>(func_handler) =
dlsym(libHandler_, func_name);
if (*func_handler == nullptr) {
char* error = dlerror();
std::cerr << "AMDSmiLibraryLoader: Fail to load the symbol "
<< func_name << ": " << error << std::endl;
return AMDSMI_STATUS_FAIL_LOAD_SYMBOL;
}
return AMDSMI_STATUS_SUCCESS;
}
} // namespace smi
} // namespace amd
#endif // AMD_SMI_INCLUDE_IMPL_AMD_SMI_LIB_LOADER_H_
実行可能ファイル → ノーマルファイル
+17 -26
ファイルの表示
@@ -1,11 +1,9 @@
/*
* =============================================================================
* ROC Runtime Conformance Release License
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2017, Advanced Micro Devices, Inc.
* Copyright (c) 2022, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
@@ -42,39 +40,32 @@
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_POWER_MON_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_POWER_MON_H_
#ifndef AMD_SMI_INCLUDE_AMD_SMI_SOCKET_H_
#define AMD_SMI_INCLUDE_AMD_SMI_SOCKET_H_
#include <string>
#include <cstdint>
#include "rocm_smi/rocm_smi_common.h"
#include <algorithm>
#include <vector>
#include "amd_smi/amd_smi.h"
#include "amd_smi/impl/amd_smi_device.h"
namespace amd {
namespace smi {
enum PowerMonTypes {
kPowerMaxGPUPower,
};
class PowerMon {
class AMDSmiSocket {
public:
explicit PowerMon(std::string path, RocmSMI_env_vars const *e);
~PowerMon(void);
const std::string path(void) const {return path_;}
uint32_t dev_index(void) const {return dev_index_;}
void set_dev_index(uint32_t ind) {dev_index_ = ind;}
int readPowerValue(PowerMonTypes type, uint64_t *power);
explicit AMDSmiSocket(const std::string& id) : socket_identifier_(id) {}
~AMDSmiSocket();
const std::string& get_socket_id() const { return socket_identifier_;}
void add_device(AMDSmiDevice* device) { devices_.push_back(device); }
std::vector<AMDSmiDevice*>& get_devices() { return devices_;}
private:
std::string path_;
const RocmSMI_env_vars *env_;
uint32_t dev_index_;
std::string socket_identifier_;
std::vector<AMDSmiDevice*> devices_;
};
} // namespace smi
} // namespace amd
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_POWER_MON_H_
#endif // AMD_SMI_INCLUDE_AMD_SMI_SOCKET_H_
実行可能ファイル → ノーマルファイル
+29 -62
ファイルの表示
@@ -1,11 +1,9 @@
/*
* =============================================================================
* ROC Runtime Conformance Release License
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2019, Advanced Micro Devices, Inc.
* Copyright (c) 2022, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
@@ -42,83 +40,52 @@
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_COUNTERS_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_COUNTERS_H_
#include <linux/perf_event.h>
#ifndef AMD_SMI_INCLUDE_AMD_SMI_SYSTEM_H_
#define AMD_SMI_INCLUDE_AMD_SMI_SYSTEM_H_
#include <cstdint>
#include <vector>
#include <unordered_set>
#include <string>
#include "rocm_smi/rocm_smi.h"
#include <set>
#include "amd_smi/amd_smi.h"
#include "amd_smi/impl/amd_smi_socket.h"
#include "amd_smi/impl/amd_smi_device.h"
#include "amd_smi/impl/amd_smi_drm.h"
namespace amd {
namespace smi {
namespace evt {
class RSMIEventGrpHashFunction {
// Singleton: Only one system in an application
class AMDSmiSystem {
public:
size_t operator()(const rsmi_event_group_t& grp) const {
return static_cast<size_t>(grp);
static AMDSmiSystem& getInstance() {
static AMDSmiSystem instance;
return instance;
}
};
amdsmi_status_t init(uint64_t flags);
amdsmi_status_t cleanup();
typedef std::unordered_set<rsmi_event_group_t, RSMIEventGrpHashFunction>
dev_evt_grp_set_t;
void
GetSupportedEventGroups(uint32_t dev_ind, dev_evt_grp_set_t*supported_grps);
std::vector<AMDSmiSocket*>& get_sockets() {return sockets_;}
struct evnt_info_t {
uint8_t start_bit;
uint8_t field_size;
uint64_t value;
};
amdsmi_status_t handle_to_socket(amdsmi_socket_handle socket_handle,
AMDSmiSocket** socket);
struct perf_read_format_t {
union {
struct {
uint64_t value;
uint64_t enabled_time;
uint64_t run_time;
};
uint64_t values[3];
};
};
amdsmi_status_t handle_to_device(amdsmi_device_handle device_handle,
AMDSmiDevice** device);
class Event {
public:
explicit Event(rsmi_event_type_t event, uint32_t dev_ind);
~Event(void);
int32_t openPerfHandle();
int32_t startCounter(void);
int32_t stopCounter(void);
uint32_t getValue(rsmi_counter_value_t *val);
uint32_t dev_file_ind(void) const {return dev_file_ind_;}
uint32_t dev_ind(void) const {return dev_ind_;}
amdsmi_status_t gpu_index_to_handle(uint32_t gpu_index,
amdsmi_device_handle* device_handle);
private:
// perf_event_attr fields
std::vector<evnt_info_t> event_info_;
std::string evt_path_root_;
rsmi_event_type_t event_type_;
uint32_t dev_file_ind_;
uint32_t dev_ind_;
int32_t fd_;
perf_event_attr attr_;
uint64_t prev_cntr_val_;
int32_t get_event_file_info(void);
int32_t get_event_type(uint32_t *ev_type);
AMDSmiSystem() : init_flag_(AMDSMI_INIT_ALL_DEVICES) {}
uint64_t init_flag_;
AMDSmiDrm drm_;
std::vector<AMDSmiSocket*> sockets_;
std::set<AMDSmiDevice*> devices_; // Track valid devices
};
} // namespace evt
} // namespace smi
} // namespace amd
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_COUNTERS_H_
#endif // AMD_SMI_INCLUDE_AMD_SMI_SYSTEM_H_
ファイル差分が大きすぎるため省略します 差分を読み込み
-733
ファイルの表示
@@ -1,733 +0,0 @@
/*
* Copyright 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef INCLUDE_ROCM_SMI_KFD_IOCTL_H_
#define INCLUDE_ROCM_SMI_KFD_IOCTL_H_
#include <linux/types.h>
#include <linux/ioctl.h>
#define KFD_IOCTL_MAJOR_VERSION 1
#define KFD_IOCTL_MINOR_VERSION 2
#define KFD_IOCTL_DBG_MAJOR_VERSION 1
#define KFD_IOCTL_DBG_MINOR_VERSION 0
struct kfd_ioctl_get_version_args {
__u32 major_version; /* from KFD */
__u32 minor_version; /* from KFD */
};
/* For kfd_ioctl_create_queue_args.queue_type. */
#define KFD_IOC_QUEUE_TYPE_COMPUTE 0x0
#define KFD_IOC_QUEUE_TYPE_SDMA 0x1
#define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 0x2
#define KFD_IOC_QUEUE_TYPE_SDMA_XGMI 0x3
#define KFD_MAX_QUEUE_PERCENTAGE 100
#define KFD_MAX_QUEUE_PRIORITY 15
struct kfd_ioctl_create_queue_args {
__u64 ring_base_address; /* to KFD */
__u64 write_pointer_address; /* from KFD */
__u64 read_pointer_address; /* from KFD */
__u64 doorbell_offset; /* from KFD */
__u32 ring_size; /* to KFD */
__u32 gpu_id; /* to KFD */
__u32 queue_type; /* to KFD */
__u32 queue_percentage; /* to KFD */
__u32 queue_priority; /* to KFD */
__u32 queue_id; /* from KFD */
__u64 eop_buffer_address; /* to KFD */
__u64 eop_buffer_size; /* to KFD */
__u64 ctx_save_restore_address; /* to KFD */
__u32 ctx_save_restore_size; /* to KFD */
__u32 ctl_stack_size; /* to KFD */
};
struct kfd_ioctl_destroy_queue_args {
__u32 queue_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_update_queue_args {
__u64 ring_base_address; /* to KFD */
__u32 queue_id; /* to KFD */
__u32 ring_size; /* to KFD */
__u32 queue_percentage; /* to KFD */
__u32 queue_priority; /* to KFD */
};
struct kfd_ioctl_set_cu_mask_args {
__u32 queue_id; /* to KFD */
__u32 num_cu_mask; /* to KFD */
__u64 cu_mask_ptr; /* to KFD */
};
struct kfd_ioctl_get_queue_wave_state_args {
__u64 ctl_stack_address; /* to KFD */
__u32 ctl_stack_used_size; /* from KFD */
__u32 save_area_used_size; /* from KFD */
__u32 queue_id; /* to KFD */
__u32 pad;
};
struct kfd_queue_snapshot_entry {
__u64 ring_base_address;
__u64 write_pointer_address;
__u64 read_pointer_address;
__u64 ctx_save_restore_address;
__u32 queue_id;
__u32 gpu_id;
__u32 ring_size;
__u32 queue_type;
__u32 queue_status;
__u32 reserved[19];
};
/* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */
#define KFD_IOC_CACHE_POLICY_COHERENT 0
#define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
struct kfd_ioctl_set_memory_policy_args {
__u64 alternate_aperture_base; /* to KFD */
__u64 alternate_aperture_size; /* to KFD */
__u32 gpu_id; /* to KFD */
__u32 default_policy; /* to KFD */
__u32 alternate_policy; /* to KFD */
__u32 pad;
};
/*
* All counters are monotonic. They are used for profiling of compute jobs.
* The profiling is done by userspace.
*
* In case of GPU reset, the counter should not be affected.
*/
struct kfd_ioctl_get_clock_counters_args {
__u64 gpu_clock_counter; /* from KFD */
__u64 cpu_clock_counter; /* from KFD */
__u64 system_clock_counter; /* from KFD */
__u64 system_clock_freq; /* from KFD */
__u32 gpu_id; /* to KFD */
__u32 pad;
};
struct kfd_process_device_apertures {
__u64 lds_base; /* from KFD */
__u64 lds_limit; /* from KFD */
__u64 scratch_base; /* from KFD */
__u64 scratch_limit; /* from KFD */
__u64 gpuvm_base; /* from KFD */
__u64 gpuvm_limit; /* from KFD */
__u32 gpu_id; /* from KFD */
__u32 pad;
};
/*
* AMDKFD_IOC_GET_PROCESS_APERTURES is deprecated. Use
* AMDKFD_IOC_GET_PROCESS_APERTURES_NEW instead, which supports an
* unlimited number of GPUs.
*/
#define NUM_OF_SUPPORTED_GPUS 7
struct kfd_ioctl_get_process_apertures_args {
struct kfd_process_device_apertures
process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */
/* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
__u32 num_of_nodes;
__u32 pad;
};
struct kfd_ioctl_get_process_apertures_new_args {
/* User allocated. Pointer to struct kfd_process_device_apertures
* filled in by Kernel
*/
__u64 kfd_process_device_apertures_ptr;
/* to KFD - indicates amount of memory present in
* kfd_process_device_apertures_ptr
* from KFD - Number of entries filled by KFD.
*/
__u32 num_of_nodes;
__u32 pad;
};
#define MAX_ALLOWED_NUM_POINTS 100
#define MAX_ALLOWED_AW_BUFF_SIZE 4096
#define MAX_ALLOWED_WAC_BUFF_SIZE 128
struct kfd_ioctl_dbg_register_args {
__u32 gpu_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_dbg_unregister_args {
__u32 gpu_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_dbg_address_watch_args {
__u64 content_ptr; /* a pointer to the actual content */
__u32 gpu_id; /* to KFD */
__u32 buf_size_in_bytes; /*including gpu_id and buf_size */
};
struct kfd_ioctl_dbg_wave_control_args {
__u64 content_ptr; /* a pointer to the actual content */
__u32 gpu_id; /* to KFD */
__u32 buf_size_in_bytes; /*including gpu_id and buf_size */
};
/* mapping event types to API spec */
#define KFD_DBG_EV_STATUS_TRAP 1
#define KFD_DBG_EV_STATUS_VMFAULT 2
#define KFD_DBG_EV_STATUS_SUSPENDED 4
#define KFD_DBG_EV_STATUS_NEW_QUEUE 8
#define KFD_DBG_EV_FLAG_CLEAR_STATUS 1
#define KFD_INVALID_QUEUEID 0xffffffff
/* KFD_IOC_DBG_TRAP_ENABLE:
* ptr: unused
* data1: 0=disable, 1=enable
* data2: queue ID (for future use)
* data3: return value for fd
*/
#define KFD_IOC_DBG_TRAP_ENABLE 0
/* KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE:
* ptr: unused
* data1: override mode: 0=OR, 1=REPLACE
* data2: mask
* data3: unused
*/
#define KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE 1
/* KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE:
* ptr: unused
* data1: 0=normal, 1=halt, 2=kill, 3=singlestep, 4=disable
* data2: unused
* data3: unused
*/
#define KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE 2
/* KFD_IOC_DBG_TRAP_NODE_SUSPEND:
* ptr: pointer to an array of Queues IDs
* data1: flags
* data2: number of queues
* data3: grace period
*/
#define KFD_IOC_DBG_TRAP_NODE_SUSPEND 3
/* KFD_IOC_DBG_TRAP_NODE_RESUME:
* ptr: pointer to an array of Queues IDs
* data1: flags
* data2: number of queues
* data3: unused
*/
#define KFD_IOC_DBG_TRAP_NODE_RESUME 4
/* KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT:
* ptr: unused
* data1: queue id (IN/OUT)
* data2: flags (IN)
* data3: suspend[2:2], event type [1:0] (OUT)
*/
#define KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT 5
/* KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT:
* ptr: user buffer (IN)
* data1: flags (IN)
* data2: number of queue snapshot entries (IN/OUT)
* data3: unused
*/
#define KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT 6
/* KFD_IOC_DBG_TRAP_GET_VERSION:
* prt: unsused
* data1: major version (OUT)
* data2: minor version (OUT)
* data3: unused
*/
#define KFD_IOC_DBG_TRAP_GET_VERSION 7
struct kfd_ioctl_dbg_trap_args {
__u64 ptr; /* to KFD -- used for pointer arguments: queue arrays */
__u32 pid; /* to KFD */
__u32 gpu_id; /* to KFD */
__u32 op; /* to KFD */
__u32 data1; /* to KFD */
__u32 data2; /* to KFD */
__u32 data3; /* to KFD */
};
/* Matching HSA_EVENTTYPE */
#define KFD_IOC_EVENT_SIGNAL 0
#define KFD_IOC_EVENT_NODECHANGE 1
#define KFD_IOC_EVENT_DEVICESTATECHANGE 2
#define KFD_IOC_EVENT_HW_EXCEPTION 3
#define KFD_IOC_EVENT_SYSTEM_EVENT 4
#define KFD_IOC_EVENT_DEBUG_EVENT 5
#define KFD_IOC_EVENT_PROFILE_EVENT 6
#define KFD_IOC_EVENT_QUEUE_EVENT 7
#define KFD_IOC_EVENT_MEMORY 8
#define KFD_IOC_WAIT_RESULT_COMPLETE 0
#define KFD_IOC_WAIT_RESULT_TIMEOUT 1
#define KFD_IOC_WAIT_RESULT_FAIL 2
#define KFD_SIGNAL_EVENT_LIMIT 4096
/* For kfd_event_data.hw_exception_data.reset_type. */
#define KFD_HW_EXCEPTION_WHOLE_GPU_RESET 0
#define KFD_HW_EXCEPTION_PER_ENGINE_RESET 1
/* For kfd_event_data.hw_exception_data.reset_cause. */
#define KFD_HW_EXCEPTION_GPU_HANG 0
#define KFD_HW_EXCEPTION_ECC 1
/* For kfd_hsa_memory_exception_data.ErrorType */
#define KFD_MEM_ERR_NO_RAS 0
#define KFD_MEM_ERR_SRAM_ECC 1
#define KFD_MEM_ERR_POISON_CONSUMED 2
#define KFD_MEM_ERR_GPU_HANG 3
struct kfd_ioctl_create_event_args {
__u64 event_page_offset; /* from KFD */
__u32 event_trigger_data; /* from KFD - signal events only */
__u32 event_type; /* to KFD */
__u32 auto_reset; /* to KFD */
__u32 node_id; /* to KFD - only valid for certain event types */
__u32 event_id; /* from KFD */
__u32 event_slot_index; /* from KFD */
};
struct kfd_ioctl_destroy_event_args {
__u32 event_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_set_event_args {
__u32 event_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_reset_event_args {
__u32 event_id; /* to KFD */
__u32 pad;
};
struct kfd_memory_exception_failure {
__u32 NotPresent; /* Page not present or supervisor privilege */
__u32 ReadOnly; /* Write access to a read-only page */
__u32 NoExecute; /* Execute access to a page marked NX */
__u32 imprecise; /* Can't determine the exact fault address */
};
/* memory exception data */
struct kfd_hsa_memory_exception_data {
struct kfd_memory_exception_failure failure;
__u64 va;
__u32 gpu_id;
__u32 ErrorType; // 0 = no RAS error,
// 1 = ECC_SRAM,
// 2 = Link_SYNFLOOD (poison),
// 3 = GPU hang (not attributable to a specific cause),
// other values reserved
};
/* hw exception data */
struct kfd_hsa_hw_exception_data {
__u32 reset_type;
__u32 reset_cause;
__u32 memory_lost;
__u32 gpu_id;
};
/* Event data */
struct kfd_event_data {
union {
struct kfd_hsa_memory_exception_data memory_exception_data;
struct kfd_hsa_hw_exception_data hw_exception_data;
}; /* From KFD */
__u64 kfd_event_data_ext; // pointer to an extension structure
// for future exception types
__u32 event_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_wait_events_args {
__u64 events_ptr; // pointed to struct
// kfd_event_data array, to KFD
__u32 num_events; /* to KFD */
__u32 wait_for_all; /* to KFD */
__u32 timeout; /* to KFD */
__u32 wait_result; /* from KFD */
};
struct kfd_ioctl_set_scratch_backing_va_args {
__u64 va_addr; /* to KFD */
__u32 gpu_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_get_tile_config_args {
/* to KFD: pointer to tile array */
__u64 tile_config_ptr;
/* to KFD: pointer to macro tile array */
__u64 macro_tile_config_ptr;
/* to KFD: array size allocated by user mode
* from KFD: array size filled by kernel
*/
__u32 num_tile_configs;
/* to KFD: array size allocated by user mode
* from KFD: array size filled by kernel
*/
__u32 num_macro_tile_configs;
__u32 gpu_id; /* to KFD */
__u32 gb_addr_config; /* from KFD */
__u32 num_banks; /* from KFD */
__u32 num_ranks; /* from KFD */
/* struct size can be extended later if needed
* without breaking ABI compatibility
*/
};
struct kfd_ioctl_set_trap_handler_args {
__u64 tba_addr; /* to KFD */
__u64 tma_addr; /* to KFD */
__u32 gpu_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_acquire_vm_args {
__u32 drm_fd; /* to KFD */
__u32 gpu_id; /* to KFD */
};
/* Allocation flags: memory types */
#define KFD_IOC_ALLOC_MEM_FLAGS_VRAM (1 << 0)
#define KFD_IOC_ALLOC_MEM_FLAGS_GTT (1 << 1)
#define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR (1 << 2)
#define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL (1 << 3)
#define KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP (1 << 4)
/* Allocation flags: attributes/access options */
#define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE (1 << 31)
#define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30)
#define KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC (1 << 29)
#define KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28)
#define KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27)
#define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26)
/* Allocate memory for later SVM (shared virtual memory) mapping.
*
* @va_addr: virtual address of the memory to be allocated
* all later mappings on all GPUs will use this address
* @size: size in bytes
* @handle: buffer handle returned to user mode, used to refer to
* this allocation for mapping, unmapping and freeing
* @mmap_offset: for CPU-mapping the allocation by mmapping a render node
* for userptrs this is overloaded to specify the CPU address
* @gpu_id: device identifier
* @flags: memory type and attributes. See KFD_IOC_ALLOC_MEM_FLAGS above
*/
struct kfd_ioctl_alloc_memory_of_gpu_args {
__u64 va_addr; /* to KFD */
__u64 size; /* to KFD */
__u64 handle; /* from KFD */
__u64 mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */
__u32 gpu_id; /* to KFD */
__u32 flags;
};
/* Free memory allocated with kfd_ioctl_alloc_memory_of_gpu
*
* @handle: memory handle returned by alloc
*/
struct kfd_ioctl_free_memory_of_gpu_args {
__u64 handle; /* to KFD */
};
/* Map memory to one or more GPUs
*
* @handle: memory handle returned by alloc
* @device_ids_array_ptr: array of gpu_ids (__u32 per device)
* @n_devices: number of devices in the array
* @n_success: number of devices mapped successfully
*
* @n_success returns information to the caller how many devices from
* the start of the array have mapped the buffer successfully. It can
* be passed into a subsequent retry call to skip those devices. For
* the first call the caller should initialize it to 0.
*
* If the ioctl completes with return code 0 (success), n_success ==
* n_devices.
*/
struct kfd_ioctl_map_memory_to_gpu_args {
__u64 handle; /* to KFD */
__u64 device_ids_array_ptr; /* to KFD */
__u32 n_devices; /* to KFD */
__u32 n_success; /* to/from KFD */
};
/* Unmap memory from one or more GPUs
*
* same arguments as for mapping
*/
struct kfd_ioctl_unmap_memory_from_gpu_args {
__u64 handle; /* to KFD */
__u64 device_ids_array_ptr; /* to KFD */
__u32 n_devices; /* to KFD */
__u32 n_success; /* to/from KFD */
};
/* Allocate GWS for specific queue
*
* @queue_id: queue's id that GWS is allocated for
* @num_gws: how many GWS to allocate
* @first_gws: index of the first GWS allocated.
* only support contiguous GWS allocation
*/
struct kfd_ioctl_alloc_queue_gws_args {
__u32 queue_id; /* to KFD */
__u32 num_gws; /* to KFD */
__u32 first_gws; /* from KFD */
__u32 pad; /* to KFD */
};
struct kfd_ioctl_get_dmabuf_info_args {
__u64 size; /* from KFD */
__u64 metadata_ptr; /* to KFD */
__u32 metadata_size; // to KFD (space allocated by user)
// from KFD (actual metadata size)
__u32 gpu_id; /* from KFD */
__u32 flags; /* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */
__u32 dmabuf_fd; /* to KFD */
};
struct kfd_ioctl_import_dmabuf_args {
__u64 va_addr; /* to KFD */
__u64 handle; /* from KFD */
__u32 gpu_id; /* to KFD */
__u32 dmabuf_fd; /* to KFD */
};
/*
* KFD SMI(System Management Interface) events
*/
enum kfd_smi_event {
KFD_SMI_EVENT_NONE = 0, /* not used */
KFD_SMI_EVENT_VMFAULT = 1, /* event start counting at 1 */
KFD_SMI_EVENT_THERMAL_THROTTLE = 2,
KFD_SMI_EVENT_GPU_PRE_RESET = 3,
KFD_SMI_EVENT_GPU_POST_RESET = 4,
};
#define KFD_SMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
struct kfd_ioctl_smi_events_args {
__u32 gpuid; /* to KFD */
__u32 anon_fd; /* from KFD */
};
/* Register offset inside the remapped mmio page
*/
enum kfd_mmio_remap {
KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL = 0,
KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL = 4,
};
struct kfd_ioctl_ipc_export_handle_args {
__u64 handle; /* to KFD */
__u32 share_handle[4]; /* from KFD */
__u32 gpu_id; /* to KFD */
__u32 pad;
};
struct kfd_ioctl_ipc_import_handle_args {
__u64 handle; /* from KFD */
__u64 va_addr; /* to KFD */
__u64 mmap_offset; /* from KFD */
__u32 share_handle[4]; /* to KFD */
__u32 gpu_id; /* to KFD */
__u32 pad;
};
struct kfd_memory_range {
__u64 va_addr;
__u64 size;
};
/* flags definitions
* BIT0: 0: read operation, 1: write operation.
* This also identifies if the src or dst array belongs to remote process
*/
#define KFD_CROSS_MEMORY_RW_BIT (1 << 0)
#define KFD_SET_CROSS_MEMORY_READ(flags) (flags &= ~KFD_CROSS_MEMORY_RW_BIT)
#define KFD_SET_CROSS_MEMORY_WRITE(flags) (flags |= KFD_CROSS_MEMORY_RW_BIT)
#define KFD_IS_CROSS_MEMORY_WRITE(flags) (flags & KFD_CROSS_MEMORY_RW_BIT) // NOLINT
struct kfd_ioctl_cross_memory_copy_args {
/* to KFD: Process ID of the remote process */
__u32 pid;
/* to KFD: See above definition */
__u32 flags;
/* to KFD: Source GPU VM range */
__u64 src_mem_range_array;
/* to KFD: Size of above array */
__u64 src_mem_array_size;
/* to KFD: Destination GPU VM range */
__u64 dst_mem_range_array;
/* to KFD: Size of above array */
__u64 dst_mem_array_size;
/* from KFD: Total amount of bytes copied */
__u64 bytes_copied;
};
#define AMDKFD_IOCTL_BASE 'K'
#define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
#define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
#define AMDKFD_IOW(nr, type) _IOW(AMDKFD_IOCTL_BASE, nr, type)
#define AMDKFD_IOWR(nr, type) _IOWR(AMDKFD_IOCTL_BASE, nr, type)
#define AMDKFD_IOC_GET_VERSION \
AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
#define AMDKFD_IOC_CREATE_QUEUE \
AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
#define AMDKFD_IOC_DESTROY_QUEUE \
AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
#define AMDKFD_IOC_SET_MEMORY_POLICY \
AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
#define AMDKFD_IOC_GET_CLOCK_COUNTERS \
AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
#define AMDKFD_IOC_GET_PROCESS_APERTURES \
AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
#define AMDKFD_IOC_UPDATE_QUEUE \
AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
#define AMDKFD_IOC_CREATE_EVENT \
AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
#define AMDKFD_IOC_DESTROY_EVENT \
AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
#define AMDKFD_IOC_SET_EVENT \
AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
#define AMDKFD_IOC_RESET_EVENT \
AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
#define AMDKFD_IOC_WAIT_EVENTS \
AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
#define AMDKFD_IOC_DBG_REGISTER \
AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
#define AMDKFD_IOC_DBG_UNREGISTER \
AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
#define AMDKFD_IOC_DBG_ADDRESS_WATCH \
AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
#define AMDKFD_IOC_DBG_WAVE_CONTROL \
AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
#define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \
AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args)
#define AMDKFD_IOC_GET_TILE_CONFIG \
AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args)
#define AMDKFD_IOC_SET_TRAP_HANDLER \
AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args)
#define AMDKFD_IOC_GET_PROCESS_APERTURES_NEW \
AMDKFD_IOWR(0x14, \
struct kfd_ioctl_get_process_apertures_new_args)
#define AMDKFD_IOC_ACQUIRE_VM \
AMDKFD_IOW(0x15, struct kfd_ioctl_acquire_vm_args)
#define AMDKFD_IOC_ALLOC_MEMORY_OF_GPU \
AMDKFD_IOWR(0x16, struct kfd_ioctl_alloc_memory_of_gpu_args)
#define AMDKFD_IOC_FREE_MEMORY_OF_GPU \
AMDKFD_IOW(0x17, struct kfd_ioctl_free_memory_of_gpu_args)
#define AMDKFD_IOC_MAP_MEMORY_TO_GPU \
AMDKFD_IOWR(0x18, struct kfd_ioctl_map_memory_to_gpu_args)
#define AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU \
AMDKFD_IOWR(0x19, struct kfd_ioctl_unmap_memory_from_gpu_args)
#define AMDKFD_IOC_SET_CU_MASK \
AMDKFD_IOW(0x1A, struct kfd_ioctl_set_cu_mask_args)
#define AMDKFD_IOC_GET_QUEUE_WAVE_STATE \
AMDKFD_IOWR(0x1B, struct kfd_ioctl_get_queue_wave_state_args)
#define AMDKFD_IOC_GET_DMABUF_INFO \
AMDKFD_IOWR(0x1C, struct kfd_ioctl_get_dmabuf_info_args)
#define AMDKFD_IOC_IMPORT_DMABUF \
AMDKFD_IOWR(0x1D, struct kfd_ioctl_import_dmabuf_args)
#define AMDKFD_IOC_ALLOC_QUEUE_GWS \
AMDKFD_IOWR(0x1E, struct kfd_ioctl_alloc_queue_gws_args)
#define AMDKFD_IOC_SMI_EVENTS \
AMDKFD_IOWR(0x1F, struct kfd_ioctl_smi_events_args)
#define AMDKFD_COMMAND_START 0x01
#define AMDKFD_COMMAND_END 0x20
/* non-upstream ioctls */
#define AMDKFD_IOC_IPC_IMPORT_HANDLE \
AMDKFD_IOWR(0x1F, struct kfd_ioctl_ipc_import_handle_args)
#define AMDKFD_IOC_IPC_EXPORT_HANDLE \
AMDKFD_IOWR(0x20, struct kfd_ioctl_ipc_export_handle_args)
#define AMDKFD_IOC_DBG_TRAP \
AMDKFD_IOWR(0x21, struct kfd_ioctl_dbg_trap_args)
#define AMDKFD_IOC_CROSS_MEMORY_COPY \
AMDKFD_IOWR(0x22, struct kfd_ioctl_cross_memory_copy_args)
#define AMDKFD_COMMAND_START 0x01
#undef AMDKFD_COMMAND_END
#define AMDKFD_COMMAND_END 0x22
#endif // INCLUDE_ROCM_SMI_KFD_IOCTL_H_
-3794
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@@ -1,196 +0,0 @@
/*
* =============================================================================
* ROC Runtime Conformance Release License
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2018, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_COMMON_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_COMMON_H_
#include <memory>
#include <map>
#include <vector>
#include <string>
#define CHECK_DV_IND_RANGE \
amd::smi::RocmSMI& smi = amd::smi::RocmSMI::getInstance(); \
if (dv_ind >= smi.devices().size()) { \
return RSMI_STATUS_INVALID_ARGS; \
} \
#define GET_DEV_FROM_INDX \
CHECK_DV_IND_RANGE \
std::shared_ptr<amd::smi::Device> dev = smi.devices()[dv_ind]; \
assert(dev != nullptr);
#define GET_DEV_AND_KFDNODE_FROM_INDX \
GET_DEV_FROM_INDX \
std::shared_ptr<amd::smi::KFDNode> kfd_node; \
if (smi.kfd_node_map().find(dev->kfd_gpu_id()) == \
smi.kfd_node_map().end()) { \
return RSMI_INITIALIZATION_ERROR; \
} \
kfd_node = smi.kfd_node_map()[dev->kfd_gpu_id()];
#define REQUIRE_ROOT_ACCESS \
if (amd::smi::RocmSMI::getInstance().euid()) { \
return RSMI_STATUS_PERMISSION; \
}
#define DEVICE_MUTEX \
amd::smi::pthread_wrap _pw(*amd::smi::GetMutex(dv_ind)); \
amd::smi::RocmSMI& smi_ = amd::smi::RocmSMI::getInstance(); \
bool blocking_ = !(smi_.init_options() & \
static_cast<uint64_t>(RSMI_INIT_FLAG_RESRV_TEST1)); \
amd::smi::ScopedPthread _lock(_pw, blocking_); \
if (!blocking_ && _lock.mutex_not_acquired()) { \
return RSMI_STATUS_BUSY; \
}
/* This group of macros is used to facilitate checking of support for rsmi_dev*
* "getter" functions. When the return buffer is set to nullptr, the macro will
* check the previously gathered device support data to see if the function,
* with possible variants (e.g., memory types, firware types,...) and
* subvariants (e.g. monitors/sensors) are supported.
*/
// This macro assumes dev already available
#define CHK_API_SUPPORT_ONLY(RT_PTR, VR, SUB_VR) \
if ((RT_PTR) == nullptr) { \
try { \
if (!dev->DeviceAPISupported(__FUNCTION__, (VR), (SUB_VR))) { \
return RSMI_STATUS_NOT_SUPPORTED; \
} \
return RSMI_STATUS_INVALID_ARGS; \
} catch (const amd::smi::rsmi_exception& e) { \
debug_print( \
"Exception caught when checking if API is supported %s.\n", \
e.what()); \
return RSMI_STATUS_INVALID_ARGS; \
} \
}
#define CHK_SUPPORT(RT_PTR, VR, SUB_VR) \
GET_DEV_FROM_INDX \
CHK_API_SUPPORT_ONLY((RT_PTR), (VR), (SUB_VR))
#define CHK_SUPPORT_NAME_ONLY(RT_PTR) \
CHK_SUPPORT((RT_PTR), RSMI_DEFAULT_VARIANT, RSMI_DEFAULT_VARIANT) \
#define CHK_SUPPORT_VAR(RT_PTR, VR) \
CHK_SUPPORT((RT_PTR), (VR), RSMI_DEFAULT_VARIANT) \
#define CHK_SUPPORT_SUBVAR_ONLY(RT_PTR, SUB_VR) \
CHK_SUPPORT((RT_PTR), RSMI_DEFAULT_VARIANT, (SUB_VR)) \
#define DBG_FILE_ERROR(FN, WR_STR) \
if (env_ && env_->debug_output_bitfield & RSMI_DEBUG_SYSFS_FILE_PATHS) { \
std::cout << "*****" << __FUNCTION__ << std::endl; \
std::cout << "*****Opening file: " << (FN) << std::endl; \
if ((WR_STR) != nullptr) { \
std::cout << "***** for writing. Writing: \"" << (WR_STR) << "\""; \
} else { std::cout << "***** for reading.";} \
std::cout << std::endl; \
std::cout << " at " << __FILE__ << ":" << std::dec << __LINE__ << \
std::endl;\
}
#define DEBUG_LOG(WR_STR, VR) \
amd::smi::RocmSMI& smi = amd::smi::RocmSMI::getInstance(); \
if (smi.getEnv().debug_output_bitfield & RSMI_DEBUG_VAL) { \
if ((WR_STR) != nullptr) \
std::cout << (WR_STR) << " " << (VR) << std::endl;\
}
// Add different debug filters here, as powers of 2; e.g, 1, 2, 4, 8, ...
#define RSMI_DEBUG_SYSFS_FILE_PATHS 1<<0
#define RSMI_DEBUG_VAL 1<<1
struct rsmi_func_id_iter_handle {
uintptr_t func_id_iter;
uintptr_t container_ptr;
uint32_t id_type;
};
struct RocmSMI_env_vars {
// If RSMI_DEBUG_INFINITE_LOOP is non-zero, rsmi_init() will go into
// an infinite loop in debug builds. For release builds, this is
// ignored. This is useful for debugging RSMI applications with
// gdb. After attaching with gdb, the inf. loop can be exited and
// RSMI can be debugged.
uint32_t debug_inf_loop;
// Bitfield that is AND'd with various RSMI_DEBUG_* bits to determine
// which debugging information should be turned on. Env. variable
// RSMI_DEBUG_BITFIELD is used to set all the debug info bits.
uint32_t debug_output_bitfield;
// The integer value of sysfs field enum that is to be over-ridden.
// Env. variable RSMI_DEBUG_ENUM_OVERRIDE is used to specify this.
uint32_t enum_override;
// Sysfs path overrides
// Env. var. RSMI_DEBUG_DRM_ROOT_OVERRIDE
const char *path_DRM_root_override;
// Env. var. RSMI_DEBUG_HWMON_ROOT_OVERRIDE
const char *path_HWMon_root_override;
// Env. var. RSMI_DEBUG_PP_ROOT_OVERRIDE
const char *path_power_root_override;
};
// Use this bit offset to store the label-mapped file index
#define MONITOR_TYPE_BIT_POSITION 16
#define MONITOR_IND_BIT_MASK ((1 << MONITOR_TYPE_BIT_POSITION) - 1)
// Support information data structures
typedef std::vector<uint64_t> SubVariant;
typedef SubVariant::const_iterator SubVariantIt;
typedef std::map<uint64_t, std::shared_ptr<SubVariant>> VariantMap;
typedef VariantMap::const_iterator VariantMapIt;
typedef std::map<std::string, std::shared_ptr<VariantMap>> SupportedFuncMap;
typedef SupportedFuncMap::const_iterator SupportedFuncMapIt;
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_COMMON_H_
-251
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@@ -1,251 +0,0 @@
/*
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2017, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_DEVICE_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_DEVICE_H_
#include <pthread.h>
#include <string>
#include <memory>
#include <utility>
#include <cstdint>
#include <vector>
#include <unordered_set>
#include <map>
#include "rocm_smi/rocm_smi_monitor.h"
#include "rocm_smi/rocm_smi_power_mon.h"
#include "rocm_smi/rocm_smi_common.h"
#include "rocm_smi/rocm_smi.h"
#include "rocm_smi/rocm_smi_counters.h"
#include "shared_mutex.h" //NOLINT
namespace amd {
namespace smi {
enum DevKFDNodePropTypes {
kDevKFDNodePropCachesCnt,
kDevKFDNodePropIoLinksCnt,
kDevKFDNodePropCPUCoreIdBase,
kDevKFDNodePropSimdIdBase,
kDevKFDNodePropMaxWavePerSimd,
kDevKFDNodePropLdsSz,
kDevKFDNodePropGdsSz,
kDevKFDNodePropNumGWS,
kDevKFDNodePropWaveFrontSize,
kDevKFDNodePropArrCnt,
kDevKFDNodePropSimdArrPerEng,
kDevKFDNodePropCuPerSimdArr,
kDevKFDNodePropSimdPerCU,
kDevKFDNodePropMaxSlotsScratchCu,
kDevKFDNodePropVendorId,
kDevKFDNodePropDeviceId,
kDevKFDNodePropLocationId,
kDevKFDNodePropDrmRenderMinor,
kDevKFDNodePropHiveId,
kDevKFDNodePropNumSdmaEngines,
kDevKFDNodePropNumSdmaXgmiEngs,
kDevKFDNodePropMaxEngClkFComp,
kDevKFDNodePropLocMemSz,
kDevKFDNodePropFwVer,
kDevKFDNodePropCapability,
kDevKFDNodePropDbgProp,
kDevKFDNodePropSdmaFwVer,
kDevKFDNodePropMaxEngClkCComp,
kDevKFDNodePropDomain,
};
enum DevInfoTypes {
kDevPerfLevel,
kDevOverDriveLevel,
kDevDevID,
kDevDevProdName,
kDevDevProdNum,
kDevVendorID,
kDevSubSysDevID,
kDevSubSysVendorID,
kDevGPUMClk,
kDevGPUSClk,
kDevDCEFClk,
kDevFClk,
kDevSOCClk,
kDevPCIEClk,
kDevPowerProfileMode,
kDevUsage,
kDevPowerODVoltage,
kDevVBiosVer,
kDevPCIEThruPut,
kDevErrCntSDMA,
kDevErrCntUMC,
kDevErrCntGFX,
kDevErrCntMMHUB,
kDevErrCntPCIEBIF,
kDevErrCntHDP,
kDevErrCntXGMIWAFL,
kDevErrCntFeatures,
kDevMemTotGTT,
kDevMemTotVisVRAM,
kDevMemTotVRAM,
kDevMemUsedGTT,
kDevMemUsedVisVRAM,
kDevMemUsedVRAM,
kDevVramVendor,
kDevPCIEReplayCount,
kDevUniqueId,
kDevDFCountersAvailable,
kDevMemBusyPercent,
kDevXGMIError,
kDevFwVersionAsd,
kDevFwVersionCe,
kDevFwVersionDmcu,
kDevFwVersionMc,
kDevFwVersionMe,
kDevFwVersionMec,
kDevFwVersionMec2,
kDevFwVersionPfp,
kDevFwVersionRlc,
kDevFwVersionRlcSrlc,
kDevFwVersionRlcSrlg,
kDevFwVersionRlcSrls,
kDevFwVersionSdma,
kDevFwVersionSdma2,
kDevFwVersionSmc,
kDevFwVersionSos,
kDevFwVersionTaRas,
kDevFwVersionTaXgmi,
kDevFwVersionUvd,
kDevFwVersionVce,
kDevFwVersionVcn,
kDevSerialNumber,
kDevMemPageBad,
kDevNumaNode,
kDevGpuMetrics,
kDevGpuReset
};
typedef struct {
std::vector<const char *> mandatory_depends;
std::vector<DevInfoTypes> variants;
} dev_depends_t;
class Device {
public:
explicit Device(std::string path, RocmSMI_env_vars const *e);
~Device(void);
void set_monitor(std::shared_ptr<Monitor> m) {monitor_ = m;}
std::string path(void) const {return path_;}
const std::shared_ptr<Monitor>& monitor() {return monitor_;}
const std::shared_ptr<PowerMon>& power_monitor() {return power_monitor_;}
void set_power_monitor(std::shared_ptr<PowerMon> pm) {power_monitor_ = pm;}
int readDevInfo(DevInfoTypes type, uint64_t *val);
int readDevInfoLine(DevInfoTypes type, std::string *line);
int readDevInfo(DevInfoTypes type, std::string *val);
int readDevInfo(DevInfoTypes type, std::vector<std::string> *retVec);
int readDevInfo(DevInfoTypes type, std::size_t b_size,
void *p_binary_data);
int writeDevInfo(DevInfoTypes type, uint64_t val);
int writeDevInfo(DevInfoTypes type, std::string val);
uint32_t index(void) const {return card_indx_;}
void set_card_index(uint32_t index) {card_indx_ = index;}
uint32_t drm_render_minor(void) const {return drm_render_minor_;}
void set_drm_render_minor(uint32_t minor) {drm_render_minor_ = minor;}
static rsmi_dev_perf_level perfLvlStrToEnum(std::string s);
uint64_t bdfid(void) const {return bdfid_;}
void set_bdfid(uint64_t val) {bdfid_ = val;}
pthread_mutex_t *mutex(void) {return mutex_.ptr;}
evt::dev_evt_grp_set_t* supported_event_groups(void) {
return &supported_event_groups_;}
SupportedFuncMap *supported_funcs(void) {return &supported_funcs_;}
uint64_t kfd_gpu_id(void) const {return kfd_gpu_id_;}
void set_kfd_gpu_id(uint64_t id) {kfd_gpu_id_ = id;}
void set_evt_notif_anon_file_ptr(FILE *f) {evt_notif_anon_file_ptr_ = f;}
FILE *evt_notif_anon_file_ptr(void) const {return evt_notif_anon_file_ptr_;}
void set_evt_notif_anon_fd(int fd) {evt_notif_anon_fd_ = fd;}
void set_evt_notif_anon_fd(uint32_t fd) {
evt_notif_anon_fd_ = static_cast<int>(fd);}
int evt_notif_anon_fd(void) const {return evt_notif_anon_fd_;}
metrics_table_header_t & gpu_metrics_ver(void) {return gpu_metrics_ver_;}
void fillSupportedFuncs(void);
void DumpSupportedFunctions(void);
bool DeviceAPISupported(std::string name, uint64_t variant,
uint64_t sub_variant);
private:
std::shared_ptr<Monitor> monitor_;
std::shared_ptr<PowerMon> power_monitor_;
std::string path_;
shared_mutex_t mutex_;
uint32_t card_indx_; // This index corresponds to the drm index (ie, card#)
uint32_t drm_render_minor_;
const RocmSMI_env_vars *env_;
template <typename T> int openDebugFileStream(DevInfoTypes type, T *fs,
const char *str = nullptr);
template <typename T> int openSysfsFileStream(DevInfoTypes type, T *fs,
const char *str = nullptr);
int readDebugInfoStr(DevInfoTypes type, std::string *retStr);
int readDevInfoStr(DevInfoTypes type, std::string *retStr);
int readDevInfoMultiLineStr(DevInfoTypes type,
std::vector<std::string> *retVec);
int readDevInfoBinary(DevInfoTypes type, std::size_t b_size,
void *p_binary_data);
int writeDevInfoStr(DevInfoTypes type, std::string valStr);
uint64_t bdfid_;
uint64_t kfd_gpu_id_;
std::unordered_set<rsmi_event_group_t,
evt::RSMIEventGrpHashFunction> supported_event_groups_;
// std::map<std::string, uint64_t> kfdNodePropMap_;
SupportedFuncMap supported_funcs_;
int evt_notif_anon_fd_;
FILE *evt_notif_anon_file_ptr_;
struct metrics_table_header_t gpu_metrics_ver_;
};
} // namespace smi
} // namespace amd
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_DEVICE_H_
-137
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/*
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2020, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_IO_LINK_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_IO_LINK_H_
#include <string>
#include <vector>
#include <unordered_set>
#include <memory>
#include <map>
#include <utility>
#include "rocm_smi/rocm_smi.h"
namespace amd {
namespace smi {
typedef enum _IO_LINK_TYPE {
IOLINK_TYPE_UNDEFINED = 0,
IOLINK_TYPE_HYPERTRANSPORT = 1,
IOLINK_TYPE_PCIEXPRESS = 2,
IOLINK_TYPE_AMBA = 3,
IOLINK_TYPE_MIPI = 4,
IOLINK_TYPE_QPI_1_1 = 5,
IOLINK_TYPE_RESERVED1 = 6,
IOLINK_TYPE_RESERVED2 = 7,
IOLINK_TYPE_RAPID_IO = 8,
IOLINK_TYPE_INFINIBAND = 9,
IOLINK_TYPE_RESERVED3 = 10,
IOLINK_TYPE_XGMI = 11,
IOLINK_TYPE_XGOP = 12,
IOLINK_TYPE_GZ = 13,
IOLINK_TYPE_ETHERNET_RDMA = 14,
IOLINK_TYPE_RDMA_OTHER = 15,
IOLINK_TYPE_OTHER = 16,
IOLINK_TYPE_NUMIOLINKTYPES,
IOLINK_TYPE_SIZE = 0xFFFFFFFF
} IO_LINK_TYPE;
typedef enum _LINK_DIRECTORY_TYPE {
IO_LINK_DIRECTORY = 0,
P2P_LINK_DIRECTORY = 1
} LINK_DIRECTORY_TYPE;
class IOLink {
public:
explicit IOLink(uint32_t node_indx, uint32_t link_indx, LINK_DIRECTORY_TYPE link_dir_type) :
node_indx_(node_indx), link_indx_(link_indx), link_dir_type_(link_dir_type) {}
~IOLink();
int Initialize();
int ReadProperties(void);
int get_property_value(std::string property, uint64_t *value);
uint32_t get_node_indx(void) const {return node_indx_;}
uint32_t get_link_indx(void) const {return link_indx_;}
IO_LINK_TYPE type(void) const {return type_;}
uint32_t node_from(void) const {return node_from_;}
uint32_t node_to(void) const {return node_to_;}
uint64_t weight(void) const {return weight_;}
LINK_DIRECTORY_TYPE get_directory_type(void) const {return link_dir_type_;}
uint64_t min_bandwidth(void) const {return min_bandwidth_;}
uint64_t max_bandwidth(void) const {return max_bandwidth_;}
private:
uint32_t node_indx_;
uint32_t link_indx_;
IO_LINK_TYPE type_;
uint32_t node_from_;
uint32_t node_to_;
uint64_t weight_;
uint64_t min_bandwidth_;
uint64_t max_bandwidth_;
std::map<std::string, uint64_t> properties_;
LINK_DIRECTORY_TYPE link_dir_type_;
};
int
DiscoverIOLinksPerNode(uint32_t node_indx, std::map<uint32_t,
std::shared_ptr<IOLink>> *links);
int
DiscoverP2PLinksPerNode(uint32_t node_indx, std::map<uint32_t,
std::shared_ptr<IOLink>> *links);
int
DiscoverIOLinks(std::map<std::pair<uint32_t, uint32_t>,
std::shared_ptr<IOLink>> *links);
int
DiscoverP2PLinks(std::map<std::pair<uint32_t, uint32_t>,
std::shared_ptr<IOLink>> *links);
} // namespace smi
} // namespace amd
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_IO_LINK_H_
-120
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@@ -1,120 +0,0 @@
/*
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2019, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_KFD_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_KFD_H_
#include <string>
#include <vector>
#include <unordered_set>
#include <memory>
#include <map>
#include "rocm_smi/rocm_smi.h"
#include "rocm_smi/rocm_smi_device.h"
#include "rocm_smi/rocm_smi_io_link.h"
namespace amd {
namespace smi {
class KFDNode {
public:
explicit KFDNode(uint32_t node_ind) : node_indx_(node_ind) {}
~KFDNode();
int Initialize();
int ReadProperties(void);
int get_property_value(std::string property, uint64_t *value);
uint64_t gpu_id(void) const {return gpu_id_;}
std::string name(void) const {return name_;}
uint32_t node_index(void) const {return node_indx_;}
uint32_t numa_node_number(void) const {return numa_node_number_;}
uint64_t numa_node_weight(void) const {return numa_node_weight_;}
uint64_t xgmi_hive_id(void) const {return xgmi_hive_id_;}
uint32_t cu_count(void) const {return cu_count_;}
IO_LINK_TYPE numa_node_type(void) const {return numa_node_type_;}
int get_io_link_type(uint32_t node_to, IO_LINK_TYPE *type);
int get_io_link_weight(uint32_t node_to, uint64_t *weight);
int get_io_link_bandwidth(uint32_t node_to, uint64_t *max_bandwidth,
uint64_t *min_bandwidth);
std::shared_ptr<Device> amdgpu_device(void) const {return amdgpu_device_;}
uint32_t amdgpu_dev_index(void) const {return amdgpu_dev_index_;}
void set_amdgpu_dev_index(uint32_t val) {amdgpu_dev_index_ = val;}
private:
uint32_t node_indx_;
uint32_t amdgpu_dev_index_;
uint64_t gpu_id_;
std::string name_;
uint32_t numa_node_number_;
uint64_t numa_node_weight_;
IO_LINK_TYPE numa_node_type_;
uint64_t xgmi_hive_id_;
uint32_t cu_count_;
std::map<uint32_t, IO_LINK_TYPE> io_link_type_;
std::map<uint32_t, uint64_t> io_link_weight_;
std::map<uint32_t, uint64_t> io_link_max_bandwidth_;
std::map<uint32_t, uint64_t> io_link_min_bandwidth_;
std::map<uint32_t, std::shared_ptr<IOLink>> io_link_map_;
std::map<std::string, uint64_t> properties_;
std::shared_ptr<Device> amdgpu_device_;
};
int
DiscoverKFDNodes(std::map<uint64_t, std::shared_ptr<KFDNode>> *nodes);
int
GetProcessInfo(rsmi_process_info_t *procs, uint32_t num_allocated,
uint32_t *num_procs_found);
int
GetProcessInfoForPID(uint32_t pid, rsmi_process_info_t *proc,
std::unordered_set<uint64_t> *gpu_set);
int
GetProcessGPUs(uint32_t pid, std::unordered_set<uint64_t> *gpu_count);
int
ReadKFDDeviceProperties(uint32_t dev_id, std::vector<std::string> *retVec);
} // namespace smi
} // namespace amd
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_KFD_H_
-146
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@@ -1,146 +0,0 @@
/*
* =============================================================================
* ROC Runtime Conformance Release License
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2017, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_MAIN_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_MAIN_H_
#include <vector>
#include <memory>
#include <functional>
#include <set>
#include <string>
#include <cstdint>
#include <unordered_map>
#include <map>
#include <mutex> // NOLINT
#include <utility>
#include "rocm_smi/rocm_smi_io_link.h"
#include "rocm_smi/rocm_smi_kfd.h"
#include "rocm_smi/rocm_smi_device.h"
#include "rocm_smi/rocm_smi_monitor.h"
#include "rocm_smi/rocm_smi_power_mon.h"
#include "rocm_smi/rocm_smi_common.h"
namespace amd {
namespace smi {
class RocmSMI {
public:
explicit RocmSMI(uint64_t flags);
~RocmSMI(void);
static RocmSMI& getInstance(uint64_t flags = 0);
void Initialize(uint64_t flags);
void Cleanup(void);
std::vector<std::shared_ptr<amd::smi::Device>>&
devices() {return devices_;}
uint32_t DiscoverAmdgpuDevices(void);
int DiscoverAMDPowerMonitors(bool force_update = false);
// Will execute "func" for every Device object known about, or until func
// returns non-zero;
uint32_t IterateSMIDevices(
std::function<uint32_t(std::shared_ptr<Device>&, void *)> func, void *);
void set_init_options(uint64_t options) {init_options_ = options;}
uint64_t init_options() const {return init_options_;}
uint32_t euid() const {return euid_;}
std::map<uint64_t, std::shared_ptr<KFDNode>> & kfd_node_map(void) {
return kfd_node_map_;}
int kfd_notif_evt_fh(void) const {return kfd_notif_evt_fh_;}
void set_kfd_notif_evt_fh(int fd) {kfd_notif_evt_fh_ = fd;}
std::mutex *kfd_notif_evt_fh_mutex(void) {return &kfd_notif_evt_fh_mutex_;}
std::mutex *bootstrap_mutex(void) {return &bootstrap_mutex_;}
uint32_t ref_count(void) const {return ref_count_;}
uint32_t ref_count_inc(void) {return ++ref_count_;}
uint32_t ref_count_dec(void) {return --ref_count_;}
uint32_t kfd_notif_evt_fh_refcnt(void) const {
return kfd_notif_evt_fh_refcnt_;}
uint32_t kfd_notif_evt_fh_refcnt_inc(void) {
return ++kfd_notif_evt_fh_refcnt_;}
uint32_t kfd_notif_evt_fh_refcnt_dec(void) {
return --kfd_notif_evt_fh_refcnt_;}
int get_io_link_weight(uint32_t node_from, uint32_t node_to,
uint64_t *weight);
int get_node_index(uint32_t dv_ind, uint32_t *node_ind);
const RocmSMI_env_vars& getEnv(void);
private:
std::vector<std::shared_ptr<Device>> devices_;
std::map<uint64_t, std::shared_ptr<KFDNode>> kfd_node_map_;
std::vector<std::shared_ptr<Monitor>> monitors_;
std::vector<std::shared_ptr<PowerMon>> power_mons_;
std::set<std::string> amd_monitor_types_;
std::map<std::pair<uint32_t, uint32_t>, std::shared_ptr<IOLink>>
io_link_map_;
std::map<uint32_t, uint32_t> dev_ind_to_node_ind_map_;
void AddToDeviceList(std::string dev_name);
void GetEnvVariables(void);
std::shared_ptr<Monitor> FindMonitor(std::string monitor_path);
RocmSMI_env_vars env_vars_;
uint64_t init_options_;
uint32_t euid_;
int kfd_notif_evt_fh_;
std::mutex kfd_notif_evt_fh_mutex_;
uint32_t kfd_notif_evt_fh_refcnt_; // Access to this should be protected
// by kfd_notif_evt_fh_mutex_
std::mutex bootstrap_mutex_;
uint32_t ref_count_; // Access to this should be protected
// by bootstrap_mutex_
};
} // namespace smi
} // namespace amd
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_MAIN_H_
-134
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/*
* =============================================================================
* ROC Runtime Conformance Release License
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2017, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_MONITOR_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_MONITOR_H_
#include <string>
#include <cstdint>
#include <map>
#include "rocm_smi/rocm_smi_common.h"
#include "rocm_smi/rocm_smi.h"
namespace amd {
namespace smi {
enum MonitorTypes {
kMonName,
kMonTemp, // Temperature in millidegrees
kMonFanSpeed,
kMonMaxFanSpeed,
kMonFanRPMs,
kMonFanCntrlEnable,
kMonPowerCap,
kMonPowerCapDefault,
kMonPowerCapMax,
kMonPowerCapMin,
kMonPowerAve,
kMonTempMax,
kMonTempMin,
kMonTempMaxHyst,
kMonTempMinHyst,
kMonTempCritical,
kMonTempCriticalHyst,
kMonTempEmergency,
kMonTempEmergencyHyst,
kMonTempCritMin,
kMonTempCritMinHyst,
kMonTempOffset,
kMonTempLowest,
kMonTempHighest,
kMonTempLabel,
kMonVolt,
kMonVoltMax,
kMonVoltMinCrit,
kMonVoltMin,
kMonVoltMaxCrit,
kMonVoltAverage,
kMonVoltLowest,
kMonVoltHighest,
kMonVoltLabel,
kMonInvalid = 0xFFFFFFFF,
};
class Monitor {
public:
explicit Monitor(std::string path, RocmSMI_env_vars const *e);
~Monitor(void);
const std::string path(void) const {return path_;}
int readMonitor(MonitorTypes type, uint32_t sensor_ind, std::string *val);
int writeMonitor(MonitorTypes type, uint32_t sensor_ind, std::string val);
int32_t setTempSensorLabelMap(void);
uint32_t getTempSensorIndex(rsmi_temperature_type_t type);
rsmi_temperature_type_t getTempSensorEnum(uint64_t ind);
int32_t setVoltSensorLabelMap(void);
uint32_t getVoltSensorIndex(rsmi_voltage_type_t type);
rsmi_voltage_type_t getVoltSensorEnum(uint64_t ind);
void fillSupportedFuncs(SupportedFuncMap *supported_funcs);
private:
std::string MakeMonitorPath(MonitorTypes type, uint32_t sensor_id);
std::string path_;
const RocmSMI_env_vars *env_;
std::map<rsmi_temperature_type_t, uint32_t> temp_type_index_map_;
// This map uses a 64b index instead of 32b (unlike temp_type_index_map_)
// for flexibility and simplicity. Currently, some parts of the
// implementation store both the RSMI api index and the file index into a
// single value. 32 bits is enough to store both, but we are using 64
// bits for simpler integration with existing implementation, which uses
// a 64b value. Also, if we need to encode anything else, 64b will give
// us more room to do so, without excessive changes.
std::map<uint64_t, rsmi_temperature_type_t> index_temp_type_map_;
std::map<rsmi_voltage_type_t, uint32_t> volt_type_index_map_;
std::map<uint64_t, rsmi_voltage_type_t> index_volt_type_map_;
};
} // namespace smi
} // namespace amd
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_MONITOR_H_
-204
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/*
* =============================================================================
* The University of Illinois/NCSA
* Open Source License (NCSA)
*
* Copyright (c) 2018, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Developed by:
*
* AMD Research and AMD ROC Software Development
*
* Advanced Micro Devices, Inc.
*
* www.amd.com
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal with the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimers.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimers in
* the documentation and/or other materials provided with the distribution.
* - Neither the names of <Name of Development Group, Name of Institution>,
* nor the names of its contributors may be used to endorse or promote
* products derived from this Software without specific prior written
* permission.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*
*/
#ifndef INCLUDE_ROCM_SMI_ROCM_SMI_UTILS_H_
#define INCLUDE_ROCM_SMI_ROCM_SMI_UTILS_H_
#include <pthread.h>
#include <string>
#include <cstdint>
#include <vector>
#include "rocm_smi/rocm_smi_device.h"
#ifdef NDEBUG
#define debug_print(fmt, ...) \
do { \
} while (false)
#else
#define debug_print(fmt, ...) \
do { \
fprintf(stderr, fmt, ##__VA_ARGS__); \
} while (false)
#endif
namespace amd {
namespace smi {
pthread_mutex_t *GetMutex(uint32_t dv_ind);
int SameFile(const std::string fileA, const std::string fileB);
bool FileExists(char const *filename);
int isRegularFile(std::string fname, bool *is_reg);
int ReadSysfsStr(std::string path, std::string *retStr);
int WriteSysfsStr(std::string path, std::string val);
bool IsInteger(const std::string & n_str);
rsmi_status_t handleException();
rsmi_status_t
GetDevValueVec(amd::smi::DevInfoTypes type,
uint32_t dv_ind, std::vector<std::string> *val_vec);
rsmi_status_t
GetDevBinaryBlob(amd::smi::DevInfoTypes type,
uint32_t dv_ind, std::size_t b_size, void* p_binary_data);
rsmi_status_t ErrnoToRsmiStatus(int err);
struct pthread_wrap {
public:
explicit pthread_wrap(pthread_mutex_t &p_mut) : mutex_(p_mut) {}
void Acquire() {pthread_mutex_lock(&mutex_);}
int AcquireNB() {return pthread_mutex_trylock(&mutex_);}
void Release() {pthread_mutex_unlock(&mutex_);}
private:
pthread_mutex_t& mutex_;
};
struct ScopedPthread {
explicit ScopedPthread(pthread_wrap& mutex, bool blocking = true) : //NOLINT
pthrd_ref_(mutex), mutex_not_acquired_(false) {
if (blocking) {
pthrd_ref_.Acquire();
} else {
int ret = pthrd_ref_.AcquireNB();
if (ret == EBUSY) {
mutex_not_acquired_ = true;
}
}
}
~ScopedPthread() {
pthrd_ref_.Release();
}
bool mutex_not_acquired() {return mutex_not_acquired_;}
private:
ScopedPthread(const ScopedPthread&);
pthread_wrap& pthrd_ref_;
bool mutex_not_acquired_; // Use for AcquireNB (not for Aquire())
};
#define PASTE2(x, y) x##y
#define PASTE(x, y) PASTE2(x, y)
#define __forceinline __inline__ __attribute__((always_inline))
template <typename lambda>
class ScopeGuard {
public:
explicit __forceinline ScopeGuard(const lambda& release)
: release_(release), dismiss_(false) {}
ScopeGuard(const ScopeGuard& rhs) {*this = rhs; }
__forceinline ~ScopeGuard() {
if (!dismiss_) release_();
}
__forceinline ScopeGuard& operator=(const ScopeGuard& rhs) {
dismiss_ = rhs.dismiss_;
release_ = rhs.release_;
rhs.dismiss_ = true;
}
__forceinline void Dismiss() { dismiss_ = true; }
private:
lambda release_;
bool dismiss_;
};
template <typename lambda>
static __forceinline ScopeGuard<lambda> MakeScopeGuard(lambda rel) {
return ScopeGuard<lambda>(rel);
}
#define MAKE_SCOPE_GUARD_HELPER(lname, sname, ...) \
auto lname = __VA_ARGS__; \
amd::smi::ScopeGuard<decltype(lname)> sname(lname);
#define MAKE_SCOPE_GUARD(...) \
MAKE_SCOPE_GUARD_HELPER(PASTE(scopeGuardLambda, __COUNTER__), \
PASTE(scopeGuard, __COUNTER__), __VA_ARGS__)
#define MAKE_NAMED_SCOPE_GUARD(name, ...) \
MAKE_SCOPE_GUARD_HELPER(PASTE(scopeGuardLambda, __COUNTER__), name, \
__VA_ARGS__)
// A macro to disallow the copy and move constructor and operator= functions
#define DISALLOW_COPY_AND_ASSIGN(TypeName) \
TypeName(const TypeName&) = delete; \
TypeName(TypeName&&) = delete; \
void operator=(const TypeName&) = delete; \
void operator=(TypeName&&) = delete;
template <class LockType>
class ScopedAcquire {
public:
/// @brief: When constructing, acquire the lock.
/// @param: lock(Input), pointer to an existing lock.
explicit ScopedAcquire(LockType* lock) : lock_(lock), doRelease(true) {
lock_->Acquire();}
/// @brief: when destructing, release the lock.
~ScopedAcquire() {
if (doRelease) lock_->Release();
}
/// @brief: Release the lock early. Avoid using when possible.
void Release() {
lock_->Release();
doRelease = false;
}
private:
LockType* lock_;
bool doRelease;
/// @brief: Disable copiable and assignable ability.
DISALLOW_COPY_AND_ASSIGN(ScopedAcquire);
};
} // namespace smi
} // namespace amd
#endif // INCLUDE_ROCM_SMI_ROCM_SMI_UTILS_H_