From 0cd4ddd62b3debbab3366903cd5c0a677b7a9947 Mon Sep 17 00:00:00 2001 From: Aaron Liu Date: Thu, 19 Dec 2024 15:49:37 +0800 Subject: [PATCH] rocr/dtif: add DRM APIs wrapper in thunk loader Signed-off-by: Aaron Liu Reviewed-by: David Yat Sin --- .../core/driver/kfd/amd_kfd_driver.cpp | 14 ++--- runtime/hsa-runtime/core/inc/thunk_loader.h | 58 ++++++++++++++++++- .../core/runtime/amd_gpu_agent.cpp | 3 +- runtime/hsa-runtime/core/runtime/runtime.cpp | 26 ++++----- .../hsa-runtime/core/runtime/thunk_loader.cpp | 38 ++++++++++++ 5 files changed, 113 insertions(+), 26 deletions(-) diff --git a/runtime/hsa-runtime/core/driver/kfd/amd_kfd_driver.cpp b/runtime/hsa-runtime/core/driver/kfd/amd_kfd_driver.cpp index 09989b91d3..e187c6ad6c 100644 --- a/runtime/hsa-runtime/core/driver/kfd/amd_kfd_driver.cpp +++ b/runtime/hsa-runtime/core/driver/kfd/amd_kfd_driver.cpp @@ -381,8 +381,8 @@ hsa_status_t KfdDriver::ImportDMABuf(int dmabuf_fd, core::Agent &agent, core::ShareableHandle &handle) { auto &gpu_agent = static_cast(agent); amdgpu_bo_import_result res; - auto ret = amdgpu_bo_import( - gpu_agent.libDrmDev(), amdgpu_bo_handle_type_dma_buf_fd, dmabuf_fd, &res); + auto ret = DRM_CALL(amdgpu_bo_import( + gpu_agent.libDrmDev(), amdgpu_bo_handle_type_dma_buf_fd, dmabuf_fd, &res)); if (ret) return HSA_STATUS_ERROR; @@ -397,8 +397,8 @@ hsa_status_t KfdDriver::Map(core::ShareableHandle handle, void *mem, if (!ldrm_bo) return HSA_STATUS_ERROR; - if (amdgpu_bo_va_op(ldrm_bo, offset, size, reinterpret_cast(mem), - drm_perm(perms), AMDGPU_VA_OP_MAP) != 0) + if (DRM_CALL(amdgpu_bo_va_op(ldrm_bo, offset, size, reinterpret_cast(mem), + drm_perm(perms), AMDGPU_VA_OP_MAP)) != 0) return HSA_STATUS_ERROR; return HSA_STATUS_SUCCESS; @@ -410,8 +410,8 @@ hsa_status_t KfdDriver::Unmap(core::ShareableHandle handle, void *mem, if (!ldrm_bo) return HSA_STATUS_ERROR; - if (amdgpu_bo_va_op(ldrm_bo, offset, size, reinterpret_cast(mem), 0, - AMDGPU_VA_OP_UNMAP) != 0) + if (DRM_CALL(amdgpu_bo_va_op(ldrm_bo, offset, size, reinterpret_cast(mem), 0, + AMDGPU_VA_OP_UNMAP)) != 0) return HSA_STATUS_ERROR; return HSA_STATUS_SUCCESS; @@ -422,7 +422,7 @@ hsa_status_t KfdDriver::ReleaseShareableHandle(core::ShareableHandle &handle) { if (!ldrm_bo) return HSA_STATUS_ERROR; - const auto ret = amdgpu_bo_free(ldrm_bo); + const auto ret = DRM_CALL(amdgpu_bo_free(ldrm_bo)); if (ret) return HSA_STATUS_ERROR; diff --git a/runtime/hsa-runtime/core/inc/thunk_loader.h b/runtime/hsa-runtime/core/inc/thunk_loader.h index 7a128dc3d1..6743af5fae 100644 --- a/runtime/hsa-runtime/core/inc/thunk_loader.h +++ b/runtime/hsa-runtime/core/inc/thunk_loader.h @@ -43,14 +43,19 @@ #ifndef HSA_RUNTIME_CORE_INC_THUNK_LOADER_H #define HSA_RUNTIME_CORE_INC_THUNK_LOADER_H +#include #include "hsakmt/hsakmttypes.h" namespace rocr { namespace core { -#define HSAKMT_DEF(functiom_name) PFN##functiom_name -#define HSAKMT_PFN(functiom_name) pfn_##functiom_name -#define HSAKMT_CALL(functiom_name) core::Runtime::runtime_singleton_->thunkLoader()->pfn_##functiom_name +#define HSAKMT_DEF(function_name) PFN##function_name +#define HSAKMT_PFN(function_name) pfn_##function_name +#define HSAKMT_CALL(function_name) core::Runtime::runtime_singleton_->thunkLoader()->pfn_##function_name + +#define DRM_DEF(function_name) PFN##function_name +#define DRM_PFN(function_name) pfn_##function_name +#define DRM_CALL(function_name) core::Runtime::runtime_singleton_->thunkLoader()->pfn_##function_name class ThunkLoader { public: @@ -310,6 +315,43 @@ class ThunkLoader { typedef HSAKMT_STATUS (HSAKMT_DEF(hsaKmtPcSamplingSupport))(void); typedef HSAKMT_STATUS (HSAKMT_DEF(hsaKmtModelEnabled))(bool* enable); + /* drm API */ + typedef int (DRM_DEF(amdgpu_device_initialize))(int fd, \ + uint32_t *major_version, \ + uint32_t *minor_version, \ + amdgpu_device_handle *device_handle); + + typedef int (DRM_DEF(amdgpu_device_deinitialize))(amdgpu_device_handle device_handle); + + typedef int (DRM_DEF(amdgpu_query_gpu_info))(amdgpu_device_handle dev, \ + struct amdgpu_gpu_info *info); + + typedef int (DRM_DEF(amdgpu_bo_cpu_map))(amdgpu_bo_handle bo, \ + void **cpu); + + typedef int (DRM_DEF(amdgpu_bo_free))(amdgpu_bo_handle buf_handle); + + typedef int (DRM_DEF(amdgpu_bo_export))(amdgpu_bo_handle bo, \ + enum amdgpu_bo_handle_type type, \ + uint32_t *shared_handle); + + typedef int (DRM_DEF(amdgpu_bo_import))(amdgpu_device_handle dev, \ + enum amdgpu_bo_handle_type type, \ + uint32_t shared_handle, \ + struct amdgpu_bo_import_result *output); + + typedef int (DRM_DEF(amdgpu_bo_va_op))(amdgpu_bo_handle bo, \ + uint64_t offset, \ + uint64_t size, \ + uint64_t addr, \ + uint64_t flags, \ + uint32_t op); + + typedef int (DRM_DEF(drmCommandWriteRead))(int fd, \ + unsigned long drmCommandIndex, \ + void *data, \ + unsigned long size); + ThunkLoader(); ~ThunkLoader(); @@ -407,6 +449,16 @@ class ThunkLoader { HSAKMT_DEF(hsaKmtPcSamplingSupport)* HSAKMT_PFN(hsaKmtPcSamplingSupport); HSAKMT_DEF(hsaKmtModelEnabled)* HSAKMT_PFN(hsaKmtModelEnabled); + DRM_DEF(amdgpu_device_initialize)* DRM_PFN(amdgpu_device_initialize); + DRM_DEF(amdgpu_device_deinitialize)* DRM_PFN(amdgpu_device_deinitialize); + DRM_DEF(amdgpu_query_gpu_info)* DRM_PFN(amdgpu_query_gpu_info); + DRM_DEF(amdgpu_bo_cpu_map)* DRM_PFN(amdgpu_bo_cpu_map); + DRM_DEF(amdgpu_bo_free)* DRM_PFN(amdgpu_bo_free); + DRM_DEF(amdgpu_bo_export)* DRM_PFN(amdgpu_bo_export); + DRM_DEF(amdgpu_bo_import)* DRM_PFN(amdgpu_bo_import); + DRM_DEF(amdgpu_bo_va_op)* DRM_PFN(amdgpu_bo_va_op); + DRM_DEF(drmCommandWriteRead)* DRM_PFN(drmCommandWriteRead); + private: void *dtif_handle; }; diff --git a/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp b/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp index 6dd4838e00..f7e0fcd51b 100644 --- a/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp +++ b/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp @@ -223,13 +223,12 @@ GpuAgent::GpuAgent(HSAuint32 node, const HsaNodeProperties& node_props, bool xna } else { // Get wallclock freq from libdrm. amdgpu_gpu_info info; - if (amdgpu_query_gpu_info(ldrm_dev_, &info) < 0) + if (DRM_CALL(amdgpu_query_gpu_info(ldrm_dev_, &info)) < 0) throw AMD::hsa_exception(HSA_STATUS_ERROR, "Agent creation failed.\nlibdrm query failed.\n"); // Reported by libdrm in KHz. wallclock_frequency_ = uint64_t(info.gpu_counter_freq) * 1000ull; } - #endif auto& first_cpu = core::Runtime::runtime_singleton_->cpu_agents()[0]; diff --git a/runtime/hsa-runtime/core/runtime/runtime.cpp b/runtime/hsa-runtime/core/runtime/runtime.cpp index 6490e09211..49f4c6711c 100644 --- a/runtime/hsa-runtime/core/runtime/runtime.cpp +++ b/runtime/hsa-runtime/core/runtime/runtime.cpp @@ -1375,8 +1375,8 @@ int Runtime::IPCClientImport(uint32_t conn_handle, uint64_t dmabuf_fd_handle, // Manually libDRM import and GPU map system memory AMD::GpuAgent* agent = reinterpret_cast(agents_by_node_[info.NodeId][0]); - err = amdgpu_bo_import(agent->libDrmDev(), amdgpu_bo_handle_type_dma_buf_fd, - dmabuf_fd, res); + err = DRM_CALL(amdgpu_bo_import(agent->libDrmDev(), amdgpu_bo_handle_type_dma_buf_fd, + dmabuf_fd, res)); } close(dmabuf_fd); } @@ -1470,19 +1470,19 @@ hsa_status_t Runtime::IPCAttach(const hsa_amd_ipc_memory_t* handle, size_t len, // System memory DMA Buf import auto errCleanup = [&](amdgpu_bo_handle bo) { - amdgpu_bo_free(bo); // auto frees cpu map + DRM_CALL(amdgpu_bo_free(bo)); // auto frees cpu map return HSA_STATUS_ERROR; }; // Create a shared cpu access pointer for user void *cpuPtr; amdgpu_bo_handle bo = res.buf_handle; - int ret = amdgpu_bo_cpu_map(bo, &cpuPtr); + int ret = DRM_CALL(amdgpu_bo_cpu_map(bo, &cpuPtr)); if (ret) return errCleanup(bo); // Note VA ops will always override flags to allow read/write/exec permissions. - ret = amdgpu_bo_va_op(bo, 0, importSize, - reinterpret_cast(cpuPtr), 0, AMDGPU_VA_OP_MAP); + ret = DRM_CALL(amdgpu_bo_va_op(bo, 0, importSize, + reinterpret_cast(cpuPtr), 0, AMDGPU_VA_OP_MAP)); if (ret) return errCleanup(bo); importAddress = cpuPtr; fixFragment(bo); @@ -1517,10 +1517,10 @@ hsa_status_t Runtime::IPCDetach(void* ptr) { if (it != allocation_map_.end()) { if (it->second.region != nullptr) return HSA_STATUS_ERROR_INVALID_ARGUMENT; if (it->second.ldrm_bo) { - if (amdgpu_bo_va_op(it->second.ldrm_bo, 0, it->second.size, - reinterpret_cast(ptr), 0, AMDGPU_VA_OP_UNMAP)) + if (DRM_CALL(amdgpu_bo_va_op(it->second.ldrm_bo, 0, it->second.size, + reinterpret_cast(ptr), 0, AMDGPU_VA_OP_UNMAP))) return HSA_STATUS_ERROR_INVALID_ARGUMENT; - if (amdgpu_bo_free(it->second.ldrm_bo)) // auto unmaps from cpu + if (DRM_CALL(amdgpu_bo_free(it->second.ldrm_bo))) // auto unmaps from cpu return HSA_STATUS_ERROR_INVALID_ARGUMENT; ldrmImportCleaned = true; } @@ -2237,8 +2237,8 @@ int Runtime::GetAmdgpuDeviceArgs(Agent *agent, ShareableHandle handle, if (renderFd < 0) return HSA_STATUS_ERROR; uint32_t gem_handle = 0; - if (amdgpu_bo_export(reinterpret_cast(handle.handle), - amdgpu_bo_handle_type_kms, &gem_handle)) + if (DRM_CALL(amdgpu_bo_export(reinterpret_cast(handle.handle), + amdgpu_bo_handle_type_kms, &gem_handle))) return HSA_STATUS_ERROR; union drm_amdgpu_gem_mmap args; @@ -2246,7 +2246,7 @@ int Runtime::GetAmdgpuDeviceArgs(Agent *agent, ShareableHandle handle, /* Query the buffer address (args.addr_ptr). * The kernel driver ignores the offset and size parameters. */ args.in.handle = gem_handle; - if (drmCommandWriteRead(renderFd, DRM_AMDGPU_GEM_MMAP, &args, sizeof(args))) + if (DRM_CALL(drmCommandWriteRead(renderFd, DRM_AMDGPU_GEM_MMAP, &args, sizeof(args)))) return HSA_STATUS_ERROR; *drm_fd = renderFd; @@ -3368,8 +3368,6 @@ Runtime::MappedHandleAllowedAgent::MappedHandleAllowedAgent( assert(status == HSA_STATUS_SUCCESS); if (status != HSA_STATUS_SUCCESS) return; - - close(dmabuf_fd); } Runtime::MappedHandleAllowedAgent::~MappedHandleAllowedAgent() { diff --git a/runtime/hsa-runtime/core/runtime/thunk_loader.cpp b/runtime/hsa-runtime/core/runtime/thunk_loader.cpp index 1c0bdfc27a..91a02ef4b2 100644 --- a/runtime/hsa-runtime/core/runtime/thunk_loader.cpp +++ b/runtime/hsa-runtime/core/runtime/thunk_loader.cpp @@ -348,6 +348,33 @@ namespace core { HSAKMT_PFN(hsaKmtModelEnabled) = (HSAKMT_DEF(hsaKmtModelEnabled)*)dlsym(dtif_handle, "hsaKmtModelEnabled"); if (HSAKMT_PFN(hsaKmtModelEnabled) == NULL) goto ERROR; + DRM_PFN(amdgpu_device_initialize) = (DRM_DEF(amdgpu_device_initialize)*)dlsym(dtif_handle, "amdgpu_device_initialize"); + if (DRM_PFN(amdgpu_device_initialize) == NULL) goto ERROR; + + DRM_PFN(amdgpu_device_deinitialize) = (DRM_DEF(amdgpu_device_deinitialize)*)dlsym(dtif_handle, "amdgpu_device_deinitialize"); + if (DRM_PFN(amdgpu_device_deinitialize) == NULL) goto ERROR; + + DRM_PFN(amdgpu_query_gpu_info) = (DRM_DEF(amdgpu_query_gpu_info)*)dlsym(dtif_handle, "amdgpu_query_gpu_info"); + if (DRM_PFN(amdgpu_query_gpu_info) == NULL) goto ERROR; + + DRM_PFN(amdgpu_bo_cpu_map) = (DRM_DEF(amdgpu_bo_cpu_map)*)dlsym(dtif_handle, "amdgpu_bo_cpu_map"); + if (DRM_PFN(amdgpu_bo_cpu_map) == NULL) goto ERROR; + + DRM_PFN(amdgpu_bo_free) = (DRM_DEF(amdgpu_bo_free)*)dlsym(dtif_handle, "amdgpu_bo_free"); + if (DRM_PFN(amdgpu_bo_free) == NULL) goto ERROR; + + DRM_PFN(amdgpu_bo_export) = (DRM_DEF(amdgpu_bo_export)*)dlsym(dtif_handle, "amdgpu_bo_export"); + if (DRM_PFN(amdgpu_bo_export) == NULL) goto ERROR; + + DRM_PFN(amdgpu_bo_import) = (DRM_DEF(amdgpu_bo_import)*)dlsym(dtif_handle, "amdgpu_bo_import"); + if (DRM_PFN(amdgpu_bo_import) == NULL) goto ERROR; + + DRM_PFN(amdgpu_bo_va_op) = (DRM_DEF(amdgpu_bo_va_op)*)dlsym(dtif_handle, "amdgpu_bo_va_op"); + if (DRM_PFN(amdgpu_bo_va_op) == NULL) goto ERROR; + + DRM_PFN(drmCommandWriteRead) = (DRM_DEF(drmCommandWriteRead)*)dlsym(dtif_handle, "drmCommandWriteRead"); + if (DRM_PFN(drmCommandWriteRead) == NULL) goto ERROR; + debug_print("Load all DTIF APIs OK!\n"); return; @@ -445,7 +472,18 @@ ERROR: HSAKMT_PFN(hsaKmtPcSamplingStop) = (HSAKMT_DEF(hsaKmtPcSamplingStop)*)(&hsaKmtPcSamplingStop); HSAKMT_PFN(hsaKmtPcSamplingSupport) = (HSAKMT_DEF(hsaKmtPcSamplingSupport)*)(&hsaKmtPcSamplingSupport); HSAKMT_PFN(hsaKmtModelEnabled) = (HSAKMT_DEF(hsaKmtModelEnabled)*)(&hsaKmtModelEnabled); + + DRM_PFN(amdgpu_device_initialize) = (DRM_DEF(amdgpu_device_initialize)*)(&amdgpu_device_initialize); + DRM_PFN(amdgpu_device_deinitialize) = (DRM_DEF(amdgpu_device_deinitialize)*)(&amdgpu_device_deinitialize); + DRM_PFN(amdgpu_query_gpu_info) = (DRM_DEF(amdgpu_query_gpu_info)*)(&amdgpu_query_gpu_info); + DRM_PFN(amdgpu_bo_cpu_map) = (DRM_DEF(amdgpu_bo_cpu_map)*)(&amdgpu_bo_cpu_map); + DRM_PFN(amdgpu_bo_free) = (DRM_DEF(amdgpu_bo_free)*)(&amdgpu_bo_free); + DRM_PFN(amdgpu_bo_export) = (DRM_DEF(amdgpu_bo_export)*)(&amdgpu_bo_export); + DRM_PFN(amdgpu_bo_import) = (DRM_DEF(amdgpu_bo_import)*)(&amdgpu_bo_import); + DRM_PFN(amdgpu_bo_va_op) = (DRM_DEF(amdgpu_bo_va_op)*)(&amdgpu_bo_va_op); + DRM_PFN(drmCommandWriteRead) = (DRM_DEF(drmCommandWriteRead)*)(&drmCommandWriteRead); } } + } // namespace core } // namespace rocr