P4 to Git Change 1599157 by gandryey@gera-ocl-lc on 2018/08/28 17:11:04

SWDEV-79445 - OCL generic changes and code clean-up
	- Add devkerenle.cpp/hpp files for device::Kernel object
	- Move generic code for the arguments setup from the device layer to the abstraction layer
	- Update ROCr and PAL paths to utilize the generic logic for the arguments setup

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/device.cpp#226 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#313 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/devkernel.cpp#1 add
... //depot/stg/opencl/drivers/opencl/runtime/device/devkernel.hpp#1 add
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpukernel.cpp#328 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpukernel.hpp#130 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palkernel.cpp#61 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palkernel.hpp#20 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rockernel.cpp#40 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rockernel.hpp#24 edit
... //depot/stg/opencl/drivers/opencl/runtime/runtimedefs#51 edit


[ROCm/clr commit: 5cfeb120ed]

projects/clr/rocclr/runtime/device/gpu/gpukernel.cpp

@@ -823,7 +823,6 @@ Kernel::Kernel(const std::string& name, const Device& gpuDev, const Program& pro
   workGroupInfo_.privateMemSize_ = hwPrivateSize_;
   // Default wavesPerSimdHint_
   workGroupInfo_.wavesPerSimdHint_ = ~0U;
-  hsa_ = false;
 }
 
 Kernel::~Kernel() {
@@ -3127,7 +3126,7 @@ HSAILKernel::HSAILKernel(std::string name, HSAILProgram* prog, std::string compi
       extraArgumentsNum_(extraArgsNum),
       waveLimiter_(this, (prog->isNull() ? 1 : dev().getAttribs().numberOfCUsperShaderArray) *
                        dev().hwInfo()->simdPerCU_) {
-  hsa_ = true;
+  flags_.hsa_ = true;
 }
 
 HSAILKernel::~HSAILKernel() {

projects/clr/rocclr/runtime/device/gpu/gpukernel.hpp

@@ -814,12 +814,6 @@ class HSAILKernel : public device::Kernel {
   //! Returns spill reg size per workitem
   int spillSegSize() const { return cpuAqlCode_->workitem_private_segment_byte_size; }
 
-  //! Returns TRUE if kernel uses dynamic parallelism
-  bool dynamicParallelism() const { return (flags_.dynamicParallelism_) ? true : false; }
-
-  //! Returns TRUE if kernel is internal kernel
-  bool isInternalKernel() const { return (flags_.internalKernel_) ? true : false; }
-
   //! Finds local workgroup size
   void findLocalWorkSize(size_t workDim,                   //!< Work dimension
                          const amd::NDRange& gblWorkSize,  //!< Global work size
@@ -895,17 +889,6 @@ class HSAILKernel : public device::Kernel {
 
   uint extraArgumentsNum_;  //! Number of extra (hidden) kernel arguments
 
-  union Flags {
-    struct {
-      uint imageEna_ : 1;            //!< Kernel uses images
-      uint imageWriteEna_ : 1;       //!< Kernel uses image writes
-      uint dynamicParallelism_ : 1;  //!< Dynamic parallelism enabled
-      uint internalKernel_ : 1;      //!< True: internal kernel
-    };
-    uint value_;
-    Flags() : value_(0) {}
-  } flags_;
-
   WaveLimiterManager waveLimiter_;  //!< adaptively control number of waves
 };