SWDEV-539145 - Simplify host memory pool management (#668)

* SWDEV-539145 - Simplify host memory pool management

Remove unnecessary variables and functions.
Make code simpler and clear.

* Change cpu_agent_info_ into pointer.

* Restore getPreferredNumaNode()
This commit is contained in:
Sang, Tao
2025-07-11 10:38:40 -04:00
committed by GitHub
parent b568971718
commit 1351cd7fa8
4 changed files with 77 additions and 99 deletions
+4 -30
View File
@@ -825,10 +825,7 @@ bool Buffer::create(bool alloc_local) {
deviceMemory_ = dev().hostAlloc(size(), 1, Device::MemorySegment::kNoAtomics);
}
} else if (memFlags & CL_MEM_FOLLOW_USER_NUMA_POLICY) {
deviceMemory_ = dev().hostNumaAlloc(size(), 1, (memFlags & CL_MEM_SVM_ATOMICS) == 0
? Device::MemorySegment::kNoAtomics :
((memFlags & ROCCLR_MEM_HSA_UNCACHED) != 0 ?
Device::MemorySegment::kUncachedAtomics : Device::MemorySegment::kAtomics));
deviceMemory_ = dev().hostNumaAlloc(size(), 1, getHostMemorySegment(memFlags));
} else if (memFlags & ROCCLR_MEM_HSA_SIGNAL_MEMORY) {
// TODO: ROCr will introduce a new attribute enum that implies a non-blocking signal,
// replace "HSA_AMD_SIGNAL_AMD_GPU_ONLY" with this new enum when it is ready.
@@ -852,10 +849,7 @@ bool Buffer::create(bool alloc_local) {
// Disable host access to force blit path for memeory writes.
flags_ &= ~HostMemoryDirectAccess;
} else {
deviceMemory_ = dev().hostAlloc(size(), 1, (memFlags & CL_MEM_SVM_ATOMICS) == 0
? Device::MemorySegment::kNoAtomics :
((memFlags & ROCCLR_MEM_HSA_UNCACHED) != 0 ?
Device::MemorySegment::kUncachedAtomics : Device::MemorySegment::kAtomics));
deviceMemory_ = dev().hostAlloc(size(), 1, getHostMemorySegment(memFlags));
}
} else {
assert(!isHostMemDirectAccess() && "Runtime doesn't support direct access to GPU memory!");
@@ -1012,28 +1006,8 @@ bool Buffer::create(bool alloc_local) {
owner()->setHostMem(deviceMemory_);
} else if (owner()->getSvmPtr() != owner()->getHostMem()) {
if (memFlags & (CL_MEM_USE_HOST_PTR | CL_MEM_ALLOC_HOST_PTR)) {
hsa_amd_memory_pool_t pool = dev().SystemSegment(); // Default
if ((memFlags & CL_MEM_SVM_ATOMICS) == 0) {
if (dev().SystemCoarseSegment().handle != 0) {
pool = dev().SystemCoarseSegment();
}
} else if ((memFlags & ROCCLR_MEM_HSA_UNCACHED) != 0) {
if (dev().SystemExtSegment().handle != 0) {
pool = dev().SystemExtSegment();
ClPrint(amd::LOG_DEBUG, amd::LOG_MEM,
"Using extended fine grained access system memory pool to lock");
}
}
hsa_agent_t hsa_agent = dev().getBackendDevice();
hsa_status_t status = hsa_amd_memory_lock_to_pool(owner()->getHostMem(),
owner()->getSize(), &hsa_agent, 1, pool, 0, &deviceMemory_);
ClPrint(amd::LOG_DEBUG, amd::LOG_MEM, "Locking to pool %p, size 0x%zx, HostPtr = %p,"
" DevPtr = %p, memFlags = 0x%xh", pool, owner()->getSize(),
owner()->getHostMem(), deviceMemory_, memFlags);
if (status != HSA_STATUS_SUCCESS) {
DevLogPrintfError("Failed to lock memory to pool, failed with hsa_status: %d \n", status);
deviceMemory_ = nullptr;
}
deviceMemory_ = dev().hostLock(owner()->getHostMem(), owner()->getSize(),
getHostMemorySegment(memFlags));
} else {
deviceMemory_ = owner()->getHostMem();
}