From 1391a75289c588b7fa524023f377fcf2802eb334 Mon Sep 17 00:00:00 2001 From: Ben Goz Date: Sun, 1 Feb 2015 14:33:33 +0200 Subject: [PATCH] Supporting new thunk spec - adding relevant memflags Signed-off-by: Ben Goz Reviewed-by: Oded Gabbay [ROCm/ROCR-Runtime commit: 25441796bdb0938b7d61f7a3d596790a32c5ac4d] --- projects/rocr-runtime/include/hsakmttypes.h | 22 +++++++++++++++++++-- projects/rocr-runtime/src/memory.c | 2 +- 2 files changed, 21 insertions(+), 3 deletions(-) diff --git a/projects/rocr-runtime/include/hsakmttypes.h b/projects/rocr-runtime/include/hsakmttypes.h index 88c145455a..d3cae8d689 100644 --- a/projects/rocr-runtime/include/hsakmttypes.h +++ b/projects/rocr-runtime/include/hsakmttypes.h @@ -420,8 +420,26 @@ typedef struct _HsaMemFlags // when setting this entry to 1. Scratch allocation may fail due to limited // resources. Application code is required to work without any allocation. // Allocation fails on any node without GPU function. - unsigned int ExecAccess : 1; - unsigned int Reserved : 21; + unsigned int AtomicAccessFull: 1; // default = 0: If set, the memory will be allocated and mapped to allow + // atomic ops processing. On AMD APU, this will use the ATC path on system + // memory, irrespective of the NonPaged flag setting (= if NonPaged is set, + // the memory is pagelocked but mapped through IOMMUv2 instead of GPUVM). + // All atomic ops must be supported on this memory. + unsigned int AtomicAccessPartial: 1; // default = 0: See above for AtomicAccessFull description, however + // focused on AMD discrete GPU that support PCIe atomics; the memory + // allocation is mapped to allow for PCIe atomics to operate on system + // memory, irrespective of NonPaged set or the presence of an ATC path + // in the system. The atomic operations supported are limited to SWAP, + // CompareAndSwap (CAS) and FetchAdd (this PCIe op allows both atomic + // increment and decrement via 2-complement arithmetic), which are the + // only atomic ops directly supported in PCI Express. + // On AMD APU, setting this flag will allocate the same type of memory + // as AtomicAccessFull, but it will be considered compatible with + // discrete GPU atomic operations access. + unsigned int ExecuteAccess: 1; // default = 0: Identifies if memory is primarily used for data or accessed + // for executable code (e.g. queue memory) by the host CPU or the device. + // Influences the page attribute setting within the allocation + unsigned int Reserved : 19; } ui32; HSAuint32 Value; }; diff --git a/projects/rocr-runtime/src/memory.c b/projects/rocr-runtime/src/memory.c index 0d42180d29..a2c1eb49b6 100644 --- a/projects/rocr-runtime/src/memory.c +++ b/projects/rocr-runtime/src/memory.c @@ -117,7 +117,7 @@ hsaKmtAllocMemory( err = posix_memalign(MemoryAddress, page_size, SizeInBytes); if (err != 0) return HSAKMT_STATUS_NO_MEMORY; - if (MemFlags.ui32.ExecAccess) { + if (MemFlags.ui32.ExecuteAccess) { err = mprotect(*MemoryAddress, SizeInBytes, PROT_READ | PROT_WRITE | PROT_EXEC); if (err != 0) { free(*MemoryAddress);