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Fixed Hawaii link issues

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1. Split hip_ir.ll to hip_hc.ll and hip_hc_gfx803.ll
 a. hip_hc.ll contains arch generic ir implementations
 b. hip_hc_gfx803.ll contains gfx803 (fiji, polaris) specific ir
2. HIPCC can now parse --amdgpu-target=*.
 a. Usage: hipcc --amdgpu-target=gfx803 --amdgpu-target=gfx701
 b. TODO: Convert to --amdgpu-target=gfx803,gfx701
3. With LLC in HCC able to generate native f16 isa, removed inline half asm math ops
4. Fixed threadfence and threadfence_block to use functions in rocdl

Change-Id: Ic9a9e3e04139b0d75d2c2a263c030ca77adc1019


[ROCm/clr commit: 60ec83c683]
This commit is contained in:
Aditya Atluri
2017-02-08 12:04:05 -06:00
parent 2cef50ac30
commit 14dcdff8f4
7 changed files with 134 additions and 160 deletions
Download Patch File Download Diff File Expand all files Collapse all files
projects/clr/hipamd/include/hip/hcc_detail/hip_fp16.h
+14 -59
View File
@@ -39,16 +39,16 @@ typedef struct __attribute__((aligned(4))){
/*
Half Arithmetic Functions
*/
__device__ static __half __hadd(const __half a, const __half b);
__device__ static __half __hadd_sat(__half a, __half b);
__device__ static __half __hfma(__half a, __half b, __half c);
__device__ static __half __hfma_sat(__half a, __half b, __half c);
__device__ static __half __hmul(__half a, __half b);
__device__ static __half __hmul_sat(__half a, __half b);
__device__ static __half __hneg(__half a);
__device__ static __half __hsub(__half a, __half b);
__device__ static __half __hsub_sat(__half a, __half b);
__device__ static __half hdiv(__half a, __half b);
__device__ __half __hadd(const __half a, const __half b);
__device__ __half __hadd_sat(__half a, __half b);
__device__ __half __hfma(__half a, __half b, __half c);
__device__ __half __hfma_sat(__half a, __half b, __half c);
__device__ __half __hmul(__half a, __half b);
__device__ __half __hmul_sat(__half a, __half b);
__device__ __half __hneg(__half a);
__device__ __half __hsub(__half a, __half b);
__device__ __half __hsub_sat(__half a, __half b);
__device__ __half hdiv(__half a, __half b);
/*
Half2 Arithmetic Functions
@@ -211,11 +211,6 @@ __device__ __half __ushort2half_ru(unsigned short int i);
__device__ __half __ushort2half_rz(unsigned short int i);
__device__ __half __ushort_as_half(const unsigned short int i);
extern "C" __half __hip_hc_ir_hadd_half(__half, __half);
extern "C" __half __hip_hc_ir_hfma_half(__half, __half, __half);
extern "C" __half __hip_hc_ir_hmul_half(__half, __half);
extern "C" __half __hip_hc_ir_hsub_half(__half, __half);
extern "C" int __hip_hc_ir_hadd2_int(int, int);
extern "C" int __hip_hc_ir_hfma2_int(int, int, int);
extern "C" int __hip_hc_ir_hmul2_int(int, int);
@@ -244,46 +239,6 @@ extern "C" int __hip_hc_ir_h2sin_int(int);
extern "C" int __hip_hc_ir_h2sqrt_int(int);
extern "C" int __hip_hc_ir_h2trunc_int(int);
__device__ static inline __half __hadd(const __half a, const __half b) {
return __hip_hc_ir_hadd_half(a, b);
}
__device__ static inline __half __hadd_sat(__half a, __half b) {
return __hip_hc_ir_hadd_half(a, b);
}
__device__ static inline __half __hfma(__half a, __half b, __half c) {
return __hip_hc_ir_hfma_half(a, b, c);
}
__device__ static inline __half __hfma_sat(__half a, __half b, __half c) {
return __hip_hc_ir_hfma_half(a, b, c);
}
__device__ static inline __half __hmul(__half a, __half b) {
return __hip_hc_ir_hmul_half(a, b);
}
__device__ static inline __half __hmul_sat(__half a, __half b) {
return __hip_hc_ir_hmul_half(a, b);
}
__device__ static inline __half __hneg(__half a) {
return -a;
}
__device__ static inline __half __hsub(__half a, __half b) {
return __hip_hc_ir_hsub_half(a, b);
}
__device__ static inline __half __hsub_sat(__half a, __half b) {
return __hip_hc_ir_hsub_half(a, b);
}
__device__ static inline __half hdiv(__half a, __half b) {
return a/b;
}
/*
Half2 Arithmetic Functions
*/
@@ -360,11 +315,11 @@ __device__ static inline __half hcos(const __half h) {
}
__device__ static inline __half hexp(const __half h) {
return __hip_hc_ir_hexp2_half(__hip_hc_ir_hmul_half(h, 1.442694));
return __hip_hc_ir_hexp2_half(__hmul(h, 1.442694));
}
__device__ static inline __half hexp10(const __half h) {
return __hip_hc_ir_hexp2_half(__hip_hc_ir_hmul_half(h, 3.3219281));
return __hip_hc_ir_hexp2_half(__hmul(h, 3.3219281));
}
__device__ static inline __half hexp2(const __half h) {
@@ -376,11 +331,11 @@ __device__ static inline __half hfloor(const __half h) {
}
__device__ static inline __half hlog(const __half h) {
return __hip_hc_ir_hmul_half(__hip_hc_ir_hlog2_half(h), 0.693147);
return __hmul(__hip_hc_ir_hlog2_half(h), 0.693147);
}
__device__ static inline __half hlog10(const __half h) {
return __hip_hc_ir_hmul_half(__hip_hc_ir_hlog2_half(h), 0.301029);
return __hmul(__hip_hc_ir_hlog2_half(h), 0.301029);
}
__device__ static inline __half hlog2(const __half h) {
projects/clr/hipamd/include/hip/hcc_detail/hip_runtime.h
+10 -2
View File
@@ -277,6 +277,10 @@ __device__ __attribute__((address_space(3))) void* __get_dynamicgroupbaseptr();
* On AMD platforms, the threadfence* routines are currently empty stubs.
*/
extern __attribute__((const)) __device__ void __hip_hc_threadfence() __asm("__llvm_fence_sc_dev");
extern __attribute__((const)) __device__ void __hip_hc_threadfence_block() __asm("__llvm_fence_sc_wg");
/**
* @brief threadfence_block makes writes visible to threads running in same block.
*
@@ -287,7 +291,9 @@ __device__ __attribute__((address_space(3))) void* __get_dynamicgroupbaseptr();
* @warning __threadfence_block is a stub and map to no-op.
*/
// __device__ void __threadfence_block(void);
extern "C" __device__ void __threadfence_block(void);
__device__ static inline void __threadfence_block(void) {
return __hip_hc_threadfence_block();
}
/**
* @brief threadfence makes wirtes visible to other threads running on same GPU.
@@ -299,7 +305,9 @@ extern "C" __device__ void __threadfence_block(void);
* @warning __threadfence is a stub and map to no-op, application should set "export HSA_DISABLE_CACHE=1" to disable both L1 and L2 caches.
*/
// __device__ void __threadfence(void) __attribute__((deprecated("Provided for compile-time compatibility, not yet functional")));
extern "C" __device__ void __threadfence(void);
__device__ static inline void __threadfence(void) {
return __hip_hc_threadfence();
}
/**
* @brief threadfence_system makes writes to pinned system memory visible on host CPU.