From 1fc7f2dec7ffafbe535732e9d5f64a3a56c0fcce Mon Sep 17 00:00:00 2001 From: Sean Keely Date: Thu, 30 Apr 2020 00:18:36 -0500 Subject: [PATCH] Move Images code to hsa-runtime folder Change-Id: I53c1845d985ac3e9708d952865009c0021f3bb4f [ROCm/ROCR-Runtime commit: 7e3db20826bf1bb65d3c85c171b275cadbd561c0] --- .../runtime/cmake_modules/hsa_common.cmake | 4 +- .../runtime/hsa-ext-image/CMakeLists.txt | 92 +- .../hsa-runtime/cmake_modules/utils.cmake | 12 + .../runtime/hsa-runtime/image/Makefile.image | 63 + .../image/addrlib/inc/addrinterface.h | 3721 ++++ .../hsa-runtime/image/addrlib/inc/addrtypes.h | 754 + .../image/addrlib/src/addrinterface.cpp | 1740 ++ .../image/addrlib/src/amdgpu_asic_addr.h | 148 + .../addrlib/src/chip/gfx10/gfx10_gb_reg.h | 61 + .../image/addrlib/src/chip/gfx9/gfx9_gb_reg.h | 79 + .../image/addrlib/src/chip/r800/si_gb_reg.h | 154 + .../image/addrlib/src/core/addrcommon.h | 948 + .../image/addrlib/src/core/addrelemlib.cpp | 1830 ++ .../image/addrlib/src/core/addrelemlib.h | 279 + .../image/addrlib/src/core/addrlib.cpp | 660 + .../image/addrlib/src/core/addrlib.h | 415 + .../image/addrlib/src/core/addrlib1.cpp | 4061 ++++ .../image/addrlib/src/core/addrlib1.h | 544 + .../image/addrlib/src/core/addrlib2.cpp | 1985 ++ .../image/addrlib/src/core/addrlib2.h | 868 + .../image/addrlib/src/core/addrobject.cpp | 237 + .../image/addrlib/src/core/addrobject.h | 95 + .../image/addrlib/src/core/coord.cpp | 715 + .../image/addrlib/src/core/coord.h | 122 + .../addrlib/src/gfx10/gfx10SwizzlePattern.h | 6119 ++++++ .../image/addrlib/src/gfx10/gfx10addrlib.cpp | 4327 +++++ .../image/addrlib/src/gfx10/gfx10addrlib.h | 583 + .../image/addrlib/src/gfx9/gfx9addrlib.cpp | 5076 +++++ .../image/addrlib/src/gfx9/gfx9addrlib.h | 640 + .../image/addrlib/src/r800/ciaddrlib.cpp | 2339 +++ .../image/addrlib/src/r800/ciaddrlib.h | 205 + .../image/addrlib/src/r800/egbaddrlib.cpp | 4153 +++++ .../image/addrlib/src/r800/egbaddrlib.h | 430 + .../image/addrlib/src/r800/siaddrlib.cpp | 3873 ++++ .../image/addrlib/src/r800/siaddrlib.h | 346 + .../hsa-runtime/image/addrlib/util/macros.h | 328 + .../runtime/hsa-runtime/image/amd_ext.cpp | 29 + .../runtime/hsa-runtime/image/blit_kernel.cpp | 975 + .../runtime/hsa-runtime/image/blit_kernel.h | 123 + .../hsa-runtime/image/blit_kernel_cl.cl | 448 + .../hsa-runtime/image/blit_object_gfx7xx.cpp | 2 + .../hsa-runtime/image/blit_object_gfx8xx.cpp | 2 + .../hsa-runtime/image/blit_object_gfx9xx.cpp | 2 + .../hsa-runtime/image/blit_src/CMakeLists.txt | 209 + .../hsa-runtime/image/blit_src/README.md | 61 + .../image/blit_src/create_hsaco_ascii_file.sh | 32 + .../image/blit_src/imageblit_kernels.cl | 615 + .../runtime/hsa-runtime/image/device_info.cpp | 181 + .../runtime/hsa-runtime/image/device_info.h | 39 + .../hsa-runtime/image/hsa_ext_image.cpp | 310 + .../runtime/hsa-runtime/image/image.so.def | 22 + .../runtime/hsa-runtime/image/image_lut.h | 37 + .../hsa-runtime/image/image_lut_kv.cpp | 396 + .../runtime/hsa-runtime/image/image_lut_kv.h | 50 + .../hsa-runtime/image/image_manager.cpp | 688 + .../runtime/hsa-runtime/image/image_manager.h | 98 + .../hsa-runtime/image/image_manager_ai.cpp | 554 + .../hsa-runtime/image/image_manager_ai.h | 50 + .../hsa-runtime/image/image_manager_kv.cpp | 966 + .../hsa-runtime/image/image_manager_kv.h | 125 + .../hsa-runtime/image/image_manager_nv.cpp | 746 + .../hsa-runtime/image/image_manager_nv.h | 53 + .../hsa-runtime/image/image_runtime.cpp | 543 + .../runtime/hsa-runtime/image/image_runtime.h | 147 + .../image/opencl_blit_objects.cpp_TC | 15466 ++++++++++++++++ .../runtime/hsa-runtime/image/resource.h | 155 + .../runtime/hsa-runtime/image/resource_ai.h | 1120 ++ .../runtime/hsa-runtime/image/resource_kv.h | 463 + .../runtime/hsa-runtime/image/resource_nv.h | 834 + .../runtime/hsa-runtime/image/util.h | 213 + 70 files changed, 73713 insertions(+), 47 deletions(-) create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/Makefile.image create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/inc/addrinterface.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/inc/addrtypes.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/addrinterface.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/gfx10/gfx10_gb_reg.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/gfx9/gfx9_gb_reg.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/r800/si_gb_reg.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrcommon.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrobject.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrobject.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/coord.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/coord.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10SwizzlePattern.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/util/macros.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/amd_ext.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel_cl.cl create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/blit_object_gfx7xx.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/blit_object_gfx8xx.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/blit_object_gfx9xx.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/CMakeLists.txt create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/README.md create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/create_hsaco_ascii_file.sh create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/imageblit_kernels.cl create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/device_info.cpp create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/device_info.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/hsa_ext_image.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/image.so.def create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/image_lut.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/image_lut_kv.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/image_lut_kv.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/image_manager.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/image_manager.h create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_ai.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_ai.h create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_kv.cpp create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_kv.h create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_nv.cpp create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_nv.h create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/image_runtime.cpp create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/image_runtime.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/opencl_blit_objects.cpp_TC create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/resource.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/resource_ai.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/resource_kv.h create mode 100755 projects/rocr-runtime/runtime/hsa-runtime/image/resource_nv.h create mode 100644 projects/rocr-runtime/runtime/hsa-runtime/image/util.h diff --git a/projects/rocr-runtime/runtime/cmake_modules/hsa_common.cmake b/projects/rocr-runtime/runtime/cmake_modules/hsa_common.cmake index f9a2a9e9c2..50e38fc5c8 100644 --- a/projects/rocr-runtime/runtime/cmake_modules/hsa_common.cmake +++ b/projects/rocr-runtime/runtime/cmake_modules/hsa_common.cmake @@ -55,7 +55,9 @@ if(UNIX) set(PS ":") set(CMAKE_CXX_FLAGS "-Wall -std=c++11 ${EXTRA_CFLAGS}") set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fpic") + if (CMAKE_COMPILER_IS_GNUCXX) set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wl,--unresolved-symbols=ignore-in-shared-libs") + endif () set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fno-strict-aliasing") if ( CMAKE_SYSTEM_PROCESSOR STREQUAL "x86_64" ) set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -m64 -msse -msse2" ) @@ -63,7 +65,7 @@ if(UNIX) set ( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -m32" ) endif () if ( "${CMAKE_BUILD_TYPE}" STREQUAL Debug ) - set ( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -ggdb" ) + set ( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -O0 -ggdb" ) endif () add_definitions(-D __STDC_LIMIT_MACROS) add_definitions(-D __STDC_CONSTANT_MACROS) diff --git a/projects/rocr-runtime/runtime/hsa-ext-image/CMakeLists.txt b/projects/rocr-runtime/runtime/hsa-ext-image/CMakeLists.txt index 92be324748..30b642083c 100755 --- a/projects/rocr-runtime/runtime/hsa-ext-image/CMakeLists.txt +++ b/projects/rocr-runtime/runtime/hsa-ext-image/CMakeLists.txt @@ -18,7 +18,7 @@ if (ROCM_CCACHE_BUILD) endif() # if (ROCM_CCACHE_BUILD) ## Include the cmake_modules utils.cmake -list ( APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../cmake_modules" ) +list ( APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../hsa-runtime/cmake_modules" ) include ( utils ) ## Compiler preproc definitions. @@ -59,12 +59,12 @@ include_directories( ${HSA_INC_PATH} ) link_directories( ${HSA_LIB_PATH} ) ## Find self -if( "${EXT_SOURCE_DIR}" STREQUAL "" ) - get_include_path( EXT_SOURCE_FILE null NAMES "image/image_runtime.h" HINTS "${CMAKE_CURRENT_SOURCE_DIR}" "${CMAKE_CURRENT_SOURCE_DIR}/../../ext/" ) - get_filename_component( EXT_SOURCE_DIR "${EXT_SOURCE_FILE}/.." ABSOLUTE ) - unset( EXT_SOURCE_FILE CACHE ) +if( "${IMAGE_SOURCE_DIR}" STREQUAL "" ) + get_include_path( IMG_SOURCE_FILE null NAMES "image_runtime.h" HINTS "${CMAKE_CURRENT_SOURCE_DIR}" "${CMAKE_CURRENT_SOURCE_DIR}/../hsa-runtime/image/" ) + get_filename_component( IMAGE_SOURCE_DIR "${IMG_SOURCE_FILE}" ABSOLUTE ) + unset( IMG_SOURCE_FILE CACHE ) endif() -set( EXT_SOURCE_DIR ${EXT_SOURCE_DIR} CACHE PATH "Image lib source dir" FORCE ) +set( IMAGE_SOURCE_DIR ${IMAGE_SOURCE_DIR} CACHE PATH "Image lib source dir" FORCE ) get_filename_component( OPEN_SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/.." ABSOLUTE CACHE ) set( OPEN_SOURCE_DIR ${OPEN_SOURCE_DIR} CACHE PATH "Open source root dir" FORCE ) @@ -87,58 +87,58 @@ if ( "${CMAKE_BUILD_TYPE}" STREQUAL Debug ) set( CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -ggdb" ) endif () -set ( DRVDEF "${EXT_SOURCE_DIR}/make/image.so.def" ) +set ( DRVDEF "${IMAGE_SOURCE_DIR}/image.so.def" ) set ( CMAKE_SHARED_LINKER_FLAGS "-Wl,-Bdynamic -Wl,-z,noexecstack -Wl,--version-script=${DRVDEF} -Wl,--enable-new-dtags" ) ## Library path(s). -include_directories(${EXT_SOURCE_DIR}/..) +include_directories(${IMAGE_SOURCE_DIR}/) include_directories(${OPEN_SOURCE_DIR}/hsa-runtime) include_directories(${OPEN_SOURCE_DIR}/hsa-runtime/inc) include_directories(${OPEN_SOURCE_DIR}/hsa-runtime/core/inc) -include_directories(${EXT_SOURCE_DIR}/image/addrlib) -include_directories(${EXT_SOURCE_DIR}/image/addrlib/inc) -include_directories(${EXT_SOURCE_DIR}/image/addrlib/src) -include_directories(${EXT_SOURCE_DIR}/image/addrlib/src/core) -include_directories(${EXT_SOURCE_DIR}/image/addrlib/src/r800) -include_directories(${EXT_SOURCE_DIR}/image/addrlib/src/gfx9) -include_directories(${EXT_SOURCE_DIR}/image/addrlib/src/gfx10) -include_directories(${EXT_SOURCE_DIR}/image/addrlib/src/chip/r800) -include_directories(${EXT_SOURCE_DIR}/image/addrlib/src/chip/gfx9) -include_directories(${EXT_SOURCE_DIR}/image/addrlib/src/chip/gfx10) +include_directories(${IMAGE_SOURCE_DIR}/addrlib) +include_directories(${IMAGE_SOURCE_DIR}/addrlib/inc) +include_directories(${IMAGE_SOURCE_DIR}/addrlib/src) +include_directories(${IMAGE_SOURCE_DIR}/addrlib/src/core) +include_directories(${IMAGE_SOURCE_DIR}/addrlib/src/r800) +include_directories(${IMAGE_SOURCE_DIR}/addrlib/src/gfx9) +include_directories(${IMAGE_SOURCE_DIR}/addrlib/src/gfx10) +include_directories(${IMAGE_SOURCE_DIR}/addrlib/src/chip/r800) +include_directories(${IMAGE_SOURCE_DIR}/addrlib/src/chip/gfx9) +include_directories(${IMAGE_SOURCE_DIR}/addrlib/src/chip/gfx10) -set ( IMAGE_SRCS ${EXT_SOURCE_DIR}/image/addrlib/src/addrinterface.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/core/coord.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/core/addrlib.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/core/addrlib1.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/core/addrlib2.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/core/addrobject.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/core/addrelemlib.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/r800/ciaddrlib.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/r800/egbaddrlib.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/r800/siaddrlib.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/gfx9/gfx9addrlib.cpp - ${EXT_SOURCE_DIR}/image/addrlib/src/gfx10/gfx10addrlib.cpp - ${EXT_SOURCE_DIR}/image/amd_ext.cpp - ${EXT_SOURCE_DIR}/image/device_info.cpp - ${EXT_SOURCE_DIR}/image/hsa_ext_image.cpp - ${EXT_SOURCE_DIR}/image/image_runtime.cpp - ${EXT_SOURCE_DIR}/image/image_manager.cpp - ${EXT_SOURCE_DIR}/image/image_manager_kv.cpp - ${EXT_SOURCE_DIR}/image/image_manager_ai.cpp - ${EXT_SOURCE_DIR}/image/image_manager_nv.cpp - ${EXT_SOURCE_DIR}/image/image_lut_kv.cpp - ${EXT_SOURCE_DIR}/image/blit_object_gfx7xx.cpp - ${EXT_SOURCE_DIR}/image/blit_object_gfx8xx.cpp - ${EXT_SOURCE_DIR}/image/blit_object_gfx9xx.cpp - ${EXT_SOURCE_DIR}/image/opencl_blit_objects.cpp - ${EXT_SOURCE_DIR}/image/blit_kernel.cpp +set ( IMAGE_SRCS ${IMAGE_SOURCE_DIR}/addrlib/src/addrinterface.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/core/coord.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/core/addrlib.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/core/addrlib1.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/core/addrlib2.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/core/addrobject.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/core/addrelemlib.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/r800/ciaddrlib.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/r800/egbaddrlib.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/r800/siaddrlib.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/gfx9/gfx9addrlib.cpp + ${IMAGE_SOURCE_DIR}/addrlib/src/gfx10/gfx10addrlib.cpp + ${IMAGE_SOURCE_DIR}/amd_ext.cpp + ${IMAGE_SOURCE_DIR}/device_info.cpp + ${IMAGE_SOURCE_DIR}/hsa_ext_image.cpp + ${IMAGE_SOURCE_DIR}/image_runtime.cpp + ${IMAGE_SOURCE_DIR}/image_manager.cpp + ${IMAGE_SOURCE_DIR}/image_manager_kv.cpp + ${IMAGE_SOURCE_DIR}/image_manager_ai.cpp + ${IMAGE_SOURCE_DIR}/image_manager_nv.cpp + ${IMAGE_SOURCE_DIR}/image_lut_kv.cpp + ${IMAGE_SOURCE_DIR}/blit_object_gfx7xx.cpp + ${IMAGE_SOURCE_DIR}/blit_object_gfx8xx.cpp + ${IMAGE_SOURCE_DIR}/blit_object_gfx9xx.cpp + ${IMAGE_SOURCE_DIR}/opencl_blit_objects.cpp + ${IMAGE_SOURCE_DIR}/blit_kernel.cpp ${OPEN_SOURCE_DIR}/hsa-runtime/core/common/shared.cpp ${OPEN_SOURCE_DIR}/hsa-runtime/core/common/hsa_table_interface.cpp ) -add_subdirectory(${EXT_SOURCE_DIR}/image/blit_src ${CMAKE_BINARY_DIR}/image_blit) -set_source_files_properties(${EXT_SOURCE_DIR}/image/opencl_blit_objects.cpp PROPERTIES GENERATED 1) +add_subdirectory(${IMAGE_SOURCE_DIR}/blit_src ${CMAKE_CURRENT_BINARY_DIR}/image_blit) +set_source_files_properties(${IMAGE_SOURCE_DIR}/opencl_blit_objects.cpp PROPERTIES GENERATED 1) add_library ( ${IMAGE_TARGET} SHARED ${IMAGE_SRCS} ) add_dependencies( ${IMAGE_TARGET} opencl_blit_objects.cpp ) diff --git a/projects/rocr-runtime/runtime/hsa-runtime/cmake_modules/utils.cmake b/projects/rocr-runtime/runtime/hsa-runtime/cmake_modules/utils.cmake index 77e4411312..415e2d757f 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/cmake_modules/utils.cmake +++ b/projects/rocr-runtime/runtime/hsa-runtime/cmake_modules/utils.cmake @@ -205,3 +205,15 @@ function ( get_version DEFAULT_VERSION_STRING ) #message("${VERSION_JOB}") endfunction() + +## Collects subdirectory names and returns them in a list +function ( listsubdirs DIRPATH SUBDIRECTORIES ) + file( GLOB CONTENTS RELATIVE ${DIRPATH} "${DIRPATH}/*" ) + set ( FOLDERS, "" ) + foreach( ITEM IN LISTS CONTENTS) + if( IS_DIRECTORY "${DIRPATH}/${ITEM}" ) + list( APPEND FOLDERS ${ITEM} ) + endif() + endforeach() + set (${SUBDIRECTORIES} ${FOLDERS} PARENT_SCOPE) +endfunction() diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/Makefile.image b/projects/rocr-runtime/runtime/hsa-runtime/image/Makefile.image new file mode 100644 index 0000000000..963dc0c056 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/Makefile.image @@ -0,0 +1,63 @@ +include $(EXT_DEPTH)/make/extdefs + +include $(EXT_DEPTH)/make/Makefile.$(EXT_OS_PLATFORM).ext + +LCXXINCS += -I$(EXT_DEPTH)/.. \ + -I$(RUNTIME_SRC_TOP) \ + -I$(DEPTH)/drivers/inc/asic_reg \ + -I$(EXT_DEPTH)/image/addrlib \ + -I$(EXT_DEPTH)/image/addrlib/core \ + -I$(EXT_DEPTH)/image/addrlib/inc \ + -I$(EXT_DEPTH)/image/addrlib/inc/chip \ + -I$(EXT_DEPTH)/image/addrlib/inc/chip/r800 \ + -I$(EXT_DEPTH)/image/addrlib/r800 \ + -I$(EXT_DEPTH)/image/addrlib/r800/chip \ + -I$(EXT_DEPTH)/image/addrlib/inc/chip/gfx9 \ + -I$(EXT_DEPTH)/image/addrlib/gfx9 \ + -I$(EXT_DEPTH)/image/addrlib/gfx9/chip \ + -I$(SCLIB_DEPTH)/Interface \ + -I$(DEPTH)/drivers/hsathk/include \ + -DBRAHMA_BUILD=1 + + +CPPFILES = addrinterface.cpp \ + addrelemlib.cpp \ + addrlib.cpp \ + addrlib1.cpp \ + addrlib2.cpp \ + addrobject.cpp \ + ciaddrlib.cpp \ + egbaddrlib.cpp \ + siaddrlib.cpp \ + hsa_ext_image.cpp \ + image_runtime.cpp \ + image_manager.cpp \ + image_manager_kv.cpp \ + image_manager_ai.cpp \ + image_lut_kv.cpp \ + blit_kernel.cpp \ + coord.cpp \ + gfx9addrlib.cpp \ + rbmap.cpp \ + blit_object_gfx7xx.cpp \ + blit_object_gfx8xx.cpp \ + blit_object_gfx9xx.cpp \ + opencl_blit_objects.cpp \ + +EXT_IMGDIR = $(EXT_DEPTH)/image +$(EXT_IMGDIR)/opencl_blit_objects.cpp: $(EXT_IMGDIR)/opencl_blit_objects.cpp_TC + cp -f $< $@ + +LLOPTS += -L "$(DEPTH)/drivers/hsathk/build/$(EXT_OS_BUILD)/B_$(BUILD_TYPE)" -lhsakmt + +LIB_TARGET = image + +EXT_SRCDIR = $(EXT_DEPTH)/image \ + $(EXT_DEPTH)/image/addrlib \ + $(EXT_DEPTH)/image/addrlib/core \ + $(EXT_DEPTH)/image/addrlib/r800 \ + $(EXT_DEPTH)/image/addrlib/gfx9 + +SRCPATH = $(EXT_SRCDIR) + +include $(EXT_DEPTH)/make/extrules diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/inc/addrinterface.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/inc/addrinterface.h new file mode 100644 index 0000000000..5fb3c46e48 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/inc/addrinterface.h @@ -0,0 +1,3721 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrinterface.h +* @brief Contains the addrlib interfaces declaration and parameter defines +**************************************************************************************************** +*/ +#ifndef __ADDR_INTERFACE_H__ +#define __ADDR_INTERFACE_H__ + +#include "addrtypes.h" + +#if defined(__cplusplus) +extern "C" +{ +#endif + +#define ADDRLIB_VERSION_MAJOR 6 +#define ADDRLIB_VERSION_MINOR 2 +#define ADDRLIB_VERSION ((ADDRLIB_VERSION_MAJOR << 16) | ADDRLIB_VERSION_MINOR) + +/// Virtually all interface functions need ADDR_HANDLE as first parameter +typedef VOID* ADDR_HANDLE; + +/// Client handle used in callbacks +typedef VOID* ADDR_CLIENT_HANDLE; + +/** +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // Callback functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)( +* const ADDR_ALLOCSYSMEM_INPUT* pInput); +* typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)( +* VOID* pVirtAddr); +* typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)( +* const ADDR_DEBUGPRINT_INPUT* pInput); +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // Create/Destroy/Config functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrCreate() +* AddrDestroy() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // Surface functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrComputeSurfaceInfo() +* AddrComputeSurfaceAddrFromCoord() +* AddrComputeSurfaceCoordFromAddr() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // HTile functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrComputeHtileInfo() +* AddrComputeHtileAddrFromCoord() +* AddrComputeHtileCoordFromAddr() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // C-mask functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrComputeCmaskInfo() +* AddrComputeCmaskAddrFromCoord() +* AddrComputeCmaskCoordFromAddr() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // F-mask functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrComputeFmaskInfo() +* AddrComputeFmaskAddrFromCoord() +* AddrComputeFmaskCoordFromAddr() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // Element/Utility functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* ElemFlt32ToDepthPixel() +* ElemFlt32ToColorPixel() +* AddrExtractBankPipeSwizzle() +* AddrCombineBankPipeSwizzle() +* AddrComputeSliceSwizzle() +* AddrConvertTileInfoToHW() +* AddrConvertTileIndex() +* AddrConvertTileIndex1() +* AddrGetTileIndex() +* AddrComputeBaseSwizzle() +* AddrUseTileIndex() +* AddrUseCombinedSwizzle() +* +**/ + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Callback functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* @brief channel setting structure +**************************************************************************************************** +*/ +typedef union _ADDR_CHANNEL_SETTING +{ + struct + { + UINT_8 valid : 1; ///< Indicate whehter this channel setting is valid + UINT_8 channel : 2; ///< 0 for x channel, 1 for y channel, 2 for z channel + UINT_8 index : 5; ///< Channel index + }; + UINT_8 value; ///< Value +} ADDR_CHANNEL_SETTING; + +/** +**************************************************************************************************** +* @brief address equation key structure +**************************************************************************************************** +*/ +typedef union _ADDR_EQUATION_KEY +{ + struct + { + UINT_32 log2ElementBytes : 3; ///< Log2 of Bytes per pixel + UINT_32 tileMode : 5; ///< Tile mode + UINT_32 microTileType : 3; ///< Micro tile type + UINT_32 pipeConfig : 5; ///< pipe config + UINT_32 numBanksLog2 : 3; ///< Number of banks log2 + UINT_32 bankWidth : 4; ///< Bank width + UINT_32 bankHeight : 4; ///< Bank height + UINT_32 macroAspectRatio : 3; ///< Macro tile aspect ratio + UINT_32 prt : 1; ///< SI only, indicate whether this equation is for prt + UINT_32 reserved : 1; ///< Reserved bit + } fields; + UINT_32 value; +} ADDR_EQUATION_KEY; + +/** +**************************************************************************************************** +* @brief address equation structure +**************************************************************************************************** +*/ +#define ADDR_MAX_EQUATION_BIT 20u + +// Invalid equation index +#define ADDR_INVALID_EQUATION_INDEX 0xFFFFFFFF + +typedef struct _ADDR_EQUATION +{ + ADDR_CHANNEL_SETTING addr[ADDR_MAX_EQUATION_BIT]; ///< addr setting + ///< each bit is result of addr ^ xor ^ xor2 + ADDR_CHANNEL_SETTING xor1[ADDR_MAX_EQUATION_BIT]; ///< xor setting + ADDR_CHANNEL_SETTING xor2[ADDR_MAX_EQUATION_BIT]; ///< xor2 setting + UINT_32 numBits; ///< The number of bits in equation + BOOL_32 stackedDepthSlices; ///< TRUE if depth slices are treated as being + ///< stacked vertically prior to swizzling +} ADDR_EQUATION; + +/** +**************************************************************************************************** +* @brief Alloc system memory flags. +* @note These flags are reserved for future use and if flags are added will minimize the impact +* of the client. +**************************************************************************************************** +*/ +typedef union _ADDR_ALLOCSYSMEM_FLAGS +{ + struct + { + UINT_32 reserved : 32; ///< Reserved for future use. + } fields; + UINT_32 value; + +} ADDR_ALLOCSYSMEM_FLAGS; + +/** +**************************************************************************************************** +* @brief Alloc system memory input structure +**************************************************************************************************** +*/ +typedef struct _ADDR_ALLOCSYSMEM_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_ALLOCSYSMEM_FLAGS flags; ///< System memory flags. + UINT_32 sizeInBytes; ///< System memory allocation size in bytes. + ADDR_CLIENT_HANDLE hClient; ///< Client handle +} ADDR_ALLOCSYSMEM_INPUT; + +/** +**************************************************************************************************** +* ADDR_ALLOCSYSMEM +* @brief +* Allocate system memory callback function. Returns valid pointer on success. +**************************************************************************************************** +*/ +typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)( + const ADDR_ALLOCSYSMEM_INPUT* pInput); + +/** +**************************************************************************************************** +* @brief Free system memory input structure +**************************************************************************************************** +*/ +typedef struct _ADDR_FREESYSMEM_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + VOID* pVirtAddr; ///< Virtual address + ADDR_CLIENT_HANDLE hClient; ///< Client handle +} ADDR_FREESYSMEM_INPUT; + +/** +**************************************************************************************************** +* ADDR_FREESYSMEM +* @brief +* Free system memory callback function. +* Returns ADDR_OK on success. +**************************************************************************************************** +*/ +typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)( + const ADDR_FREESYSMEM_INPUT* pInput); + +/** +**************************************************************************************************** +* @brief Print debug message input structure +**************************************************************************************************** +*/ +typedef struct _ADDR_DEBUGPRINT_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + CHAR* pDebugString; ///< Debug print string + va_list ap; ///< Variable argument list + ADDR_CLIENT_HANDLE hClient; ///< Client handle +} ADDR_DEBUGPRINT_INPUT; + +/** +**************************************************************************************************** +* ADDR_DEBUGPRINT +* @brief +* Print debug message callback function. +* Returns ADDR_OK on success. +**************************************************************************************************** +*/ +typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)( + const ADDR_DEBUGPRINT_INPUT* pInput); + +/** +**************************************************************************************************** +* ADDR_CALLBACKS +* +* @brief +* Address Library needs client to provide system memory alloc/free routines. +**************************************************************************************************** +*/ +typedef struct _ADDR_CALLBACKS +{ + ADDR_ALLOCSYSMEM allocSysMem; ///< Routine to allocate system memory + ADDR_FREESYSMEM freeSysMem; ///< Routine to free system memory + ADDR_DEBUGPRINT debugPrint; ///< Routine to print debug message +} ADDR_CALLBACKS; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Create/Destroy functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* ADDR_CREATE_FLAGS +* +* @brief +* This structure is used to pass some setup in creation of AddrLib +* @note +**************************************************************************************************** +*/ +typedef union _ADDR_CREATE_FLAGS +{ + struct + { + UINT_32 noCubeMipSlicesPad : 1; ///< Turn cubemap faces padding off + UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and + /// output structure + UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid + UINT_32 useCombinedSwizzle : 1; ///< Use combined tile swizzle + UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level + UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment + UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize + UINT_32 forceDccAndTcCompat : 1; ///< Force enable DCC and TC compatibility + UINT_32 nonPower2MemConfig : 1; ///< Physical video memory size is not power of 2 + UINT_32 reserved : 23; ///< Reserved bits for future use + }; + + UINT_32 value; +} ADDR_CREATE_FLAGS; + +/** +**************************************************************************************************** +* ADDR_REGISTER_VALUE +* +* @brief +* Data from registers to setup AddrLib global data, used in AddrCreate +**************************************************************************************************** +*/ +typedef struct _ADDR_REGISTER_VALUE +{ + UINT_32 gbAddrConfig; ///< For R8xx, use GB_ADDR_CONFIG register value. + /// For R6xx/R7xx, use GB_TILING_CONFIG. + /// But they can be treated as the same. + /// if this value is 0, use chip to set default value + UINT_32 backendDisables; ///< 1 bit per backend, starting with LSB. 1=disabled,0=enabled. + /// Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE + + /// R800 registers----------------------------------------------- + UINT_32 noOfBanks; ///< Number of h/w ram banks - For r800: MC_ARB_RAMCFG.NOOFBANK + /// No enums for this value in h/w header files + /// 0: 4 + /// 1: 8 + /// 2: 16 + UINT_32 noOfRanks; /// MC_ARB_RAMCFG.NOOFRANK + /// 0: 1 + /// 1: 2 + /// SI (R1000) registers----------------------------------------- + const UINT_32* pTileConfig; ///< Global tile setting tables + UINT_32 noOfEntries; ///< Number of entries in pTileConfig + + ///< CI registers------------------------------------------------- + const UINT_32* pMacroTileConfig; ///< Global macro tile mode table + UINT_32 noOfMacroEntries; ///< Number of entries in pMacroTileConfig +} ADDR_REGISTER_VALUE; + +/** +**************************************************************************************************** +* ADDR_CREATE_INPUT +* +* @brief +* Parameters use to create an AddrLib Object. Caller must provide all fields. +* +**************************************************************************************************** +*/ +typedef struct _ADDR_CREATE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 chipEngine; ///< Chip Engine + UINT_32 chipFamily; ///< Chip Family + UINT_32 chipRevision; ///< Chip Revision + ADDR_CALLBACKS callbacks; ///< Callbacks for sysmem alloc/free/print + ADDR_CREATE_FLAGS createFlags; ///< Flags to setup AddrLib + ADDR_REGISTER_VALUE regValue; ///< Data from registers to setup AddrLib global data + ADDR_CLIENT_HANDLE hClient; ///< Client handle + UINT_32 minPitchAlignPixels; ///< Minimum pitch alignment in pixels +} ADDR_CREATE_INPUT; + +/** +**************************************************************************************************** +* ADDR_CREATEINFO_OUTPUT +* +* @brief +* Return AddrLib handle to client driver +* +**************************************************************************************************** +*/ +typedef struct _ADDR_CREATE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_HANDLE hLib; ///< Address lib handle + + UINT_32 numEquations; ///< Number of equations in the table + const ADDR_EQUATION* pEquationTable; ///< Pointer to the equation table +} ADDR_CREATE_OUTPUT; + +/** +**************************************************************************************************** +* AddrCreate +* +* @brief +* Create AddrLib object, must be called before any interface calls +* +* @return +* ADDR_OK if successful +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrCreate( + const ADDR_CREATE_INPUT* pAddrCreateIn, + ADDR_CREATE_OUTPUT* pAddrCreateOut); + +/** +**************************************************************************************************** +* AddrDestroy +* +* @brief +* Destroy AddrLib object, must be called to free internally allocated resources. +* +* @return +* ADDR_OK if successful +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrDestroy( + ADDR_HANDLE hLib); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* @brief +* Bank/tiling parameters. On function input, these can be set as desired or +* left 0 for AddrLib to calculate/default. On function output, these are the actual +* parameters used. +* @note +* Valid bankWidth/bankHeight value: +* 1,2,4,8. They are factors instead of pixels or bytes. +* +* The bank number remains constant across each row of the +* macro tile as each pipe is selected, so the number of +* tiles in the x direction with the same bank number will +* be bank_width * num_pipes. +**************************************************************************************************** +*/ +typedef struct _ADDR_TILEINFO +{ + /// Any of these parameters can be set to 0 to use the HW default. + UINT_32 banks; ///< Number of banks, numerical value + UINT_32 bankWidth; ///< Number of tiles in the X direction in the same bank + UINT_32 bankHeight; ///< Number of tiles in the Y direction in the same bank + UINT_32 macroAspectRatio; ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1 + UINT_32 tileSplitBytes; ///< Tile split size, in bytes + AddrPipeCfg pipeConfig; ///< Pipe Config = HW enum + 1 +} ADDR_TILEINFO; + +// Create a define to avoid client change. The removal of R800 is because we plan to implement SI +// within 800 HWL - An AddrPipeCfg is added in above data structure +typedef ADDR_TILEINFO ADDR_R800_TILEINFO; + +/** +**************************************************************************************************** +* @brief +* Information needed by quad buffer stereo support +**************************************************************************************************** +*/ +typedef struct _ADDR_QBSTEREOINFO +{ + UINT_32 eyeHeight; ///< Height (in pixel rows) to right eye + UINT_32 rightOffset; ///< Offset (in bytes) to right eye + UINT_32 rightSwizzle; ///< TileSwizzle for right eyes +} ADDR_QBSTEREOINFO; + +/** +**************************************************************************************************** +* ADDR_SURFACE_FLAGS +* +* @brief +* Surface flags +**************************************************************************************************** +*/ +typedef union _ADDR_SURFACE_FLAGS +{ + struct + { + UINT_32 color : 1; ///< Flag indicates this is a color buffer + UINT_32 depth : 1; ///< Flag indicates this is a depth/stencil buffer + UINT_32 stencil : 1; ///< Flag indicates this is a stencil buffer + UINT_32 texture : 1; ///< Flag indicates this is a texture + UINT_32 cube : 1; ///< Flag indicates this is a cubemap + UINT_32 volume : 1; ///< Flag indicates this is a volume texture + UINT_32 fmask : 1; ///< Flag indicates this is an fmask + UINT_32 cubeAsArray : 1; ///< Flag indicates if treat cubemap as arrays + UINT_32 compressZ : 1; ///< Flag indicates z buffer is compressed + UINT_32 overlay : 1; ///< Flag indicates this is an overlay surface + UINT_32 noStencil : 1; ///< Flag indicates this depth has no separate stencil + UINT_32 display : 1; ///< Flag indicates this should match display controller req. + UINT_32 opt4Space : 1; ///< Flag indicates this surface should be optimized for space + /// i.e. save some memory but may lose performance + UINT_32 prt : 1; ///< Flag for partially resident texture + UINT_32 qbStereo : 1; ///< Quad buffer stereo surface + UINT_32 pow2Pad : 1; ///< SI: Pad to pow2, must set for mipmap (include level0) + UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding + UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable + UINT_32 dispTileType : 1; ///< NI: force display Tiling for 128 bit shared resoruce + UINT_32 dccCompatible : 1; ///< VI: whether to make MSAA surface support dcc fast clear + UINT_32 dccPipeWorkaround : 1; ///< VI: whether to workaround the HW limit that + /// dcc can't be enabled if pipe config of tile mode + /// is different from that of ASIC, this flag + /// is address lib internal flag, client should ignore it + UINT_32 czDispCompatible : 1; ///< SI+: CZ family has a HW bug needs special alignment. + /// This flag indicates we need to follow the + /// alignment with CZ families or other ASICs under + /// PX configuration + CZ. + UINT_32 nonSplit : 1; ///< CI: depth texture should not be split + UINT_32 disableLinearOpt : 1; ///< Disable tile mode optimization to linear + UINT_32 needEquation : 1; ///< Make the surface tile setting equation compatible. + /// This flag indicates we need to override tile + /// mode to PRT_* tile mode to disable slice rotation, + /// which is needed by swizzle pattern equation. + UINT_32 skipIndicesOutput : 1; ///< Skipping indices in output. + UINT_32 rotateDisplay : 1; ///< Rotate micro tile type + UINT_32 minimizeAlignment : 1; ///< Minimize alignment + UINT_32 preferEquation : 1; ///< Return equation index without adjusting tile mode + UINT_32 matchStencilTileCfg : 1; ///< Select tile index of stencil as well as depth surface + /// to make sure they share same tile config parameters + UINT_32 disallowLargeThickDegrade : 1; ///< Disallow large thick tile degrade + UINT_32 reserved : 1; ///< Reserved bits + }; + + UINT_32 value; +} ADDR_SURFACE_FLAGS; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_SURFACE_INFO_INPUT +* +* @brief +* Input structure for AddrComputeSurfaceInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_INFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile mode + AddrFormat format; ///< If format is set to valid one, bpp/width/height + /// might be overwritten + UINT_32 bpp; ///< Bits per pixel + UINT_32 numSamples; ///< Number of samples + UINT_32 width; ///< Width, in pixels + UINT_32 height; ///< Height, in pixels + UINT_32 numSlices; ///< Number of surface slices or depth + UINT_32 slice; ///< Slice index + UINT_32 mipLevel; ///< Current mipmap level + UINT_32 numMipLevels; ///< Number of mips in mip chain + ADDR_SURFACE_FLAGS flags; ///< Surface type flags + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + /// r800 and later HWL parameters + // Needed by 2D tiling, for linear and 1D tiling, just keep them 0's + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Set to 0 to default/calculate + AddrTileType tileType; ///< Micro tiling type, not needed when tileIndex != -1 + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + UINT_32 basePitch; ///< Base level pitch in pixels, 0 means ignored, is a + /// must for mip levels from SI+. + /// Don't use pitch in blocks for compressed formats! + UINT_32 maxBaseAlign; ///< Max base alignment request from client + UINT_32 pitchAlign; ///< Pitch alignment request from client + UINT_32 heightAlign; ///< Height alignment request from client +} ADDR_COMPUTE_SURFACE_INFO_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_SURFACE_INFO_OUTPUT +* +* @brief +* Output structure for AddrComputeSurfInfo +* @note + Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch + Pixel: Original pixel +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch in elements (in blocks for compressed formats) + UINT_32 height; ///< Height in elements (in blocks for compressed formats) + UINT_32 depth; ///< Number of slice/depth + UINT_64 surfSize; ///< Surface size in bytes + AddrTileMode tileMode; ///< Actual tile mode. May differ from that in input + UINT_32 baseAlign; ///< Base address alignment + UINT_32 pitchAlign; ///< Pitch alignment, in elements + UINT_32 heightAlign; ///< Height alignment, in elements + UINT_32 depthAlign; ///< Depth alignment, aligned to thickness, for 3d texture + UINT_32 bpp; ///< Bits per elements (e.g. blocks for BCn, 1/3 for 96bit) + UINT_32 pixelPitch; ///< Pitch in original pixels + UINT_32 pixelHeight; ///< Height in original pixels + UINT_32 pixelBits; ///< Original bits per pixel, passed from input + UINT_64 sliceSize; ///< Size of slice specified by input's slice + /// The result is controlled by surface flags & createFlags + /// By default this value equals to surfSize for volume + UINT_32 pitchTileMax; ///< PITCH_TILE_MAX value for h/w register + UINT_32 heightTileMax; ///< HEIGHT_TILE_MAX value for h/w register + UINT_32 sliceTileMax; ///< SLICE_TILE_MAX value for h/w register + + UINT_32 numSamples; ///< Pass the effective numSamples processed in this call + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Filled in if 0 on input + AddrTileType tileType; ///< Micro tiling type, only valid when tileIndex != -1 + INT_32 tileIndex; ///< Tile index, MAY be "downgraded" + + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + /// Output flags + struct + { + /// Special information to work around SI mipmap swizzle bug UBTS #317508 + UINT_32 last2DLevel : 1; ///< TRUE if this is the last 2D(3D) tiled + ///< Only meaningful when create flag checkLast2DLevel is set + UINT_32 tcCompatible : 1; ///< If the surface can be shader compatible + UINT_32 dccUnsupport : 1; ///< If the surface can support DCC compressed rendering + UINT_32 prtTileIndex : 1; ///< SI only, indicate the returned tile index is for PRT + ///< If address lib return true for mip 0, client should set prt flag + ///< for child mips in subsequent compute surface info calls + UINT_32 reserved :28; ///< Reserved bits + }; + + UINT_32 equationIndex; ///< Equation index in the equation table; + + UINT_32 blockWidth; ///< Width in element inside one block(1D->Micro, 2D->Macro) + UINT_32 blockHeight; ///< Height in element inside one block(1D->Micro, 2D->Macro) + UINT_32 blockSlices; ///< Slice number inside one block(1D->Micro, 2D->Macro) + + /// Stereo info + ADDR_QBSTEREOINFO* pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE + + INT_32 stencilTileIdx; ///< stencil tile index output when matchStencilTileCfg was set +} ADDR_COMPUTE_SURFACE_INFO_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeSurfaceInfo +* +* @brief +* Compute surface width/height/depth/alignments and suitable tiling mode +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for AddrComputeSurfaceAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index + UINT_32 sample; ///< Sample index, use fragment index for EQAA + + UINT_32 bpp; ///< Bits per pixel + UINT_32 pitch; ///< Surface pitch, in pixels + UINT_32 height; ///< Surface height, in pixels + UINT_32 numSlices; ///< Surface depth + UINT_32 numSamples; ///< Number of samples + + AddrTileMode tileMode; ///< Tile mode + BOOL_32 isDepth; ///< TRUE if the surface uses depth sample ordering within + /// micro tile. Textures can also choose depth sample order + UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles + /// the case that components are stored separately + UINT_32 compBits; ///< The component bits actually needed(for planar surface) + + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + /// r800 and later HWL parameters + // Used for 1D tiling above + AddrTileType tileType; ///< See defintion of AddrTileType + struct + { + UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture + /// only flag. Only non-RT texture can set this to TRUE + UINT_32 reserved :31; ///< Reserved for future use. + }; + // 2D tiling needs following structure + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + union + { + struct + { + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + }; + UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE + }; +} ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for AddrComputeSurfaceAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Byte address + UINT_32 bitPosition; ///< Bit position within surfaceAddr, 0-7. + /// For surface bpp < 8, e.g. FMT_1. + UINT_32 prtBlockIndex; ///< Index of a PRT tile (64K block) +} ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeSurfaceAddrFromCoord +* +* @brief +* Compute surface address from a given coordinate. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT +* +* @brief +* Input structure for AddrComputeSurfaceCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address in bytes + UINT_32 bitPosition; ///< Bit position in addr. 0-7. for surface bpp < 8, + /// e.g. FMT_1; + UINT_32 bpp; ///< Bits per pixel + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height in pixels + UINT_32 numSlices; ///< Surface depth + UINT_32 numSamples; ///< Number of samples + + AddrTileMode tileMode; ///< Tile mode + BOOL_32 isDepth; ///< Surface uses depth sample ordering within micro tile. + /// Note: Textures can choose depth sample order as well. + UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles + /// the case that components are stored separately + UINT_32 compBits; ///< The component bits actually needed(for planar surface) + + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + /// r800 and later HWL parameters + // Used for 1D tiling above + AddrTileType tileType; ///< See defintion of AddrTileType + struct + { + UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture + /// only flag. Only non-RT texture can set this to TRUE + UINT_32 reserved :31; ///< Reserved for future use. + }; + // 2D tiling needs following structure + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + union + { + struct + { + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + }; + UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE + }; +} ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for AddrComputeSurfaceCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slices + UINT_32 sample; ///< Index of samples, means fragment index for EQAA +} ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeSurfaceCoordFromAddr +* +* @brief +* Compute coordinate from a given surface address +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// HTile functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* ADDR_HTILE_FLAGS +* +* @brief +* HTILE flags +**************************************************************************************************** +*/ +typedef union _ADDR_HTILE_FLAGS +{ + struct + { + UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable + UINT_32 skipTcCompatSizeAlign : 1; ///< Flag indicates that addrLib will not align htile + /// size to 256xBankxPipe when computing tc-compatible + /// htile info. + UINT_32 reserved : 30; ///< Reserved bits + }; + + UINT_32 value; +} ADDR_HTILE_FLAGS; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_HTILE_INFO_INPUT +* +* @brief +* Input structure of AddrComputeHtileInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_INFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_HTILE_FLAGS flags; ///< HTILE flags + UINT_32 pitch; ///< Surface pitch, in pixels + UINT_32 height; ///< Surface height, in pixels + UINT_32 numSlices; ///< Number of slices + BOOL_32 isLinear; ///< Linear or tiled HTILE layout + AddrHtileBlockSize blockWidth; ///< 4 or 8. EG above only support 8 + AddrHtileBlockSize blockHeight; ///< 4 or 8. EG above only support 8 + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_HTILE_INFO_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_HTILE_INFO_OUTPUT +* +* @brief +* Output structure of AddrComputeHtileInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch in pixels of depth buffer represented in this + /// HTile buffer. This might be larger than original depth + /// buffer pitch when called with an unaligned pitch. + UINT_32 height; ///< Height in pixels, as above + UINT_64 htileBytes; ///< Size of HTILE buffer, in bytes + UINT_32 baseAlign; ///< Base alignment + UINT_32 bpp; ///< Bits per pixel for HTILE is how many bits for an 8x8 block! + UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape + UINT_32 macroHeight; ///< Macro height in pixels + UINT_64 sliceSize; ///< Slice size, in bytes. + BOOL_32 sliceInterleaved; ///< Flag to indicate if different slice's htile is interleaved + /// Compute engine clear can't be used if htile is interleaved + BOOL_32 nextMipLevelCompressible; ///< Flag to indicate whether HTILE can be enabled in + /// next mip level, it also indicates if memory set based + /// fast clear can be used for current mip level. +} ADDR_COMPUTE_HTILE_INFO_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeHtileInfo +* +* @brief +* Compute Htile pitch, height, base alignment and size in bytes +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for AddrComputeHtileAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height in pixels + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slice + UINT_32 numSlices; ///< Number of slices + BOOL_32 isLinear; ///< Linear or tiled HTILE layout + ADDR_HTILE_FLAGS flags; ///< htile flags + AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8 + AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8 + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid + UINT_32 bpp; ///< depth/stencil buffer bit per pixel size + UINT_32 zStencilAddr; ///< tcCompatible Z/Stencil surface address +} ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for AddrComputeHtileAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address in bytes + UINT_32 bitPosition; ///< Bit position, 0 or 4. CMASK and HTILE shares some lib method. + /// So we keep bitPosition for HTILE as well +} ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeHtileAddrFromCoord +* +* @brief +* Compute Htile address according to coordinates (of depth buffer) +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT +* +* @brief +* Input structure for AddrComputeHtileCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address + UINT_32 bitPosition; ///< Bit position 0 or 4. CMASK and HTILE share some methods + /// so we keep bitPosition for HTILE as well + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height, in pixels + UINT_32 numSlices; ///< Number of slices + BOOL_32 isLinear; ///< Linear or tiled HTILE layout + AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8 + AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8 + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for AddrComputeHtileCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index +} ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeHtileCoordFromAddr +* +* @brief +* Compute coordinates within depth buffer (1st pixel of a micro tile) according to +* Htile address +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// C-mask functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* ADDR_CMASK_FLAGS +* +* @brief +* CMASK flags +**************************************************************************************************** +*/ +typedef union _ADDR_CMASK_FLAGS +{ + struct + { + UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable + UINT_32 reserved :31; ///< Reserved bits + }; + + UINT_32 value; +} ADDR_CMASK_FLAGS; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_CMASK_INFO_INPUT +* +* @brief +* Input structure of AddrComputeCmaskInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASKINFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_CMASK_FLAGS flags; ///< CMASK flags + UINT_32 pitch; ///< Pitch, in pixels, of color buffer + UINT_32 height; ///< Height, in pixels, of color buffer + UINT_32 numSlices; ///< Number of slices, of color buffer + BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_CMASK_INFO_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_CMASK_INFO_OUTPUT +* +* @brief +* Output structure of AddrComputeCmaskInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch in pixels of color buffer which + /// this Cmask matches. The size might be larger than + /// original color buffer pitch when called with + /// an unaligned pitch. + UINT_32 height; ///< Height in pixels, as above + UINT_64 cmaskBytes; ///< Size in bytes of CMask buffer + UINT_32 baseAlign; ///< Base alignment + UINT_32 blockMax; ///< Cmask block size. Need this to set CB_COLORn_MASK register + UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape + UINT_32 macroHeight; ///< Macro height in pixels + UINT_64 sliceSize; ///< Slice size, in bytes. +} ADDR_COMPUTE_CMASK_INFO_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeCmaskInfo +* +* @brief +* Compute Cmask pitch, height, base alignment and size in bytes from color buffer +* info +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for AddrComputeCmaskAddrFromCoord +* +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_64 fmaskAddr; ///< Fmask addr for tc compatible Cmask + UINT_32 slice; ///< Slice index + UINT_32 pitch; ///< Pitch in pixels, of color buffer + UINT_32 height; ///< Height in pixels, of color buffer + UINT_32 numSlices; ///< Number of slices + UINT_32 bpp; + BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear + ADDR_CMASK_FLAGS flags; ///< CMASK flags + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + ///< while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for AddrComputeCmaskAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< CMASK address in bytes + UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp, + /// so the address may be located in bit 0 (0) or 4 (4) +} ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeCmaskAddrFromCoord +* +* @brief +* Compute Cmask address according to coordinates (of MSAA color buffer) +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT +* +* @brief +* Input structure for AddrComputeCmaskCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< CMASK address in bytes + UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp, + /// so the address may be located in bit 0 (0) or 4 (4) + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height in pixels + UINT_32 numSlices; ///< Number of slices + BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for AddrComputeCmaskCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index +} ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeCmaskCoordFromAddr +* +* @brief +* Compute coordinates within color buffer (1st pixel of a micro tile) according to +* Cmask address +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// F-mask functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* ADDR_COMPUTE_FMASK_INFO_INPUT +* +* @brief +* Input structure for AddrComputeFmaskInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_INFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile mode + UINT_32 pitch; ///< Surface pitch, in pixels + UINT_32 height; ///< Surface height, in pixels + UINT_32 numSlices; ///< Number of slice/depth + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + /// r800 and later HWL parameters + struct + { + UINT_32 resolved: 1; ///< TRUE if the surface is for resolved fmask, only used + /// by H/W clients. S/W should always set it to FALSE. + UINT_32 reserved: 31; ///< Reserved for future use. + }; + ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Clients must give valid data + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 +} ADDR_COMPUTE_FMASK_INFO_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_FMASK_INFO_OUTPUT +* +* @brief +* Output structure for AddrComputeFmaskInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch of fmask in pixels + UINT_32 height; ///< Height of fmask in pixels + UINT_32 numSlices; ///< Slices of fmask + UINT_64 fmaskBytes; ///< Size of fmask in bytes + UINT_32 baseAlign; ///< Base address alignment + UINT_32 pitchAlign; ///< Pitch alignment + UINT_32 heightAlign; ///< Height alignment + UINT_32 bpp; ///< Bits per pixel of FMASK is: number of bit planes + UINT_32 numSamples; ///< Number of samples, used for dump, export this since input + /// may be changed in 9xx and above + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Fmask can have different + /// bank_height from color buffer + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + UINT_64 sliceSize; ///< Size of slice in bytes +} ADDR_COMPUTE_FMASK_INFO_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeFmaskInfo +* +* @brief +* Compute Fmask pitch/height/depth/alignments and size in bytes +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for AddrComputeFmaskAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index + UINT_32 plane; ///< Plane number + UINT_32 sample; ///< Sample index (fragment index for EQAA) + + UINT_32 pitch; ///< Surface pitch, in pixels + UINT_32 height; ///< Surface height, in pixels + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + + AddrTileMode tileMode; ///< Tile mode + union + { + struct + { + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + }; + UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE + }; + + /// r800 and later HWL parameters + struct + { + UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by H/W clients + UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored. + UINT_32 reserved: 30; ///< Reserved for future use. + }; + ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Client must provide all data + +} ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for AddrComputeFmaskAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Fmask address + UINT_32 bitPosition; ///< Bit position within fmaskAddr, 0-7. +} ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeFmaskAddrFromCoord +* +* @brief +* Compute Fmask address according to coordinates (x,y,slice,sample,plane) +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT +* +* @brief +* Input structure for AddrComputeFmaskCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address + UINT_32 bitPosition; ///< Bit position within addr, 0-7. + + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height in pixels + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments + AddrTileMode tileMode; ///< Tile mode + union + { + struct + { + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + }; + UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE + }; + + /// r800 and later HWL parameters + struct + { + UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by HW components + UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored. + UINT_32 reserved: 30; ///< Reserved for future use. + }; + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + +} ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for AddrComputeFmaskCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index + UINT_32 plane; ///< Plane number + UINT_32 sample; ///< Sample index (fragment index for EQAA) +} ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeFmaskCoordFromAddr +* +* @brief +* Compute FMASK coordinate from an given address +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Element/utility functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* AddrGetVersion +* +* @brief +* Get AddrLib version number +**************************************************************************************************** +*/ +UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib); + +/** +**************************************************************************************************** +* AddrUseTileIndex +* +* @brief +* Return TRUE if tileIndex is enabled in this address library +**************************************************************************************************** +*/ +BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib); + +/** +**************************************************************************************************** +* AddrUseCombinedSwizzle +* +* @brief +* Return TRUE if combined swizzle is enabled in this address library +**************************************************************************************************** +*/ +BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib); + +/** +**************************************************************************************************** +* ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT +* +* @brief +* Input structure of AddrExtractBankPipeSwizzle +**************************************************************************************************** +*/ +typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 base256b; ///< Base256b value + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT; + +/** +**************************************************************************************************** +* ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT +* +* @brief +* Output structure of AddrExtractBankPipeSwizzle +**************************************************************************************************** +*/ +typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle +} ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT; + +/** +**************************************************************************************************** +* AddrExtractBankPipeSwizzle +* +* @brief +* Extract Bank and Pipe swizzle from base256b +* @return +* ADDR_OK if no error +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle( + ADDR_HANDLE hLib, + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT +* +* @brief +* Input structure of AddrCombineBankPipeSwizzle +**************************************************************************************************** +*/ +typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + UINT_64 baseAddr; ///< Base address (leave it zero for driver clients) + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT +* +* @brief +* Output structure of AddrCombineBankPipeSwizzle +**************************************************************************************************** +*/ +typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 tileSwizzle; ///< Combined swizzle +} ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT; + +/** +**************************************************************************************************** +* AddrCombineBankPipeSwizzle +* +* @brief +* Combine Bank and Pipe swizzle +* @return +* ADDR_OK if no error +* @note +* baseAddr here is full MCAddress instead of base256b +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_COMPUTE_SLICESWIZZLE_INPUT +* +* @brief +* Input structure of AddrComputeSliceSwizzle +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile Mode + UINT_32 baseSwizzle; ///< Base tile swizzle + UINT_32 slice; ///< Slice index + UINT_64 baseAddr; ///< Base address, driver should leave it 0 in most cases + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here! + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_SLICESWIZZLE_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_SLICESWIZZLE_OUTPUT +* +* @brief +* Output structure of AddrComputeSliceSwizzle +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SLICESWIZZLE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 tileSwizzle; ///< Recalculated tileSwizzle value +} ADDR_COMPUTE_SLICESWIZZLE_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeSliceSwizzle +* +* @brief +* Extract Bank and Pipe swizzle from base256b +* @return +* ADDR_OK if no error +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut); + +/** +**************************************************************************************************** +* AddrSwizzleGenOption +* +* @brief +* Which swizzle generating options: legacy or linear +**************************************************************************************************** +*/ +typedef enum _AddrSwizzleGenOption +{ + ADDR_SWIZZLE_GEN_DEFAULT = 0, ///< As is in client driver implemention for swizzle + ADDR_SWIZZLE_GEN_LINEAR = 1, ///< Using a linear increment of swizzle +} AddrSwizzleGenOption; + +/** +**************************************************************************************************** +* AddrSwizzleOption +* +* @brief +* Controls how swizzle is generated +**************************************************************************************************** +*/ +typedef union _ADDR_SWIZZLE_OPTION +{ + struct + { + UINT_32 genOption : 1; ///< The way swizzle is generated, see AddrSwizzleGenOption + UINT_32 reduceBankBit : 1; ///< TRUE if we need reduce swizzle bits + UINT_32 reserved :30; ///< Reserved bits + }; + + UINT_32 value; + +} ADDR_SWIZZLE_OPTION; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_BASE_SWIZZLE_INPUT +* +* @brief +* Input structure of AddrComputeBaseSwizzle +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_SWIZZLE_OPTION option; ///< Swizzle option + UINT_32 surfIndex; ///< Index of this surface type + AddrTileMode tileMode; ///< Tile Mode + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here! + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_BASE_SWIZZLE_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT +* +* @brief +* Output structure of AddrComputeBaseSwizzle +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 tileSwizzle; ///< Combined swizzle +} ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeBaseSwizzle +* +* @brief +* Return a Combined Bank and Pipe swizzle base on surface based on surface type/index +* @return +* ADDR_OK if no error +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ELEM_GETEXPORTNORM_INPUT +* +* @brief +* Input structure for ElemGetExportNorm +* +**************************************************************************************************** +*/ +typedef struct _ELEM_GETEXPORTNORM_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrColorFormat format; ///< Color buffer format; Client should use ColorFormat + AddrSurfaceNumber num; ///< Surface number type; Client should use NumberType + AddrSurfaceSwap swap; ///< Surface swap byte swap; Client should use SurfaceSwap + UINT_32 numSamples; ///< Number of samples +} ELEM_GETEXPORTNORM_INPUT; + +/** +**************************************************************************************************** +* ElemGetExportNorm +* +* @brief +* Helper function to check one format can be EXPORT_NUM, which is a register +* CB_COLOR_INFO.SURFACE_FORMAT. FP16 can be reported as EXPORT_NORM for rv770 in r600 +* family +* @note +* The implementation is only for r600. +* 00 - EXPORT_FULL: PS exports are 4 pixels with 4 components with 32-bits-per-component. (two +* clocks per export) +* 01 - EXPORT_NORM: PS exports are 4 pixels with 4 components with 16-bits-per-component. (one +* clock per export) +* +**************************************************************************************************** +*/ +BOOL_32 ADDR_API ElemGetExportNorm( + ADDR_HANDLE hLib, + const ELEM_GETEXPORTNORM_INPUT* pIn); + +/** +**************************************************************************************************** +* ELEM_FLT32TODEPTHPIXEL_INPUT +* +* @brief +* Input structure for addrFlt32ToDepthPixel +* +**************************************************************************************************** +*/ +typedef struct _ELEM_FLT32TODEPTHPIXEL_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrDepthFormat format; ///< Depth buffer format + ADDR_FLT_32 comps[2]; ///< Component values (Z/stencil) +} ELEM_FLT32TODEPTHPIXEL_INPUT; + +/** +**************************************************************************************************** +* ELEM_FLT32TODEPTHPIXEL_INPUT +* +* @brief +* Output structure for ElemFlt32ToDepthPixel +* +**************************************************************************************************** +*/ +typedef struct _ELEM_FLT32TODEPTHPIXEL_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_8* pPixel; ///< Real depth value. Same data type as depth buffer. + /// Client must provide enough storage for this type. + UINT_32 depthBase; ///< Tile base in bits for depth bits + UINT_32 stencilBase; ///< Tile base in bits for stencil bits + UINT_32 depthBits; ///< Bits for depth + UINT_32 stencilBits; ///< Bits for stencil +} ELEM_FLT32TODEPTHPIXEL_OUTPUT; + +/** +**************************************************************************************************** +* ElemFlt32ToDepthPixel +* +* @brief +* Convert a FLT_32 value to a depth/stencil pixel value +* +* @return +* Return code +* +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel( + ADDR_HANDLE hLib, + const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, + ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ELEM_FLT32TOCOLORPIXEL_INPUT +* +* @brief +* Input structure for addrFlt32ToColorPixel +* +**************************************************************************************************** +*/ +typedef struct _ELEM_FLT32TOCOLORPIXEL_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrColorFormat format; ///< Color buffer format + AddrSurfaceNumber surfNum; ///< Surface number + AddrSurfaceSwap surfSwap; ///< Surface swap + ADDR_FLT_32 comps[4]; ///< Component values (r/g/b/a) +} ELEM_FLT32TOCOLORPIXEL_INPUT; + +/** +**************************************************************************************************** +* ELEM_FLT32TOCOLORPIXEL_INPUT +* +* @brief +* Output structure for ElemFlt32ToColorPixel +* +**************************************************************************************************** +*/ +typedef struct _ELEM_FLT32TOCOLORPIXEL_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_8* pPixel; ///< Real color value. Same data type as color buffer. + /// Client must provide enough storage for this type. +} ELEM_FLT32TOCOLORPIXEL_OUTPUT; + +/** +**************************************************************************************************** +* ElemFlt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a red/green/blue/alpha pixel value +* +* @return +* Return code +* +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel( + ADDR_HANDLE hLib, + const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, + ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ElemSize +* +* @brief +* Get bits-per-element for specified format +* +* @return +* Bits-per-element of specified format +* +**************************************************************************************************** +*/ +UINT_32 ADDR_API ElemSize( + ADDR_HANDLE hLib, + AddrFormat format); + +/** +**************************************************************************************************** +* ADDR_CONVERT_TILEINFOTOHW_INPUT +* +* @brief +* Input structure for AddrConvertTileInfoToHW +* @note +* When reverse is TRUE, indices are igonred +**************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + BOOL_32 reverse; ///< Convert control flag. + /// FALSE: convert from real value to HW value; + /// TRUE: convert from HW value to real value. + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< Tile parameters with real value + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid + UINT_32 bpp; ///< Bits per pixel +} ADDR_CONVERT_TILEINFOTOHW_INPUT; + +/** +**************************************************************************************************** +* ADDR_CONVERT_TILEINFOTOHW_OUTPUT +* +* @brief +* Output structure for AddrConvertTileInfoToHW +**************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINFOTOHW_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< Tile parameters with hardware register value + +} ADDR_CONVERT_TILEINFOTOHW_OUTPUT; + +/** +**************************************************************************************************** +* AddrConvertTileInfoToHW +* +* @brief +* Convert tile info from real value to hardware register value +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW( + ADDR_HANDLE hLib, + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_CONVERT_TILEINDEX_INPUT +* +* @brief +* Input structure for AddrConvertTileIndex +**************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINDEX_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + INT_32 tileIndex; ///< Tile index + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + UINT_32 bpp; ///< Bits per pixel + BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual +} ADDR_CONVERT_TILEINDEX_INPUT; + +/** +**************************************************************************************************** +* ADDR_CONVERT_TILEINDEX_OUTPUT +* +* @brief +* Output structure for AddrConvertTileIndex +**************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINDEX_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile mode + AddrTileType tileType; ///< Tile type + ADDR_TILEINFO* pTileInfo; ///< Tile info + +} ADDR_CONVERT_TILEINDEX_OUTPUT; + +/** +**************************************************************************************************** +* AddrConvertTileIndex +* +* @brief +* Convert tile index to tile mode/type/info +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex( + ADDR_HANDLE hLib, + const ADDR_CONVERT_TILEINDEX_INPUT* pIn, + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_GET_MACROMODEINDEX_INPUT +* +* @brief +* Input structure for AddrGetMacroModeIndex +**************************************************************************************************** +*/ +typedef struct _ADDR_GET_MACROMODEINDEX_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + ADDR_SURFACE_FLAGS flags; ///< Surface flag + INT_32 tileIndex; ///< Tile index + UINT_32 bpp; ///< Bits per pixel + UINT_32 numFrags; ///< Number of color fragments +} ADDR_GET_MACROMODEINDEX_INPUT; + +/** +**************************************************************************************************** +* ADDR_GET_MACROMODEINDEX_OUTPUT +* +* @brief +* Output structure for AddrGetMacroModeIndex +**************************************************************************************************** +*/ +typedef struct _ADDR_GET_MACROMODEINDEX_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) +} ADDR_GET_MACROMODEINDEX_OUTPUT; + +/** +**************************************************************************************************** +* AddrGetMacroModeIndex +* +* @brief +* Get macro mode index based on input parameters +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetMacroModeIndex( + ADDR_HANDLE hLib, + const ADDR_GET_MACROMODEINDEX_INPUT* pIn, + ADDR_GET_MACROMODEINDEX_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_CONVERT_TILEINDEX1_INPUT +* +* @brief +* Input structure for AddrConvertTileIndex1 (without macro mode index) +**************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINDEX1_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + INT_32 tileIndex; ///< Tile index + UINT_32 bpp; ///< Bits per pixel + UINT_32 numSamples; ///< Number of samples + BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual +} ADDR_CONVERT_TILEINDEX1_INPUT; + +/** +**************************************************************************************************** +* AddrConvertTileIndex1 +* +* @brief +* Convert tile index to tile mode/type/info +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1( + ADDR_HANDLE hLib, + const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_GET_TILEINDEX_INPUT +* +* @brief +* Input structure for AddrGetTileIndex +**************************************************************************************************** +*/ +typedef struct _ADDR_GET_TILEINDEX_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile mode + AddrTileType tileType; ///< Tile-type: disp/non-disp/... + ADDR_TILEINFO* pTileInfo; ///< Pointer to tile-info structure, can be NULL for linear/1D +} ADDR_GET_TILEINDEX_INPUT; + +/** +**************************************************************************************************** +* ADDR_GET_TILEINDEX_OUTPUT +* +* @brief +* Output structure for AddrGetTileIndex +**************************************************************************************************** +*/ +typedef struct _ADDR_GET_TILEINDEX_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + INT_32 index; ///< index in table +} ADDR_GET_TILEINDEX_OUTPUT; + +/** +**************************************************************************************************** +* AddrGetTileIndex +* +* @brief +* Get the tiling mode index in table +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex( + ADDR_HANDLE hLib, + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_PRT_INFO_INPUT +* +* @brief +* Input structure for AddrComputePrtInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_PRT_INFO_INPUT +{ + AddrFormat format; ///< Surface format + UINT_32 baseMipWidth; ///< Base mipmap width + UINT_32 baseMipHeight; ///< Base mipmap height + UINT_32 baseMipDepth; ///< Base mipmap depth + UINT_32 numFrags; ///< Number of fragments, +} ADDR_PRT_INFO_INPUT; + +/** +**************************************************************************************************** +* ADDR_PRT_INFO_OUTPUT +* +* @brief +* Input structure for AddrComputePrtInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_PRT_INFO_OUTPUT +{ + UINT_32 prtTileWidth; + UINT_32 prtTileHeight; +} ADDR_PRT_INFO_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputePrtInfo +* +* @brief +* Compute prt surface related information +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo( + ADDR_HANDLE hLib, + const ADDR_PRT_INFO_INPUT* pIn, + ADDR_PRT_INFO_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// DCC key functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* _ADDR_COMPUTE_DCCINFO_INPUT +* +* @brief +* Input structure of AddrComputeDccInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_DCCINFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_32 bpp; ///< BitPP of color surface + UINT_32 numSamples; ///< Sample number of color surface + UINT_64 colorSurfSize; ///< Size of color surface to which dcc key is bound + AddrTileMode tileMode; ///< Tile mode of color surface + ADDR_TILEINFO tileInfo; ///< Tile info of color surface + UINT_32 tileSwizzle; ///< Tile swizzle + INT_32 tileIndex; ///< Tile index of color surface, + ///< MUST be -1 if you don't want to use it + ///< while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_DCCINFO_INPUT; + +/** +**************************************************************************************************** +* ADDR_COMPUTE_DCCINFO_OUTPUT +* +* @brief +* Output structure of AddrComputeDccInfo +**************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_32 dccRamBaseAlign; ///< Base alignment of dcc key + UINT_64 dccRamSize; ///< Size of dcc key + UINT_64 dccFastClearSize; ///< Size of dcc key portion that can be fast cleared + BOOL_32 subLvlCompressible; ///< Whether sub resource is compressiable + BOOL_32 dccRamSizeAligned; ///< Whether the dcc key size is aligned +} ADDR_COMPUTE_DCCINFO_OUTPUT; + +/** +**************************************************************************************************** +* AddrComputeDccInfo +* +* @brief +* Compute DCC key size, base alignment +* info +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR_GET_MAX_ALIGNMENTS_OUTPUT +* +* @brief +* Output structure of AddrGetMaxAlignments +**************************************************************************************************** +*/ +typedef struct _ADDR_GET_MAX_ALIGNMENTS_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_32 baseAlign; ///< Maximum base alignment in bytes +} ADDR_GET_MAX_ALIGNMENTS_OUTPUT; + +/** +**************************************************************************************************** +* AddrGetMaxAlignments +* +* @brief +* Gets maximnum alignments +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments( + ADDR_HANDLE hLib, + ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut); + +/** +**************************************************************************************************** +* AddrGetMaxMetaAlignments +* +* @brief +* Gets maximnum alignments for metadata +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments( + ADDR_HANDLE hLib, + ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut); + +/** +**************************************************************************************************** +* Address library interface version 2 +* available from Gfx9 hardware +**************************************************************************************************** +* Addr2ComputeSurfaceInfo() +* Addr2ComputeSurfaceAddrFromCoord() +* Addr2ComputeSurfaceCoordFromAddr() + +* Addr2ComputeHtileInfo() +* Addr2ComputeHtileAddrFromCoord() +* Addr2ComputeHtileCoordFromAddr() +* +* Addr2ComputeCmaskInfo() +* Addr2ComputeCmaskAddrFromCoord() +* Addr2ComputeCmaskCoordFromAddr() +* +* Addr2ComputeFmaskInfo() +* Addr2ComputeFmaskAddrFromCoord() +* Addr2ComputeFmaskCoordFromAddr() +* +* Addr2ComputeDccInfo() +* +**/ + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface functions for Gfx9 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* ADDR2_SURFACE_FLAGS +* +* @brief +* Surface flags +**************************************************************************************************** +*/ +typedef union _ADDR2_SURFACE_FLAGS +{ + struct + { + UINT_32 color : 1; ///< This resource is a color buffer, can be used with RTV + UINT_32 depth : 1; ///< Thie resource is a depth buffer, can be used with DSV + UINT_32 stencil : 1; ///< Thie resource is a stencil buffer, can be used with DSV + UINT_32 fmask : 1; ///< This is an fmask surface + UINT_32 overlay : 1; ///< This is an overlay surface + UINT_32 display : 1; ///< This resource is displable, can be used with DRV + UINT_32 prt : 1; ///< This is a partially resident texture + UINT_32 qbStereo : 1; ///< This is a quad buffer stereo surface + UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding + UINT_32 texture : 1; ///< This resource can be used with SRV + UINT_32 unordered : 1; ///< This resource can be used with UAV + UINT_32 rotated : 1; ///< This resource is rotated and displable + UINT_32 needEquation : 1; ///< This resource needs equation to be generated if possible + UINT_32 opt4space : 1; ///< This resource should be optimized for space + UINT_32 minimizeAlign : 1; ///< This resource should use minimum alignment + UINT_32 noMetadata : 1; ///< This resource has no metadata + UINT_32 metaRbUnaligned : 1; ///< This resource has rb unaligned metadata + UINT_32 metaPipeUnaligned : 1; ///< This resource has pipe unaligned metadata + UINT_32 view3dAs2dArray : 1; ///< This resource is a 3D resource viewed as 2D array + UINT_32 reserved : 13; ///< Reserved bits + }; + + UINT_32 value; +} ADDR2_SURFACE_FLAGS; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SURFACE_INFO_INPUT +* +* @brief +* Input structure for Addr2ComputeSurfaceInfo +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SURFACE_INFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR2_SURFACE_FLAGS flags; ///< Surface flags + AddrSwizzleMode swizzleMode; ///< Swizzle Mode for Gfx9 + AddrResourceType resourceType; ///< Surface type + AddrFormat format; ///< Surface format + UINT_32 bpp; ///< bits per pixel + UINT_32 width; ///< Width (of mip0), in pixels + UINT_32 height; ///< Height (of mip0), in pixels + UINT_32 numSlices; ///< Number surface slice/depth (of mip0), + UINT_32 numMipLevels; ///< Total mipmap levels. + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + UINT_32 pitchInElement; ///< Pitch in elements (blocks for compressed formats) + UINT_32 sliceAlign; ///< Required slice size in bytes +} ADDR2_COMPUTE_SURFACE_INFO_INPUT; + +/** +**************************************************************************************************** +* ADDR2_MIP_INFO +* +* @brief +* Structure that contains information for mip level +* +**************************************************************************************************** +*/ +typedef struct _ADDR2_MIP_INFO +{ + UINT_32 pitch; ///< Pitch in elements + UINT_32 height; ///< Padded height in elements + UINT_32 depth; ///< Padded depth + UINT_32 pixelPitch; ///< Pitch in pixels + UINT_32 pixelHeight; ///< Padded height in pixels + UINT_32 equationIndex; ///< Equation index in the equation table + UINT_64 offset; ///< Offset in bytes from mip base, should only be used + ///< to setup vam surface descriptor, can't be used + ///< to setup swizzle pattern + UINT_64 macroBlockOffset; ///< macro block offset in bytes from mip base + UINT_32 mipTailOffset; ///< mip tail offset in bytes + UINT_32 mipTailCoordX; ///< mip tail coord x + UINT_32 mipTailCoordY; ///< mip tail coord y + UINT_32 mipTailCoordZ; ///< mip tail coord z +} ADDR2_MIP_INFO; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SURFACE_INFO_OUTPUT +* +* @brief +* Output structure for Addr2ComputeSurfInfo +* @note + Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch + Pixel: Original pixel +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SURFACE_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch in elements (blocks for compressed formats) + UINT_32 height; ///< Padded height (of mip0) in elements + UINT_32 numSlices; ///< Padded depth for 3d resource + ///< or padded number of slices for 2d array resource + UINT_32 mipChainPitch; ///< Pitch (of total mip chain) in elements + UINT_32 mipChainHeight; ///< Padded height (of total mip chain) in elements + UINT_32 mipChainSlice; ///< Padded depth (of total mip chain) + UINT_64 sliceSize; ///< Slice (total mip chain) size in bytes + UINT_64 surfSize; ///< Surface (total mip chain) size in bytes + UINT_32 baseAlign; ///< Base address alignment + UINT_32 bpp; ///< Bits per elements + /// (e.g. blocks for BCn, 1/3 for 96bit) + UINT_32 pixelMipChainPitch; ///< Mip chain pitch in original pixels + UINT_32 pixelMipChainHeight; ///< Mip chain height in original pixels + UINT_32 pixelPitch; ///< Pitch in original pixels + UINT_32 pixelHeight; ///< Height in original pixels + UINT_32 pixelBits; ///< Original bits per pixel, passed from input + + UINT_32 blockWidth; ///< Width in element inside one block + UINT_32 blockHeight; ///< Height in element inside one block + UINT_32 blockSlices; ///< Slice number inside one block + ///< Prt tile is one block, its width/height/slice + ///< equals to blcok width/height/slice + + BOOL_32 epitchIsHeight; ///< Whether to use height to program epitch register + /// Stereo info + ADDR_QBSTEREOINFO* pStereoInfo; ///< Stereo info, needed if qbStereo flag is TRUE + /// Mip info + ADDR2_MIP_INFO* pMipInfo; ///< Pointer to mip information array + /// if it is not NULL, the array is assumed to + /// contain numMipLevels entries + + UINT_32 equationIndex; ///< Equation index in the equation table of mip0 + BOOL_32 mipChainInTail; ///< If whole mipchain falls into mip tail block + UINT_32 firstMipIdInTail; ///< The id of first mip in tail, if there is no mip + /// in tail, it will be set to number of mip levels +} ADDR2_COMPUTE_SURFACE_INFO_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeSurfaceInfo +* +* @brief +* Compute surface width/height/slices/alignments and suitable tiling mode +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for Addr2ComputeSurfaceAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index + UINT_32 sample; ///< Sample index, use fragment index for EQAA + UINT_32 mipId; ///< the mip ID in mip chain + + AddrSwizzleMode swizzleMode; ///< Swizzle mode for Gfx9 + ADDR2_SURFACE_FLAGS flags; ///< Surface flags + AddrResourceType resourceType; ///< Surface type + UINT_32 bpp; ///< Bits per pixel + UINT_32 unalignedWidth; ///< Surface original width (of mip0) + UINT_32 unalignedHeight; ///< Surface original height (of mip0) + UINT_32 numSlices; ///< Surface original slices (of mip0) + UINT_32 numMipLevels; ///< Total mipmap levels + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + + UINT_32 pipeBankXor; ///< Combined swizzle used to do bank/pipe rotation + UINT_32 pitchInElement; ///< Pitch in elements (blocks for compressed formats) +} ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for Addr2ComputeSurfaceAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Byte address + UINT_32 bitPosition; ///< Bit position within surfaceAddr, 0-7. + /// For surface bpp < 8, e.g. FMT_1. + UINT_32 prtBlockIndex; ///< Index of a PRT tile (64K block) +} ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeSurfaceAddrFromCoord +* +* @brief +* Compute surface address from a given coordinate. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT +* +* @brief +* Input structure for Addr2ComputeSurfaceCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address in bytes + UINT_32 bitPosition; ///< Bit position in addr. 0-7. for surface bpp < 8, + /// e.g. FMT_1; + + AddrSwizzleMode swizzleMode; ///< Swizzle mode for Gfx9 + ADDR2_SURFACE_FLAGS flags; ///< Surface flags + AddrResourceType resourceType; ///< Surface type + UINT_32 bpp; ///< Bits per pixel + UINT_32 unalignedWidth; ///< Surface original width (of mip0) + UINT_32 unalignedHeight; ///< Surface original height (of mip0) + UINT_32 numSlices; ///< Surface original slices (of mip0) + UINT_32 numMipLevels; ///< Total mipmap levels. + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + + UINT_32 pipeBankXor; ///< Combined swizzle used to do bank/pipe rotation + UINT_32 pitchInElement; ///< Pitch in elements (blocks for compressed formats) +} ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for Addr2ComputeSurfaceCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slices + UINT_32 sample; ///< Index of samples, means fragment index for EQAA + UINT_32 mipId; ///< mipmap level id +} ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeSurfaceCoordFromAddr +* +* @brief +* Compute coordinate from a given surface address +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// HTile functions for Gfx9 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* ADDR2_META_FLAGS +* +* @brief +* Metadata flags +**************************************************************************************************** +*/ +typedef union _ADDR2_META_FLAGS +{ + struct + { + UINT_32 pipeAligned : 1; ///< if Metadata being pipe aligned + UINT_32 rbAligned : 1; ///< if Metadata being RB aligned + UINT_32 linear : 1; ///< if Metadata linear, GFX9 does not suppord this! + UINT_32 reserved : 29; ///< Reserved bits + }; + + UINT_32 value; +} ADDR2_META_FLAGS; + +/** +**************************************************************************************************** +* ADDR2_META_MIP_INFO +* +* @brief +* Structure to store per mip metadata information +**************************************************************************************************** +*/ +typedef struct _ADDR2_META_MIP_INFO +{ + BOOL_32 inMiptail; + union + { + struct + { + UINT_32 startX; + UINT_32 startY; + UINT_32 startZ; + UINT_32 width; + UINT_32 height; + UINT_32 depth; + }; + + struct + { + UINT_32 offset; ///< Metadata offset within one slice, + /// the thickness of a slice is meta block depth. + UINT_32 sliceSize; ///< Metadata size within one slice, + /// the thickness of a slice is meta block depth. + }; + }; +} ADDR2_META_MIP_INFO; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_HTILE_INFO_INPUT +* +* @brief +* Input structure of Addr2ComputeHtileInfo +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_HTILE_INFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR2_META_FLAGS hTileFlags; ///< HTILE flags + ADDR2_SURFACE_FLAGS depthFlags; ///< Depth surface flags + AddrSwizzleMode swizzleMode; ///< Depth surface swizzle mode + UINT_32 unalignedWidth; ///< Depth surface original width (of mip0) + UINT_32 unalignedHeight; ///< Depth surface original height (of mip0) + UINT_32 numSlices; ///< Number of slices of depth surface (of mip0) + UINT_32 numMipLevels; ///< Total mipmap levels of color surface + UINT_32 firstMipIdInTail; /// Id of the first mip in tail, + /// if no mip is in tail, it should be set to + /// number of mip levels +} ADDR2_COMPUTE_HTILE_INFO_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_HTILE_INFO_OUTPUT +* +* @brief +* Output structure of Addr2ComputeHtileInfo +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_HTILE_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch in pixels of depth buffer represented in this + /// HTile buffer. This might be larger than original depth + /// buffer pitch when called with an unaligned pitch. + UINT_32 height; ///< Height in pixels, as above + UINT_32 baseAlign; ///< Base alignment + UINT_32 sliceSize; ///< Slice size, in bytes. + UINT_32 htileBytes; ///< Size of HTILE buffer, in bytes + UINT_32 metaBlkWidth; ///< Meta block width + UINT_32 metaBlkHeight; ///< Meta block height + UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice + + ADDR2_META_MIP_INFO* pMipInfo; ///< HTILE mip information +} ADDR2_COMPUTE_HTILE_INFO_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeHtileInfo +* +* @brief +* Compute Htile pitch, height, base alignment and size in bytes +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for Addr2ComputeHtileAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slices + UINT_32 mipId; ///< mipmap level id + + ADDR2_META_FLAGS hTileFlags; ///< HTILE flags + ADDR2_SURFACE_FLAGS depthflags; ///< Depth surface flags + AddrSwizzleMode swizzleMode; ///< Depth surface swizzle mode + UINT_32 bpp; ///< Depth surface bits per pixel + UINT_32 unalignedWidth; ///< Depth surface original width (of mip0) + UINT_32 unalignedHeight; ///< Depth surface original height (of mip0) + UINT_32 numSlices; ///< Depth surface original depth (of mip0) + UINT_32 numMipLevels; ///< Depth surface total mipmap levels + UINT_32 numSamples; ///< Depth surface number of samples + UINT_32 pipeXor; ///< Pipe xor setting +} ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for Addr2ComputeHtileAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address in bytes +} ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeHtileAddrFromCoord +* +* @brief +* Compute Htile address according to coordinates (of depth buffer) +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT +* +* @brief +* Input structure for Addr2ComputeHtileCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address + + ADDR2_META_FLAGS hTileFlags; ///< HTILE flags + ADDR2_SURFACE_FLAGS depthFlags; ///< Depth surface flags + AddrSwizzleMode swizzleMode; ///< Depth surface swizzle mode + UINT_32 bpp; ///< Depth surface bits per pixel + UINT_32 unalignedWidth; ///< Depth surface original width (of mip0) + UINT_32 unalignedHeight; ///< Depth surface original height (of mip0) + UINT_32 numSlices; ///< Depth surface original depth (of mip0) + UINT_32 numMipLevels; ///< Depth surface total mipmap levels + UINT_32 numSamples; ///< Depth surface number of samples + UINT_32 pipeXor; ///< Pipe xor setting +} ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for Addr2ComputeHtileCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slices + UINT_32 mipId; ///< mipmap level id +} ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeHtileCoordFromAddr +* +* @brief +* Compute coordinates within depth buffer (1st pixel of a micro tile) according to +* Htile address +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// C-mask functions for Gfx9 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_CMASK_INFO_INPUT +* +* @brief +* Input structure of Addr2ComputeCmaskInfo +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_CMASKINFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR2_META_FLAGS cMaskFlags; ///< CMASK flags + ADDR2_SURFACE_FLAGS colorFlags; ///< Color surface flags + AddrResourceType resourceType; ///< Color surface type + AddrSwizzleMode swizzleMode; ///< FMask surface swizzle mode + UINT_32 unalignedWidth; ///< Color surface original width + UINT_32 unalignedHeight; ///< Color surface original height + UINT_32 numSlices; ///< Number of slices of color buffer + UINT_32 numMipLevels; ///< Number of mip levels + UINT_32 firstMipIdInTail; ///< The id of first mip in tail, if no mip is in tail, + /// it should be number of mip levels +} ADDR2_COMPUTE_CMASK_INFO_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_CMASK_INFO_OUTPUT +* +* @brief +* Output structure of Addr2ComputeCmaskInfo +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_CMASK_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch in pixels of color buffer which + /// this Cmask matches. The size might be larger than + /// original color buffer pitch when called with + /// an unaligned pitch. + UINT_32 height; ///< Height in pixels, as above + UINT_32 baseAlign; ///< Base alignment + UINT_32 sliceSize; ///< Slice size, in bytes. + UINT_32 cmaskBytes; ///< Size in bytes of CMask buffer + UINT_32 metaBlkWidth; ///< Meta block width + UINT_32 metaBlkHeight; ///< Meta block height + + UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice + + ADDR2_META_MIP_INFO* pMipInfo; ///< CMASK mip information +} ADDR2_COMPUTE_CMASK_INFO_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeCmaskInfo +* +* @brief +* Compute Cmask pitch, height, base alignment and size in bytes from color buffer +* info +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, + ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for Addr2ComputeCmaskAddrFromCoord +* +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slices + + ADDR2_META_FLAGS cMaskFlags; ///< CMASK flags + ADDR2_SURFACE_FLAGS colorFlags; ///< Color surface flags + AddrResourceType resourceType; ///< Color surface type + AddrSwizzleMode swizzleMode; ///< FMask surface swizzle mode + + UINT_32 unalignedWidth; ///< Color surface original width (of mip0) + UINT_32 unalignedHeight; ///< Color surface original height (of mip0) + UINT_32 numSlices; ///< Color surface original slices (of mip0) + + UINT_32 numSamples; ///< Color surfae sample number + UINT_32 numFrags; ///< Color surface fragment number + + UINT_32 pipeXor; ///< pipe Xor setting +} ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for Addr2ComputeCmaskAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< CMASK address in bytes + UINT_32 bitPosition; ///< Bit position within addr, 0 or 4 +} ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeCmaskAddrFromCoord +* +* @brief +* Compute Cmask address according to coordinates (of MSAA color buffer) +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT +* +* @brief +* Input structure for Addr2ComputeCmaskCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< CMASK address in bytes + UINT_32 bitPosition; ///< Bit position within addr, 0 or 4 + + ADDR2_META_FLAGS cMaskFlags; ///< CMASK flags + ADDR2_SURFACE_FLAGS colorFlags; ///< Color surface flags + AddrResourceType resourceType; ///< Color surface type + AddrSwizzleMode swizzleMode; ///< FMask surface swizzle mode + + UINT_32 unalignedWidth; ///< Color surface original width (of mip0) + UINT_32 unalignedHeight; ///< Color surface original height (of mip0) + UINT_32 numSlices; ///< Color surface original slices (of mip0) + UINT_32 numMipLevels; ///< Color surface total mipmap levels. +} ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for Addr2ComputeCmaskCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slices + UINT_32 mipId; ///< mipmap level id +} ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeCmaskCoordFromAddr +* +* @brief +* Compute coordinates within color buffer (1st pixel of a micro tile) according to +* Cmask address +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// F-mask functions for Gfx9 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* ADDR2_FMASK_FLAGS +* +* @brief +* FMASK flags +**************************************************************************************************** +*/ +typedef union _ADDR2_FMASK_FLAGS +{ + struct + { + UINT_32 resolved : 1; ///< TRUE if this is a resolved fmask, used by H/W clients + /// by H/W clients. S/W should always set it to FALSE. + UINT_32 reserved : 31; ///< Reserved for future use. + }; + + UINT_32 value; +} ADDR2_FMASK_FLAGS; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_FMASK_INFO_INPUT +* +* @brief +* Input structure for Addr2ComputeFmaskInfo +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_FMASK_INFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrSwizzleMode swizzleMode; ///< FMask surface swizzle mode + UINT_32 unalignedWidth; ///< Color surface original width + UINT_32 unalignedHeight; ///< Color surface original height + UINT_32 numSlices; ///< Number of slices/depth + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + ADDR2_FMASK_FLAGS fMaskFlags; ///< FMASK flags +} ADDR2_COMPUTE_FMASK_INFO_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_FMASK_INFO_OUTPUT +* +* @brief +* Output structure for Addr2ComputeFmaskInfo +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_FMASK_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch of fmask in pixels + UINT_32 height; ///< Height of fmask in pixels + UINT_32 baseAlign; ///< Base alignment + UINT_32 numSlices; ///< Slices of fmask + UINT_32 fmaskBytes; ///< Size of fmask in bytes + UINT_32 bpp; ///< Bits per pixel of FMASK is: number of bit planes + UINT_32 numSamples; ///< Number of samples + UINT_32 sliceSize; ///< Size of slice in bytes +} ADDR2_COMPUTE_FMASK_INFO_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeFmaskInfo +* +* @brief +* Compute Fmask pitch/height/slices/alignments and size in bytes +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR2_COMPUTE_FMASK_INFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for Addr2ComputeFmaskAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrSwizzleMode swizzleMode; ///< FMask surface swizzle mode + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index + UINT_32 sample; ///< Sample index (fragment index for EQAA) + UINT_32 plane; ///< Plane number + + UINT_32 unalignedWidth; ///< Color surface original width + UINT_32 unalignedHeight; ///< Color surface original height + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + UINT_32 tileSwizzle; ///< Combined swizzle used to do bank/pipe rotation + + ADDR2_FMASK_FLAGS fMaskFlags; ///< FMASK flags +} ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for Addr2ComputeFmaskAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Fmask address + UINT_32 bitPosition; ///< Bit position within fmaskAddr, 0-7. +} ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeFmaskAddrFromCoord +* +* @brief +* Compute Fmask address according to coordinates (x,y,slice,sample,plane) +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT +* +* @brief +* Input structure for Addr2ComputeFmaskCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address + UINT_32 bitPosition; ///< Bit position within addr, 0-7. + AddrSwizzleMode swizzleMode; ///< FMask surface swizzle mode + + UINT_32 unalignedWidth; ///< Color surface original width + UINT_32 unalignedHeight; ///< Color surface original height + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments + + UINT_32 tileSwizzle; ///< Combined swizzle used to do bank/pipe rotation + + ADDR2_FMASK_FLAGS fMaskFlags; ///< FMASK flags +} ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for Addr2ComputeFmaskCoordFromAddr +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index + UINT_32 sample; ///< Sample index (fragment index for EQAA) + UINT_32 plane; ///< Plane number +} ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeFmaskCoordFromAddr +* +* @brief +* Compute FMASK coordinate from an given address +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// DCC key functions for Gfx9 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* _ADDR2_COMPUTE_DCCINFO_INPUT +* +* @brief +* Input structure of Addr2ComputeDccInfo +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_DCCINFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR2_META_FLAGS dccKeyFlags; ///< DCC key flags + ADDR2_SURFACE_FLAGS colorFlags; ///< Color surface flags + AddrResourceType resourceType; ///< Color surface type + AddrSwizzleMode swizzleMode; ///< Color surface swizzle mode + UINT_32 bpp; ///< bits per pixel + UINT_32 unalignedWidth; ///< Color surface original width (of mip0) + UINT_32 unalignedHeight; ///< Color surface original height (of mip0) + UINT_32 numSlices; ///< Number of slices, of color surface (of mip0) + UINT_32 numFrags; ///< Fragment number of color surface + UINT_32 numMipLevels; ///< Total mipmap levels of color surface + UINT_32 dataSurfaceSize; ///< The padded size of all slices and mip levels + ///< useful in meta linear case + UINT_32 firstMipIdInTail; ///< The id of first mip in tail, if no mip is in tail, + /// it should be number of mip levels +} ADDR2_COMPUTE_DCCINFO_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_DCCINFO_OUTPUT +* +* @brief +* Output structure of Addr2ComputeDccInfo +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_DCCINFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 dccRamBaseAlign; ///< Base alignment of dcc key + UINT_32 dccRamSize; ///< Size of dcc key + + UINT_32 pitch; ///< DCC surface mip chain pitch + UINT_32 height; ///< DCC surface mip chain height + UINT_32 depth; ///< DCC surface mip chain depth + + UINT_32 compressBlkWidth; ///< DCC compress block width + UINT_32 compressBlkHeight; ///< DCC compress block height + UINT_32 compressBlkDepth; ///< DCC compress block depth + + UINT_32 metaBlkWidth; ///< DCC meta block width + UINT_32 metaBlkHeight; ///< DCC meta block height + UINT_32 metaBlkDepth; ///< DCC meta block depth + + UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice + + union + { + UINT_32 fastClearSizePerSlice; ///< Size of DCC within a slice should be fast cleared + UINT_32 dccRamSliceSize; ///< DCC ram size per slice. For mipmap, it's + /// the slize size of a mip chain, the thickness of a + /// a slice is meta block depth + }; + + ADDR2_META_MIP_INFO* pMipInfo; ///< DCC mip information +} ADDR2_COMPUTE_DCCINFO_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeDccInfo +* +* @brief +* Compute DCC key size, base alignment +* info +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccInfo( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for Addr2ComputeDccAddrFromCoord +* +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slices + UINT_32 sample; ///< Index of samples, means fragment index for EQAA + UINT_32 mipId; ///< mipmap level id + + ADDR2_META_FLAGS dccKeyFlags; ///< DCC flags + ADDR2_SURFACE_FLAGS colorFlags; ///< Color surface flags + AddrResourceType resourceType; ///< Color surface type + AddrSwizzleMode swizzleMode; ///< Color surface swizzle mode + UINT_32 bpp; ///< Color surface bits per pixel + UINT_32 unalignedWidth; ///< Color surface original width (of mip0) + UINT_32 unalignedHeight; ///< Color surface original height (of mip0) + UINT_32 numSlices; ///< Color surface original slices (of mip0) + UINT_32 numMipLevels; ///< Color surface mipmap levels + UINT_32 numFrags; ///< Color surface fragment number + + UINT_32 pipeXor; ///< pipe Xor setting +} ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for Addr2ComputeDccAddrFromCoord +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< DCC address in bytes +} ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeDccAddrFromCoord +* +* @brief +* Compute DCC address according to coordinates (of MSAA color buffer) +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut); + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Misc functions for Gfx9 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_PIPEBANKXOR_INPUT +* +* @brief +* Input structure of Addr2ComputePipebankXor +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_PIPEBANKXOR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_32 surfIndex; ///< Input surface index + ADDR2_SURFACE_FLAGS flags; ///< Surface flag + AddrSwizzleMode swizzleMode; ///< Surface swizzle mode + AddrResourceType resourceType; ///< Surface resource type + AddrFormat format; ///< Surface format + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA +} ADDR2_COMPUTE_PIPEBANKXOR_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT +* +* @brief +* Output structure of Addr2ComputePipebankXor +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_32 pipeBankXor; ///< Pipe bank xor +} ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputePipeBankXor +* +* @brief +* Calculate a valid bank pipe xor value for client to use. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputePipeBankXor( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT +* +* @brief +* Input structure of Addr2ComputeSlicePipeBankXor +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + AddrSwizzleMode swizzleMode; ///< Surface swizzle mode + AddrResourceType resourceType; ///< Surface resource type + UINT_32 basePipeBankXor; ///< Base pipe bank xor + UINT_32 slice; ///< Slice id + UINT_32 numSamples; ///< Number of samples +} ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT +* +* @brief +* Output structure of Addr2ComputeSlicePipeBankXor +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_32 pipeBankXor; ///< Pipe bank xor +} ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeSlicePipeBankXor +* +* @brief +* Calculate slice pipe bank xor value based on base pipe bank xor and slice id. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSlicePipeBankXor( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT +* +* @brief +* Input structure of Addr2ComputeSubResourceOffsetForSwizzlePattern +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + AddrSwizzleMode swizzleMode; ///< Surface swizzle mode + AddrResourceType resourceType; ///< Surface resource type + UINT_32 pipeBankXor; ///< Per resource xor + UINT_32 slice; ///< Slice id + UINT_64 sliceSize; ///< Slice size of a mip chain + UINT_64 macroBlockOffset; ///< Macro block offset, returned in ADDR2_MIP_INFO + UINT_32 mipTailOffset; ///< Mip tail offset, returned in ADDR2_MIP_INFO +} ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT; + +/** +**************************************************************************************************** +* ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT +* +* @brief +* Output structure of Addr2ComputeSubResourceOffsetForSwizzlePattern +**************************************************************************************************** +*/ +typedef struct _ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_64 offset; ///< offset +} ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT; + +/** +**************************************************************************************************** +* Addr2ComputeSubResourceOffsetForSwizzlePattern +* +* @brief +* Calculate sub resource offset to support swizzle pattern. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSubResourceOffsetForSwizzlePattern( + ADDR_HANDLE hLib, + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR2_BLOCK_SET +* +* @brief +* Bit field that defines block type +**************************************************************************************************** +*/ +typedef union _ADDR2_BLOCK_SET +{ + struct + { + UINT_32 micro : 1; // 256B block for 2D resource + UINT_32 macroThin4KB : 1; // Thin 4KB for 2D/3D resource + UINT_32 macroThick4KB : 1; // Thick 4KB for 3D resource + UINT_32 macroThin64KB : 1; // Thin 64KB for 2D/3D resource + UINT_32 macroThick64KB : 1; // Thick 64KB for 3D resource + UINT_32 var : 1; // VAR block + UINT_32 linear : 1; // Linear block + UINT_32 reserved : 25; + }; + + UINT_32 value; +} ADDR2_BLOCK_SET; + +/** +**************************************************************************************************** +* ADDR2_SWTYPE_SET +* +* @brief +* Bit field that defines swizzle type +**************************************************************************************************** +*/ +typedef union _ADDR2_SWTYPE_SET +{ + struct + { + UINT_32 sw_Z : 1; // SW_*_Z_* + UINT_32 sw_S : 1; // SW_*_S_* + UINT_32 sw_D : 1; // SW_*_D_* + UINT_32 sw_R : 1; // SW_*_R_* + UINT_32 reserved : 28; + }; + + UINT_32 value; +} ADDR2_SWTYPE_SET; + +/** +**************************************************************************************************** +* ADDR2_SWMODE_SET +* +* @brief +* Bit field that defines swizzle type +**************************************************************************************************** +*/ +typedef union _ADDR2_SWMODE_SET +{ + struct + { + UINT_32 swLinear : 1; + UINT_32 sw256B_S : 1; + UINT_32 sw256B_D : 1; + UINT_32 sw256B_R : 1; + UINT_32 sw4KB_Z : 1; + UINT_32 sw4KB_S : 1; + UINT_32 sw4KB_D : 1; + UINT_32 sw4KB_R : 1; + UINT_32 sw64KB_Z : 1; + UINT_32 sw64KB_S : 1; + UINT_32 sw64KB_D : 1; + UINT_32 sw64KB_R : 1; + UINT_32 swReserved0 : 1; + UINT_32 swReserved1 : 1; + UINT_32 swReserved2 : 1; + UINT_32 swReserved3 : 1; + UINT_32 sw64KB_Z_T : 1; + UINT_32 sw64KB_S_T : 1; + UINT_32 sw64KB_D_T : 1; + UINT_32 sw64KB_R_T : 1; + UINT_32 sw4KB_Z_X : 1; + UINT_32 sw4KB_S_X : 1; + UINT_32 sw4KB_D_X : 1; + UINT_32 sw4KB_R_X : 1; + UINT_32 sw64KB_Z_X : 1; + UINT_32 sw64KB_S_X : 1; + UINT_32 sw64KB_D_X : 1; + UINT_32 sw64KB_R_X : 1; + UINT_32 swVar_Z_X : 1; + UINT_32 swReserved4 : 1; + UINT_32 swReserved5 : 1; + UINT_32 swVar_R_X : 1; + }; + + UINT_32 value; +} ADDR2_SWMODE_SET; + +/** +**************************************************************************************************** +* ADDR2_GET_PREFERRED_SURF_SETTING_INPUT +* +* @brief +* Input structure of Addr2GetPreferredSurfaceSetting +**************************************************************************************************** +*/ +typedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR2_SURFACE_FLAGS flags; ///< Surface flags + AddrResourceType resourceType; ///< Surface type + AddrFormat format; ///< Surface format + AddrResrouceLocation resourceLoction; ///< Surface heap choice + ADDR2_BLOCK_SET forbiddenBlock; ///< Client can use it to disable some block setting + ///< such as linear for DXTn, tiled for YUV + ADDR2_SWTYPE_SET preferredSwSet; ///< Client can use it to specify sw type(s) wanted + BOOL_32 noXor; ///< Do not use xor mode for this resource + UINT_32 bpp; ///< bits per pixel + UINT_32 width; ///< Width (of mip0), in pixels + UINT_32 height; ///< Height (of mip0), in pixels + UINT_32 numSlices; ///< Number surface slice/depth (of mip0), + UINT_32 numMipLevels; ///< Total mipmap levels. + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + UINT_32 maxAlign; ///< maximum base/size alignment requested by client + UINT_32 minSizeAlign; ///< memory allocated for surface in client driver will + /// be padded to multiple of this value (in bytes) +} ADDR2_GET_PREFERRED_SURF_SETTING_INPUT; + +/** +**************************************************************************************************** +* ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT +* +* @brief +* Output structure of Addr2GetPreferredSurfaceSetting +**************************************************************************************************** +*/ +typedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrSwizzleMode swizzleMode; ///< Suggested swizzle mode to be used + AddrResourceType resourceType; ///< Suggested resource type to program HW + ADDR2_BLOCK_SET validBlockSet; ///< Valid block type bit conbination + BOOL_32 canXor; ///< If client can use xor on a valid macro block + /// type + ADDR2_SWTYPE_SET validSwTypeSet; ///< Valid swizzle type bit combination + ADDR2_SWTYPE_SET clientPreferredSwSet; ///< Client-preferred swizzle type bit combination + ADDR2_SWMODE_SET validSwModeSet; ///< Valid swizzle mode bit combination +} ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT; + +/** +**************************************************************************************************** +* Addr2GetPreferredSurfaceSetting +* +* @brief +* Suggest a preferred setting for client driver to program HW register +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2GetPreferredSurfaceSetting( + ADDR_HANDLE hLib, + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut); + +/** +**************************************************************************************************** +* Addr2IsValidDisplaySwizzleMode +* +* @brief +* Return whether the swizzle mode is supported by DCE / DCN. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode( + ADDR_HANDLE hLib, + AddrSwizzleMode swizzleMode, + UINT_32 bpp, + bool *result); + +#if defined(__cplusplus) +} +#endif + +#endif // __ADDR_INTERFACE_H__ diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/inc/addrtypes.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/inc/addrtypes.h new file mode 100644 index 0000000000..5f2de8df13 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/inc/addrtypes.h @@ -0,0 +1,754 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrtypes.h +* @brief Contains the helper function and constants +**************************************************************************************************** +*/ +#ifndef __ADDR_TYPES_H__ +#define __ADDR_TYPES_H__ + +#if defined(__APPLE__) && !defined(HAVE_TSERVER) +// External definitions header maintained by Apple driver team, but not for diag team under Mac. +// Helps address compilation issues & reduces code covered by NDA +#include "addrExtDef.h" + +#else + +// Windows and/or Linux +#if !defined(VOID) +typedef void VOID; +#endif + +#if !defined(FLOAT) +typedef float FLOAT; +#endif + +#if !defined(CHAR) +typedef char CHAR; +#endif + +#if !defined(INT) +typedef int INT; +#endif + +#include // va_list...etc need this header + +#endif // defined (__APPLE__) && !defined(HAVE_TSERVER) + +/** +**************************************************************************************************** +* Calling conventions +**************************************************************************************************** +*/ +#ifndef ADDR_CDECL + #if defined(__GNUC__) + #define ADDR_CDECL __attribute__((cdecl)) + #else + #define ADDR_CDECL __cdecl + #endif +#endif + +#ifndef ADDR_STDCALL + #if defined(__GNUC__) + #if defined(__amd64__) || defined(__x86_64__) + #define ADDR_STDCALL + #else + #define ADDR_STDCALL __attribute__((stdcall)) + #endif + #else + #define ADDR_STDCALL __stdcall + #endif +#endif + +#ifndef ADDR_FASTCALL + #if defined(BRAHMA_ARM) + #define ADDR_FASTCALL + #elif defined(__GNUC__) + #define ADDR_FASTCALL __attribute__((regparm(0))) + #else + #define ADDR_FASTCALL __fastcall + #endif +#endif + +#ifndef GC_CDECL + #define GC_CDECL ADDR_CDECL +#endif + +#ifndef GC_STDCALL + #define GC_STDCALL ADDR_STDCALL +#endif + +#ifndef GC_FASTCALL + #define GC_FASTCALL ADDR_FASTCALL +#endif + +#if defined(__GNUC__) + #define ADDR_INLINE static inline // inline needs to be static to link +#else + // win32, win64, other platforms + #define ADDR_INLINE __inline +#endif // #if defined(__GNUC__) + +#define ADDR_API ADDR_FASTCALL //default call convention is fast call + +/** +**************************************************************************************************** +* Global defines used by other modules +**************************************************************************************************** +*/ +#if !defined(TILEINDEX_INVALID) +#define TILEINDEX_INVALID -1 +#endif + +#if !defined(TILEINDEX_LINEAR_GENERAL) +#define TILEINDEX_LINEAR_GENERAL -2 +#endif + +#if !defined(TILEINDEX_LINEAR_ALIGNED) +#define TILEINDEX_LINEAR_ALIGNED 8 +#endif + +/** +**************************************************************************************************** +* Return codes +**************************************************************************************************** +*/ +typedef enum _ADDR_E_RETURNCODE +{ + // General Return + ADDR_OK = 0, + ADDR_ERROR = 1, + + // Specific Errors + ADDR_OUTOFMEMORY, + ADDR_INVALIDPARAMS, + ADDR_NOTSUPPORTED, + ADDR_NOTIMPLEMENTED, + ADDR_PARAMSIZEMISMATCH, + ADDR_INVALIDGBREGVALUES, + +} ADDR_E_RETURNCODE; + +/** +**************************************************************************************************** +* @brief +* Neutral enums that define tile modes for all H/W +* @note +* R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from +* ADDR_TM_2D_TILED_XTHICK +* +**************************************************************************************************** +*/ +typedef enum _AddrTileMode +{ + ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer + ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels + ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles + ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles + ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles + ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4 + ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16 + ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles + ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap + ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4 + ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16 + ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles + ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices + ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick + ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap + ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick + ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI + ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI + ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI + ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size + ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only + ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only + ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size + ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only + ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only + ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib + ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode +} AddrTileMode; + +/** +**************************************************************************************************** +* @brief +* Neutral enums that define swizzle modes for Gfx9+ ASIC +* @note +* +* ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resource +* ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resource +* ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resource +* ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resource +* +* ADDR_SW_*_Z For GFX9: + - for 2D resource, represents Z-order swizzle mode for depth/stencil/FMask + - for 3D resource, represents a swizzle mode similar to legacy thick tile mode + For GFX10: + - represents Z-order swizzle mode for depth/stencil/FMask +* ADDR_SW_*_S For GFX9+: + - represents standard swizzle mode defined by MS +* ADDR_SW_*_D For GFX9: + - for 2D resource, represents a swizzle mode for displayable resource +* - for 3D resource, represents a swizzle mode which places each slice in order & pixel + For GFX10: + - for 2D resource, represents a swizzle mode for displayable resource + - for 3D resource, represents a swizzle mode similar to legacy thick tile mode + within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible! +* ADDR_SW_*_R For GFX9: + - 2D resource only, represents a swizzle mode for rotated displayable resource + For GFX10: + - represents a swizzle mode for render target resource +* +**************************************************************************************************** +*/ +typedef enum _AddrSwizzleMode +{ + ADDR_SW_LINEAR = 0, + ADDR_SW_256B_S = 1, + ADDR_SW_256B_D = 2, + ADDR_SW_256B_R = 3, + ADDR_SW_4KB_Z = 4, + ADDR_SW_4KB_S = 5, + ADDR_SW_4KB_D = 6, + ADDR_SW_4KB_R = 7, + ADDR_SW_64KB_Z = 8, + ADDR_SW_64KB_S = 9, + ADDR_SW_64KB_D = 10, + ADDR_SW_64KB_R = 11, + ADDR_SW_RESERVED0 = 12, + ADDR_SW_RESERVED1 = 13, + ADDR_SW_RESERVED2 = 14, + ADDR_SW_RESERVED3 = 15, + ADDR_SW_64KB_Z_T = 16, + ADDR_SW_64KB_S_T = 17, + ADDR_SW_64KB_D_T = 18, + ADDR_SW_64KB_R_T = 19, + ADDR_SW_4KB_Z_X = 20, + ADDR_SW_4KB_S_X = 21, + ADDR_SW_4KB_D_X = 22, + ADDR_SW_4KB_R_X = 23, + ADDR_SW_64KB_Z_X = 24, + ADDR_SW_64KB_S_X = 25, + ADDR_SW_64KB_D_X = 26, + ADDR_SW_64KB_R_X = 27, + ADDR_SW_VAR_Z_X = 28, + ADDR_SW_RESERVED4 = 29, + ADDR_SW_RESERVED5 = 30, + ADDR_SW_VAR_R_X = 31, + ADDR_SW_LINEAR_GENERAL = 32, + + // Used for represent block with identical size + ADDR_SW_256B = ADDR_SW_256B_S, + ADDR_SW_4KB = ADDR_SW_4KB_S_X, + ADDR_SW_64KB = ADDR_SW_64KB_S_X, + ADDR_SW_VAR = ADDR_SW_RESERVED4, + ADDR_SW_MAX_TYPE = 33, +} AddrSwizzleMode; + +/** +**************************************************************************************************** +* @brief +* Neutral enums that define image type +* @note +* this is new for address library interface version 2 +* +**************************************************************************************************** +*/ +typedef enum _AddrResourceType +{ + ADDR_RSRC_TEX_1D = 0, + ADDR_RSRC_TEX_2D = 1, + ADDR_RSRC_TEX_3D = 2, + ADDR_RSRC_MAX_TYPE = 3, +} AddrResourceType; + +/** +**************************************************************************************************** +* @brief +* Neutral enums that define resource heap location +* @note +* this is new for address library interface version 2 +* +**************************************************************************************************** +*/ +typedef enum _AddrResrouceLocation +{ + ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown + ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap + ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap + ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap + ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only + ADDR_RSRC_LOC_MAX_TYPE = 5, +} AddrResrouceLocation; + +/** +**************************************************************************************************** +* @brief +* Neutral enums that define resource basic swizzle mode +* @note +* this is new for address library interface version 2 +* +**************************************************************************************************** +*/ +typedef enum _AddrSwType +{ + ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder + ADDR_SW_S = 1, // Resource basic swizzle mode is Standard + ADDR_SW_D = 2, // Resource basic swizzle mode is Display + ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated/Render optimized + ADDR_SW_L = 4, // Resource basic swizzle mode is Linear + ADDR_SW_MAX_SWTYPE +} AddrSwType; + +/** +**************************************************************************************************** +* @brief +* Neutral enums that define mipmap major mode +* @note +* this is new for address library interface version 2 +* +**************************************************************************************************** +*/ +typedef enum _AddrMajorMode +{ + ADDR_MAJOR_X = 0, + ADDR_MAJOR_Y = 1, + ADDR_MAJOR_Z = 2, + ADDR_MAJOR_MAX_TYPE = 3, +} AddrMajorMode; + +/** +**************************************************************************************************** +* AddrFormat +* +* @brief +* Neutral enum for SurfaceFormat +* +**************************************************************************************************** +*/ +typedef enum _AddrFormat { + ADDR_FMT_INVALID = 0x00000000, + ADDR_FMT_8 = 0x00000001, + ADDR_FMT_4_4 = 0x00000002, + ADDR_FMT_3_3_2 = 0x00000003, + ADDR_FMT_RESERVED_4 = 0x00000004, + ADDR_FMT_16 = 0x00000005, + ADDR_FMT_16_FLOAT = ADDR_FMT_16, + ADDR_FMT_8_8 = 0x00000007, + ADDR_FMT_5_6_5 = 0x00000008, + ADDR_FMT_6_5_5 = 0x00000009, + ADDR_FMT_1_5_5_5 = 0x0000000a, + ADDR_FMT_4_4_4_4 = 0x0000000b, + ADDR_FMT_5_5_5_1 = 0x0000000c, + ADDR_FMT_32 = 0x0000000d, + ADDR_FMT_32_FLOAT = ADDR_FMT_32, + ADDR_FMT_16_16 = 0x0000000f, + ADDR_FMT_16_16_FLOAT = ADDR_FMT_16_16, + ADDR_FMT_8_24 = 0x00000011, + ADDR_FMT_8_24_FLOAT = ADDR_FMT_8_24, + ADDR_FMT_24_8 = 0x00000013, + ADDR_FMT_24_8_FLOAT = ADDR_FMT_24_8, + ADDR_FMT_10_11_11 = 0x00000015, + ADDR_FMT_10_11_11_FLOAT = ADDR_FMT_10_11_11, + ADDR_FMT_11_11_10 = 0x00000017, + ADDR_FMT_11_11_10_FLOAT = ADDR_FMT_11_11_10, + ADDR_FMT_2_10_10_10 = 0x00000019, + ADDR_FMT_8_8_8_8 = 0x0000001a, + ADDR_FMT_10_10_10_2 = 0x0000001b, + ADDR_FMT_X24_8_32_FLOAT = 0x0000001c, + ADDR_FMT_32_32 = 0x0000001d, + ADDR_FMT_32_32_FLOAT = ADDR_FMT_32_32, + ADDR_FMT_16_16_16_16 = 0x0000001f, + ADDR_FMT_16_16_16_16_FLOAT = ADDR_FMT_16_16_16_16, + ADDR_FMT_RESERVED_33 = 0x00000021, + ADDR_FMT_32_32_32_32 = 0x00000022, + ADDR_FMT_32_32_32_32_FLOAT = ADDR_FMT_32_32_32_32, + ADDR_FMT_RESERVED_36 = 0x00000024, + ADDR_FMT_1 = 0x00000025, + ADDR_FMT_1_REVERSED = 0x00000026, + ADDR_FMT_GB_GR = 0x00000027, + ADDR_FMT_BG_RG = 0x00000028, + ADDR_FMT_32_AS_8 = 0x00000029, + ADDR_FMT_32_AS_8_8 = 0x0000002a, + ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b, + ADDR_FMT_8_8_8 = 0x0000002c, + ADDR_FMT_16_16_16 = 0x0000002d, + ADDR_FMT_16_16_16_FLOAT = ADDR_FMT_16_16_16, + ADDR_FMT_32_32_32 = 0x0000002f, + ADDR_FMT_32_32_32_FLOAT = ADDR_FMT_32_32_32, + ADDR_FMT_BC1 = 0x00000031, + ADDR_FMT_BC2 = 0x00000032, + ADDR_FMT_BC3 = 0x00000033, + ADDR_FMT_BC4 = 0x00000034, + ADDR_FMT_BC5 = 0x00000035, + ADDR_FMT_BC6 = 0x00000036, + ADDR_FMT_BC7 = 0x00000037, + ADDR_FMT_32_AS_32_32_32_32 = 0x00000038, + ADDR_FMT_APC3 = 0x00000039, + ADDR_FMT_APC4 = 0x0000003a, + ADDR_FMT_APC5 = 0x0000003b, + ADDR_FMT_APC6 = 0x0000003c, + ADDR_FMT_APC7 = 0x0000003d, + ADDR_FMT_CTX1 = 0x0000003e, + ADDR_FMT_RESERVED_63 = 0x0000003f, + ADDR_FMT_ASTC_4x4 = 0x00000040, + ADDR_FMT_ASTC_5x4 = 0x00000041, + ADDR_FMT_ASTC_5x5 = 0x00000042, + ADDR_FMT_ASTC_6x5 = 0x00000043, + ADDR_FMT_ASTC_6x6 = 0x00000044, + ADDR_FMT_ASTC_8x5 = 0x00000045, + ADDR_FMT_ASTC_8x6 = 0x00000046, + ADDR_FMT_ASTC_8x8 = 0x00000047, + ADDR_FMT_ASTC_10x5 = 0x00000048, + ADDR_FMT_ASTC_10x6 = 0x00000049, + ADDR_FMT_ASTC_10x8 = 0x0000004a, + ADDR_FMT_ASTC_10x10 = 0x0000004b, + ADDR_FMT_ASTC_12x10 = 0x0000004c, + ADDR_FMT_ASTC_12x12 = 0x0000004d, + ADDR_FMT_ETC2_64BPP = 0x0000004e, + ADDR_FMT_ETC2_128BPP = 0x0000004f, +} AddrFormat; + +/** +**************************************************************************************************** +* AddrDepthFormat +* +* @brief +* Neutral enum for addrFlt32ToDepthPixel +* +**************************************************************************************************** +*/ +typedef enum _AddrDepthFormat +{ + ADDR_DEPTH_INVALID = 0x00000000, + ADDR_DEPTH_16 = 0x00000001, + ADDR_DEPTH_X8_24 = 0x00000002, + ADDR_DEPTH_8_24 = 0x00000003, + ADDR_DEPTH_X8_24_FLOAT = 0x00000004, + ADDR_DEPTH_8_24_FLOAT = 0x00000005, + ADDR_DEPTH_32_FLOAT = 0x00000006, + ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007, + +} AddrDepthFormat; + +/** +**************************************************************************************************** +* AddrColorFormat +* +* @brief +* Neutral enum for ColorFormat +* +**************************************************************************************************** +*/ +typedef enum _AddrColorFormat +{ + ADDR_COLOR_INVALID = 0x00000000, + ADDR_COLOR_8 = 0x00000001, + ADDR_COLOR_4_4 = 0x00000002, + ADDR_COLOR_3_3_2 = 0x00000003, + ADDR_COLOR_RESERVED_4 = 0x00000004, + ADDR_COLOR_16 = 0x00000005, + ADDR_COLOR_16_FLOAT = 0x00000006, + ADDR_COLOR_8_8 = 0x00000007, + ADDR_COLOR_5_6_5 = 0x00000008, + ADDR_COLOR_6_5_5 = 0x00000009, + ADDR_COLOR_1_5_5_5 = 0x0000000a, + ADDR_COLOR_4_4_4_4 = 0x0000000b, + ADDR_COLOR_5_5_5_1 = 0x0000000c, + ADDR_COLOR_32 = 0x0000000d, + ADDR_COLOR_32_FLOAT = 0x0000000e, + ADDR_COLOR_16_16 = 0x0000000f, + ADDR_COLOR_16_16_FLOAT = 0x00000010, + ADDR_COLOR_8_24 = 0x00000011, + ADDR_COLOR_8_24_FLOAT = 0x00000012, + ADDR_COLOR_24_8 = 0x00000013, + ADDR_COLOR_24_8_FLOAT = 0x00000014, + ADDR_COLOR_10_11_11 = 0x00000015, + ADDR_COLOR_10_11_11_FLOAT = 0x00000016, + ADDR_COLOR_11_11_10 = 0x00000017, + ADDR_COLOR_11_11_10_FLOAT = 0x00000018, + ADDR_COLOR_2_10_10_10 = 0x00000019, + ADDR_COLOR_8_8_8_8 = 0x0000001a, + ADDR_COLOR_10_10_10_2 = 0x0000001b, + ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c, + ADDR_COLOR_32_32 = 0x0000001d, + ADDR_COLOR_32_32_FLOAT = 0x0000001e, + ADDR_COLOR_16_16_16_16 = 0x0000001f, + ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020, + ADDR_COLOR_RESERVED_33 = 0x00000021, + ADDR_COLOR_32_32_32_32 = 0x00000022, + ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023, +} AddrColorFormat; + +/** +**************************************************************************************************** +* AddrSurfaceNumber +* +* @brief +* Neutral enum for SurfaceNumber +* +**************************************************************************************************** +*/ +typedef enum _AddrSurfaceNumber { + ADDR_NUMBER_UNORM = 0x00000000, + ADDR_NUMBER_SNORM = 0x00000001, + ADDR_NUMBER_USCALED = 0x00000002, + ADDR_NUMBER_SSCALED = 0x00000003, + ADDR_NUMBER_UINT = 0x00000004, + ADDR_NUMBER_SINT = 0x00000005, + ADDR_NUMBER_SRGB = 0x00000006, + ADDR_NUMBER_FLOAT = 0x00000007, +} AddrSurfaceNumber; + +/** +**************************************************************************************************** +* AddrSurfaceSwap +* +* @brief +* Neutral enum for SurfaceSwap +* +**************************************************************************************************** +*/ +typedef enum _AddrSurfaceSwap { + ADDR_SWAP_STD = 0x00000000, + ADDR_SWAP_ALT = 0x00000001, + ADDR_SWAP_STD_REV = 0x00000002, + ADDR_SWAP_ALT_REV = 0x00000003, +} AddrSurfaceSwap; + +/** +**************************************************************************************************** +* AddrHtileBlockSize +* +* @brief +* Size of HTILE blocks, valid values are 4 or 8 for now +**************************************************************************************************** +*/ +typedef enum _AddrHtileBlockSize +{ + ADDR_HTILE_BLOCKSIZE_4 = 4, + ADDR_HTILE_BLOCKSIZE_8 = 8, +} AddrHtileBlockSize; + +/** +**************************************************************************************************** +* AddrPipeCfg +* +* @brief +* The pipe configuration field specifies both the number of pipes and +* how pipes are interleaved on the surface. +* The expression of number of pipes, the shader engine tile size, and packer tile size +* is encoded in a PIPE_CONFIG register field. +* In general the number of pipes usually matches the number of memory channels of the +* hardware configuration. +* For hw configurations w/ non-pow2 memory number of memory channels, it usually matches +* the number of ROP units(? TODO: which registers??) +* The enum value = hw enum + 1 which is to reserve 0 for requesting default. +**************************************************************************************************** +*/ +typedef enum _AddrPipeCfg +{ + ADDR_PIPECFG_INVALID = 0, + ADDR_PIPECFG_P2 = 1, /// 2 pipes, + ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes, + ADDR_PIPECFG_P4_16x16 = 6, + ADDR_PIPECFG_P4_16x32 = 7, + ADDR_PIPECFG_P4_32x32 = 8, + ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes + ADDR_PIPECFG_P8_16x32_8x16 = 10, + ADDR_PIPECFG_P8_32x32_8x16 = 11, + ADDR_PIPECFG_P8_16x32_16x16 = 12, + ADDR_PIPECFG_P8_32x32_16x16 = 13, + ADDR_PIPECFG_P8_32x32_16x32 = 14, + ADDR_PIPECFG_P8_32x64_32x32 = 15, + ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes + ADDR_PIPECFG_P16_32x32_16x16 = 18, + ADDR_PIPECFG_UNUSED = 19, + ADDR_PIPECFG_MAX = 20, +} AddrPipeCfg; + +/** +**************************************************************************************************** +* AddrTileType +* +* @brief +* Neutral enums that specifies micro tile type (MICRO_TILE_MODE) +**************************************************************************************************** +*/ +typedef enum _AddrTileType +{ + ADDR_DISPLAYABLE = 0, ///< Displayable tiling + ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling + ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order + ADDR_ROTATED = 3, ///< Rotated displayable tiling + ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK +} AddrTileType; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Type definitions: short system-independent names for address library types +// +//////////////////////////////////////////////////////////////////////////////////////////////////// + +#if !defined(__APPLE__) || defined(HAVE_TSERVER) + +#ifndef BOOL_32 // no bool type in C +/// @brief Boolean type, since none is defined in C +/// @ingroup type +#define BOOL_32 int +#endif + +#ifndef INT_32 +#define INT_32 int +#endif + +#ifndef UINT_32 +#define UINT_32 unsigned int +#endif + +#ifndef INT_16 +#define INT_16 short +#endif + +#ifndef UINT_16 +#define UINT_16 unsigned short +#endif + +#ifndef INT_8 +#define INT_8 char +#endif + +#ifndef UINT_8 +#define UINT_8 unsigned char +#endif + +#ifndef NULL +#define NULL 0 +#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +// +// 64-bit integer types depend on the compiler +// +#if defined( __GNUC__ ) || defined( __WATCOMC__ ) +#define INT_64 long long +#define UINT_64 unsigned long long + +#elif defined( _WIN32 ) +#define INT_64 __int64 +#define UINT_64 unsigned __int64 + +#else +#error Unsupported compiler and/or operating system for 64-bit integers + +/// @brief 64-bit signed integer type (compiler dependent) +/// @ingroup type +/// +/// The addrlib defines a 64-bit signed integer type for either +/// Gnu/Watcom compilers (which use the first syntax) or for +/// the Windows VCC compiler (which uses the second syntax). +#define INT_64 long long OR __int64 + +/// @brief 64-bit unsigned integer type (compiler dependent) +/// @ingroup type +/// +/// The addrlib defines a 64-bit unsigned integer type for either +/// Gnu/Watcom compilers (which use the first syntax) or for +/// the Windows VCC compiler (which uses the second syntax). +/// +#define UINT_64 unsigned long long OR unsigned __int64 +#endif + +#endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER) + +// ADDR64X is used to print addresses in hex form on both Windows and Linux +// +#if defined( __GNUC__ ) || defined( __WATCOMC__ ) +#define ADDR64X "llx" +#define ADDR64D "lld" + +#elif defined( _WIN32 ) +#define ADDR64X "I64x" +#define ADDR64D "I64d" + +#else +#error Unsupported compiler and/or operating system for 64-bit integers + +/// @brief Addrlib device address 64-bit printf tag (compiler dependent) +/// @ingroup type +/// +/// This allows printf to display an ADDR_64 for either the Windows VCC compiler +/// (which used this value) or the Gnu/Watcom compilers (which use "llx". +/// An example of use is printf("addr 0x%"ADDR64X"\n", address); +/// +#define ADDR64X "llx" OR "I64x" +#define ADDR64D "lld" OR "I64d" +#endif + +/// @brief Union for storing a 32-bit float or 32-bit integer +/// @ingroup type +/// +/// This union provides a simple way to convert between a 32-bit float +/// and a 32-bit integer. It also prevents the compiler from producing +/// code that alters NaN values when assiging or coying floats. +/// Therefore, all address library routines that pass or return 32-bit +/// floating point data do so by passing or returning a FLT_32. +/// +typedef union { + INT_32 i; + UINT_32 u; + float f; +} ADDR_FLT_32; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Macros for controlling linking and building on multiple systems +// +//////////////////////////////////////////////////////////////////////////////////////////////////// +#if defined(_MSC_VER) +#if defined(va_copy) +#undef va_copy //redefine va_copy to support VC2013 +#endif +#endif + +#if !defined(va_copy) +#define va_copy(dst, src) \ + ((void) memcpy(&(dst), &(src), sizeof(va_list))) +#endif + +#endif // __ADDR_TYPES_H__ + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/addrinterface.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/addrinterface.cpp new file mode 100644 index 0000000000..5256499b3b --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/addrinterface.cpp @@ -0,0 +1,1740 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrinterface.cpp +* @brief Contains the addrlib interface functions +**************************************************************************************************** +*/ +#include "addrinterface.h" +#include "addrlib1.h" +#include "addrlib2.h" + +#include "addrcommon.h" + +#include "util/macros.h" + +using namespace Addr; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Create/Destroy/Config functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* AddrCreate +* +* @brief +* Create address lib object +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrCreate( + const ADDR_CREATE_INPUT* pAddrCreateIn, ///< [in] infomation for creating address lib object + ADDR_CREATE_OUTPUT* pAddrCreateOut) ///< [out] address lib handle +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + { + returnCode = Lib::Create(pAddrCreateIn, pAddrCreateOut); + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrDestroy +* +* @brief +* Destroy address lib object +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrDestroy( + ADDR_HANDLE hLib) ///< address lib handle +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (hLib) + { + Lib* pLib = Lib::GetLib(hLib); + pLib->Destroy(); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* AddrComputeSurfaceInfo +* +* @brief +* Calculate surface width/height/depth/alignments and suitable tiling mode +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] surface information + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) ///< [out] surface parameters and alignments +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeSurfaceInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeSurfaceAddrFromCoord +* +* @brief +* Compute surface address according to coordinates +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] surface info and coordinates + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] surface address +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeSurfaceAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeSurfaceCoordFromAddr +* +* @brief +* Compute coordinates according to surface address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] surface info and address + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) ///< [out] coordinates +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeSurfaceCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// HTile functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* AddrComputeHtileInfo +* +* @brief +* Compute Htile pitch, height, base alignment and size in bytes +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] Htile information + ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) ///< [out] Htile pitch, height and size in bytes +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeHtileInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeHtileAddrFromCoord +* +* @brief +* Compute Htile address according to coordinates (of depth buffer) +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] Htile info and coordinates + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Htile address +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeHtileAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeHtileCoordFromAddr +* +* @brief +* Compute coordinates within depth buffer (1st pixel of a micro tile) according to +* Htile address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] Htile info and address + ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) ///< [out] Htile coordinates +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeHtileCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// C-mask functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* AddrComputeCmaskInfo +* +* @brief +* Compute Cmask pitch, height, base alignment and size in bytes from color buffer +* info +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] Cmask pitch and height + ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) ///< [out] Cmask pitch, height and size in bytes +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeCmaskInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeCmaskAddrFromCoord +* +* @brief +* Compute Cmask address according to coordinates (of MSAA color buffer) +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Cmask info and coordinates + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Cmask address +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeCmaskAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeCmaskCoordFromAddr +* +* @brief +* Compute coordinates within color buffer (1st pixel of a micro tile) according to +* Cmask address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Cmask info and address + ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Cmask coordinates +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeCmaskCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// F-mask functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* AddrComputeFmaskInfo +* +* @brief +* Compute Fmask pitch/height/depth/alignments and size in bytes +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] Fmask information + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) ///< [out] Fmask pitch and height +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeFmaskInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeFmaskAddrFromCoord +* +* @brief +* Compute Fmask address according to coordinates (x,y,slice,sample,plane) +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Fmask info and coordinates + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Fmask address +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeFmaskAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeFmaskCoordFromAddr +* +* @brief +* Compute coordinates (x,y,slice,sample,plane) according to Fmask address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Fmask info and address + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Fmask coordinates +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeFmaskCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// DCC key functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* AddrComputeDccInfo +* +* @brief +* Compute DCC key size, base alignment based on color surface size, tile info or tile index +* +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( + ADDR_HANDLE hLib, ///< handle of addrlib + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) ///< [out] output +{ + ADDR_E_RETURNCODE returnCode; + + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeDccInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/////////////////////////////////////////////////////////////////////////////// +// Below functions are element related or helper functions +/////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* AddrGetVersion +* +* @brief +* Get AddrLib version number. Client may check this return value against ADDRLIB_VERSION +* defined in addrinterface.h to see if there is a mismatch. +**************************************************************************************************** +*/ +UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib) +{ + UINT_32 version = 0; + + Addr::Lib* pLib = Lib::GetLib(hLib); + + ADDR_ASSERT(pLib != NULL); + + if (pLib) + { + version = pLib->GetVersion(); + } + + return version; +} + +/** +**************************************************************************************************** +* AddrUseTileIndex +* +* @brief +* Return TRUE if tileIndex is enabled in this address library +**************************************************************************************************** +*/ +BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib) +{ + BOOL_32 useTileIndex = FALSE; + + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_ASSERT(pLib != NULL); + + if (pLib) + { + useTileIndex = pLib->UseTileIndex(0); + } + + return useTileIndex; +} + +/** +**************************************************************************************************** +* AddrUseCombinedSwizzle +* +* @brief +* Return TRUE if combined swizzle is enabled in this address library +**************************************************************************************************** +*/ +BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib) +{ + BOOL_32 useCombinedSwizzle = FALSE; + + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_ASSERT(pLib != NULL); + + if (pLib) + { + useCombinedSwizzle = pLib->UseCombinedSwizzle(); + } + + return useCombinedSwizzle; +} + +/** +**************************************************************************************************** +* AddrExtractBankPipeSwizzle +* +* @brief +* Extract Bank and Pipe swizzle from base256b +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle( + ADDR_HANDLE hLib, ///< addrlib handle + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ExtractBankPipeSwizzle(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrCombineBankPipeSwizzle +* +* @brief +* Combine Bank and Pipe swizzle +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->CombineBankPipeSwizzle(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeSliceSwizzle +* +* @brief +* Compute a swizzle for slice from a base swizzle +* @return +* ADDR_OK if no error +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeSliceTileSwizzle(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputeBaseSwizzle +* +* @brief +* Return a Combined Bank and Pipe swizzle base on surface based on surface type/index +* @return +* ADDR_OK if no error +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeBaseSwizzle(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* ElemFlt32ToDepthPixel +* +* @brief +* Convert a FLT_32 value to a depth/stencil pixel value +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +* +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel( + ADDR_HANDLE hLib, ///< addrlib handle + const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, ///< [in] per-component value + ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) ///< [out] final pixel value +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + Lib* pLib = Lib::GetLib(hLib); + + if (pLib != NULL) + { + pLib->Flt32ToDepthPixel(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* ElemFlt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a red/green/blue/alpha pixel value +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +* +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel( + ADDR_HANDLE hLib, ///< addrlib handle + const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, ///< [in] format, surface number and swap value + ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) ///< [out] final pixel value +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + Lib* pLib = Lib::GetLib(hLib); + + if (pLib != NULL) + { + pLib->Flt32ToColorPixel(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* ElemGetExportNorm +* +* @brief +* Helper function to check one format can be EXPORT_NUM, +* which is a register CB_COLOR_INFO.SURFACE_FORMAT. +* FP16 can be reported as EXPORT_NORM for rv770 in r600 +* family +* +**************************************************************************************************** +*/ +BOOL_32 ADDR_API ElemGetExportNorm( + ADDR_HANDLE hLib, ///< addrlib handle + const ELEM_GETEXPORTNORM_INPUT* pIn) ///< [in] input structure +{ + Addr::Lib* pLib = Lib::GetLib(hLib); + BOOL_32 enabled = FALSE; + + ASSERTED ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + enabled = pLib->GetExportNorm(pIn); + } + else + { + returnCode = ADDR_ERROR; + } + + ADDR_ASSERT(returnCode == ADDR_OK); + + return enabled; +} + +/** +**************************************************************************************************** +* ElemSize +* +* @brief +* Get bits-per-element for specified format +* +* @return +* Bits-per-element of specified format +* +**************************************************************************************************** +*/ +UINT_32 ADDR_API ElemSize( + ADDR_HANDLE hLib, + AddrFormat format) +{ + UINT_32 bpe = 0; + + Addr::Lib* pLib = Lib::GetLib(hLib); + + if (pLib != NULL) + { + bpe = pLib->GetBpe(format); + } + + return bpe; +} + +/** +**************************************************************************************************** +* AddrConvertTileInfoToHW +* +* @brief +* Convert tile info from real value to hardware register value +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] tile info with real value + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) ///< [out] tile info with HW register value +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ConvertTileInfoToHW(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrConvertTileIndex +* +* @brief +* Convert tile index to tile mode/type/info +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_CONVERT_TILEINDEX_INPUT* pIn, ///< [in] input - tile index + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) ///< [out] tile mode/type/info +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ConvertTileIndex(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrGetMacroModeIndex +* +* @brief +* Get macro mode index based on input parameters +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetMacroModeIndex( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_GET_MACROMODEINDEX_INPUT* pIn, ///< [in] input + ADDR_GET_MACROMODEINDEX_OUTPUT* pOut) ///< [out] macro mode index +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode; + + if (pLib != NULL) + { + returnCode = pLib->GetMacroModeIndex(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrConvertTileIndex1 +* +* @brief +* Convert tile index to tile mode/type/info +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, ///< [in] input - tile index + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) ///< [out] tile mode/type/info +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ConvertTileIndex1(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrGetTileIndex +* +* @brief +* Get tile index from tile mode/type/info +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +* +* @note +* Only meaningful for SI (and above) +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex( + ADDR_HANDLE hLib, + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) +{ + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->GetTileIndex(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrComputePrtInfo +* +* @brief +* Interface function for ComputePrtInfo +* +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo( + ADDR_HANDLE hLib, + const ADDR_PRT_INFO_INPUT* pIn, + ADDR_PRT_INFO_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + V1::Lib* pLib = V1::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputePrtInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrGetMaxAlignments +* +* @brief +* Convert maximum alignments +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments( + ADDR_HANDLE hLib, ///< address lib handle + ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) ///< [out] output structure +{ + Addr::Lib* pLib = Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->GetMaxAlignments(pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* AddrGetMaxMetaAlignments +* +* @brief +* Convert maximum alignments for metadata +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments( + ADDR_HANDLE hLib, ///< address lib handle + ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) ///< [out] output structure +{ + Addr::Lib* pLib = Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->GetMaxMetaAlignments(pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface functions for Addr2 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Addr2ComputeSurfaceInfo +* +* @brief +* Calculate surface width/height/depth/alignments and suitable tiling mode +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] surface information + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) ///< [out] surface parameters and alignments +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeSurfaceInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeSurfaceAddrFromCoord +* +* @brief +* Compute surface address according to coordinates +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] surface info and coordinates + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] surface address +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeSurfaceAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeSurfaceCoordFromAddr +* +* @brief +* Compute coordinates according to surface address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] surface info and address + ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) ///< [out] coordinates +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeSurfaceCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// HTile functions for Addr2 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Addr2ComputeHtileInfo +* +* @brief +* Compute Htile pitch, height, base alignment and size in bytes +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] Htile information + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) ///< [out] Htile pitch, height and size in bytes +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeHtileInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeHtileAddrFromCoord +* +* @brief +* Compute Htile address according to coordinates (of depth buffer) +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] Htile info and coordinates + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Htile address +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeHtileAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeHtileCoordFromAddr +* +* @brief +* Compute coordinates within depth buffer (1st pixel of a micro tile) according to +* Htile address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] Htile info and address + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) ///< [out] Htile coordinates +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeHtileCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// C-mask functions for Addr2 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Addr2ComputeCmaskInfo +* +* @brief +* Compute Cmask pitch, height, base alignment and size in bytes from color buffer +* info +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] Cmask pitch and height + ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut) ///< [out] Cmask pitch, height and size in bytes +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeCmaskInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeCmaskAddrFromCoord +* +* @brief +* Compute Cmask address according to coordinates (of MSAA color buffer) +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Cmask info and coordinates + ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Cmask address +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeCmaskAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeCmaskCoordFromAddr +* +* @brief +* Compute coordinates within color buffer (1st pixel of a micro tile) according to +* Cmask address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Cmask info and address + ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Cmask coordinates +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeCmaskCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// F-mask functions for Addr2 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Addr2ComputeFmaskInfo +* +* @brief +* Compute Fmask pitch/height/depth/alignments and size in bytes +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] Fmask information + ADDR2_COMPUTE_FMASK_INFO_OUTPUT* pOut) ///< [out] Fmask pitch and height +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeFmaskInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeFmaskAddrFromCoord +* +* @brief +* Compute Fmask address according to coordinates (x,y,slice,sample,plane) +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Fmask info and coordinates + ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Fmask address +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeFmaskAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeFmaskCoordFromAddr +* +* @brief +* Compute coordinates (x,y,slice,sample,plane) according to Fmask address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Fmask info and address + ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Fmask coordinates +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeFmaskCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// DCC key functions for Addr2 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Addr2ComputeDccInfo +* +* @brief +* Compute DCC key size, base alignment based on color surface size, tile info or tile index +* +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccInfo( + ADDR_HANDLE hLib, ///< handle of addrlib + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) ///< [out] output +{ + ADDR_E_RETURNCODE returnCode; + + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeDccInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeDccAddrFromCoord +* +* @brief +* Compute DCC key address according to coordinates +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccAddrFromCoord( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ///< [in] Dcc info and coordinates + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Dcc address +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeDccAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputePipeBankXor +* +* @brief +* Calculate a valid bank pipe xor value for client to use. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputePipeBankXor( + ADDR_HANDLE hLib, ///< handle of addrlib + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, ///< [in] input + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) ///< [out] output +{ + ADDR_E_RETURNCODE returnCode; + + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputePipeBankXor(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeSlicePipeBankXor +* +* @brief +* Calculate slice pipe bank xor value based on base pipe bank xor and slice id. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSlicePipeBankXor( + ADDR_HANDLE hLib, ///< handle of addrlib + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, ///< [in] input + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) ///< [out] output +{ + ADDR_E_RETURNCODE returnCode; + + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeSlicePipeBankXor(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2ComputeSubResourceOffsetForSwizzlePattern +* +* @brief +* Calculate sub resource offset for swizzle pattern. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2ComputeSubResourceOffsetForSwizzlePattern( + ADDR_HANDLE hLib, ///< handle of addrlib + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, ///< [in] input + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) ///< [out] output +{ + ADDR_E_RETURNCODE returnCode; + + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeSubResourceOffsetForSwizzlePattern(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2GetPreferredSurfaceSetting +* +* @brief +* Suggest a preferred setting for client driver to program HW register +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2GetPreferredSurfaceSetting( + ADDR_HANDLE hLib, ///< handle of addrlib + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, ///< [in] input + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) ///< [out] output +{ + ADDR_E_RETURNCODE returnCode; + + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->Addr2GetPreferredSurfaceSetting(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2IsValidDisplaySwizzleMode +* +* @brief +* Return whether the swizzle mode is supported by DCE / DCN. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode( + ADDR_HANDLE hLib, + AddrSwizzleMode swizzleMode, + UINT_32 bpp, + bool *result) +{ + ADDR_E_RETURNCODE returnCode; + + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + if (pLib != NULL) + { + ADDR2_COMPUTE_SURFACE_INFO_INPUT in; + in.resourceType = ADDR_RSRC_TEX_2D; + in.swizzleMode = swizzleMode; + in.bpp = bpp; + + *result = pLib->IsValidDisplaySwizzleMode(&in); + returnCode = ADDR_OK; + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h new file mode 100644 index 0000000000..6b598a39df --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h @@ -0,0 +1,148 @@ +/* + * Copyright © 2017-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +#ifndef _AMDGPU_ASIC_ADDR_H +#define _AMDGPU_ASIC_ADDR_H + +#define ATI_VENDOR_ID 0x1002 +#define AMD_VENDOR_ID 0x1022 + +// AMDGPU_VENDOR_IS_AMD(vendorId) +#define AMDGPU_VENDOR_IS_AMD(v) ((v == ATI_VENDOR_ID) || (v == AMD_VENDOR_ID)) + +#define FAMILY_UNKNOWN 0x00 +#define FAMILY_TN 0x69 +#define FAMILY_SI 0x6E +#define FAMILY_CI 0x78 +#define FAMILY_KV 0x7D +#define FAMILY_VI 0x82 +#define FAMILY_POLARIS 0x82 +#define FAMILY_CZ 0x87 +#define FAMILY_AI 0x8D +#define FAMILY_RV 0x8E +#define FAMILY_NV 0x8F + +// AMDGPU_FAMILY_IS(familyId, familyName) +#define FAMILY_IS(f, fn) (f == FAMILY_##fn) +#define FAMILY_IS_TN(f) FAMILY_IS(f, TN) +#define FAMILY_IS_SI(f) FAMILY_IS(f, SI) +#define FAMILY_IS_CI(f) FAMILY_IS(f, CI) +#define FAMILY_IS_KV(f) FAMILY_IS(f, KV) +#define FAMILY_IS_VI(f) FAMILY_IS(f, VI) +#define FAMILY_IS_POLARIS(f) FAMILY_IS(f, POLARIS) +#define FAMILY_IS_CZ(f) FAMILY_IS(f, CZ) +#define FAMILY_IS_AI(f) FAMILY_IS(f, AI) +#define FAMILY_IS_RV(f) FAMILY_IS(f, RV) +#define FAMILY_IS_NV(f) FAMILY_IS(f, NV) + +#define AMDGPU_UNKNOWN 0xFF + +#define AMDGPU_TAHITI_RANGE 0x05, 0x14 +#define AMDGPU_PITCAIRN_RANGE 0x15, 0x28 +#define AMDGPU_CAPEVERDE_RANGE 0x29, 0x3C +#define AMDGPU_OLAND_RANGE 0x3C, 0x46 +#define AMDGPU_HAINAN_RANGE 0x46, 0xFF + +#define AMDGPU_BONAIRE_RANGE 0x14, 0x28 +#define AMDGPU_HAWAII_RANGE 0x28, 0x3C + +#define AMDGPU_SPECTRE_RANGE 0x01, 0x41 +#define AMDGPU_SPOOKY_RANGE 0x41, 0x81 +#define AMDGPU_KALINDI_RANGE 0x81, 0xA1 +#define AMDGPU_GODAVARI_RANGE 0xA1, 0xFF + +#define AMDGPU_ICELAND_RANGE 0x01, 0x14 +#define AMDGPU_TONGA_RANGE 0x14, 0x28 +#define AMDGPU_FIJI_RANGE 0x3C, 0x50 +#define AMDGPU_POLARIS10_RANGE 0x50, 0x5A +#define AMDGPU_POLARIS11_RANGE 0x5A, 0x64 +#define AMDGPU_POLARIS12_RANGE 0x64, 0x6E +#define AMDGPU_VEGAM_RANGE 0x6E, 0xFF + +#define AMDGPU_CARRIZO_RANGE 0x01, 0x21 +#define AMDGPU_STONEY_RANGE 0x61, 0xFF + +#define AMDGPU_VEGA10_RANGE 0x01, 0x14 +#define AMDGPU_VEGA12_RANGE 0x14, 0x28 +#define AMDGPU_VEGA20_RANGE 0x28, 0x32 +#define AMDGPU_ARCTURUS_RANGE 0x32, 0xFF + +#define AMDGPU_RAVEN_RANGE 0x01, 0x81 +#define AMDGPU_RAVEN2_RANGE 0x81, 0x91 +#define AMDGPU_RENOIR_RANGE 0x91, 0xFF + +#define AMDGPU_NAVI10_RANGE 0x01, 0x0A +#define AMDGPU_NAVI12_RANGE 0x0A, 0x14 +#define AMDGPU_NAVI14_RANGE 0x14, 0x28 + +#define AMDGPU_EXPAND_FIX(x) x +#define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max)) +#define AMDGPU_IN_RANGE(val, ...) AMDGPU_EXPAND_FIX(AMDGPU_RANGE_HELPER(val, __VA_ARGS__)) + +// ASICREV_IS(eRevisionId, revisionName) +#define ASICREV_IS(r, rn) AMDGPU_IN_RANGE(r, AMDGPU_##rn##_RANGE) +#define ASICREV_IS_TAHITI_P(r) ASICREV_IS(r, TAHITI) +#define ASICREV_IS_PITCAIRN_PM(r) ASICREV_IS(r, PITCAIRN) +#define ASICREV_IS_CAPEVERDE_M(r) ASICREV_IS(r, CAPEVERDE) +#define ASICREV_IS_OLAND_M(r) ASICREV_IS(r, OLAND) +#define ASICREV_IS_HAINAN_V(r) ASICREV_IS(r, HAINAN) + +#define ASICREV_IS_BONAIRE_M(r) ASICREV_IS(r, BONAIRE) +#define ASICREV_IS_HAWAII_P(r) ASICREV_IS(r, HAWAII) + +#define ASICREV_IS_SPECTRE(r) ASICREV_IS(r, SPECTRE) +#define ASICREV_IS_SPOOKY(r) ASICREV_IS(r, SPOOKY) +#define ASICREV_IS_KALINDI(r) ASICREV_IS(r, KALINDI) +#define ASICREV_IS_KALINDI_GODAVARI(r) ASICREV_IS(r, GODAVARI) + +#define ASICREV_IS_ICELAND_M(r) ASICREV_IS(r, ICELAND) +#define ASICREV_IS_TONGA_P(r) ASICREV_IS(r, TONGA) +#define ASICREV_IS_FIJI_P(r) ASICREV_IS(r, FIJI) + +#define ASICREV_IS_POLARIS10_P(r) ASICREV_IS(r, POLARIS10) +#define ASICREV_IS_POLARIS11_M(r) ASICREV_IS(r, POLARIS11) +#define ASICREV_IS_POLARIS12_V(r) ASICREV_IS(r, POLARIS12) +#define ASICREV_IS_VEGAM_P(r) ASICREV_IS(r, VEGAM) + +#define ASICREV_IS_CARRIZO(r) ASICREV_IS(r, CARRIZO) +#define ASICREV_IS_STONEY(r) ASICREV_IS(r, STONEY) + +#define ASICREV_IS_VEGA10_M(r) ASICREV_IS(r, VEGA10) +#define ASICREV_IS_VEGA10_P(r) ASICREV_IS(r, VEGA10) +#define ASICREV_IS_VEGA12_P(r) ASICREV_IS(r, VEGA12) +#define ASICREV_IS_VEGA12_p(r) ASICREV_IS(r, VEGA12) +#define ASICREV_IS_VEGA20_P(r) ASICREV_IS(r, VEGA20) +#define ASICREV_IS_ARCTURUS(r) ASICREV_IS(r, ARCTURUS) + +#define ASICREV_IS_RAVEN(r) ASICREV_IS(r, RAVEN) +#define ASICREV_IS_RAVEN2(r) ASICREV_IS(r, RAVEN2) +#define ASICREV_IS_RENOIR(r) ASICREV_IS(r, RENOIR) + +#define ASICREV_IS_NAVI10_P(r) ASICREV_IS(r, NAVI10) +#define ASICREV_IS_NAVI12(r) ASICREV_IS(r, NAVI12) +#define ASICREV_IS_NAVI14(r) ASICREV_IS(r, NAVI14) + +#endif // _AMDGPU_ASIC_ADDR_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/gfx10/gfx10_gb_reg.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/gfx10/gfx10_gb_reg.h new file mode 100644 index 0000000000..6f13b31869 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/gfx10/gfx10_gb_reg.h @@ -0,0 +1,61 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +#if !defined (__GFX10_GB_REG_H__) +#define __GFX10_GB_REG_H__ + +/* +* gfx10_gb_reg.h +* +* Register Spec Release: 1.0 +* +*/ + +union GB_ADDR_CONFIG +{ + struct + { +#if defined(LITTLEENDIAN_CPU) + unsigned int NUM_PIPES : 3; + unsigned int PIPE_INTERLEAVE_SIZE : 3; + unsigned int MAX_COMPRESSED_FRAGS : 2; + unsigned int NUM_PKRS : 3; + unsigned int : 21; +#elif defined(BIGENDIAN_CPU) + unsigned int : 21; + unsigned int NUM_PKRS : 3; + unsigned int MAX_COMPRESSED_FRAGS : 2; + unsigned int PIPE_INTERLEAVE_SIZE : 3; + unsigned int NUM_PIPES : 3; +#endif + } bitfields, bits; + unsigned int u32All; + int i32All; + float f32All; +}; + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/gfx9/gfx9_gb_reg.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/gfx9/gfx9_gb_reg.h new file mode 100644 index 0000000000..42f24ca46d --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/gfx9/gfx9_gb_reg.h @@ -0,0 +1,79 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +#if !defined (__GFX9_GB_REG_H__) +#define __GFX9_GB_REG_H__ + +/* +* gfx9_gb_reg.h +* +* Register Spec Release: 1.0 +* +*/ + +union GB_ADDR_CONFIG { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int NUM_PIPES : 3; + unsigned int PIPE_INTERLEAVE_SIZE : 3; + unsigned int MAX_COMPRESSED_FRAGS : 2; + unsigned int BANK_INTERLEAVE_SIZE : 3; + unsigned int : 1; + unsigned int NUM_BANKS : 3; + unsigned int : 1; + unsigned int SHADER_ENGINE_TILE_SIZE : 3; + unsigned int NUM_SHADER_ENGINES : 2; + unsigned int NUM_GPUS : 3; + unsigned int MULTI_GPU_TILE_SIZE : 2; + unsigned int NUM_RB_PER_SE : 2; + unsigned int ROW_SIZE : 2; + unsigned int NUM_LOWER_PIPES : 1; + unsigned int SE_ENABLE : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int SE_ENABLE : 1; + unsigned int NUM_LOWER_PIPES : 1; + unsigned int ROW_SIZE : 2; + unsigned int NUM_RB_PER_SE : 2; + unsigned int MULTI_GPU_TILE_SIZE : 2; + unsigned int NUM_GPUS : 3; + unsigned int NUM_SHADER_ENGINES : 2; + unsigned int SHADER_ENGINE_TILE_SIZE : 3; + unsigned int : 1; + unsigned int NUM_BANKS : 3; + unsigned int : 1; + unsigned int BANK_INTERLEAVE_SIZE : 3; + unsigned int MAX_COMPRESSED_FRAGS : 2; + unsigned int PIPE_INTERLEAVE_SIZE : 3; + unsigned int NUM_PIPES : 3; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; +}; + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/r800/si_gb_reg.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/r800/si_gb_reg.h new file mode 100644 index 0000000000..43371d402b --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/chip/r800/si_gb_reg.h @@ -0,0 +1,154 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +#if !defined (__SI_GB_REG_H__) +#define __SI_GB_REG_H__ + +/***************************************************************************************************************** + * + * si_gb_reg.h + * + * Register Spec Release: Chip Spec 0.28 + * + *****************************************************************************************************************/ + +/* + * GB_ADDR_CONFIG struct + */ + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _GB_ADDR_CONFIG_T { + unsigned int num_pipes : 3; + unsigned int : 1; + unsigned int pipe_interleave_size : 3; + unsigned int : 1; + unsigned int bank_interleave_size : 3; + unsigned int : 1; + unsigned int num_shader_engines : 2; + unsigned int : 2; + unsigned int shader_engine_tile_size : 3; + unsigned int : 1; + unsigned int num_gpus : 3; + unsigned int : 1; + unsigned int multi_gpu_tile_size : 2; + unsigned int : 2; + unsigned int row_size : 2; + unsigned int num_lower_pipes : 1; + unsigned int : 1; + } GB_ADDR_CONFIG_T; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _GB_ADDR_CONFIG_T { + unsigned int : 1; + unsigned int num_lower_pipes : 1; + unsigned int row_size : 2; + unsigned int : 2; + unsigned int multi_gpu_tile_size : 2; + unsigned int : 1; + unsigned int num_gpus : 3; + unsigned int : 1; + unsigned int shader_engine_tile_size : 3; + unsigned int : 2; + unsigned int num_shader_engines : 2; + unsigned int : 1; + unsigned int bank_interleave_size : 3; + unsigned int : 1; + unsigned int pipe_interleave_size : 3; + unsigned int : 1; + unsigned int num_pipes : 3; + } GB_ADDR_CONFIG_T; + +#endif + +typedef union { + unsigned int val : 32; + GB_ADDR_CONFIG_T f; +} GB_ADDR_CONFIG; + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _GB_TILE_MODE_T { + unsigned int micro_tile_mode : 2; + unsigned int array_mode : 4; + unsigned int pipe_config : 5; + unsigned int tile_split : 3; + unsigned int bank_width : 2; + unsigned int bank_height : 2; + unsigned int macro_tile_aspect : 2; + unsigned int num_banks : 2; + unsigned int micro_tile_mode_new : 3; + unsigned int sample_split : 2; + unsigned int : 5; + } GB_TILE_MODE_T; + + typedef struct _GB_MACROTILE_MODE_T { + unsigned int bank_width : 2; + unsigned int bank_height : 2; + unsigned int macro_tile_aspect : 2; + unsigned int num_banks : 2; + unsigned int : 24; + } GB_MACROTILE_MODE_T; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _GB_TILE_MODE_T { + unsigned int : 5; + unsigned int sample_split : 2; + unsigned int micro_tile_mode_new : 3; + unsigned int num_banks : 2; + unsigned int macro_tile_aspect : 2; + unsigned int bank_height : 2; + unsigned int bank_width : 2; + unsigned int tile_split : 3; + unsigned int pipe_config : 5; + unsigned int array_mode : 4; + unsigned int micro_tile_mode : 2; + } GB_TILE_MODE_T; + + typedef struct _GB_MACROTILE_MODE_T { + unsigned int : 24; + unsigned int num_banks : 2; + unsigned int macro_tile_aspect : 2; + unsigned int bank_height : 2; + unsigned int bank_width : 2; + } GB_MACROTILE_MODE_T; + +#endif + +typedef union { + unsigned int val : 32; + GB_TILE_MODE_T f; +} GB_TILE_MODE; + +typedef union { + unsigned int val : 32; + GB_MACROTILE_MODE_T f; +} GB_MACROTILE_MODE; + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrcommon.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrcommon.h new file mode 100644 index 0000000000..f2f8c6a038 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrcommon.h @@ -0,0 +1,948 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrcommon.h +* @brief Contains the helper function and constants. +**************************************************************************************************** +*/ + +#ifndef __ADDR_COMMON_H__ +#define __ADDR_COMMON_H__ + +#include "addrinterface.h" + +#if !defined(DEBUG) +#ifdef NDEBUG +#define DEBUG 0 +#else +#define DEBUG 1 +#endif +#endif + +// ADDR_LNX_KERNEL_BUILD is for internal build +// Moved from addrinterface.h so __KERNEL__ is not needed any more +#if ADDR_LNX_KERNEL_BUILD // || (defined(__GNUC__) && defined(__KERNEL__)) + #include +#elif !defined(__APPLE__) || defined(HAVE_TSERVER) + #include + #include +#endif + +#include +#include "util/macros.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Platform specific debug break defines +//////////////////////////////////////////////////////////////////////////////////////////////////// +#if DEBUG + #if defined(__GNUC__) + #define ADDR_DBG_BREAK() assert(false) + #elif defined(__APPLE__) + #define ADDR_DBG_BREAK() { IOPanic("");} + #else + #define ADDR_DBG_BREAK() { __debugbreak(); } + #endif +#else + #define ADDR_DBG_BREAK() do {} while(0) +#endif +//////////////////////////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Debug assertions used in AddrLib +//////////////////////////////////////////////////////////////////////////////////////////////////// +#if defined(_WIN32) && (_MSC_VER >= 1400) + #define ADDR_ANALYSIS_ASSUME(expr) __analysis_assume(expr) +#else + #define ADDR_ANALYSIS_ASSUME(expr) do { (void)(expr); } while (0) +#endif + +#define ADDR_ASSERT(__e) assert(__e) +#define ADDR_ASSERT_ALWAYS() ADDR_DBG_BREAK() +#define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case") +#define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented"); +//////////////////////////////////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Debug print macro from legacy address library +//////////////////////////////////////////////////////////////////////////////////////////////////// +#if DEBUG + +#define ADDR_PRNT(a) Object::DebugPrint a + +/// @brief Macro for reporting informational messages +/// @ingroup util +/// +/// This macro optionally prints an informational message to stdout. +/// The first parameter is a condition -- if it is true, nothing is done. +/// The second pararmeter MUST be a parenthesis-enclosed list of arguments, +/// starting with a string. This is passed to printf() or an equivalent +/// in order to format the informational message. For example, +/// ADDR_INFO(0, ("test %d",3) ); prints out "test 3". +/// +#define ADDR_INFO(cond, a) \ +{ if (!(cond)) { ADDR_PRNT(a); } } + +/// @brief Macro for reporting error warning messages +/// @ingroup util +/// +/// This macro optionally prints an error warning message to stdout, +/// followed by the file name and line number where the macro was called. +/// The first parameter is a condition -- if it is true, nothing is done. +/// The second pararmeter MUST be a parenthesis-enclosed list of arguments, +/// starting with a string. This is passed to printf() or an equivalent +/// in order to format the informational message. For example, +/// ADDR_WARN(0, ("test %d",3) ); prints out "test 3" followed by +/// a second line with the file name and line number. +/// +#define ADDR_WARN(cond, a) \ +{ if (!(cond)) \ + { ADDR_PRNT(a); \ + ADDR_PRNT((" WARNING in file %s, line %d\n", __FILE__, __LINE__)); \ +} } + +/// @brief Macro for reporting fatal error conditions +/// @ingroup util +/// +/// This macro optionally stops execution of the current routine +/// after printing an error warning message to stdout, +/// followed by the file name and line number where the macro was called. +/// The first parameter is a condition -- if it is true, nothing is done. +/// The second pararmeter MUST be a parenthesis-enclosed list of arguments, +/// starting with a string. This is passed to printf() or an equivalent +/// in order to format the informational message. For example, +/// ADDR_EXIT(0, ("test %d",3) ); prints out "test 3" followed by +/// a second line with the file name and line number, then stops execution. +/// +#define ADDR_EXIT(cond, a) \ +{ if (!(cond)) \ + { ADDR_PRNT(a); ADDR_DBG_BREAK();\ +} } + +#else // DEBUG + +#define ADDRDPF 1 ? (void)0 : (void) + +#define ADDR_PRNT(a) do {} while(0) + +#define ADDR_DBG_BREAK() do {} while(0) + +#define ADDR_INFO(cond, a) do {} while(0) + +#define ADDR_WARN(cond, a) do {} while(0) + +#define ADDR_EXIT(cond, a) do {} while(0) + +#endif // DEBUG +//////////////////////////////////////////////////////////////////////////////////////////////////// + +#define ADDR_C_ASSERT(__e) STATIC_ASSERT(__e) + +namespace Addr +{ + +namespace V1 +{ +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Common constants +//////////////////////////////////////////////////////////////////////////////////////////////////// +static const UINT_32 MicroTileWidth = 8; ///< Micro tile width, for 1D and 2D tiling +static const UINT_32 MicroTileHeight = 8; ///< Micro tile height, for 1D and 2D tiling +static const UINT_32 ThickTileThickness = 4; ///< Micro tile thickness, for THICK modes +static const UINT_32 XThickTileThickness = 8; ///< Extra thick tiling thickness +static const UINT_32 PowerSaveTileBytes = 64; ///< Nuber of bytes per tile for power save 64 +static const UINT_32 CmaskCacheBits = 1024; ///< Number of bits for CMASK cache +static const UINT_32 CmaskElemBits = 4; ///< Number of bits for CMASK element +static const UINT_32 HtileCacheBits = 16384; ///< Number of bits for HTILE cache 512*32 + +static const UINT_32 MicroTilePixels = MicroTileWidth * MicroTileHeight; + +static const INT_32 TileIndexInvalid = TILEINDEX_INVALID; +static const INT_32 TileIndexLinearGeneral = TILEINDEX_LINEAR_GENERAL; +static const INT_32 TileIndexNoMacroIndex = -3; + +} // V1 + +namespace V2 +{ +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Common constants +//////////////////////////////////////////////////////////////////////////////////////////////////// +static const UINT_32 MaxSurfaceHeight = 16384; + +} // V2 + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Common macros +//////////////////////////////////////////////////////////////////////////////////////////////////// +#define BITS_PER_BYTE 8 +#define BITS_TO_BYTES(x) ( ((x) + (BITS_PER_BYTE-1)) / BITS_PER_BYTE ) +#define BYTES_TO_BITS(x) ( (x) * BITS_PER_BYTE ) + +/// Helper macros to select a single bit from an int (undefined later in section) +#define _BIT(v,b) (((v) >> (b) ) & 1) + +/** +**************************************************************************************************** +* @brief Enums to identify AddrLib type +**************************************************************************************************** +*/ +enum LibClass +{ + BASE_ADDRLIB = 0x0, + R600_ADDRLIB = 0x6, + R800_ADDRLIB = 0x8, + SI_ADDRLIB = 0xa, + CI_ADDRLIB = 0xb, + AI_ADDRLIB = 0xd, +}; + +/** +**************************************************************************************************** +* ChipFamily +* +* @brief +* Neutral enums that specifies chip family. +* +**************************************************************************************************** +*/ +enum ChipFamily +{ + ADDR_CHIP_FAMILY_IVLD, ///< Invalid family + ADDR_CHIP_FAMILY_R6XX, + ADDR_CHIP_FAMILY_R7XX, + ADDR_CHIP_FAMILY_R8XX, + ADDR_CHIP_FAMILY_NI, + ADDR_CHIP_FAMILY_SI, + ADDR_CHIP_FAMILY_CI, + ADDR_CHIP_FAMILY_VI, + ADDR_CHIP_FAMILY_AI, + ADDR_CHIP_FAMILY_NAVI, +}; + +/** +**************************************************************************************************** +* ConfigFlags +* +* @brief +* This structure is used to set configuration flags. +**************************************************************************************************** +*/ +union ConfigFlags +{ + struct + { + /// These flags are set up internally thru AddrLib::Create() based on ADDR_CREATE_FLAGS + UINT_32 optimalBankSwap : 1; ///< New bank tiling for RV770 only + UINT_32 noCubeMipSlicesPad : 1; ///< Disables faces padding for cubemap mipmaps + UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and + /// output structure + UINT_32 ignoreTileInfo : 1; ///< Don't use tile info structure + UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid + UINT_32 useCombinedSwizzle : 1; ///< Use combined swizzle + UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level + UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment + UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize + UINT_32 disableLinearOpt : 1; ///< Disallow tile modes to be optimized to linear + UINT_32 use32bppFor422Fmt : 1; ///< View 422 formats as 32 bits per pixel element + UINT_32 forceDccAndTcCompat : 1; ///< Force enable DCC and TC compatibility + UINT_32 nonPower2MemConfig : 1; ///< Physical video memory size is not power of 2 + UINT_32 reserved : 19; ///< Reserved bits for future use + }; + + UINT_32 value; +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Misc helper functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* AddrXorReduce +* +* @brief +* Xor the right-side numberOfBits bits of x. +**************************************************************************************************** +*/ +static inline UINT_32 XorReduce( + UINT_32 x, + UINT_32 numberOfBits) +{ + UINT_32 i; + UINT_32 result = x & 1; + + for (i=1; i>i) & 1); + } + + return result; +} + +/** +**************************************************************************************************** +* IsPow2 +* +* @brief +* Check if the size (UINT_32) is pow 2 +**************************************************************************************************** +*/ +static inline UINT_32 IsPow2( + UINT_32 dim) ///< [in] dimension of miplevel +{ + ADDR_ASSERT(dim > 0); + return !(dim & (dim - 1)); +} + +/** +**************************************************************************************************** +* IsPow2 +* +* @brief +* Check if the size (UINT_64) is pow 2 +**************************************************************************************************** +*/ +static inline UINT_64 IsPow2( + UINT_64 dim) ///< [in] dimension of miplevel +{ + ADDR_ASSERT(dim > 0); + return !(dim & (dim - 1)); +} + +/** +**************************************************************************************************** +* ByteAlign +* +* @brief +* Align UINT_32 "x" to "align" alignment, "align" should be power of 2 +**************************************************************************************************** +*/ +static inline UINT_32 PowTwoAlign( + UINT_32 x, + UINT_32 align) +{ + // + // Assert that x is a power of two. + // + ADDR_ASSERT(IsPow2(align)); + return (x + (align - 1)) & (~(align - 1)); +} + +/** +**************************************************************************************************** +* ByteAlign +* +* @brief +* Align UINT_64 "x" to "align" alignment, "align" should be power of 2 +**************************************************************************************************** +*/ +static inline UINT_64 PowTwoAlign( + UINT_64 x, + UINT_64 align) +{ + // + // Assert that x is a power of two. + // + ADDR_ASSERT(IsPow2(align)); + return (x + (align - 1)) & (~(align - 1)); +} + +/** +**************************************************************************************************** +* Min +* +* @brief +* Get the min value between two unsigned values +**************************************************************************************************** +*/ +static inline UINT_32 Min( + UINT_32 value1, + UINT_32 value2) +{ + return ((value1 < (value2)) ? (value1) : value2); +} + +/** +**************************************************************************************************** +* Min +* +* @brief +* Get the min value between two signed values +**************************************************************************************************** +*/ +static inline INT_32 Min( + INT_32 value1, + INT_32 value2) +{ + return ((value1 < (value2)) ? (value1) : value2); +} + +/** +**************************************************************************************************** +* Max +* +* @brief +* Get the max value between two unsigned values +**************************************************************************************************** +*/ +static inline UINT_32 Max( + UINT_32 value1, + UINT_32 value2) +{ + return ((value1 > (value2)) ? (value1) : value2); +} + +/** +**************************************************************************************************** +* Max +* +* @brief +* Get the max value between two signed values +**************************************************************************************************** +*/ +static inline INT_32 Max( + INT_32 value1, + INT_32 value2) +{ + return ((value1 > (value2)) ? (value1) : value2); +} + +/** +**************************************************************************************************** +* NextPow2 +* +* @brief +* Compute the mipmap's next level dim size +**************************************************************************************************** +*/ +static inline UINT_32 NextPow2( + UINT_32 dim) ///< [in] dimension of miplevel +{ + UINT_32 newDim = 1; + + if (dim > 0x7fffffff) + { + ADDR_ASSERT_ALWAYS(); + newDim = 0x80000000; + } + else + { + while (newDim < dim) + { + newDim <<= 1; + } + } + + return newDim; +} + +/** +**************************************************************************************************** +* Log2NonPow2 +* +* @brief +* Compute log of base 2 no matter the target is power of 2 or not +**************************************************************************************************** +*/ +static inline UINT_32 Log2NonPow2( + UINT_32 x) ///< [in] the value should calculate log based 2 +{ + UINT_32 y; + + y = 0; + while (x > 1) + { + x >>= 1; + y++; + } + + return y; +} + +/** +**************************************************************************************************** +* Log2 +* +* @brief +* Compute log of base 2 +**************************************************************************************************** +*/ +static inline UINT_32 Log2( + UINT_32 x) ///< [in] the value should calculate log based 2 +{ + // Assert that x is a power of two. + ADDR_ASSERT(IsPow2(x)); + + return Log2NonPow2(x); +} + +/** +**************************************************************************************************** +* QLog2 +* +* @brief +* Compute log of base 2 quickly (<= 16) +**************************************************************************************************** +*/ +static inline UINT_32 QLog2( + UINT_32 x) ///< [in] the value should calculate log based 2 +{ + ADDR_ASSERT(x <= 16); + + UINT_32 y = 0; + + switch (x) + { + case 1: + y = 0; + break; + case 2: + y = 1; + break; + case 4: + y = 2; + break; + case 8: + y = 3; + break; + case 16: + y = 4; + break; + default: + ADDR_ASSERT_ALWAYS(); + } + + return y; +} + +/** +**************************************************************************************************** +* SafeAssign +* +* @brief +* NULL pointer safe assignment +**************************************************************************************************** +*/ +static inline VOID SafeAssign( + UINT_32* pLVal, ///< [in] Pointer to left val + UINT_32 rVal) ///< [in] Right value +{ + if (pLVal) + { + *pLVal = rVal; + } +} + +/** +**************************************************************************************************** +* SafeAssign +* +* @brief +* NULL pointer safe assignment for 64bit values +**************************************************************************************************** +*/ +static inline VOID SafeAssign( + UINT_64* pLVal, ///< [in] Pointer to left val + UINT_64 rVal) ///< [in] Right value +{ + if (pLVal) + { + *pLVal = rVal; + } +} + +/** +**************************************************************************************************** +* SafeAssign +* +* @brief +* NULL pointer safe assignment for AddrTileMode +**************************************************************************************************** +*/ +static inline VOID SafeAssign( + AddrTileMode* pLVal, ///< [in] Pointer to left val + AddrTileMode rVal) ///< [in] Right value +{ + if (pLVal) + { + *pLVal = rVal; + } +} + +/** +**************************************************************************************************** +* RoundHalf +* +* @brief +* return (x + 1) / 2 +**************************************************************************************************** +*/ +static inline UINT_32 RoundHalf( + UINT_32 x) ///< [in] input value +{ + ADDR_ASSERT(x != 0); + +#if 1 + return (x >> 1) + (x & 1); +#else + return (x + 1) >> 1; +#endif +} + +/** +**************************************************************************************************** +* SumGeo +* +* @brief +* Calculate sum of a geometric progression whose ratio is 1/2 +**************************************************************************************************** +*/ +static inline UINT_32 SumGeo( + UINT_32 base, ///< [in] First term in the geometric progression + UINT_32 num) ///< [in] Number of terms to be added into sum +{ + ADDR_ASSERT(base > 0); + + UINT_32 sum = 0; + UINT_32 i = 0; + for (; (i < num) && (base > 1); i++) + { + sum += base; + base = RoundHalf(base); + } + sum += num - i; + + return sum; +} + +/** +**************************************************************************************************** +* GetBit +* +* @brief +* Extract bit N value (0 or 1) of a UINT32 value. +**************************************************************************************************** +*/ +static inline UINT_32 GetBit( + UINT_32 u32, ///< [in] UINT32 value + UINT_32 pos) ///< [in] bit position from LSB, valid range is [0..31] +{ + ADDR_ASSERT(pos <= 31); + + return (u32 >> pos) & 0x1; +} + +/** +**************************************************************************************************** +* GetBits +* +* @brief +* Copy 'bitsNum' bits from src start from srcStartPos into destination from dstStartPos +* srcStartPos: 0~31 for UINT_32 +* bitsNum : 1~32 for UINT_32 +* srcStartPos: 0~31 for UINT_32 +* src start position +* | +* src : b[31] b[30] b[29] ... ... ... ... ... ... ... ... b[end]..b[beg] ... b[1] b[0] +* || Bits num || copy length || Bits num || +* dst : b[31] b[30] b[29] ... b[end]..b[beg] ... ... ... ... ... ... ... ... b[1] b[0] +* | +* dst start position +**************************************************************************************************** +*/ +static inline UINT_32 GetBits( + UINT_32 src, + UINT_32 srcStartPos, + UINT_32 bitsNum, + UINT_32 dstStartPos) +{ + ADDR_ASSERT((srcStartPos < 32) && (dstStartPos < 32) && (bitsNum > 0)); + ADDR_ASSERT((bitsNum + dstStartPos <= 32) && (bitsNum + srcStartPos <= 32)); + + return ((src >> srcStartPos) << (32 - bitsNum)) >> (32 - bitsNum - dstStartPos); +} + +/** +**************************************************************************************************** +* MortonGen2d +* +* @brief +* Generate 2D Morton interleave code with num lowest bits in each channel +**************************************************************************************************** +*/ +static inline UINT_32 MortonGen2d( + UINT_32 x, ///< [in] First channel + UINT_32 y, ///< [in] Second channel + UINT_32 num) ///< [in] Number of bits extracted from each channel +{ + UINT_32 mort = 0; + + for (UINT_32 i = 0; i < num; i++) + { + mort |= (GetBit(y, i) << (2 * i)); + mort |= (GetBit(x, i) << (2 * i + 1)); + } + + return mort; +} + +/** +**************************************************************************************************** +* MortonGen3d +* +* @brief +* Generate 3D Morton interleave code with num lowest bits in each channel +**************************************************************************************************** +*/ +static inline UINT_32 MortonGen3d( + UINT_32 x, ///< [in] First channel + UINT_32 y, ///< [in] Second channel + UINT_32 z, ///< [in] Third channel + UINT_32 num) ///< [in] Number of bits extracted from each channel +{ + UINT_32 mort = 0; + + for (UINT_32 i = 0; i < num; i++) + { + mort |= (GetBit(z, i) << (3 * i)); + mort |= (GetBit(y, i) << (3 * i + 1)); + mort |= (GetBit(x, i) << (3 * i + 2)); + } + + return mort; +} + +/** +**************************************************************************************************** +* ReverseBitVector +* +* @brief +* Return reversed lowest num bits of v: v[0]v[1]...v[num-2]v[num-1] +**************************************************************************************************** +*/ +static inline UINT_32 ReverseBitVector( + UINT_32 v, ///< [in] Reverse operation base value + UINT_32 num) ///< [in] Number of bits used in reverse operation +{ + UINT_32 reverse = 0; + + for (UINT_32 i = 0; i < num; i++) + { + reverse |= (GetBit(v, num - 1 - i) << i); + } + + return reverse; +} + +/** +**************************************************************************************************** +* FoldXor2d +* +* @brief +* Xor bit vector v[num-1]v[num-2]...v[1]v[0] with v[num]v[num+1]...v[2*num-2]v[2*num-1] +**************************************************************************************************** +*/ +static inline UINT_32 FoldXor2d( + UINT_32 v, ///< [in] Xor operation base value + UINT_32 num) ///< [in] Number of bits used in fold xor operation +{ + return (v & ((1 << num) - 1)) ^ ReverseBitVector(v >> num, num); +} + +/** +**************************************************************************************************** +* DeMort +* +* @brief +* Return v[0] | v[2] | v[4] | v[6]... | v[2*num - 2] +**************************************************************************************************** +*/ +static inline UINT_32 DeMort( + UINT_32 v, ///< [in] DeMort operation base value + UINT_32 num) ///< [in] Number of bits used in fold DeMort operation +{ + UINT_32 d = 0; + + for (UINT_32 i = 0; i < num; i++) + { + d |= ((v & (1 << (i << 1))) >> i); + } + + return d; +} + +/** +**************************************************************************************************** +* FoldXor3d +* +* @brief +* v[0]...v[num-1] ^ v[3*num-1]v[3*num-3]...v[num+2]v[num] ^ v[3*num-2]...v[num+1]v[num-1] +**************************************************************************************************** +*/ +static inline UINT_32 FoldXor3d( + UINT_32 v, ///< [in] Xor operation base value + UINT_32 num) ///< [in] Number of bits used in fold xor operation +{ + UINT_32 t = v & ((1 << num) - 1); + t ^= ReverseBitVector(DeMort(v >> num, num), num); + t ^= ReverseBitVector(DeMort(v >> (num + 1), num), num); + + return t; +} + +/** +**************************************************************************************************** +* InitChannel +* +* @brief +* Set channel initialization value via a return value +**************************************************************************************************** +*/ +static inline ADDR_CHANNEL_SETTING InitChannel( + UINT_32 valid, ///< [in] valid setting + UINT_32 channel, ///< [in] channel setting + UINT_32 index) ///< [in] index setting +{ + ADDR_CHANNEL_SETTING t; + t.valid = valid; + t.channel = channel; + t.index = index; + + return t; +} + +/** +**************************************************************************************************** +* InitChannel +* +* @brief +* Set channel initialization value via channel pointer +**************************************************************************************************** +*/ +static inline VOID InitChannel( + UINT_32 valid, ///< [in] valid setting + UINT_32 channel, ///< [in] channel setting + UINT_32 index, ///< [in] index setting + ADDR_CHANNEL_SETTING *pChanSet) ///< [out] channel setting to be initialized +{ + pChanSet->valid = valid; + pChanSet->channel = channel; + pChanSet->index = index; +} + +/** +**************************************************************************************************** +* InitChannel +* +* @brief +* Set channel initialization value via another channel +**************************************************************************************************** +*/ +static inline VOID InitChannel( + ADDR_CHANNEL_SETTING *pChanDst, ///< [in] channel setting to be copied from + ADDR_CHANNEL_SETTING *pChanSrc) ///< [out] channel setting to be initialized +{ + pChanDst->valid = pChanSrc->valid; + pChanDst->channel = pChanSrc->channel; + pChanDst->index = pChanSrc->index; +} + +/** +**************************************************************************************************** +* GetMaxValidChannelIndex +* +* @brief +* Get max valid index for a specific channel +**************************************************************************************************** +*/ +static inline UINT_32 GetMaxValidChannelIndex( + const ADDR_CHANNEL_SETTING *pChanSet, ///< [in] channel setting to be initialized + UINT_32 searchCount,///< [in] number of channel setting to be searched + UINT_32 channel) ///< [in] channel to be searched +{ + UINT_32 index = 0; + + for (UINT_32 i = 0; i < searchCount; i++) + { + if (pChanSet[i].valid && (pChanSet[i].channel == channel)) + { + index = Max(index, static_cast(pChanSet[i].index)); + } + } + + return index; +} + +/** +**************************************************************************************************** +* GetCoordActiveMask +* +* @brief +* Get bit mask which indicates which positions in the equation match the target coord +**************************************************************************************************** +*/ +static inline UINT_32 GetCoordActiveMask( + const ADDR_CHANNEL_SETTING *pChanSet, ///< [in] channel setting to be initialized + UINT_32 searchCount,///< [in] number of channel setting to be searched + UINT_32 channel, ///< [in] channel to be searched + UINT_32 index) ///< [in] index to be searched +{ + UINT_32 mask = 0; + + for (UINT_32 i = 0; i < searchCount; i++) + { + if ((pChanSet[i].valid == TRUE) && + (pChanSet[i].channel == channel) && + (pChanSet[i].index == index)) + { + mask |= (1 << i); + } + } + + return mask; +} + +/** +**************************************************************************************************** +* ShiftCeil +* +* @brief +* Apply righ-shift with ceiling +**************************************************************************************************** +*/ +static inline UINT_32 ShiftCeil( + UINT_32 a, ///< [in] value to be right-shifted + UINT_32 b) ///< [in] number of bits to shift +{ + return (a >> b) + (((a & ((1 << b) - 1)) != 0) ? 1 : 0); +} + +} // Addr + +#endif // __ADDR_COMMON_H__ + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.cpp new file mode 100644 index 0000000000..27afb593b6 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.cpp @@ -0,0 +1,1830 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrelemlib.cpp +* @brief Contains the class implementation for element/pixel related functions. +**************************************************************************************************** +*/ + +#include "addrelemlib.h" +#include "addrlib.h" + +namespace Addr +{ + +/** +**************************************************************************************************** +* ElemLib::ElemLib +* +* @brief +* constructor +* +* @return +* N/A +**************************************************************************************************** +*/ +ElemLib::ElemLib( + Lib* pAddrLib) ///< [in] Parent addrlib instance pointer + : + Object(pAddrLib->GetClient()), + m_pAddrLib(pAddrLib) +{ + switch (m_pAddrLib->GetChipFamily()) + { + case ADDR_CHIP_FAMILY_R6XX: + m_depthPlanarType = ADDR_DEPTH_PLANAR_R600; + m_fp16ExportNorm = 0; + break; + case ADDR_CHIP_FAMILY_R7XX: + m_depthPlanarType = ADDR_DEPTH_PLANAR_R600; + m_fp16ExportNorm = 1; + break; + case ADDR_CHIP_FAMILY_R8XX: + case ADDR_CHIP_FAMILY_NI: // Same as 8xx + m_depthPlanarType = ADDR_DEPTH_PLANAR_R800; + m_fp16ExportNorm = 1; + break; + default: + m_fp16ExportNorm = 1; + m_depthPlanarType = ADDR_DEPTH_PLANAR_R800; + break; + } + + m_configFlags.value = 0; +} + +/** +**************************************************************************************************** +* ElemLib::~ElemLib +* +* @brief +* destructor +* +* @return +* N/A +**************************************************************************************************** +*/ +ElemLib::~ElemLib() +{ +} + +/** +**************************************************************************************************** +* ElemLib::Create +* +* @brief +* Creates and initializes AddrLib object. +* +* @return +* Returns point to ADDR_CREATEINFO if successful. +**************************************************************************************************** +*/ +ElemLib* ElemLib::Create( + const Lib* pAddrLib) ///< [in] Pointer of parent AddrLib instance +{ + ElemLib* pElemLib = NULL; + + if (pAddrLib) + { + VOID* pObj = Object::ClientAlloc(sizeof(ElemLib), pAddrLib->GetClient()); + if (pObj) + { + pElemLib = new(pObj) ElemLib(const_cast(pAddrLib)); + } + } + + return pElemLib; +} + +/************************************************************************************************** +* ElemLib::Flt32sToInt32s +* +* @brief +* Convert a ADDR_FLT_32 value to Int32 value +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID ElemLib::Flt32sToInt32s( + ADDR_FLT_32 value, ///< [in] ADDR_FLT_32 value + UINT_32 bits, ///< [in] nubmer of bits in value + NumberType numberType, ///< [in] the type of number + UINT_32* pResult) ///< [out] Int32 value +{ + UINT_8 round = 128; //ADDR_ROUND_BY_HALF + UINT_32 uscale; + UINT_32 sign; + + //convert each component to an INT_32 + switch ( numberType ) + { + case ADDR_NO_NUMBER: //fall through + case ADDR_ZERO: //fall through + case ADDR_ONE: //fall through + case ADDR_EPSILON: //fall through + return; // these are zero-bit components, so don't set result + + case ADDR_UINT_BITS: // unsigned integer bit field, clamped to range + uscale = (1< uscale)) + { + *pResult = uscale; + } + else + { + *pResult = value.i; + } + return; + } + + // The algorithm used in the DB and TX differs at one value for 24-bit unorms + case ADDR_UNORM_R6XXDB: // unsigned repeating fraction + if ((bits==24) && (value.i == 0x33000000)) + { + *pResult = 1; + return; + } // Else treat like ADDR_UNORM_R6XX + + case ADDR_UNORM_R6XX: // unsigned repeating fraction + if (value.f <= 0) + { + *pResult = 0; // first clamp to [0..1] + } + else + { + if (value.f >= 1) + { + *pResult = (1<(f + (round/256.0f)); + } + #endif + else + { + ADDR_FLT_32 scaled; + ADDR_FLT_32 shifted; + UINT_64 truncated, rounded; + UINT_32 altShift; + UINT_32 mask = (1 << bits) - 1; + UINT_32 half = 1 << (bits - 1); + UINT_32 mant24 = (value.i & 0x7FFFFF) + 0x800000; + UINT_64 temp = mant24 - (mant24>>bits) - + static_cast((mant24 & mask) > half); + UINT_32 exp8 = value.i >> 23; + UINT_32 shift = 126 - exp8 + 24 - bits; + UINT_64 final; + + if (shift >= 32) // This is zero, even with maximum dither add + { + final = 0; + } + else + { + final = ((temp<<8) + (static_cast(round)<> (shift+8); + } + //ADDR_EXIT( *pResult == final, + // ("Float %x converted to %d-bit Unorm %x != bitwise %x", + // value.u, bits, (UINT_32)*pResult, (UINT_32)final) ); + if (final > mask) + { + final = mask; + } + + scaled.f = value.f * ((1<>23)&0xFF); + truncated = (altShift > 60) ? 0 : truncated >> altShift; + rounded = static_cast((round + truncated) >> 8); + //if (rounded > ((1<(rounded); //(INT_32)final; + } + } + } + + return; + + case ADDR_S8FLOAT32: // 32-bit IEEE float, passes through NaN values + *pResult = value.i; + return; + + // @@ FIX ROUNDING in this code, fix the denorm case + case ADDR_U4FLOATC: // Unsigned float, 4-bit exponent. bias 15, clamped [0..1] + sign = (value.i >> 31) & 1; + if ((value.i&0x7F800000) == 0x7F800000) // If NaN or INF: + { + if ((value.i&0x007FFFFF) != 0) // then if NaN + { + *pResult = 0; // return 0 + } + else + { + *pResult = (sign)?0:0xF00000; // else +INF->+1, -INF->0 + } + return; + } + if (value.f <= 0) + { + *pResult = 0; + } + else + { + if (value.f>=1) + { + *pResult = 0xF << (bits-4); + } + else + { + if ((value.i>>23) > 112 ) + { + // 24-bit float: normalized + // value.i += 1 << (22-bits+4); + // round the IEEE mantissa to mantissa size + // @@ NOTE: add code to support rounding + value.u &= 0x7FFFFFF; // mask off high 4 exponent bits + *pResult = value.i >> (23-bits+4);// shift off unused mantissa bits + } + else + { + // 24-bit float: denormalized + value.f = value.f / (1<<28) / (1<<28); + value.f = value.f / (1<<28) / (1<<28); // convert to IEEE denorm + // value.i += 1 << (22-bits+4); + // round the IEEE mantissa to mantissa size + // @@ NOTE: add code to support rounding + *pResult = value.i >> (23-bits+4); // shift off unused mantissa bits + } + } + } + + return; + + default: // invalid number mode + //ADDR_EXIT(0, ("Invalid AddrNumber %d", numberType) ); + break; + + } +} + +/** +**************************************************************************************************** +* ElemLib::Int32sToPixel +* +* @brief +* Pack 32-bit integer values into an uncompressed pixel, +* in the proper order +* +* @return +* N/A +* +* @note +* This entry point packes four 32-bit integer values into +* an uncompressed pixel. The pixel values are specifies in +* standard order, e.g. depth/stencil. This routine asserts +* if called on compressed pixel. +**************************************************************************************************** +*/ +VOID ElemLib::Int32sToPixel( + UINT_32 numComps, ///< [in] number of components + UINT_32* pComps, ///< [in] compnents + UINT_32* pCompBits, ///< [in] total bits in each component + UINT_32* pCompStart, ///< [in] the first bit position of each component + ComponentFlags properties, ///< [in] properties about byteAligned, exportNorm + UINT_32 resultBits, ///< [in] result bits: total bpp after decompression + UINT_8* pPixel) ///< [out] a depth/stencil pixel value +{ + UINT_32 i; + UINT_32 j; + UINT_32 start; + UINT_32 size; + UINT_32 byte; + UINT_32 value = 0; + UINT_32 compMask; + UINT_32 elemMask=0; + UINT_32 elementXor = 0; // address xor when reading bytes from elements + + // @@ NOTE: assert if called on a compressed format! + + if (properties.byteAligned) // Components are all byte-sized + { + for (i = 0; i < numComps; i++) // Then for each component + { + // Copy the bytes of the component into the element + start = pCompStart[i] / 8; + size = pCompBits[i] / 8; + for (j = 0; j < size; j++) + { + pPixel[(j+start)^elementXor] = static_cast(pComps[i] >> (8*j)); + } + } + } + else // Element is 32-bits or less, components are bit fields + { + // First, extract each component in turn and combine it into a 32-bit value + for (i = 0; i < numComps; i++) + { + compMask = (1 << pCompBits[i]) - 1; + elemMask |= compMask << pCompStart[i]; + value |= (pComps[i] & compMask) << pCompStart[i]; + } + + // Mext, copy the masked value into the element + size = (resultBits + 7) / 8; + for (i = 0; i < size; i++) + { + byte = pPixel[i^elementXor] & ~(elemMask >> (8*i)); + pPixel[i^elementXor] = static_cast(byte | ((elemMask & value) >> (8*i))); + } + } +} + +/** +**************************************************************************************************** +* Flt32ToDepthPixel +* +* @brief +* Convert a FLT_32 value to a depth/stencil pixel value +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID ElemLib::Flt32ToDepthPixel( + AddrDepthFormat format, ///< [in] Depth format + const ADDR_FLT_32 comps[2], ///< [in] two components of depth + UINT_8* pPixel ///< [out] depth pixel value + ) const +{ + UINT_32 i; + UINT_32 values[2]; + ComponentFlags properties; // byteAligned, exportNorm + UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression + + PixelFormatInfo fmt; + + // get type for each component + PixGetDepthCompInfo(format, &fmt); + + //initialize properties + properties.byteAligned = TRUE; + properties.exportNorm = TRUE; + properties.floatComp = FALSE; + + //set properties and result bits + for (i = 0; i < 2; i++) + { + if ((fmt.compBit[i] & 7) || (fmt.compStart[i] & 7)) + { + properties.byteAligned = FALSE; + } + + if (resultBits < fmt.compStart[i] + fmt.compBit[i]) + { + resultBits = fmt.compStart[i] + fmt.compBit[i]; + } + + // Clear ADDR_EXPORT_NORM if can't be represented as 11-bit or smaller [-1..+1] format + if (fmt.compBit[i] > 11 || fmt.numType[i] >= ADDR_USCALED) + { + properties.exportNorm = FALSE; + } + + // Mark if there are any floating point components + if ((fmt.numType[i] == ADDR_U4FLOATC) || (fmt.numType[i] >= ADDR_S8FLOAT) ) + { + properties.floatComp = TRUE; + } + } + + // Convert the two input floats to integer values + for (i = 0; i < 2; i++) + { + Flt32sToInt32s(comps[i], fmt.compBit[i], fmt.numType[i], &values[i]); + } + + // Then pack the two integer components, in the proper order + Int32sToPixel(2, values, fmt.compBit, fmt.compStart, properties, resultBits, pPixel ); + +} + +/** +**************************************************************************************************** +* Flt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a red/green/blue/alpha pixel value +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID ElemLib::Flt32ToColorPixel( + AddrColorFormat format, ///< [in] Color format + AddrSurfaceNumber surfNum, ///< [in] Surface number + AddrSurfaceSwap surfSwap, ///< [in] Surface swap + const ADDR_FLT_32 comps[4], ///< [in] four components of color + UINT_8* pPixel ///< [out] a red/green/blue/alpha pixel value + ) const +{ + PixelFormatInfo pixelInfo; + + UINT_32 i; + UINT_32 values[4]; + ComponentFlags properties; // byteAligned, exportNorm + UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression + + memset(&pixelInfo, 0, sizeof(PixelFormatInfo)); + + PixGetColorCompInfo(format, surfNum, surfSwap, &pixelInfo); + + //initialize properties + properties.byteAligned = TRUE; + properties.exportNorm = TRUE; + properties.floatComp = FALSE; + + //set properties and result bits + for (i = 0; i < 4; i++) + { + if ( (pixelInfo.compBit[i] & 7) || (pixelInfo.compStart[i] & 7) ) + { + properties.byteAligned = FALSE; + } + + if (resultBits < pixelInfo.compStart[i] + pixelInfo.compBit[i]) + { + resultBits = pixelInfo.compStart[i] + pixelInfo.compBit[i]; + } + + if (m_fp16ExportNorm) + { + // Clear ADDR_EXPORT_NORM if can't be represented as 11-bit or smaller [-1..+1] format + // or if it's not FP and <=16 bits + if (((pixelInfo.compBit[i] > 11) || (pixelInfo.numType[i] >= ADDR_USCALED)) + && (pixelInfo.numType[i] !=ADDR_U4FLOATC)) + { + properties.exportNorm = FALSE; + } + } + else + { + // Clear ADDR_EXPORT_NORM if can't be represented as 11-bit or smaller [-1..+1] format + if (pixelInfo.compBit[i] > 11 || pixelInfo.numType[i] >= ADDR_USCALED) + { + properties.exportNorm = FALSE; + } + } + + // Mark if there are any floating point components + if ( (pixelInfo.numType[i] == ADDR_U4FLOATC) || + (pixelInfo.numType[i] >= ADDR_S8FLOAT) ) + { + properties.floatComp = TRUE; + } + } + + // Convert the four input floats to integer values + for (i = 0; i < 4; i++) + { + Flt32sToInt32s(comps[i], pixelInfo.compBit[i], pixelInfo.numType[i], &values[i]); + } + + // Then pack the four integer components, in the proper order + Int32sToPixel(4, values, &pixelInfo.compBit[0], &pixelInfo.compStart[0], + properties, resultBits, pPixel); +} + +/** +**************************************************************************************************** +* ElemLib::GetCompType +* +* @brief +* Fill per component info +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID ElemLib::GetCompType( + AddrColorFormat format, ///< [in] surface format + AddrSurfaceNumber numType, ///< [in] number type + PixelFormatInfo* pInfo) ///< [in][out] per component info out +{ + BOOL_32 handled = FALSE; + + // Floating point formats override the number format + switch (format) + { + case ADDR_COLOR_16_FLOAT: // fall through for all pure floating point format + case ADDR_COLOR_16_16_FLOAT: + case ADDR_COLOR_16_16_16_16_FLOAT: + case ADDR_COLOR_32_FLOAT: + case ADDR_COLOR_32_32_FLOAT: + case ADDR_COLOR_32_32_32_32_FLOAT: + case ADDR_COLOR_10_11_11_FLOAT: + case ADDR_COLOR_11_11_10_FLOAT: + numType = ADDR_NUMBER_FLOAT; + break; + // Special handling for the depth formats + case ADDR_COLOR_8_24: // fall through for these 2 similar format + case ADDR_COLOR_24_8: + for (UINT_32 c = 0; c < 4; c++) + { + if (pInfo->compBit[c] == 8) + { + pInfo->numType[c] = ADDR_UINT_BITS; + } + else if (pInfo->compBit[c] == 24) + { + pInfo->numType[c] = ADDR_UNORM_R6XX; + } + else + { + pInfo->numType[c] = ADDR_NO_NUMBER; + } + } + handled = TRUE; + break; + case ADDR_COLOR_8_24_FLOAT: // fall through for these 3 similar format + case ADDR_COLOR_24_8_FLOAT: + case ADDR_COLOR_X24_8_32_FLOAT: + for (UINT_32 c = 0; c < 4; c++) + { + if (pInfo->compBit[c] == 8) + { + pInfo->numType[c] = ADDR_UINT_BITS; + } + else if (pInfo->compBit[c] == 24) + { + pInfo->numType[c] = ADDR_U4FLOATC; + } + else if (pInfo->compBit[c] == 32) + { + pInfo->numType[c] = ADDR_S8FLOAT32; + } + else + { + pInfo->numType[c] = ADDR_NO_NUMBER; + } + } + handled = TRUE; + break; + default: + break; + } + + if (!handled) + { + for (UINT_32 c = 0; c < 4; c++) + { + // Assign a number type for each component + AddrSurfaceNumber cnum; + + // First handle default component values + if (pInfo->compBit[c] == 0) + { + if (c < 3) + { + pInfo->numType[c] = ADDR_ZERO; // Default is zero for RGB + } + else if (numType == ADDR_NUMBER_UINT || numType == ADDR_NUMBER_SINT) + { + pInfo->numType[c] = ADDR_EPSILON; // Alpha INT_32 bits default is 0x01 + } + else + { + pInfo->numType[c] = ADDR_ONE; // Alpha normal default is float 1.0 + } + continue; + } + // Now handle small components + else if (pInfo->compBit[c] == 1) + { + if (numType == ADDR_NUMBER_UINT || numType == ADDR_NUMBER_SINT) + { + cnum = ADDR_NUMBER_UINT; + } + else + { + cnum = ADDR_NUMBER_UNORM; + } + } + else + { + cnum = numType; + } + + // If no default, set the number type fom num, compbits, and architecture + switch (cnum) + { + case ADDR_NUMBER_SRGB: + pInfo->numType[c] = (c < 3) ? ADDR_GAMMA8_R6XX : ADDR_UNORM_R6XX; + break; + case ADDR_NUMBER_UNORM: + pInfo->numType[c] = ADDR_UNORM_R6XX; + break; + case ADDR_NUMBER_SNORM: + pInfo->numType[c] = ADDR_SNORM_R6XX; + break; + case ADDR_NUMBER_USCALED: + pInfo->numType[c] = ADDR_USCALED; // @@ Do we need separate Pele routine? + break; + case ADDR_NUMBER_SSCALED: + pInfo->numType[c] = ADDR_SSCALED; // @@ Do we need separate Pele routine? + break; + case ADDR_NUMBER_FLOAT: + if (pInfo->compBit[c] == 32) + { + pInfo->numType[c] = ADDR_S8FLOAT32; + } + else if (pInfo->compBit[c] == 16) + { + pInfo->numType[c] = ADDR_S5FLOAT; + } + else if (pInfo->compBit[c] >= 10) + { + pInfo->numType[c] = ADDR_U5FLOAT; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + break; + case ADDR_NUMBER_SINT: + pInfo->numType[c] = ADDR_SINT_BITS; + break; + case ADDR_NUMBER_UINT: + pInfo->numType[c] = ADDR_UINT_BITS; + break; + + default: + ADDR_ASSERT(!"Invalid number type"); + pInfo->numType[c] = ADDR_NO_NUMBER; + break; + } + } + } +} + +/** +**************************************************************************************************** +* ElemLib::GetCompSwap +* +* @brief +* Get components swapped for color surface +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID ElemLib::GetCompSwap( + AddrSurfaceSwap swap, ///< [in] swap mode + PixelFormatInfo* pInfo) ///< [in,out] output per component info +{ + switch (pInfo->comps) + { + case 4: + switch (swap) + { + case ADDR_SWAP_ALT: + SwapComps( 0, 2, pInfo ); + break; // BGRA + case ADDR_SWAP_STD_REV: + SwapComps( 0, 3, pInfo ); + SwapComps( 1, 2, pInfo ); + break; // ABGR + case ADDR_SWAP_ALT_REV: + SwapComps( 0, 3, pInfo ); + SwapComps( 0, 2, pInfo ); + SwapComps( 0, 1, pInfo ); + break; // ARGB + default: + break; + } + break; + case 3: + switch (swap) + { + case ADDR_SWAP_ALT_REV: + SwapComps( 0, 3, pInfo ); + SwapComps( 0, 2, pInfo ); + break; // AGR + case ADDR_SWAP_STD_REV: + SwapComps( 0, 2, pInfo ); + break; // BGR + case ADDR_SWAP_ALT: + SwapComps( 2, 3, pInfo ); + break; // RGA + default: + break; // RGB + } + break; + case 2: + switch (swap) + { + case ADDR_SWAP_ALT_REV: + SwapComps( 0, 1, pInfo ); + SwapComps( 1, 3, pInfo ); + break; // AR + case ADDR_SWAP_STD_REV: + SwapComps( 0, 1, pInfo ); + break; // GR + case ADDR_SWAP_ALT: + SwapComps( 1, 3, pInfo ); + break; // RA + default: + break; // RG + } + break; + case 1: + switch (swap) + { + case ADDR_SWAP_ALT_REV: + SwapComps( 0, 3, pInfo ); + break; // A + case ADDR_SWAP_STD_REV: + SwapComps( 0, 2, pInfo ); + break; // B + case ADDR_SWAP_ALT: + SwapComps( 0, 1, pInfo ); + break; // G + default: + break; // R + } + break; + } +} + +/** +**************************************************************************************************** +* ElemLib::GetCompSwap +* +* @brief +* Get components swapped for color surface +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID ElemLib::SwapComps( + UINT_32 c0, ///< [in] component index 0 + UINT_32 c1, ///< [in] component index 1 + PixelFormatInfo* pInfo) ///< [in,out] output per component info +{ + UINT_32 start; + UINT_32 bits; + + start = pInfo->compStart[c0]; + pInfo->compStart[c0] = pInfo->compStart[c1]; + pInfo->compStart[c1] = start; + + bits = pInfo->compBit[c0]; + pInfo->compBit[c0] = pInfo->compBit[c1]; + pInfo->compBit[c1] = bits; +} + +/** +**************************************************************************************************** +* ElemLib::PixGetColorCompInfo +* +* @brief +* Get per component info for color surface +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID ElemLib::PixGetColorCompInfo( + AddrColorFormat format, ///< [in] surface format, read from register + AddrSurfaceNumber number, ///< [in] pixel number type + AddrSurfaceSwap swap, ///< [in] component swap mode + PixelFormatInfo* pInfo ///< [out] output per component info + ) const +{ + // 1. Get componet bits + switch (format) + { + case ADDR_COLOR_8: + GetCompBits(8, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_1_5_5_5: + GetCompBits(5, 5, 5, 1, pInfo); + break; + case ADDR_COLOR_5_6_5: + GetCompBits(8, 6, 5, 0, pInfo); + break; + case ADDR_COLOR_6_5_5: + GetCompBits(5, 5, 6, 0, pInfo); + break; + case ADDR_COLOR_8_8: + GetCompBits(8, 8, 0, 0, pInfo); + break; + case ADDR_COLOR_4_4_4_4: + GetCompBits(4, 4, 4, 4, pInfo); + break; + case ADDR_COLOR_16: + GetCompBits(16, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_8_8_8_8: + GetCompBits(8, 8, 8, 8, pInfo); + break; + case ADDR_COLOR_2_10_10_10: + GetCompBits(10, 10, 10, 2, pInfo); + break; + case ADDR_COLOR_10_11_11: + GetCompBits(11, 11, 10, 0, pInfo); + break; + case ADDR_COLOR_11_11_10: + GetCompBits(10, 11, 11, 0, pInfo); + break; + case ADDR_COLOR_16_16: + GetCompBits(16, 16, 0, 0, pInfo); + break; + case ADDR_COLOR_16_16_16_16: + GetCompBits(16, 16, 16, 16, pInfo); + break; + case ADDR_COLOR_16_FLOAT: + GetCompBits(16, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_16_16_FLOAT: + GetCompBits(16, 16, 0, 0, pInfo); + break; + case ADDR_COLOR_32_FLOAT: + GetCompBits(32, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_32_32_FLOAT: + GetCompBits(32, 32, 0, 0, pInfo); + break; + case ADDR_COLOR_16_16_16_16_FLOAT: + GetCompBits(16, 16, 16, 16, pInfo); + break; + case ADDR_COLOR_32_32_32_32_FLOAT: + GetCompBits(32, 32, 32, 32, pInfo); + break; + + case ADDR_COLOR_32: + GetCompBits(32, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_32_32: + GetCompBits(32, 32, 0, 0, pInfo); + break; + case ADDR_COLOR_32_32_32_32: + GetCompBits(32, 32, 32, 32, pInfo); + break; + case ADDR_COLOR_10_10_10_2: + GetCompBits(2, 10, 10, 10, pInfo); + break; + case ADDR_COLOR_10_11_11_FLOAT: + GetCompBits(11, 11, 10, 0, pInfo); + break; + case ADDR_COLOR_11_11_10_FLOAT: + GetCompBits(10, 11, 11, 0, pInfo); + break; + case ADDR_COLOR_5_5_5_1: + GetCompBits(1, 5, 5, 5, pInfo); + break; + case ADDR_COLOR_3_3_2: + GetCompBits(2, 3, 3, 0, pInfo); + break; + case ADDR_COLOR_4_4: + GetCompBits(4, 4, 0, 0, pInfo); + break; + case ADDR_COLOR_8_24: + case ADDR_COLOR_8_24_FLOAT: // same bit count, fall through + GetCompBits(24, 8, 0, 0, pInfo); + break; + case ADDR_COLOR_24_8: + case ADDR_COLOR_24_8_FLOAT: // same bit count, fall through + GetCompBits(8, 24, 0, 0, pInfo); + break; + case ADDR_COLOR_X24_8_32_FLOAT: + GetCompBits(32, 8, 0, 0, pInfo); + break; + + case ADDR_COLOR_INVALID: + GetCompBits(0, 0, 0, 0, pInfo); + break; + default: + ADDR_ASSERT(0); + GetCompBits(0, 0, 0, 0, pInfo); + break; + } + + // 2. Get component number type + + GetCompType(format, number, pInfo); + + // 3. Swap components if needed + + GetCompSwap(swap, pInfo); +} + +/** +**************************************************************************************************** +* ElemLib::PixGetDepthCompInfo +* +* @brief +* Get per component info for depth surface +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID ElemLib::PixGetDepthCompInfo( + AddrDepthFormat format, ///< [in] surface format, read from register + PixelFormatInfo* pInfo ///< [out] output per component bits and type + ) const +{ + if (m_depthPlanarType == ADDR_DEPTH_PLANAR_R800) + { + if (format == ADDR_DEPTH_8_24_FLOAT) + { + format = ADDR_DEPTH_X24_8_32_FLOAT; // Use this format to represent R800's D24FS8 + } + + if (format == ADDR_DEPTH_X8_24_FLOAT) + { + format = ADDR_DEPTH_32_FLOAT; + } + } + + switch (format) + { + case ADDR_DEPTH_16: + GetCompBits(16, 0, 0, 0, pInfo); + break; + case ADDR_DEPTH_8_24: + case ADDR_DEPTH_8_24_FLOAT: // similar format, fall through + GetCompBits(24, 8, 0, 0, pInfo); + break; + case ADDR_DEPTH_X8_24: + case ADDR_DEPTH_X8_24_FLOAT: // similar format, fall through + GetCompBits(24, 0, 0, 0, pInfo); + break; + case ADDR_DEPTH_32_FLOAT: + GetCompBits(32, 0, 0, 0, pInfo); + break; + case ADDR_DEPTH_X24_8_32_FLOAT: + GetCompBits(32, 8, 0, 0, pInfo); + break; + case ADDR_DEPTH_INVALID: + GetCompBits(0, 0, 0, 0, pInfo); + break; + default: + ADDR_ASSERT(0); + GetCompBits(0, 0, 0, 0, pInfo); + break; + } + + switch (format) + { + case ADDR_DEPTH_16: + pInfo->numType [0] = ADDR_UNORM_R6XX; + pInfo->numType [1] = ADDR_ZERO; + break; + case ADDR_DEPTH_8_24: + pInfo->numType [0] = ADDR_UNORM_R6XXDB; + pInfo->numType [1] = ADDR_UINT_BITS; + break; + case ADDR_DEPTH_8_24_FLOAT: + pInfo->numType [0] = ADDR_U4FLOATC; + pInfo->numType [1] = ADDR_UINT_BITS; + break; + case ADDR_DEPTH_X8_24: + pInfo->numType [0] = ADDR_UNORM_R6XXDB; + pInfo->numType [1] = ADDR_ZERO; + break; + case ADDR_DEPTH_X8_24_FLOAT: + pInfo->numType [0] = ADDR_U4FLOATC; + pInfo->numType [1] = ADDR_ZERO; + break; + case ADDR_DEPTH_32_FLOAT: + pInfo->numType [0] = ADDR_S8FLOAT32; + pInfo->numType [1] = ADDR_ZERO; + break; + case ADDR_DEPTH_X24_8_32_FLOAT: + pInfo->numType [0] = ADDR_S8FLOAT32; + pInfo->numType [1] = ADDR_UINT_BITS; + break; + default: + pInfo->numType [0] = ADDR_NO_NUMBER; + pInfo->numType [1] = ADDR_NO_NUMBER; + break; + } + + pInfo->numType [2] = ADDR_NO_NUMBER; + pInfo->numType [3] = ADDR_NO_NUMBER; +} + +/** +**************************************************************************************************** +* ElemLib::PixGetExportNorm +* +* @brief +* Check if fp16 export norm can be enabled. +* +* @return +* TRUE if this can be enabled. +* +**************************************************************************************************** +*/ +BOOL_32 ElemLib::PixGetExportNorm( + AddrColorFormat colorFmt, ///< [in] surface format, read from register + AddrSurfaceNumber numberFmt, ///< [in] pixel number type + AddrSurfaceSwap swap ///< [in] components swap type + ) const +{ + BOOL_32 enabled = TRUE; + + PixelFormatInfo formatInfo; + + PixGetColorCompInfo(colorFmt, numberFmt, swap, &formatInfo); + + for (UINT_32 c = 0; c < 4; c++) + { + if (m_fp16ExportNorm) + { + if (((formatInfo.compBit[c] > 11) || (formatInfo.numType[c] > ADDR_USCALED)) && + (formatInfo.numType[c] != ADDR_U4FLOATC) && + (formatInfo.numType[c] != ADDR_S5FLOAT) && + (formatInfo.numType[c] != ADDR_S5FLOATM) && + (formatInfo.numType[c] != ADDR_U5FLOAT) && + (formatInfo.numType[c] != ADDR_U3FLOATM)) + { + enabled = FALSE; + break; + } + } + else + { + if ((formatInfo.compBit[c] > 11) || (formatInfo.numType[c] > ADDR_USCALED)) + { + enabled = FALSE; + break; + } + } + } + + return enabled; +} + +/** +**************************************************************************************************** +* ElemLib::AdjustSurfaceInfo +* +* @brief +* Adjust bpp/base pitch/width/height according to elemMode and expandX/Y +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID ElemLib::AdjustSurfaceInfo( + ElemMode elemMode, ///< [in] element mode + UINT_32 expandX, ///< [in] decompression expansion factor in X + UINT_32 expandY, ///< [in] decompression expansion factor in Y + UINT_32* pBpp, ///< [in,out] bpp + UINT_32* pBasePitch, ///< [in,out] base pitch + UINT_32* pWidth, ///< [in,out] width + UINT_32* pHeight) ///< [in,out] height +{ + UINT_32 packedBits; + UINT_32 basePitch; + UINT_32 width; + UINT_32 height; + UINT_32 bpp; + BOOL_32 bBCnFormat = FALSE; + + ADDR_ASSERT(pBpp != NULL); + ADDR_ASSERT(pWidth != NULL && pHeight != NULL && pBasePitch != NULL); + + if (pBpp) + { + bpp = *pBpp; + + switch (elemMode) + { + case ADDR_EXPANDED: + packedBits = bpp / expandX / expandY; + break; + case ADDR_PACKED_STD: // Different bit order + case ADDR_PACKED_REV: + packedBits = bpp * expandX * expandY; + break; + case ADDR_PACKED_GBGR: + case ADDR_PACKED_BGRG: + packedBits = bpp; // 32-bit packed ==> 2 32-bit result + break; + case ADDR_PACKED_BC1: // Fall through + case ADDR_PACKED_BC4: + packedBits = 64; + bBCnFormat = TRUE; + break; + case ADDR_PACKED_BC2: // Fall through + case ADDR_PACKED_BC3: // Fall through + case ADDR_PACKED_BC5: // Fall through + bBCnFormat = TRUE; + // fall through + case ADDR_PACKED_ASTC: + case ADDR_PACKED_ETC2_128BPP: + packedBits = 128; + break; + case ADDR_PACKED_ETC2_64BPP: + packedBits = 64; + break; + case ADDR_ROUND_BY_HALF: // Fall through + case ADDR_ROUND_TRUNCATE: // Fall through + case ADDR_ROUND_DITHER: // Fall through + case ADDR_UNCOMPRESSED: + packedBits = bpp; + break; + default: + packedBits = bpp; + ADDR_ASSERT_ALWAYS(); + break; + } + + *pBpp = packedBits; + } + + if (pWidth && pHeight && pBasePitch) + { + basePitch = *pBasePitch; + width = *pWidth; + height = *pHeight; + + if ((expandX > 1) || (expandY > 1)) + { + if (elemMode == ADDR_EXPANDED) + { + basePitch *= expandX; + width *= expandX; + height *= expandY; + } + else + { + // Evergreen family workaround + if (bBCnFormat && (m_pAddrLib->GetChipFamily() == ADDR_CHIP_FAMILY_R8XX)) + { + // For BCn we now pad it to POW2 at the beginning so it is safe to + // divide by 4 directly + basePitch = basePitch / expandX; + width = width / expandX; + height = height / expandY; +#if DEBUG + width = (width == 0) ? 1 : width; + height = (height == 0) ? 1 : height; + + if ((*pWidth > PowTwoAlign(width, 8) * expandX) || + (*pHeight > PowTwoAlign(height, 8) * expandY)) // 8 is 1D tiling alignment + { + // if this assertion is hit we may have issues if app samples + // rightmost/bottommost pixels + ADDR_ASSERT_ALWAYS(); + } +#endif + } + else // Not BCn format we still keep old way (FMT_1? No real test yet) + { + basePitch = (basePitch + expandX - 1) / expandX; + width = (width + expandX - 1) / expandX; + height = (height + expandY - 1) / expandY; + } + } + + *pBasePitch = basePitch; // 0 is legal value for base pitch. + *pWidth = (width == 0) ? 1 : width; + *pHeight = (height == 0) ? 1 : height; + } //if (pWidth && pHeight && pBasePitch) + } +} + +/** +**************************************************************************************************** +* ElemLib::RestoreSurfaceInfo +* +* @brief +* Reverse operation of AdjustSurfaceInfo +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID ElemLib::RestoreSurfaceInfo( + ElemMode elemMode, ///< [in] element mode + UINT_32 expandX, ///< [in] decompression expansion factor in X + UINT_32 expandY, ///< [out] decompression expansion factor in Y + UINT_32* pBpp, ///< [in,out] bpp + UINT_32* pWidth, ///< [in,out] width + UINT_32* pHeight) ///< [in,out] height +{ + UINT_32 originalBits; + UINT_32 width; + UINT_32 height; + UINT_32 bpp; + + BOOL_32 bBCnFormat = FALSE; + (void)bBCnFormat; + + ADDR_ASSERT(pBpp != NULL); + ADDR_ASSERT(pWidth != NULL && pHeight != NULL); + + if (pBpp) + { + bpp = *pBpp; + + switch (elemMode) + { + case ADDR_EXPANDED: + originalBits = bpp * expandX * expandY; + break; + case ADDR_PACKED_STD: // Different bit order + case ADDR_PACKED_REV: + originalBits = bpp / expandX / expandY; + break; + case ADDR_PACKED_GBGR: + case ADDR_PACKED_BGRG: + originalBits = bpp; // 32-bit packed ==> 2 32-bit result + break; + case ADDR_PACKED_BC1: // Fall through + case ADDR_PACKED_BC4: + originalBits = 64; + bBCnFormat = TRUE; + break; + case ADDR_PACKED_BC2: // Fall through + case ADDR_PACKED_BC3: // Fall through + case ADDR_PACKED_BC5: + bBCnFormat = TRUE; + // fall through + case ADDR_PACKED_ASTC: + case ADDR_PACKED_ETC2_128BPP: + originalBits = 128; + break; + case ADDR_PACKED_ETC2_64BPP: + originalBits = 64; + break; + case ADDR_ROUND_BY_HALF: // Fall through + case ADDR_ROUND_TRUNCATE: // Fall through + case ADDR_ROUND_DITHER: // Fall through + case ADDR_UNCOMPRESSED: + originalBits = bpp; + break; + default: + originalBits = bpp; + ADDR_ASSERT_ALWAYS(); + break; + } + + *pBpp = originalBits; + } + + if (pWidth && pHeight) + { + width = *pWidth; + height = *pHeight; + + if ((expandX > 1) || (expandY > 1)) + { + if (elemMode == ADDR_EXPANDED) + { + width /= expandX; + height /= expandY; + } + else + { + width *= expandX; + height *= expandY; + } + } + + *pWidth = (width == 0) ? 1 : width; + *pHeight = (height == 0) ? 1 : height; + } +} + +/** +**************************************************************************************************** +* ElemLib::GetBitsPerPixel +* +* @brief +* Compute the total bits per element according to a format +* code. For compressed formats, this is not the same as +* the number of bits per decompressed element. +* +* @return +* Bits per pixel +**************************************************************************************************** +*/ +UINT_32 ElemLib::GetBitsPerPixel( + AddrFormat format, ///< [in] surface format code + ElemMode* pElemMode, ///< [out] element mode + UINT_32* pExpandX, ///< [out] decompression expansion factor in X + UINT_32* pExpandY, ///< [out] decompression expansion factor in Y + UINT_32* pUnusedBits) ///< [out] bits unused +{ + UINT_32 bpp; + UINT_32 expandX = 1; + UINT_32 expandY = 1; + UINT_32 bitUnused = 0; + ElemMode elemMode = ADDR_UNCOMPRESSED; // default value + + switch (format) + { + case ADDR_FMT_8: + bpp = 8; + break; + case ADDR_FMT_1_5_5_5: + case ADDR_FMT_5_6_5: + case ADDR_FMT_6_5_5: + case ADDR_FMT_8_8: + case ADDR_FMT_4_4_4_4: + case ADDR_FMT_16: + bpp = 16; + break; + case ADDR_FMT_GB_GR: + elemMode = ADDR_PACKED_GBGR; + bpp = m_configFlags.use32bppFor422Fmt ? 32 : 16; + expandX = m_configFlags.use32bppFor422Fmt ? 2 : 1; + break; + case ADDR_FMT_BG_RG: + elemMode = ADDR_PACKED_BGRG; + bpp = m_configFlags.use32bppFor422Fmt ? 32 : 16; + expandX = m_configFlags.use32bppFor422Fmt ? 2 : 1; + break; + case ADDR_FMT_8_8_8_8: + case ADDR_FMT_2_10_10_10: + case ADDR_FMT_10_11_11: + case ADDR_FMT_11_11_10: + case ADDR_FMT_16_16: + case ADDR_FMT_32: + case ADDR_FMT_24_8: + bpp = 32; + break; + case ADDR_FMT_16_16_16_16: + case ADDR_FMT_32_32: + case ADDR_FMT_CTX1: + bpp = 64; + break; + case ADDR_FMT_32_32_32_32: + bpp = 128; + break; + case ADDR_FMT_INVALID: + bpp = 0; + break; + case ADDR_FMT_1_REVERSED: + elemMode = ADDR_PACKED_REV; + expandX = 8; + bpp = 1; + break; + case ADDR_FMT_1: + elemMode = ADDR_PACKED_STD; + expandX = 8; + bpp = 1; + break; + case ADDR_FMT_4_4: + case ADDR_FMT_3_3_2: + bpp = 8; + break; + case ADDR_FMT_5_5_5_1: + bpp = 16; + break; + case ADDR_FMT_32_AS_8: + case ADDR_FMT_32_AS_8_8: + case ADDR_FMT_8_24: + case ADDR_FMT_10_10_10_2: + case ADDR_FMT_5_9_9_9_SHAREDEXP: + bpp = 32; + break; + case ADDR_FMT_X24_8_32_FLOAT: + bpp = 64; + bitUnused = 24; + break; + case ADDR_FMT_8_8_8: + elemMode = ADDR_EXPANDED; + bpp = 24;//@@ 8; // read 3 elements per pixel + expandX = 3; + break; + case ADDR_FMT_16_16_16: + elemMode = ADDR_EXPANDED; + bpp = 48;//@@ 16; // read 3 elements per pixel + expandX = 3; + break; + case ADDR_FMT_32_32_32: + elemMode = ADDR_EXPANDED; + expandX = 3; + bpp = 96;//@@ 32; // read 3 elements per pixel + break; + case ADDR_FMT_BC1: + elemMode = ADDR_PACKED_BC1; + expandX = 4; + expandY = 4; + bpp = 64; + break; + case ADDR_FMT_BC4: + elemMode = ADDR_PACKED_BC4; + expandX = 4; + expandY = 4; + bpp = 64; + break; + case ADDR_FMT_BC2: + elemMode = ADDR_PACKED_BC2; + expandX = 4; + expandY = 4; + bpp = 128; + break; + case ADDR_FMT_BC3: + elemMode = ADDR_PACKED_BC3; + expandX = 4; + expandY = 4; + bpp = 128; + break; + case ADDR_FMT_BC5: + case ADDR_FMT_BC6: // reuse ADDR_PACKED_BC5 + case ADDR_FMT_BC7: // reuse ADDR_PACKED_BC5 + elemMode = ADDR_PACKED_BC5; + expandX = 4; + expandY = 4; + bpp = 128; + break; + + case ADDR_FMT_ETC2_64BPP: + elemMode = ADDR_PACKED_ETC2_64BPP; + expandX = 4; + expandY = 4; + bpp = 64; + break; + + case ADDR_FMT_ETC2_128BPP: + elemMode = ADDR_PACKED_ETC2_128BPP; + expandX = 4; + expandY = 4; + bpp = 128; + break; + + case ADDR_FMT_ASTC_4x4: + elemMode = ADDR_PACKED_ASTC; + expandX = 4; + expandY = 4; + bpp = 128; + break; + + case ADDR_FMT_ASTC_5x4: + elemMode = ADDR_PACKED_ASTC; + expandX = 5; + expandY = 4; + bpp = 128; + break; + + case ADDR_FMT_ASTC_5x5: + elemMode = ADDR_PACKED_ASTC; + expandX = 5; + expandY = 5; + bpp = 128; + break; + + case ADDR_FMT_ASTC_6x5: + elemMode = ADDR_PACKED_ASTC; + expandX = 6; + expandY = 5; + bpp = 128; + break; + + case ADDR_FMT_ASTC_6x6: + elemMode = ADDR_PACKED_ASTC; + expandX = 6; + expandY = 6; + bpp = 128; + break; + + case ADDR_FMT_ASTC_8x5: + elemMode = ADDR_PACKED_ASTC; + expandX = 8; + expandY = 5; + bpp = 128; + break; + + case ADDR_FMT_ASTC_8x6: + elemMode = ADDR_PACKED_ASTC; + expandX = 8; + expandY = 6; + bpp = 128; + break; + + case ADDR_FMT_ASTC_8x8: + elemMode = ADDR_PACKED_ASTC; + expandX = 8; + expandY = 8; + bpp = 128; + break; + + case ADDR_FMT_ASTC_10x5: + elemMode = ADDR_PACKED_ASTC; + expandX = 10; + expandY = 5; + bpp = 128; + break; + + case ADDR_FMT_ASTC_10x6: + elemMode = ADDR_PACKED_ASTC; + expandX = 10; + expandY = 6; + bpp = 128; + break; + + case ADDR_FMT_ASTC_10x8: + elemMode = ADDR_PACKED_ASTC; + expandX = 10; + expandY = 8; + bpp = 128; + break; + + case ADDR_FMT_ASTC_10x10: + elemMode = ADDR_PACKED_ASTC; + expandX = 10; + expandY = 10; + bpp = 128; + break; + + case ADDR_FMT_ASTC_12x10: + elemMode = ADDR_PACKED_ASTC; + expandX = 12; + expandY = 10; + bpp = 128; + break; + + case ADDR_FMT_ASTC_12x12: + elemMode = ADDR_PACKED_ASTC; + expandX = 12; + expandY = 12; + bpp = 128; + break; + + default: + bpp = 0; + ADDR_ASSERT_ALWAYS(); + break; + // @@ or should this be an error? + } + + SafeAssign(pExpandX, expandX); + SafeAssign(pExpandY, expandY); + SafeAssign(pUnusedBits, bitUnused); + SafeAssign(reinterpret_cast(pElemMode), elemMode); + + return bpp; +} + +/** +**************************************************************************************************** +* ElemLib::GetCompBits +* +* @brief +* Set each component's bit size and bit start. And set element mode and number type +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID ElemLib::GetCompBits( + UINT_32 c0, ///< [in] bits of component 0 + UINT_32 c1, ///< [in] bits of component 1 + UINT_32 c2, ///< [in] bits of component 2 + UINT_32 c3, ///< [in] bits of component 3 + PixelFormatInfo* pInfo, ///< [out] per component info out + ElemMode elemMode) ///< [in] element mode +{ + pInfo->comps = 0; + + pInfo->compBit[0] = c0; + pInfo->compBit[1] = c1; + pInfo->compBit[2] = c2; + pInfo->compBit[3] = c3; + + pInfo->compStart[0] = 0; + pInfo->compStart[1] = c0; + pInfo->compStart[2] = c0+c1; + pInfo->compStart[3] = c0+c1+c2; + + pInfo->elemMode = elemMode; + // still needed since component swap may depend on number of components + for (INT i=0; i<4; i++) + { + if (pInfo->compBit[i] == 0) + { + pInfo->compStart[i] = 0; // all null components start at bit 0 + pInfo->numType[i] = ADDR_NO_NUMBER; // and have no number type + } + else + { + pInfo->comps++; + } + } +} + +/** +**************************************************************************************************** +* ElemLib::GetCompBits +* +* @brief +* Set the clear color (or clear depth/stencil) for a surface +* +* @note +* If clearColor is zero, a default clear value is used in place of comps[4]. +* If float32 is set, full precision is used, else the mantissa is reduced to 12-bits +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID ElemLib::SetClearComps( + ADDR_FLT_32 comps[4], ///< [in,out] components + BOOL_32 clearColor, ///< [in] TRUE if clear color is set (CLEAR_COLOR) + BOOL_32 float32) ///< [in] TRUE if float32 component (BLEND_FLOAT32) +{ + INT_32 i; + + // Use default clearvalues if clearColor is disabled + if (clearColor == FALSE) + { + for (i=0; i<3; i++) + { + comps[i].f = 0.0; + } + comps[3].f = 1.0; + } + + // Otherwise use the (modified) clear value + else + { + for (i=0; i<4; i++) + { // If full precision, use clear value unchanged + if (float32) + { + // Do nothing + //comps[i] = comps[i]; + } + // Else if it is a NaN, use the standard NaN value + else if ((comps[i].u & 0x7FFFFFFF) > 0x7F800000) + { + comps[i].u = 0xFFC00000; + } + // Else reduce the mantissa precision + else + { + comps[i].u = comps[i].u & 0xFFFFF000; + } + } + } +} + +/** +**************************************************************************************************** +* ElemLib::IsBlockCompressed +* +* @brief +* TRUE if this is block compressed format +* +* @note +* +* @return +* BOOL_32 +**************************************************************************************************** +*/ +BOOL_32 ElemLib::IsBlockCompressed( + AddrFormat format) ///< [in] Format +{ + return (((format >= ADDR_FMT_BC1) && (format <= ADDR_FMT_BC7)) || + ((format >= ADDR_FMT_ASTC_4x4) && (format <= ADDR_FMT_ETC2_128BPP))); +} + +/** +**************************************************************************************************** +* ElemLib::IsCompressed +* +* @brief +* TRUE if this is block compressed format or 1 bit format +* +* @note +* +* @return +* BOOL_32 +**************************************************************************************************** +*/ +BOOL_32 ElemLib::IsCompressed( + AddrFormat format) ///< [in] Format +{ + return IsBlockCompressed(format) || format == ADDR_FMT_BC1 || format == ADDR_FMT_BC7; +} + +/** +**************************************************************************************************** +* ElemLib::IsExpand3x +* +* @brief +* TRUE if this is 3x expand format +* +* @note +* +* @return +* BOOL_32 +**************************************************************************************************** +*/ +BOOL_32 ElemLib::IsExpand3x( + AddrFormat format) ///< [in] Format +{ + BOOL_32 is3x = FALSE; + + switch (format) + { + case ADDR_FMT_8_8_8: + case ADDR_FMT_16_16_16: + case ADDR_FMT_32_32_32: + is3x = TRUE; + break; + default: + break; + } + + return is3x; +} + +/** +**************************************************************************************************** +* ElemLib::IsMacroPixelPacked +* +* @brief +* TRUE if this is a macro-pixel-packed format. +* +* @note +* +* @return +* BOOL_32 +**************************************************************************************************** +*/ +BOOL_32 ElemLib::IsMacroPixelPacked( + AddrFormat format) ///< [in] Format +{ + BOOL_32 isMacroPixelPacked = FALSE; + + switch (format) + { + case ADDR_FMT_BG_RG: + case ADDR_FMT_GB_GR: + isMacroPixelPacked = TRUE; + break; + default: + break; + } + + return isMacroPixelPacked; +} + +} diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.h new file mode 100644 index 0000000000..519e194f3d --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.h @@ -0,0 +1,279 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrelemlib.h +* @brief Contains the class for element/pixel related functions. +**************************************************************************************************** +*/ + +#ifndef __ELEM_LIB_H__ +#define __ELEM_LIB_H__ + +#include "addrinterface.h" +#include "addrobject.h" +#include "addrcommon.h" + +namespace Addr +{ + +class Lib; + +// The masks for property bits within the Properties INT_32 +union ComponentFlags +{ + struct + { + UINT_32 byteAligned : 1; ///< all components are byte aligned + UINT_32 exportNorm : 1; ///< components support R6xx NORM compression + UINT_32 floatComp : 1; ///< there is at least one floating point component + }; + + UINT_32 value; +}; + +// Copy from legacy lib's NumberType +enum NumberType +{ + // The following number types have the range [-1..1] + ADDR_NO_NUMBER, // This component doesn't exist and has no default value + ADDR_EPSILON, // Force component value to integer 0x00000001 + ADDR_ZERO, // Force component value to integer 0x00000000 + ADDR_ONE, // Force component value to floating point 1.0 + // Above values don't have any bits per component (keep ADDR_ONE the last of these) + + ADDR_UNORM, // Unsigned normalized (repeating fraction) full precision + ADDR_SNORM, // Signed normalized (repeating fraction) full precision + ADDR_GAMMA, // Gamma-corrected, full precision + + ADDR_UNORM_R5XXRB, // Unsigned normalized (repeating fraction) for r5xx RB + ADDR_SNORM_R5XXRB, // Signed normalized (repeating fraction) for r5xx RB + ADDR_GAMMA_R5XXRB, // Gamma-corrected for r5xx RB (note: unnormalized value) + ADDR_UNORM_R5XXBC, // Unsigned normalized (repeating fraction) for r5xx BC + ADDR_SNORM_R5XXBC, // Signed normalized (repeating fraction) for r5xx BC + ADDR_GAMMA_R5XXBC, // Gamma-corrected for r5xx BC (note: unnormalized value) + + ADDR_UNORM_R6XX, // Unsigned normalized (repeating fraction) for R6xx + ADDR_UNORM_R6XXDB, // Unorms for 24-bit depth: one value differs from ADDR_UNORM_R6XX + ADDR_SNORM_R6XX, // Signed normalized (repeating fraction) for R6xx + ADDR_GAMMA8_R6XX, // Gamma-corrected for r6xx + ADDR_GAMMA8_R7XX_TP, // Gamma-corrected for r7xx TP 12bit unorm 8.4. + + ADDR_U4FLOATC, // Unsigned float: 4-bit exponent, bias=15, no NaN, clamp [0..1] + ADDR_GAMMA_4SEG, // Gamma-corrected, four segment approximation + ADDR_U0FIXED, // Unsigned 0.N-bit fixed point + + // The following number types have large ranges (LEAVE ADDR_USCALED first or fix Finish routine) + ADDR_USCALED, // Unsigned integer converted to/from floating point + ADDR_SSCALED, // Signed integer converted to/from floating point + ADDR_USCALED_R5XXRB, // Unsigned integer to/from floating point for r5xx RB + ADDR_SSCALED_R5XXRB, // Signed integer to/from floating point for r5xx RB + ADDR_UINT_BITS, // Keep in unsigned integer form, clamped to specified range + ADDR_SINT_BITS, // Keep in signed integer form, clamped to specified range + ADDR_UINTBITS, // @@ remove Keep in unsigned integer form, use modulus to reduce bits + ADDR_SINTBITS, // @@ remove Keep in signed integer form, use modulus to reduce bits + + // The following number types and ADDR_U4FLOATC have exponents + // (LEAVE ADDR_S8FLOAT first or fix Finish routine) + ADDR_S8FLOAT, // Signed floating point with 8-bit exponent, bias=127 + ADDR_S8FLOAT32, // 32-bit IEEE float, passes through NaN values + ADDR_S5FLOAT, // Signed floating point with 5-bit exponent, bias=15 + ADDR_S5FLOATM, // Signed floating point with 5-bit exponent, bias=15, no NaN/Inf + ADDR_U5FLOAT, // Signed floating point with 5-bit exponent, bias=15 + ADDR_U3FLOATM, // Unsigned floating point with 3-bit exponent, bias=3 + + ADDR_S5FIXED, // Signed 5.N-bit fixed point, with rounding + + ADDR_END_NUMBER // Used for range comparisons +}; + +// Copy from legacy lib's AddrElement +enum ElemMode +{ + // These formats allow both packing an unpacking + ADDR_ROUND_BY_HALF, // add 1/2 and truncate when packing this element + ADDR_ROUND_TRUNCATE, // truncate toward 0 for sign/mag, else toward neg + ADDR_ROUND_DITHER, // Pack by dithering -- requires (x,y) position + + // These formats only allow unpacking, no packing + ADDR_UNCOMPRESSED, // Elements are not compressed: one data element per pixel/texel + ADDR_EXPANDED, // Elements are split up and stored in multiple data elements + ADDR_PACKED_STD, // Elements are compressed into ExpandX by ExpandY data elements + ADDR_PACKED_REV, // Like ADDR_PACKED, but X order of pixels is reverved + ADDR_PACKED_GBGR, // Elements are compressed 4:2:2 in G1B_G0R order (high to low) + ADDR_PACKED_BGRG, // Elements are compressed 4:2:2 in BG1_RG0 order (high to low) + ADDR_PACKED_BC1, // Each data element is uncompressed to a 4x4 pixel/texel array + ADDR_PACKED_BC2, // Each data element is uncompressed to a 4x4 pixel/texel array + ADDR_PACKED_BC3, // Each data element is uncompressed to a 4x4 pixel/texel array + ADDR_PACKED_BC4, // Each data element is uncompressed to a 4x4 pixel/texel array + ADDR_PACKED_BC5, // Each data element is uncompressed to a 4x4 pixel/texel array + ADDR_PACKED_ETC2_64BPP, // ETC2 formats that use 64bpp to represent each 4x4 block + ADDR_PACKED_ETC2_128BPP, // ETC2 formats that use 128bpp to represent each 4x4 block + ADDR_PACKED_ASTC, // Various ASTC formats, all are 128bpp with varying block sizes + + // These formats provide various kinds of compression + ADDR_ZPLANE_R5XX, // Compressed Zplane using r5xx architecture format + ADDR_ZPLANE_R6XX, // Compressed Zplane using r6xx architecture format + //@@ Fill in the compression modes + + ADDR_END_ELEMENT // Used for range comparisons +}; + +enum DepthPlanarType +{ + ADDR_DEPTH_PLANAR_NONE = 0, // No plane z/stencl + ADDR_DEPTH_PLANAR_R600 = 1, // R600 z and stencil planes are store within a tile + ADDR_DEPTH_PLANAR_R800 = 2, // R800 has separate z and stencil planes +}; + +/** +**************************************************************************************************** +* PixelFormatInfo +* +* @brief +* Per component info +* +**************************************************************************************************** +*/ +struct PixelFormatInfo +{ + UINT_32 compBit[4]; + NumberType numType[4]; + UINT_32 compStart[4]; + ElemMode elemMode; + UINT_32 comps; ///< Number of components +}; + +/** +**************************************************************************************************** +* @brief This class contains asic indepentent element related attributes and operations +**************************************************************************************************** +*/ +class ElemLib : public Object +{ +protected: + ElemLib(Lib* pAddrLib); + +public: + + /// Makes this class virtual + virtual ~ElemLib(); + + static ElemLib* Create( + const Lib* pAddrLib); + + /// The implementation is only for R6xx/R7xx, so make it virtual in case we need for R8xx + BOOL_32 PixGetExportNorm( + AddrColorFormat colorFmt, + AddrSurfaceNumber numberFmt, AddrSurfaceSwap swap) const; + + /// Below method are asic independent, so make them just static. + /// Remove static if we need different operation in hwl. + + VOID Flt32ToDepthPixel( + AddrDepthFormat format, const ADDR_FLT_32 comps[2], UINT_8 *pPixel) const; + + VOID Flt32ToColorPixel( + AddrColorFormat format, AddrSurfaceNumber surfNum, AddrSurfaceSwap surfSwap, + const ADDR_FLT_32 comps[4], UINT_8 *pPixel) const; + + static VOID Flt32sToInt32s( + ADDR_FLT_32 value, UINT_32 bits, NumberType numberType, UINT_32* pResult); + + static VOID Int32sToPixel( + UINT_32 numComps, UINT_32* pComps, UINT_32* pCompBits, UINT_32* pCompStart, + ComponentFlags properties, UINT_32 resultBits, UINT_8* pPixel); + + VOID PixGetColorCompInfo( + AddrColorFormat format, AddrSurfaceNumber number, AddrSurfaceSwap swap, + PixelFormatInfo* pInfo) const; + + VOID PixGetDepthCompInfo( + AddrDepthFormat format, PixelFormatInfo* pInfo) const; + + UINT_32 GetBitsPerPixel( + AddrFormat format, ElemMode* pElemMode = NULL, + UINT_32* pExpandX = NULL, UINT_32* pExpandY = NULL, UINT_32* pBitsUnused = NULL); + + static VOID SetClearComps( + ADDR_FLT_32 comps[4], BOOL_32 clearColor, BOOL_32 float32); + + VOID AdjustSurfaceInfo( + ElemMode elemMode, UINT_32 expandX, UINT_32 expandY, + UINT_32* pBpp, UINT_32* pBasePitch, UINT_32* pWidth, UINT_32* pHeight); + + VOID RestoreSurfaceInfo( + ElemMode elemMode, UINT_32 expandX, UINT_32 expandY, + UINT_32* pBpp, UINT_32* pWidth, UINT_32* pHeight); + + /// Checks if depth and stencil are planar inside a tile + BOOL_32 IsDepthStencilTilePlanar() + { + return (m_depthPlanarType == ADDR_DEPTH_PLANAR_R600) ? TRUE : FALSE; + } + + /// Sets m_configFlags, copied from AddrLib + VOID SetConfigFlags(ConfigFlags flags) + { + m_configFlags = flags; + } + + static BOOL_32 IsCompressed(AddrFormat format); + static BOOL_32 IsBlockCompressed(AddrFormat format); + static BOOL_32 IsExpand3x(AddrFormat format); + static BOOL_32 IsMacroPixelPacked(AddrFormat format); + +protected: + + static VOID GetCompBits( + UINT_32 c0, UINT_32 c1, UINT_32 c2, UINT_32 c3, + PixelFormatInfo* pInfo, + ElemMode elemMode = ADDR_ROUND_BY_HALF); + + static VOID GetCompType( + AddrColorFormat format, AddrSurfaceNumber numType, + PixelFormatInfo* pInfo); + + static VOID GetCompSwap( + AddrSurfaceSwap swap, PixelFormatInfo* pInfo); + + static VOID SwapComps( + UINT_32 c0, UINT_32 c1, PixelFormatInfo* pInfo); + +private: + + UINT_32 m_fp16ExportNorm; ///< If allow FP16 to be reported as EXPORT_NORM + DepthPlanarType m_depthPlanarType; + + ConfigFlags m_configFlags; ///< Copy of AddrLib's configFlags + Addr::Lib* const m_pAddrLib; ///< Pointer to parent addrlib instance +}; + +} //Addr + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp new file mode 100644 index 0000000000..5d99d4db0d --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp @@ -0,0 +1,660 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrlib.cpp +* @brief Contains the implementation for the Addr::Lib class. +**************************************************************************************************** +*/ + +#include "addrinterface.h" +#include "addrlib.h" +#include "addrcommon.h" + +#if defined(__APPLE__) + +UINT_32 div64_32(UINT_64 n, UINT_32 base) +{ + UINT_64 rem = n; + UINT_64 b = base; + UINT_64 res, d = 1; + UINT_32 high = rem >> 32; + + res = 0; + if (high >= base) + { + high /= base; + res = (UINT_64) high << 32; + rem -= (UINT_64) (high * base) << 32; + } + + while (((INT_64)b > 0) && (b < rem)) + { + b = b + b; + d = d + d; + } + + do + { + if (rem >= b) + { + rem -= b; + res += d; + } + b >>= 1; + d >>= 1; + } while (d); + + n = res; + return rem; +} + +extern "C" +UINT_32 __umoddi3(UINT_64 n, UINT_32 base) +{ + return div64_32(n, base); +} + +#endif // __APPLE__ + +namespace Addr +{ + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Constructor/Destructor +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Lib::Lib +* +* @brief +* Constructor for the AddrLib class +* +**************************************************************************************************** +*/ +Lib::Lib() : + m_class(BASE_ADDRLIB), + m_chipFamily(ADDR_CHIP_FAMILY_IVLD), + m_chipRevision(0), + m_version(ADDRLIB_VERSION), + m_pipes(0), + m_banks(0), + m_pipeInterleaveBytes(0), + m_rowSize(0), + m_minPitchAlignPixels(1), + m_maxSamples(8), + m_pElemLib(NULL) +{ + m_configFlags.value = 0; +} + +/** +**************************************************************************************************** +* Lib::Lib +* +* @brief +* Constructor for the AddrLib class with hClient as parameter +* +**************************************************************************************************** +*/ +Lib::Lib(const Client* pClient) : + Object(pClient), + m_class(BASE_ADDRLIB), + m_chipFamily(ADDR_CHIP_FAMILY_IVLD), + m_chipRevision(0), + m_version(ADDRLIB_VERSION), + m_pipes(0), + m_banks(0), + m_pipeInterleaveBytes(0), + m_rowSize(0), + m_minPitchAlignPixels(1), + m_maxSamples(8), + m_pElemLib(NULL) +{ + m_configFlags.value = 0; +} + +/** +**************************************************************************************************** +* Lib::~AddrLib +* +* @brief +* Destructor for the AddrLib class +* +**************************************************************************************************** +*/ +Lib::~Lib() +{ + if (m_pElemLib) + { + delete m_pElemLib; + m_pElemLib = NULL; + } +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Initialization/Helper +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Lib::Create +* +* @brief +* Creates and initializes AddrLib object. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::Create( + const ADDR_CREATE_INPUT* pCreateIn, ///< [in] pointer to ADDR_CREATE_INPUT + ADDR_CREATE_OUTPUT* pCreateOut) ///< [out] pointer to ADDR_CREATE_OUTPUT +{ + Lib* pLib = NULL; + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pCreateIn->createFlags.fillSizeFields == TRUE) + { + if ((pCreateIn->size != sizeof(ADDR_CREATE_INPUT)) || + (pCreateOut->size != sizeof(ADDR_CREATE_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if ((returnCode == ADDR_OK) && + (pCreateIn->callbacks.allocSysMem != NULL) && + (pCreateIn->callbacks.freeSysMem != NULL)) + { + Client client = { + pCreateIn->hClient, + pCreateIn->callbacks + }; + + switch (pCreateIn->chipEngine) + { + case CIASICIDGFXENGINE_SOUTHERNISLAND: + switch (pCreateIn->chipFamily) + { + case FAMILY_SI: + pLib = SiHwlInit(&client); + break; + case FAMILY_VI: + case FAMILY_CZ: + case FAMILY_CI: + case FAMILY_KV: // CI based fusion + pLib = CiHwlInit(&client); + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + break; + case CIASICIDGFXENGINE_ARCTICISLAND: + switch (pCreateIn->chipFamily) + { + case FAMILY_AI: + case FAMILY_RV: + pLib = Gfx9HwlInit(&client); + break; + case FAMILY_NV: + pLib = Gfx10HwlInit(&client); + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + + if (pLib != NULL) + { + BOOL_32 initValid; + + // Pass createFlags to configFlags first since these flags may be overwritten + pLib->m_configFlags.noCubeMipSlicesPad = pCreateIn->createFlags.noCubeMipSlicesPad; + pLib->m_configFlags.fillSizeFields = pCreateIn->createFlags.fillSizeFields; + pLib->m_configFlags.useTileIndex = pCreateIn->createFlags.useTileIndex; + pLib->m_configFlags.useCombinedSwizzle = pCreateIn->createFlags.useCombinedSwizzle; + pLib->m_configFlags.checkLast2DLevel = pCreateIn->createFlags.checkLast2DLevel; + pLib->m_configFlags.useHtileSliceAlign = pCreateIn->createFlags.useHtileSliceAlign; + pLib->m_configFlags.allowLargeThickTile = pCreateIn->createFlags.allowLargeThickTile; + pLib->m_configFlags.forceDccAndTcCompat = pCreateIn->createFlags.forceDccAndTcCompat; + pLib->m_configFlags.nonPower2MemConfig = pCreateIn->createFlags.nonPower2MemConfig; + pLib->m_configFlags.disableLinearOpt = FALSE; + + pLib->SetChipFamily(pCreateIn->chipFamily, pCreateIn->chipRevision); + + pLib->SetMinPitchAlignPixels(pCreateIn->minPitchAlignPixels); + + // Global parameters initialized and remaining configFlags bits are set as well + initValid = pLib->HwlInitGlobalParams(pCreateIn); + + if (initValid) + { + pLib->m_pElemLib = ElemLib::Create(pLib); + } + else + { + pLib->m_pElemLib = NULL; // Don't go on allocating element lib + returnCode = ADDR_INVALIDGBREGVALUES; + } + + if (pLib->m_pElemLib == NULL) + { + delete pLib; + pLib = NULL; + ADDR_ASSERT_ALWAYS(); + } + else + { + pLib->m_pElemLib->SetConfigFlags(pLib->m_configFlags); + } + } + + pCreateOut->hLib = pLib; + + if ((pLib != NULL) && + (returnCode == ADDR_OK)) + { + pCreateOut->numEquations = + pLib->HwlGetEquationTableInfo(&pCreateOut->pEquationTable); + + pLib->SetMaxAlignments(); + + } + else if ((pLib == NULL) && + (returnCode == ADDR_OK)) + { + // Unknown failures, we return the general error code + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::SetChipFamily +* +* @brief +* Convert familyID defined in atiid.h to ChipFamily and set m_chipFamily/m_chipRevision +* @return +* N/A +**************************************************************************************************** +*/ +VOID Lib::SetChipFamily( + UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h + UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h +{ + ChipFamily family = HwlConvertChipFamily(uChipFamily, uChipRevision); + + ADDR_ASSERT(family != ADDR_CHIP_FAMILY_IVLD); + + m_chipFamily = family; + m_chipRevision = uChipRevision; +} + +/** +**************************************************************************************************** +* Lib::SetMinPitchAlignPixels +* +* @brief +* Set m_minPitchAlignPixels with input param +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID Lib::SetMinPitchAlignPixels( + UINT_32 minPitchAlignPixels) ///< [in] minmum pitch alignment in pixels +{ + m_minPitchAlignPixels = (minPitchAlignPixels == 0) ? 1 : minPitchAlignPixels; +} + +/** +**************************************************************************************************** +* Lib::SetMaxAlignments +* +* @brief +* Set max alignments +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID Lib::SetMaxAlignments() +{ + m_maxBaseAlign = HwlComputeMaxBaseAlignments(); + m_maxMetaBaseAlign = HwlComputeMaxMetaBaseAlignments(); +} + +/** +**************************************************************************************************** +* Lib::GetLib +* +* @brief +* Get AddrLib pointer +* +* @return +* An AddrLib class pointer +**************************************************************************************************** +*/ +Lib* Lib::GetLib( + ADDR_HANDLE hLib) ///< [in] handle of ADDR_HANDLE +{ + return static_cast(hLib); +} + +/** +**************************************************************************************************** +* Lib::GetMaxAlignments +* +* @brief +* Gets maximum alignments for data surface (include FMask) +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::GetMaxAlignments( + ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if (pOut->size != sizeof(ADDR_GET_MAX_ALIGNMENTS_OUTPUT)) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + if (m_maxBaseAlign != 0) + { + pOut->baseAlign = m_maxBaseAlign; + } + else + { + returnCode = ADDR_NOTIMPLEMENTED; + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::GetMaxMetaAlignments +* +* @brief +* Gets maximum alignments for metadata (CMask, DCC and HTile) +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::GetMaxMetaAlignments( + ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if (pOut->size != sizeof(ADDR_GET_MAX_ALIGNMENTS_OUTPUT)) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + if (m_maxMetaBaseAlign != 0) + { + pOut->baseAlign = m_maxMetaBaseAlign; + } + else + { + returnCode = ADDR_NOTIMPLEMENTED; + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::Bits2Number +* +* @brief +* Cat a array of binary bit to a number +* +* @return +* The number combined with the array of bits +**************************************************************************************************** +*/ +UINT_32 Lib::Bits2Number( + UINT_32 bitNum, ///< [in] how many bits + ...) ///< [in] varaible bits value starting from MSB +{ + UINT_32 number = 0; + UINT_32 i; + va_list bits_ptr; + + va_start(bits_ptr, bitNum); + + for(i = 0; i < bitNum; i++) + { + number |= va_arg(bits_ptr, UINT_32); + number <<= 1; + } + + number >>= 1; + + va_end(bits_ptr); + + return number; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Element lib +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Lib::Flt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a depth/stencil pixel value +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::Flt32ToDepthPixel( + const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, + ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ELEM_FLT32TODEPTHPIXEL_INPUT)) || + (pOut->size != sizeof(ELEM_FLT32TODEPTHPIXEL_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + GetElemLib()->Flt32ToDepthPixel(pIn->format, pIn->comps, pOut->pPixel); + + UINT_32 depthBase = 0; + UINT_32 stencilBase = 0; + UINT_32 depthBits = 0; + UINT_32 stencilBits = 0; + + switch (pIn->format) + { + case ADDR_DEPTH_16: + depthBits = 16; + break; + case ADDR_DEPTH_X8_24: + case ADDR_DEPTH_8_24: + case ADDR_DEPTH_X8_24_FLOAT: + case ADDR_DEPTH_8_24_FLOAT: + depthBase = 8; + depthBits = 24; + stencilBits = 8; + break; + case ADDR_DEPTH_32_FLOAT: + depthBits = 32; + break; + case ADDR_DEPTH_X24_8_32_FLOAT: + depthBase = 8; + depthBits = 32; + stencilBits = 8; + break; + default: + break; + } + + // Overwrite base since R800 has no "tileBase" + if (GetElemLib()->IsDepthStencilTilePlanar() == FALSE) + { + depthBase = 0; + stencilBase = 0; + } + + depthBase *= 64; + stencilBase *= 64; + + pOut->stencilBase = stencilBase; + pOut->depthBase = depthBase; + pOut->depthBits = depthBits; + pOut->stencilBits = stencilBits; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::Flt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a red/green/blue/alpha pixel value +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::Flt32ToColorPixel( + const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, + ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ELEM_FLT32TOCOLORPIXEL_INPUT)) || + (pOut->size != sizeof(ELEM_FLT32TOCOLORPIXEL_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + GetElemLib()->Flt32ToColorPixel(pIn->format, + pIn->surfNum, + pIn->surfSwap, + pIn->comps, + pOut->pPixel); + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::GetExportNorm +* +* @brief +* Check one format can be EXPORT_NUM +* @return +* TRUE if EXPORT_NORM can be used +**************************************************************************************************** +*/ +BOOL_32 Lib::GetExportNorm( + const ELEM_GETEXPORTNORM_INPUT* pIn) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + BOOL_32 enabled = FALSE; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if (pIn->size != sizeof(ELEM_GETEXPORTNORM_INPUT)) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + enabled = GetElemLib()->PixGetExportNorm(pIn->format, pIn->num, pIn->swap); + } + + return enabled; +} + +/** +**************************************************************************************************** +* Lib::GetBpe +* +* @brief +* Get bits-per-element for specified format +* @return +* bits-per-element of specified format +**************************************************************************************************** +*/ +UINT_32 Lib::GetBpe(AddrFormat format) const +{ + return GetElemLib()->GetBitsPerPixel(format); +} + +} // Addr diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib.h new file mode 100644 index 0000000000..c1510d6b5a --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib.h @@ -0,0 +1,415 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrlib.h +* @brief Contains the Addr::Lib base class definition. +**************************************************************************************************** +*/ + +#ifndef __ADDR_LIB_H__ +#define __ADDR_LIB_H__ + +#include "addrinterface.h" +#include "addrobject.h" +#include "addrelemlib.h" + +#include "amdgpu_asic_addr.h" + +#ifndef CIASICIDGFXENGINE_R600 +#define CIASICIDGFXENGINE_R600 0x00000006 +#endif + +#ifndef CIASICIDGFXENGINE_R800 +#define CIASICIDGFXENGINE_R800 0x00000008 +#endif + +#ifndef CIASICIDGFXENGINE_SOUTHERNISLAND +#define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A +#endif + +#ifndef CIASICIDGFXENGINE_ARCTICISLAND +#define CIASICIDGFXENGINE_ARCTICISLAND 0x0000000D +#endif + +namespace Addr +{ + +/** +**************************************************************************************************** +* @brief Neutral enums that define pipeinterleave +**************************************************************************************************** +*/ +enum PipeInterleave +{ + ADDR_PIPEINTERLEAVE_256B = 256, + ADDR_PIPEINTERLEAVE_512B = 512, + ADDR_PIPEINTERLEAVE_1KB = 1024, + ADDR_PIPEINTERLEAVE_2KB = 2048, +}; + +/** +**************************************************************************************************** +* @brief Neutral enums that define DRAM row size +**************************************************************************************************** +*/ +enum RowSize +{ + ADDR_ROWSIZE_1KB = 1024, + ADDR_ROWSIZE_2KB = 2048, + ADDR_ROWSIZE_4KB = 4096, + ADDR_ROWSIZE_8KB = 8192, +}; + +/** +**************************************************************************************************** +* @brief Neutral enums that define bank interleave +**************************************************************************************************** +*/ +enum BankInterleave +{ + ADDR_BANKINTERLEAVE_1 = 1, + ADDR_BANKINTERLEAVE_2 = 2, + ADDR_BANKINTERLEAVE_4 = 4, + ADDR_BANKINTERLEAVE_8 = 8, +}; + +/** +**************************************************************************************************** +* @brief Neutral enums that define shader engine tile size +**************************************************************************************************** +*/ +enum ShaderEngineTileSize +{ + ADDR_SE_TILESIZE_16 = 16, + ADDR_SE_TILESIZE_32 = 32, +}; + +/** +**************************************************************************************************** +* @brief Neutral enums that define bank swap size +**************************************************************************************************** +*/ +enum BankSwapSize +{ + ADDR_BANKSWAP_128B = 128, + ADDR_BANKSWAP_256B = 256, + ADDR_BANKSWAP_512B = 512, + ADDR_BANKSWAP_1KB = 1024, +}; + +/** +**************************************************************************************************** +* @brief Enums that define max compressed fragments config +**************************************************************************************************** +*/ +enum NumMaxCompressedFragmentsConfig +{ + ADDR_CONFIG_1_MAX_COMPRESSED_FRAGMENTS = 0x00000000, + ADDR_CONFIG_2_MAX_COMPRESSED_FRAGMENTS = 0x00000001, + ADDR_CONFIG_4_MAX_COMPRESSED_FRAGMENTS = 0x00000002, + ADDR_CONFIG_8_MAX_COMPRESSED_FRAGMENTS = 0x00000003, +}; + +/** +**************************************************************************************************** +* @brief Enums that define num pipes config +**************************************************************************************************** +*/ +enum NumPipesConfig +{ + ADDR_CONFIG_1_PIPE = 0x00000000, + ADDR_CONFIG_2_PIPE = 0x00000001, + ADDR_CONFIG_4_PIPE = 0x00000002, + ADDR_CONFIG_8_PIPE = 0x00000003, + ADDR_CONFIG_16_PIPE = 0x00000004, + ADDR_CONFIG_32_PIPE = 0x00000005, + ADDR_CONFIG_64_PIPE = 0x00000006, +}; + +/** +**************************************************************************************************** +* @brief Enums that define num banks config +**************************************************************************************************** +*/ +enum NumBanksConfig +{ + ADDR_CONFIG_1_BANK = 0x00000000, + ADDR_CONFIG_2_BANK = 0x00000001, + ADDR_CONFIG_4_BANK = 0x00000002, + ADDR_CONFIG_8_BANK = 0x00000003, + ADDR_CONFIG_16_BANK = 0x00000004, +}; + +/** +**************************************************************************************************** +* @brief Enums that define num rb per shader engine config +**************************************************************************************************** +*/ +enum NumRbPerShaderEngineConfig +{ + ADDR_CONFIG_1_RB_PER_SHADER_ENGINE = 0x00000000, + ADDR_CONFIG_2_RB_PER_SHADER_ENGINE = 0x00000001, + ADDR_CONFIG_4_RB_PER_SHADER_ENGINE = 0x00000002, +}; + +/** +**************************************************************************************************** +* @brief Enums that define num shader engines config +**************************************************************************************************** +*/ +enum NumShaderEnginesConfig +{ + ADDR_CONFIG_1_SHADER_ENGINE = 0x00000000, + ADDR_CONFIG_2_SHADER_ENGINE = 0x00000001, + ADDR_CONFIG_4_SHADER_ENGINE = 0x00000002, + ADDR_CONFIG_8_SHADER_ENGINE = 0x00000003, +}; + +/** +**************************************************************************************************** +* @brief Enums that define pipe interleave size config +**************************************************************************************************** +*/ +enum PipeInterleaveSizeConfig +{ + ADDR_CONFIG_PIPE_INTERLEAVE_256B = 0x00000000, + ADDR_CONFIG_PIPE_INTERLEAVE_512B = 0x00000001, + ADDR_CONFIG_PIPE_INTERLEAVE_1KB = 0x00000002, + ADDR_CONFIG_PIPE_INTERLEAVE_2KB = 0x00000003, +}; + +/** +**************************************************************************************************** +* @brief Enums that define row size config +**************************************************************************************************** +*/ +enum RowSizeConfig +{ + ADDR_CONFIG_1KB_ROW = 0x00000000, + ADDR_CONFIG_2KB_ROW = 0x00000001, + ADDR_CONFIG_4KB_ROW = 0x00000002, +}; + +/** +**************************************************************************************************** +* @brief Enums that define bank interleave size config +**************************************************************************************************** +*/ +enum BankInterleaveSizeConfig +{ + ADDR_CONFIG_BANK_INTERLEAVE_1 = 0x00000000, + ADDR_CONFIG_BANK_INTERLEAVE_2 = 0x00000001, + ADDR_CONFIG_BANK_INTERLEAVE_4 = 0x00000002, + ADDR_CONFIG_BANK_INTERLEAVE_8 = 0x00000003, +}; + +/** +**************************************************************************************************** +* @brief Enums that define engine tile size config +**************************************************************************************************** +*/ +enum ShaderEngineTileSizeConfig +{ + ADDR_CONFIG_SE_TILE_16 = 0x00000000, + ADDR_CONFIG_SE_TILE_32 = 0x00000001, +}; + +/** +**************************************************************************************************** +* @brief This class contains asic independent address lib functionalities +**************************************************************************************************** +*/ +class Lib : public Object +{ +public: + virtual ~Lib(); + + static ADDR_E_RETURNCODE Create( + const ADDR_CREATE_INPUT* pCreateInfo, ADDR_CREATE_OUTPUT* pCreateOut); + + /// Pair of Create + VOID Destroy() + { + delete this; + } + + static Lib* GetLib(ADDR_HANDLE hLib); + + /// Returns AddrLib version (from compiled binary instead include file) + UINT_32 GetVersion() + { + return m_version; + } + + /// Returns asic chip family name defined by AddrLib + ChipFamily GetChipFamily() + { + return m_chipFamily; + } + + ADDR_E_RETURNCODE Flt32ToDepthPixel( + const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, + ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE Flt32ToColorPixel( + const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, + ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) const; + + BOOL_32 GetExportNorm(const ELEM_GETEXPORTNORM_INPUT* pIn) const; + + ADDR_E_RETURNCODE GetMaxAlignments(ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE GetMaxMetaAlignments(ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut) const; + + UINT_32 GetBpe(AddrFormat format) const; + +protected: + Lib(); // Constructor is protected + Lib(const Client* pClient); + + /// Pure virtual function to get max base alignments + virtual UINT_32 HwlComputeMaxBaseAlignments() const = 0; + + /// Gets maximum alignements for metadata + virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const + { + ADDR_NOT_IMPLEMENTED(); + + return 0; + } + + VOID ValidBaseAlignments(UINT_32 alignment) const + { +#if DEBUG + ADDR_ASSERT(alignment <= m_maxBaseAlign); +#endif + } + + VOID ValidMetaBaseAlignments(UINT_32 metaAlignment) const + { +#if DEBUG + ADDR_ASSERT(metaAlignment <= m_maxMetaBaseAlign); +#endif + } + + // + // Initialization + // + /// Pure Virtual function for Hwl computing internal global parameters from h/w registers + virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn) = 0; + + /// Pure Virtual function for Hwl converting chip family + virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision) = 0; + + /// Get equation table pointer and number of equations + virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const + { + *ppEquationTable = NULL; + + return 0; + } + + // + // Misc helper + // + static UINT_32 Bits2Number(UINT_32 bitNum, ...); + + static UINT_32 GetNumFragments(UINT_32 numSamples, UINT_32 numFrags) + { + return (numFrags != 0) ? numFrags : Max(1u, numSamples); + } + + /// Returns pointer of ElemLib + ElemLib* GetElemLib() const + { + return m_pElemLib; + } + + /// Returns fillSizeFields flag + UINT_32 GetFillSizeFieldsFlags() const + { + return m_configFlags.fillSizeFields; + } + +private: + // Disallow the copy constructor + Lib(const Lib& a); + + // Disallow the assignment operator + Lib& operator=(const Lib& a); + + VOID SetChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision); + + VOID SetMinPitchAlignPixels(UINT_32 minPitchAlignPixels); + + VOID SetMaxAlignments(); + +protected: + LibClass m_class; ///< Store class type (HWL type) + + ChipFamily m_chipFamily; ///< Chip family translated from the one in atiid.h + + UINT_32 m_chipRevision; ///< Revision id from xxx_id.h + + UINT_32 m_version; ///< Current version + + // + // Global parameters + // + ConfigFlags m_configFlags; ///< Global configuration flags. Note this is setup by + /// AddrLib instead of Client except forceLinearAligned + + UINT_32 m_pipes; ///< Number of pipes + UINT_32 m_banks; ///< Number of banks + /// For r800 this is MC_ARB_RAMCFG.NOOFBANK + /// Keep it here to do default parameter calculation + + UINT_32 m_pipeInterleaveBytes; + ///< Specifies the size of contiguous address space + /// within each tiling pipe when making linear + /// accesses. (Formerly Group Size) + + UINT_32 m_rowSize; ///< DRAM row size, in bytes + + UINT_32 m_minPitchAlignPixels; ///< Minimum pitch alignment in pixels + UINT_32 m_maxSamples; ///< Max numSamples + + UINT_32 m_maxBaseAlign; ///< Max base alignment for data surface + UINT_32 m_maxMetaBaseAlign; ///< Max base alignment for metadata + +private: + ElemLib* m_pElemLib; ///< Element Lib pointer +}; + +Lib* SiHwlInit (const Client* pClient); +Lib* CiHwlInit (const Client* pClient); +Lib* Gfx9HwlInit (const Client* pClient); +Lib* Gfx10HwlInit(const Client* pClient); +} // Addr + +#endif diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.cpp new file mode 100644 index 0000000000..0704e0f4e1 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.cpp @@ -0,0 +1,4061 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addr1lib.cpp +* @brief Contains the implementation for the Addr::V1::Lib base class. +**************************************************************************************************** +*/ + +#include "addrinterface.h" +#include "addrlib1.h" +#include "addrcommon.h" + +namespace Addr +{ +namespace V1 +{ + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Static Const Member +//////////////////////////////////////////////////////////////////////////////////////////////////// + +const TileModeFlags Lib::ModeFlags[ADDR_TM_COUNT] = +{// T L 1 2 3 P Pr B + {1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_GENERAL + {1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_ALIGNED + {1, 0, 1, 0, 0, 0, 0, 0}, // ADDR_TM_1D_TILED_THIN1 + {4, 0, 1, 0, 0, 0, 0, 0}, // ADDR_TM_1D_TILED_THICK + {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN1 + {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN2 + {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN4 + {4, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THICK + {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN1 + {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN2 + {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN4 + {4, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THICK + {1, 0, 0, 1, 1, 0, 0, 0}, // ADDR_TM_3D_TILED_THIN1 + {4, 0, 0, 1, 1, 0, 0, 0}, // ADDR_TM_3D_TILED_THICK + {1, 0, 0, 1, 1, 0, 0, 1}, // ADDR_TM_3B_TILED_THIN1 + {4, 0, 0, 1, 1, 0, 0, 1}, // ADDR_TM_3B_TILED_THICK + {8, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_XTHICK + {8, 0, 0, 1, 1, 0, 0, 0}, // ADDR_TM_3D_TILED_XTHICK + {1, 0, 0, 0, 0, 0, 0, 0}, // ADDR_TM_POWER_SAVE + {1, 0, 0, 1, 0, 1, 1, 0}, // ADDR_TM_PRT_TILED_THIN1 + {1, 0, 0, 1, 0, 1, 0, 0}, // ADDR_TM_PRT_2D_TILED_THIN1 + {1, 0, 0, 1, 1, 1, 0, 0}, // ADDR_TM_PRT_3D_TILED_THIN1 + {4, 0, 0, 1, 0, 1, 1, 0}, // ADDR_TM_PRT_TILED_THICK + {4, 0, 0, 1, 0, 1, 0, 0}, // ADDR_TM_PRT_2D_TILED_THICK + {4, 0, 0, 1, 1, 1, 0, 0}, // ADDR_TM_PRT_3D_TILED_THICK + {0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_TM_UNKNOWN +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Constructor/Destructor +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Lib::AddrLib1 +* +* @brief +* Constructor for the AddrLib1 class +* +**************************************************************************************************** +*/ +Lib::Lib() + : + Addr::Lib() +{ +} + +/** +**************************************************************************************************** +* Lib::Lib +* +* @brief +* Constructor for the Addr::V1::Lib class with hClient as parameter +* +**************************************************************************************************** +*/ +Lib::Lib(const Client* pClient) + : + Addr::Lib(pClient) +{ +} + +/** +**************************************************************************************************** +* Lib::~AddrLib1 +* +* @brief +* Destructor for the AddrLib1 class +* +**************************************************************************************************** +*/ +Lib::~Lib() +{ +} + +/** +**************************************************************************************************** +* Lib::GetLib +* +* @brief +* Get AddrLib1 pointer +* +* @return +* An Addr::V1::Lib class pointer +**************************************************************************************************** +*/ +Lib* Lib::GetLib( + ADDR_HANDLE hLib) ///< [in] handle of ADDR_HANDLE +{ + Addr::Lib* pAddrLib = Addr::Lib::GetLib(hLib); + if ((pAddrLib != NULL) && + ((pAddrLib->GetChipFamily() == ADDR_CHIP_FAMILY_IVLD) || + (pAddrLib->GetChipFamily() > ADDR_CHIP_FAMILY_VI))) + { + // only valid and pre-VI ASIC can use AddrLib1 function. + ADDR_ASSERT_ALWAYS(); + hLib = NULL; + } + return static_cast(hLib); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface Methods +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Lib::ComputeSurfaceInfo +* +* @brief +* Interface function stub of AddrComputeSurfaceInfo. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_SURFACE_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_SURFACE_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + // We suggest client do sanity check but a check here is also good + if (pIn->bpp > 128) + { + returnCode = ADDR_INVALIDPARAMS; + } + + if ((pIn->tileMode == ADDR_TM_UNKNOWN) && (pIn->mipLevel > 0)) + { + returnCode = ADDR_INVALIDPARAMS; + } + + // Thick modes don't support multisample + if ((Thickness(pIn->tileMode) > 1) && (pIn->numSamples > 1)) + { + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + // Get a local copy of input structure and only reference pIn for unadjusted values + ADDR_COMPUTE_SURFACE_INFO_INPUT localIn = *pIn; + ADDR_TILEINFO tileInfoNull = {0}; + + if (UseTileInfo()) + { + // If the original input has a valid ADDR_TILEINFO pointer then copy its contents. + // Otherwise the default 0's in tileInfoNull are used. + if (pIn->pTileInfo) + { + tileInfoNull = *pIn->pTileInfo; + } + localIn.pTileInfo = &tileInfoNull; + } + + localIn.numSamples = (pIn->numSamples == 0) ? 1 : pIn->numSamples; + + // Do mipmap check first + // If format is BCn, pre-pad dimension to power-of-two according to HWL + ComputeMipLevel(&localIn); + + if (m_configFlags.checkLast2DLevel) + { + // Save this level's original height in pixels + pOut->height = pIn->height; + } + + UINT_32 expandX = 1; + UINT_32 expandY = 1; + ElemMode elemMode; + + // Save outputs that may not go through HWL + pOut->pixelBits = localIn.bpp; + pOut->numSamples = localIn.numSamples; + pOut->last2DLevel = FALSE; + pOut->tcCompatible = FALSE; + +#if !ALT_TEST + if (localIn.numSamples > 1) + { + ADDR_ASSERT(localIn.mipLevel == 0); + } +#endif + + if (localIn.format != ADDR_FMT_INVALID) // Set format to INVALID will skip this conversion + { + // Get compression/expansion factors and element mode + // (which indicates compression/expansion + localIn.bpp = GetElemLib()->GetBitsPerPixel(localIn.format, + &elemMode, + &expandX, + &expandY); + + // Special flag for 96 bit surface. 96 (or 48 if we support) bit surface's width is + // pre-multiplied by 3 and bpp is divided by 3. So pitch alignment for linear- + // aligned does not meet 64-pixel in real. We keep special handling in hwl since hw + // restrictions are different. + // Also Mip 1+ needs an element pitch of 32 bits so we do not need this workaround + // but we use this flag to skip RestoreSurfaceInfo below + + if ((elemMode == ADDR_EXPANDED) && (expandX > 1)) + { + ADDR_ASSERT(IsLinear(localIn.tileMode)); + } + + GetElemLib()->AdjustSurfaceInfo(elemMode, + expandX, + expandY, + &localIn.bpp, + &localIn.basePitch, + &localIn.width, + &localIn.height); + + // Overwrite these parameters if we have a valid format + } + else if (localIn.bpp != 0) + { + localIn.width = (localIn.width != 0) ? localIn.width : 1; + localIn.height = (localIn.height != 0) ? localIn.height : 1; + } + else // Rule out some invalid parameters + { + ADDR_ASSERT_ALWAYS(); + + returnCode = ADDR_INVALIDPARAMS; + } + + // Check mipmap after surface expansion + if (returnCode == ADDR_OK) + { + returnCode = PostComputeMipLevel(&localIn, pOut); + } + + if (returnCode == ADDR_OK) + { + if (UseTileIndex(localIn.tileIndex)) + { + // Make sure pTileInfo is not NULL + ADDR_ASSERT(localIn.pTileInfo); + + UINT_32 numSamples = GetNumFragments(localIn.numSamples, localIn.numFrags); + + INT_32 macroModeIndex = TileIndexNoMacroIndex; + + if (localIn.tileIndex != TileIndexLinearGeneral) + { + // Try finding a macroModeIndex + macroModeIndex = HwlComputeMacroModeIndex(localIn.tileIndex, + localIn.flags, + localIn.bpp, + numSamples, + localIn.pTileInfo, + &localIn.tileMode, + &localIn.tileType); + } + + // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info + if (macroModeIndex == TileIndexNoMacroIndex) + { + returnCode = HwlSetupTileCfg(localIn.bpp, + localIn.tileIndex, macroModeIndex, + localIn.pTileInfo, + &localIn.tileMode, &localIn.tileType); + } + // If macroModeIndex is invalid, then assert this is not macro tiled + else if (macroModeIndex == TileIndexInvalid) + { + ADDR_ASSERT(!IsMacroTiled(localIn.tileMode)); + } + + pOut->macroModeIndex = macroModeIndex; + } + } + + if (returnCode == ADDR_OK) + { + localIn.flags.dccPipeWorkaround = localIn.flags.dccCompatible; + + if (localIn.tileMode == ADDR_TM_UNKNOWN) + { + // HWL layer may override tile mode if necessary + HwlSelectTileMode(&localIn); + } + else + { + // HWL layer may override tile mode if necessary + HwlOverrideTileMode(&localIn); + + // Optimize tile mode if possible + OptimizeTileMode(&localIn); + } + } + + // Call main function to compute surface info + if (returnCode == ADDR_OK) + { + returnCode = HwlComputeSurfaceInfo(&localIn, pOut); + } + + if (returnCode == ADDR_OK) + { + // Since bpp might be changed we just pass it through + pOut->bpp = localIn.bpp; + + // Also original width/height/bpp + pOut->pixelPitch = pOut->pitch; + pOut->pixelHeight = pOut->height; + +#if DEBUG + if (localIn.flags.display) + { + ADDR_ASSERT((pOut->pitchAlign % 32) == 0); + } +#endif //DEBUG + + if (localIn.format != ADDR_FMT_INVALID) + { + // + // Note: For 96 bit surface, the pixelPitch returned might be an odd number, but it + // is okay to program texture pitch as HW's mip calculator would multiply 3 first, + // then do the appropriate paddings (linear alignment requirement and possible the + // nearest power-of-two for mipmaps), which results in the original pitch. + // + GetElemLib()->RestoreSurfaceInfo(elemMode, + expandX, + expandY, + &localIn.bpp, + &pOut->pixelPitch, + &pOut->pixelHeight); + } + + if (localIn.flags.qbStereo) + { + if (pOut->pStereoInfo) + { + ComputeQbStereoInfo(pOut); + } + } + + if (localIn.flags.volume) // For volume sliceSize equals to all z-slices + { + pOut->sliceSize = pOut->surfSize; + } + else // For array: sliceSize is likely to have slice-padding (the last one) + { + pOut->sliceSize = pOut->surfSize / pOut->depth; + + // array or cubemap + if (pIn->numSlices > 1) + { + // If this is the last slice then add the padding size to this slice + if (pIn->slice == (pIn->numSlices - 1)) + { + pOut->sliceSize += pOut->sliceSize * (pOut->depth - pIn->numSlices); + } + else if (m_configFlags.checkLast2DLevel) + { + // Reset last2DLevel flag if this is not the last array slice + pOut->last2DLevel = FALSE; + } + } + } + + pOut->pitchTileMax = pOut->pitch / 8 - 1; + pOut->heightTileMax = pOut->height / 8 - 1; + pOut->sliceTileMax = pOut->pitch * pOut->height / 64 - 1; + } + } + + ValidBaseAlignments(pOut->baseAlign); + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeSurfaceInfo +* +* @brief +* Interface function stub of AddrComputeSurfaceInfo. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + const ADDR_SURFACE_FLAGS flags = {{0}}; + UINT_32 numSamples = GetNumFragments(pIn->numSamples, pIn->numFrags); + + // Try finding a macroModeIndex + INT_32 macroModeIndex = HwlComputeMacroModeIndex(input.tileIndex, + flags, + input.bpp, + numSamples, + input.pTileInfo, + &input.tileMode, + &input.tileType); + + // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info + if (macroModeIndex == TileIndexNoMacroIndex) + { + returnCode = HwlSetupTileCfg(input.bpp, input.tileIndex, macroModeIndex, + input.pTileInfo, &input.tileMode, &input.tileType); + } + // If macroModeIndex is invalid, then assert this is not macro tiled + else if (macroModeIndex == TileIndexInvalid) + { + ADDR_ASSERT(!IsMacroTiled(input.tileMode)); + } + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlComputeSurfaceAddrFromCoord(pIn, pOut); + + if (returnCode == ADDR_OK) + { + pOut->prtBlockIndex = static_cast(pOut->addr / (64 * 1024)); + } + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeSurfaceCoordFromAddr +* +* @brief +* Interface function stub of ComputeSurfaceCoordFromAddr. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + const ADDR_SURFACE_FLAGS flags = {{0}}; + UINT_32 numSamples = GetNumFragments(pIn->numSamples, pIn->numFrags); + + // Try finding a macroModeIndex + INT_32 macroModeIndex = HwlComputeMacroModeIndex(input.tileIndex, + flags, + input.bpp, + numSamples, + input.pTileInfo, + &input.tileMode, + &input.tileType); + + // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info + if (macroModeIndex == TileIndexNoMacroIndex) + { + returnCode = HwlSetupTileCfg(input.bpp, input.tileIndex, macroModeIndex, + input.pTileInfo, &input.tileMode, &input.tileType); + } + // If macroModeIndex is invalid, then assert this is not macro tiled + else if (macroModeIndex == TileIndexInvalid) + { + ADDR_ASSERT(!IsMacroTiled(input.tileMode)); + } + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlComputeSurfaceCoordFromAddr(pIn, pOut); + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeSliceTileSwizzle +* +* @brief +* Interface function stub of ComputeSliceTileSwizzle. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_SLICESWIZZLE_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_SLICESWIZZLE_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_SLICESWIZZLE_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, + input.pTileInfo, &input.tileMode); + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlComputeSliceTileSwizzle(pIn, pOut); + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ExtractBankPipeSwizzle +* +* @brief +* Interface function stub of AddrExtractBankPipeSwizzle. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT)) || + (pOut->size != sizeof(ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo); + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlExtractBankPipeSwizzle(pIn, pOut); + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::CombineBankPipeSwizzle +* +* @brief +* Interface function stub of AddrCombineBankPipeSwizzle. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::CombineBankPipeSwizzle( + const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_FMASK_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo); + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlCombineBankPipeSwizzle(pIn->bankSwizzle, + pIn->pipeSwizzle, + pIn->pTileInfo, + pIn->baseAddr, + &pOut->tileSwizzle); + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeBaseSwizzle +* +* @brief +* Interface function stub of AddrCompueBaseSwizzle. +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_BASE_SWIZZLE_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_BASE_SWIZZLE_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo); + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + if (IsMacroTiled(pIn->tileMode)) + { + returnCode = HwlComputeBaseSwizzle(pIn, pOut); + } + else + { + pOut->tileSwizzle = 0; + } + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeFmaskInfo +* +* @brief +* Interface function stub of ComputeFmaskInfo. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_FMASK_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + // No thick MSAA + if (Thickness(pIn->tileMode) > 1) + { + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_FMASK_INFO_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + + if (pOut->pTileInfo) + { + // Use temp tile info for calcalation + input.pTileInfo = pOut->pTileInfo; + } + else + { + input.pTileInfo = &tileInfoNull; + } + + ADDR_SURFACE_FLAGS flags = {{0}}; + flags.fmask = 1; + + // Try finding a macroModeIndex + INT_32 macroModeIndex = HwlComputeMacroModeIndex(pIn->tileIndex, + flags, + HwlComputeFmaskBits(pIn, NULL), + pIn->numSamples, + input.pTileInfo, + &input.tileMode); + + // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info + if (macroModeIndex == TileIndexNoMacroIndex) + { + returnCode = HwlSetupTileCfg(0, input.tileIndex, macroModeIndex, + input.pTileInfo, &input.tileMode); + } + + ADDR_ASSERT(macroModeIndex != TileIndexInvalid); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + if (pIn->numSamples > 1) + { + returnCode = HwlComputeFmaskInfo(pIn, pOut); + } + else + { + memset(pOut, 0, sizeof(ADDR_COMPUTE_FMASK_INFO_OUTPUT)); + + returnCode = ADDR_INVALIDPARAMS; + } + } + } + + ValidBaseAlignments(pOut->baseAlign); + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeFmaskAddrFromCoord +* +* @brief +* Interface function stub of ComputeFmaskAddrFromCoord. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_ASSERT(pIn->numSamples > 1); + + if (pIn->numSamples > 1) + { + returnCode = HwlComputeFmaskAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_INVALIDPARAMS; + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeFmaskCoordFromAddr +* +* @brief +* Interface function stub of ComputeFmaskAddrFromCoord. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_ASSERT(pIn->numSamples > 1); + + if (pIn->numSamples > 1) + { + returnCode = HwlComputeFmaskCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_INVALIDPARAMS; + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ConvertTileInfoToHW +* +* @brief +* Convert tile info from real value to HW register value in HW layer +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_CONVERT_TILEINFOTOHW_INPUT)) || + (pOut->size != sizeof(ADDR_CONVERT_TILEINFOTOHW_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_CONVERT_TILEINFOTOHW_INPUT input; + // if pIn->reverse is TRUE, indices are ignored + if (pIn->reverse == FALSE && UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.bpp, input.tileIndex, + input.macroModeIndex, input.pTileInfo); + + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlConvertTileInfoToHW(pIn, pOut); + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ConvertTileIndex +* +* @brief +* Convert tile index to tile mode/type/info +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ConvertTileIndex( + const ADDR_CONVERT_TILEINDEX_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_CONVERT_TILEINDEX_INPUT)) || + (pOut->size != sizeof(ADDR_CONVERT_TILEINDEX_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + + returnCode = HwlSetupTileCfg(pIn->bpp, pIn->tileIndex, pIn->macroModeIndex, + pOut->pTileInfo, &pOut->tileMode, &pOut->tileType); + + if (returnCode == ADDR_OK && pIn->tileInfoHw) + { + ADDR_CONVERT_TILEINFOTOHW_INPUT hwInput = {0}; + ADDR_CONVERT_TILEINFOTOHW_OUTPUT hwOutput = {0}; + + hwInput.pTileInfo = pOut->pTileInfo; + hwInput.tileIndex = -1; + hwOutput.pTileInfo = pOut->pTileInfo; + + returnCode = HwlConvertTileInfoToHW(&hwInput, &hwOutput); + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::GetMacroModeIndex +* +* @brief +* Get macro mode index based on input info +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::GetMacroModeIndex( + const ADDR_GET_MACROMODEINDEX_INPUT* pIn, ///< [in] input structure + ADDR_GET_MACROMODEINDEX_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags()) + { + if ((pIn->size != sizeof(ADDR_GET_MACROMODEINDEX_INPUT)) || + (pOut->size != sizeof(ADDR_GET_MACROMODEINDEX_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfo = {0}; + pOut->macroModeIndex = HwlComputeMacroModeIndex(pIn->tileIndex, pIn->flags, pIn->bpp, + pIn->numFrags, &tileInfo); + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ConvertTileIndex1 +* +* @brief +* Convert tile index to tile mode/type/info +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ConvertTileIndex1( + const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_CONVERT_TILEINDEX1_INPUT)) || + (pOut->size != sizeof(ADDR_CONVERT_TILEINDEX_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_SURFACE_FLAGS flags = {{0}}; + + HwlComputeMacroModeIndex(pIn->tileIndex, flags, pIn->bpp, pIn->numSamples, + pOut->pTileInfo, &pOut->tileMode, &pOut->tileType); + + if (pIn->tileInfoHw) + { + ADDR_CONVERT_TILEINFOTOHW_INPUT hwInput = {0}; + ADDR_CONVERT_TILEINFOTOHW_OUTPUT hwOutput = {0}; + + hwInput.pTileInfo = pOut->pTileInfo; + hwInput.tileIndex = -1; + hwOutput.pTileInfo = pOut->pTileInfo; + + returnCode = HwlConvertTileInfoToHW(&hwInput, &hwOutput); + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::GetTileIndex +* +* @brief +* Get tile index from tile mode/type/info +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::GetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, ///< [in] input structure + ADDR_GET_TILEINDEX_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_GET_TILEINDEX_INPUT)) || + (pOut->size != sizeof(ADDR_GET_TILEINDEX_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlGetTileIndex(pIn, pOut); + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::Thickness +* +* @brief +* Get tile mode thickness +* +* @return +* Tile mode thickness +**************************************************************************************************** +*/ +UINT_32 Lib::Thickness( + AddrTileMode tileMode) ///< [in] tile mode +{ + return ModeFlags[tileMode].thickness; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// CMASK/HTILE +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Lib::ComputeHtileInfo +* +* @brief +* Interface function stub of AddrComputeHtilenfo +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeHtileInfo( + const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + BOOL_32 isWidth8 = (pIn->blockWidth == 8) ? TRUE : FALSE; + BOOL_32 isHeight8 = (pIn->blockHeight == 8) ? TRUE : FALSE; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_HTILE_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_HTILE_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_HTILE_INFO_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + if (pIn->flags.tcCompatible) + { + const UINT_32 sliceSize = pIn->pitch * pIn->height * 4 / (8 * 8); + const UINT_32 align = HwlGetPipes(pIn->pTileInfo) * pIn->pTileInfo->banks * m_pipeInterleaveBytes; + + if (pIn->numSlices > 1) + { + const UINT_32 surfBytes = (sliceSize * pIn->numSlices); + + pOut->sliceSize = sliceSize; + pOut->htileBytes = pIn->flags.skipTcCompatSizeAlign ? + surfBytes : PowTwoAlign(surfBytes, align); + pOut->sliceInterleaved = ((sliceSize % align) != 0) ? TRUE : FALSE; + } + else + { + pOut->sliceSize = pIn->flags.skipTcCompatSizeAlign ? + sliceSize : PowTwoAlign(sliceSize, align); + pOut->htileBytes = pOut->sliceSize; + pOut->sliceInterleaved = FALSE; + } + + pOut->nextMipLevelCompressible = ((sliceSize % align) == 0) ? TRUE : FALSE; + + pOut->pitch = pIn->pitch; + pOut->height = pIn->height; + pOut->baseAlign = align; + pOut->macroWidth = 0; + pOut->macroHeight = 0; + pOut->bpp = 32; + } + else + { + pOut->bpp = ComputeHtileInfo(pIn->flags, + pIn->pitch, + pIn->height, + pIn->numSlices, + pIn->isLinear, + isWidth8, + isHeight8, + pIn->pTileInfo, + &pOut->pitch, + &pOut->height, + &pOut->htileBytes, + &pOut->macroWidth, + &pOut->macroHeight, + &pOut->sliceSize, + &pOut->baseAlign); + } + } + } + + ValidMetaBaseAlignments(pOut->baseAlign); + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeCmaskInfo +* +* @brief +* Interface function stub of AddrComputeCmaskInfo +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeCmaskInfo( + const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_CMASK_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_CMASK_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_CMASK_INFO_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = ComputeCmaskInfo(pIn->flags, + pIn->pitch, + pIn->height, + pIn->numSlices, + pIn->isLinear, + pIn->pTileInfo, + &pOut->pitch, + &pOut->height, + &pOut->cmaskBytes, + &pOut->macroWidth, + &pOut->macroHeight, + &pOut->sliceSize, + &pOut->baseAlign, + &pOut->blockMax); + } + } + + ValidMetaBaseAlignments(pOut->baseAlign); + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeDccInfo +* +* @brief +* Interface function to compute DCC key info +* +* @return +* return code of HwlComputeDccInfo +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_DCCINFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_DCCINFO_OUTPUT))) + { + ret = ADDR_PARAMSIZEMISMATCH; + } + } + + if (ret == ADDR_OK) + { + ADDR_COMPUTE_DCCINFO_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + + ret = HwlSetupTileCfg(input.bpp, input.tileIndex, input.macroModeIndex, + &input.tileInfo, &input.tileMode); + + pIn = &input; + } + + if (ret == ADDR_OK) + { + ret = HwlComputeDccInfo(pIn, pOut); + + ValidMetaBaseAlignments(pOut->dccRamBaseAlign); + } + } + + return ret; +} + +/** +**************************************************************************************************** +* Lib::ComputeHtileAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeHtileAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeHtileAddrFromCoord( + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + BOOL_32 isWidth8 = (pIn->blockWidth == 8) ? TRUE : FALSE; + BOOL_32 isHeight8 = (pIn->blockHeight == 8) ? TRUE : FALSE; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + if (pIn->flags.tcCompatible) + { + HwlComputeHtileAddrFromCoord(pIn, pOut); + } + else + { + pOut->addr = HwlComputeXmaskAddrFromCoord(pIn->pitch, + pIn->height, + pIn->x, + pIn->y, + pIn->slice, + pIn->numSlices, + 1, + pIn->isLinear, + isWidth8, + isHeight8, + pIn->pTileInfo, + &pOut->bitPosition); + } + } + } + + return returnCode; + +} + +/** +**************************************************************************************************** +* Lib::ComputeHtileCoordFromAddr +* +* @brief +* Interface function stub of AddrComputeHtileCoordFromAddr +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeHtileCoordFromAddr( + const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + BOOL_32 isWidth8 = (pIn->blockWidth == 8) ? TRUE : FALSE; + BOOL_32 isHeight8 = (pIn->blockHeight == 8) ? TRUE : FALSE; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + HwlComputeXmaskCoordFromAddr(pIn->addr, + pIn->bitPosition, + pIn->pitch, + pIn->height, + pIn->numSlices, + 1, + pIn->isLinear, + isWidth8, + isHeight8, + pIn->pTileInfo, + &pOut->x, + &pOut->y, + &pOut->slice); + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeCmaskAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeCmaskAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + if (pIn->flags.tcCompatible == TRUE) + { + returnCode = HwlComputeCmaskAddrFromCoord(pIn, pOut); + } + else + { + pOut->addr = HwlComputeXmaskAddrFromCoord(pIn->pitch, + pIn->height, + pIn->x, + pIn->y, + pIn->slice, + pIn->numSlices, + 2, + pIn->isLinear, + FALSE, //this is cmask, isWidth8 is not needed + FALSE, //this is cmask, isHeight8 is not needed + pIn->pTileInfo, + &pOut->bitPosition); + } + + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeCmaskCoordFromAddr +* +* @brief +* Interface function stub of AddrComputeCmaskCoordFromAddr +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeCmaskCoordFromAddr( + const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(0, input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + HwlComputeXmaskCoordFromAddr(pIn->addr, + pIn->bitPosition, + pIn->pitch, + pIn->height, + pIn->numSlices, + 2, + pIn->isLinear, + FALSE, + FALSE, + pIn->pTileInfo, + &pOut->x, + &pOut->y, + &pOut->slice); + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeTileDataWidthAndHeight +* +* @brief +* Compute the squared cache shape for per-tile data (CMASK and HTILE) +* +* @return +* N/A +* +* @note +* MacroWidth and macroHeight are measured in pixels +**************************************************************************************************** +*/ +VOID Lib::ComputeTileDataWidthAndHeight( + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 cacheBits, ///< [in] bits of cache + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pMacroWidth, ///< [out] macro tile width + UINT_32* pMacroHeight ///< [out] macro tile height + ) const +{ + UINT_32 height = 1; + UINT_32 width = cacheBits / bpp; + UINT_32 pipes = HwlGetPipes(pTileInfo); + + // Double height until the macro-tile is close to square + // Height can only be doubled if width is even + + while ((width > height * 2 * pipes) && !(width & 1)) + { + width /= 2; + height *= 2; + } + + *pMacroWidth = 8 * width; + *pMacroHeight = 8 * height * pipes; + + // Note: The above iterative comptuation is equivalent to the following + // + //int log2_height = ((log2(cacheBits)-log2(bpp)-log2(pipes))/2); + //int macroHeight = pow2( 3+log2(pipes)+log2_height ); +} + +/** +**************************************************************************************************** +* Lib::HwlComputeTileDataWidthAndHeightLinear +* +* @brief +* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout +* +* @return +* N/A +* +* @note +* MacroWidth and macroHeight are measured in pixels +**************************************************************************************************** +*/ +VOID Lib::HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, ///< [out] macro tile width + UINT_32* pMacroHeight, ///< [out] macro tile height + UINT_32 bpp, ///< [in] bits per pixel + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + ADDR_ASSERT(bpp != 4); // Cmask does not support linear layout prior to SI + *pMacroWidth = 8 * 512 / bpp; // Align width to 512-bit memory accesses + *pMacroHeight = 8 * m_pipes; // Align height to number of pipes +} + +/** +**************************************************************************************************** +* Lib::ComputeHtileInfo +* +* @brief +* Compute htile pitch,width, bytes per 2D slice +* +* @return +* Htile bpp i.e. How many bits for an 8x8 tile +* Also returns by output parameters: +* *Htile pitch, height, total size in bytes, macro-tile dimensions and slice size* +**************************************************************************************************** +*/ +UINT_32 Lib::ComputeHtileInfo( + ADDR_HTILE_FLAGS flags, ///< [in] htile flags + UINT_32 pitchIn, ///< [in] pitch input + UINT_32 heightIn, ///< [in] height input + UINT_32 numSlices, ///< [in] number of slices + BOOL_32 isLinear, ///< [in] if it is linear mode + BOOL_32 isWidth8, ///< [in] if htile block width is 8 + BOOL_32 isHeight8, ///< [in] if htile block height is 8 + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pPitchOut, ///< [out] pitch output + UINT_32* pHeightOut, ///< [out] height output + UINT_64* pHtileBytes, ///< [out] bytes per 2D slice + UINT_32* pMacroWidth, ///< [out] macro-tile width in pixels + UINT_32* pMacroHeight, ///< [out] macro-tile width in pixels + UINT_64* pSliceSize, ///< [out] slice size in bytes + UINT_32* pBaseAlign ///< [out] base alignment + ) const +{ + + UINT_32 macroWidth; + UINT_32 macroHeight; + UINT_32 baseAlign; + UINT_64 surfBytes; + UINT_64 sliceBytes; + + numSlices = Max(1u, numSlices); + + const UINT_32 bpp = HwlComputeHtileBpp(isWidth8, isHeight8); + const UINT_32 cacheBits = HtileCacheBits; + + if (isLinear) + { + HwlComputeTileDataWidthAndHeightLinear(¯oWidth, + ¯oHeight, + bpp, + pTileInfo); + } + else + { + ComputeTileDataWidthAndHeight(bpp, + cacheBits, + pTileInfo, + ¯oWidth, + ¯oHeight); + } + + *pPitchOut = PowTwoAlign(pitchIn, macroWidth); + *pHeightOut = PowTwoAlign(heightIn, macroHeight); + + baseAlign = HwlComputeHtileBaseAlign(flags.tcCompatible, isLinear, pTileInfo); + + surfBytes = HwlComputeHtileBytes(*pPitchOut, + *pHeightOut, + bpp, + isLinear, + numSlices, + &sliceBytes, + baseAlign); + + *pHtileBytes = surfBytes; + + // + // Use SafeAssign since they are optional + // + SafeAssign(pMacroWidth, macroWidth); + + SafeAssign(pMacroHeight, macroHeight); + + SafeAssign(pSliceSize, sliceBytes); + + SafeAssign(pBaseAlign, baseAlign); + + return bpp; +} + +/** +**************************************************************************************************** +* Lib::ComputeCmaskBaseAlign +* +* @brief +* Compute cmask base alignment +* +* @return +* Cmask base alignment +**************************************************************************************************** +*/ +UINT_32 Lib::ComputeCmaskBaseAlign( + ADDR_CMASK_FLAGS flags, ///< [in] Cmask flags + ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + UINT_32 baseAlign = m_pipeInterleaveBytes * HwlGetPipes(pTileInfo); + + if (flags.tcCompatible) + { + ADDR_ASSERT(pTileInfo != NULL); + if (pTileInfo) + { + baseAlign *= pTileInfo->banks; + } + } + + return baseAlign; +} + +/** +**************************************************************************************************** +* Lib::ComputeCmaskBytes +* +* @brief +* Compute cmask size in bytes +* +* @return +* Cmask size in bytes +**************************************************************************************************** +*/ +UINT_64 Lib::ComputeCmaskBytes( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices ///< [in] number of slices + ) const +{ + return BITS_TO_BYTES(static_cast(pitch) * height * numSlices * CmaskElemBits) / + MicroTilePixels; +} + +/** +**************************************************************************************************** +* Lib::ComputeCmaskInfo +* +* @brief +* Compute cmask pitch,width, bytes per 2D slice +* +* @return +* BlockMax. Also by output parameters: Cmask pitch,height, total size in bytes, +* macro-tile dimensions +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeCmaskInfo( + ADDR_CMASK_FLAGS flags, ///< [in] cmask flags + UINT_32 pitchIn, ///< [in] pitch input + UINT_32 heightIn, ///< [in] height input + UINT_32 numSlices, ///< [in] number of slices + BOOL_32 isLinear, ///< [in] is linear mode + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pPitchOut, ///< [out] pitch output + UINT_32* pHeightOut, ///< [out] height output + UINT_64* pCmaskBytes, ///< [out] bytes per 2D slice + UINT_32* pMacroWidth, ///< [out] macro-tile width in pixels + UINT_32* pMacroHeight, ///< [out] macro-tile width in pixels + UINT_64* pSliceSize, ///< [out] slice size in bytes + UINT_32* pBaseAlign, ///< [out] base alignment + UINT_32* pBlockMax ///< [out] block max == slice / 128 / 128 - 1 + ) const +{ + UINT_32 macroWidth; + UINT_32 macroHeight; + UINT_32 baseAlign; + UINT_64 surfBytes; + UINT_64 sliceBytes; + + numSlices = Max(1u, numSlices); + + const UINT_32 bpp = CmaskElemBits; + const UINT_32 cacheBits = CmaskCacheBits; + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (isLinear) + { + HwlComputeTileDataWidthAndHeightLinear(¯oWidth, + ¯oHeight, + bpp, + pTileInfo); + } + else + { + ComputeTileDataWidthAndHeight(bpp, + cacheBits, + pTileInfo, + ¯oWidth, + ¯oHeight); + } + + *pPitchOut = (pitchIn + macroWidth - 1) & ~(macroWidth - 1); + *pHeightOut = (heightIn + macroHeight - 1) & ~(macroHeight - 1); + + sliceBytes = ComputeCmaskBytes(*pPitchOut, + *pHeightOut, + 1); + + baseAlign = ComputeCmaskBaseAlign(flags, pTileInfo); + + while (sliceBytes % baseAlign) + { + *pHeightOut += macroHeight; + + sliceBytes = ComputeCmaskBytes(*pPitchOut, + *pHeightOut, + 1); + } + + surfBytes = sliceBytes * numSlices; + + *pCmaskBytes = surfBytes; + + // + // Use SafeAssign since they are optional + // + SafeAssign(pMacroWidth, macroWidth); + + SafeAssign(pMacroHeight, macroHeight); + + SafeAssign(pBaseAlign, baseAlign); + + SafeAssign(pSliceSize, sliceBytes); + + UINT_32 slice = (*pPitchOut) * (*pHeightOut); + UINT_32 blockMax = slice / 128 / 128 - 1; + +#if DEBUG + if (slice % (64*256) != 0) + { + ADDR_ASSERT_ALWAYS(); + } +#endif //DEBUG + + UINT_32 maxBlockMax = HwlGetMaxCmaskBlockMax(); + + if (blockMax > maxBlockMax) + { + blockMax = maxBlockMax; + returnCode = ADDR_INVALIDPARAMS; + } + + SafeAssign(pBlockMax, blockMax); + + return returnCode; +} + +/** +**************************************************************************************************** +* Lib::ComputeXmaskCoordYFromPipe +* +* @brief +* Compute the Y coord from pipe number for cmask/htile +* +* @return +* Y coordinate +* +**************************************************************************************************** +*/ +UINT_32 Lib::ComputeXmaskCoordYFromPipe( + UINT_32 pipe, ///< [in] pipe number + UINT_32 x ///< [in] x coordinate + ) const +{ + UINT_32 pipeBit0; + UINT_32 pipeBit1; + UINT_32 xBit0; + UINT_32 xBit1; + UINT_32 yBit0; + UINT_32 yBit1; + + UINT_32 y = 0; + + UINT_32 numPipes = m_pipes; // SI has its implementation + // + // Convert pipe + x to y coordinate. + // + switch (numPipes) + { + case 1: + // + // 1 pipe + // + // p0 = 0 + // + y = 0; + break; + case 2: + // + // 2 pipes + // + // p0 = x0 ^ y0 + // + // y0 = p0 ^ x0 + // + pipeBit0 = pipe & 0x1; + + xBit0 = x & 0x1; + + yBit0 = pipeBit0 ^ xBit0; + + y = yBit0; + break; + case 4: + // + // 4 pipes + // + // p0 = x1 ^ y0 + // p1 = x0 ^ y1 + // + // y0 = p0 ^ x1 + // y1 = p1 ^ x0 + // + pipeBit0 = pipe & 0x1; + pipeBit1 = (pipe & 0x2) >> 1; + + xBit0 = x & 0x1; + xBit1 = (x & 0x2) >> 1; + + yBit0 = pipeBit0 ^ xBit1; + yBit1 = pipeBit1 ^ xBit0; + + y = (yBit0 | + (yBit1 << 1)); + break; + case 8: + // + // 8 pipes + // + // r600 and r800 have different method + // + y = HwlComputeXmaskCoordYFrom8Pipe(pipe, x); + break; + default: + break; + } + return y; +} + +/** +**************************************************************************************************** +* Lib::HwlComputeXmaskCoordFromAddr +* +* @brief +* Compute the coord from an address of a cmask/htile +* +* @return +* N/A +* +* @note +* This method is reused by htile, so rename to Xmask +**************************************************************************************************** +*/ +VOID Lib::HwlComputeXmaskCoordFromAddr( + UINT_64 addr, ///< [in] address + UINT_32 bitPosition, ///< [in] bitPosition in a byte + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices, ///< [in] number of slices + UINT_32 factor, ///< [in] factor that indicates cmask or htile + BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout + BOOL_32 isWidth8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + BOOL_32 isHeight8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pX, ///< [out] x coord + UINT_32* pY, ///< [out] y coord + UINT_32* pSlice ///< [out] slice index + ) const +{ + UINT_32 pipe; + UINT_32 numPipes; + UINT_32 numGroupBits; + (void)numGroupBits; + UINT_32 numPipeBits; + UINT_32 macroTilePitch; + UINT_32 macroTileHeight; + + UINT_64 bitAddr; + + UINT_32 microTileCoordY; + + UINT_32 elemBits; + + UINT_32 pitchAligned = pitch; + UINT_32 heightAligned = height; + UINT_64 totalBytes; + + UINT_64 elemOffset; + + UINT_64 macroIndex; + UINT_32 microIndex; + + UINT_64 macroNumber; + UINT_32 microNumber; + + UINT_32 macroX; + UINT_32 macroY; + UINT_32 macroZ; + + UINT_32 microX; + UINT_32 microY; + + UINT_32 tilesPerMacro; + UINT_32 macrosPerPitch; + UINT_32 macrosPerSlice; + + // + // Extract pipe. + // + numPipes = HwlGetPipes(pTileInfo); + pipe = ComputePipeFromAddr(addr, numPipes); + + // + // Compute the number of group and pipe bits. + // + numGroupBits = Log2(m_pipeInterleaveBytes); + numPipeBits = Log2(numPipes); + + UINT_32 groupBits = 8 * m_pipeInterleaveBytes; + UINT_32 pipes = numPipes; + + // + // Compute the micro tile size, in bits. And macro tile pitch and height. + // + if (factor == 2) //CMASK + { + ADDR_CMASK_FLAGS flags = {{0}}; + + elemBits = CmaskElemBits; + + ComputeCmaskInfo(flags, + pitch, + height, + numSlices, + isLinear, + pTileInfo, + &pitchAligned, + &heightAligned, + &totalBytes, + ¯oTilePitch, + ¯oTileHeight); + } + else //HTILE + { + ADDR_HTILE_FLAGS flags = {{0}}; + + if (factor != 1) + { + factor = 1; + } + + elemBits = HwlComputeHtileBpp(isWidth8, isHeight8); + + ComputeHtileInfo(flags, + pitch, + height, + numSlices, + isLinear, + isWidth8, + isHeight8, + pTileInfo, + &pitchAligned, + &heightAligned, + &totalBytes, + ¯oTilePitch, + ¯oTileHeight); + } + + // Should use aligned dims + // + pitch = pitchAligned; + height = heightAligned; + + // + // Convert byte address to bit address. + // + bitAddr = BYTES_TO_BITS(addr) + bitPosition; + + // + // Remove pipe bits from address. + // + + bitAddr = (bitAddr % groupBits) + ((bitAddr/groupBits/pipes)*groupBits); + + elemOffset = bitAddr / elemBits; + + tilesPerMacro = (macroTilePitch/factor) * macroTileHeight / MicroTilePixels >> numPipeBits; + + macrosPerPitch = pitch / (macroTilePitch/factor); + macrosPerSlice = macrosPerPitch * height / macroTileHeight; + + macroIndex = elemOffset / factor / tilesPerMacro; + microIndex = static_cast(elemOffset % (tilesPerMacro * factor)); + + macroNumber = macroIndex * factor + microIndex % factor; + microNumber = microIndex / factor; + + macroX = static_cast((macroNumber % macrosPerPitch)); + macroY = static_cast((macroNumber % macrosPerSlice) / macrosPerPitch); + macroZ = static_cast((macroNumber / macrosPerSlice)); + + microX = microNumber % (macroTilePitch / factor / MicroTileWidth); + microY = (microNumber / (macroTilePitch / factor / MicroTileHeight)); + + *pX = macroX * (macroTilePitch/factor) + microX * MicroTileWidth; + *pY = macroY * macroTileHeight + (microY * MicroTileHeight << numPipeBits); + *pSlice = macroZ; + + microTileCoordY = ComputeXmaskCoordYFromPipe(pipe, + *pX/MicroTileWidth); + + // + // Assemble final coordinates. + // + *pY += microTileCoordY * MicroTileHeight; + +} + +/** +**************************************************************************************************** +* Lib::HwlComputeXmaskAddrFromCoord +* +* @brief +* Compute the address from an address of cmask (prior to si) +* +* @return +* Address in bytes +* +**************************************************************************************************** +*/ +UINT_64 Lib::HwlComputeXmaskAddrFromCoord( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 x, ///< [in] x coord + UINT_32 y, ///< [in] y coord + UINT_32 slice, ///< [in] slice/depth index + UINT_32 numSlices, ///< [in] number of slices + UINT_32 factor, ///< [in] factor that indicates cmask(2) or htile(1) + BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout + BOOL_32 isWidth8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + BOOL_32 isHeight8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pBitPosition ///< [out] bit position inside a byte + ) const +{ + UINT_64 addr; + UINT_32 numGroupBits; + UINT_32 numPipeBits; + UINT_32 newPitch = 0; + UINT_32 newHeight = 0; + UINT_64 sliceBytes = 0; + UINT_64 totalBytes = 0; + UINT_64 sliceOffset; + UINT_32 pipe; + UINT_32 macroTileWidth; + UINT_32 macroTileHeight; + UINT_32 macroTilesPerRow; + UINT_32 macroTileBytes; + UINT_32 macroTileIndexX; + UINT_32 macroTileIndexY; + UINT_64 macroTileOffset; + UINT_32 pixelBytesPerRow; + UINT_32 pixelOffsetX; + UINT_32 pixelOffsetY; + UINT_32 pixelOffset; + UINT_64 totalOffset; + UINT_64 offsetLo; + UINT_64 offsetHi; + UINT_64 groupMask; + + UINT_32 elemBits = 0; + + UINT_32 numPipes = m_pipes; // This function is accessed prior to si only + + if (factor == 2) //CMASK + { + elemBits = CmaskElemBits; + + // For asics before SI, cmask is always tiled + isLinear = FALSE; + } + else //HTILE + { + if (factor != 1) // Fix compile warning + { + factor = 1; + } + + elemBits = HwlComputeHtileBpp(isWidth8, isHeight8); + } + + // + // Compute the number of group bits and pipe bits. + // + numGroupBits = Log2(m_pipeInterleaveBytes); + numPipeBits = Log2(numPipes); + + // + // Compute macro tile dimensions. + // + if (factor == 2) // CMASK + { + ADDR_CMASK_FLAGS flags = {{0}}; + + ComputeCmaskInfo(flags, + pitch, + height, + numSlices, + isLinear, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + ¯oTileWidth, + ¯oTileHeight); + + sliceBytes = totalBytes / numSlices; + } + else // HTILE + { + ADDR_HTILE_FLAGS flags = {{0}}; + + ComputeHtileInfo(flags, + pitch, + height, + numSlices, + isLinear, + isWidth8, + isHeight8, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + ¯oTileWidth, + ¯oTileHeight, + &sliceBytes); + } + + sliceOffset = slice * sliceBytes; + + // + // Get the pipe. Note that neither slice rotation nor pipe swizzling apply for CMASK. + // + pipe = ComputePipeFromCoord(x, + y, + 0, + ADDR_TM_2D_TILED_THIN1, + 0, + FALSE, + pTileInfo); + + // + // Compute the number of macro tiles per row. + // + macroTilesPerRow = newPitch / macroTileWidth; + + // + // Compute the number of bytes per macro tile. + // + macroTileBytes = BITS_TO_BYTES((macroTileWidth * macroTileHeight * elemBits) / MicroTilePixels); + + // + // Compute the offset to the macro tile containing the specified coordinate. + // + macroTileIndexX = x / macroTileWidth; + macroTileIndexY = y / macroTileHeight; + macroTileOffset = ((macroTileIndexY * macroTilesPerRow) + macroTileIndexX) * macroTileBytes; + + // + // Compute the pixel offset within the macro tile. + // + pixelBytesPerRow = BITS_TO_BYTES(macroTileWidth * elemBits) / MicroTileWidth; + + // + // The nibbles are interleaved (see below), so the part of the offset relative to the x + // coordinate repeats halfway across the row. (Not for HTILE) + // + if (factor == 2) + { + pixelOffsetX = (x % (macroTileWidth / 2)) / MicroTileWidth; + } + else + { + pixelOffsetX = (x % (macroTileWidth)) / MicroTileWidth * BITS_TO_BYTES(elemBits); + } + + // + // Compute the y offset within the macro tile. + // + pixelOffsetY = (((y % macroTileHeight) / MicroTileHeight) / numPipes) * pixelBytesPerRow; + + pixelOffset = pixelOffsetX + pixelOffsetY; + + // + // Combine the slice offset and macro tile offset with the pixel offset, accounting for the + // pipe bits in the middle of the address. + // + totalOffset = ((sliceOffset + macroTileOffset) >> numPipeBits) + pixelOffset; + + // + // Split the offset to put some bits below the pipe bits and some above. + // + groupMask = (1 << numGroupBits) - 1; + offsetLo = totalOffset & groupMask; + offsetHi = (totalOffset & ~groupMask) << numPipeBits; + + // + // Assemble the address from its components. + // + addr = offsetLo; + addr |= offsetHi; + // This is to remove warning with /analyze option + UINT_32 pipeBits = pipe << numGroupBits; + addr |= pipeBits; + + // + // Compute the bit position. The lower nibble is used when the x coordinate within the macro + // tile is less than half of the macro tile width, and the upper nibble is used when the x + // coordinate within the macro tile is greater than or equal to half the macro tile width. + // + *pBitPosition = ((x % macroTileWidth) < (macroTileWidth / factor)) ? 0 : 4; + + return addr; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface Addressing Shared +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +**************************************************************************************************** +* Lib::ComputeSurfaceAddrFromCoordLinear +* +* @brief +* Compute address from coord for linear surface +* +* @return +* Address in bytes +* +**************************************************************************************************** +*/ +UINT_64 Lib::ComputeSurfaceAddrFromCoordLinear( + UINT_32 x, ///< [in] x coord + UINT_32 y, ///< [in] y coord + UINT_32 slice, ///< [in] slice/depth index + UINT_32 sample, ///< [in] sample index + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices, ///< [in] number of slices + UINT_32* pBitPosition ///< [out] bit position inside a byte + ) const +{ + const UINT_64 sliceSize = static_cast(pitch) * height; + + UINT_64 sliceOffset = (slice + sample * numSlices)* sliceSize; + UINT_64 rowOffset = static_cast(y) * pitch; + UINT_64 pixOffset = x; + + UINT_64 addr = (sliceOffset + rowOffset + pixOffset) * bpp; + + *pBitPosition = static_cast(addr % 8); + addr /= 8; + + return addr; +} + +/** +**************************************************************************************************** +* Lib::ComputeSurfaceCoordFromAddrLinear +* +* @brief +* Compute the coord from an address of a linear surface +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID Lib::ComputeSurfaceCoordFromAddrLinear( + UINT_64 addr, ///< [in] address + UINT_32 bitPosition, ///< [in] bitPosition in a byte + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices, ///< [in] number of slices + UINT_32* pX, ///< [out] x coord + UINT_32* pY, ///< [out] y coord + UINT_32* pSlice, ///< [out] slice/depth index + UINT_32* pSample ///< [out] sample index + ) const +{ + const UINT_64 sliceSize = static_cast(pitch) * height; + const UINT_64 linearOffset = (BYTES_TO_BITS(addr) + bitPosition) / bpp; + + *pX = static_cast((linearOffset % sliceSize) % pitch); + *pY = static_cast((linearOffset % sliceSize) / pitch % height); + *pSlice = static_cast((linearOffset / sliceSize) % numSlices); + *pSample = static_cast((linearOffset / sliceSize) / numSlices); +} + +/** +**************************************************************************************************** +* Lib::ComputeSurfaceCoordFromAddrMicroTiled +* +* @brief +* Compute the coord from an address of a micro tiled surface +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID Lib::ComputeSurfaceCoordFromAddrMicroTiled( + UINT_64 addr, ///< [in] address + UINT_32 bitPosition, ///< [in] bitPosition in a byte + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 tileBase, ///< [in] base offset within a tile + UINT_32 compBits, ///< [in] component bits actually needed(for planar surface) + UINT_32* pX, ///< [out] x coord + UINT_32* pY, ///< [out] y coord + UINT_32* pSlice, ///< [out] slice/depth index + UINT_32* pSample, ///< [out] sample index, + AddrTileType microTileType, ///< [in] micro tiling order + BOOL_32 isDepthSampleOrder ///< [in] TRUE if in depth sample order + ) const +{ + UINT_64 bitAddr; + UINT_32 microTileThickness; + UINT_32 microTileBits; + UINT_64 sliceBits; + UINT_64 rowBits; + UINT_32 sliceIndex; + UINT_32 microTileCoordX; + UINT_32 microTileCoordY; + UINT_32 pixelOffset; + UINT_32 pixelCoordX = 0; + UINT_32 pixelCoordY = 0; + UINT_32 pixelCoordZ = 0; + UINT_32 pixelCoordS = 0; + + // + // Convert byte address to bit address. + // + bitAddr = BYTES_TO_BITS(addr) + bitPosition; + + // + // Compute the micro tile size, in bits. + // + switch (tileMode) + { + case ADDR_TM_1D_TILED_THICK: + microTileThickness = ThickTileThickness; + break; + default: + microTileThickness = 1; + break; + } + + microTileBits = MicroTilePixels * microTileThickness * bpp * numSamples; + + // + // Compute number of bits per slice and number of bits per row of micro tiles. + // + sliceBits = static_cast(pitch) * height * microTileThickness * bpp * numSamples; + + rowBits = (pitch / MicroTileWidth) * microTileBits; + + // + // Extract the slice index. + // + sliceIndex = static_cast(bitAddr / sliceBits); + bitAddr -= sliceIndex * sliceBits; + + // + // Extract the y coordinate of the micro tile. + // + microTileCoordY = static_cast(bitAddr / rowBits) * MicroTileHeight; + bitAddr -= (microTileCoordY / MicroTileHeight) * rowBits; + + // + // Extract the x coordinate of the micro tile. + // + microTileCoordX = static_cast(bitAddr / microTileBits) * MicroTileWidth; + + // + // Compute the pixel offset within the micro tile. + // + pixelOffset = static_cast(bitAddr % microTileBits); + + // + // Extract pixel coordinates from the offset. + // + HwlComputePixelCoordFromOffset(pixelOffset, + bpp, + numSamples, + tileMode, + tileBase, + compBits, + &pixelCoordX, + &pixelCoordY, + &pixelCoordZ, + &pixelCoordS, + microTileType, + isDepthSampleOrder); + + // + // Assemble final coordinates. + // + *pX = microTileCoordX + pixelCoordX; + *pY = microTileCoordY + pixelCoordY; + *pSlice = (sliceIndex * microTileThickness) + pixelCoordZ; + *pSample = pixelCoordS; + + if (microTileThickness > 1) + { + *pSample = 0; + } +} + +/** +**************************************************************************************************** +* Lib::ComputePipeFromAddr +* +* @brief +* Compute the pipe number from an address +* +* @return +* Pipe number +* +**************************************************************************************************** +*/ +UINT_32 Lib::ComputePipeFromAddr( + UINT_64 addr, ///< [in] address + UINT_32 numPipes ///< [in] number of banks + ) const +{ + UINT_32 pipe; + + UINT_32 groupBytes = m_pipeInterleaveBytes; //just different terms + + // R600 + // The LSBs of the address are arranged as follows: + // bank | pipe | group + // + // To get the pipe number, shift off the group bits and mask the pipe bits. + // + + // R800 + // The LSBs of the address are arranged as follows: + // bank | bankInterleave | pipe | pipeInterleave + // + // To get the pipe number, shift off the pipe interleave bits and mask the pipe bits. + // + + pipe = static_cast(addr >> Log2(groupBytes)) & (numPipes - 1); + + return pipe; +} + +/** +**************************************************************************************************** +* Lib::ComputeMicroTileEquation +* +* @brief +* Compute micro tile equation +* +* @return +* If equation can be computed +* +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputeMicroTileEquation( + UINT_32 log2BytesPP, ///< [in] log2 of bytes per pixel + AddrTileMode tileMode, ///< [in] tile mode + AddrTileType microTileType, ///< [in] pixel order in display/non-display mode + ADDR_EQUATION* pEquation ///< [out] equation + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + for (UINT_32 i = 0; i < log2BytesPP; i++) + { + pEquation->addr[i].valid = 1; + pEquation->addr[i].channel = 0; + pEquation->addr[i].index = i; + } + + ADDR_CHANNEL_SETTING* pixelBit = &pEquation->addr[log2BytesPP]; + + ADDR_CHANNEL_SETTING x0 = InitChannel(1, 0, log2BytesPP + 0); + ADDR_CHANNEL_SETTING x1 = InitChannel(1, 0, log2BytesPP + 1); + ADDR_CHANNEL_SETTING x2 = InitChannel(1, 0, log2BytesPP + 2); + ADDR_CHANNEL_SETTING y0 = InitChannel(1, 1, 0); + ADDR_CHANNEL_SETTING y1 = InitChannel(1, 1, 1); + ADDR_CHANNEL_SETTING y2 = InitChannel(1, 1, 2); + ADDR_CHANNEL_SETTING z0 = InitChannel(1, 2, 0); + ADDR_CHANNEL_SETTING z1 = InitChannel(1, 2, 1); + ADDR_CHANNEL_SETTING z2 = InitChannel(1, 2, 2); + + UINT_32 thickness = Thickness(tileMode); + UINT_32 bpp = 1 << (log2BytesPP + 3); + + if (microTileType != ADDR_THICK) + { + if (microTileType == ADDR_DISPLAYABLE) + { + switch (bpp) + { + case 8: + pixelBit[0] = x0; + pixelBit[1] = x1; + pixelBit[2] = x2; + pixelBit[3] = y1; + pixelBit[4] = y0; + pixelBit[5] = y2; + break; + case 16: + pixelBit[0] = x0; + pixelBit[1] = x1; + pixelBit[2] = x2; + pixelBit[3] = y0; + pixelBit[4] = y1; + pixelBit[5] = y2; + break; + case 32: + pixelBit[0] = x0; + pixelBit[1] = x1; + pixelBit[2] = y0; + pixelBit[3] = x2; + pixelBit[4] = y1; + pixelBit[5] = y2; + break; + case 64: + pixelBit[0] = x0; + pixelBit[1] = y0; + pixelBit[2] = x1; + pixelBit[3] = x2; + pixelBit[4] = y1; + pixelBit[5] = y2; + break; + case 128: + pixelBit[0] = y0; + pixelBit[1] = x0; + pixelBit[2] = x1; + pixelBit[3] = x2; + pixelBit[4] = y1; + pixelBit[5] = y2; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + else if (microTileType == ADDR_NON_DISPLAYABLE || microTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + pixelBit[0] = x0; + pixelBit[1] = y0; + pixelBit[2] = x1; + pixelBit[3] = y1; + pixelBit[4] = x2; + pixelBit[5] = y2; + } + else if (microTileType == ADDR_ROTATED) + { + ADDR_ASSERT(thickness == 1); + + switch (bpp) + { + case 8: + pixelBit[0] = y0; + pixelBit[1] = y1; + pixelBit[2] = y2; + pixelBit[3] = x1; + pixelBit[4] = x0; + pixelBit[5] = x2; + break; + case 16: + pixelBit[0] = y0; + pixelBit[1] = y1; + pixelBit[2] = y2; + pixelBit[3] = x0; + pixelBit[4] = x1; + pixelBit[5] = x2; + break; + case 32: + pixelBit[0] = y0; + pixelBit[1] = y1; + pixelBit[2] = x0; + pixelBit[3] = y2; + pixelBit[4] = x1; + pixelBit[5] = x2; + break; + case 64: + pixelBit[0] = y0; + pixelBit[1] = x0; + pixelBit[2] = y1; + pixelBit[3] = x1; + pixelBit[4] = x2; + pixelBit[5] = y2; + break; + default: + retCode = ADDR_NOTSUPPORTED; + break; + } + } + + if (thickness > 1) + { + pixelBit[6] = z0; + pixelBit[7] = z1; + pEquation->numBits = 8 + log2BytesPP; + } + else + { + pEquation->numBits = 6 + log2BytesPP; + } + } + else // ADDR_THICK + { + ADDR_ASSERT(thickness > 1); + + switch (bpp) + { + case 8: + case 16: + pixelBit[0] = x0; + pixelBit[1] = y0; + pixelBit[2] = x1; + pixelBit[3] = y1; + pixelBit[4] = z0; + pixelBit[5] = z1; + break; + case 32: + pixelBit[0] = x0; + pixelBit[1] = y0; + pixelBit[2] = x1; + pixelBit[3] = z0; + pixelBit[4] = y1; + pixelBit[5] = z1; + break; + case 64: + case 128: + pixelBit[0] = x0; + pixelBit[1] = y0; + pixelBit[2] = z0; + pixelBit[3] = x1; + pixelBit[4] = y1; + pixelBit[5] = z1; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + pixelBit[6] = x2; + pixelBit[7] = y2; + pEquation->numBits = 8 + log2BytesPP; + } + + if (thickness == 8) + { + pixelBit[8] = z2; + pEquation->numBits = 9 + log2BytesPP; + } + + // stackedDepthSlices is used for addressing mode that a tile block contains multiple slices, + // which is not supported by our address lib + pEquation->stackedDepthSlices = FALSE; + + return retCode; +} + +/** +**************************************************************************************************** +* Lib::ComputePixelIndexWithinMicroTile +* +* @brief +* Compute the pixel index inside a micro tile of surface +* +* @return +* Pixel index +* +**************************************************************************************************** +*/ +UINT_32 Lib::ComputePixelIndexWithinMicroTile( + UINT_32 x, ///< [in] x coord + UINT_32 y, ///< [in] y coord + UINT_32 z, ///< [in] slice/depth index + UINT_32 bpp, ///< [in] bits per pixel + AddrTileMode tileMode, ///< [in] tile mode + AddrTileType microTileType ///< [in] pixel order in display/non-display mode + ) const +{ + UINT_32 pixelBit0 = 0; + UINT_32 pixelBit1 = 0; + UINT_32 pixelBit2 = 0; + UINT_32 pixelBit3 = 0; + UINT_32 pixelBit4 = 0; + UINT_32 pixelBit5 = 0; + UINT_32 pixelBit6 = 0; + UINT_32 pixelBit7 = 0; + UINT_32 pixelBit8 = 0; + UINT_32 pixelNumber; + + UINT_32 x0 = _BIT(x, 0); + UINT_32 x1 = _BIT(x, 1); + UINT_32 x2 = _BIT(x, 2); + UINT_32 y0 = _BIT(y, 0); + UINT_32 y1 = _BIT(y, 1); + UINT_32 y2 = _BIT(y, 2); + UINT_32 z0 = _BIT(z, 0); + UINT_32 z1 = _BIT(z, 1); + UINT_32 z2 = _BIT(z, 2); + + UINT_32 thickness = Thickness(tileMode); + + // Compute the pixel number within the micro tile. + + if (microTileType != ADDR_THICK) + { + if (microTileType == ADDR_DISPLAYABLE) + { + switch (bpp) + { + case 8: + pixelBit0 = x0; + pixelBit1 = x1; + pixelBit2 = x2; + pixelBit3 = y1; + pixelBit4 = y0; + pixelBit5 = y2; + break; + case 16: + pixelBit0 = x0; + pixelBit1 = x1; + pixelBit2 = x2; + pixelBit3 = y0; + pixelBit4 = y1; + pixelBit5 = y2; + break; + case 32: + pixelBit0 = x0; + pixelBit1 = x1; + pixelBit2 = y0; + pixelBit3 = x2; + pixelBit4 = y1; + pixelBit5 = y2; + break; + case 64: + pixelBit0 = x0; + pixelBit1 = y0; + pixelBit2 = x1; + pixelBit3 = x2; + pixelBit4 = y1; + pixelBit5 = y2; + break; + case 128: + pixelBit0 = y0; + pixelBit1 = x0; + pixelBit2 = x1; + pixelBit3 = x2; + pixelBit4 = y1; + pixelBit5 = y2; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + else if (microTileType == ADDR_NON_DISPLAYABLE || microTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + pixelBit0 = x0; + pixelBit1 = y0; + pixelBit2 = x1; + pixelBit3 = y1; + pixelBit4 = x2; + pixelBit5 = y2; + } + else if (microTileType == ADDR_ROTATED) + { + ADDR_ASSERT(thickness == 1); + + switch (bpp) + { + case 8: + pixelBit0 = y0; + pixelBit1 = y1; + pixelBit2 = y2; + pixelBit3 = x1; + pixelBit4 = x0; + pixelBit5 = x2; + break; + case 16: + pixelBit0 = y0; + pixelBit1 = y1; + pixelBit2 = y2; + pixelBit3 = x0; + pixelBit4 = x1; + pixelBit5 = x2; + break; + case 32: + pixelBit0 = y0; + pixelBit1 = y1; + pixelBit2 = x0; + pixelBit3 = y2; + pixelBit4 = x1; + pixelBit5 = x2; + break; + case 64: + pixelBit0 = y0; + pixelBit1 = x0; + pixelBit2 = y1; + pixelBit3 = x1; + pixelBit4 = x2; + pixelBit5 = y2; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + + if (thickness > 1) + { + pixelBit6 = z0; + pixelBit7 = z1; + } + } + else // ADDR_THICK + { + ADDR_ASSERT(thickness > 1); + + switch (bpp) + { + case 8: + case 16: + pixelBit0 = x0; + pixelBit1 = y0; + pixelBit2 = x1; + pixelBit3 = y1; + pixelBit4 = z0; + pixelBit5 = z1; + break; + case 32: + pixelBit0 = x0; + pixelBit1 = y0; + pixelBit2 = x1; + pixelBit3 = z0; + pixelBit4 = y1; + pixelBit5 = z1; + break; + case 64: + case 128: + pixelBit0 = x0; + pixelBit1 = y0; + pixelBit2 = z0; + pixelBit3 = x1; + pixelBit4 = y1; + pixelBit5 = z1; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + pixelBit6 = x2; + pixelBit7 = y2; + } + + if (thickness == 8) + { + pixelBit8 = z2; + } + + pixelNumber = ((pixelBit0 ) | + (pixelBit1 << 1) | + (pixelBit2 << 2) | + (pixelBit3 << 3) | + (pixelBit4 << 4) | + (pixelBit5 << 5) | + (pixelBit6 << 6) | + (pixelBit7 << 7) | + (pixelBit8 << 8)); + + return pixelNumber; +} + +/** +**************************************************************************************************** +* Lib::AdjustPitchAlignment +* +* @brief +* Adjusts pitch alignment for flipping surface +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID Lib::AdjustPitchAlignment( + ADDR_SURFACE_FLAGS flags, ///< [in] Surface flags + UINT_32* pPitchAlign ///< [out] Pointer to pitch alignment + ) const +{ + // Display engine hardwires lower 5 bit of GRPH_PITCH to ZERO which means 32 pixel alignment + // Maybe it will be fixed in future but let's make it general for now. + if (flags.display || flags.overlay) + { + *pPitchAlign = PowTwoAlign(*pPitchAlign, 32); + + if(flags.display) + { + *pPitchAlign = Max(m_minPitchAlignPixels, *pPitchAlign); + } + } +} + +/** +**************************************************************************************************** +* Lib::PadDimensions +* +* @brief +* Helper function to pad dimensions +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID Lib::PadDimensions( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + ADDR_TILEINFO* pTileInfo, ///< [in,out] bank structure. + UINT_32 padDims, ///< [in] Dimensions to pad valid value 1,2,3 + UINT_32 mipLevel, ///< [in] MipLevel + UINT_32* pPitch, ///< [in,out] pitch in pixels + UINT_32* pPitchAlign, ///< [in,out] pitch align could be changed in HwlPadDimensions + UINT_32* pHeight, ///< [in,out] height in pixels + UINT_32 heightAlign, ///< [in] height alignment + UINT_32* pSlices, ///< [in,out] number of slices + UINT_32 sliceAlign ///< [in] number of slice alignment + ) const +{ + UINT_32 pitchAlign = *pPitchAlign; + UINT_32 thickness = Thickness(tileMode); + + ADDR_ASSERT(padDims <= 3); + + // + // Override padding for mip levels + // + if (mipLevel > 0) + { + if (flags.cube) + { + // for cubemap, we only pad when client call with 6 faces as an identity + if (*pSlices > 1) + { + padDims = 3; // we should pad cubemap sub levels when we treat it as 3d texture + } + else + { + padDims = 2; + } + } + } + + // Any possibilities that padDims is 0? + if (padDims == 0) + { + padDims = 3; + } + + if (IsPow2(pitchAlign)) + { + *pPitch = PowTwoAlign((*pPitch), pitchAlign); + } + else // add this code to pass unit test, r600 linear mode is not align bpp to pow2 for linear + { + *pPitch += pitchAlign - 1; + *pPitch /= pitchAlign; + *pPitch *= pitchAlign; + } + + if (padDims > 1) + { + if (IsPow2(heightAlign)) + { + *pHeight = PowTwoAlign((*pHeight), heightAlign); + } + else + { + *pHeight += heightAlign - 1; + *pHeight /= heightAlign; + *pHeight *= heightAlign; + } + } + + if (padDims > 2 || thickness > 1) + { + // for cubemap single face, we do not pad slices. + // if we pad it, the slice number should be set to 6 and current mip level > 1 + if (flags.cube && (!m_configFlags.noCubeMipSlicesPad || flags.cubeAsArray)) + { + *pSlices = NextPow2(*pSlices); + } + + // normal 3D texture or arrays or cubemap has a thick mode? (Just pass unit test) + if (thickness > 1) + { + *pSlices = PowTwoAlign((*pSlices), sliceAlign); + } + + } + + HwlPadDimensions(tileMode, + bpp, + flags, + numSamples, + pTileInfo, + mipLevel, + pPitch, + pPitchAlign, + *pHeight, + heightAlign); +} + +/** +**************************************************************************************************** +* Lib::HwlPreHandleBaseLvl3xPitch +* +* @brief +* Pre-handler of 3x pitch (96 bit) adjustment +* +* @return +* Expected pitch +**************************************************************************************************** +*/ +UINT_32 Lib::HwlPreHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input + UINT_32 expPitch ///< [in] pitch + ) const +{ + ADDR_ASSERT(pIn->width == expPitch); + // + // If pitch is pre-multiplied by 3, we retrieve original one here to get correct miplevel size + // + if (ElemLib::IsExpand3x(pIn->format) && + pIn->mipLevel == 0 && + pIn->tileMode == ADDR_TM_LINEAR_ALIGNED) + { + expPitch /= 3; + expPitch = NextPow2(expPitch); + } + + return expPitch; +} + +/** +**************************************************************************************************** +* Lib::HwlPostHandleBaseLvl3xPitch +* +* @brief +* Post-handler of 3x pitch adjustment +* +* @return +* Expected pitch +**************************************************************************************************** +*/ +UINT_32 Lib::HwlPostHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input + UINT_32 expPitch ///< [in] pitch + ) const +{ + // + // 96 bits surface of sub levels require element pitch of 32 bits instead + // So we just return pitch in 32 bit pixels without timing 3 + // + if (ElemLib::IsExpand3x(pIn->format) && + pIn->mipLevel == 0 && + pIn->tileMode == ADDR_TM_LINEAR_ALIGNED) + { + expPitch *= 3; + } + + return expPitch; +} + +/** +**************************************************************************************************** +* Lib::IsMacroTiled +* +* @brief +* Check if the tile mode is macro tiled +* +* @return +* TRUE if it is macro tiled (2D/2B/3D/3B) +**************************************************************************************************** +*/ +BOOL_32 Lib::IsMacroTiled( + AddrTileMode tileMode) ///< [in] tile mode +{ + return ModeFlags[tileMode].isMacro; +} + +/** +**************************************************************************************************** +* Lib::IsMacro3dTiled +* +* @brief +* Check if the tile mode is 3D macro tiled +* +* @return +* TRUE if it is 3D macro tiled +**************************************************************************************************** +*/ +BOOL_32 Lib::IsMacro3dTiled( + AddrTileMode tileMode) ///< [in] tile mode +{ + return ModeFlags[tileMode].isMacro3d; +} + +/** +**************************************************************************************************** +* Lib::IsMicroTiled +* +* @brief +* Check if the tile mode is micro tiled +* +* @return +* TRUE if micro tiled +**************************************************************************************************** +*/ +BOOL_32 Lib::IsMicroTiled( + AddrTileMode tileMode) ///< [in] tile mode +{ + return ModeFlags[tileMode].isMicro; +} + +/** +**************************************************************************************************** +* Lib::IsLinear +* +* @brief +* Check if the tile mode is linear +* +* @return +* TRUE if linear +**************************************************************************************************** +*/ +BOOL_32 Lib::IsLinear( + AddrTileMode tileMode) ///< [in] tile mode +{ + return ModeFlags[tileMode].isLinear; +} + +/** +**************************************************************************************************** +* Lib::IsPrtNoRotationTileMode +* +* @brief +* Return TRUE if it is prt tile without rotation +* @note +* This function just used by CI +**************************************************************************************************** +*/ +BOOL_32 Lib::IsPrtNoRotationTileMode( + AddrTileMode tileMode) +{ + return ModeFlags[tileMode].isPrtNoRotation; +} + +/** +**************************************************************************************************** +* Lib::IsPrtTileMode +* +* @brief +* Return TRUE if it is prt tile +* @note +* This function just used by CI +**************************************************************************************************** +*/ +BOOL_32 Lib::IsPrtTileMode( + AddrTileMode tileMode) +{ + return ModeFlags[tileMode].isPrt; +} + +/** +**************************************************************************************************** +* Lib::ComputeMipLevel +* +* @brief +* Compute mipmap level width/height/slices +* @return +* N/A +**************************************************************************************************** +*/ +VOID Lib::ComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in,out] Input structure + ) const +{ + // Check if HWL has handled + BOOL_32 hwlHandled = FALSE; + (void)hwlHandled; + + if (ElemLib::IsBlockCompressed(pIn->format)) + { + if (pIn->mipLevel == 0) + { + // DXTn's level 0 must be multiple of 4 + // But there are exceptions: + // 1. Internal surface creation in hostblt/vsblt/etc... + // 2. Runtime doesn't reject ATI1/ATI2 whose width/height are not multiple of 4 + pIn->width = PowTwoAlign(pIn->width, 4); + pIn->height = PowTwoAlign(pIn->height, 4); + } + } + + hwlHandled = HwlComputeMipLevel(pIn); +} + +/** +**************************************************************************************************** +* Lib::DegradeTo1D +* +* @brief +* Check if surface can be degraded to 1D +* @return +* TRUE if degraded +**************************************************************************************************** +*/ +BOOL_32 Lib::DegradeTo1D( + UINT_32 width, ///< surface width + UINT_32 height, ///< surface height + UINT_32 macroTilePitchAlign, ///< macro tile pitch align + UINT_32 macroTileHeightAlign ///< macro tile height align + ) +{ + BOOL_32 degrade = ((width < macroTilePitchAlign) || (height < macroTileHeightAlign)); + + // Check whether 2D tiling still has too much footprint + if (degrade == FALSE) + { + // Only check width and height as slices are aligned to thickness + UINT_64 unalignedSize = width * height; + + UINT_32 alignedPitch = PowTwoAlign(width, macroTilePitchAlign); + UINT_32 alignedHeight = PowTwoAlign(height, macroTileHeightAlign); + UINT_64 alignedSize = alignedPitch * alignedHeight; + + // alignedSize > 1.5 * unalignedSize + if (2 * alignedSize > 3 * unalignedSize) + { + degrade = TRUE; + } + } + + return degrade; +} + +/** +**************************************************************************************************** +* Lib::OptimizeTileMode +* +* @brief +* Check if base level's tile mode can be optimized (degraded) +* @return +* N/A +**************************************************************************************************** +*/ +VOID Lib::OptimizeTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in, out] structure for surface info + ) const +{ + AddrTileMode tileMode = pInOut->tileMode; + + BOOL_32 doOpt = (pInOut->flags.opt4Space == TRUE) || + (pInOut->flags.minimizeAlignment == TRUE) || + (pInOut->maxBaseAlign != 0); + + BOOL_32 convertToPrt = FALSE; + + // Optimization can only be done on level 0 and samples <= 1 + if ((doOpt == TRUE) && + (pInOut->mipLevel == 0) && + (IsPrtTileMode(tileMode) == FALSE) && + (pInOut->flags.prt == FALSE)) + { + UINT_32 width = pInOut->width; + UINT_32 height = pInOut->height; + UINT_32 thickness = Thickness(tileMode); + BOOL_32 macroTiledOK = TRUE; + UINT_32 macroWidthAlign = 0; + UINT_32 macroHeightAlign = 0; + UINT_32 macroSizeAlign = 0; + + if (IsMacroTiled(tileMode)) + { + macroTiledOK = HwlGetAlignmentInfoMacroTiled(pInOut, + ¯oWidthAlign, + ¯oHeightAlign, + ¯oSizeAlign); + } + + if (macroTiledOK) + { + if ((pInOut->flags.display == FALSE) && + (pInOut->flags.opt4Space == TRUE) && + (pInOut->numSamples <= 1)) + { + // Check if linear mode is optimal + if ((pInOut->height == 1) && + (IsLinear(tileMode) == FALSE) && + (ElemLib::IsBlockCompressed(pInOut->format) == FALSE) && + (pInOut->flags.depth == FALSE) && + (pInOut->flags.stencil == FALSE) && + (m_configFlags.disableLinearOpt == FALSE) && + (pInOut->flags.disableLinearOpt == FALSE)) + { + tileMode = ADDR_TM_LINEAR_ALIGNED; + } + else if (IsMacroTiled(tileMode) && (pInOut->flags.tcCompatible == FALSE)) + { + if (DegradeTo1D(width, height, macroWidthAlign, macroHeightAlign)) + { + tileMode = (thickness == 1) ? + ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; + } + else if ((thickness > 1) && (pInOut->flags.disallowLargeThickDegrade == 0)) + { + // As in the following HwlComputeSurfaceInfo, thick modes may be degraded to + // thinner modes, we should re-evaluate whether the corresponding + // thinner modes should be degraded. If so, we choose 1D thick mode instead. + tileMode = DegradeLargeThickTile(pInOut->tileMode, pInOut->bpp); + + if (tileMode != pInOut->tileMode) + { + // Get thickness again after large thick degrade + thickness = Thickness(tileMode); + + ADDR_COMPUTE_SURFACE_INFO_INPUT input = *pInOut; + input.tileMode = tileMode; + + macroTiledOK = HwlGetAlignmentInfoMacroTiled(&input, + ¯oWidthAlign, + ¯oHeightAlign, + ¯oSizeAlign); + + if (macroTiledOK && + DegradeTo1D(width, height, macroWidthAlign, macroHeightAlign)) + { + tileMode = ADDR_TM_1D_TILED_THICK; + } + } + } + } + } + + if (macroTiledOK) + { + if ((pInOut->flags.minimizeAlignment == TRUE) && + (pInOut->numSamples <= 1) && + (IsMacroTiled(tileMode) == TRUE)) + { + UINT_32 macroSize = PowTwoAlign(width, macroWidthAlign) * + PowTwoAlign(height, macroHeightAlign); + UINT_32 microSize = PowTwoAlign(width, MicroTileWidth) * + PowTwoAlign(height, MicroTileHeight); + + if (macroSize > microSize) + { + tileMode = (thickness == 1) ? + ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; + } + } + + if ((pInOut->maxBaseAlign != 0) && + (IsMacroTiled(tileMode) == TRUE)) + { + if (macroSizeAlign > pInOut->maxBaseAlign) + { + if (pInOut->numSamples > 1) + { + ADDR_ASSERT(pInOut->maxBaseAlign >= Block64K); + + convertToPrt = TRUE; + } + else if (pInOut->maxBaseAlign < Block64K) + { + tileMode = (thickness == 1) ? + ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; + } + else + { + convertToPrt = TRUE; + } + } + } + } + } + } + + if (convertToPrt) + { + if ((pInOut->flags.matchStencilTileCfg == TRUE) && (pInOut->numSamples <= 1)) + { + pInOut->tileMode = ADDR_TM_1D_TILED_THIN1; + } + else + { + HwlSetPrtTileMode(pInOut); + } + } + else if (tileMode != pInOut->tileMode) + { + pInOut->tileMode = tileMode; + } + + HwlOptimizeTileMode(pInOut); +} + +/** +**************************************************************************************************** +* Lib::DegradeLargeThickTile +* +* @brief +* Check if the thickness needs to be reduced if a tile is too large +* @return +* The degraded tile mode (unchanged if not degraded) +**************************************************************************************************** +*/ +AddrTileMode Lib::DegradeLargeThickTile( + AddrTileMode tileMode, + UINT_32 bpp) const +{ + // Override tilemode + // When tile_width (8) * tile_height (8) * thickness * element_bytes is > row_size, + // it is better to just use THIN mode in this case + UINT_32 thickness = Thickness(tileMode); + + if (thickness > 1 && m_configFlags.allowLargeThickTile == 0) + { + UINT_32 tileSize = MicroTilePixels * thickness * (bpp >> 3); + + if (tileSize > m_rowSize) + { + switch (tileMode) + { + case ADDR_TM_2D_TILED_XTHICK: + if ((tileSize >> 1) <= m_rowSize) + { + tileMode = ADDR_TM_2D_TILED_THICK; + break; + } + // else fall through + case ADDR_TM_2D_TILED_THICK: + tileMode = ADDR_TM_2D_TILED_THIN1; + break; + + case ADDR_TM_3D_TILED_XTHICK: + if ((tileSize >> 1) <= m_rowSize) + { + tileMode = ADDR_TM_3D_TILED_THICK; + break; + } + // else fall through + case ADDR_TM_3D_TILED_THICK: + tileMode = ADDR_TM_3D_TILED_THIN1; + break; + + case ADDR_TM_PRT_TILED_THICK: + tileMode = ADDR_TM_PRT_TILED_THIN1; + break; + + case ADDR_TM_PRT_2D_TILED_THICK: + tileMode = ADDR_TM_PRT_2D_TILED_THIN1; + break; + + case ADDR_TM_PRT_3D_TILED_THICK: + tileMode = ADDR_TM_PRT_3D_TILED_THIN1; + break; + + default: + break; + } + } + } + + return tileMode; +} + +/** +**************************************************************************************************** +* Lib::PostComputeMipLevel +* @brief +* Compute MipLevel info (including level 0) after surface adjustment +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::PostComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in,out] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] Output structure + ) const +{ + // Mipmap including level 0 must be pow2 padded since either SI hw expects so or it is + // required by CFX for Hw Compatibility between NI and SI. Otherwise it is only needed for + // mipLevel > 0. Any h/w has different requirement should implement its own virtual function + + if (pIn->flags.pow2Pad) + { + pIn->width = NextPow2(pIn->width); + pIn->height = NextPow2(pIn->height); + pIn->numSlices = NextPow2(pIn->numSlices); + } + else if (pIn->mipLevel > 0) + { + pIn->width = NextPow2(pIn->width); + pIn->height = NextPow2(pIn->height); + + if (!pIn->flags.cube) + { + pIn->numSlices = NextPow2(pIn->numSlices); + } + + // for cubemap, we keep its value at first + } + + return ADDR_OK; +} + +/** +**************************************************************************************************** +* Lib::HwlSetupTileCfg +* +* @brief +* Map tile index to tile setting. +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::HwlSetupTileCfg( + UINT_32 bpp, ///< Bits per pixel + INT_32 index, ///< [in] Tile index + INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) + ADDR_TILEINFO* pInfo, ///< [out] Tile Info + AddrTileMode* pMode, ///< [out] Tile mode + AddrTileType* pType ///< [out] Tile type + ) const +{ + return ADDR_NOTSUPPORTED; +} + +/** +**************************************************************************************************** +* Lib::HwlGetPipes +* +* @brief +* Get number pipes +* @return +* num pipes +**************************************************************************************************** +*/ +UINT_32 Lib::HwlGetPipes( + const ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + //pTileInfo can be NULL when asic is 6xx and 8xx. + return m_pipes; +} + +/** +**************************************************************************************************** +* Lib::ComputeQbStereoInfo +* +* @brief +* Get quad buffer stereo information +* @return +* N/A +**************************************************************************************************** +*/ +VOID Lib::ComputeQbStereoInfo( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in,out] updated pOut+pStereoInfo + ) const +{ + ADDR_ASSERT(pOut->bpp >= 8); + ADDR_ASSERT((pOut->surfSize % pOut->baseAlign) == 0); + + // Save original height + pOut->pStereoInfo->eyeHeight = pOut->height; + + // Right offset + pOut->pStereoInfo->rightOffset = static_cast(pOut->surfSize); + + pOut->pStereoInfo->rightSwizzle = HwlComputeQbStereoRightSwizzle(pOut); + // Double height + pOut->height <<= 1; + pOut->pixelHeight <<= 1; + + // Double size + pOut->surfSize <<= 1; + + // Right start address meets the base align since it is guaranteed by AddrLib1 + + // 1D surface on SI may break this rule, but we can force it to meet by checking .qbStereo. +} + +/** +**************************************************************************************************** +* Lib::ComputePrtInfo +* +* @brief +* Compute prt surface related info +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE Lib::ComputePrtInfo( + const ADDR_PRT_INFO_INPUT* pIn, + ADDR_PRT_INFO_OUTPUT* pOut) const +{ + ADDR_ASSERT(pOut != NULL); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + UINT_32 expandX = 1; + UINT_32 expandY = 1; + ElemMode elemMode; + + UINT_32 bpp = GetElemLib()->GetBitsPerPixel(pIn->format, + &elemMode, + &expandX, + &expandY); + + if (bpp <8 || bpp == 24 || bpp == 48 || bpp == 96) + { + returnCode = ADDR_INVALIDPARAMS; + } + + UINT_32 numFrags = pIn->numFrags; + ADDR_ASSERT(numFrags <= 8); + + UINT_32 tileWidth = 0; + UINT_32 tileHeight = 0; + if (returnCode == ADDR_OK) + { + // 3D texture without depth or 2d texture + if (pIn->baseMipDepth > 1 || pIn->baseMipHeight > 1) + { + if (bpp == 8) + { + tileWidth = 256; + tileHeight = 256; + } + else if (bpp == 16) + { + tileWidth = 256; + tileHeight = 128; + } + else if (bpp == 32) + { + tileWidth = 128; + tileHeight = 128; + } + else if (bpp == 64) + { + // assume it is BC1/4 + tileWidth = 512; + tileHeight = 256; + + if (elemMode == ADDR_UNCOMPRESSED) + { + tileWidth = 128; + tileHeight = 64; + } + } + else if (bpp == 128) + { + // assume it is BC2/3/5/6H/7 + tileWidth = 256; + tileHeight = 256; + + if (elemMode == ADDR_UNCOMPRESSED) + { + tileWidth = 64; + tileHeight = 64; + } + } + + if (numFrags == 2) + { + tileWidth = tileWidth / 2; + } + else if (numFrags == 4) + { + tileWidth = tileWidth / 2; + tileHeight = tileHeight / 2; + } + else if (numFrags == 8) + { + tileWidth = tileWidth / 4; + tileHeight = tileHeight / 2; + } + } + else // 1d + { + tileHeight = 1; + if (bpp == 8) + { + tileWidth = 65536; + } + else if (bpp == 16) + { + tileWidth = 32768; + } + else if (bpp == 32) + { + tileWidth = 16384; + } + else if (bpp == 64) + { + tileWidth = 8192; + } + else if (bpp == 128) + { + tileWidth = 4096; + } + } + } + + pOut->prtTileWidth = tileWidth; + pOut->prtTileHeight = tileHeight; + + return returnCode; +} + +} // V1 +} // Addr diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.h new file mode 100644 index 0000000000..5411d1c1a8 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib1.h @@ -0,0 +1,544 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrlib1.h +* @brief Contains the Addr::V1::Lib class definition. +**************************************************************************************************** +*/ + +#ifndef __ADDR_LIB1_H__ +#define __ADDR_LIB1_H__ + +#include "addrlib.h" + +namespace Addr +{ +namespace V1 +{ + +/** +**************************************************************************************************** +* @brief Neutral enums that define bank swap size +**************************************************************************************************** +*/ +enum SampleSplitSize +{ + ADDR_SAMPLESPLIT_1KB = 1024, + ADDR_SAMPLESPLIT_2KB = 2048, + ADDR_SAMPLESPLIT_4KB = 4096, + ADDR_SAMPLESPLIT_8KB = 8192, +}; + +/** +**************************************************************************************************** +* @brief Flags for AddrTileMode +**************************************************************************************************** +*/ +struct TileModeFlags +{ + UINT_32 thickness : 4; + UINT_32 isLinear : 1; + UINT_32 isMicro : 1; + UINT_32 isMacro : 1; + UINT_32 isMacro3d : 1; + UINT_32 isPrt : 1; + UINT_32 isPrtNoRotation : 1; + UINT_32 isBankSwapped : 1; +}; + +static const UINT_32 Block64K = 0x10000; +static const UINT_32 PrtTileSize = Block64K; + +/** +**************************************************************************************************** +* @brief This class contains asic independent address lib functionalities +**************************************************************************************************** +*/ +class Lib : public Addr::Lib +{ +public: + virtual ~Lib(); + + static Lib* GetLib( + ADDR_HANDLE hLib); + + /// Returns tileIndex support + BOOL_32 UseTileIndex(INT_32 index) const + { + return m_configFlags.useTileIndex && (index != TileIndexInvalid); + } + + /// Returns combined swizzle support + BOOL_32 UseCombinedSwizzle() const + { + return m_configFlags.useCombinedSwizzle; + } + + // + // Interface stubs + // + ADDR_E_RETURNCODE ComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE CombineBankPipeSwizzle( + const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ConvertTileIndex( + const ADDR_CONVERT_TILEINDEX_INPUT* pIn, + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE GetMacroModeIndex( + const ADDR_GET_MACROMODEINDEX_INPUT* pIn, + ADDR_GET_MACROMODEINDEX_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ConvertTileIndex1( + const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE GetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeHtileInfo( + const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeCmaskInfo( + const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeHtileAddrFromCoord( + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeHtileCoordFromAddr( + const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr( + const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputePrtInfo( + const ADDR_PRT_INFO_INPUT* pIn, + ADDR_PRT_INFO_OUTPUT* pOut) const; +protected: + Lib(); // Constructor is protected + Lib(const Client* pClient); + + /// Pure Virtual function for Hwl computing surface info + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl computing surface address from coord + virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl computing surface coord from address + virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl computing surface tile swizzle + virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b + virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl combining bank/pipe swizzle + virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, + UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0; + + /// Pure Virtual function for Hwl computing base swizzle + virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl computing HTILE base align + virtual UINT_32 HwlComputeHtileBaseAlign( + BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0; + + /// Pure Virtual function for Hwl computing HTILE bpp + virtual UINT_32 HwlComputeHtileBpp( + BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0; + + /// Pure Virtual function for Hwl computing HTILE bytes + virtual UINT_64 HwlComputeHtileBytes( + UINT_32 pitch, UINT_32 height, UINT_32 bpp, + BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0; + + /// Pure Virtual function for Hwl computing FMASK info + virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0; + + /// Pure Virtual function for Hwl FMASK address from coord + virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl FMASK coord from address + virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl convert tile info from real value to HW value + virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl compute mipmap info + virtual BOOL_32 HwlComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0; + + /// Pure Virtual function for Hwl compute max cmask blockMax value + virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0; + + /// Pure Virtual function for Hwl compute fmask bits + virtual UINT_32 HwlComputeFmaskBits( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + UINT_32* pNumSamples) const = 0; + + /// Virtual function to get index (not pure then no need to implement this in all hwls + virtual ADDR_E_RETURNCODE HwlGetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) const + { + return ADDR_NOTSUPPORTED; + } + + /// Virtual function for Hwl to compute Dcc info + virtual ADDR_E_RETURNCODE HwlComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const + { + return ADDR_NOTSUPPORTED; + } + + /// Virtual function to get cmask address for tc compatible cmask + virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const + { + return ADDR_NOTSUPPORTED; + } + + /// Virtual function to get htile address for tc compatible htile + virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const + { + return ADDR_NOTSUPPORTED; + } + + // Compute attributes + + // HTILE + UINT_32 ComputeHtileInfo( + ADDR_HTILE_FLAGS flags, + UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, + BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, + ADDR_TILEINFO* pTileInfo, + UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes, + UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL, + UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const; + + // CMASK + ADDR_E_RETURNCODE ComputeCmaskInfo( + ADDR_CMASK_FLAGS flags, + UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear, + ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes, + UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL, + UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const; + + virtual VOID HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, UINT_32* pMacroHeight, + UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; + + // CMASK & HTILE addressing + virtual UINT_64 HwlComputeXmaskAddrFromCoord( + UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, + UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, + BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, + UINT_32* bitPosition) const; + + virtual VOID HwlComputeXmaskCoordFromAddr( + UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, + UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, + ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; + + // Surface mipmap + VOID ComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + /// Pure Virtual function for Hwl to get macro tiled alignment info + virtual BOOL_32 HwlGetAlignmentInfoMacroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const = 0; + + virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const + { + // not supported in hwl layer + } + + virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const + { + // not supported in hwl layer + } + + virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const + { + // not supported in hwl layer + } + + AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const; + + VOID PadDimensions( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, + UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32* pHeight, UINT_32 heightAlign, + UINT_32* pSlices, UINT_32 sliceAlign) const; + + virtual VOID HwlPadDimensions( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel, + UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32 height, UINT_32 heightAlign) const + { + } + + // + // Addressing shared for linear/1D tiling + // + UINT_64 ComputeSurfaceAddrFromCoordLinear( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, + UINT_32* pBitPosition) const; + + VOID ComputeSurfaceCoordFromAddrLinear( + UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp, + UINT_32 pitch, UINT_32 height, UINT_32 numSlices, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; + + VOID ComputeSurfaceCoordFromAddrMicroTiled( + UINT_64 addr, UINT_32 bitPosition, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, + AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; + + ADDR_E_RETURNCODE ComputeMicroTileEquation( + UINT_32 bpp, AddrTileMode tileMode, + AddrTileType microTileType, ADDR_EQUATION* pEquation) const; + + UINT_32 ComputePixelIndexWithinMicroTile( + UINT_32 x, UINT_32 y, UINT_32 z, + UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const; + + /// Pure Virtual function for Hwl computing coord from offset inside micro tile + virtual VOID HwlComputePixelCoordFromOffset( + UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, + AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0; + + // + // Addressing shared by all + // + virtual UINT_32 HwlGetPipes( + const ADDR_TILEINFO* pTileInfo) const; + + UINT_32 ComputePipeFromAddr( + UINT_64 addr, UINT_32 numPipes) const; + + virtual ADDR_E_RETURNCODE ComputePipeEquation( + UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const + { + return ADDR_NOTSUPPORTED; + } + + /// Pure Virtual function for Hwl computing pipe from coord + virtual UINT_32 ComputePipeFromCoord( + UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode, + UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0; + + /// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile + virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( + UINT_32 pipe, UINT_32 x) const = 0; + + // + // Misc helper + // + static const TileModeFlags ModeFlags[ADDR_TM_COUNT]; + + static UINT_32 Thickness( + AddrTileMode tileMode); + + // Checking tile mode + static BOOL_32 IsMacroTiled(AddrTileMode tileMode); + static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode); + static BOOL_32 IsLinear(AddrTileMode tileMode); + static BOOL_32 IsMicroTiled(AddrTileMode tileMode); + static BOOL_32 IsPrtTileMode(AddrTileMode tileMode); + static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode); + + /// Return TRUE if tile info is needed + BOOL_32 UseTileInfo() const + { + return !m_configFlags.ignoreTileInfo; + } + + /// Adjusts pitch alignment for flipping surface + VOID AdjustPitchAlignment( + ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const; + + /// Overwrite tile config according to tile index + virtual ADDR_E_RETURNCODE HwlSetupTileCfg( + UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, + ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const; + + /// Overwrite macro tile config according to tile index + virtual INT_32 HwlComputeMacroModeIndex( + INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, + ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL + ) const + { + return TileIndexNoMacroIndex; + } + + /// Pre-handler of 3x pitch (96 bit) adjustment + virtual UINT_32 HwlPreHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; + /// Post-handler of 3x pitch adjustment + virtual UINT_32 HwlPostHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; + /// Check miplevel after surface adjustment + ADDR_E_RETURNCODE PostComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + /// Quad buffer stereo support, has its implementation in ind. layer + VOID ComputeQbStereoInfo( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + /// Pure virutual function to compute stereo bank swizzle for right eye + virtual UINT_32 HwlComputeQbStereoRightSwizzle( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; + + VOID OptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; + + /// Overwrite tile setting to PRT + virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const + { + } + + static BOOL_32 DegradeTo1D( + UINT_32 width, UINT_32 height, + UINT_32 macroTilePitchAlign, UINT_32 macroTileHeightAlign); + +private: + // Disallow the copy constructor + Lib(const Lib& a); + + // Disallow the assignment operator + Lib& operator=(const Lib& a); + + UINT_32 ComputeCmaskBaseAlign( + ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const; + + UINT_64 ComputeCmaskBytes( + UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const; + + // + // CMASK/HTILE shared methods + // + VOID ComputeTileDataWidthAndHeight( + UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo, + UINT_32* pMacroWidth, UINT_32* pMacroHeight) const; + + UINT_32 ComputeXmaskCoordYFromPipe( + UINT_32 pipe, UINT_32 x) const; +}; + +} // V1 +} // Addr + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.cpp new file mode 100644 index 0000000000..0007e2b9fb --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.cpp @@ -0,0 +1,1985 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +************************************************************************************************************************ +* @file addrlib2.cpp +* @brief Contains the implementation for the AddrLib2 base class. +************************************************************************************************************************ +*/ + +#include "addrinterface.h" +#include "addrlib2.h" +#include "addrcommon.h" + +namespace Addr +{ +namespace V2 +{ + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Static Const Member +//////////////////////////////////////////////////////////////////////////////////////////////////// + +const Dim2d Lib::Block256_2d[] = {{16, 16}, {16, 8}, {8, 8}, {8, 4}, {4, 4}}; + +const Dim3d Lib::Block1K_3d[] = {{16, 8, 8}, {8, 8, 8}, {8, 8, 4}, {8, 4, 4}, {4, 4, 4}}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Constructor/Destructor +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +************************************************************************************************************************ +* Lib::Lib +* +* @brief +* Constructor for the Addr::V2::Lib class +* +************************************************************************************************************************ +*/ +Lib::Lib() + : + Addr::Lib(), + m_se(0), + m_rbPerSe(0), + m_maxCompFrag(0), + m_banksLog2(0), + m_pipesLog2(0), + m_seLog2(0), + m_rbPerSeLog2(0), + m_maxCompFragLog2(0), + m_pipeInterleaveLog2(0), + m_blockVarSizeLog2(0), + m_numEquations(0) +{ +} + +/** +************************************************************************************************************************ +* Lib::Lib +* +* @brief +* Constructor for the AddrLib2 class with hClient as parameter +* +************************************************************************************************************************ +*/ +Lib::Lib(const Client* pClient) + : + Addr::Lib(pClient), + m_se(0), + m_rbPerSe(0), + m_maxCompFrag(0), + m_banksLog2(0), + m_pipesLog2(0), + m_seLog2(0), + m_rbPerSeLog2(0), + m_maxCompFragLog2(0), + m_pipeInterleaveLog2(0), + m_blockVarSizeLog2(0), + m_numEquations(0) +{ +} + +/** +************************************************************************************************************************ +* Lib::~Lib +* +* @brief +* Destructor for the AddrLib2 class +* +************************************************************************************************************************ +*/ +Lib::~Lib() +{ +} + +/** +************************************************************************************************************************ +* Lib::GetLib +* +* @brief +* Get Addr::V2::Lib pointer +* +* @return +* An Addr::V2::Lib class pointer +************************************************************************************************************************ +*/ +Lib* Lib::GetLib( + ADDR_HANDLE hLib) ///< [in] handle of ADDR_HANDLE +{ + Addr::Lib* pAddrLib = Addr::Lib::GetLib(hLib); + if ((pAddrLib != NULL) && + (pAddrLib->GetChipFamily() <= ADDR_CHIP_FAMILY_VI)) + { + // only valid and GFX9+ ASIC can use AddrLib2 function. + ADDR_ASSERT_ALWAYS(); + hLib = NULL; + } + return static_cast(hLib); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface Methods +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceInfo +* +* @brief +* Interface function stub of AddrComputeSurfaceInfo. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR2_COMPUTE_SURFACE_INFO_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_SURFACE_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + // Adjust coming parameters. + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = *pIn; + localIn.width = Max(pIn->width, 1u); + localIn.height = Max(pIn->height, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + localIn.numFrags = (localIn.numFrags == 0) ? localIn.numSamples : pIn->numFrags; + + UINT_32 expandX = 1; + UINT_32 expandY = 1; + ElemMode elemMode = ADDR_UNCOMPRESSED; + + if (returnCode == ADDR_OK) + { + // Set format to INVALID will skip this conversion + if (localIn.format != ADDR_FMT_INVALID) + { + // Get compression/expansion factors and element mode which indicates compression/expansion + localIn.bpp = GetElemLib()->GetBitsPerPixel(localIn.format, + &elemMode, + &expandX, + &expandY); + + // Special flag for 96 bit surface. 96 (or 48 if we support) bit surface's width is + // pre-multiplied by 3 and bpp is divided by 3. So pitch alignment for linear- + // aligned does not meet 64-pixel in real. We keep special handling in hwl since hw + // restrictions are different. + // Also Mip 1+ needs an element pitch of 32 bits so we do not need this workaround + // but we use this flag to skip RestoreSurfaceInfo below + + if ((elemMode == ADDR_EXPANDED) && (expandX > 1)) + { + ADDR_ASSERT(IsLinear(localIn.swizzleMode)); + } + + UINT_32 basePitch = 0; + GetElemLib()->AdjustSurfaceInfo(elemMode, + expandX, + expandY, + &localIn.bpp, + &basePitch, + &localIn.width, + &localIn.height); + + // Overwrite these parameters if we have a valid format + } + + if (localIn.bpp != 0) + { + localIn.width = Max(localIn.width, 1u); + localIn.height = Max(localIn.height, 1u); + } + else // Rule out some invalid parameters + { + ADDR_ASSERT_ALWAYS(); + + returnCode = ADDR_INVALIDPARAMS; + } + } + + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfoSanityCheck(&localIn); + } + + if (returnCode == ADDR_OK) + { + VerifyMipLevelInfo(pIn); + + if (IsLinear(pIn->swizzleMode)) + { + // linear mode + returnCode = ComputeSurfaceInfoLinear(&localIn, pOut); + } + else + { + // tiled mode + returnCode = ComputeSurfaceInfoTiled(&localIn, pOut); + } + + if (returnCode == ADDR_OK) + { + pOut->bpp = localIn.bpp; + pOut->pixelPitch = pOut->pitch; + pOut->pixelHeight = pOut->height; + pOut->pixelMipChainPitch = pOut->mipChainPitch; + pOut->pixelMipChainHeight = pOut->mipChainHeight; + pOut->pixelBits = localIn.bpp; + + if (localIn.format != ADDR_FMT_INVALID) + { + UINT_32 pixelBits = pOut->pixelBits; + + GetElemLib()->RestoreSurfaceInfo(elemMode, + expandX, + expandY, + &pOut->pixelBits, + &pOut->pixelPitch, + &pOut->pixelHeight); + + GetElemLib()->RestoreSurfaceInfo(elemMode, + expandX, + expandY, + &pixelBits, + &pOut->pixelMipChainPitch, + &pOut->pixelMipChainHeight); + + if ((localIn.numMipLevels > 1) && (pOut->pMipInfo != NULL)) + { + for (UINT_32 i = 0; i < localIn.numMipLevels; i++) + { + pOut->pMipInfo[i].pixelPitch = pOut->pMipInfo[i].pitch; + pOut->pMipInfo[i].pixelHeight = pOut->pMipInfo[i].height; + + GetElemLib()->RestoreSurfaceInfo(elemMode, + expandX, + expandY, + &pixelBits, + &pOut->pMipInfo[i].pixelPitch, + &pOut->pMipInfo[i].pixelHeight); + } + } + } + + if (localIn.flags.needEquation && (Log2(localIn.numFrags) == 0)) + { + pOut->equationIndex = GetEquationIndex(&localIn, pOut); + } + + if (localIn.flags.qbStereo) + { + if (pOut->pStereoInfo != NULL) + { + ComputeQbStereoInfo(pOut); + } + } + } + } + + ADDR_ASSERT(pOut->surfSize != 0); + + ValidBaseAlignments(pOut->baseAlign); + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceInfo +* +* @brief +* Interface function stub of AddrComputeSurfaceInfo. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceAddrFromCoord( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT localIn = *pIn; + localIn.unalignedWidth = Max(pIn->unalignedWidth, 1u); + localIn.unalignedHeight = Max(pIn->unalignedHeight, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + localIn.numFrags = Max(pIn->numFrags, 1u); + + if ((localIn.bpp < 8) || + (localIn.bpp > 128) || + ((localIn.bpp % 8) != 0) || + (localIn.sample >= localIn.numSamples) || + (localIn.slice >= localIn.numSlices) || + (localIn.mipId >= localIn.numMipLevels) || + (IsTex3d(localIn.resourceType) && + (Valid3DMipSliceIdConstraint(localIn.numSlices, localIn.mipId, localIn.slice) == FALSE))) + { + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + if (IsLinear(localIn.swizzleMode)) + { + returnCode = ComputeSurfaceAddrFromCoordLinear(&localIn, pOut); + } + else + { + returnCode = ComputeSurfaceAddrFromCoordTiled(&localIn, pOut); + } + + if (returnCode == ADDR_OK) + { + pOut->prtBlockIndex = static_cast(pOut->addr / (64 * 1024)); + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceCoordFromAddr +* +* @brief +* Interface function stub of ComputeSurfaceCoordFromAddr. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceCoordFromAddr( + const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if ((pIn->bpp < 8) || + (pIn->bpp > 128) || + ((pIn->bpp % 8) != 0) || + (pIn->bitPosition >= 8)) + { + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + if (IsLinear(pIn->swizzleMode)) + { + returnCode = ComputeSurfaceCoordFromAddrLinear(pIn, pOut); + } + else + { + returnCode = ComputeSurfaceCoordFromAddrTiled(pIn, pOut); + } + } + + return returnCode; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// CMASK/HTILE +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +************************************************************************************************************************ +* Lib::ComputeHtileInfo +* +* @brief +* Interface function stub of AddrComputeHtilenfo +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeHtileInfo( + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_HTILE_INFO_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_HTILE_INFO_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeHtileInfo(pIn, pOut); + + ValidMetaBaseAlignments(pOut->baseAlign); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeHtileAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeHtileAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeHtileAddrFromCoord( + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeHtileAddrFromCoord(pIn, pOut); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeHtileCoordFromAddr +* +* @brief +* Interface function stub of AddrComputeHtileCoordFromAddr +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeHtileCoordFromAddr( + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeHtileCoordFromAddr(pIn, pOut); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeCmaskInfo +* +* @brief +* Interface function stub of AddrComputeCmaskInfo +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeCmaskInfo( + const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_CMASK_INFO_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_CMASK_INFO_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else if (pIn->cMaskFlags.linear) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeCmaskInfo(pIn, pOut); + + ValidMetaBaseAlignments(pOut->baseAlign); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeCmaskAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeCmaskAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeCmaskAddrFromCoord( + const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeCmaskAddrFromCoord(pIn, pOut); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeCmaskCoordFromAddr +* +* @brief +* Interface function stub of AddrComputeCmaskCoordFromAddr +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeCmaskCoordFromAddr( + const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_NOTIMPLEMENTED; + + ADDR_NOT_IMPLEMENTED(); + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeFmaskInfo +* +* @brief +* Interface function stub of ComputeFmaskInfo. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeFmaskInfo( + const ADDR2_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) +{ + ADDR_E_RETURNCODE returnCode; + + BOOL_32 valid = (IsZOrderSwizzle(pIn->swizzleMode) == TRUE) && + ((pIn->numSamples > 0) || (pIn->numFrags > 0)); + + if (GetFillSizeFieldsFlags()) + { + if ((pIn->size != sizeof(ADDR2_COMPUTE_FMASK_INFO_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_FMASK_INFO_OUTPUT))) + { + valid = FALSE; + } + } + + if (valid == FALSE) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + + localIn.size = sizeof(ADDR2_COMPUTE_SURFACE_INFO_INPUT); + localOut.size = sizeof(ADDR2_COMPUTE_SURFACE_INFO_OUTPUT); + + localIn.swizzleMode = pIn->swizzleMode; + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.width = Max(pIn->unalignedWidth, 1u); + localIn.height = Max(pIn->unalignedHeight, 1u); + localIn.bpp = GetFmaskBpp(pIn->numSamples, pIn->numFrags); + localIn.flags.fmask = 1; + localIn.numFrags = 1; + localIn.numSamples = 1; + localIn.resourceType = ADDR_RSRC_TEX_2D; + + if (localIn.bpp == 8) + { + localIn.format = ADDR_FMT_8; + } + else if (localIn.bpp == 16) + { + localIn.format = ADDR_FMT_16; + } + else if (localIn.bpp == 32) + { + localIn.format = ADDR_FMT_32; + } + else + { + localIn.format = ADDR_FMT_32_32; + } + + returnCode = ComputeSurfaceInfo(&localIn, &localOut); + + if (returnCode == ADDR_OK) + { + pOut->pitch = localOut.pitch; + pOut->height = localOut.height; + pOut->baseAlign = localOut.baseAlign; + pOut->numSlices = localOut.numSlices; + pOut->fmaskBytes = static_cast(localOut.surfSize); + pOut->sliceSize = static_cast(localOut.sliceSize); + pOut->bpp = localIn.bpp; + pOut->numSamples = 1; + } + } + + ValidBaseAlignments(pOut->baseAlign); + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeFmaskAddrFromCoord +* +* @brief +* Interface function stub of ComputeFmaskAddrFromCoord. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeFmaskAddrFromCoord( + const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_NOTIMPLEMENTED; + + ADDR_NOT_IMPLEMENTED(); + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeFmaskCoordFromAddr +* +* @brief +* Interface function stub of ComputeFmaskAddrFromCoord. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeFmaskCoordFromAddr( + const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_NOTIMPLEMENTED; + + ADDR_NOT_IMPLEMENTED(); + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeDccInfo +* +* @brief +* Interface function to compute DCC key info +* +* @return +* return code of HwlComputeDccInfo +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeDccInfo( + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_DCCINFO_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_DCCINFO_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeDccInfo(pIn, pOut); + + ValidMetaBaseAlignments(pOut->dccRamBaseAlign); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeDccAddrFromCoord +* +* @brief +* Interface function stub of ComputeDccAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeDccAddrFromCoord(pIn, pOut); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputePipeBankXor +* +* @brief +* Interface function stub of Addr2ComputePipeBankXor. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputePipeBankXor( + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_PIPEBANKXOR_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputePipeBankXor(pIn, pOut); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSlicePipeBankXor +* +* @brief +* Interface function stub of Addr2ComputeSlicePipeBankXor. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSlicePipeBankXor( + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else if ((IsThin(pIn->resourceType, pIn->swizzleMode) == FALSE) || + (IsNonPrtXor(pIn->swizzleMode) == FALSE) || + (pIn->numSamples > 1)) + { + returnCode = ADDR_NOTSUPPORTED; + } + else + { + returnCode = HwlComputeSlicePipeBankXor(pIn, pOut); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSubResourceOffsetForSwizzlePattern +* +* @brief +* Interface function stub of Addr2ComputeSubResourceOffsetForSwizzlePattern. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSubResourceOffsetForSwizzlePattern( + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT)) || + (pOut->size != sizeof(ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeSubResourceOffsetForSwizzlePattern(pIn, pOut); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ExtractPipeBankXor +* +* @brief +* Internal function to extract bank and pipe xor bits from combined xor bits. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ExtractPipeBankXor( + UINT_32 pipeBankXor, + UINT_32 bankBits, + UINT_32 pipeBits, + UINT_32* pBankX, + UINT_32* pPipeX) +{ + ADDR_E_RETURNCODE returnCode; + + if (pipeBankXor < (1u << (pipeBits + bankBits))) + { + *pPipeX = pipeBankXor % (1 << pipeBits); + *pBankX = pipeBankXor >> pipeBits; + returnCode = ADDR_OK; + } + else + { + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceInfoSanityCheck +* +* @brief +* Internal function to do basic sanity check before compute surface info +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceInfoSanityCheck( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in] input structure + ) const +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + (pIn->size != sizeof(ADDR2_COMPUTE_SURFACE_INFO_INPUT))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlComputeSurfaceInfoSanityCheck(pIn); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ApplyCustomizedPitchHeight +* +* @brief +* Helper function to override hw required row pitch/slice pitch by customrized one +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ApplyCustomizedPitchHeight( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + UINT_32 elementBytes, ///< [in] element bytes per element + UINT_32 pitchAlignInElement, ///< [in] pitch alignment in element + UINT_32* pPitch, ///< [in/out] pitch + UINT_32* pHeight ///< [in/out] height + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numMipLevels <= 1) + { + if (pIn->pitchInElement > 0) + { + if ((pIn->pitchInElement % pitchAlignInElement) != 0) + { + returnCode = ADDR_INVALIDPARAMS; + } + else if (pIn->pitchInElement < (*pPitch)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + *pPitch = pIn->pitchInElement; + } + } + + if (returnCode == ADDR_OK) + { + if (pIn->sliceAlign > 0) + { + UINT_32 customizedHeight = pIn->sliceAlign / elementBytes / (*pPitch); + + if (customizedHeight * elementBytes * (*pPitch) != pIn->sliceAlign) + { + returnCode = ADDR_INVALIDPARAMS; + } + else if ((pIn->numSlices > 1) && ((*pHeight) != customizedHeight)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + *pHeight = customizedHeight; + } + } + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceInfoLinear +* +* @brief +* Internal function to calculate alignment for linear swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceInfoLinear( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + return HwlComputeSurfaceInfoLinear(pIn, pOut); +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceInfoTiled +* +* @brief +* Internal function to calculate alignment for tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceInfoTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + return HwlComputeSurfaceInfoTiled(pIn, pOut); +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceAddrFromCoordLinear +* +* @brief +* Internal function to calculate address from coord for linear swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceAddrFromCoordLinear( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + BOOL_32 valid = (pIn->numSamples <= 1) && (pIn->numFrags <= 1) && (pIn->pipeBankXor == 0); + + if (valid) + { + if (IsTex1d(pIn->resourceType)) + { + valid = (pIn->y == 0); + } + } + + if (valid) + { + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels]; + + localIn.bpp = pIn->bpp; + localIn.flags = pIn->flags; + localIn.width = Max(pIn->unalignedWidth, 1u); + localIn.height = Max(pIn->unalignedHeight, 1u); + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.resourceType = pIn->resourceType; + + if (localIn.numMipLevels <= 1) + { + localIn.pitchInElement = pIn->pitchInElement; + } + + localOut.pMipInfo = mipInfo; + + returnCode = ComputeSurfaceInfoLinear(&localIn, &localOut); + + if (returnCode == ADDR_OK) + { + pOut->addr = (localOut.sliceSize * pIn->slice) + + mipInfo[pIn->mipId].offset + + (pIn->y * mipInfo[pIn->mipId].pitch + pIn->x) * (pIn->bpp >> 3); + pOut->bitPosition = 0; + } + else + { + valid = FALSE; + } + } + + if (valid == FALSE) + { + returnCode = ADDR_INVALIDPARAMS; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceAddrFromCoordTiled +* +* @brief +* Internal function to calculate address from coord for tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceAddrFromCoordTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + return HwlComputeSurfaceAddrFromCoordTiled(pIn, pOut); +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceCoordFromAddrLinear +* +* @brief +* Internal function to calculate coord from address for linear swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceCoordFromAddrLinear( + const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + BOOL_32 valid = (pIn->numSamples <= 1) && (pIn->numFrags <= 1); + + if (valid) + { + if (IsTex1d(pIn->resourceType)) + { + valid = (pIn->unalignedHeight == 1); + } + } + + if (valid) + { + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + localIn.bpp = pIn->bpp; + localIn.flags = pIn->flags; + localIn.width = Max(pIn->unalignedWidth, 1u); + localIn.height = Max(pIn->unalignedHeight, 1u); + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.resourceType = pIn->resourceType; + if (localIn.numMipLevels <= 1) + { + localIn.pitchInElement = pIn->pitchInElement; + } + returnCode = ComputeSurfaceInfoLinear(&localIn, &localOut); + + if (returnCode == ADDR_OK) + { + pOut->slice = static_cast(pIn->addr / localOut.sliceSize); + pOut->sample = 0; + + UINT_32 offsetInSlice = static_cast(pIn->addr % localOut.sliceSize); + UINT_32 elementBytes = pIn->bpp >> 3; + UINT_32 mipOffsetInSlice = 0; + UINT_32 mipSize = 0; + UINT_32 mipId = 0; + for (; mipId < pIn->numMipLevels ; mipId++) + { + if (IsTex1d(pIn->resourceType)) + { + mipSize = localOut.pitch * elementBytes; + } + else + { + UINT_32 currentMipHeight = (PowTwoAlign(localIn.height, (1 << mipId))) >> mipId; + mipSize = currentMipHeight * localOut.pitch * elementBytes; + } + + if (mipSize == 0) + { + valid = FALSE; + break; + } + else if ((mipSize + mipOffsetInSlice) > offsetInSlice) + { + break; + } + else + { + mipOffsetInSlice += mipSize; + if ((mipId == (pIn->numMipLevels - 1)) || + (mipOffsetInSlice >= localOut.sliceSize)) + { + valid = FALSE; + } + } + } + + if (valid) + { + pOut->mipId = mipId; + + UINT_32 elemOffsetInMip = (offsetInSlice - mipOffsetInSlice) / elementBytes; + if (IsTex1d(pIn->resourceType)) + { + if (elemOffsetInMip < localOut.pitch) + { + pOut->x = elemOffsetInMip; + pOut->y = 0; + } + else + { + valid = FALSE; + } + } + else + { + pOut->y = elemOffsetInMip / localOut.pitch; + pOut->x = elemOffsetInMip % localOut.pitch; + } + + if ((pOut->slice >= pIn->numSlices) || + (pOut->mipId >= pIn->numMipLevels) || + (pOut->x >= Max((pIn->unalignedWidth >> pOut->mipId), 1u)) || + (pOut->y >= Max((pIn->unalignedHeight >> pOut->mipId), 1u)) || + (IsTex3d(pIn->resourceType) && + (FALSE == Valid3DMipSliceIdConstraint(pIn->numSlices, + pOut->mipId, + pOut->slice)))) + { + valid = FALSE; + } + } + } + else + { + valid = FALSE; + } + } + + if (valid == FALSE) + { + returnCode = ADDR_INVALIDPARAMS; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceCoordFromAddrTiled +* +* @brief +* Internal function to calculate coord from address for tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceCoordFromAddrTiled( + const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_NOTIMPLEMENTED; + + ADDR_NOT_IMPLEMENTED(); + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeBlockDimensionForSurf +* +* @brief +* Internal function to get block width/height/depth in element from surface input params. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeBlockDimensionForSurf( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + UINT_32 numSamples, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (IsThick(resourceType, swizzleMode)) + { + ComputeThickBlockDimension(pWidth, pHeight, pDepth, bpp, resourceType, swizzleMode); + } + else if (IsThin(resourceType, swizzleMode)) + { + ComputeThinBlockDimension(pWidth, pHeight, pDepth, bpp, numSamples, resourceType, swizzleMode); + } + else + { + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeThinBlockDimension +* +* @brief +* Internal function to get thin block width/height/depth in element from surface input params. +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Lib::ComputeThinBlockDimension( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + UINT_32 numSamples, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const +{ + ADDR_ASSERT(IsThin(resourceType, swizzleMode)); + + // GFX9/GFX10 use different dimension amplifying logic: say for 128KB block + 1xAA + 1BPE, the dimension of thin + // swizzle mode will be [256W * 512H] on GFX9 ASICs and [512W * 256H] on GFX10 ASICs. Since GFX10 is newer HWL so we + // make its implementation into base class (in order to save future change on new HWLs) + const UINT_32 log2BlkSize = GetBlockSizeLog2(swizzleMode); + const UINT_32 log2EleBytes = Log2(bpp >> 3); + const UINT_32 log2Samples = Log2(Max(numSamples, 1u)); + const UINT_32 log2NumEle = log2BlkSize - log2EleBytes - log2Samples; + + // For "1xAA/4xAA cases" or "2xAA/8xAA + odd log2BlkSize cases", width == height or width == 2 * height; + // For other cases, height == width or height == 2 * width + const BOOL_32 widthPrecedent = ((log2Samples & 1) == 0) || ((log2BlkSize & 1) != 0); + const UINT_32 log2Width = (log2NumEle + (widthPrecedent ? 1 : 0)) / 2; + + *pWidth = 1u << log2Width; + *pHeight = 1u << (log2NumEle - log2Width); + *pDepth = 1; +} + +/** +************************************************************************************************************************ +* Lib::ComputeBlockDimension +* +* @brief +* Internal function to get block width/height/depth in element without considering MSAA case +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeBlockDimension( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (IsThick(resourceType, swizzleMode)) + { + ComputeThickBlockDimension(pWidth, pHeight, pDepth, bpp, resourceType, swizzleMode); + } + else if (IsThin(resourceType, swizzleMode)) + { + ComputeThinBlockDimension(pWidth, pHeight, pDepth, bpp, 0, resourceType, swizzleMode); + } + else + { + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeThickBlockDimension +* +* @brief +* Internal function to get block width/height/depth in element for thick swizzle mode +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Lib::ComputeThickBlockDimension( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const +{ + ADDR_ASSERT(IsThick(resourceType, swizzleMode)); + + const UINT_32 log2BlkSize = GetBlockSizeLog2(swizzleMode); + const UINT_32 eleBytes = bpp >> 3; + const UINT_32 microBlockSizeTableIndex = Log2(eleBytes); + + ADDR_ASSERT(microBlockSizeTableIndex < sizeof(Block1K_3d) / sizeof(Block1K_3d[0])); + + const UINT_32 log2blkSizeIn1KB = log2BlkSize - 10; + const UINT_32 averageAmp = log2blkSizeIn1KB / 3; + const UINT_32 restAmp = log2blkSizeIn1KB % 3; + + *pWidth = Block1K_3d[microBlockSizeTableIndex].w << averageAmp; + *pHeight = Block1K_3d[microBlockSizeTableIndex].h << (averageAmp + (restAmp / 2)); + *pDepth = Block1K_3d[microBlockSizeTableIndex].d << (averageAmp + ((restAmp != 0) ? 1 : 0)); +} + +/** +************************************************************************************************************************ +* Lib::GetMipTailDim +* +* @brief +* Internal function to get out max dimension of first level in mip tail +* +* @return +* Max Width/Height/Depth value of the first mip fitted in mip tail +************************************************************************************************************************ +*/ +Dim3d Lib::GetMipTailDim( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 blockWidth, + UINT_32 blockHeight, + UINT_32 blockDepth) const +{ + Dim3d out = {blockWidth, blockHeight, blockDepth}; + UINT_32 log2BlkSize = GetBlockSizeLog2(swizzleMode); + + if (IsThick(resourceType, swizzleMode)) + { + UINT_32 dim = log2BlkSize % 3; + + if (dim == 0) + { + out.h >>= 1; + } + else if (dim == 1) + { + out.w >>= 1; + } + else + { + out.d >>= 1; + } + } + else + { + ADDR_ASSERT(IsThin(resourceType, swizzleMode)); + + // GFX9/GFX10 use different dimension shrinking logic for mipmap tail: say for 128KB block + 2BPE, the maximum + // dimension of mipmap tail level will be [256W * 128H] on GFX9 ASICs and [128W * 256H] on GFX10 ASICs. Since + // GFX10 is newer HWL so we make its implementation into base class, in order to save future change on new HWLs. + // And assert log2BlkSize will always be an even value on GFX9, so we never need the logic wrapped by DEBUG... +#if DEBUG + if ((log2BlkSize & 1) && (m_chipFamily == ADDR_CHIP_FAMILY_AI)) + { + // Should never go here... + ADDR_ASSERT_ALWAYS(); + + out.h >>= 1; + } + else +#endif + { + out.w >>= 1; + } + } + + return out; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurface2DMicroBlockOffset +* +* @brief +* Internal function to calculate micro block (256B) offset from coord for 2D resource +* +* @return +* micro block (256B) offset for 2D resource +************************************************************************************************************************ +*/ +UINT_32 Lib::ComputeSurface2DMicroBlockOffset( + const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn) const +{ + ADDR_ASSERT(IsThin(pIn->resourceType, pIn->swizzleMode)); + + UINT_32 log2ElementBytes = Log2(pIn->bpp >> 3); + UINT_32 microBlockOffset = 0; + if (IsStandardSwizzle(pIn->resourceType, pIn->swizzleMode)) + { + UINT_32 xBits = pIn->x << log2ElementBytes; + microBlockOffset = (xBits & 0xf) | ((pIn->y & 0x3) << 4); + if (log2ElementBytes < 3) + { + microBlockOffset |= (pIn->y & 0x4) << 4; + if (log2ElementBytes == 0) + { + microBlockOffset |= (pIn->y & 0x8) << 4; + } + else + { + microBlockOffset |= (xBits & 0x10) << 3; + } + } + else + { + microBlockOffset |= (xBits & 0x30) << 2; + } + } + else if (IsDisplaySwizzle(pIn->resourceType, pIn->swizzleMode)) + { + if (log2ElementBytes == 4) + { + microBlockOffset = (GetBit(pIn->x, 0) << 4) | + (GetBit(pIn->y, 0) << 5) | + (GetBit(pIn->x, 1) << 6) | + (GetBit(pIn->y, 1) << 7); + } + else + { + microBlockOffset = GetBits(pIn->x, 0, 3, log2ElementBytes) | + GetBits(pIn->y, 1, 2, 3 + log2ElementBytes) | + GetBits(pIn->x, 3, 1, 5 + log2ElementBytes) | + GetBits(pIn->y, 3, 1, 6 + log2ElementBytes); + microBlockOffset = GetBits(microBlockOffset, 0, 4, 0) | + (GetBit(pIn->y, 0) << 4) | + GetBits(microBlockOffset, 4, 3, 5); + } + } + else if (IsRotateSwizzle(pIn->swizzleMode)) + { + microBlockOffset = GetBits(pIn->y, 0, 3, log2ElementBytes) | + GetBits(pIn->x, 1, 2, 3 + log2ElementBytes) | + GetBits(pIn->x, 3, 1, 5 + log2ElementBytes) | + GetBits(pIn->y, 3, 1, 6 + log2ElementBytes); + microBlockOffset = GetBits(microBlockOffset, 0, 4, 0) | + (GetBit(pIn->x, 0) << 4) | + GetBits(microBlockOffset, 4, 3, 5); + if (log2ElementBytes == 3) + { + microBlockOffset = GetBits(microBlockOffset, 0, 6, 0) | + GetBits(pIn->x, 1, 2, 6); + } + } + + return microBlockOffset; +} + +/** +************************************************************************************************************************ +* Lib::ComputeSurface3DMicroBlockOffset +* +* @brief +* Internal function to calculate micro block (1KB) offset from coord for 3D resource +* +* @return +* micro block (1KB) offset for 3D resource +************************************************************************************************************************ +*/ +UINT_32 Lib::ComputeSurface3DMicroBlockOffset( + const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn) const +{ + ADDR_ASSERT(IsThick(pIn->resourceType, pIn->swizzleMode)); + + UINT_32 log2ElementBytes = Log2(pIn->bpp >> 3); + UINT_32 microBlockOffset = 0; + if (IsStandardSwizzle(pIn->resourceType, pIn->swizzleMode)) + { + if (log2ElementBytes == 0) + { + microBlockOffset = ((pIn->slice & 4) >> 2) | ((pIn->y & 4) >> 1); + } + else if (log2ElementBytes == 1) + { + microBlockOffset = ((pIn->slice & 4) >> 2) | ((pIn->y & 4) >> 1); + } + else if (log2ElementBytes == 2) + { + microBlockOffset = ((pIn->y & 4) >> 2) | ((pIn->x & 4) >> 1); + } + else if (log2ElementBytes == 3) + { + microBlockOffset = (pIn->x & 6) >> 1; + } + else + { + microBlockOffset = pIn->x & 3; + } + + microBlockOffset <<= 8; + + UINT_32 xBits = pIn->x << log2ElementBytes; + microBlockOffset |= (xBits & 0xf) | ((pIn->y & 0x3) << 4) | ((pIn->slice & 0x3) << 6); + } + else if (IsZOrderSwizzle(pIn->swizzleMode)) + { + UINT_32 xh, yh, zh; + + if (log2ElementBytes == 0) + { + microBlockOffset = + (pIn->x & 1) | ((pIn->y & 1) << 1) | ((pIn->x & 2) << 1) | ((pIn->y & 2) << 2); + microBlockOffset = microBlockOffset | ((pIn->slice & 3) << 4) | ((pIn->x & 4) << 4); + + xh = pIn->x >> 3; + yh = pIn->y >> 2; + zh = pIn->slice >> 2; + } + else if (log2ElementBytes == 1) + { + microBlockOffset = + (pIn->x & 1) | ((pIn->y & 1) << 1) | ((pIn->x & 2) << 1) | ((pIn->y & 2) << 2); + microBlockOffset = (microBlockOffset << 1) | ((pIn->slice & 3) << 5); + + xh = pIn->x >> 2; + yh = pIn->y >> 2; + zh = pIn->slice >> 2; + } + else if (log2ElementBytes == 2) + { + microBlockOffset = + (pIn->x & 1) | ((pIn->y & 1) << 1) | ((pIn->x & 2) << 1) | ((pIn->slice & 1) << 3); + microBlockOffset = (microBlockOffset << 2) | ((pIn->y & 2) << 5); + + xh = pIn->x >> 2; + yh = pIn->y >> 2; + zh = pIn->slice >> 1; + } + else if (log2ElementBytes == 3) + { + microBlockOffset = + (pIn->x & 1) | ((pIn->y & 1) << 1) | ((pIn->slice & 1) << 2) | ((pIn->x & 2) << 2); + microBlockOffset <<= 3; + + xh = pIn->x >> 2; + yh = pIn->y >> 1; + zh = pIn->slice >> 1; + } + else + { + microBlockOffset = + (((pIn->x & 1) | ((pIn->y & 1) << 1) | ((pIn->slice & 1) << 2)) << 4); + + xh = pIn->x >> 1; + yh = pIn->y >> 1; + zh = pIn->slice >> 1; + } + + microBlockOffset |= ((MortonGen3d(xh, yh, zh, 1) << 7) & 0x380); + } + + return microBlockOffset; +} + +/** +************************************************************************************************************************ +* Lib::GetPipeXorBits +* +* @brief +* Internal function to get bits number for pipe/se xor operation +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +UINT_32 Lib::GetPipeXorBits( + UINT_32 macroBlockBits) const +{ + ADDR_ASSERT(macroBlockBits >= m_pipeInterleaveLog2); + + // Total available xor bits + UINT_32 xorBits = macroBlockBits - m_pipeInterleaveLog2; + + // Pipe/Se xor bits + UINT_32 pipeBits = Min(xorBits, m_pipesLog2 + m_seLog2); + + return pipeBits; +} + +/** +************************************************************************************************************************ +* Lib::Addr2GetPreferredSurfaceSetting +* +* @brief +* Internal function to get suggested surface information for cliet to use +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::Addr2GetPreferredSurfaceSetting( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode; + + if ((GetFillSizeFieldsFlags() == TRUE) && + ((pIn->size != sizeof(ADDR2_GET_PREFERRED_SURF_SETTING_INPUT)) || + (pOut->size != sizeof(ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT)))) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + returnCode = HwlGetPreferredSurfaceSetting(pIn, pOut); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::ComputeBlock256Equation +* +* @brief +* Compute equation for block 256B +* +* @return +* If equation computed successfully +* +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeBlock256Equation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const +{ + ADDR_E_RETURNCODE ret; + + if (IsBlock256b(swMode)) + { + ret = HwlComputeBlock256Equation(rsrcType, swMode, elementBytesLog2, pEquation); + } + else + { + ADDR_ASSERT_ALWAYS(); + ret = ADDR_INVALIDPARAMS; + } + + return ret; +} + +/** +************************************************************************************************************************ +* Lib::ComputeThinEquation +* +* @brief +* Compute equation for 2D/3D resource which use THIN mode +* +* @return +* If equation computed successfully +* +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeThinEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const +{ + ADDR_E_RETURNCODE ret; + + if (IsThin(rsrcType, swMode)) + { + ret = HwlComputeThinEquation(rsrcType, swMode, elementBytesLog2, pEquation); + } + else + { + ADDR_ASSERT_ALWAYS(); + ret = ADDR_INVALIDPARAMS; + } + + return ret; +} + +/** +************************************************************************************************************************ +* Lib::ComputeThickEquation +* +* @brief +* Compute equation for 3D resource which use THICK mode +* +* @return +* If equation computed successfully +* +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeThickEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const +{ + ADDR_E_RETURNCODE ret; + + if (IsThick(rsrcType, swMode)) + { + ret = HwlComputeThickEquation(rsrcType, swMode, elementBytesLog2, pEquation); + } + else + { + ADDR_ASSERT_ALWAYS(); + ret = ADDR_INVALIDPARAMS; + } + + return ret; +} + +/** +************************************************************************************************************************ +* Lib::ComputeQbStereoInfo +* +* @brief +* Get quad buffer stereo information +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Lib::ComputeQbStereoInfo( + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in,out] updated pOut+pStereoInfo + ) const +{ + ADDR_ASSERT(pOut->bpp >= 8); + ADDR_ASSERT((pOut->surfSize % pOut->baseAlign) == 0); + + // Save original height + pOut->pStereoInfo->eyeHeight = pOut->height; + + // Right offset + pOut->pStereoInfo->rightOffset = static_cast(pOut->surfSize); + + // Double height + pOut->height <<= 1; + + ADDR_ASSERT(pOut->height <= MaxSurfaceHeight); + + pOut->pixelHeight <<= 1; + + // Double size + pOut->surfSize <<= 1; + pOut->sliceSize <<= 1; +} + +/** +************************************************************************************************************************ +* Lib::FilterInvalidEqSwizzleMode +* +* @brief +* Filter out swizzle mode(s) if it doesn't have valid equation index +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Lib::FilterInvalidEqSwizzleMode( + ADDR2_SWMODE_SET& allowedSwModeSet, + AddrResourceType resourceType, + UINT_32 elemLog2 + ) const +{ + if (resourceType != ADDR_RSRC_TEX_1D) + { + UINT_32 allowedSwModeSetVal = allowedSwModeSet.value; + const UINT_32 rsrcTypeIdx = static_cast(resourceType) - 1; + UINT_32 validSwModeSet = allowedSwModeSetVal; + + for (UINT_32 swModeIdx = 0; validSwModeSet != 0; swModeIdx++) + { + if (validSwModeSet & 1) + { + if (m_equationLookupTable[rsrcTypeIdx][swModeIdx][elemLog2] == ADDR_INVALID_EQUATION_INDEX) + { + allowedSwModeSetVal &= ~(1u << swModeIdx); + } + } + + validSwModeSet >>= 1; + } + + // Only apply the filtering if at least one valid swizzle mode remains + if (allowedSwModeSetVal != 0) + { + allowedSwModeSet.value = allowedSwModeSetVal; + } + } +} + +} // V2 +} // Addr + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.h new file mode 100644 index 0000000000..75fe6442db --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrlib2.h @@ -0,0 +1,868 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +************************************************************************************************************************ +* @file addrlib2.h +* @brief Contains the Addr::V2::Lib class definition. +************************************************************************************************************************ +*/ + +#ifndef __ADDR2_LIB2_H__ +#define __ADDR2_LIB2_H__ + +#include "addrlib.h" + +namespace Addr +{ +namespace V2 +{ + +/** +************************************************************************************************************************ +* @brief Flags for SwizzleModeTable +************************************************************************************************************************ +*/ +struct SwizzleModeFlags +{ + // Swizzle mode + UINT_32 isLinear : 1; // Linear + + // Block size + UINT_32 is256b : 1; // Block size is 256B + UINT_32 is4kb : 1; // Block size is 4KB + UINT_32 is64kb : 1; // Block size is 64KB + UINT_32 isVar : 1; // Block size is variable + + UINT_32 isZ : 1; // Z order swizzle mode + UINT_32 isStd : 1; // Standard swizzle mode + UINT_32 isDisp : 1; // Display swizzle mode + UINT_32 isRot : 1; // Rotate swizzle mode + + // XOR mode + UINT_32 isXor : 1; // XOR after swizzle if set + + UINT_32 isT : 1; // T mode + + UINT_32 isRtOpt : 1; // mode opt for render target + + UINT_32 reserved : 20; // Reserved bits +}; + +struct Dim2d +{ + UINT_32 w; + UINT_32 h; +}; + +struct Dim3d +{ + UINT_32 w; + UINT_32 h; + UINT_32 d; +}; + +// Macro define resource block type +enum AddrBlockType +{ + AddrBlockMicro = 0, // Resource uses 256B block + AddrBlockThin4KB = 1, // Resource uses thin 4KB block + AddrBlockThick4KB = 2, // Resource uses thick 4KB block + AddrBlockThin64KB = 3, // Resource uses thin 64KB block + AddrBlockThick64KB = 4, // Resource uses thick 64KB block + AddrBlockVar = 5, // Resource uses var block, only valid for GFX9 + AddrBlockLinear = 6, // Resource uses linear swizzle mode + + AddrBlockMaxTiledType = AddrBlockVar + 1, +}; + +enum AddrSwSet +{ + AddrSwSetZ = 1 << ADDR_SW_Z, + AddrSwSetS = 1 << ADDR_SW_S, + AddrSwSetD = 1 << ADDR_SW_D, + AddrSwSetR = 1 << ADDR_SW_R, + + AddrSwSetAll = AddrSwSetZ | AddrSwSetS | AddrSwSetD | AddrSwSetR, +}; + +const UINT_32 Size256 = 256u; +const UINT_32 Size4K = 4096u; +const UINT_32 Size64K = 65536u; + +const UINT_32 Log2Size256 = 8u; +const UINT_32 Log2Size4K = 12u; +const UINT_32 Log2Size64K = 16u; + +/** +************************************************************************************************************************ +* @brief This class contains asic independent address lib functionalities +************************************************************************************************************************ +*/ +class Lib : public Addr::Lib +{ +public: + virtual ~Lib(); + + static Lib* GetLib( + ADDR_HANDLE hLib); + + // + // Interface stubs + // + + // For data surface + ADDR_E_RETURNCODE ComputeSurfaceInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr( + const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + // For HTile + ADDR_E_RETURNCODE ComputeHtileInfo( + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeHtileAddrFromCoord( + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); + + ADDR_E_RETURNCODE ComputeHtileCoordFromAddr( + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); + + // For CMask + ADDR_E_RETURNCODE ComputeCmaskInfo( + const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, + ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord( + const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut); + + ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr( + const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const; + + // For FMask + ADDR_E_RETURNCODE ComputeFmaskInfo( + const ADDR2_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR2_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord( + const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr( + const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; + + // For DCC key + ADDR_E_RETURNCODE ComputeDccInfo( + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut); + + // Misc + ADDR_E_RETURNCODE ComputePipeBankXor( + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut); + + ADDR_E_RETURNCODE ComputeSlicePipeBankXor( + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut); + + ADDR_E_RETURNCODE ComputeSubResourceOffsetForSwizzlePattern( + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut); + + ADDR_E_RETURNCODE Addr2GetPreferredSurfaceSetting( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; + + virtual BOOL_32 IsValidDisplaySwizzleMode( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTIMPLEMENTED; + } + +protected: + Lib(); // Constructor is protected + Lib(const Client* pClient); + + static const UINT_32 MaxNumOfBpp = 5; + static const UINT_32 MaxNumOfAA = 4; + + static const Dim2d Block256_2d[MaxNumOfBpp]; + static const Dim3d Block1K_3d[MaxNumOfBpp]; + + static const UINT_32 PrtAlignment = 64 * 1024; + static const UINT_32 MaxMacroBits = 20; + + static const UINT_32 MaxMipLevels = 16; + + BOOL_32 IsValidSwMode(AddrSwizzleMode swizzleMode) const + { + // Don't dereference a reinterpret_cast pointer so as not to break + // strict-aliasing rules. + UINT_32 mode; + memcpy(&mode, &m_swizzleModeTable[swizzleMode], sizeof(UINT_32)); + return mode != 0; + } + + // Checking block size + BOOL_32 IsBlock256b(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].is256b; + } + + BOOL_32 IsBlock4kb(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].is4kb; + } + + BOOL_32 IsBlock64kb(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].is64kb; + } + + BOOL_32 IsBlockVariable(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isVar; + } + + // Checking swizzle mode + BOOL_32 IsLinear(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isLinear; + } + + BOOL_32 IsRtOptSwizzle(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isRtOpt; + } + + BOOL_32 IsZOrderSwizzle(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isZ; + } + + BOOL_32 IsStandardSwizzle(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isStd; + } + + BOOL_32 IsDisplaySwizzle(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isDisp; + } + + BOOL_32 IsRotateSwizzle(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isRot; + } + + BOOL_32 IsStandardSwizzle(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const + { + return HwlIsStandardSwizzle(resourceType, swizzleMode); + } + + BOOL_32 IsDisplaySwizzle(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const + { + return HwlIsDisplaySwizzle(resourceType, swizzleMode); + } + + BOOL_32 IsXor(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isXor; + } + + BOOL_32 IsPrt(AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isT; + } + + BOOL_32 IsNonPrtXor(AddrSwizzleMode swizzleMode) const + { + return (IsXor(swizzleMode) && (IsPrt(swizzleMode) == FALSE)); + } + + // Checking resource type + static BOOL_32 IsTex1d(AddrResourceType resourceType) + { + return (resourceType == ADDR_RSRC_TEX_1D); + } + + static BOOL_32 IsTex2d(AddrResourceType resourceType) + { + return (resourceType == ADDR_RSRC_TEX_2D); + } + + static BOOL_32 IsTex3d(AddrResourceType resourceType) + { + return (resourceType == ADDR_RSRC_TEX_3D); + } + + BOOL_32 IsThick(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const + { + return HwlIsThick(resourceType, swizzleMode); + } + + BOOL_32 IsThin(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const + { + return HwlIsThin(resourceType, swizzleMode); + } + + UINT_32 GetBlockSizeLog2(AddrSwizzleMode swizzleMode) const + { + UINT_32 blockSizeLog2 = 0; + + if (IsBlock256b(swizzleMode) || IsLinear(swizzleMode)) + { + blockSizeLog2 = 8; + } + else if (IsBlock4kb(swizzleMode)) + { + blockSizeLog2 = 12; + } + else if (IsBlock64kb(swizzleMode)) + { + blockSizeLog2 = 16; + } + else if (IsBlockVariable(swizzleMode) && (m_blockVarSizeLog2 != 0)) + { + blockSizeLog2 = m_blockVarSizeLog2; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + + return blockSizeLog2; + } + + UINT_32 GetBlockSize(AddrSwizzleMode swizzleMode) const + { + return (1 << GetBlockSizeLog2(swizzleMode)); + } + + static UINT_32 GetFmaskBpp(UINT_32 sample, UINT_32 frag) + { + sample = (sample == 0) ? 1 : sample; + frag = (frag == 0) ? sample : frag; + + UINT_32 fmaskBpp = QLog2(frag); + + if (sample > frag) + { + fmaskBpp++; + } + + if (fmaskBpp == 3) + { + fmaskBpp = 4; + } + + fmaskBpp = Max(8u, fmaskBpp * sample); + + return fmaskBpp; + } + + virtual BOOL_32 HwlIsStandardSwizzle( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + ADDR_NOT_IMPLEMENTED(); + return FALSE; + } + + virtual BOOL_32 HwlIsDisplaySwizzle( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + ADDR_NOT_IMPLEMENTED(); + return FALSE; + } + + virtual BOOL_32 HwlIsThin( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + ADDR_NOT_IMPLEMENTED(); + return FALSE; + } + + virtual BOOL_32 HwlIsThick( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + ADDR_NOT_IMPLEMENTED(); + return FALSE; + } + + virtual ADDR_E_RETURNCODE HwlComputeHtileInfo( + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeCmaskInfo( + const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, + ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeDccInfo( + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( + const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr( + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeBlock256Equation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeThinEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeThickEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual UINT_32 HwlGetEquationIndex( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_INVALID_EQUATION_INDEX; + } + + UINT_32 GetEquationIndex( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const + { + return HwlGetEquationIndex(pIn, pOut); + } + + virtual ADDR_E_RETURNCODE HwlComputePipeBankXor( + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor( + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern( + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTIMPLEMENTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoLinear( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTIMPLEMENTED; + } + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTIMPLEMENTED; + } + + ADDR_E_RETURNCODE ComputeBlock256Equation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const; + + ADDR_E_RETURNCODE ComputeThinEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const; + + ADDR_E_RETURNCODE ComputeThickEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const; + + ADDR_E_RETURNCODE ComputeSurfaceInfoSanityCheck( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + ADDR_E_RETURNCODE ComputeSurfaceInfoLinear( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceInfoTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordLinear( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddrLinear( + const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddrTiled( + const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + UINT_32 ComputeSurface2DMicroBlockOffset( + const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn) const; + + UINT_32 ComputeSurface3DMicroBlockOffset( + const _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn) const; + + // Misc + ADDR_E_RETURNCODE ComputeBlockDimensionForSurf( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + UINT_32 numSamples, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const; + + ADDR_E_RETURNCODE ComputeBlockDimension( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const; + + virtual VOID ComputeThinBlockDimension( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + UINT_32 numSamples, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const; + + VOID ComputeThickBlockDimension( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const; + + static UINT_64 ComputePadSize( + const Dim3d* pBlkDim, + UINT_32 width, + UINT_32 height, + UINT_32 numSlices, + Dim3d* pPadDim) + { + pPadDim->w = PowTwoAlign(width ,pBlkDim->w); + pPadDim->h = PowTwoAlign(height ,pBlkDim->h); + pPadDim->d = PowTwoAlign(numSlices, pBlkDim->d); + return static_cast(pPadDim->w) * pPadDim->h * pPadDim->d; + } + + static ADDR_E_RETURNCODE ExtractPipeBankXor( + UINT_32 pipeBankXor, + UINT_32 bankBits, + UINT_32 pipeBits, + UINT_32* pBankX, + UINT_32* pPipeX); + + static BOOL_32 Valid3DMipSliceIdConstraint( + UINT_32 numSlices, + UINT_32 mipId, + UINT_32 slice) + { + return (Max((numSlices >> mipId), 1u) > slice); + } + + Dim3d GetMipTailDim( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 blockWidth, + UINT_32 blockHeight, + UINT_32 blockDepth) const; + + static BOOL_32 IsLocalHeap(AddrResrouceLocation resourceType) + { + return ((resourceType == ADDR_RSRC_LOC_LOCAL) || + (resourceType == ADDR_RSRC_LOC_INVIS)); + } + + static BOOL_32 IsInvisibleHeap(AddrResrouceLocation resourceType) + { + return (resourceType == ADDR_RSRC_LOC_INVIS); + } + + static BOOL_32 IsNonlocalHeap(AddrResrouceLocation resourceType) + { + return ((resourceType == ADDR_RSRC_LOC_USWC) || + (resourceType == ADDR_RSRC_LOC_CACHED)); + } + + UINT_32 GetPipeLog2ForMetaAddressing(BOOL_32 pipeAligned, AddrSwizzleMode swizzleMode) const + { + UINT_32 numPipeLog2 = pipeAligned ? Min(m_pipesLog2 + m_seLog2, 5u) : 0; + + if (IsXor(swizzleMode)) + { + UINT_32 maxPipeLog2 = GetBlockSizeLog2(swizzleMode) - m_pipeInterleaveLog2; + + numPipeLog2 = Min(numPipeLog2, maxPipeLog2); + } + + return numPipeLog2; + } + + UINT_32 GetPipeNumForMetaAddressing(BOOL_32 pipeAligned, AddrSwizzleMode swizzleMode) const + { + return (1 << GetPipeLog2ForMetaAddressing(pipeAligned, swizzleMode)); + } + + VOID VerifyMipLevelInfo(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const + { +#if DEBUG + if (pIn->numMipLevels > 1) + { + UINT_32 actualMipLevels = 1; + switch (pIn->resourceType) + { + case ADDR_RSRC_TEX_3D: + // Fall through to share 2D case + actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->numSlices) + 1); + case ADDR_RSRC_TEX_2D: + // Fall through to share 1D case + actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->height) + 1); + case ADDR_RSRC_TEX_1D: + // Base 1D case + actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->width) + 1); + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + // Client pass wrong number of MipLevels to addrlib and result will be bad. + // Not sure if we should fail this calling instead of putting an assertion here. + ADDR_ASSERT(actualMipLevels >= pIn->numMipLevels); + } +#endif + } + + ADDR_E_RETURNCODE ApplyCustomerPipeBankXor( + AddrSwizzleMode swizzleMode, + UINT_32 pipeBankXor, + UINT_32 bankBits, + UINT_32 pipeBits, + UINT_32* pBlockOffset) const + { + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (IsXor(swizzleMode)) + { + // Apply driver set bankPipeXor + UINT_32 bankX = 0; + UINT_32 pipeX = 0; + returnCode = ExtractPipeBankXor(pipeBankXor, bankBits, pipeBits, &bankX, &pipeX); + *pBlockOffset ^= (pipeX << m_pipeInterleaveLog2); + *pBlockOffset ^= (bankX << (m_pipeInterleaveLog2 + pipeBits)); + } + + return returnCode; + } + + UINT_32 GetPipeXorBits(UINT_32 macroBlockBits) const; + + ADDR_E_RETURNCODE ApplyCustomizedPitchHeight( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + UINT_32 elementBytes, + UINT_32 pitchAlignInElement, + UINT_32* pPitch, + UINT_32* pHeight) const; + + VOID ComputeQbStereoInfo(ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + VOID FilterInvalidEqSwizzleMode( + ADDR2_SWMODE_SET& allowedSwModeSet, + AddrResourceType resourceType, + UINT_32 elemLog2) const; + + UINT_32 m_se; ///< Number of shader engine + UINT_32 m_rbPerSe; ///< Number of render backend per shader engine + UINT_32 m_maxCompFrag; ///< Number of max compressed fragment + + UINT_32 m_banksLog2; ///< Number of bank Log2 + UINT_32 m_pipesLog2; ///< Number of pipe per shader engine Log2 + UINT_32 m_seLog2; ///< Number of shader engine Log2 + UINT_32 m_rbPerSeLog2; ///< Number of render backend per shader engine Log2 + UINT_32 m_maxCompFragLog2; ///< Number of max compressed fragment Log2 + + UINT_32 m_pipeInterleaveLog2; ///< Log2 of pipe interleave bytes + + UINT_32 m_blockVarSizeLog2; ///< Log2 of block var size + + SwizzleModeFlags m_swizzleModeTable[ADDR_SW_MAX_TYPE]; ///< Swizzle mode table + + // Max number of swizzle mode supported for equation + static const UINT_32 MaxSwModeType = 32; + // Max number of resource type (2D/3D) supported for equation + static const UINT_32 MaxRsrcType = 2; + // Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp) + static const UINT_32 MaxElementBytesLog2 = 5; + // Almost all swizzle mode + resource type support equation + static const UINT_32 EquationTableSize = MaxElementBytesLog2 * MaxSwModeType * MaxRsrcType; + // Equation table + ADDR_EQUATION m_equationTable[EquationTableSize]; + + // Number of equation entries in the table + UINT_32 m_numEquations; + // Equation lookup table according to bpp and tile index + UINT_32 m_equationLookupTable[MaxRsrcType][MaxSwModeType][MaxElementBytesLog2]; + +private: + // Disallow the copy constructor + Lib(const Lib& a); + + // Disallow the assignment operator + Lib& operator=(const Lib& a); +}; + +} // V2 +} // Addr + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrobject.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrobject.cpp new file mode 100644 index 0000000000..d148d2f564 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrobject.cpp @@ -0,0 +1,237 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrobject.cpp +* @brief Contains the Object base class implementation. +**************************************************************************************************** +*/ + +#include "addrinterface.h" +#include "addrobject.h" + +namespace Addr +{ + +/** +**************************************************************************************************** +* Object::Object +* +* @brief +* Constructor for the Object class. +**************************************************************************************************** +*/ +Object::Object() +{ + m_client.handle = NULL; + m_client.callbacks.allocSysMem = NULL; + m_client.callbacks.freeSysMem = NULL; + m_client.callbacks.debugPrint = NULL; +} + +/** +**************************************************************************************************** +* Object::Object +* +* @brief +* Constructor for the Object class. +**************************************************************************************************** +*/ +Object::Object(const Client* pClient) +{ + m_client = *pClient; +} + +/** +**************************************************************************************************** +* Object::~Object +* +* @brief +* Destructor for the Object class. +**************************************************************************************************** +*/ +Object::~Object() +{ +} + +/** +**************************************************************************************************** +* Object::ClientAlloc +* +* @brief +* Calls instanced allocSysMem inside Client +**************************************************************************************************** +*/ +VOID* Object::ClientAlloc( + size_t objSize, ///< [in] Size to allocate + const Client* pClient) ///< [in] Client pointer +{ + VOID* pObjMem = NULL; + + if (pClient->callbacks.allocSysMem != NULL) + { + ADDR_ALLOCSYSMEM_INPUT allocInput = {0}; + + allocInput.size = sizeof(ADDR_ALLOCSYSMEM_INPUT); + allocInput.flags.value = 0; + allocInput.sizeInBytes = static_cast(objSize); + allocInput.hClient = pClient->handle; + + pObjMem = pClient->callbacks.allocSysMem(&allocInput); + } + + return pObjMem; +} + +/** +**************************************************************************************************** +* Object::Alloc +* +* @brief +* A wrapper of ClientAlloc +**************************************************************************************************** +*/ +VOID* Object::Alloc( + size_t objSize ///< [in] Size to allocate + ) const +{ + return ClientAlloc(objSize, &m_client);; +} + +/** +**************************************************************************************************** +* Object::ClientFree +* +* @brief +* Calls freeSysMem inside Client +**************************************************************************************************** +*/ +VOID Object::ClientFree( + VOID* pObjMem, ///< [in] User virtual address to free. + const Client* pClient) ///< [in] Client pointer +{ + if (pClient->callbacks.freeSysMem != NULL) + { + if (pObjMem != NULL) + { + ADDR_FREESYSMEM_INPUT freeInput = {0}; + + freeInput.size = sizeof(ADDR_FREESYSMEM_INPUT); + freeInput.hClient = pClient->handle; + freeInput.pVirtAddr = pObjMem; + + pClient->callbacks.freeSysMem(&freeInput); + } + } +} + +/** +**************************************************************************************************** +* Object::Free +* +* @brief +* A wrapper of ClientFree +**************************************************************************************************** +*/ +VOID Object::Free( + VOID* pObjMem ///< [in] User virtual address to free. + ) const +{ + ClientFree(pObjMem, &m_client); +} + +/** +**************************************************************************************************** +* Object::operator new +* +* @brief +* Placement new operator. (with pre-allocated memory pointer) +* +* @return +* Returns pre-allocated memory pointer. +**************************************************************************************************** +*/ +VOID* Object::operator new( + size_t objSize, ///< [in] Size to allocate + VOID* pMem) ///< [in] Pre-allocated pointer +{ + return pMem; +} + +/** +**************************************************************************************************** +* Object::operator delete +* +* @brief +* Frees Object object memory. +**************************************************************************************************** +*/ +VOID Object::operator delete( + VOID* pObjMem) ///< [in] User virtual address to free. +{ + Object* pObj = static_cast(pObjMem); + ClientFree(pObjMem, &pObj->m_client); +} + +/** +**************************************************************************************************** +* Object::DebugPrint +* +* @brief +* Print debug message +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID Object::DebugPrint( + const CHAR* pDebugString, ///< [in] Debug string + ... + ) const +{ +#if DEBUG + if (m_client.callbacks.debugPrint != NULL) + { + va_list ap; + + va_start(ap, pDebugString); + + ADDR_DEBUGPRINT_INPUT debugPrintInput = {0}; + + debugPrintInput.size = sizeof(ADDR_DEBUGPRINT_INPUT); + debugPrintInput.pDebugString = const_cast(pDebugString); + debugPrintInput.hClient = m_client.handle; + va_copy(debugPrintInput.ap, ap); + + m_client.callbacks.debugPrint(&debugPrintInput); + + va_end(ap); + } +#endif +} + +} // Addr diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrobject.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrobject.h new file mode 100644 index 0000000000..0555975771 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/addrobject.h @@ -0,0 +1,95 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file addrobject.h +* @brief Contains the Object base class definition. +**************************************************************************************************** +*/ + +#ifndef __ADDR_OBJECT_H__ +#define __ADDR_OBJECT_H__ + +#include "addrtypes.h" +#include "addrcommon.h" + +namespace Addr +{ + +/** +**************************************************************************************************** +* @brief This structure contains client specific data +**************************************************************************************************** +*/ +struct Client +{ + ADDR_CLIENT_HANDLE handle; + ADDR_CALLBACKS callbacks; +}; +/** +**************************************************************************************************** +* @brief This class is the base class for all ADDR class objects. +**************************************************************************************************** +*/ +class Object +{ +public: + Object(); + Object(const Client* pClient); + virtual ~Object(); + + VOID* operator new(size_t size, VOID* pMem); + VOID operator delete(VOID* pObj); + /// Microsoft compiler requires a matching delete implementation, which seems to be called when + /// bad_alloc is thrown. But currently C++ exception isn't allowed so a dummy implementation is + /// added to eliminate the warning. + VOID operator delete(VOID* pObj, VOID* pMem) { ADDR_ASSERT_ALWAYS(); } + + VOID* Alloc(size_t size) const; + VOID Free(VOID* pObj) const; + + VOID DebugPrint(const CHAR* pDebugString, ...) const; + + const Client* GetClient() const {return &m_client;} + +protected: + Client m_client; + + static VOID* ClientAlloc(size_t size, const Client* pClient); + static VOID ClientFree(VOID* pObj, const Client* pClient); + +private: + // disallow the copy constructor + Object(const Object& a); + + // disallow the assignment operator + Object& operator=(const Object& a); +}; + +} // Addr +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/coord.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/coord.cpp new file mode 100644 index 0000000000..5aa3795798 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/coord.cpp @@ -0,0 +1,715 @@ + +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +// Coordinate class implementation +#include "addrcommon.h" +#include "coord.h" + +namespace Addr +{ +namespace V2 +{ + +Coordinate::Coordinate() +{ + dim = 'x'; + ord = 0; +} + +Coordinate::Coordinate(INT_8 c, INT_32 n) +{ + set(c, n); +} + +VOID Coordinate::set(INT_8 c, INT_32 n) +{ + dim = c; + ord = static_cast(n); +} + +UINT_32 Coordinate::ison(UINT_32 x, UINT_32 y, UINT_32 z, UINT_32 s, UINT_32 m) const +{ + UINT_32 bit = static_cast(1ull << static_cast(ord)); + UINT_32 out = 0; + + switch (dim) + { + case 'm': out = m & bit; break; + case 's': out = s & bit; break; + case 'x': out = x & bit; break; + case 'y': out = y & bit; break; + case 'z': out = z & bit; break; + } + return (out != 0) ? 1 : 0; +} + +INT_8 Coordinate::getdim() +{ + return dim; +} + +INT_8 Coordinate::getord() +{ + return ord; +} + +BOOL_32 Coordinate::operator==(const Coordinate& b) +{ + return (dim == b.dim) && (ord == b.ord); +} + +BOOL_32 Coordinate::operator<(const Coordinate& b) +{ + BOOL_32 ret; + + if (dim == b.dim) + { + ret = ord < b.ord; + } + else + { + if (dim == 's' || b.dim == 'm') + { + ret = TRUE; + } + else if (b.dim == 's' || dim == 'm') + { + ret = FALSE; + } + else if (ord == b.ord) + { + ret = dim < b.dim; + } + else + { + ret = ord < b.ord; + } + } + + return ret; +} + +BOOL_32 Coordinate::operator>(const Coordinate& b) +{ + BOOL_32 lt = *this < b; + BOOL_32 eq = *this == b; + return !lt && !eq; +} + +BOOL_32 Coordinate::operator<=(const Coordinate& b) +{ + return (*this < b) || (*this == b); +} + +BOOL_32 Coordinate::operator>=(const Coordinate& b) +{ + return !(*this < b); +} + +BOOL_32 Coordinate::operator!=(const Coordinate& b) +{ + return !(*this == b); +} + +Coordinate& Coordinate::operator++(INT_32) +{ + ord++; + return *this; +} + +// CoordTerm + +CoordTerm::CoordTerm() +{ + num_coords = 0; +} + +VOID CoordTerm::Clear() +{ + num_coords = 0; +} + +VOID CoordTerm::add(Coordinate& co) +{ + // This function adds a coordinate INT_32o the list + // It will prevent the same coordinate from appearing, + // and will keep the list ordered from smallest to largest + UINT_32 i; + + for (i = 0; i < num_coords; i++) + { + if (m_coord[i] == co) + { + break; + } + if (m_coord[i] > co) + { + for (UINT_32 j = num_coords; j > i; j--) + { + m_coord[j] = m_coord[j - 1]; + } + m_coord[i] = co; + num_coords++; + break; + } + } + + if (i == num_coords) + { + m_coord[num_coords] = co; + num_coords++; + } +} + +VOID CoordTerm::add(CoordTerm& cl) +{ + for (UINT_32 i = 0; i < cl.num_coords; i++) + { + add(cl.m_coord[i]); + } +} + +BOOL_32 CoordTerm::remove(Coordinate& co) +{ + BOOL_32 remove = FALSE; + for (UINT_32 i = 0; i < num_coords; i++) + { + if (m_coord[i] == co) + { + remove = TRUE; + num_coords--; + } + + if (remove) + { + m_coord[i] = m_coord[i + 1]; + } + } + return remove; +} + +BOOL_32 CoordTerm::Exists(Coordinate& co) +{ + BOOL_32 exists = FALSE; + for (UINT_32 i = 0; i < num_coords; i++) + { + if (m_coord[i] == co) + { + exists = TRUE; + break; + } + } + return exists; +} + +VOID CoordTerm::copyto(CoordTerm& cl) +{ + cl.num_coords = num_coords; + for (UINT_32 i = 0; i < num_coords; i++) + { + cl.m_coord[i] = m_coord[i]; + } +} + +UINT_32 CoordTerm::getsize() +{ + return num_coords; +} + +UINT_32 CoordTerm::getxor(UINT_32 x, UINT_32 y, UINT_32 z, UINT_32 s, UINT_32 m) const +{ + UINT_32 out = 0; + for (UINT_32 i = 0; i < num_coords; i++) + { + out = out ^ m_coord[i].ison(x, y, z, s, m); + } + return out; +} + +VOID CoordTerm::getsmallest(Coordinate& co) +{ + co = m_coord[0]; +} + +UINT_32 CoordTerm::Filter(INT_8 f, Coordinate& co, UINT_32 start, INT_8 axis) +{ + for (UINT_32 i = start; i < num_coords;) + { + if (((f == '<' && m_coord[i] < co) || + (f == '>' && m_coord[i] > co) || + (f == '=' && m_coord[i] == co)) && + (axis == '\0' || axis == m_coord[i].getdim())) + { + for (UINT_32 j = i; j < num_coords - 1; j++) + { + m_coord[j] = m_coord[j + 1]; + } + num_coords--; + } + else + { + i++; + } + } + return num_coords; +} + +Coordinate& CoordTerm::operator[](UINT_32 i) +{ + return m_coord[i]; +} + +BOOL_32 CoordTerm::operator==(const CoordTerm& b) +{ + BOOL_32 ret = TRUE; + + if (num_coords != b.num_coords) + { + ret = FALSE; + } + else + { + for (UINT_32 i = 0; i < num_coords; i++) + { + // Note: the lists will always be in order, so we can compare the two lists at time + if (m_coord[i] != b.m_coord[i]) + { + ret = FALSE; + break; + } + } + } + return ret; +} + +BOOL_32 CoordTerm::operator!=(const CoordTerm& b) +{ + return !(*this == b); +} + +BOOL_32 CoordTerm::exceedRange(UINT_32 xRange, UINT_32 yRange, UINT_32 zRange, UINT_32 sRange) +{ + BOOL_32 exceed = FALSE; + for (UINT_32 i = 0; (i < num_coords) && (exceed == FALSE); i++) + { + UINT_32 subject; + switch (m_coord[i].getdim()) + { + case 'x': + subject = xRange; + break; + case 'y': + subject = yRange; + break; + case 'z': + subject = zRange; + break; + case 's': + subject = sRange; + break; + case 'm': + subject = 0; + break; + default: + // Invalid input! + ADDR_ASSERT_ALWAYS(); + subject = 0; + break; + } + + exceed = ((1u << m_coord[i].getord()) <= subject); + } + + return exceed; +} + +// coordeq +CoordEq::CoordEq() +{ + m_numBits = 0; +} + +VOID CoordEq::remove(Coordinate& co) +{ + for (UINT_32 i = 0; i < m_numBits; i++) + { + m_eq[i].remove(co); + } +} + +BOOL_32 CoordEq::Exists(Coordinate& co) +{ + BOOL_32 exists = FALSE; + + for (UINT_32 i = 0; i < m_numBits; i++) + { + if (m_eq[i].Exists(co)) + { + exists = TRUE; + } + } + return exists; +} + +VOID CoordEq::resize(UINT_32 n) +{ + if (n > m_numBits) + { + for (UINT_32 i = m_numBits; i < n; i++) + { + m_eq[i].Clear(); + } + } + m_numBits = n; +} + +UINT_32 CoordEq::getsize() +{ + return m_numBits; +} + +UINT_64 CoordEq::solve(UINT_32 x, UINT_32 y, UINT_32 z, UINT_32 s, UINT_32 m) const +{ + UINT_64 out = 0; + for (UINT_32 i = 0; i < m_numBits; i++) + { + if (m_eq[i].getxor(x, y, z, s, m) != 0) + { + out |= (1ULL << i); + } + } + return out; +} + +VOID CoordEq::solveAddr( + UINT_64 addr, UINT_32 sliceInM, + UINT_32& x, UINT_32& y, UINT_32& z, UINT_32& s, UINT_32& m) const +{ + UINT_32 xBitsValid = 0; + UINT_32 yBitsValid = 0; + UINT_32 zBitsValid = 0; + UINT_32 sBitsValid = 0; + UINT_32 mBitsValid = 0; + + CoordEq temp = *this; + + x = y = z = s = m = 0; + + UINT_32 bitsLeft = 0; + + for (UINT_32 i = 0; i < temp.m_numBits; i++) + { + UINT_32 termSize = temp.m_eq[i].getsize(); + + if (termSize == 1) + { + INT_8 bit = (addr >> i) & 1; + INT_8 dim = temp.m_eq[i][0].getdim(); + INT_8 ord = temp.m_eq[i][0].getord(); + + ADDR_ASSERT((ord < 32) || (bit == 0)); + + switch (dim) + { + case 'x': + xBitsValid |= (1 << ord); + x |= (bit << ord); + break; + case 'y': + yBitsValid |= (1 << ord); + y |= (bit << ord); + break; + case 'z': + zBitsValid |= (1 << ord); + z |= (bit << ord); + break; + case 's': + sBitsValid |= (1 << ord); + s |= (bit << ord); + break; + case 'm': + mBitsValid |= (1 << ord); + m |= (bit << ord); + break; + default: + break; + } + + temp.m_eq[i].Clear(); + } + else if (termSize > 1) + { + bitsLeft++; + } + } + + if (bitsLeft > 0) + { + if (sliceInM != 0) + { + z = m / sliceInM; + zBitsValid = 0xffffffff; + } + + do + { + bitsLeft = 0; + + for (UINT_32 i = 0; i < temp.m_numBits; i++) + { + UINT_32 termSize = temp.m_eq[i].getsize(); + + if (termSize == 1) + { + INT_8 bit = (addr >> i) & 1; + INT_8 dim = temp.m_eq[i][0].getdim(); + INT_8 ord = temp.m_eq[i][0].getord(); + + ADDR_ASSERT((ord < 32) || (bit == 0)); + + switch (dim) + { + case 'x': + xBitsValid |= (1 << ord); + x |= (bit << ord); + break; + case 'y': + yBitsValid |= (1 << ord); + y |= (bit << ord); + break; + case 'z': + zBitsValid |= (1 << ord); + z |= (bit << ord); + break; + case 's': + ADDR_ASSERT_ALWAYS(); + break; + case 'm': + ADDR_ASSERT_ALWAYS(); + break; + default: + break; + } + + temp.m_eq[i].Clear(); + } + else if (termSize > 1) + { + CoordTerm tmpTerm = temp.m_eq[i]; + + for (UINT_32 j = 0; j < termSize; j++) + { + INT_8 dim = temp.m_eq[i][j].getdim(); + INT_8 ord = temp.m_eq[i][j].getord(); + + switch (dim) + { + case 'x': + if (xBitsValid & (1 << ord)) + { + UINT_32 v = (((x >> ord) & 1) << i); + addr ^= static_cast(v); + tmpTerm.remove(temp.m_eq[i][j]); + } + break; + case 'y': + if (yBitsValid & (1 << ord)) + { + UINT_32 v = (((y >> ord) & 1) << i); + addr ^= static_cast(v); + tmpTerm.remove(temp.m_eq[i][j]); + } + break; + case 'z': + if (zBitsValid & (1 << ord)) + { + UINT_32 v = (((z >> ord) & 1) << i); + addr ^= static_cast(v); + tmpTerm.remove(temp.m_eq[i][j]); + } + break; + case 's': + ADDR_ASSERT_ALWAYS(); + break; + case 'm': + ADDR_ASSERT_ALWAYS(); + break; + default: + break; + } + } + + temp.m_eq[i] = tmpTerm; + + bitsLeft++; + } + } + } while (bitsLeft > 0); + } +} + +VOID CoordEq::copy(CoordEq& o, UINT_32 start, UINT_32 num) +{ + o.m_numBits = (num == 0xFFFFFFFF) ? m_numBits : num; + for (UINT_32 i = 0; i < o.m_numBits; i++) + { + m_eq[start + i].copyto(o.m_eq[i]); + } +} + +VOID CoordEq::reverse(UINT_32 start, UINT_32 num) +{ + UINT_32 n = (num == 0xFFFFFFFF) ? m_numBits : num; + + for (UINT_32 i = 0; i < n / 2; i++) + { + CoordTerm temp; + m_eq[start + i].copyto(temp); + m_eq[start + n - 1 - i].copyto(m_eq[start + i]); + temp.copyto(m_eq[start + n - 1 - i]); + } +} + +VOID CoordEq::xorin(CoordEq& x, UINT_32 start) +{ + UINT_32 n = ((m_numBits - start) < x.m_numBits) ? (m_numBits - start) : x.m_numBits; + for (UINT_32 i = 0; i < n; i++) + { + m_eq[start + i].add(x.m_eq[i]); + } +} + +UINT_32 CoordEq::Filter(INT_8 f, Coordinate& co, UINT_32 start, INT_8 axis) +{ + for (UINT_32 i = start; i < m_numBits;) + { + UINT_32 m = m_eq[i].Filter(f, co, 0, axis); + if (m == 0) + { + for (UINT_32 j = i; j < m_numBits - 1; j++) + { + m_eq[j] = m_eq[j + 1]; + } + m_numBits--; + } + else + { + i++; + } + } + return m_numBits; +} + +VOID CoordEq::shift(INT_32 amount, INT_32 start) +{ + if (amount != 0) + { + INT_32 numBits = static_cast(m_numBits); + amount = -amount; + INT_32 inc = (amount < 0) ? -1 : 1; + INT_32 i = (amount < 0) ? numBits - 1 : start; + INT_32 end = (amount < 0) ? start - 1 : numBits; + for (; (inc > 0) ? i < end : i > end; i += inc) + { + if ((i + amount < start) || (i + amount >= numBits)) + { + m_eq[i].Clear(); + } + else + { + m_eq[i + amount].copyto(m_eq[i]); + } + } + } +} + +CoordTerm& CoordEq::operator[](UINT_32 i) +{ + return m_eq[i]; +} + +VOID CoordEq::mort2d(Coordinate& c0, Coordinate& c1, UINT_32 start, UINT_32 end) +{ + if (end == 0) + { + ADDR_ASSERT(m_numBits > 0); + end = m_numBits - 1; + } + for (UINT_32 i = start; i <= end; i++) + { + UINT_32 select = (i - start) % 2; + Coordinate& c = (select == 0) ? c0 : c1; + m_eq[i].add(c); + c++; + } +} + +VOID CoordEq::mort3d(Coordinate& c0, Coordinate& c1, Coordinate& c2, UINT_32 start, UINT_32 end) +{ + if (end == 0) + { + ADDR_ASSERT(m_numBits > 0); + end = m_numBits - 1; + } + for (UINT_32 i = start; i <= end; i++) + { + UINT_32 select = (i - start) % 3; + Coordinate& c = (select == 0) ? c0 : ((select == 1) ? c1 : c2); + m_eq[i].add(c); + c++; + } +} + +BOOL_32 CoordEq::operator==(const CoordEq& b) +{ + BOOL_32 ret = TRUE; + + if (m_numBits != b.m_numBits) + { + ret = FALSE; + } + else + { + for (UINT_32 i = 0; i < m_numBits; i++) + { + if (m_eq[i] != b.m_eq[i]) + { + ret = FALSE; + break; + } + } + } + return ret; +} + +BOOL_32 CoordEq::operator!=(const CoordEq& b) +{ + return !(*this == b); +} + +} // V2 +} // Addr diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/coord.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/coord.h new file mode 100644 index 0000000000..72e93e0a18 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/core/coord.h @@ -0,0 +1,122 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +// Class used to define a coordinate bit + +#ifndef __COORD_H +#define __COORD_H + +namespace Addr +{ +namespace V2 +{ + +class Coordinate +{ +public: + Coordinate(); + Coordinate(INT_8 c, INT_32 n); + + VOID set(INT_8 c, INT_32 n); + UINT_32 ison(UINT_32 x, UINT_32 y, UINT_32 z = 0, UINT_32 s = 0, UINT_32 m = 0) const; + INT_8 getdim(); + INT_8 getord(); + + BOOL_32 operator==(const Coordinate& b); + BOOL_32 operator<(const Coordinate& b); + BOOL_32 operator>(const Coordinate& b); + BOOL_32 operator<=(const Coordinate& b); + BOOL_32 operator>=(const Coordinate& b); + BOOL_32 operator!=(const Coordinate& b); + Coordinate& operator++(INT_32); + +private: + INT_8 dim; + INT_8 ord; +}; + +class CoordTerm +{ +public: + CoordTerm(); + VOID Clear(); + VOID add(Coordinate& co); + VOID add(CoordTerm& cl); + BOOL_32 remove(Coordinate& co); + BOOL_32 Exists(Coordinate& co); + VOID copyto(CoordTerm& cl); + UINT_32 getsize(); + UINT_32 getxor(UINT_32 x, UINT_32 y, UINT_32 z = 0, UINT_32 s = 0, UINT_32 m = 0) const; + + VOID getsmallest(Coordinate& co); + UINT_32 Filter(INT_8 f, Coordinate& co, UINT_32 start = 0, INT_8 axis = '\0'); + Coordinate& operator[](UINT_32 i); + BOOL_32 operator==(const CoordTerm& b); + BOOL_32 operator!=(const CoordTerm& b); + BOOL_32 exceedRange(UINT_32 xRange, UINT_32 yRange = 0, UINT_32 zRange = 0, UINT_32 sRange = 0); + +private: + static const UINT_32 MaxCoords = 8; + UINT_32 num_coords; + Coordinate m_coord[MaxCoords]; +}; + +class CoordEq +{ +public: + CoordEq(); + VOID remove(Coordinate& co); + BOOL_32 Exists(Coordinate& co); + VOID resize(UINT_32 n); + UINT_32 getsize(); + virtual UINT_64 solve(UINT_32 x, UINT_32 y, UINT_32 z = 0, UINT_32 s = 0, UINT_32 m = 0) const; + virtual VOID solveAddr(UINT_64 addr, UINT_32 sliceInM, + UINT_32& x, UINT_32& y, UINT_32& z, UINT_32& s, UINT_32& m) const; + + VOID copy(CoordEq& o, UINT_32 start = 0, UINT_32 num = 0xFFFFFFFF); + VOID reverse(UINT_32 start = 0, UINT_32 num = 0xFFFFFFFF); + VOID xorin(CoordEq& x, UINT_32 start = 0); + UINT_32 Filter(INT_8 f, Coordinate& co, UINT_32 start = 0, INT_8 axis = '\0'); + VOID shift(INT_32 amount, INT_32 start = 0); + virtual CoordTerm& operator[](UINT_32 i); + VOID mort2d(Coordinate& c0, Coordinate& c1, UINT_32 start = 0, UINT_32 end = 0); + VOID mort3d(Coordinate& c0, Coordinate& c1, Coordinate& c2, UINT_32 start = 0, UINT_32 end = 0); + + BOOL_32 operator==(const CoordEq& b); + BOOL_32 operator!=(const CoordEq& b); + +private: + static const UINT_32 MaxEqBits = 64; + UINT_32 m_numBits; + + CoordTerm m_eq[MaxEqBits]; +}; + +} // V2 +} // Addr + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10SwizzlePattern.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10SwizzlePattern.h new file mode 100644 index 0000000000..45d3809d9f --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10SwizzlePattern.h @@ -0,0 +1,6119 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +************************************************************************************************************************ +* @file gfx10SwizzlePattern.h +* @brief swizzle pattern for gfx10. +************************************************************************************************************************ +*/ + +#ifndef __GFX10_SWIZZLE_PATTERN_H__ +#define __GFX10_SWIZZLE_PATTERN_H__ + +namespace Addr +{ +namespace V2 +{ +/** +************************************************************************************************************************ +* @brief Bit setting for swizzle pattern +************************************************************************************************************************ +*/ +union ADDR_BIT_SETTING +{ + struct + { + UINT_16 x; + UINT_16 y; + UINT_16 z; + UINT_16 s; + }; + UINT_64 value; +}; + +/** +************************************************************************************************************************ +* @brief Swizzle pattern information +************************************************************************************************************************ +*/ +struct ADDR_SW_PATINFO +{ + UINT_8 maxItemCount; + UINT_8 nibble01Idx; + UINT_16 nibble2Idx; + UINT_16 nibble3Idx; + UINT_8 nibble4Idx; +}; + +/** +************************************************************************************************************************ +* InitBit +* +* @brief +* Initialize bit setting value via a return value +************************************************************************************************************************ +*/ +#define InitBit(c, index) (1ull << ((c << 4) + index)) + +const UINT_64 X0 = InitBit(0, 0); +const UINT_64 X1 = InitBit(0, 1); +const UINT_64 X2 = InitBit(0, 2); +const UINT_64 X3 = InitBit(0, 3); +const UINT_64 X4 = InitBit(0, 4); +const UINT_64 X5 = InitBit(0, 5); +const UINT_64 X6 = InitBit(0, 6); +const UINT_64 X7 = InitBit(0, 7); +const UINT_64 X8 = InitBit(0, 8); +const UINT_64 X9 = InitBit(0, 9); +const UINT_64 X10 = InitBit(0, 10); +const UINT_64 X11 = InitBit(0, 11); + +const UINT_64 Y0 = InitBit(1, 0); +const UINT_64 Y1 = InitBit(1, 1); +const UINT_64 Y2 = InitBit(1, 2); +const UINT_64 Y3 = InitBit(1, 3); +const UINT_64 Y4 = InitBit(1, 4); +const UINT_64 Y5 = InitBit(1, 5); +const UINT_64 Y6 = InitBit(1, 6); +const UINT_64 Y7 = InitBit(1, 7); +const UINT_64 Y8 = InitBit(1, 8); +const UINT_64 Y9 = InitBit(1, 9); +const UINT_64 Y10 = InitBit(1, 10); +const UINT_64 Y11 = InitBit(1, 11); + +const UINT_64 Z0 = InitBit(2, 0); +const UINT_64 Z1 = InitBit(2, 1); +const UINT_64 Z2 = InitBit(2, 2); +const UINT_64 Z3 = InitBit(2, 3); +const UINT_64 Z4 = InitBit(2, 4); +const UINT_64 Z5 = InitBit(2, 5); +const UINT_64 Z6 = InitBit(2, 6); +const UINT_64 Z7 = InitBit(2, 7); +const UINT_64 Z8 = InitBit(2, 8); + +const UINT_64 S0 = InitBit(3, 0); +const UINT_64 S1 = InitBit(3, 1); +const UINT_64 S2 = InitBit(3, 2); + +const ADDR_SW_PATINFO SW_256_S_PATINFO[] = +{ + { 1, 0, 0, 0, 0, } , // 1 pipes 1 bpe @ SW_256_S @ Navi1x + { 1, 1, 0, 0, 0, } , // 1 pipes 2 bpe @ SW_256_S @ Navi1x + { 1, 2, 0, 0, 0, } , // 1 pipes 4 bpe @ SW_256_S @ Navi1x + { 1, 3, 0, 0, 0, } , // 1 pipes 8 bpe @ SW_256_S @ Navi1x + { 1, 4, 0, 0, 0, } , // 1 pipes 16 bpe @ SW_256_S @ Navi1x + { 1, 0, 0, 0, 0, } , // 2 pipes 1 bpe @ SW_256_S @ Navi1x + { 1, 1, 0, 0, 0, } , // 2 pipes 2 bpe @ SW_256_S @ Navi1x + { 1, 2, 0, 0, 0, } , // 2 pipes 4 bpe @ SW_256_S @ Navi1x + { 1, 3, 0, 0, 0, } , // 2 pipes 8 bpe @ SW_256_S @ Navi1x + { 1, 4, 0, 0, 0, } , // 2 pipes 16 bpe @ SW_256_S @ Navi1x + { 1, 0, 0, 0, 0, } , // 4 pipes 1 bpe @ SW_256_S @ Navi1x + { 1, 1, 0, 0, 0, } , // 4 pipes 2 bpe @ SW_256_S @ Navi1x + { 1, 2, 0, 0, 0, } , // 4 pipes 4 bpe @ SW_256_S @ Navi1x + { 1, 3, 0, 0, 0, } , // 4 pipes 8 bpe @ SW_256_S @ Navi1x + { 1, 4, 0, 0, 0, } , // 4 pipes 16 bpe @ SW_256_S @ Navi1x + { 1, 0, 0, 0, 0, } , // 8 pipes 1 bpe @ SW_256_S @ Navi1x + { 1, 1, 0, 0, 0, } , // 8 pipes 2 bpe @ SW_256_S @ Navi1x + { 1, 2, 0, 0, 0, } , // 8 pipes 4 bpe @ SW_256_S @ Navi1x + { 1, 3, 0, 0, 0, } , // 8 pipes 8 bpe @ SW_256_S @ Navi1x + { 1, 4, 0, 0, 0, } , // 8 pipes 16 bpe @ SW_256_S @ Navi1x + { 1, 0, 0, 0, 0, } , // 16 pipes 1 bpe @ SW_256_S @ Navi1x + { 1, 1, 0, 0, 0, } , // 16 pipes 2 bpe @ SW_256_S @ Navi1x + { 1, 2, 0, 0, 0, } , // 16 pipes 4 bpe @ SW_256_S @ Navi1x + { 1, 3, 0, 0, 0, } , // 16 pipes 8 bpe @ SW_256_S @ Navi1x + { 1, 4, 0, 0, 0, } , // 16 pipes 16 bpe @ SW_256_S @ Navi1x + { 1, 0, 0, 0, 0, } , // 32 pipes 1 bpe @ SW_256_S @ Navi1x + { 1, 1, 0, 0, 0, } , // 32 pipes 2 bpe @ SW_256_S @ Navi1x + { 1, 2, 0, 0, 0, } , // 32 pipes 4 bpe @ SW_256_S @ Navi1x + { 1, 3, 0, 0, 0, } , // 32 pipes 8 bpe @ SW_256_S @ Navi1x + { 1, 4, 0, 0, 0, } , // 32 pipes 16 bpe @ SW_256_S @ Navi1x + { 1, 0, 0, 0, 0, } , // 64 pipes 1 bpe @ SW_256_S @ Navi1x + { 1, 1, 0, 0, 0, } , // 64 pipes 2 bpe @ SW_256_S @ Navi1x + { 1, 2, 0, 0, 0, } , // 64 pipes 4 bpe @ SW_256_S @ Navi1x + { 1, 3, 0, 0, 0, } , // 64 pipes 8 bpe @ SW_256_S @ Navi1x + { 1, 4, 0, 0, 0, } , // 64 pipes 16 bpe @ SW_256_S @ Navi1x +}; + +const ADDR_SW_PATINFO SW_256_D_PATINFO[] = +{ + { 1, 5, 0, 0, 0, } , // 1 pipes 1 bpe @ SW_256_D @ Navi1x + { 1, 1, 0, 0, 0, } , // 1 pipes 2 bpe @ SW_256_D @ Navi1x + { 1, 2, 0, 0, 0, } , // 1 pipes 4 bpe @ SW_256_D @ Navi1x + { 1, 6, 0, 0, 0, } , // 1 pipes 8 bpe @ SW_256_D @ Navi1x + { 1, 7, 0, 0, 0, } , // 1 pipes 16 bpe @ SW_256_D @ Navi1x + { 1, 5, 0, 0, 0, } , // 2 pipes 1 bpe @ SW_256_D @ Navi1x + { 1, 1, 0, 0, 0, } , // 2 pipes 2 bpe @ SW_256_D @ Navi1x + { 1, 2, 0, 0, 0, } , // 2 pipes 4 bpe @ SW_256_D @ Navi1x + { 1, 6, 0, 0, 0, } , // 2 pipes 8 bpe @ SW_256_D @ Navi1x + { 1, 7, 0, 0, 0, } , // 2 pipes 16 bpe @ SW_256_D @ Navi1x + { 1, 5, 0, 0, 0, } , // 4 pipes 1 bpe @ SW_256_D @ Navi1x + { 1, 1, 0, 0, 0, } , // 4 pipes 2 bpe @ SW_256_D @ Navi1x + { 1, 2, 0, 0, 0, } , // 4 pipes 4 bpe @ SW_256_D @ Navi1x + { 1, 6, 0, 0, 0, } , // 4 pipes 8 bpe @ SW_256_D @ Navi1x + { 1, 7, 0, 0, 0, } , // 4 pipes 16 bpe @ SW_256_D @ Navi1x + { 1, 5, 0, 0, 0, } , // 8 pipes 1 bpe @ SW_256_D @ Navi1x + { 1, 1, 0, 0, 0, } , // 8 pipes 2 bpe @ SW_256_D @ Navi1x + { 1, 2, 0, 0, 0, } , // 8 pipes 4 bpe @ SW_256_D @ Navi1x + { 1, 6, 0, 0, 0, } , // 8 pipes 8 bpe @ SW_256_D @ Navi1x + { 1, 7, 0, 0, 0, } , // 8 pipes 16 bpe @ SW_256_D @ Navi1x + { 1, 5, 0, 0, 0, } , // 16 pipes 1 bpe @ SW_256_D @ Navi1x + { 1, 1, 0, 0, 0, } , // 16 pipes 2 bpe @ SW_256_D @ Navi1x + { 1, 2, 0, 0, 0, } , // 16 pipes 4 bpe @ SW_256_D @ Navi1x + { 1, 6, 0, 0, 0, } , // 16 pipes 8 bpe @ SW_256_D @ Navi1x + { 1, 7, 0, 0, 0, } , // 16 pipes 16 bpe @ SW_256_D @ Navi1x + { 1, 5, 0, 0, 0, } , // 32 pipes 1 bpe @ SW_256_D @ Navi1x + { 1, 1, 0, 0, 0, } , // 32 pipes 2 bpe @ SW_256_D @ Navi1x + { 1, 2, 0, 0, 0, } , // 32 pipes 4 bpe @ SW_256_D @ Navi1x + { 1, 6, 0, 0, 0, } , // 32 pipes 8 bpe @ SW_256_D @ Navi1x + { 1, 7, 0, 0, 0, } , // 32 pipes 16 bpe @ SW_256_D @ Navi1x + { 1, 5, 0, 0, 0, } , // 64 pipes 1 bpe @ SW_256_D @ Navi1x + { 1, 1, 0, 0, 0, } , // 64 pipes 2 bpe @ SW_256_D @ Navi1x + { 1, 2, 0, 0, 0, } , // 64 pipes 4 bpe @ SW_256_D @ Navi1x + { 1, 6, 0, 0, 0, } , // 64 pipes 8 bpe @ SW_256_D @ Navi1x + { 1, 7, 0, 0, 0, } , // 64 pipes 16 bpe @ SW_256_D @ Navi1x +}; + +const ADDR_SW_PATINFO SW_4K_S_PATINFO[] = +{ + { 1, 0, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S @ Navi1x + { 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S @ Navi1x + { 1, 2, 3, 0, 0, } , // 1 pipes 4 bpe @ SW_4K_S @ Navi1x + { 1, 3, 4, 0, 0, } , // 1 pipes 8 bpe @ SW_4K_S @ Navi1x + { 1, 4, 5, 0, 0, } , // 1 pipes 16 bpe @ SW_4K_S @ Navi1x + { 1, 0, 1, 0, 0, } , // 2 pipes 1 bpe @ SW_4K_S @ Navi1x + { 1, 1, 2, 0, 0, } , // 2 pipes 2 bpe @ SW_4K_S @ Navi1x + { 1, 2, 3, 0, 0, } , // 2 pipes 4 bpe @ SW_4K_S @ Navi1x + { 1, 3, 4, 0, 0, } , // 2 pipes 8 bpe @ SW_4K_S @ Navi1x + { 1, 4, 5, 0, 0, } , // 2 pipes 16 bpe @ SW_4K_S @ Navi1x + { 1, 0, 1, 0, 0, } , // 4 pipes 1 bpe @ SW_4K_S @ Navi1x + { 1, 1, 2, 0, 0, } , // 4 pipes 2 bpe @ SW_4K_S @ Navi1x + { 1, 2, 3, 0, 0, } , // 4 pipes 4 bpe @ SW_4K_S @ Navi1x + { 1, 3, 4, 0, 0, } , // 4 pipes 8 bpe @ SW_4K_S @ Navi1x + { 1, 4, 5, 0, 0, } , // 4 pipes 16 bpe @ SW_4K_S @ Navi1x + { 1, 0, 1, 0, 0, } , // 8 pipes 1 bpe @ SW_4K_S @ Navi1x + { 1, 1, 2, 0, 0, } , // 8 pipes 2 bpe @ SW_4K_S @ Navi1x + { 1, 2, 3, 0, 0, } , // 8 pipes 4 bpe @ SW_4K_S @ Navi1x + { 1, 3, 4, 0, 0, } , // 8 pipes 8 bpe @ SW_4K_S @ Navi1x + { 1, 4, 5, 0, 0, } , // 8 pipes 16 bpe @ SW_4K_S @ Navi1x + { 1, 0, 1, 0, 0, } , // 16 pipes 1 bpe @ SW_4K_S @ Navi1x + { 1, 1, 2, 0, 0, } , // 16 pipes 2 bpe @ SW_4K_S @ Navi1x + { 1, 2, 3, 0, 0, } , // 16 pipes 4 bpe @ SW_4K_S @ Navi1x + { 1, 3, 4, 0, 0, } , // 16 pipes 8 bpe @ SW_4K_S @ Navi1x + { 1, 4, 5, 0, 0, } , // 16 pipes 16 bpe @ SW_4K_S @ Navi1x + { 1, 0, 1, 0, 0, } , // 32 pipes 1 bpe @ SW_4K_S @ Navi1x + { 1, 1, 2, 0, 0, } , // 32 pipes 2 bpe @ SW_4K_S @ Navi1x + { 1, 2, 3, 0, 0, } , // 32 pipes 4 bpe @ SW_4K_S @ Navi1x + { 1, 3, 4, 0, 0, } , // 32 pipes 8 bpe @ SW_4K_S @ Navi1x + { 1, 4, 5, 0, 0, } , // 32 pipes 16 bpe @ SW_4K_S @ Navi1x + { 1, 0, 1, 0, 0, } , // 64 pipes 1 bpe @ SW_4K_S @ Navi1x + { 1, 1, 2, 0, 0, } , // 64 pipes 2 bpe @ SW_4K_S @ Navi1x + { 1, 2, 3, 0, 0, } , // 64 pipes 4 bpe @ SW_4K_S @ Navi1x + { 1, 3, 4, 0, 0, } , // 64 pipes 8 bpe @ SW_4K_S @ Navi1x + { 1, 4, 5, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S @ Navi1x +}; + +const ADDR_SW_PATINFO SW_4K_D_PATINFO[] = +{ + { 1, 5, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_D @ Navi1x + { 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_D @ Navi1x + { 1, 2, 3, 0, 0, } , // 1 pipes 4 bpe @ SW_4K_D @ Navi1x + { 1, 6, 4, 0, 0, } , // 1 pipes 8 bpe @ SW_4K_D @ Navi1x + { 1, 7, 5, 0, 0, } , // 1 pipes 16 bpe @ SW_4K_D @ Navi1x + { 1, 5, 1, 0, 0, } , // 2 pipes 1 bpe @ SW_4K_D @ Navi1x + { 1, 1, 2, 0, 0, } , // 2 pipes 2 bpe @ SW_4K_D @ Navi1x + { 1, 2, 3, 0, 0, } , // 2 pipes 4 bpe @ SW_4K_D @ Navi1x + { 1, 6, 4, 0, 0, } , // 2 pipes 8 bpe @ SW_4K_D @ Navi1x + { 1, 7, 5, 0, 0, } , // 2 pipes 16 bpe @ SW_4K_D @ Navi1x + { 1, 5, 1, 0, 0, } , // 4 pipes 1 bpe @ SW_4K_D @ Navi1x + { 1, 1, 2, 0, 0, } , // 4 pipes 2 bpe @ SW_4K_D @ Navi1x + { 1, 2, 3, 0, 0, } , // 4 pipes 4 bpe @ SW_4K_D @ Navi1x + { 1, 6, 4, 0, 0, } , // 4 pipes 8 bpe @ SW_4K_D @ Navi1x + { 1, 7, 5, 0, 0, } , // 4 pipes 16 bpe @ SW_4K_D @ Navi1x + { 1, 5, 1, 0, 0, } , // 8 pipes 1 bpe @ SW_4K_D @ Navi1x + { 1, 1, 2, 0, 0, } , // 8 pipes 2 bpe @ SW_4K_D @ Navi1x + { 1, 2, 3, 0, 0, } , // 8 pipes 4 bpe @ SW_4K_D @ Navi1x + { 1, 6, 4, 0, 0, } , // 8 pipes 8 bpe @ SW_4K_D @ Navi1x + { 1, 7, 5, 0, 0, } , // 8 pipes 16 bpe @ SW_4K_D @ Navi1x + { 1, 5, 1, 0, 0, } , // 16 pipes 1 bpe @ SW_4K_D @ Navi1x + { 1, 1, 2, 0, 0, } , // 16 pipes 2 bpe @ SW_4K_D @ Navi1x + { 1, 2, 3, 0, 0, } , // 16 pipes 4 bpe @ SW_4K_D @ Navi1x + { 1, 6, 4, 0, 0, } , // 16 pipes 8 bpe @ SW_4K_D @ Navi1x + { 1, 7, 5, 0, 0, } , // 16 pipes 16 bpe @ SW_4K_D @ Navi1x + { 1, 5, 1, 0, 0, } , // 32 pipes 1 bpe @ SW_4K_D @ Navi1x + { 1, 1, 2, 0, 0, } , // 32 pipes 2 bpe @ SW_4K_D @ Navi1x + { 1, 2, 3, 0, 0, } , // 32 pipes 4 bpe @ SW_4K_D @ Navi1x + { 1, 6, 4, 0, 0, } , // 32 pipes 8 bpe @ SW_4K_D @ Navi1x + { 1, 7, 5, 0, 0, } , // 32 pipes 16 bpe @ SW_4K_D @ Navi1x + { 1, 5, 1, 0, 0, } , // 64 pipes 1 bpe @ SW_4K_D @ Navi1x + { 1, 1, 2, 0, 0, } , // 64 pipes 2 bpe @ SW_4K_D @ Navi1x + { 1, 2, 3, 0, 0, } , // 64 pipes 4 bpe @ SW_4K_D @ Navi1x + { 1, 6, 4, 0, 0, } , // 64 pipes 8 bpe @ SW_4K_D @ Navi1x + { 1, 7, 5, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_D @ Navi1x +}; + +const ADDR_SW_PATINFO SW_4K_S_X_PATINFO[] = +{ + { 1, 0, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S_X @ Navi1x + { 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S_X @ Navi1x + { 1, 2, 3, 0, 0, } , // 1 pipes 4 bpe @ SW_4K_S_X @ Navi1x + { 1, 3, 4, 0, 0, } , // 1 pipes 8 bpe @ SW_4K_S_X @ Navi1x + { 1, 4, 5, 0, 0, } , // 1 pipes 16 bpe @ SW_4K_S_X @ Navi1x + { 3, 0, 6, 0, 0, } , // 2 pipes 1 bpe @ SW_4K_S_X @ Navi1x + { 3, 1, 7, 0, 0, } , // 2 pipes 2 bpe @ SW_4K_S_X @ Navi1x + { 3, 2, 8, 0, 0, } , // 2 pipes 4 bpe @ SW_4K_S_X @ Navi1x + { 3, 3, 9, 0, 0, } , // 2 pipes 8 bpe @ SW_4K_S_X @ Navi1x + { 3, 4, 10, 0, 0, } , // 2 pipes 16 bpe @ SW_4K_S_X @ Navi1x + { 3, 0, 11, 0, 0, } , // 4 pipes 1 bpe @ SW_4K_S_X @ Navi1x + { 3, 1, 12, 0, 0, } , // 4 pipes 2 bpe @ SW_4K_S_X @ Navi1x + { 3, 2, 13, 0, 0, } , // 4 pipes 4 bpe @ SW_4K_S_X @ Navi1x + { 3, 3, 14, 0, 0, } , // 4 pipes 8 bpe @ SW_4K_S_X @ Navi1x + { 3, 4, 15, 0, 0, } , // 4 pipes 16 bpe @ SW_4K_S_X @ Navi1x + { 3, 0, 16, 0, 0, } , // 8 pipes 1 bpe @ SW_4K_S_X @ Navi1x + { 3, 1, 17, 0, 0, } , // 8 pipes 2 bpe @ SW_4K_S_X @ Navi1x + { 3, 2, 18, 0, 0, } , // 8 pipes 4 bpe @ SW_4K_S_X @ Navi1x + { 3, 3, 19, 0, 0, } , // 8 pipes 8 bpe @ SW_4K_S_X @ Navi1x + { 3, 4, 20, 0, 0, } , // 8 pipes 16 bpe @ SW_4K_S_X @ Navi1x + { 3, 0, 21, 0, 0, } , // 16 pipes 1 bpe @ SW_4K_S_X @ Navi1x + { 3, 1, 22, 0, 0, } , // 16 pipes 2 bpe @ SW_4K_S_X @ Navi1x + { 3, 2, 23, 0, 0, } , // 16 pipes 4 bpe @ SW_4K_S_X @ Navi1x + { 3, 3, 24, 0, 0, } , // 16 pipes 8 bpe @ SW_4K_S_X @ Navi1x + { 3, 4, 25, 0, 0, } , // 16 pipes 16 bpe @ SW_4K_S_X @ Navi1x + { 3, 0, 21, 0, 0, } , // 32 pipes 1 bpe @ SW_4K_S_X @ Navi1x + { 3, 1, 22, 0, 0, } , // 32 pipes 2 bpe @ SW_4K_S_X @ Navi1x + { 3, 2, 23, 0, 0, } , // 32 pipes 4 bpe @ SW_4K_S_X @ Navi1x + { 3, 3, 24, 0, 0, } , // 32 pipes 8 bpe @ SW_4K_S_X @ Navi1x + { 3, 4, 25, 0, 0, } , // 32 pipes 16 bpe @ SW_4K_S_X @ Navi1x + { 3, 0, 21, 0, 0, } , // 64 pipes 1 bpe @ SW_4K_S_X @ Navi1x + { 3, 1, 22, 0, 0, } , // 64 pipes 2 bpe @ SW_4K_S_X @ Navi1x + { 3, 2, 23, 0, 0, } , // 64 pipes 4 bpe @ SW_4K_S_X @ Navi1x + { 3, 3, 24, 0, 0, } , // 64 pipes 8 bpe @ SW_4K_S_X @ Navi1x + { 3, 4, 25, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S_X @ Navi1x +}; + +const ADDR_SW_PATINFO SW_4K_D_X_PATINFO[] = +{ + { 1, 5, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_D_X @ Navi1x + { 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_D_X @ Navi1x + { 1, 2, 3, 0, 0, } , // 1 pipes 4 bpe @ SW_4K_D_X @ Navi1x + { 1, 6, 4, 0, 0, } , // 1 pipes 8 bpe @ SW_4K_D_X @ Navi1x + { 1, 7, 5, 0, 0, } , // 1 pipes 16 bpe @ SW_4K_D_X @ Navi1x + { 3, 5, 6, 0, 0, } , // 2 pipes 1 bpe @ SW_4K_D_X @ Navi1x + { 3, 1, 7, 0, 0, } , // 2 pipes 2 bpe @ SW_4K_D_X @ Navi1x + { 3, 2, 8, 0, 0, } , // 2 pipes 4 bpe @ SW_4K_D_X @ Navi1x + { 3, 6, 9, 0, 0, } , // 2 pipes 8 bpe @ SW_4K_D_X @ Navi1x + { 3, 7, 10, 0, 0, } , // 2 pipes 16 bpe @ SW_4K_D_X @ Navi1x + { 3, 5, 11, 0, 0, } , // 4 pipes 1 bpe @ SW_4K_D_X @ Navi1x + { 3, 1, 12, 0, 0, } , // 4 pipes 2 bpe @ SW_4K_D_X @ Navi1x + { 3, 2, 13, 0, 0, } , // 4 pipes 4 bpe @ SW_4K_D_X @ Navi1x + { 3, 6, 14, 0, 0, } , // 4 pipes 8 bpe @ SW_4K_D_X @ Navi1x + { 3, 7, 15, 0, 0, } , // 4 pipes 16 bpe @ SW_4K_D_X @ Navi1x + { 3, 5, 16, 0, 0, } , // 8 pipes 1 bpe @ SW_4K_D_X @ Navi1x + { 3, 1, 17, 0, 0, } , // 8 pipes 2 bpe @ SW_4K_D_X @ Navi1x + { 3, 2, 18, 0, 0, } , // 8 pipes 4 bpe @ SW_4K_D_X @ Navi1x + { 3, 6, 19, 0, 0, } , // 8 pipes 8 bpe @ SW_4K_D_X @ Navi1x + { 3, 7, 20, 0, 0, } , // 8 pipes 16 bpe @ SW_4K_D_X @ Navi1x + { 3, 5, 21, 0, 0, } , // 16 pipes 1 bpe @ SW_4K_D_X @ Navi1x + { 3, 1, 22, 0, 0, } , // 16 pipes 2 bpe @ SW_4K_D_X @ Navi1x + { 3, 2, 23, 0, 0, } , // 16 pipes 4 bpe @ SW_4K_D_X @ Navi1x + { 3, 6, 24, 0, 0, } , // 16 pipes 8 bpe @ SW_4K_D_X @ Navi1x + { 3, 7, 25, 0, 0, } , // 16 pipes 16 bpe @ SW_4K_D_X @ Navi1x + { 3, 5, 21, 0, 0, } , // 32 pipes 1 bpe @ SW_4K_D_X @ Navi1x + { 3, 1, 22, 0, 0, } , // 32 pipes 2 bpe @ SW_4K_D_X @ Navi1x + { 3, 2, 23, 0, 0, } , // 32 pipes 4 bpe @ SW_4K_D_X @ Navi1x + { 3, 6, 24, 0, 0, } , // 32 pipes 8 bpe @ SW_4K_D_X @ Navi1x + { 3, 7, 25, 0, 0, } , // 32 pipes 16 bpe @ SW_4K_D_X @ Navi1x + { 3, 5, 21, 0, 0, } , // 64 pipes 1 bpe @ SW_4K_D_X @ Navi1x + { 3, 1, 22, 0, 0, } , // 64 pipes 2 bpe @ SW_4K_D_X @ Navi1x + { 3, 2, 23, 0, 0, } , // 64 pipes 4 bpe @ SW_4K_D_X @ Navi1x + { 3, 6, 24, 0, 0, } , // 64 pipes 8 bpe @ SW_4K_D_X @ Navi1x + { 3, 7, 25, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_D_X @ Navi1x +}; + +const ADDR_SW_PATINFO SW_4K_S3_PATINFO[] = +{ + { 1, 29, 131, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S3 @ Navi1x + { 1, 30, 132, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S3 @ Navi1x + { 1, 31, 133, 0, 0, } , // 1 pipes 4 bpe @ SW_4K_S3 @ Navi1x + { 1, 32, 134, 0, 0, } , // 1 pipes 8 bpe @ SW_4K_S3 @ Navi1x + { 1, 33, 135, 0, 0, } , // 1 pipes 16 bpe @ SW_4K_S3 @ Navi1x + { 1, 29, 131, 0, 0, } , // 2 pipes 1 bpe @ SW_4K_S3 @ Navi1x + { 1, 30, 132, 0, 0, } , // 2 pipes 2 bpe @ SW_4K_S3 @ Navi1x + { 1, 31, 133, 0, 0, } , // 2 pipes 4 bpe @ SW_4K_S3 @ Navi1x + { 1, 32, 134, 0, 0, } , // 2 pipes 8 bpe @ SW_4K_S3 @ Navi1x + { 1, 33, 135, 0, 0, } , // 2 pipes 16 bpe @ SW_4K_S3 @ Navi1x + { 1, 29, 131, 0, 0, } , // 4 pipes 1 bpe @ SW_4K_S3 @ Navi1x + { 1, 30, 132, 0, 0, } , // 4 pipes 2 bpe @ SW_4K_S3 @ Navi1x + { 1, 31, 133, 0, 0, } , // 4 pipes 4 bpe @ SW_4K_S3 @ Navi1x + { 1, 32, 134, 0, 0, } , // 4 pipes 8 bpe @ SW_4K_S3 @ Navi1x + { 1, 33, 135, 0, 0, } , // 4 pipes 16 bpe @ SW_4K_S3 @ Navi1x + { 1, 29, 131, 0, 0, } , // 8 pipes 1 bpe @ SW_4K_S3 @ Navi1x + { 1, 30, 132, 0, 0, } , // 8 pipes 2 bpe @ SW_4K_S3 @ Navi1x + { 1, 31, 133, 0, 0, } , // 8 pipes 4 bpe @ SW_4K_S3 @ Navi1x + { 1, 32, 134, 0, 0, } , // 8 pipes 8 bpe @ SW_4K_S3 @ Navi1x + { 1, 33, 135, 0, 0, } , // 8 pipes 16 bpe @ SW_4K_S3 @ Navi1x + { 1, 29, 131, 0, 0, } , // 16 pipes 1 bpe @ SW_4K_S3 @ Navi1x + { 1, 30, 132, 0, 0, } , // 16 pipes 2 bpe @ SW_4K_S3 @ Navi1x + { 1, 31, 133, 0, 0, } , // 16 pipes 4 bpe @ SW_4K_S3 @ Navi1x + { 1, 32, 134, 0, 0, } , // 16 pipes 8 bpe @ SW_4K_S3 @ Navi1x + { 1, 33, 135, 0, 0, } , // 16 pipes 16 bpe @ SW_4K_S3 @ Navi1x + { 1, 29, 131, 0, 0, } , // 32 pipes 1 bpe @ SW_4K_S3 @ Navi1x + { 1, 30, 132, 0, 0, } , // 32 pipes 2 bpe @ SW_4K_S3 @ Navi1x + { 1, 31, 133, 0, 0, } , // 32 pipes 4 bpe @ SW_4K_S3 @ Navi1x + { 1, 32, 134, 0, 0, } , // 32 pipes 8 bpe @ SW_4K_S3 @ Navi1x + { 1, 33, 135, 0, 0, } , // 32 pipes 16 bpe @ SW_4K_S3 @ Navi1x + { 1, 29, 131, 0, 0, } , // 64 pipes 1 bpe @ SW_4K_S3 @ Navi1x + { 1, 30, 132, 0, 0, } , // 64 pipes 2 bpe @ SW_4K_S3 @ Navi1x + { 1, 31, 133, 0, 0, } , // 64 pipes 4 bpe @ SW_4K_S3 @ Navi1x + { 1, 32, 134, 0, 0, } , // 64 pipes 8 bpe @ SW_4K_S3 @ Navi1x + { 1, 33, 135, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S3 @ Navi1x +}; + +const ADDR_SW_PATINFO SW_4K_S3_X_PATINFO[] = +{ + { 1, 29, 131, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S3_X @ Navi1x + { 1, 30, 132, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S3_X @ Navi1x + { 1, 31, 133, 0, 0, } , // 1 pipes 4 bpe @ SW_4K_S3_X @ Navi1x + { 1, 32, 134, 0, 0, } , // 1 pipes 8 bpe @ SW_4K_S3_X @ Navi1x + { 1, 33, 135, 0, 0, } , // 1 pipes 16 bpe @ SW_4K_S3_X @ Navi1x + { 3, 29, 136, 0, 0, } , // 2 pipes 1 bpe @ SW_4K_S3_X @ Navi1x + { 3, 30, 137, 0, 0, } , // 2 pipes 2 bpe @ SW_4K_S3_X @ Navi1x + { 3, 31, 138, 0, 0, } , // 2 pipes 4 bpe @ SW_4K_S3_X @ Navi1x + { 3, 32, 139, 0, 0, } , // 2 pipes 8 bpe @ SW_4K_S3_X @ Navi1x + { 3, 33, 140, 0, 0, } , // 2 pipes 16 bpe @ SW_4K_S3_X @ Navi1x + { 3, 29, 141, 0, 0, } , // 4 pipes 1 bpe @ SW_4K_S3_X @ Navi1x + { 3, 30, 142, 0, 0, } , // 4 pipes 2 bpe @ SW_4K_S3_X @ Navi1x + { 3, 31, 143, 0, 0, } , // 4 pipes 4 bpe @ SW_4K_S3_X @ Navi1x + { 3, 32, 144, 0, 0, } , // 4 pipes 8 bpe @ SW_4K_S3_X @ Navi1x + { 3, 33, 145, 0, 0, } , // 4 pipes 16 bpe @ SW_4K_S3_X @ Navi1x + { 3, 29, 146, 0, 0, } , // 8 pipes 1 bpe @ SW_4K_S3_X @ Navi1x + { 3, 30, 147, 0, 0, } , // 8 pipes 2 bpe @ SW_4K_S3_X @ Navi1x + { 3, 31, 148, 0, 0, } , // 8 pipes 4 bpe @ SW_4K_S3_X @ Navi1x + { 3, 32, 149, 0, 0, } , // 8 pipes 8 bpe @ SW_4K_S3_X @ Navi1x + { 3, 33, 150, 0, 0, } , // 8 pipes 16 bpe @ SW_4K_S3_X @ Navi1x + { 3, 29, 151, 0, 0, } , // 16 pipes 1 bpe @ SW_4K_S3_X @ Navi1x + { 3, 30, 152, 0, 0, } , // 16 pipes 2 bpe @ SW_4K_S3_X @ Navi1x + { 3, 31, 153, 0, 0, } , // 16 pipes 4 bpe @ SW_4K_S3_X @ Navi1x + { 3, 32, 154, 0, 0, } , // 16 pipes 8 bpe @ SW_4K_S3_X @ Navi1x + { 3, 33, 155, 0, 0, } , // 16 pipes 16 bpe @ SW_4K_S3_X @ Navi1x + { 3, 29, 151, 0, 0, } , // 32 pipes 1 bpe @ SW_4K_S3_X @ Navi1x + { 3, 30, 152, 0, 0, } , // 32 pipes 2 bpe @ SW_4K_S3_X @ Navi1x + { 3, 31, 153, 0, 0, } , // 32 pipes 4 bpe @ SW_4K_S3_X @ Navi1x + { 3, 32, 154, 0, 0, } , // 32 pipes 8 bpe @ SW_4K_S3_X @ Navi1x + { 3, 33, 155, 0, 0, } , // 32 pipes 16 bpe @ SW_4K_S3_X @ Navi1x + { 3, 29, 151, 0, 0, } , // 64 pipes 1 bpe @ SW_4K_S3_X @ Navi1x + { 3, 30, 152, 0, 0, } , // 64 pipes 2 bpe @ SW_4K_S3_X @ Navi1x + { 3, 31, 153, 0, 0, } , // 64 pipes 4 bpe @ SW_4K_S3_X @ Navi1x + { 3, 32, 154, 0, 0, } , // 64 pipes 8 bpe @ SW_4K_S3_X @ Navi1x + { 3, 33, 155, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S3_X @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_S_PATINFO[] = +{ + { 1, 0, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_S @ Navi1x + { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_S @ Navi1x + { 1, 2, 3, 3, 0, } , // 1 pipes 4 bpe @ SW_64K_S @ Navi1x + { 1, 3, 4, 4, 0, } , // 1 pipes 8 bpe @ SW_64K_S @ Navi1x + { 1, 4, 5, 5, 0, } , // 1 pipes 16 bpe @ SW_64K_S @ Navi1x + { 1, 0, 1, 1, 0, } , // 2 pipes 1 bpe @ SW_64K_S @ Navi1x + { 1, 1, 2, 2, 0, } , // 2 pipes 2 bpe @ SW_64K_S @ Navi1x + { 1, 2, 3, 3, 0, } , // 2 pipes 4 bpe @ SW_64K_S @ Navi1x + { 1, 3, 4, 4, 0, } , // 2 pipes 8 bpe @ SW_64K_S @ Navi1x + { 1, 4, 5, 5, 0, } , // 2 pipes 16 bpe @ SW_64K_S @ Navi1x + { 1, 0, 1, 1, 0, } , // 4 pipes 1 bpe @ SW_64K_S @ Navi1x + { 1, 1, 2, 2, 0, } , // 4 pipes 2 bpe @ SW_64K_S @ Navi1x + { 1, 2, 3, 3, 0, } , // 4 pipes 4 bpe @ SW_64K_S @ Navi1x + { 1, 3, 4, 4, 0, } , // 4 pipes 8 bpe @ SW_64K_S @ Navi1x + { 1, 4, 5, 5, 0, } , // 4 pipes 16 bpe @ SW_64K_S @ Navi1x + { 1, 0, 1, 1, 0, } , // 8 pipes 1 bpe @ SW_64K_S @ Navi1x + { 1, 1, 2, 2, 0, } , // 8 pipes 2 bpe @ SW_64K_S @ Navi1x + { 1, 2, 3, 3, 0, } , // 8 pipes 4 bpe @ SW_64K_S @ Navi1x + { 1, 3, 4, 4, 0, } , // 8 pipes 8 bpe @ SW_64K_S @ Navi1x + { 1, 4, 5, 5, 0, } , // 8 pipes 16 bpe @ SW_64K_S @ Navi1x + { 1, 0, 1, 1, 0, } , // 16 pipes 1 bpe @ SW_64K_S @ Navi1x + { 1, 1, 2, 2, 0, } , // 16 pipes 2 bpe @ SW_64K_S @ Navi1x + { 1, 2, 3, 3, 0, } , // 16 pipes 4 bpe @ SW_64K_S @ Navi1x + { 1, 3, 4, 4, 0, } , // 16 pipes 8 bpe @ SW_64K_S @ Navi1x + { 1, 4, 5, 5, 0, } , // 16 pipes 16 bpe @ SW_64K_S @ Navi1x + { 1, 0, 1, 1, 0, } , // 32 pipes 1 bpe @ SW_64K_S @ Navi1x + { 1, 1, 2, 2, 0, } , // 32 pipes 2 bpe @ SW_64K_S @ Navi1x + { 1, 2, 3, 3, 0, } , // 32 pipes 4 bpe @ SW_64K_S @ Navi1x + { 1, 3, 4, 4, 0, } , // 32 pipes 8 bpe @ SW_64K_S @ Navi1x + { 1, 4, 5, 5, 0, } , // 32 pipes 16 bpe @ SW_64K_S @ Navi1x + { 1, 0, 1, 1, 0, } , // 64 pipes 1 bpe @ SW_64K_S @ Navi1x + { 1, 1, 2, 2, 0, } , // 64 pipes 2 bpe @ SW_64K_S @ Navi1x + { 1, 2, 3, 3, 0, } , // 64 pipes 4 bpe @ SW_64K_S @ Navi1x + { 1, 3, 4, 4, 0, } , // 64 pipes 8 bpe @ SW_64K_S @ Navi1x + { 1, 4, 5, 5, 0, } , // 64 pipes 16 bpe @ SW_64K_S @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_D_PATINFO[] = +{ + { 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_D @ Navi1x + { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_D @ Navi1x + { 1, 2, 3, 3, 0, } , // 1 pipes 4 bpe @ SW_64K_D @ Navi1x + { 1, 6, 4, 4, 0, } , // 1 pipes 8 bpe @ SW_64K_D @ Navi1x + { 1, 7, 5, 5, 0, } , // 1 pipes 16 bpe @ SW_64K_D @ Navi1x + { 1, 5, 1, 1, 0, } , // 2 pipes 1 bpe @ SW_64K_D @ Navi1x + { 1, 1, 2, 2, 0, } , // 2 pipes 2 bpe @ SW_64K_D @ Navi1x + { 1, 2, 3, 3, 0, } , // 2 pipes 4 bpe @ SW_64K_D @ Navi1x + { 1, 6, 4, 4, 0, } , // 2 pipes 8 bpe @ SW_64K_D @ Navi1x + { 1, 7, 5, 5, 0, } , // 2 pipes 16 bpe @ SW_64K_D @ Navi1x + { 1, 5, 1, 1, 0, } , // 4 pipes 1 bpe @ SW_64K_D @ Navi1x + { 1, 1, 2, 2, 0, } , // 4 pipes 2 bpe @ SW_64K_D @ Navi1x + { 1, 2, 3, 3, 0, } , // 4 pipes 4 bpe @ SW_64K_D @ Navi1x + { 1, 6, 4, 4, 0, } , // 4 pipes 8 bpe @ SW_64K_D @ Navi1x + { 1, 7, 5, 5, 0, } , // 4 pipes 16 bpe @ SW_64K_D @ Navi1x + { 1, 5, 1, 1, 0, } , // 8 pipes 1 bpe @ SW_64K_D @ Navi1x + { 1, 1, 2, 2, 0, } , // 8 pipes 2 bpe @ SW_64K_D @ Navi1x + { 1, 2, 3, 3, 0, } , // 8 pipes 4 bpe @ SW_64K_D @ Navi1x + { 1, 6, 4, 4, 0, } , // 8 pipes 8 bpe @ SW_64K_D @ Navi1x + { 1, 7, 5, 5, 0, } , // 8 pipes 16 bpe @ SW_64K_D @ Navi1x + { 1, 5, 1, 1, 0, } , // 16 pipes 1 bpe @ SW_64K_D @ Navi1x + { 1, 1, 2, 2, 0, } , // 16 pipes 2 bpe @ SW_64K_D @ Navi1x + { 1, 2, 3, 3, 0, } , // 16 pipes 4 bpe @ SW_64K_D @ Navi1x + { 1, 6, 4, 4, 0, } , // 16 pipes 8 bpe @ SW_64K_D @ Navi1x + { 1, 7, 5, 5, 0, } , // 16 pipes 16 bpe @ SW_64K_D @ Navi1x + { 1, 5, 1, 1, 0, } , // 32 pipes 1 bpe @ SW_64K_D @ Navi1x + { 1, 1, 2, 2, 0, } , // 32 pipes 2 bpe @ SW_64K_D @ Navi1x + { 1, 2, 3, 3, 0, } , // 32 pipes 4 bpe @ SW_64K_D @ Navi1x + { 1, 6, 4, 4, 0, } , // 32 pipes 8 bpe @ SW_64K_D @ Navi1x + { 1, 7, 5, 5, 0, } , // 32 pipes 16 bpe @ SW_64K_D @ Navi1x + { 1, 5, 1, 1, 0, } , // 64 pipes 1 bpe @ SW_64K_D @ Navi1x + { 1, 1, 2, 2, 0, } , // 64 pipes 2 bpe @ SW_64K_D @ Navi1x + { 1, 2, 3, 3, 0, } , // 64 pipes 4 bpe @ SW_64K_D @ Navi1x + { 1, 6, 4, 4, 0, } , // 64 pipes 8 bpe @ SW_64K_D @ Navi1x + { 1, 7, 5, 5, 0, } , // 64 pipes 16 bpe @ SW_64K_D @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_S_T_PATINFO[] = +{ + { 1, 0, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_S_T @ Navi1x + { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_S_T @ Navi1x + { 1, 2, 3, 3, 0, } , // 1 pipes 4 bpe @ SW_64K_S_T @ Navi1x + { 1, 3, 4, 4, 0, } , // 1 pipes 8 bpe @ SW_64K_S_T @ Navi1x + { 1, 4, 5, 5, 0, } , // 1 pipes 16 bpe @ SW_64K_S_T @ Navi1x + { 2, 0, 36, 1, 0, } , // 2 pipes 1 bpe @ SW_64K_S_T @ Navi1x + { 2, 1, 37, 2, 0, } , // 2 pipes 2 bpe @ SW_64K_S_T @ Navi1x + { 2, 2, 38, 3, 0, } , // 2 pipes 4 bpe @ SW_64K_S_T @ Navi1x + { 2, 3, 39, 4, 0, } , // 2 pipes 8 bpe @ SW_64K_S_T @ Navi1x + { 2, 4, 40, 5, 0, } , // 2 pipes 16 bpe @ SW_64K_S_T @ Navi1x + { 2, 0, 41, 1, 0, } , // 4 pipes 1 bpe @ SW_64K_S_T @ Navi1x + { 2, 1, 42, 2, 0, } , // 4 pipes 2 bpe @ SW_64K_S_T @ Navi1x + { 2, 2, 43, 3, 0, } , // 4 pipes 4 bpe @ SW_64K_S_T @ Navi1x + { 2, 3, 44, 4, 0, } , // 4 pipes 8 bpe @ SW_64K_S_T @ Navi1x + { 2, 4, 45, 5, 0, } , // 4 pipes 16 bpe @ SW_64K_S_T @ Navi1x + { 2, 0, 46, 1, 0, } , // 8 pipes 1 bpe @ SW_64K_S_T @ Navi1x + { 2, 1, 47, 2, 0, } , // 8 pipes 2 bpe @ SW_64K_S_T @ Navi1x + { 2, 2, 48, 3, 0, } , // 8 pipes 4 bpe @ SW_64K_S_T @ Navi1x + { 2, 3, 49, 4, 0, } , // 8 pipes 8 bpe @ SW_64K_S_T @ Navi1x + { 2, 4, 50, 5, 0, } , // 8 pipes 16 bpe @ SW_64K_S_T @ Navi1x + { 2, 0, 51, 1, 0, } , // 16 pipes 1 bpe @ SW_64K_S_T @ Navi1x + { 2, 1, 52, 2, 0, } , // 16 pipes 2 bpe @ SW_64K_S_T @ Navi1x + { 2, 2, 53, 3, 0, } , // 16 pipes 4 bpe @ SW_64K_S_T @ Navi1x + { 2, 3, 54, 4, 0, } , // 16 pipes 8 bpe @ SW_64K_S_T @ Navi1x + { 2, 4, 55, 5, 0, } , // 16 pipes 16 bpe @ SW_64K_S_T @ Navi1x + { 2, 0, 56, 16, 0, } , // 32 pipes 1 bpe @ SW_64K_S_T @ Navi1x + { 2, 1, 57, 17, 0, } , // 32 pipes 2 bpe @ SW_64K_S_T @ Navi1x + { 2, 2, 58, 18, 0, } , // 32 pipes 4 bpe @ SW_64K_S_T @ Navi1x + { 2, 3, 59, 19, 0, } , // 32 pipes 8 bpe @ SW_64K_S_T @ Navi1x + { 2, 4, 60, 20, 0, } , // 32 pipes 16 bpe @ SW_64K_S_T @ Navi1x + { 2, 0, 1, 21, 0, } , // 64 pipes 1 bpe @ SW_64K_S_T @ Navi1x + { 2, 1, 2, 22, 0, } , // 64 pipes 2 bpe @ SW_64K_S_T @ Navi1x + { 2, 2, 3, 23, 0, } , // 64 pipes 4 bpe @ SW_64K_S_T @ Navi1x + { 2, 3, 4, 24, 0, } , // 64 pipes 8 bpe @ SW_64K_S_T @ Navi1x + { 2, 4, 5, 25, 0, } , // 64 pipes 16 bpe @ SW_64K_S_T @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_D_T_PATINFO[] = +{ + { 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_D_T @ Navi1x + { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_D_T @ Navi1x + { 1, 2, 3, 3, 0, } , // 1 pipes 4 bpe @ SW_64K_D_T @ Navi1x + { 1, 6, 4, 4, 0, } , // 1 pipes 8 bpe @ SW_64K_D_T @ Navi1x + { 1, 7, 5, 5, 0, } , // 1 pipes 16 bpe @ SW_64K_D_T @ Navi1x + { 2, 5, 36, 1, 0, } , // 2 pipes 1 bpe @ SW_64K_D_T @ Navi1x + { 2, 1, 37, 2, 0, } , // 2 pipes 2 bpe @ SW_64K_D_T @ Navi1x + { 2, 2, 38, 3, 0, } , // 2 pipes 4 bpe @ SW_64K_D_T @ Navi1x + { 2, 6, 39, 4, 0, } , // 2 pipes 8 bpe @ SW_64K_D_T @ Navi1x + { 2, 7, 40, 5, 0, } , // 2 pipes 16 bpe @ SW_64K_D_T @ Navi1x + { 2, 5, 41, 1, 0, } , // 4 pipes 1 bpe @ SW_64K_D_T @ Navi1x + { 2, 1, 42, 2, 0, } , // 4 pipes 2 bpe @ SW_64K_D_T @ Navi1x + { 2, 2, 43, 3, 0, } , // 4 pipes 4 bpe @ SW_64K_D_T @ Navi1x + { 2, 6, 44, 4, 0, } , // 4 pipes 8 bpe @ SW_64K_D_T @ Navi1x + { 2, 7, 45, 5, 0, } , // 4 pipes 16 bpe @ SW_64K_D_T @ Navi1x + { 2, 5, 46, 1, 0, } , // 8 pipes 1 bpe @ SW_64K_D_T @ Navi1x + { 2, 1, 47, 2, 0, } , // 8 pipes 2 bpe @ SW_64K_D_T @ Navi1x + { 2, 2, 48, 3, 0, } , // 8 pipes 4 bpe @ SW_64K_D_T @ Navi1x + { 2, 6, 49, 4, 0, } , // 8 pipes 8 bpe @ SW_64K_D_T @ Navi1x + { 2, 7, 50, 5, 0, } , // 8 pipes 16 bpe @ SW_64K_D_T @ Navi1x + { 2, 5, 51, 1, 0, } , // 16 pipes 1 bpe @ SW_64K_D_T @ Navi1x + { 2, 1, 52, 2, 0, } , // 16 pipes 2 bpe @ SW_64K_D_T @ Navi1x + { 2, 2, 53, 3, 0, } , // 16 pipes 4 bpe @ SW_64K_D_T @ Navi1x + { 2, 6, 54, 4, 0, } , // 16 pipes 8 bpe @ SW_64K_D_T @ Navi1x + { 2, 7, 55, 5, 0, } , // 16 pipes 16 bpe @ SW_64K_D_T @ Navi1x + { 2, 5, 56, 16, 0, } , // 32 pipes 1 bpe @ SW_64K_D_T @ Navi1x + { 2, 1, 57, 17, 0, } , // 32 pipes 2 bpe @ SW_64K_D_T @ Navi1x + { 2, 2, 58, 18, 0, } , // 32 pipes 4 bpe @ SW_64K_D_T @ Navi1x + { 2, 6, 59, 19, 0, } , // 32 pipes 8 bpe @ SW_64K_D_T @ Navi1x + { 2, 7, 60, 20, 0, } , // 32 pipes 16 bpe @ SW_64K_D_T @ Navi1x + { 2, 5, 1, 21, 0, } , // 64 pipes 1 bpe @ SW_64K_D_T @ Navi1x + { 2, 1, 2, 22, 0, } , // 64 pipes 2 bpe @ SW_64K_D_T @ Navi1x + { 2, 2, 3, 23, 0, } , // 64 pipes 4 bpe @ SW_64K_D_T @ Navi1x + { 2, 6, 4, 24, 0, } , // 64 pipes 8 bpe @ SW_64K_D_T @ Navi1x + { 2, 7, 5, 25, 0, } , // 64 pipes 16 bpe @ SW_64K_D_T @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_S_X_PATINFO[] = +{ + { 1, 0, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_S_X @ Navi1x + { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_S_X @ Navi1x + { 1, 2, 3, 3, 0, } , // 1 pipes 4 bpe @ SW_64K_S_X @ Navi1x + { 1, 3, 4, 4, 0, } , // 1 pipes 8 bpe @ SW_64K_S_X @ Navi1x + { 1, 4, 5, 5, 0, } , // 1 pipes 16 bpe @ SW_64K_S_X @ Navi1x + { 3, 0, 6, 1, 0, } , // 2 pipes 1 bpe @ SW_64K_S_X @ Navi1x + { 3, 1, 7, 2, 0, } , // 2 pipes 2 bpe @ SW_64K_S_X @ Navi1x + { 3, 2, 8, 3, 0, } , // 2 pipes 4 bpe @ SW_64K_S_X @ Navi1x + { 3, 3, 9, 4, 0, } , // 2 pipes 8 bpe @ SW_64K_S_X @ Navi1x + { 3, 4, 10, 5, 0, } , // 2 pipes 16 bpe @ SW_64K_S_X @ Navi1x + { 3, 0, 11, 1, 0, } , // 4 pipes 1 bpe @ SW_64K_S_X @ Navi1x + { 3, 1, 12, 2, 0, } , // 4 pipes 2 bpe @ SW_64K_S_X @ Navi1x + { 3, 2, 13, 3, 0, } , // 4 pipes 4 bpe @ SW_64K_S_X @ Navi1x + { 3, 3, 14, 4, 0, } , // 4 pipes 8 bpe @ SW_64K_S_X @ Navi1x + { 3, 4, 15, 5, 0, } , // 4 pipes 16 bpe @ SW_64K_S_X @ Navi1x + { 3, 0, 16, 1, 0, } , // 8 pipes 1 bpe @ SW_64K_S_X @ Navi1x + { 3, 1, 17, 2, 0, } , // 8 pipes 2 bpe @ SW_64K_S_X @ Navi1x + { 3, 2, 18, 3, 0, } , // 8 pipes 4 bpe @ SW_64K_S_X @ Navi1x + { 3, 3, 19, 4, 0, } , // 8 pipes 8 bpe @ SW_64K_S_X @ Navi1x + { 3, 4, 20, 5, 0, } , // 8 pipes 16 bpe @ SW_64K_S_X @ Navi1x + { 3, 0, 21, 1, 0, } , // 16 pipes 1 bpe @ SW_64K_S_X @ Navi1x + { 3, 1, 22, 2, 0, } , // 16 pipes 2 bpe @ SW_64K_S_X @ Navi1x + { 3, 2, 23, 3, 0, } , // 16 pipes 4 bpe @ SW_64K_S_X @ Navi1x + { 3, 3, 24, 4, 0, } , // 16 pipes 8 bpe @ SW_64K_S_X @ Navi1x + { 3, 4, 25, 5, 0, } , // 16 pipes 16 bpe @ SW_64K_S_X @ Navi1x + { 3, 0, 26, 6, 0, } , // 32 pipes 1 bpe @ SW_64K_S_X @ Navi1x + { 3, 1, 27, 7, 0, } , // 32 pipes 2 bpe @ SW_64K_S_X @ Navi1x + { 3, 2, 28, 8, 0, } , // 32 pipes 4 bpe @ SW_64K_S_X @ Navi1x + { 3, 3, 29, 9, 0, } , // 32 pipes 8 bpe @ SW_64K_S_X @ Navi1x + { 3, 4, 30, 10, 0, } , // 32 pipes 16 bpe @ SW_64K_S_X @ Navi1x + { 3, 0, 31, 11, 0, } , // 64 pipes 1 bpe @ SW_64K_S_X @ Navi1x + { 3, 1, 32, 12, 0, } , // 64 pipes 2 bpe @ SW_64K_S_X @ Navi1x + { 3, 2, 33, 13, 0, } , // 64 pipes 4 bpe @ SW_64K_S_X @ Navi1x + { 3, 3, 34, 14, 0, } , // 64 pipes 8 bpe @ SW_64K_S_X @ Navi1x + { 3, 4, 35, 15, 0, } , // 64 pipes 16 bpe @ SW_64K_S_X @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_D_X_PATINFO[] = +{ + { 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_D_X @ Navi1x + { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_D_X @ Navi1x + { 1, 2, 3, 3, 0, } , // 1 pipes 4 bpe @ SW_64K_D_X @ Navi1x + { 1, 6, 4, 4, 0, } , // 1 pipes 8 bpe @ SW_64K_D_X @ Navi1x + { 1, 7, 5, 5, 0, } , // 1 pipes 16 bpe @ SW_64K_D_X @ Navi1x + { 3, 5, 6, 1, 0, } , // 2 pipes 1 bpe @ SW_64K_D_X @ Navi1x + { 3, 1, 7, 2, 0, } , // 2 pipes 2 bpe @ SW_64K_D_X @ Navi1x + { 3, 2, 8, 3, 0, } , // 2 pipes 4 bpe @ SW_64K_D_X @ Navi1x + { 3, 6, 9, 4, 0, } , // 2 pipes 8 bpe @ SW_64K_D_X @ Navi1x + { 3, 7, 10, 5, 0, } , // 2 pipes 16 bpe @ SW_64K_D_X @ Navi1x + { 3, 5, 11, 1, 0, } , // 4 pipes 1 bpe @ SW_64K_D_X @ Navi1x + { 3, 1, 12, 2, 0, } , // 4 pipes 2 bpe @ SW_64K_D_X @ Navi1x + { 3, 2, 13, 3, 0, } , // 4 pipes 4 bpe @ SW_64K_D_X @ Navi1x + { 3, 6, 14, 4, 0, } , // 4 pipes 8 bpe @ SW_64K_D_X @ Navi1x + { 3, 7, 15, 5, 0, } , // 4 pipes 16 bpe @ SW_64K_D_X @ Navi1x + { 3, 5, 16, 1, 0, } , // 8 pipes 1 bpe @ SW_64K_D_X @ Navi1x + { 3, 1, 17, 2, 0, } , // 8 pipes 2 bpe @ SW_64K_D_X @ Navi1x + { 3, 2, 18, 3, 0, } , // 8 pipes 4 bpe @ SW_64K_D_X @ Navi1x + { 3, 6, 19, 4, 0, } , // 8 pipes 8 bpe @ SW_64K_D_X @ Navi1x + { 3, 7, 20, 5, 0, } , // 8 pipes 16 bpe @ SW_64K_D_X @ Navi1x + { 3, 5, 21, 1, 0, } , // 16 pipes 1 bpe @ SW_64K_D_X @ Navi1x + { 3, 1, 22, 2, 0, } , // 16 pipes 2 bpe @ SW_64K_D_X @ Navi1x + { 3, 2, 23, 3, 0, } , // 16 pipes 4 bpe @ SW_64K_D_X @ Navi1x + { 3, 6, 24, 4, 0, } , // 16 pipes 8 bpe @ SW_64K_D_X @ Navi1x + { 3, 7, 25, 5, 0, } , // 16 pipes 16 bpe @ SW_64K_D_X @ Navi1x + { 3, 5, 26, 6, 0, } , // 32 pipes 1 bpe @ SW_64K_D_X @ Navi1x + { 3, 1, 27, 7, 0, } , // 32 pipes 2 bpe @ SW_64K_D_X @ Navi1x + { 3, 2, 28, 8, 0, } , // 32 pipes 4 bpe @ SW_64K_D_X @ Navi1x + { 3, 6, 29, 9, 0, } , // 32 pipes 8 bpe @ SW_64K_D_X @ Navi1x + { 3, 7, 30, 10, 0, } , // 32 pipes 16 bpe @ SW_64K_D_X @ Navi1x + { 3, 5, 31, 11, 0, } , // 64 pipes 1 bpe @ SW_64K_D_X @ Navi1x + { 3, 1, 32, 12, 0, } , // 64 pipes 2 bpe @ SW_64K_D_X @ Navi1x + { 3, 2, 33, 13, 0, } , // 64 pipes 4 bpe @ SW_64K_D_X @ Navi1x + { 3, 6, 34, 14, 0, } , // 64 pipes 8 bpe @ SW_64K_D_X @ Navi1x + { 3, 7, 35, 15, 0, } , // 64 pipes 16 bpe @ SW_64K_D_X @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_R_X_1xaa_PATINFO[] = +{ + { 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 1, 2, 3, 3, 0, } , // 1 pipes 4 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 1, 6, 4, 4, 0, } , // 1 pipes 8 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 1, 7, 5, 5, 0, } , // 1 pipes 16 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 28, 61, 1, 0, } , // 2 pipes 1 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 1, 62, 2, 0, } , // 2 pipes 2 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 2, 8, 3, 0, } , // 2 pipes 4 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 6, 63, 4, 0, } , // 2 pipes 8 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 7, 64, 5, 0, } , // 2 pipes 16 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 28, 65, 1, 0, } , // 4 pipes 1 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 1, 66, 2, 0, } , // 4 pipes 2 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 2, 67, 3, 0, } , // 4 pipes 4 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 6, 68, 4, 0, } , // 4 pipes 8 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 7, 69, 26, 0, } , // 4 pipes 16 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 28, 70, 1, 0, } , // 8 pipes 1 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 1, 71, 2, 0, } , // 8 pipes 2 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 2, 72, 27, 0, } , // 8 pipes 4 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 6, 72, 28, 0, } , // 8 pipes 8 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 7, 73, 29, 0, } , // 8 pipes 16 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 28, 74, 1, 0, } , // 16 pipes 1 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 1, 74, 30, 0, } , // 16 pipes 2 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 2, 74, 31, 0, } , // 16 pipes 4 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 6, 74, 32, 0, } , // 16 pipes 8 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 7, 74, 33, 0, } , // 16 pipes 16 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 28, 75, 6, 0, } , // 32 pipes 1 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 1, 75, 34, 0, } , // 32 pipes 2 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 2, 75, 35, 0, } , // 32 pipes 4 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 6, 75, 36, 0, } , // 32 pipes 8 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 7, 76, 37, 0, } , // 32 pipes 16 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 28, 77, 11, 0, } , // 64 pipes 1 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 1, 77, 38, 0, } , // 64 pipes 2 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 2, 77, 39, 0, } , // 64 pipes 4 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 6, 78, 40, 0, } , // 64 pipes 8 bpe @ SW_64K_R_X 1xaa @ Navi1x + { 3, 7, 79, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 1xaa @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_R_X_2xaa_PATINFO[] = +{ + { 2, 5, 1, 99, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 2, 1, 2, 100, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 2, 2, 3, 101, 0, } , // 1 pipes 4 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 2, 6, 4, 102, 0, } , // 1 pipes 8 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 2, 7, 5, 103, 0, } , // 1 pipes 16 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 28, 61, 99, 0, } , // 2 pipes 1 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 1, 62, 100, 0, } , // 2 pipes 2 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 2, 8, 101, 0, } , // 2 pipes 4 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 6, 63, 102, 0, } , // 2 pipes 8 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 7, 64, 103, 0, } , // 2 pipes 16 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 28, 65, 99, 0, } , // 4 pipes 1 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 1, 66, 100, 0, } , // 4 pipes 2 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 2, 67, 101, 0, } , // 4 pipes 4 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 6, 68, 102, 0, } , // 4 pipes 8 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 7, 69, 104, 0, } , // 4 pipes 16 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 28, 70, 99, 0, } , // 8 pipes 1 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 1, 71, 100, 0, } , // 8 pipes 2 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 2, 72, 105, 0, } , // 8 pipes 4 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 6, 72, 106, 0, } , // 8 pipes 8 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 7, 73, 107, 0, } , // 8 pipes 16 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 28, 74, 99, 0, } , // 16 pipes 1 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 1, 74, 108, 0, } , // 16 pipes 2 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 2, 74, 109, 0, } , // 16 pipes 4 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 6, 74, 107, 0, } , // 16 pipes 8 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 7, 113, 33, 0, } , // 16 pipes 16 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 28, 75, 110, 0, } , // 32 pipes 1 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 1, 75, 111, 0, } , // 32 pipes 2 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 2, 75, 112, 0, } , // 32 pipes 4 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 6, 76, 113, 0, } , // 32 pipes 8 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 7, 114, 37, 0, } , // 32 pipes 16 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 28, 78, 114, 0, } , // 64 pipes 1 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 1, 78, 115, 0, } , // 64 pipes 2 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 2, 78, 116, 0, } , // 64 pipes 4 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 6, 79, 117, 0, } , // 64 pipes 8 bpe @ SW_64K_R_X 2xaa @ Navi1x + { 3, 7, 115, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 2xaa @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_R_X_4xaa_PATINFO[] = +{ + { 2, 5, 1, 118, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 2, 1, 2, 119, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 2, 2, 3, 120, 0, } , // 1 pipes 4 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 2, 6, 4, 121, 0, } , // 1 pipes 8 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 2, 7, 5, 122, 0, } , // 1 pipes 16 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 28, 61, 118, 0, } , // 2 pipes 1 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 1, 62, 119, 0, } , // 2 pipes 2 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 2, 8, 120, 0, } , // 2 pipes 4 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 6, 63, 121, 0, } , // 2 pipes 8 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 7, 64, 122, 0, } , // 2 pipes 16 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 28, 65, 118, 0, } , // 4 pipes 1 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 1, 66, 119, 0, } , // 4 pipes 2 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 2, 67, 120, 0, } , // 4 pipes 4 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 6, 68, 121, 0, } , // 4 pipes 8 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 7, 69, 123, 0, } , // 4 pipes 16 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 28, 70, 118, 0, } , // 8 pipes 1 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 1, 71, 119, 0, } , // 8 pipes 2 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 2, 72, 124, 0, } , // 8 pipes 4 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 6, 93, 125, 0, } , // 8 pipes 8 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 7, 116, 107, 0, } , // 8 pipes 16 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 28, 74, 118, 0, } , // 16 pipes 1 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 1, 74, 126, 0, } , // 16 pipes 2 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 2, 74, 127, 0, } , // 16 pipes 4 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 6, 117, 107, 0, } , // 16 pipes 8 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 7, 118, 33, 0, } , // 16 pipes 16 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 28, 76, 128, 0, } , // 32 pipes 1 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 1, 76, 129, 0, } , // 32 pipes 2 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 2, 76, 130, 0, } , // 32 pipes 4 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 6, 119, 113, 0, } , // 32 pipes 8 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 7, 120, 37, 0, } , // 32 pipes 16 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 28, 79, 131, 0, } , // 64 pipes 1 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 1, 79, 132, 0, } , // 64 pipes 2 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 2, 79, 133, 0, } , // 64 pipes 4 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 6, 121, 117, 0, } , // 64 pipes 8 bpe @ SW_64K_R_X 4xaa @ Navi1x + { 3, 7, 122, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 4xaa @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_R_X_8xaa_PATINFO[] = +{ + { 2, 5, 1, 134, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 2, 1, 2, 135, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 2, 2, 3, 135, 0, } , // 1 pipes 4 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 2, 6, 4, 136, 0, } , // 1 pipes 8 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 2, 7, 5, 136, 0, } , // 1 pipes 16 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 28, 61, 134, 0, } , // 2 pipes 1 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 1, 62, 135, 0, } , // 2 pipes 2 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 2, 8, 135, 0, } , // 2 pipes 4 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 6, 63, 136, 0, } , // 2 pipes 8 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 7, 64, 136, 0, } , // 2 pipes 16 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 28, 65, 134, 0, } , // 4 pipes 1 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 1, 66, 135, 0, } , // 4 pipes 2 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 2, 67, 135, 0, } , // 4 pipes 4 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 6, 68, 136, 0, } , // 4 pipes 8 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 7, 102, 137, 0, } , // 4 pipes 16 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 28, 70, 134, 0, } , // 8 pipes 1 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 1, 71, 135, 0, } , // 8 pipes 2 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 2, 72, 138, 0, } , // 8 pipes 4 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 6, 123, 139, 0, } , // 8 pipes 8 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 7, 124, 140, 0, } , // 8 pipes 16 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 28, 105, 134, 0, } , // 16 pipes 1 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 1, 105, 138, 0, } , // 16 pipes 2 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 2, 125, 127, 0, } , // 16 pipes 4 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 6, 126, 107, 0, } , // 16 pipes 8 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 7, 126, 141, 0, } , // 16 pipes 16 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 28, 107, 142, 0, } , // 32 pipes 1 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 1, 108, 143, 0, } , // 32 pipes 2 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 2, 127, 130, 0, } , // 32 pipes 4 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 6, 128, 113, 0, } , // 32 pipes 8 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 7, 128, 144, 0, } , // 32 pipes 16 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 28, 110, 145, 0, } , // 64 pipes 1 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 1, 111, 146, 0, } , // 64 pipes 2 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 2, 129, 133, 0, } , // 64 pipes 4 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 6, 130, 117, 0, } , // 64 pipes 8 bpe @ SW_64K_R_X 8xaa @ Navi1x + { 3, 7, 130, 147, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 8xaa @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_PATINFO[] = +{ + { 1, 8, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 1, 9, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 1, 10, 3, 3, 0, } , // 1 pipes 4 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 1, 11, 4, 4, 0, } , // 1 pipes 8 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 1, 7, 5, 5, 0, } , // 1 pipes 16 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 12, 61, 1, 0, } , // 2 pipes 1 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 9, 62, 2, 0, } , // 2 pipes 2 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 10, 8, 3, 0, } , // 2 pipes 4 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 11, 63, 4, 0, } , // 2 pipes 8 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 7, 64, 5, 0, } , // 2 pipes 16 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 12, 65, 1, 0, } , // 4 pipes 1 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 9, 66, 2, 0, } , // 4 pipes 2 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 10, 67, 3, 0, } , // 4 pipes 4 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 11, 68, 4, 0, } , // 4 pipes 8 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 7, 69, 26, 0, } , // 4 pipes 16 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 12, 70, 1, 0, } , // 8 pipes 1 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 9, 71, 2, 0, } , // 8 pipes 2 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 10, 72, 27, 0, } , // 8 pipes 4 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 11, 72, 28, 0, } , // 8 pipes 8 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 7, 73, 29, 0, } , // 8 pipes 16 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 12, 74, 1, 0, } , // 16 pipes 1 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 9, 74, 30, 0, } , // 16 pipes 2 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 10, 74, 31, 0, } , // 16 pipes 4 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 11, 74, 32, 0, } , // 16 pipes 8 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 7, 74, 33, 0, } , // 16 pipes 16 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 12, 75, 6, 0, } , // 32 pipes 1 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 9, 75, 34, 0, } , // 32 pipes 2 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 10, 75, 35, 0, } , // 32 pipes 4 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 11, 75, 36, 0, } , // 32 pipes 8 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 7, 76, 37, 0, } , // 32 pipes 16 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 12, 77, 11, 0, } , // 64 pipes 1 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 9, 77, 38, 0, } , // 64 pipes 2 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 10, 77, 39, 0, } , // 64 pipes 4 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 11, 78, 40, 0, } , // 64 pipes 8 bpe @ SW_64K_Z_X 1xaa @ Navi1x + { 3, 7, 79, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 1xaa @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_PATINFO[] = +{ + { 1, 13, 80, 42, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 1, 14, 3, 3, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 2, 15, 3, 43, 0, } , // 1 pipes 4 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 2, 16, 81, 44, 0, } , // 1 pipes 8 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 2, 17, 5, 45, 0, } , // 1 pipes 16 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 13, 82, 42, 0, } , // 2 pipes 1 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 14, 8, 3, 0, } , // 2 pipes 2 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 15, 8, 43, 0, } , // 2 pipes 4 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 16, 83, 44, 0, } , // 2 pipes 8 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 17, 64, 45, 0, } , // 2 pipes 16 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 13, 84, 42, 0, } , // 4 pipes 1 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 14, 67, 3, 0, } , // 4 pipes 2 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 15, 67, 43, 0, } , // 4 pipes 4 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 16, 85, 44, 0, } , // 4 pipes 8 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 17, 69, 46, 0, } , // 4 pipes 16 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 13, 86, 42, 0, } , // 8 pipes 1 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 14, 72, 27, 0, } , // 8 pipes 2 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 15, 72, 47, 0, } , // 8 pipes 4 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 16, 73, 48, 0, } , // 8 pipes 8 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 17, 73, 49, 0, } , // 8 pipes 16 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 13, 74, 50, 0, } , // 16 pipes 1 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 14, 74, 31, 0, } , // 16 pipes 2 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 15, 74, 51, 0, } , // 16 pipes 4 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 16, 74, 52, 0, } , // 16 pipes 8 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 17, 87, 53, 0, } , // 16 pipes 16 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 13, 75, 54, 0, } , // 32 pipes 1 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 14, 75, 35, 0, } , // 32 pipes 2 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 15, 75, 55, 0, } , // 32 pipes 4 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 16, 76, 56, 0, } , // 32 pipes 8 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 17, 88, 57, 0, } , // 32 pipes 16 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 13, 78, 58, 0, } , // 64 pipes 1 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 14, 78, 59, 0, } , // 64 pipes 2 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 15, 78, 60, 0, } , // 64 pipes 4 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 16, 79, 41, 0, } , // 64 pipes 8 bpe @ SW_64K_Z_X 2xaa @ Navi1x + { 3, 17, 89, 61, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 2xaa @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_PATINFO[] = +{ + { 1, 18, 3, 3, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 2, 19, 90, 62, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 2, 20, 3, 63, 0, } , // 1 pipes 4 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 2, 21, 4, 64, 0, } , // 1 pipes 8 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 2, 22, 5, 65, 0, } , // 1 pipes 16 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 18, 8, 3, 0, } , // 2 pipes 1 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 19, 91, 62, 0, } , // 2 pipes 2 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 20, 8, 66, 0, } , // 2 pipes 4 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 21, 63, 67, 0, } , // 2 pipes 8 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 22, 64, 68, 0, } , // 2 pipes 16 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 18, 67, 3, 0, } , // 4 pipes 1 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 19, 92, 62, 0, } , // 4 pipes 2 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 20, 67, 63, 0, } , // 4 pipes 4 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 21, 68, 64, 0, } , // 4 pipes 8 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 22, 69, 69, 0, } , // 4 pipes 16 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 18, 72, 27, 0, } , // 8 pipes 1 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 19, 72, 70, 0, } , // 8 pipes 2 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 20, 72, 71, 0, } , // 8 pipes 4 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 21, 93, 72, 0, } , // 8 pipes 8 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 22, 94, 73, 0, } , // 8 pipes 16 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 18, 74, 31, 0, } , // 16 pipes 1 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 19, 74, 74, 0, } , // 16 pipes 2 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 20, 74, 75, 0, } , // 16 pipes 4 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 21, 95, 76, 0, } , // 16 pipes 8 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 22, 96, 76, 0, } , // 16 pipes 16 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 18, 76, 77, 0, } , // 32 pipes 1 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 19, 76, 78, 0, } , // 32 pipes 2 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 20, 76, 56, 0, } , // 32 pipes 4 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 21, 97, 79, 0, } , // 32 pipes 8 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 22, 98, 79, 0, } , // 32 pipes 16 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 18, 79, 80, 0, } , // 64 pipes 1 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 19, 79, 81, 0, } , // 64 pipes 2 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 20, 79, 41, 0, } , // 64 pipes 4 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 21, 99, 82, 0, } , // 64 pipes 8 bpe @ SW_64K_Z_X 4xaa @ Navi1x + { 3, 22, 100, 82, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 4xaa @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_PATINFO[] = +{ + { 2, 23, 3, 43, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 2, 24, 3, 63, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 2, 25, 3, 83, 0, } , // 1 pipes 4 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 2, 26, 81, 84, 0, } , // 1 pipes 8 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 2, 27, 5, 85, 0, } , // 1 pipes 16 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 23, 8, 43, 0, } , // 2 pipes 1 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 24, 8, 66, 0, } , // 2 pipes 2 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 25, 8, 86, 0, } , // 2 pipes 4 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 26, 101, 87, 0, } , // 2 pipes 8 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 27, 64, 88, 0, } , // 2 pipes 16 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 23, 67, 43, 0, } , // 4 pipes 1 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 24, 67, 63, 0, } , // 4 pipes 2 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 25, 67, 83, 0, } , // 4 pipes 4 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 26, 85, 84, 0, } , // 4 pipes 8 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 27, 102, 89, 0, } , // 4 pipes 16 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 23, 72, 47, 0, } , // 8 pipes 1 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 24, 72, 71, 0, } , // 8 pipes 2 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 25, 72, 90, 0, } , // 8 pipes 4 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 26, 103, 91, 0, } , // 8 pipes 8 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 27, 104, 92, 0, } , // 8 pipes 16 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 23, 105, 51, 0, } , // 16 pipes 1 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 24, 105, 75, 0, } , // 16 pipes 2 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 25, 87, 93, 0, } , // 16 pipes 4 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 26, 96, 76, 0, } , // 16 pipes 8 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 27, 106, 94, 0, } , // 16 pipes 16 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 23, 107, 95, 0, } , // 32 pipes 1 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 24, 108, 56, 0, } , // 32 pipes 2 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 25, 88, 57, 0, } , // 32 pipes 4 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 26, 98, 79, 0, } , // 32 pipes 8 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 27, 109, 96, 0, } , // 32 pipes 16 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 23, 110, 97, 0, } , // 64 pipes 1 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 24, 111, 41, 0, } , // 64 pipes 2 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 25, 89, 61, 0, } , // 64 pipes 4 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 26, 100, 82, 0, } , // 64 pipes 8 bpe @ SW_64K_Z_X 8xaa @ Navi1x + { 3, 27, 112, 98, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 8xaa @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_S3_PATINFO[] = +{ + { 1, 29, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_S3 @ Navi1x + { 1, 30, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_S3 @ Navi1x + { 1, 31, 133, 150, 0, } , // 1 pipes 4 bpe @ SW_64K_S3 @ Navi1x + { 1, 32, 134, 151, 0, } , // 1 pipes 8 bpe @ SW_64K_S3 @ Navi1x + { 1, 33, 135, 152, 0, } , // 1 pipes 16 bpe @ SW_64K_S3 @ Navi1x + { 1, 29, 131, 148, 0, } , // 2 pipes 1 bpe @ SW_64K_S3 @ Navi1x + { 1, 30, 132, 149, 0, } , // 2 pipes 2 bpe @ SW_64K_S3 @ Navi1x + { 1, 31, 133, 150, 0, } , // 2 pipes 4 bpe @ SW_64K_S3 @ Navi1x + { 1, 32, 134, 151, 0, } , // 2 pipes 8 bpe @ SW_64K_S3 @ Navi1x + { 1, 33, 135, 152, 0, } , // 2 pipes 16 bpe @ SW_64K_S3 @ Navi1x + { 1, 29, 131, 148, 0, } , // 4 pipes 1 bpe @ SW_64K_S3 @ Navi1x + { 1, 30, 132, 149, 0, } , // 4 pipes 2 bpe @ SW_64K_S3 @ Navi1x + { 1, 31, 133, 150, 0, } , // 4 pipes 4 bpe @ SW_64K_S3 @ Navi1x + { 1, 32, 134, 151, 0, } , // 4 pipes 8 bpe @ SW_64K_S3 @ Navi1x + { 1, 33, 135, 152, 0, } , // 4 pipes 16 bpe @ SW_64K_S3 @ Navi1x + { 1, 29, 131, 148, 0, } , // 8 pipes 1 bpe @ SW_64K_S3 @ Navi1x + { 1, 30, 132, 149, 0, } , // 8 pipes 2 bpe @ SW_64K_S3 @ Navi1x + { 1, 31, 133, 150, 0, } , // 8 pipes 4 bpe @ SW_64K_S3 @ Navi1x + { 1, 32, 134, 151, 0, } , // 8 pipes 8 bpe @ SW_64K_S3 @ Navi1x + { 1, 33, 135, 152, 0, } , // 8 pipes 16 bpe @ SW_64K_S3 @ Navi1x + { 1, 29, 131, 148, 0, } , // 16 pipes 1 bpe @ SW_64K_S3 @ Navi1x + { 1, 30, 132, 149, 0, } , // 16 pipes 2 bpe @ SW_64K_S3 @ Navi1x + { 1, 31, 133, 150, 0, } , // 16 pipes 4 bpe @ SW_64K_S3 @ Navi1x + { 1, 32, 134, 151, 0, } , // 16 pipes 8 bpe @ SW_64K_S3 @ Navi1x + { 1, 33, 135, 152, 0, } , // 16 pipes 16 bpe @ SW_64K_S3 @ Navi1x + { 1, 29, 131, 148, 0, } , // 32 pipes 1 bpe @ SW_64K_S3 @ Navi1x + { 1, 30, 132, 149, 0, } , // 32 pipes 2 bpe @ SW_64K_S3 @ Navi1x + { 1, 31, 133, 150, 0, } , // 32 pipes 4 bpe @ SW_64K_S3 @ Navi1x + { 1, 32, 134, 151, 0, } , // 32 pipes 8 bpe @ SW_64K_S3 @ Navi1x + { 1, 33, 135, 152, 0, } , // 32 pipes 16 bpe @ SW_64K_S3 @ Navi1x + { 1, 29, 131, 148, 0, } , // 64 pipes 1 bpe @ SW_64K_S3 @ Navi1x + { 1, 30, 132, 149, 0, } , // 64 pipes 2 bpe @ SW_64K_S3 @ Navi1x + { 1, 31, 133, 150, 0, } , // 64 pipes 4 bpe @ SW_64K_S3 @ Navi1x + { 1, 32, 134, 151, 0, } , // 64 pipes 8 bpe @ SW_64K_S3 @ Navi1x + { 1, 33, 135, 152, 0, } , // 64 pipes 16 bpe @ SW_64K_S3 @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_S3_X_PATINFO[] = +{ + { 1, 29, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_S3_X @ Navi1x + { 1, 30, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_S3_X @ Navi1x + { 1, 31, 133, 150, 0, } , // 1 pipes 4 bpe @ SW_64K_S3_X @ Navi1x + { 1, 32, 134, 151, 0, } , // 1 pipes 8 bpe @ SW_64K_S3_X @ Navi1x + { 1, 33, 135, 152, 0, } , // 1 pipes 16 bpe @ SW_64K_S3_X @ Navi1x + { 3, 29, 136, 148, 0, } , // 2 pipes 1 bpe @ SW_64K_S3_X @ Navi1x + { 3, 30, 137, 149, 0, } , // 2 pipes 2 bpe @ SW_64K_S3_X @ Navi1x + { 3, 31, 138, 150, 0, } , // 2 pipes 4 bpe @ SW_64K_S3_X @ Navi1x + { 3, 32, 139, 151, 0, } , // 2 pipes 8 bpe @ SW_64K_S3_X @ Navi1x + { 3, 33, 140, 152, 0, } , // 2 pipes 16 bpe @ SW_64K_S3_X @ Navi1x + { 3, 29, 141, 148, 0, } , // 4 pipes 1 bpe @ SW_64K_S3_X @ Navi1x + { 3, 30, 142, 149, 0, } , // 4 pipes 2 bpe @ SW_64K_S3_X @ Navi1x + { 3, 31, 143, 150, 0, } , // 4 pipes 4 bpe @ SW_64K_S3_X @ Navi1x + { 3, 32, 144, 151, 0, } , // 4 pipes 8 bpe @ SW_64K_S3_X @ Navi1x + { 3, 33, 145, 152, 0, } , // 4 pipes 16 bpe @ SW_64K_S3_X @ Navi1x + { 3, 29, 146, 148, 0, } , // 8 pipes 1 bpe @ SW_64K_S3_X @ Navi1x + { 3, 30, 147, 149, 0, } , // 8 pipes 2 bpe @ SW_64K_S3_X @ Navi1x + { 3, 31, 148, 150, 0, } , // 8 pipes 4 bpe @ SW_64K_S3_X @ Navi1x + { 3, 32, 149, 151, 0, } , // 8 pipes 8 bpe @ SW_64K_S3_X @ Navi1x + { 3, 33, 150, 152, 0, } , // 8 pipes 16 bpe @ SW_64K_S3_X @ Navi1x + { 3, 29, 151, 148, 0, } , // 16 pipes 1 bpe @ SW_64K_S3_X @ Navi1x + { 3, 30, 152, 149, 0, } , // 16 pipes 2 bpe @ SW_64K_S3_X @ Navi1x + { 3, 31, 153, 150, 0, } , // 16 pipes 4 bpe @ SW_64K_S3_X @ Navi1x + { 3, 32, 154, 151, 0, } , // 16 pipes 8 bpe @ SW_64K_S3_X @ Navi1x + { 3, 33, 155, 152, 0, } , // 16 pipes 16 bpe @ SW_64K_S3_X @ Navi1x + { 3, 29, 156, 153, 0, } , // 32 pipes 1 bpe @ SW_64K_S3_X @ Navi1x + { 3, 30, 157, 154, 0, } , // 32 pipes 2 bpe @ SW_64K_S3_X @ Navi1x + { 3, 31, 158, 155, 0, } , // 32 pipes 4 bpe @ SW_64K_S3_X @ Navi1x + { 3, 32, 159, 156, 0, } , // 32 pipes 8 bpe @ SW_64K_S3_X @ Navi1x + { 3, 33, 160, 157, 0, } , // 32 pipes 16 bpe @ SW_64K_S3_X @ Navi1x + { 3, 29, 161, 158, 0, } , // 64 pipes 1 bpe @ SW_64K_S3_X @ Navi1x + { 3, 30, 162, 159, 0, } , // 64 pipes 2 bpe @ SW_64K_S3_X @ Navi1x + { 3, 31, 163, 160, 0, } , // 64 pipes 4 bpe @ SW_64K_S3_X @ Navi1x + { 3, 32, 164, 161, 0, } , // 64 pipes 8 bpe @ SW_64K_S3_X @ Navi1x + { 3, 33, 165, 162, 0, } , // 64 pipes 16 bpe @ SW_64K_S3_X @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_S3_T_PATINFO[] = +{ + { 1, 29, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_S3_T @ Navi1x + { 1, 30, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_S3_T @ Navi1x + { 1, 31, 133, 150, 0, } , // 1 pipes 4 bpe @ SW_64K_S3_T @ Navi1x + { 1, 32, 134, 151, 0, } , // 1 pipes 8 bpe @ SW_64K_S3_T @ Navi1x + { 1, 33, 135, 152, 0, } , // 1 pipes 16 bpe @ SW_64K_S3_T @ Navi1x + { 3, 29, 136, 148, 0, } , // 2 pipes 1 bpe @ SW_64K_S3_T @ Navi1x + { 3, 30, 137, 149, 0, } , // 2 pipes 2 bpe @ SW_64K_S3_T @ Navi1x + { 3, 31, 138, 150, 0, } , // 2 pipes 4 bpe @ SW_64K_S3_T @ Navi1x + { 3, 32, 139, 151, 0, } , // 2 pipes 8 bpe @ SW_64K_S3_T @ Navi1x + { 3, 33, 140, 152, 0, } , // 2 pipes 16 bpe @ SW_64K_S3_T @ Navi1x + { 3, 29, 141, 148, 0, } , // 4 pipes 1 bpe @ SW_64K_S3_T @ Navi1x + { 3, 30, 142, 149, 0, } , // 4 pipes 2 bpe @ SW_64K_S3_T @ Navi1x + { 3, 31, 143, 150, 0, } , // 4 pipes 4 bpe @ SW_64K_S3_T @ Navi1x + { 3, 32, 144, 151, 0, } , // 4 pipes 8 bpe @ SW_64K_S3_T @ Navi1x + { 3, 33, 145, 152, 0, } , // 4 pipes 16 bpe @ SW_64K_S3_T @ Navi1x + { 3, 29, 166, 148, 0, } , // 8 pipes 1 bpe @ SW_64K_S3_T @ Navi1x + { 3, 30, 167, 149, 0, } , // 8 pipes 2 bpe @ SW_64K_S3_T @ Navi1x + { 3, 31, 168, 150, 0, } , // 8 pipes 4 bpe @ SW_64K_S3_T @ Navi1x + { 3, 32, 169, 151, 0, } , // 8 pipes 8 bpe @ SW_64K_S3_T @ Navi1x + { 3, 33, 170, 152, 0, } , // 8 pipes 16 bpe @ SW_64K_S3_T @ Navi1x + { 3, 29, 171, 148, 0, } , // 16 pipes 1 bpe @ SW_64K_S3_T @ Navi1x + { 3, 30, 172, 149, 0, } , // 16 pipes 2 bpe @ SW_64K_S3_T @ Navi1x + { 3, 31, 173, 150, 0, } , // 16 pipes 4 bpe @ SW_64K_S3_T @ Navi1x + { 3, 32, 174, 151, 0, } , // 16 pipes 8 bpe @ SW_64K_S3_T @ Navi1x + { 3, 33, 175, 152, 0, } , // 16 pipes 16 bpe @ SW_64K_S3_T @ Navi1x + { 3, 29, 176, 153, 0, } , // 32 pipes 1 bpe @ SW_64K_S3_T @ Navi1x + { 3, 30, 177, 154, 0, } , // 32 pipes 2 bpe @ SW_64K_S3_T @ Navi1x + { 3, 31, 178, 155, 0, } , // 32 pipes 4 bpe @ SW_64K_S3_T @ Navi1x + { 3, 32, 179, 156, 0, } , // 32 pipes 8 bpe @ SW_64K_S3_T @ Navi1x + { 3, 33, 180, 157, 0, } , // 32 pipes 16 bpe @ SW_64K_S3_T @ Navi1x + { 3, 29, 131, 163, 0, } , // 64 pipes 1 bpe @ SW_64K_S3_T @ Navi1x + { 3, 30, 132, 164, 0, } , // 64 pipes 2 bpe @ SW_64K_S3_T @ Navi1x + { 3, 31, 133, 165, 0, } , // 64 pipes 4 bpe @ SW_64K_S3_T @ Navi1x + { 3, 32, 134, 166, 0, } , // 64 pipes 8 bpe @ SW_64K_S3_T @ Navi1x + { 3, 33, 135, 167, 0, } , // 64 pipes 16 bpe @ SW_64K_S3_T @ Navi1x +}; + +const ADDR_SW_PATINFO SW_64K_D3_X_PATINFO[] = +{ + { 1, 34, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_D3_X @ Navi1x + { 1, 35, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_D3_X @ Navi1x + { 1, 36, 133, 150, 0, } , // 1 pipes 4 bpe @ SW_64K_D3_X @ Navi1x + { 1, 37, 134, 151, 0, } , // 1 pipes 8 bpe @ SW_64K_D3_X @ Navi1x + { 1, 38, 135, 152, 0, } , // 1 pipes 16 bpe @ SW_64K_D3_X @ Navi1x + { 2, 34, 181, 148, 0, } , // 2 pipes 1 bpe @ SW_64K_D3_X @ Navi1x + { 2, 35, 182, 149, 0, } , // 2 pipes 2 bpe @ SW_64K_D3_X @ Navi1x + { 2, 36, 183, 150, 0, } , // 2 pipes 4 bpe @ SW_64K_D3_X @ Navi1x + { 2, 37, 184, 168, 0, } , // 2 pipes 8 bpe @ SW_64K_D3_X @ Navi1x + { 2, 38, 185, 169, 0, } , // 2 pipes 16 bpe @ SW_64K_D3_X @ Navi1x + { 2, 34, 186, 170, 0, } , // 4 pipes 1 bpe @ SW_64K_D3_X @ Navi1x + { 2, 35, 186, 171, 0, } , // 4 pipes 2 bpe @ SW_64K_D3_X @ Navi1x + { 2, 36, 187, 172, 0, } , // 4 pipes 4 bpe @ SW_64K_D3_X @ Navi1x + { 2, 37, 188, 169, 0, } , // 4 pipes 8 bpe @ SW_64K_D3_X @ Navi1x + { 3, 38, 189, 169, 0, } , // 4 pipes 16 bpe @ SW_64K_D3_X @ Navi1x + { 2, 34, 190, 173, 0, } , // 8 pipes 1 bpe @ SW_64K_D3_X @ Navi1x + { 3, 35, 191, 171, 0, } , // 8 pipes 2 bpe @ SW_64K_D3_X @ Navi1x + { 3, 36, 192, 172, 0, } , // 8 pipes 4 bpe @ SW_64K_D3_X @ Navi1x + { 3, 37, 193, 169, 0, } , // 8 pipes 8 bpe @ SW_64K_D3_X @ Navi1x + { 3, 38, 194, 169, 0, } , // 8 pipes 16 bpe @ SW_64K_D3_X @ Navi1x + { 3, 34, 195, 174, 0, } , // 16 pipes 1 bpe @ SW_64K_D3_X @ Navi1x + { 3, 35, 196, 171, 0, } , // 16 pipes 2 bpe @ SW_64K_D3_X @ Navi1x + { 3, 36, 197, 172, 0, } , // 16 pipes 4 bpe @ SW_64K_D3_X @ Navi1x + { 3, 37, 198, 169, 0, } , // 16 pipes 8 bpe @ SW_64K_D3_X @ Navi1x + { 3, 38, 199, 169, 0, } , // 16 pipes 16 bpe @ SW_64K_D3_X @ Navi1x + { 3, 34, 200, 175, 0, } , // 32 pipes 1 bpe @ SW_64K_D3_X @ Navi1x + { 3, 35, 201, 176, 0, } , // 32 pipes 2 bpe @ SW_64K_D3_X @ Navi1x + { 3, 36, 202, 177, 0, } , // 32 pipes 4 bpe @ SW_64K_D3_X @ Navi1x + { 3, 37, 203, 178, 0, } , // 32 pipes 8 bpe @ SW_64K_D3_X @ Navi1x + { 3, 38, 204, 178, 0, } , // 32 pipes 16 bpe @ SW_64K_D3_X @ Navi1x + { 3, 34, 205, 179, 0, } , // 64 pipes 1 bpe @ SW_64K_D3_X @ Navi1x + { 3, 35, 206, 180, 0, } , // 64 pipes 2 bpe @ SW_64K_D3_X @ Navi1x + { 3, 36, 207, 181, 0, } , // 64 pipes 4 bpe @ SW_64K_D3_X @ Navi1x + { 3, 37, 208, 182, 0, } , // 64 pipes 8 bpe @ SW_64K_D3_X @ Navi1x + { 3, 38, 209, 182, 0, } , // 64 pipes 16 bpe @ SW_64K_D3_X @ Navi1x +}; + +const ADDR_SW_PATINFO SW_256_S_RBPLUS_PATINFO[] = +{ + { 1, 0, 0, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256_S @ RbPlus + { 1, 0, 0, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256_S @ RbPlus + { 1, 1, 0, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256_S @ RbPlus + { 1, 2, 0, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256_S @ RbPlus + { 1, 3, 0, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256_S @ RbPlus + { 1, 4, 0, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256_S @ RbPlus +}; + +const ADDR_SW_PATINFO SW_256_D_RBPLUS_PATINFO[] = +{ + { 1, 5, 0, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256_D @ RbPlus + { 1, 5, 0, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256_D @ RbPlus + { 1, 1, 0, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256_D @ RbPlus + { 1, 39, 0, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256_D @ RbPlus + { 1, 6, 0, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256_D @ RbPlus + { 1, 7, 0, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256_D @ RbPlus +}; + +const ADDR_SW_PATINFO SW_4K_S_RBPLUS_PATINFO[] = +{ + { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S @ RbPlus + { 1, 0, 1, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S @ RbPlus + { 1, 1, 2, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S @ RbPlus + { 1, 2, 3, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S @ RbPlus + { 1, 3, 4, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S @ RbPlus + { 1, 4, 5, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S @ RbPlus +}; + +const ADDR_SW_PATINFO SW_4K_D_RBPLUS_PATINFO[] = +{ + { 1, 5, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_D @ RbPlus + { 1, 5, 1, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_D @ RbPlus + { 1, 1, 2, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_D @ RbPlus + { 1, 39, 3, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_D @ RbPlus + { 1, 6, 4, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_D @ RbPlus + { 1, 7, 5, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D @ RbPlus +}; + +const ADDR_SW_PATINFO SW_4K_S_X_RBPLUS_PATINFO[] = +{ + { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 1, 2, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 1, 3, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 1, 4, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 6, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 7, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 8, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 9, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 10, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 210, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 211, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 212, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 213, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 214, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 215, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 216, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 217, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 218, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 219, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 11, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 12, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 13, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 14, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 15, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 220, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 221, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 222, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 223, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 224, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 225, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 226, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 227, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 228, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 229, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 16, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 17, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 18, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 19, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 20, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 230, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 231, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 232, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 233, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 234, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 235, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 236, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 237, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 238, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 239, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 21, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 22, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 23, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 24, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 25, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 240, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 241, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 242, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 243, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 244, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 245, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 246, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 247, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 248, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 249, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 21, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 22, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 23, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 24, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 25, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus + { 3, 0, 240, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus + { 3, 1, 241, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus + { 3, 2, 242, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S_X @ RbPlus + { 3, 3, 243, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S_X @ RbPlus + { 3, 4, 244, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus +}; + +const ADDR_SW_PATINFO SW_4K_D_X_RBPLUS_PATINFO[] = +{ + { 1, 5, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 1, 39, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 1, 6, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 1, 7, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 6, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 7, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 8, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 9, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 10, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 210, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 211, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 212, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 213, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 214, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 215, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 216, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 217, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 218, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 219, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 11, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 12, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 13, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 14, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 15, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 220, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 221, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 222, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 223, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 224, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 225, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 226, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 227, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 228, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 229, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 16, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 17, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 18, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 19, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 20, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 230, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 231, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 232, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 233, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 234, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 235, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 236, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 237, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 238, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 239, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 21, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 22, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 23, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 24, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 25, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 240, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 241, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 242, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 243, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 244, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 245, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 246, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 247, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 248, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 249, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 21, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 22, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 23, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 24, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 25, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus + { 3, 5, 240, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus + { 3, 1, 241, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus + { 3, 39, 242, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_D_X @ RbPlus + { 3, 6, 243, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_D_X @ RbPlus + { 3, 7, 244, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus +}; + +const ADDR_SW_PATINFO SW_4K_S3_RBPLUS_PATINFO[] = +{ + { 1, 29, 131, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus + { 1, 29, 131, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus + { 1, 30, 132, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus + { 1, 31, 133, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S3 @ RbPlus + { 1, 32, 134, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S3 @ RbPlus + { 1, 33, 135, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus +}; + +const ADDR_SW_PATINFO SW_4K_S3_X_RBPLUS_PATINFO[] = +{ + { 1, 29, 131, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 1, 30, 132, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 1, 31, 133, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 1, 32, 134, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 1, 33, 135, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 136, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 137, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 138, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 139, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 140, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 141, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 142, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 143, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 144, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 145, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 146, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 147, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 148, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 149, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 150, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 141, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 142, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 143, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 144, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 145, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 146, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 147, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 148, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 149, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 150, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 151, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 152, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 153, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 154, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 155, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 146, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 147, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 148, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 149, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 150, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 151, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 152, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 153, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 154, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 155, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 151, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 152, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 153, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 154, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 155, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 151, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 152, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 153, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 154, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 155, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 151, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 152, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 153, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 154, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 155, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 151, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 152, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 153, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 154, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 155, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 151, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 152, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 153, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 154, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 155, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus + { 3, 29, 151, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus + { 3, 30, 152, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus + { 3, 31, 153, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S3_X @ RbPlus + { 3, 32, 154, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S3_X @ RbPlus + { 3, 33, 155, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_S_RBPLUS_PATINFO[] = +{ + { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S @ RbPlus + { 1, 0, 1, 1, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S @ RbPlus + { 1, 1, 2, 2, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S @ RbPlus + { 1, 2, 3, 3, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S @ RbPlus + { 1, 3, 4, 4, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S @ RbPlus + { 1, 4, 5, 5, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_D_RBPLUS_PATINFO[] = +{ + { 1, 5, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D @ RbPlus + { 1, 5, 1, 1, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D @ RbPlus + { 1, 1, 2, 2, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D @ RbPlus + { 1, 39, 3, 3, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D @ RbPlus + { 1, 6, 4, 4, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D @ RbPlus + { 1, 7, 5, 5, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_S_T_RBPLUS_PATINFO[] = +{ + { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 36, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 37, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 38, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 39, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 40, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 41, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 42, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 43, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 44, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 45, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 46, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 47, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 48, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 49, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 50, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 41, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 42, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 43, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 44, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 45, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 46, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 47, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 48, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 49, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 50, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 51, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 52, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 53, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 54, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 55, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 46, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 47, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 48, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 49, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 50, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 51, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 52, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 53, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 54, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 55, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 56, 16, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 57, 17, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 58, 18, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 59, 19, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 60, 20, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 51, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 52, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 53, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 54, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 55, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 56, 16, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 57, 17, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 58, 18, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 59, 19, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 60, 20, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 1, 21, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 2, 22, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 3, 23, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 4, 24, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 5, 25, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 56, 16, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 57, 17, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 58, 18, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 59, 19, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 60, 20, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus + { 2, 0, 1, 21, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus + { 2, 1, 2, 22, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus + { 2, 2, 3, 23, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S_T @ RbPlus + { 2, 3, 4, 24, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S_T @ RbPlus + { 2, 4, 5, 25, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_D_T_RBPLUS_PATINFO[] = +{ + { 1, 5, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 1, 39, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 1, 6, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 1, 7, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 36, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 37, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 38, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 39, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 40, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 41, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 42, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 43, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 44, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 45, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 46, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 47, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 48, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 49, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 50, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 41, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 42, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 43, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 44, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 45, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 46, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 47, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 48, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 49, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 50, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 51, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 52, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 53, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 54, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 55, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 46, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 47, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 48, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 49, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 50, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 51, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 52, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 53, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 54, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 55, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 56, 16, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 57, 17, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 58, 18, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 59, 19, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 60, 20, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 51, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 52, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 53, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 54, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 55, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 56, 16, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 57, 17, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 58, 18, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 59, 19, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 60, 20, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 1, 21, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 2, 22, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 3, 23, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 4, 24, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 5, 25, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 56, 16, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 57, 17, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 58, 18, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 59, 19, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 60, 20, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus + { 2, 5, 1, 21, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus + { 2, 1, 2, 22, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus + { 2, 39, 3, 23, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D_T @ RbPlus + { 2, 6, 4, 24, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D_T @ RbPlus + { 2, 7, 5, 25, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_S_X_RBPLUS_PATINFO[] = +{ + { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 6, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 7, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 8, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 9, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 10, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 210, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 211, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 212, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 213, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 214, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 215, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 216, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 217, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 218, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 219, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 11, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 12, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 13, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 14, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 15, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 220, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 221, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 222, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 223, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 224, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 225, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 226, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 227, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 228, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 229, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 16, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 17, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 18, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 19, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 20, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 230, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 231, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 232, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 233, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 234, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 250, 6, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 251, 7, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 252, 8, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 253, 9, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 254, 10, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 21, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 22, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 23, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 24, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 25, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 255, 6, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 256, 7, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 257, 8, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 258, 9, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 259, 10, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 260, 11, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 261, 12, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 262, 13, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 263, 14, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 264, 15, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 26, 6, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 27, 7, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 28, 8, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 29, 9, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 30, 10, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus + { 3, 0, 265, 11, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus + { 3, 1, 266, 12, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus + { 3, 2, 267, 13, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S_X @ RbPlus + { 3, 3, 268, 14, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S_X @ RbPlus + { 3, 4, 269, 15, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_D_X_RBPLUS_PATINFO[] = +{ + { 1, 5, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 1, 39, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 1, 6, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 1, 7, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 6, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 7, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 8, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 9, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 10, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 210, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 211, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 212, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 213, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 214, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 215, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 216, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 217, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 218, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 219, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 11, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 12, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 13, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 14, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 15, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 220, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 221, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 222, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 223, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 224, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 225, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 226, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 227, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 228, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 229, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 16, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 17, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 18, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 19, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 20, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 230, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 231, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 232, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 233, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 234, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 250, 6, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 251, 7, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 252, 8, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 253, 9, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 254, 10, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 21, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 22, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 23, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 24, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 25, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 255, 6, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 256, 7, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 257, 8, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 258, 9, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 259, 10, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 260, 11, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 261, 12, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 262, 13, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 263, 14, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 264, 15, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 26, 6, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 27, 7, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 28, 8, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 29, 9, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 30, 10, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus + { 3, 5, 265, 11, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus + { 3, 1, 266, 12, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus + { 3, 39, 267, 13, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D_X @ RbPlus + { 3, 6, 268, 14, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D_X @ RbPlus + { 3, 7, 269, 15, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_R_X_1xaa_RBPLUS_PATINFO[] = +{ + { 2, 0, 347, 193, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 2, 1, 348, 366, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 2, 39, 349, 195, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 2, 6, 350, 367, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 2, 7, 351, 368, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 352, 193, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 353, 194, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 354, 195, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 355, 369, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 356, 370, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 280, 193, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 281, 194, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 282, 195, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 283, 196, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 284, 197, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 394, 219, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 395, 371, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 396, 372, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 397, 373, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 398, 374, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 290, 203, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 291, 204, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 292, 205, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 293, 206, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 294, 207, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 295, 219, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 296, 375, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 297, 376, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 298, 377, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 299, 378, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 399, 379, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 399, 380, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 399, 381, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 399, 382, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 399, 383, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 400, 669, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 401, 670, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 402, 671, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 304, 387, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 305, 388, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 307, 379, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 307, 389, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 307, 381, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 307, 382, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 307, 390, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 307, 672, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 307, 673, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 307, 674, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 307, 675, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 307, 676, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 309, 677, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 309, 678, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 309, 679, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 309, 399, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 323, 400, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 309, 680, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 309, 681, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 309, 682, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 309, 404, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 323, 405, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 309, 505, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 309, 506, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 309, 507, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 309, 683, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 323, 684, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 311, 685, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 311, 686, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 311, 687, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 318, 411, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 324, 412, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 0, 311, 513, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 1, 311, 514, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 39, 311, 515, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 6, 318, 413, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_R_X 1xaa @ RbPlus + { 3, 7, 324, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_R_X_2xaa_RBPLUS_PATINFO[] = +{ + { 3, 0, 424, 526, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 348, 527, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 358, 528, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 350, 688, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 359, 689, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 352, 526, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 353, 527, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 354, 528, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 355, 688, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 356, 690, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 280, 526, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 281, 527, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 282, 528, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 283, 529, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 284, 530, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 394, 691, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 395, 692, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 396, 693, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 397, 694, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 425, 695, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 290, 534, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 291, 535, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 292, 536, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 293, 537, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 294, 538, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 295, 691, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 296, 696, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 297, 697, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 298, 698, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 299, 699, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 399, 700, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 399, 701, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 399, 702, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 399, 703, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 426, 429, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 400, 704, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 401, 705, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 402, 706, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 304, 707, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 364, 708, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 307, 700, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 307, 701, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 307, 702, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 307, 703, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 427, 390, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 307, 709, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 307, 710, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 307, 711, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 307, 712, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 427, 676, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 309, 713, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 309, 714, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 309, 715, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 323, 716, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 428, 400, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 309, 717, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 309, 718, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 309, 719, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 323, 720, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 428, 405, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 309, 721, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 309, 722, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 309, 723, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 323, 724, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 428, 684, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 318, 725, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 318, 726, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 318, 727, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 324, 728, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 429, 412, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 0, 318, 729, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 1, 318, 730, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 39, 318, 731, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 6, 324, 732, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_R_X 2xaa @ RbPlus + { 3, 7, 429, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_R_X_4xaa_RBPLUS_PATINFO[] = +{ + { 3, 0, 347, 566, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 348, 733, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 349, 568, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 350, 734, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 351, 735, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 352, 566, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 353, 567, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 354, 568, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 355, 736, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 356, 737, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 280, 566, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 281, 567, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 282, 568, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 283, 569, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 284, 570, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 394, 587, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 395, 738, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 396, 739, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 397, 740, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 430, 741, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 290, 576, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 291, 577, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 292, 578, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 293, 579, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 405, 580, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 295, 587, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 296, 742, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 297, 743, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 298, 740, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 431, 699, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 399, 744, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 399, 745, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 399, 746, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 432, 747, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 433, 429, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 400, 748, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 401, 749, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 402, 750, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 434, 707, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 435, 708, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 307, 744, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 307, 751, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 307, 746, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 436, 703, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 437, 390, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 307, 752, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 307, 753, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 307, 754, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 436, 712, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 437, 676, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 323, 755, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 323, 756, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 323, 757, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 438, 716, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 439, 400, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 323, 758, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 323, 759, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 323, 760, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 438, 720, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 439, 405, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 323, 761, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 323, 762, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 323, 763, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 438, 724, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 439, 684, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 324, 764, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 324, 765, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 324, 766, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 440, 728, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 441, 412, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 0, 324, 767, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 1, 324, 768, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 39, 324, 769, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 6, 440, 732, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_R_X 4xaa @ RbPlus + { 3, 7, 441, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_R_X_8xaa_RBPLUS_PATINFO[] = +{ + { 3, 0, 424, 619, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 348, 620, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 358, 621, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 350, 770, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 359, 771, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 352, 619, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 353, 620, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 354, 621, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 355, 770, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 378, 772, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 280, 619, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 281, 620, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 282, 621, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 283, 622, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 413, 623, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 394, 773, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 395, 774, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 442, 775, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 443, 776, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 444, 777, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 415, 629, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 291, 630, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 292, 631, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 416, 632, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 417, 580, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 295, 773, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 296, 778, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 297, 779, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 445, 780, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 446, 699, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 399, 781, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 399, 782, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 447, 783, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 448, 784, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 449, 429, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 450, 785, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 302, 786, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 303, 787, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 420, 788, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 451, 708, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 339, 781, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 339, 782, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 422, 746, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 452, 703, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 453, 390, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 339, 789, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 339, 790, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 422, 754, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 452, 712, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 453, 676, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 343, 791, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 341, 792, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 423, 757, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 454, 716, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 455, 400, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 343, 793, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 341, 794, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 423, 760, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 454, 720, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 455, 405, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 343, 795, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 341, 796, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 423, 763, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 454, 724, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 455, 684, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 344, 797, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 345, 798, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 456, 766, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 457, 728, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 458, 412, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 0, 344, 799, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 1, 345, 800, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 39, 456, 769, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 6, 457, 732, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_R_X 8xaa @ RbPlus + { 3, 7, 458, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_RBPLUS_PATINFO[] = +{ + { 2, 8, 347, 193, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 2, 9, 348, 366, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 2, 10, 349, 195, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 2, 11, 350, 367, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 2, 7, 351, 368, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 352, 193, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 353, 194, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 354, 195, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 355, 369, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 356, 370, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 280, 193, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 281, 194, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 282, 195, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 283, 196, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 284, 197, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 285, 219, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 286, 371, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 287, 372, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 288, 373, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 289, 374, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 290, 203, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 291, 204, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 292, 205, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 293, 206, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 294, 207, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 295, 219, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 296, 375, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 297, 376, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 298, 377, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 299, 378, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 300, 379, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 300, 380, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 300, 381, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 300, 382, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 300, 383, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 301, 384, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 302, 385, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 303, 386, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 304, 387, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 305, 388, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 306, 379, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 306, 389, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 306, 381, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 307, 382, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 307, 390, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 306, 391, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 306, 392, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 306, 393, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 307, 394, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 307, 395, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 308, 396, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 308, 397, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 308, 398, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 309, 399, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 323, 400, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 308, 401, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 308, 402, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 308, 403, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 309, 404, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 323, 405, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 308, 240, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 308, 241, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 308, 242, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 309, 406, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 323, 407, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 310, 408, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 310, 409, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 310, 410, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 318, 411, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 324, 412, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 8, 310, 250, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 9, 310, 251, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 10, 310, 252, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 11, 318, 413, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_Z_X 1xaa @ RbPlus + { 3, 7, 324, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_RBPLUS_PATINFO[] = +{ + { 2, 13, 357, 415, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 2, 14, 349, 195, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 358, 263, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 350, 416, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 359, 417, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 360, 415, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 354, 195, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 354, 263, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 361, 418, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 356, 419, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 281, 262, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 282, 195, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 282, 263, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 317, 264, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 284, 265, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 286, 420, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 287, 376, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 287, 421, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 289, 422, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 289, 423, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 291, 268, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 292, 205, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 292, 269, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 293, 270, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 294, 271, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 296, 420, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 297, 376, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 297, 421, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 298, 424, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 299, 423, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 300, 425, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 300, 426, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 300, 427, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 362, 428, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 363, 429, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 302, 430, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 303, 386, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 303, 431, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 305, 432, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 364, 433, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 306, 380, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 306, 381, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 306, 434, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 307, 435, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 365, 435, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 306, 402, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 306, 403, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 306, 436, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 307, 405, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 365, 405, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 308, 397, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 308, 398, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 308, 437, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 323, 438, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 366, 438, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 308, 402, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 308, 403, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 308, 436, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 323, 439, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 366, 439, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 308, 440, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 308, 242, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 308, 441, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 323, 442, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 366, 442, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 310, 443, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 310, 410, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 310, 444, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 324, 412, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 367, 412, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 13, 310, 445, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 14, 310, 252, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 15, 310, 446, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 16, 324, 414, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_Z_X 2xaa @ RbPlus + { 3, 17, 367, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_RBPLUS_PATINFO[] = +{ + { 2, 18, 349, 195, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 349, 447, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 349, 448, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 350, 449, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 351, 450, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 354, 195, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 368, 451, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 354, 299, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 355, 452, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 356, 453, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 282, 195, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 282, 298, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 282, 299, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 283, 300, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 284, 301, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 287, 372, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 287, 454, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 287, 455, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 288, 456, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 331, 457, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 292, 205, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 292, 306, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 292, 307, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 320, 308, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 321, 309, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 297, 376, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 297, 458, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 297, 459, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 299, 460, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 369, 461, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 300, 381, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 300, 462, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 300, 463, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 363, 464, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 370, 465, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 303, 386, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 303, 466, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 303, 467, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 371, 468, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 337, 469, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 306, 381, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 306, 462, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 306, 470, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 372, 470, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 373, 470, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 306, 393, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 306, 471, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 306, 472, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 372, 472, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 373, 472, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 308, 398, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 308, 473, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 308, 438, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 374, 438, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 375, 438, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 308, 403, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 308, 471, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 308, 439, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 374, 439, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 375, 439, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 308, 242, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 308, 441, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 308, 442, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 374, 442, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 375, 442, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 310, 410, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 310, 474, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 310, 412, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 376, 412, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 377, 412, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 18, 310, 252, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 19, 310, 475, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 20, 310, 414, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 21, 376, 414, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_Z_X 4xaa @ RbPlus + { 3, 22, 377, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_RBPLUS_PATINFO[] = +{ + { 3, 23, 358, 263, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 349, 448, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 358, 332, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 350, 476, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 359, 477, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 354, 263, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 354, 299, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 354, 332, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 361, 478, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 378, 479, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 282, 263, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 282, 299, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 282, 332, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 317, 333, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 329, 334, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 287, 421, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 287, 480, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 287, 481, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 379, 482, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 380, 483, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 292, 269, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 292, 307, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 292, 339, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 332, 340, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 333, 341, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 297, 421, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 297, 459, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 297, 481, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 381, 484, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 382, 485, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 300, 434, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 300, 463, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 383, 486, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 384, 487, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 385, 488, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 303, 431, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 303, 467, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 303, 489, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 337, 469, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 386, 469, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 306, 434, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 306, 470, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 387, 490, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 373, 470, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 388, 470, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 306, 436, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 306, 472, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 387, 491, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 373, 472, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 388, 492, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 308, 437, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 308, 438, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 389, 493, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 375, 438, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 390, 438, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 308, 436, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 308, 439, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 391, 494, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 375, 439, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 390, 439, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 308, 441, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 308, 442, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 391, 495, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 375, 442, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 390, 442, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 310, 444, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 310, 412, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 392, 496, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 377, 412, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 393, 412, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 23, 310, 446, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 24, 310, 414, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 25, 367, 414, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 26, 377, 414, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_Z_X 8xaa @ RbPlus + { 3, 27, 393, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_S3_RBPLUS_PATINFO[] = +{ + { 1, 29, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus + { 1, 29, 131, 148, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus + { 1, 30, 132, 149, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus + { 1, 31, 133, 150, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3 @ RbPlus + { 1, 32, 134, 151, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3 @ RbPlus + { 1, 33, 135, 152, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_S3_X_RBPLUS_PATINFO[] = +{ + { 1, 29, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 1, 30, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 1, 31, 133, 150, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 1, 32, 134, 151, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 1, 33, 135, 152, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 136, 148, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 137, 149, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 138, 150, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 139, 151, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 140, 152, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 141, 148, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 142, 149, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 143, 150, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 144, 151, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 145, 152, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 146, 148, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 147, 149, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 148, 150, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 149, 151, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 150, 152, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 141, 148, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 142, 149, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 143, 150, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 144, 151, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 145, 152, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 146, 148, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 147, 149, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 148, 150, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 149, 151, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 150, 152, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 151, 148, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 152, 149, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 153, 150, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 154, 151, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 155, 152, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 146, 148, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 147, 149, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 148, 150, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 149, 151, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 150, 152, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 151, 148, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 152, 149, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 153, 150, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 154, 151, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 155, 152, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 156, 153, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 157, 154, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 158, 155, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 159, 156, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 160, 157, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 151, 148, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 152, 149, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 153, 150, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 154, 151, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 155, 152, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 156, 153, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 157, 154, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 158, 155, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 159, 156, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 160, 157, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 161, 158, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 162, 159, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 163, 160, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 164, 161, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 165, 162, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 156, 153, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 157, 154, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 158, 155, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 159, 156, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 160, 157, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus + { 3, 29, 161, 158, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus + { 3, 30, 162, 159, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus + { 3, 31, 163, 160, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3_X @ RbPlus + { 3, 32, 164, 161, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3_X @ RbPlus + { 3, 33, 165, 162, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_S3_T_RBPLUS_PATINFO[] = +{ + { 1, 29, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 1, 30, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 1, 31, 133, 150, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 1, 32, 134, 151, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 1, 33, 135, 152, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 136, 148, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 137, 149, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 138, 150, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 139, 151, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 140, 152, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 141, 148, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 142, 149, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 143, 150, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 144, 151, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 145, 152, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 166, 148, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 167, 149, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 168, 150, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 169, 151, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 170, 152, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 141, 148, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 142, 149, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 143, 150, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 144, 151, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 145, 152, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 166, 148, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 167, 149, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 168, 150, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 169, 151, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 170, 152, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 171, 148, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 172, 149, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 173, 150, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 174, 151, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 175, 152, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 166, 148, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 167, 149, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 168, 150, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 169, 151, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 170, 152, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 171, 148, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 172, 149, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 173, 150, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 174, 151, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 175, 152, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 176, 153, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 177, 154, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 178, 155, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 179, 156, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 180, 157, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 171, 148, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 172, 149, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 173, 150, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 174, 151, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 175, 152, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 176, 153, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 177, 154, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 178, 155, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 179, 156, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 180, 157, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 131, 163, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 132, 164, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 133, 165, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 134, 166, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 135, 167, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 176, 153, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 177, 154, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 178, 155, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 179, 156, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 180, 157, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus + { 3, 29, 131, 163, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus + { 3, 30, 132, 164, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus + { 3, 31, 133, 165, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3_T @ RbPlus + { 3, 32, 134, 166, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3_T @ RbPlus + { 3, 33, 135, 167, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus +}; + +const ADDR_SW_PATINFO SW_64K_D3_X_RBPLUS_PATINFO[] = +{ + { 1, 34, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 1, 35, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 1, 36, 133, 150, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 1, 37, 134, 151, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 1, 38, 135, 152, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 2, 34, 459, 170, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 2, 35, 459, 801, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 2, 36, 460, 802, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 2, 37, 461, 152, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 3, 38, 462, 152, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 463, 803, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 463, 804, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 464, 805, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 465, 806, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 466, 806, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 467, 803, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 467, 804, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 468, 805, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 469, 806, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 470, 806, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 471, 807, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 472, 808, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 473, 809, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 474, 810, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 475, 811, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 476, 812, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 477, 804, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 478, 805, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 479, 806, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 480, 806, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 481, 813, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 482, 804, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 483, 805, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 484, 806, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 485, 806, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 486, 814, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 486, 815, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 486, 816, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 487, 817, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 488, 817, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 489, 812, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 490, 804, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 491, 805, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 492, 806, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 493, 806, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 489, 818, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 494, 819, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 494, 820, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 495, 821, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 496, 821, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 497, 822, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 498, 823, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 499, 824, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 500, 825, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 501, 825, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 497, 826, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 498, 827, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 499, 828, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 500, 829, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 501, 829, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 497, 830, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 502, 831, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 502, 832, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 503, 833, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 504, 833, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 505, 834, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 506, 835, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 507, 836, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 508, 837, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 509, 837, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus + { 3, 34, 505, 838, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus + { 3, 35, 506, 839, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus + { 3, 36, 507, 840, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D3_X @ RbPlus + { 4, 37, 508, 841, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D3_X @ RbPlus + { 4, 38, 509, 841, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus +}; + +const ADDR_SW_PATINFO SW_VAR_R_X_1xaa_RBPLUS_PATINFO[] = +{ + { 2, 0, 270, 183, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 2, 1, 271, 184, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 2, 39, 272, 185, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 2, 6, 273, 186, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 2, 7, 274, 187, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 275, 188, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 276, 189, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 277, 190, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 278, 191, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 279, 192, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 280, 193, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 281, 194, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 282, 195, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 283, 196, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 284, 197, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 394, 198, 1, } , // 8 pipes (2 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 395, 199, 2, } , // 8 pipes (2 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 396, 200, 3, } , // 8 pipes (2 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 397, 201, 4, } , // 8 pipes (2 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 398, 202, 5, } , // 8 pipes (2 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 290, 203, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 291, 204, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 292, 205, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 293, 206, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 294, 207, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 295, 208, 6, } , // 8 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 296, 209, 2, } , // 8 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 297, 210, 7, } , // 8 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 298, 211, 4, } , // 8 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 299, 212, 8, } , // 8 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 399, 213, 9, } , // 16 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 399, 214, 10, } , // 16 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 399, 215, 11, } , // 16 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 399, 216, 12, } , // 16 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 399, 217, 13, } , // 16 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 400, 218, 15, } , // 8 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 401, 219, 15, } , // 8 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 402, 220, 15, } , // 8 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 304, 221, 15, } , // 8 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 305, 222, 15, } , // 8 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 307, 213, 9, } , // 16 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 307, 223, 16, } , // 16 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 307, 215, 11, } , // 16 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 307, 216, 17, } , // 16 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 307, 224, 13, } , // 16 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 307, 497, 18, } , // 32 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 307, 498, 19, } , // 32 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 307, 499, 20, } , // 32 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 307, 500, 21, } , // 32 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 307, 501, 22, } , // 32 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 309, 230, 125, } , // 16 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 309, 231, 126, } , // 16 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 309, 232, 127, } , // 16 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 309, 233, 26, } , // 16 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 309, 234, 27, } , // 16 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 309, 502, 28, } , // 32 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 309, 503, 19, } , // 32 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 309, 504, 29, } , // 32 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 309, 238, 30, } , // 32 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 309, 239, 31, } , // 32 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 309, 505, 32, } , // 64 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 309, 506, 33, } , // 64 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 309, 507, 34, } , // 64 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 309, 508, 35, } , // 64 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 309, 509, 36, } , // 64 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 311, 510, 128, } , // 32 pipes (32 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 311, 511, 129, } , // 32 pipes (32 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 311, 512, 130, } , // 32 pipes (32 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 311, 248, 40, } , // 32 pipes (32 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 311, 249, 41, } , // 32 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 0, 311, 513, 32, } , // 64 pipes (32 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 1, 311, 514, 42, } , // 64 pipes (32 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 39, 311, 515, 34, } , // 64 pipes (32 PKRs) 4 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 6, 311, 253, 43, } , // 64 pipes (32 PKRs) 8 bpe @ SW_VAR_R_X 1xaa @ RbPlus + { 3, 7, 311, 254, 44, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_VAR_R_X_2xaa_RBPLUS_PATINFO[] = +{ + { 3, 0, 403, 516, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 271, 517, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 313, 518, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 273, 519, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 314, 520, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 404, 521, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 276, 522, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 315, 523, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 278, 524, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 316, 525, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 280, 526, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 281, 527, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 282, 528, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 283, 529, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 284, 530, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 394, 208, 131, } , // 8 pipes (2 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 395, 531, 132, } , // 8 pipes (2 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 396, 302, 133, } , // 8 pipes (2 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 397, 532, 134, } , // 8 pipes (2 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 398, 533, 135, } , // 8 pipes (2 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 290, 534, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 291, 535, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 292, 536, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 293, 537, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 294, 538, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 295, 208, 131, } , // 8 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 296, 209, 132, } , // 8 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 297, 210, 133, } , // 8 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 298, 211, 134, } , // 8 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 299, 212, 135, } , // 8 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 399, 539, 136, } , // 16 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 399, 214, 137, } , // 16 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 399, 280, 138, } , // 16 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 399, 216, 139, } , // 16 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 399, 224, 140, } , // 16 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 400, 540, 15, } , // 8 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 401, 541, 15, } , // 8 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 402, 542, 15, } , // 8 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 304, 543, 15, } , // 8 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 305, 544, 15, } , // 8 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 307, 539, 136, } , // 16 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 307, 214, 137, } , // 16 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 307, 280, 138, } , // 16 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 307, 216, 139, } , // 16 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 307, 224, 140, } , // 16 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 307, 545, 141, } , // 32 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 307, 498, 142, } , // 32 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 307, 546, 143, } , // 32 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 307, 500, 144, } , // 32 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 307, 547, 145, } , // 32 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 309, 548, 146, } , // 16 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 309, 231, 147, } , // 16 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 309, 285, 148, } , // 16 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 309, 233, 149, } , // 16 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 309, 286, 150, } , // 16 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 309, 502, 141, } , // 32 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 309, 503, 151, } , // 32 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 309, 504, 143, } , // 32 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 309, 238, 152, } , // 32 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 309, 239, 153, } , // 32 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 309, 505, 154, } , // 64 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 309, 506, 155, } , // 64 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 309, 507, 156, } , // 64 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 309, 508, 157, } , // 64 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 309, 509, 158, } , // 64 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 318, 549, 159, } , // 32 pipes (32 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 318, 550, 160, } , // 32 pipes (32 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 318, 551, 161, } , // 32 pipes (32 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 318, 287, 162, } , // 32 pipes (32 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 318, 288, 163, } , // 32 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 0, 318, 552, 154, } , // 64 pipes (32 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 1, 318, 553, 155, } , // 64 pipes (32 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 39, 318, 554, 156, } , // 64 pipes (32 PKRs) 4 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 6, 318, 555, 157, } , // 64 pipes (32 PKRs) 8 bpe @ SW_VAR_R_X 2xaa @ RbPlus + { 3, 7, 318, 290, 158, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_VAR_R_X_4xaa_RBPLUS_PATINFO[] = +{ + { 3, 0, 270, 556, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 271, 557, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 272, 558, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 273, 559, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 274, 560, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 275, 561, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 276, 562, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 277, 563, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 278, 564, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 279, 565, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 280, 566, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 281, 567, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 282, 568, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 283, 569, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 284, 570, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 394, 571, 164, } , // 8 pipes (2 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 395, 572, 165, } , // 8 pipes (2 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 396, 573, 166, } , // 8 pipes (2 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 397, 574, 167, } , // 8 pipes (2 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 398, 575, 168, } , // 8 pipes (2 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 290, 576, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 291, 577, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 292, 578, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 293, 579, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 405, 580, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 295, 581, 169, } , // 8 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 296, 582, 165, } , // 8 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 297, 583, 170, } , // 8 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 298, 584, 167, } , // 8 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 299, 585, 168, } , // 8 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 399, 213, 171, } , // 16 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 399, 214, 172, } , // 16 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 399, 215, 173, } , // 16 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 399, 216, 174, } , // 16 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 399, 217, 175, } , // 16 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 400, 586, 15, } , // 8 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 401, 587, 15, } , // 8 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 402, 588, 15, } , // 8 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 304, 589, 15, } , // 8 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 406, 544, 15, } , // 8 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 307, 213, 171, } , // 16 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 307, 223, 176, } , // 16 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 307, 215, 173, } , // 16 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 307, 216, 177, } , // 16 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 307, 224, 175, } , // 16 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 307, 497, 178, } , // 32 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 307, 498, 179, } , // 32 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 307, 499, 180, } , // 32 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 307, 500, 181, } , // 32 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 307, 501, 182, } , // 32 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 323, 590, 183, } , // 16 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 323, 591, 184, } , // 16 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 323, 592, 185, } , // 16 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 323, 593, 186, } , // 16 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 323, 286, 187, } , // 16 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 323, 594, 188, } , // 32 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 323, 595, 179, } , // 32 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 323, 596, 189, } , // 32 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 323, 321, 190, } , // 32 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 323, 322, 191, } , // 32 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 323, 597, 192, } , // 64 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 323, 598, 193, } , // 64 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 323, 599, 194, } , // 64 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 323, 600, 195, } , // 64 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 323, 601, 196, } , // 64 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 324, 602, 197, } , // 32 pipes (32 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 324, 603, 198, } , // 32 pipes (32 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 324, 604, 199, } , // 32 pipes (32 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 324, 605, 200, } , // 32 pipes (32 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 324, 606, 201, } , // 32 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 0, 324, 607, 192, } , // 64 pipes (32 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 1, 324, 608, 202, } , // 64 pipes (32 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 39, 324, 609, 194, } , // 64 pipes (32 PKRs) 4 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 6, 324, 327, 203, } , // 64 pipes (32 PKRs) 8 bpe @ SW_VAR_R_X 4xaa @ RbPlus + { 3, 7, 324, 328, 204, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_VAR_R_X_8xaa_RBPLUS_PATINFO[] = +{ + { 3, 0, 407, 610, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 408, 611, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 409, 612, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 410, 613, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 411, 614, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 404, 615, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 276, 616, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 315, 617, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 278, 618, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 412, 565, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 280, 619, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 281, 620, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 282, 621, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 283, 622, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 413, 623, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 394, 624, 205, } , // 8 pipes (2 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 395, 625, 206, } , // 8 pipes (2 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 396, 626, 207, } , // 8 pipes (2 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 397, 627, 208, } , // 8 pipes (2 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 414, 628, 209, } , // 8 pipes (2 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 415, 629, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 291, 630, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 292, 631, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 416, 632, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 417, 580, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 295, 624, 205, } , // 8 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 296, 633, 206, } , // 8 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 297, 634, 207, } , // 8 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 298, 627, 208, } , // 8 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 418, 635, 210, } , // 8 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 399, 636, 211, } , // 16 pipes (4 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 399, 637, 212, } , // 16 pipes (4 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 399, 638, 213, } , // 16 pipes (4 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 399, 639, 214, } , // 16 pipes (4 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 419, 640, 215, } , // 16 pipes (4 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 301, 641, 216, } , // 8 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 302, 642, 216, } , // 8 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 303, 643, 216, } , // 8 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 420, 589, 105, } , // 8 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 421, 544, 217, } , // 8 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 339, 636, 211, } , // 16 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 339, 637, 212, } , // 16 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 339, 638, 213, } , // 16 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 339, 639, 214, } , // 16 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 422, 224, 175, } , // 16 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 339, 545, 218, } , // 32 pipes (8 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 339, 498, 219, } , // 32 pipes (8 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 339, 546, 220, } , // 32 pipes (8 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 339, 500, 221, } , // 32 pipes (8 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 339, 644, 222, } , // 32 pipes (8 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 343, 645, 223, } , // 16 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 343, 646, 224, } , // 16 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 343, 647, 225, } , // 16 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 341, 648, 226, } , // 16 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 423, 286, 187, } , // 16 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 343, 649, 218, } , // 32 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 343, 650, 227, } , // 32 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 343, 651, 220, } , // 32 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 343, 652, 221, } , // 32 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 341, 653, 228, } , // 32 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 343, 654, 229, } , // 64 pipes (16 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 343, 655, 230, } , // 64 pipes (16 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 343, 656, 231, } , // 64 pipes (16 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 343, 657, 232, } , // 64 pipes (16 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 343, 658, 233, } , // 64 pipes (16 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 346, 659, 234, } , // 32 pipes (32 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 346, 660, 235, } , // 32 pipes (32 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 346, 661, 236, } , // 32 pipes (32 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 344, 662, 237, } , // 32 pipes (32 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 345, 663, 238, } , // 32 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 0, 346, 664, 229, } , // 64 pipes (32 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 1, 346, 665, 230, } , // 64 pipes (32 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 39, 346, 666, 231, } , // 64 pipes (32 PKRs) 4 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 6, 346, 667, 232, } , // 64 pipes (32 PKRs) 8 bpe @ SW_VAR_R_X 8xaa @ RbPlus + { 3, 7, 344, 668, 204, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_VAR_Z_X_1xaa_RBPLUS_PATINFO[] = +{ + { 2, 8, 270, 183, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 2, 9, 271, 184, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 2, 10, 272, 185, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 2, 11, 273, 186, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 2, 7, 274, 187, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 275, 188, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 276, 189, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 277, 190, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 278, 191, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 279, 192, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 280, 193, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 281, 194, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 282, 195, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 283, 196, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 284, 197, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 285, 198, 1, } , // 8 pipes (2 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 286, 199, 2, } , // 8 pipes (2 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 287, 200, 3, } , // 8 pipes (2 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 288, 201, 4, } , // 8 pipes (2 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 289, 202, 5, } , // 8 pipes (2 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 290, 203, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 291, 204, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 292, 205, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 293, 206, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 294, 207, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 295, 208, 6, } , // 8 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 296, 209, 2, } , // 8 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 297, 210, 7, } , // 8 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 298, 211, 4, } , // 8 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 299, 212, 8, } , // 8 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 300, 213, 9, } , // 16 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 300, 214, 10, } , // 16 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 300, 215, 11, } , // 16 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 300, 216, 12, } , // 16 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 300, 217, 13, } , // 16 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 301, 218, 14, } , // 8 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 302, 219, 14, } , // 8 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 303, 220, 14, } , // 8 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 304, 221, 15, } , // 8 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 305, 222, 15, } , // 8 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 306, 213, 9, } , // 16 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 306, 223, 16, } , // 16 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 306, 215, 11, } , // 16 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 307, 216, 17, } , // 16 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 307, 224, 13, } , // 16 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 306, 225, 18, } , // 32 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 306, 226, 19, } , // 32 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 306, 227, 20, } , // 32 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 307, 228, 21, } , // 32 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 307, 229, 22, } , // 32 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 308, 230, 23, } , // 16 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 308, 231, 24, } , // 16 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 308, 232, 25, } , // 16 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 309, 233, 26, } , // 16 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 309, 234, 27, } , // 16 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 308, 235, 28, } , // 32 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 308, 236, 19, } , // 32 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 308, 237, 29, } , // 32 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 309, 238, 30, } , // 32 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 309, 239, 31, } , // 32 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 308, 240, 32, } , // 64 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 308, 241, 33, } , // 64 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 308, 242, 34, } , // 64 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 309, 243, 35, } , // 64 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 309, 244, 36, } , // 64 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 310, 245, 37, } , // 32 pipes (32 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 310, 246, 38, } , // 32 pipes (32 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 310, 247, 39, } , // 32 pipes (32 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 311, 248, 40, } , // 32 pipes (32 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 311, 249, 41, } , // 32 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 8, 310, 250, 32, } , // 64 pipes (32 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 9, 310, 251, 42, } , // 64 pipes (32 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 10, 310, 252, 34, } , // 64 pipes (32 PKRs) 4 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 11, 311, 253, 43, } , // 64 pipes (32 PKRs) 8 bpe @ SW_VAR_Z_X 1xaa @ RbPlus + { 3, 7, 311, 254, 44, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_VAR_Z_X_2xaa_RBPLUS_PATINFO[] = +{ + { 2, 13, 312, 255, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 2, 14, 272, 185, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 313, 256, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 273, 257, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 314, 258, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 276, 189, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 277, 190, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 315, 259, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 278, 260, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 316, 261, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 281, 262, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 282, 195, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 282, 263, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 317, 264, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 284, 265, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 286, 209, 2, } , // 8 pipes (2 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 287, 266, 3, } , // 8 pipes (2 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 287, 210, 45, } , // 8 pipes (2 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 288, 211, 46, } , // 8 pipes (2 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 289, 267, 47, } , // 8 pipes (2 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 291, 268, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 292, 205, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 292, 269, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 293, 270, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 294, 271, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 296, 209, 2, } , // 8 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 297, 210, 7, } , // 8 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 297, 210, 45, } , // 8 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 298, 211, 46, } , // 8 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 299, 212, 47, } , // 8 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 300, 272, 48, } , // 16 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 300, 273, 11, } , // 16 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 300, 273, 49, } , // 16 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 300, 274, 50, } , // 16 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 300, 275, 51, } , // 16 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 302, 219, 14, } , // 8 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 303, 220, 14, } , // 8 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 303, 276, 14, } , // 8 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 304, 277, 15, } , // 8 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 305, 278, 15, } , // 8 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 306, 279, 48, } , // 16 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 306, 215, 11, } , // 16 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 306, 280, 49, } , // 16 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 307, 281, 52, } , // 16 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 307, 224, 53, } , // 16 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 306, 236, 19, } , // 32 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 306, 237, 54, } , // 32 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 306, 237, 55, } , // 32 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 307, 282, 56, } , // 32 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 307, 283, 57, } , // 32 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 308, 284, 24, } , // 16 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 308, 232, 25, } , // 16 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 308, 285, 58, } , // 16 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 309, 233, 59, } , // 16 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 309, 286, 60, } , // 16 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 308, 236, 19, } , // 32 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 308, 237, 29, } , // 32 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 308, 237, 55, } , // 32 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 309, 238, 56, } , // 32 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 309, 239, 61, } , // 32 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 308, 241, 62, } , // 64 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 308, 242, 34, } , // 64 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 308, 242, 63, } , // 64 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 309, 243, 64, } , // 64 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 309, 244, 65, } , // 64 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 310, 246, 38, } , // 32 pipes (32 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 310, 247, 39, } , // 32 pipes (32 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 310, 247, 66, } , // 32 pipes (32 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 318, 287, 67, } , // 32 pipes (32 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 318, 288, 68, } , // 32 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 13, 310, 251, 62, } , // 64 pipes (32 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 14, 310, 252, 34, } , // 64 pipes (32 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 15, 310, 252, 63, } , // 64 pipes (32 PKRs) 4 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 16, 318, 289, 69, } , // 64 pipes (32 PKRs) 8 bpe @ SW_VAR_Z_X 2xaa @ RbPlus + { 3, 17, 318, 290, 65, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_VAR_Z_X_4xaa_RBPLUS_PATINFO[] = +{ + { 2, 18, 272, 185, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 272, 291, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 272, 292, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 273, 293, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 274, 294, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 277, 190, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 315, 259, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 277, 295, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 319, 296, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 279, 297, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 282, 195, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 282, 298, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 282, 299, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 283, 300, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 284, 301, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 287, 200, 3, } , // 8 pipes (2 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 287, 302, 45, } , // 8 pipes (2 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 287, 303, 70, } , // 8 pipes (2 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 289, 304, 71, } , // 8 pipes (2 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 289, 305, 72, } , // 8 pipes (2 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 292, 205, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 292, 306, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 292, 307, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 320, 308, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 321, 309, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 297, 210, 7, } , // 8 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 297, 210, 45, } , // 8 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 297, 310, 45, } , // 8 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 298, 311, 71, } , // 8 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 299, 312, 47, } , // 8 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 300, 215, 11, } , // 16 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 300, 215, 73, } , // 16 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 300, 215, 74, } , // 16 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 300, 216, 75, } , // 16 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 300, 217, 76, } , // 16 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 303, 220, 14, } , // 8 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 303, 276, 14, } , // 8 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 303, 313, 14, } , // 8 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 305, 314, 15, } , // 8 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 322, 315, 15, } , // 8 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 306, 215, 11, } , // 16 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 306, 232, 77, } , // 16 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 306, 215, 78, } , // 16 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 307, 216, 79, } , // 16 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 307, 224, 80, } , // 16 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 306, 227, 20, } , // 32 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 306, 316, 55, } , // 32 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 306, 227, 81, } , // 32 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 307, 317, 82, } , // 32 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 307, 229, 83, } , // 32 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 308, 232, 25, } , // 16 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 308, 232, 84, } , // 16 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 308, 318, 84, } , // 16 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 323, 319, 85, } , // 16 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 323, 320, 86, } , // 16 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 308, 237, 29, } , // 32 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 308, 237, 55, } , // 32 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 308, 237, 87, } , // 32 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 323, 321, 88, } , // 32 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 323, 322, 89, } , // 32 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 308, 242, 34, } , // 64 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 308, 242, 90, } , // 64 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 308, 242, 91, } , // 64 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 323, 323, 92, } , // 64 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 323, 324, 93, } , // 64 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 310, 247, 39, } , // 32 pipes (32 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 310, 247, 66, } , // 32 pipes (32 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 310, 247, 94, } , // 32 pipes (32 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 324, 325, 95, } , // 32 pipes (32 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 324, 326, 96, } , // 32 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 18, 310, 252, 34, } , // 64 pipes (32 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 19, 310, 252, 97, } , // 64 pipes (32 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 20, 310, 252, 98, } , // 64 pipes (32 PKRs) 4 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 21, 324, 327, 99, } , // 64 pipes (32 PKRs) 8 bpe @ SW_VAR_Z_X 4xaa @ RbPlus + { 3, 22, 324, 328, 100, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus +}; + +const ADDR_SW_PATINFO SW_VAR_Z_X_8xaa_RBPLUS_PATINFO[] = +{ + { 3, 23, 313, 256, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 272, 292, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 325, 292, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 326, 329, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 327, 294, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 315, 259, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 277, 295, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 315, 330, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 278, 331, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 328, 331, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 282, 263, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 282, 299, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 282, 332, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 317, 333, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 329, 334, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 287, 210, 45, } , // 8 pipes (2 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 287, 335, 70, } , // 8 pipes (2 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 287, 336, 70, } , // 8 pipes (2 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 330, 337, 72, } , // 8 pipes (2 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 331, 338, 101, } , // 8 pipes (2 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 292, 269, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 292, 307, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 292, 339, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 332, 340, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 333, 341, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 297, 210, 45, } , // 8 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 297, 310, 45, } , // 8 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 297, 342, 45, } , // 8 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 299, 343, 102, } , // 8 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 334, 344, 103, } , // 8 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 300, 273, 49, } , // 16 pipes (4 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 300, 273, 74, } , // 16 pipes (4 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 300, 345, 74, } , // 16 pipes (4 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 335, 346, 76, } , // 16 pipes (4 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 336, 286, 104, } , // 16 pipes (4 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 303, 276, 14, } , // 8 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 303, 313, 14, } , // 8 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 303, 347, 14, } , // 8 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 337, 348, 105, } , // 8 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 338, 349, 106, } , // 8 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 306, 280, 49, } , // 16 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 306, 215, 78, } , // 16 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 306, 350, 74, } , // 16 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 339, 351, 107, } , // 16 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 340, 351, 108, } , // 16 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 306, 237, 55, } , // 32 pipes (8 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 306, 237, 109, } , // 32 pipes (8 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 306, 237, 110, } , // 32 pipes (8 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 339, 352, 111, } , // 32 pipes (8 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 339, 353, 112, } , // 32 pipes (8 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 308, 285, 58, } , // 16 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 308, 318, 84, } , // 16 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 308, 354, 84, } , // 16 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 341, 355, 113, } , // 16 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 342, 356, 114, } , // 16 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 308, 237, 55, } , // 32 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 308, 237, 87, } , // 32 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 308, 237, 115, } , // 32 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 343, 357, 116, } , // 32 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 341, 358, 117, } , // 32 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 308, 242, 63, } , // 64 pipes (16 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 308, 242, 91, } , // 64 pipes (16 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 308, 242, 118, } , // 64 pipes (16 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 343, 359, 119, } , // 64 pipes (16 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 343, 360, 120, } , // 64 pipes (16 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 310, 247, 66, } , // 32 pipes (32 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 310, 247, 94, } , // 32 pipes (32 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 310, 361, 94, } , // 32 pipes (32 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 344, 362, 121, } , // 32 pipes (32 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 345, 363, 122, } , // 32 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 23, 310, 252, 63, } , // 64 pipes (32 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 24, 310, 252, 98, } , // 64 pipes (32 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 25, 310, 252, 118, } , // 64 pipes (32 PKRs) 4 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 26, 346, 364, 123, } , // 64 pipes (32 PKRs) 8 bpe @ SW_VAR_Z_X 8xaa @ RbPlus + { 3, 27, 344, 365, 124, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus +}; + +const UINT_64 GFX10_SW_PATTERN_NIBBLE01[][8] = +{ + {X0, X1, X2, X3, Y0, Y1, Y2, Y3, }, // 0 + {0, X0, X1, X2, Y0, Y1, Y2, X3, }, // 1 + {0, 0, X0, X1, Y0, Y1, Y2, X2, }, // 2 + {0, 0, 0, X0, Y0, Y1, X1, X2, }, // 3 + {0, 0, 0, 0, Y0, Y1, X0, X1, }, // 4 + {X0, X1, X2, Y1, Y0, Y2, X3, Y3, }, // 5 + {0, 0, 0, X0, Y0, X1, X2, Y1, }, // 6 + {0, 0, 0, 0, X0, Y0, X1, Y1, }, // 7 + {X0, Y0, X1, Y1, X2, Y2, X3, Y3, }, // 8 + {0, X0, Y0, X1, Y1, X2, Y2, X3, }, // 9 + {0, 0, X0, Y0, X1, Y1, X2, Y2, }, // 10 + {0, 0, 0, X0, Y0, X1, Y1, X2, }, // 11 + {X0, Y0, X1, Y1, X2, Y2, X3, Y4, }, // 12 + {S0, X0, Y0, X1, Y1, X2, Y2, X3, }, // 13 + {0, S0, X0, Y0, X1, Y1, X2, Y2, }, // 14 + {0, 0, S0, X0, Y0, X1, Y1, X2, }, // 15 + {0, 0, 0, S0, X0, Y0, X1, Y1, }, // 16 + {0, 0, 0, 0, S0, X0, Y0, X1, }, // 17 + {S0, S1, X0, Y0, X1, Y1, X2, Y2, }, // 18 + {0, S0, S1, X0, Y0, X1, Y1, X2, }, // 19 + {0, 0, S0, S1, X0, Y0, X1, Y1, }, // 20 + {0, 0, 0, S0, S1, X0, Y0, X1, }, // 21 + {0, 0, 0, 0, S0, S1, X0, Y0, }, // 22 + {S0, S1, S2, X0, Y0, X1, Y1, X2, }, // 23 + {0, S0, S1, S2, X0, Y0, X1, Y1, }, // 24 + {0, 0, S0, S1, S2, X0, Y0, X1, }, // 25 + {0, 0, 0, S0, S1, S2, X0, Y0, }, // 26 + {0, 0, 0, 0, S0, S1, S2, X0, }, // 27 + {X0, X1, X2, Y1, Y0, Y2, X3, Y4, }, // 28 + {X0, X1, Z0, Y0, Z1, Y1, X2, Z2, }, // 29 + {0, X0, Z0, Y0, Z1, Y1, X1, Z2, }, // 30 + {0, 0, X0, Y0, Z0, Y1, X1, Z1, }, // 31 + {0, 0, 0, X0, Z0, Y0, X1, Z1, }, // 32 + {0, 0, 0, 0, Z0, Y0, X0, Z1, }, // 33 + {X0, X1, Z0, Y0, Y1, Z1, X2, Z2, }, // 34 + {0, X0, Z0, Y0, X1, Z1, Y1, Z2, }, // 35 + {0, 0, X0, Y0, X1, Z0, Y1, Z1, }, // 36 + {0, 0, 0, X0, Y0, Z0, X1, Z1, }, // 37 + {0, 0, 0, 0, X0, Z0, Y0, Z1, }, // 38 + {0, 0, X0, X1, Y0, Y1, X2, Y2, }, // 39 +}; + +const UINT_64 GFX10_SW_PATTERN_NIBBLE2[][4] = +{ + {0, 0, 0, 0, }, // 0 + {Y4, X4, Y5, X5, }, // 1 + {Y3, X4, Y4, X5, }, // 2 + {Y3, X3, Y4, X4, }, // 3 + {Y2, X3, Y3, X4, }, // 4 + {Y2, X2, Y3, X3, }, // 5 + {Z0^X4^Y4, X4, Y5, X5, }, // 6 + {Z0^Y3^X4, X4, Y4, X5, }, // 7 + {Z0^X3^Y3, X3, Y4, X4, }, // 8 + {Z0^Y2^X3, X3, Y3, X4, }, // 9 + {Z0^X2^Y2, X2, Y3, X3, }, // 10 + {Z1^Y4^X5, Z0^X4^Y5, Y5, X5, }, // 11 + {Z1^Y3^X5, Z0^X4^Y4, Y4, X5, }, // 12 + {Z1^Y3^X4, Z0^X3^Y4, Y4, X4, }, // 13 + {Z1^Y2^X4, Z0^X3^Y3, Y3, X4, }, // 14 + {Z1^Y2^X3, Z0^X2^Y3, Y3, X3, }, // 15 + {Z2^Y4^X6, Z1^X4^Y6, Z0^X5^Y5, X5, }, // 16 + {Z2^Y3^X6, Z1^X4^Y5, Z0^Y4^X5, X5, }, // 17 + {Z2^Y3^X5, Z1^X3^Y5, Z0^X4^Y4, X4, }, // 18 + {Y2^Z2^X5, Z1^X3^Y4, Z0^Y3^X4, X4, }, // 19 + {Y2^Z2^X4, Z1^X2^Y4, Z0^X3^Y3, X3, }, // 20 + {Z3^Y4^X7, Z2^X4^Y7, Z1^Y5^X6, Z0^X5^Y6, }, // 21 + {Y3^Z3^X7, Z2^X4^Y6, Z1^Y4^X6, Z0^X5^Y5, }, // 22 + {Y3^Z3^X6, Z2^X3^Y6, Z1^Y4^X5, Z0^X4^Y5, }, // 23 + {Y2^Z3^X6, Z2^X3^Y5, Z1^Y3^X5, Z0^X4^Y4, }, // 24 + {Y2^Z3^X5, X2^Z2^Y5, Z1^Y3^X4, Z0^X3^Y4, }, // 25 + {Y4^Z4^X8, Z3^X4^Y8, Z2^Y5^X7, Z1^X5^Y7, }, // 26 + {Y3^Z4^X8, Z3^X4^Y7, Z2^Y4^X7, Z1^X5^Y6, }, // 27 + {Y3^Z4^X7, X3^Z3^Y7, Z2^Y4^X6, Z1^X4^Y6, }, // 28 + {Y2^Z4^X7, X3^Z3^Y6, Z2^Y3^X6, Z1^X4^Y5, }, // 29 + {Y2^Z4^X6, X2^Z3^Y6, Z2^Y3^X5, Z1^X3^Y5, }, // 30 + {Y4^Z5^X9, X4^Z4^Y9, Z3^Y5^X8, Z2^X5^Y8, }, // 31 + {Y3^Z5^X9, X4^Z4^Y8, Z3^Y4^X8, Z2^X5^Y7, }, // 32 + {Y3^Z5^X8, X3^Z4^Y8, Z3^Y4^X7, Z2^X4^Y7, }, // 33 + {Y2^Z5^X8, X3^Z4^Y7, Y3^Z3^X7, Z2^X4^Y6, }, // 34 + {Y2^Z5^X7, X2^Z4^Y7, Y3^Z3^X6, Z2^X3^Y6, }, // 35 + {X4^Y4, X4, Y5, X5, }, // 36 + {Y3^X4, X4, Y4, X5, }, // 37 + {X3^Y3, X3, Y4, X4, }, // 38 + {Y2^X3, X3, Y3, X4, }, // 39 + {X2^Y2, X2, Y3, X3, }, // 40 + {Y4^X5, X4^Y5, Y5, X5, }, // 41 + {Y3^X5, X4^Y4, Y4, X5, }, // 42 + {Y3^X4, X3^Y4, Y4, X4, }, // 43 + {Y2^X4, X3^Y3, Y3, X4, }, // 44 + {Y2^X3, X2^Y3, Y3, X3, }, // 45 + {Y4^X6, X4^Y6, X5^Y5, X5, }, // 46 + {Y3^X6, X4^Y5, Y4^X5, X5, }, // 47 + {Y3^X5, X3^Y5, X4^Y4, X4, }, // 48 + {Y2^X5, X3^Y4, Y3^X4, X4, }, // 49 + {Y2^X4, X2^Y4, X3^Y3, X3, }, // 50 + {Y4^X7, X4^Y7, Y5^X6, X5^Y6, }, // 51 + {Y3^X7, X4^Y6, Y4^X6, X5^Y5, }, // 52 + {Y3^X6, X3^Y6, Y4^X5, X4^Y5, }, // 53 + {Y2^X6, X3^Y5, Y3^X5, X4^Y4, }, // 54 + {Y2^X5, X2^Y5, Y3^X4, X3^Y4, }, // 55 + {Y4, X4, Y5^X7, X5^Y7, }, // 56 + {Y3, X4, Y4^X7, X5^Y6, }, // 57 + {Y3, X3, Y4^X6, X4^Y6, }, // 58 + {Y2, X3, Y3^X6, X4^Y5, }, // 59 + {Y2, X2, Y3^X5, X3^Y5, }, // 60 + {Z0^X3^Y3, X4, Y5, X5, }, // 61 + {Z0^X3^Y3, X4, Y4, X5, }, // 62 + {Z0^X3^Y3, X3, Y2, X4, }, // 63 + {Z0^X3^Y3, X2, Y2, X3, }, // 64 + {Z1^X3^Y3, Z0^X4^Y4, Y5, X5, }, // 65 + {Z1^X3^Y3, Z0^X4^Y4, Y4, X5, }, // 66 + {Z1^X3^Y3, Z0^X4^Y4, Y3, X4, }, // 67 + {Z1^X3^Y3, Z0^X4^Y4, Y2, X3, }, // 68 + {Z1^X3^Y3, Z0^X4^Y4, Y2, X2, }, // 69 + {Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, X5, }, // 70 + {Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, X4, }, // 71 + {Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, X3, }, // 72 + {Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, X2, }, // 73 + {X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, }, // 74 + {X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, }, // 75 + {X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, }, // 76 + {X3^Y3^Z5, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, }, // 77 + {X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, }, // 78 + {X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, }, // 79 + {Y3, Y4, X4, Y5, }, // 80 + {X2, Y3, X3, Y4, }, // 81 + {Z0^X3^Y3, Y4, X4, Y5, }, // 82 + {Z0^X3^Y3, X2, X3, Y4, }, // 83 + {Z1^X3^Y3, Z0^X4^Y4, Y4, Y5, }, // 84 + {Z1^X3^Y3, Z0^X4^Y4, X2, Y3, }, // 85 + {Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, Y4, }, // 86 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X6, Y2^X5^Y6, }, // 87 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X7, Y2^X5^Y7, }, // 88 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X8, Y2^X5^Y8, }, // 89 + {X3, Y3, X4, Y4, }, // 90 + {Z0^X3^Y3, X3, X4, Y4, }, // 91 + {Z1^X3^Y3, Z0^X4^Y4, X3, Y4, }, // 92 + {Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, Y2, }, // 93 + {Z1^X3^Y3, Z0^X4^Y4, Y2^X5^Y5, X2, }, // 94 + {Z2^X3^Y3, Z1^X4^Y4, Y2^Y5^X6, Z0^X5^Y6, }, // 95 + {Z1^X3^Y3, Z0^X4^Y4, Y2^Y5^X6, X1^X5^Y6, }, // 96 + {Z2^X3^Y3, Z1^X4^Y4, Y2^Y5^X7, Z0^X5^Y7, }, // 97 + {Z1^X3^Y3, Z0^X4^Y4, Y2^Y5^X7, X1^X5^Y7, }, // 98 + {Z2^X3^Y3, Z1^X4^Y4, Y2^Y5^X8, Z0^X5^Y8, }, // 99 + {Z1^X3^Y3, Z0^X4^Y4, Y2^Y5^X8, X1^X5^Y8, }, // 100 + {Z0^X3^Y3, Y2, X3, Y4, }, // 101 + {Z1^X3^Y3, Z0^X4^Y4, X2, Y2, }, // 102 + {Z1^X3^Y3, Z0^X4^Y4, Y2^X5^Y5, Y3, }, // 103 + {Z1^X3^Y3, Z0^X4^Y4, Y0^X5^Y5, Y2, }, // 104 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X6, Z3^X5^Y6, }, // 105 + {Z1^X3^Y3, Z0^X4^Y4, Y0^Y5^X6, X1^X5^Y6, }, // 106 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X7, Z4^X5^Y7, }, // 107 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X7, Z3^X5^Y7, }, // 108 + {Z1^X3^Y3, Z0^X4^Y4, Y0^Y5^X7, X1^X5^Y7, }, // 109 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X8, Z4^X5^Y8, }, // 110 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X8, Z3^X5^Y8, }, // 111 + {Z1^X3^Y3, Z0^X4^Y4, Y0^Y5^X8, X1^X5^Y8, }, // 112 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X6, S0^X5^Y6, }, // 113 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X7, S0^X5^Y7, }, // 114 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X8, S0^X5^Y8, }, // 115 + {Z1^X3^Y3, Z0^X4^Y4, S1^X5^Y5, X2, }, // 116 + {Z2^X3^Y3, Z1^X4^Y4, S1^Y5^X6, Z0^X5^Y6, }, // 117 + {Z1^X3^Y3, Z0^X4^Y4, S1^Y5^X6, S0^X5^Y6, }, // 118 + {Z2^X3^Y3, Z1^X4^Y4, S1^Y5^X7, Z0^X5^Y7, }, // 119 + {Z1^X3^Y3, Z0^X4^Y4, S1^Y5^X7, S0^X5^Y7, }, // 120 + {Z2^X3^Y3, Z1^X4^Y4, S1^Y5^X8, Z0^X5^Y8, }, // 121 + {Z1^X3^Y3, Z0^X4^Y4, S1^Y5^X8, S0^X5^Y8, }, // 122 + {Z1^X3^Y3, Z0^X4^Y4, S2^X5^Y5, Y2, }, // 123 + {Z1^X3^Y3, Z0^X4^Y4, S2^X5^Y5, X2, }, // 124 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X6, S2^X5^Y6, }, // 125 + {Z1^X3^Y3, Z0^X4^Y4, S2^Y5^X6, S1^X5^Y6, }, // 126 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X7, S2^X5^Y7, }, // 127 + {Z1^X3^Y3, Z0^X4^Y4, S2^Y5^X7, S1^X5^Y7, }, // 128 + {Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X8, S2^X5^Y8, }, // 129 + {Z1^X3^Y3, Z0^X4^Y4, S2^Y5^X8, S1^X5^Y8, }, // 130 + {Y2, X3, Z3, Y3, }, // 131 + {Y2, X2, Z3, Y3, }, // 132 + {Y2, X2, Z2, Y3, }, // 133 + {Y1, X2, Z2, Y2, }, // 134 + {Y1, X1, Z2, Y2, }, // 135 + {Y2^X3^Z3, X3, Z3, Y3, }, // 136 + {X2^Y2^Z3, X2, Z3, Y3, }, // 137 + {X2^Y2^Z2, X2, Z2, Y3, }, // 138 + {Y1^X2^Z2, X2, Z2, Y2, }, // 139 + {X1^Y1^Z2, X1, Z2, Y2, }, // 140 + {Y2^X4^Z4, X3^Y3^Z3, Z3, Y3, }, // 141 + {Y2^X3^Z4, X2^Y3^Z3, Z3, Y3, }, // 142 + {Y2^X3^Z3, X2^Z2^Y3, Z2, Y3, }, // 143 + {Y1^X3^Z3, X2^Y2^Z2, Z2, Y2, }, // 144 + {Y1^X2^Z3, X1^Y2^Z2, Z2, Y2, }, // 145 + {Y2^X5^Z5, X3^Y4^Z4, Y3^Z3^X4, Y3, }, // 146 + {Y2^X4^Z5, X2^Y4^Z4, X3^Y3^Z3, Y3, }, // 147 + {Y2^X4^Z4, X2^Z3^Y4, Z2^X3^Y3, Y3, }, // 148 + {Y1^X4^Z4, X2^Y3^Z3, Y2^Z2^X3, Y2, }, // 149 + {Y1^X3^Z4, X1^Y3^Z3, X2^Y2^Z2, Y2, }, // 150 + {Y2^X6^Z6, X3^Y5^Z5, Z3^Y4^X5, Y3^X4^Z4, }, // 151 + {Y2^X5^Z6, X2^Y5^Z5, Z3^X4^Y4, X3^Y3^Z4, }, // 152 + {Y2^X5^Z5, X2^Z4^Y5, Z2^X4^Y4, X3^Y3^Z3, }, // 153 + {Y1^X5^Z5, X2^Y4^Z4, Z2^Y3^X4, Y2^X3^Z3, }, // 154 + {Y1^X4^Z5, X1^Y4^Z4, Z2^X3^Y3, X2^Y2^Z3, }, // 155 + {Y2^X7^Z7, X3^Y6^Z6, Z3^Y5^X6, Y3^X5^Z5, }, // 156 + {Y2^X6^Z7, X2^Y6^Z6, Z3^X5^Y5, Y3^X4^Z5, }, // 157 + {Y2^X6^Z6, X2^Z5^Y6, Z2^X5^Y5, Y3^X4^Z4, }, // 158 + {Y1^X6^Z6, X2^Y5^Z5, Z2^Y4^X5, Y2^X4^Z4, }, // 159 + {Y1^X5^Z6, X1^Y5^Z5, Z2^X4^Y4, Y2^X3^Z4, }, // 160 + {Y2^X8^Z8, X3^Y7^Z7, Z3^Y6^X7, Y3^X6^Z6, }, // 161 + {Y2^X7^Z8, X2^Y7^Z7, Z3^X6^Y6, Y3^X5^Z6, }, // 162 + {Y2^X7^Z7, X2^Z6^Y7, Z2^X6^Y6, Y3^X5^Z5, }, // 163 + {Y1^X7^Z7, X2^Y6^Z6, Z2^Y5^X6, Y2^X5^Z5, }, // 164 + {Y1^X6^Z7, X1^Y6^Z6, Z2^X5^Y5, Y2^X4^Z5, }, // 165 + {Y2^X5, X3^Y4^Z4, Y3^Z3^X4, Y3, }, // 166 + {Y2^X4, X2^Y4^Z4, X3^Y3^Z3, Y3, }, // 167 + {Y2^X4, X2^Z3^Y4, Z2^X3^Y3, Y3, }, // 168 + {Y1^X4, X2^Y3^Z3, Y2^Z2^X3, Y2, }, // 169 + {Y1^X3, X1^Y3^Z3, X2^Y2^Z2, Y2, }, // 170 + {Y2, X3, Z3^Y4^X5, Y3^X4^Z4, }, // 171 + {Y2, X2, Z3^X4^Y4, X3^Y3^Z4, }, // 172 + {Y2, X2, Z2^X4^Y4, X3^Y3^Z3, }, // 173 + {Y1, X2, Z2^Y3^X4, Y2^X3^Z3, }, // 174 + {Y1, X1, Z2^X3^Y3, X2^Y2^Z3, }, // 175 + {Y2, X3, Z3, Y3^X5, }, // 176 + {Y2, X2, Z3, Y3^X4, }, // 177 + {Y2, X2, Z2, Y3^X4, }, // 178 + {Y1, X2, Z2, Y2^X4, }, // 179 + {Y1, X1, Z2, Y2^X3, }, // 180 + {X3^Y3, X3, Z3, Y2, }, // 181 + {X3^Y3, X2, Z3, Y2, }, // 182 + {X3^Y3, X2, Z2, Y2, }, // 183 + {X3^Y3, X2, Z2, Y1, }, // 184 + {X3^Y3, X1, Z2, Y1, }, // 185 + {X3^Y3, X4^Y4, Z3, Y2, }, // 186 + {X3^Y3, X4^Y4, Z2, Y2, }, // 187 + {X3^Y3, X4^Y4, Z2, Y1, }, // 188 + {X3^Y3, X1^X4^Y4, Z2, Y1, }, // 189 + {X3^Y3, X4^Y4, X5^Y5, Z3, }, // 190 + {X3^Y3, X4^Y4, Z3^X5^Y5, Y2, }, // 191 + {X3^Y3, X4^Y4, Z2^X5^Y5, Y2, }, // 192 + {X3^Y3, X4^Y4, Z2^X5^Y5, Y1, }, // 193 + {X3^Y3, X1^X4^Y4, Z2^X5^Y5, Y1, }, // 194 + {X3^Y3, X4^Y4, Y2^Y5^X6, X5^Y6, }, // 195 + {X3^Y3, X4^Y4, Z3^Y5^X6, Y2^X5^Y6, }, // 196 + {X3^Y3, X4^Y4, Z2^Y5^X6, Y2^X5^Y6, }, // 197 + {X3^Y3, X4^Y4, Z2^Y5^X6, Y1^X5^Y6, }, // 198 + {X3^Y3, X1^X4^Y4, Z2^Y5^X6, Y1^X5^Y6, }, // 199 + {X3^Y3, X4^Y4, Y2^Y5^X7, X5^Y7, }, // 200 + {X3^Y3, X4^Y4, Z3^Y5^X7, Y2^X5^Y7, }, // 201 + {X3^Y3, X4^Y4, Z2^Y5^X7, Y2^X5^Y7, }, // 202 + {X3^Y3, X4^Y4, Z2^Y5^X7, Y1^X5^Y7, }, // 203 + {X3^Y3, X1^X4^Y4, Z2^Y5^X7, Y1^X5^Y7, }, // 204 + {X3^Y3, X4^Y4, Y2^Y5^X8, X5^Y8, }, // 205 + {X3^Y3, X4^Y4, Z3^Y5^X8, Y2^X5^Y8, }, // 206 + {X3^Y3, X4^Y4, Z2^Y5^X8, Y2^X5^Y8, }, // 207 + {X3^Y3, X4^Y4, Z2^Y5^X8, Y1^X5^Y8, }, // 208 + {X3^Y3, X1^X4^Y4, Z2^Y5^X8, Y1^X5^Y8, }, // 209 + {Y4^X5, Z0^X4^Y5, Y5, X5, }, // 210 + {Y3^X5, Z0^X4^Y4, Y4, X5, }, // 211 + {Y3^X4, Z0^X3^Y4, Y4, X4, }, // 212 + {Y2^X4, Z0^X3^Y3, Y3, X4, }, // 213 + {Y2^X3, Z0^X2^Y3, Y3, X3, }, // 214 + {Y4^X6, X4^Y6, Z0^X5^Y5, X5, }, // 215 + {Y3^X6, X4^Y5, Z0^Y4^X5, X5, }, // 216 + {Y3^X5, X3^Y5, Z0^X4^Y4, X4, }, // 217 + {Y2^X5, X3^Y4, Z0^Y3^X4, X4, }, // 218 + {Y2^X4, X2^Y4, Z0^X3^Y3, X3, }, // 219 + {Y4^X6, Z1^X4^Y6, Z0^X5^Y5, X5, }, // 220 + {Y3^X6, Z1^X4^Y5, Z0^Y4^X5, X5, }, // 221 + {Y3^X5, Z1^X3^Y5, Z0^X4^Y4, X4, }, // 222 + {Y2^X5, Z1^X3^Y4, Z0^Y3^X4, X4, }, // 223 + {Y2^X4, Z1^X2^Y4, Z0^X3^Y3, X3, }, // 224 + {Y4^X7, X4^Y7, Z1^Y5^X6, Z0^X5^Y6, }, // 225 + {Y3^X7, X4^Y6, Z1^Y4^X6, Z0^X5^Y5, }, // 226 + {Y3^X6, X3^Y6, Z1^Y4^X5, Z0^X4^Y5, }, // 227 + {Y2^X6, X3^Y5, Z1^Y3^X5, Z0^X4^Y4, }, // 228 + {Y2^X5, X2^Y5, Z1^Y3^X4, Z0^X3^Y4, }, // 229 + {Y4^X7, Z2^X4^Y7, Z1^Y5^X6, Z0^X5^Y6, }, // 230 + {Y3^X7, Z2^X4^Y6, Z1^Y4^X6, Z0^X5^Y5, }, // 231 + {Y3^X6, Z2^X3^Y6, Z1^Y4^X5, Z0^X4^Y5, }, // 232 + {Y2^X6, Z2^X3^Y5, Z1^Y3^X5, Z0^X4^Y4, }, // 233 + {Y2^X5, X2^Z2^Y5, Z1^Y3^X4, Z0^X3^Y4, }, // 234 + {Y4^X7, X4^Y7, Z2^Y5^X6, Z1^X5^Y6, }, // 235 + {Y3^X7, X4^Y6, Z2^Y4^X6, Z1^X5^Y5, }, // 236 + {Y3^X6, X3^Y6, Z2^Y4^X5, Z1^X4^Y5, }, // 237 + {Y2^X6, X3^Y5, Z2^Y3^X5, Z1^X4^Y4, }, // 238 + {Y2^X5, X2^Y5, Z2^Y3^X4, Z1^X3^Y4, }, // 239 + {Y4^X7, Z3^X4^Y7, Z2^Y5^X6, Z1^X5^Y6, }, // 240 + {Y3^X7, Z3^X4^Y6, Z2^Y4^X6, Z1^X5^Y5, }, // 241 + {Y3^X6, X3^Z3^Y6, Z2^Y4^X5, Z1^X4^Y5, }, // 242 + {Y2^X6, X3^Z3^Y5, Z2^Y3^X5, Z1^X4^Y4, }, // 243 + {Y2^X5, X2^Z3^Y5, Z2^Y3^X4, Z1^X3^Y4, }, // 244 + {Y4^X7, X4^Y7, Z3^Y5^X6, Z2^X5^Y6, }, // 245 + {Y3^X7, X4^Y6, Z3^Y4^X6, Z2^X5^Y5, }, // 246 + {Y3^X6, X3^Y6, Z3^Y4^X5, Z2^X4^Y5, }, // 247 + {Y2^X6, X3^Y5, Y3^Z3^X5, Z2^X4^Y4, }, // 248 + {Y2^X5, X2^Y5, Y3^Z3^X4, Z2^X3^Y4, }, // 249 + {Y4^X8, X4^Y8, Z2^Y5^X7, Z1^X5^Y7, }, // 250 + {Y3^X8, X4^Y7, Z2^Y4^X7, Z1^X5^Y6, }, // 251 + {Y3^X7, X3^Y7, Z2^Y4^X6, Z1^X4^Y6, }, // 252 + {Y2^X7, X3^Y6, Z2^Y3^X6, Z1^X4^Y5, }, // 253 + {Y2^X6, X2^Y6, Z2^Y3^X5, Z1^X3^Y5, }, // 254 + {Y4^X8, Z3^X4^Y8, Z2^Y5^X7, Z1^X5^Y7, }, // 255 + {Y3^X8, Z3^X4^Y7, Z2^Y4^X7, Z1^X5^Y6, }, // 256 + {Y3^X7, X3^Z3^Y7, Z2^Y4^X6, Z1^X4^Y6, }, // 257 + {Y2^X7, X3^Z3^Y6, Z2^Y3^X6, Z1^X4^Y5, }, // 258 + {Y2^X6, X2^Z3^Y6, Z2^Y3^X5, Z1^X3^Y5, }, // 259 + {Y4^X9, X4^Y9, Z3^Y5^X8, Z2^X5^Y8, }, // 260 + {Y3^X9, X4^Y8, Z3^Y4^X8, Z2^X5^Y7, }, // 261 + {Y3^X8, X3^Y8, Z3^Y4^X7, Z2^X4^Y7, }, // 262 + {Y2^X8, X3^Y7, Y3^Z3^X7, Z2^X4^Y6, }, // 263 + {Y2^X7, X2^Y7, Y3^Z3^X6, Z2^X3^Y6, }, // 264 + {Y4^X9, X4^Z4^Y9, Z3^Y5^X8, Z2^X5^Y8, }, // 265 + {Y3^X9, X4^Z4^Y8, Z3^Y4^X8, Z2^X5^Y7, }, // 266 + {Y3^X8, X3^Z4^Y8, Z3^Y4^X7, Z2^X4^Y7, }, // 267 + {Y2^X8, X3^Z4^Y7, Y3^Z3^X7, Z2^X4^Y6, }, // 268 + {Y2^X7, X2^Z4^Y7, Y3^Z3^X6, Z2^X3^Y6, }, // 269 + {X4, Y4, X5^Y8, Y5^X8, }, // 270 + {Y3, X4, Y4^X8, X5^Y7, }, // 271 + {X3, Y3, X4^Y7, Y4^X7, }, // 272 + {Y2, X3, Y3^X7, X4^Y6, }, // 273 + {X2, Y2, X3^Y6, Y3^X6, }, // 274 + {Z0^X4^Y4, Y4, X5, X6^Y8, }, // 275 + {Z0^X4^Y4, Y3, Y4, X5^Y8, }, // 276 + {Z0^X4^Y4, X3, Y3, X5^Y7, }, // 277 + {Z0^X4^Y4, Y2, X3, Y3^X8, }, // 278 + {Z0^X4^Y4, X2, Y2, X3^Y6, }, // 279 + {Y4^X5^Y5, Z0^X4^Y4, X5, Y5, }, // 280 + {Y4^X5^Y5, Z0^X4^Y4, Y3, X5, }, // 281 + {Y4^X5^Y5, Z0^X4^Y4, X3, Y3, }, // 282 + {Y4^X5^Y5, Z0^X4^Y4, Y2, X3, }, // 283 + {Y4^X5^Y5, Z0^X4^Y4, X2, Y2, }, // 284 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y5, }, // 285 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y3, }, // 286 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, X3, }, // 287 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y2, }, // 288 + {Y4^X5^Y5, Z0^X4^Y4, X5^Y5, X2, }, // 289 + {Y4^X6^Y6, Z1^X4^Y4, X5, X6, }, // 290 + {Y4^X6^Y6, Z1^X4^Y4, Y3, X5, }, // 291 + {Y4^X6^Y6, Z1^X4^Y4, X3, Y3, }, // 292 + {Y4^X6^Y6, Z1^X4^Y4, Y2, X3, }, // 293 + {Y4^X6^Y6, Z1^X4^Y4, X2, Y2, }, // 294 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5, }, // 295 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y3, }, // 296 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X3, }, // 297 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y2, }, // 298 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X2, }, // 299 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, }, // 300 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X6, }, // 301 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y3, }, // 302 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X3, }, // 303 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Y2, }, // 304 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X2, }, // 305 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, }, // 306 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, }, // 307 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, }, // 308 + {Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, }, // 309 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, }, // 310 + {Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, }, // 311 + {Y3, X4, Y4^X8, Y5^X7, }, // 312 + {X3, Y3, Y4^X7, X4^Y7, }, // 313 + {X2, Y2, Y3^X6, X3^Y6, }, // 314 + {Z0^X4^Y4, X3, Y3, Y4^X8, }, // 315 + {Z0^X4^Y4, X2, Y2, Y3^X7, }, // 316 + {Y4^X5^Y5, Z0^X4^Y4, X2, X3, }, // 317 + {Y4^X9^Y9, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, }, // 318 + {Z0^X4^Y4, X2, X3, Y3^X8, }, // 319 + {Y4^X6^Y6, Z1^X4^Y4, X2, X3, }, // 320 + {Y4^X6^Y6, Z0^X4^Y4, X2, X3, }, // 321 + {Y4^X7^Y7, Z1^X4^Y4, Y1^Y5^X6, X2, }, // 322 + {Y4^X8^Y8, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, }, // 323 + {Y4^X9^Y9, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, }, // 324 + {X3, Y3, Y4^X7, Y1^X4^Y7, }, // 325 + {Y2, X3, Y3^X7, X1^X4^Y6, }, // 326 + {X2, Y2, Y3^X6, Y0^X3^Y6, }, // 327 + {Y0^X4^Y4, Y2, X3, Y3^X8, }, // 328 + {Y4^X5^Y5, Y0^X4^Y4, X2, X3, }, // 329 + {Y4^X5^Y5, Z0^X4^Y4, X2^X5^Y5, Y2, }, // 330 + {Y4^X5^Y5, Z0^X4^Y4, Y1^X5^Y5, X2, }, // 331 + {Y4^X6^Y6, Z0^X4^Y4, X3, Y3, }, // 332 + {Y4^X6^Y6, Y0^X4^Y4, X3, Y3, }, // 333 + {Y4^X6^Y6, Z0^X4^Y4, Y0^X5^Y5, X2, }, // 334 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X2^X5^Y5, }, // 335 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y1^X5^Y5, }, // 336 + {Y4^X7^Y7, Z0^X4^Y4, Y1^Y5^X6, X3, }, // 337 + {Y4^X7^Y7, Z0^X4^Y4, Y0^Y5^X6, X3, }, // 338 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Z2^X5^Y6, }, // 339 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y0^X5^Y6, }, // 340 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, Z2^X5^Y7, }, // 341 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, Y0^X5^Y7, }, // 342 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, Z3^X5^Y7, }, // 343 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, Z3^X5^Y8, }, // 344 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, Z2^X5^Y8, }, // 345 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, Z4^X5^Y8, }, // 346 + {X4, Y4, X5^Y10, Y5^X10, }, // 347 + {Y3, X4, Y4^X10, X5^Y9, }, // 348 + {X3, Y3, X4^Y9, Y4^X9, }, // 349 + {Y2, X3, Y3^X9, X4^Y8, }, // 350 + {X2, Y2, X3^Y8, Y3^X8, }, // 351 + {Z0^X4^Y4, Y4, X5, Y5^X10, }, // 352 + {Z0^X4^Y4, Y3, Y4, X5^Y9, }, // 353 + {Z0^X4^Y4, X3, Y3, Y4^X9, }, // 354 + {Z0^X4^Y4, Y2, X3, Y3^X9, }, // 355 + {Z0^X4^Y4, X2, Y2, Y3^X8, }, // 356 + {Y3, X4, Y4^X10, Y5^X9, }, // 357 + {X3, Y3, Y4^X9, X4^Y9, }, // 358 + {X2, Y2, Y3^X8, X3^Y8, }, // 359 + {Z0^X4^Y4, Y3, Y4, Y5^X9, }, // 360 + {Z0^X4^Y4, X2, X3, Y3^X9, }, // 361 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X2^X5^Y6, }, // 362 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y1^X5^Y6, }, // 363 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X2, }, // 364 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y1^X5^Y6, }, // 365 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, Y1^X5^Y7, }, // 366 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, Y1^X5^Y8, }, // 367 + {Z0^X4^Y4, X3, Y3, X5^Y8, }, // 368 + {Y4^X6^Y6, Z0^X4^Y4, Y1^X5^Y5, X2, }, // 369 + {Y4^X6^Y6, Z0^X4^Y4, Y1^X5^Y5, X1^X5^Y6, }, // 370 + {Y4^X7^Y7, Z1^X4^Y4, Y1^Y5^X6, X3, }, // 371 + {Y4^X7^Y7, Z1^X4^Y4, Y1^Y5^X6, Z0^X5^Y6, }, // 372 + {Y4^X7^Y7, Z0^X4^Y4, Y1^Y5^X6, X1^X5^Y6, }, // 373 + {Y4^X8^Y8, Z1^X4^Y4, Y1^Y5^X7, Z0^X5^Y7, }, // 374 + {Y4^X8^Y8, Z0^X4^Y4, Y1^Y5^X7, X1^X5^Y7, }, // 375 + {Y4^X9^Y9, Z1^X4^Y4, Y1^Y5^X8, Z0^X5^Y8, }, // 376 + {Y4^X9^Y9, Z0^X4^Y4, Y1^Y5^X8, X1^X5^Y8, }, // 377 + {Z0^X4^Y4, X2, Y2, X3^Y7, }, // 378 + {Y4^X5^Y5, Z0^X4^Y4, Y2^X5^Y5, X2, }, // 379 + {Y4^X5^Y5, Y0^X4^Y4, X1^X5^Y5, X2, }, // 380 + {Y4^X6^Y6, Z0^X4^Y4, Y1^X5^Y5, X3, }, // 381 + {Y4^X6^Y6, Y0^X4^Y4, Y1^X5^Y5, X3, }, // 382 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y2^X5^Y6, }, // 383 + {Y4^X6^Y6, Z0^X4^Y4, Y1^X5^Y5, X2^X5^Y6, }, // 384 + {Y4^X6^Y6, Y0^X4^Y4, Y1^X5^Y5, Y2^X5^Y6, }, // 385 + {Y4^X7^Y7, Y0^X4^Y4, Y1^Y5^X6, X3, }, // 386 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y2^X5^Y6, }, // 387 + {Y4^X7^Y7, Y0^X4^Y4, Y1^Y5^X6, X1^X5^Y6, }, // 388 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, Y2^X5^Y7, }, // 389 + {Y4^X8^Y8, Y0^X4^Y4, Y1^Y5^X7, X1^X5^Y7, }, // 390 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X2^X5^Y7, }, // 391 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X2^X5^Y8, }, // 392 + {Y4^X9^Y9, Y0^X4^Y4, Y1^Y5^X8, X1^X5^Y8, }, // 393 + {Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, Y5, }, // 394 + {Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, Y3, }, // 395 + {Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, X3, }, // 396 + {Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, Y2, }, // 397 + {Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, X2, }, // 398 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^X7^Y7, }, // 399 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X6, }, // 400 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Y3, }, // 401 + {Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X3, }, // 402 + {X4, Y4, Y5^X8, X5^Y8, }, // 403 + {Z0^X4^Y4, Y4, X5, Y5^X9, }, // 404 + {Y4^X6^Y6, Z0^X4^Y4, X2, Y2, }, // 405 + {Y4^X7^Y7, Z1^X4^Y4, S1^Y5^X6, X2, }, // 406 + {X4, Y4, Y5^X8, S0^X5^Y8, }, // 407 + {Y3, X4, Y4^X8, S0^X5^Y7, }, // 408 + {X3, Y3, Y4^X7, S0^X4^Y7, }, // 409 + {Y2, X3, Y3^X7, S0^X4^Y6, }, // 410 + {X2, Y2, Y3^X6, S0^X3^Y6, }, // 411 + {S2^X4^Y4, X2, Y2, X3^Y6, }, // 412 + {Y4^X5^Y5, S2^X4^Y4, X2, Y2, }, // 413 + {Y4^X5^Y5, Z0^X4^Y4, X3^X6^Y6, X2, }, // 414 + {Y4^X6^Y6, Z1^X4^Y4, X5, Y6, }, // 415 + {Y4^X6^Y6, Z0^X4^Y4, Y2, X3, }, // 416 + {Y4^X6^Y6, S2^X4^Y4, X2, Y2, }, // 417 + {Y4^X6^Y6, Z0^X4^Y4, S2^X5^Y5, X2, }, // 418 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X3^X7^Y7, }, // 419 + {Y4^X7^Y7, Z0^X4^Y4, S2^Y5^X6, Y2, }, // 420 + {Y4^X7^Y7, Z0^X4^Y4, S2^Y5^X6, X2, }, // 421 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, S2^X5^Y6, }, // 422 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, S2^X5^Y7, }, // 423 + {X4, Y4, Y5^X10, X5^Y10, }, // 424 + {Y4^X5^Y5, Z0^X4^Y4, S0^X6^Y6, X2, }, // 425 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, S0^X7^Y7, }, // 426 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, S0^X5^Y6, }, // 427 + {Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, S0^X5^Y7, }, // 428 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, S0^X5^Y8, }, // 429 + {Y4^X5^Y5, Z0^X4^Y4, S1^X6^Y6, X2, }, // 430 + {Y4^X6^Y6, Z0^X4^Y4, S1^X5^Y5, X2, }, // 431 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, S1^X7^Y7, }, // 432 + {Y4^X6^Y6, Z0^X4^Y4, S1^X5^Y5, S0^X7^Y7, }, // 433 + {Y4^X7^Y7, Z1^X4^Y4, S1^Y5^X6, Y2, }, // 434 + {Y4^X7^Y7, Z0^X4^Y4, S1^Y5^X6, X2, }, // 435 + {Y4^X7^Y7, Z1^X4^Y4, S1^Y5^X6, Z0^X5^Y6, }, // 436 + {Y4^X7^Y7, Z0^X4^Y4, S1^Y5^X6, S0^X5^Y6, }, // 437 + {Y4^X8^Y8, Z1^X4^Y4, S1^Y5^X7, Z0^X5^Y7, }, // 438 + {Y4^X8^Y8, Z0^X4^Y4, S1^Y5^X7, S0^X5^Y7, }, // 439 + {Y4^X9^Y9, Z1^X4^Y4, S1^Y5^X8, Z0^X5^Y8, }, // 440 + {Y4^X9^Y9, Z0^X4^Y4, S1^Y5^X8, S0^X5^Y8, }, // 441 + {Y4^X5^Y5, Z0^X4^Y4, S2^X6^Y6, X3, }, // 442 + {Y4^X5^Y5, Z0^X4^Y4, S2^X6^Y6, Y2, }, // 443 + {Y4^X5^Y5, S2^X4^Y4, S1^X6^Y6, X2, }, // 444 + {Y4^X6^Y6, Z0^X4^Y4, S2^X5^Y5, Y2, }, // 445 + {Y4^X6^Y6, S2^X4^Y4, S1^X5^Y5, X2, }, // 446 + {Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, S2^X7^Y7, }, // 447 + {Y4^X6^Y6, Z0^X4^Y4, S2^X5^Y5, S1^X7^Y7, }, // 448 + {Y4^X6^Y6, S2^X4^Y4, S1^X5^Y5, S0^X7^Y7, }, // 449 + {Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, Y6, }, // 450 + {Y4^X7^Y7, S2^X4^Y4, S1^Y5^X6, X2, }, // 451 + {Y4^X7^Y7, Z0^X4^Y4, S2^Y5^X6, S1^X5^Y6, }, // 452 + {Y4^X7^Y7, S2^X4^Y4, S1^Y5^X6, S0^X5^Y6, }, // 453 + {Y4^X8^Y8, Z0^X4^Y4, S2^Y5^X7, S1^X5^Y7, }, // 454 + {Y4^X8^Y8, S2^X4^Y4, S1^Y5^X7, S0^X5^Y7, }, // 455 + {Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, S2^X5^Y8, }, // 456 + {Y4^X9^Y9, Z0^X4^Y4, S2^Y5^X8, S1^X5^Y8, }, // 457 + {Y4^X9^Y9, S2^X4^Y4, S1^Y5^X8, S0^X5^Y8, }, // 458 + {X4^Y4, Y2, Z3, Y3, }, // 459 + {X4^Y4, Y2, Z2, Y3, }, // 460 + {X4^Y4, Y1, Z2, Y2, }, // 461 + {Y1^X4^Y4, X1, Z2, Y2, }, // 462 + {Y4^X5^Y5, X4^Y4, Y2, Z3, }, // 463 + {Y4^X5^Y5, X4^Y4, Y2, Z2, }, // 464 + {Z3^Y4^X5^Y5, X4^Y4, Y1, Z2, }, // 465 + {Z3^Y4^X5^Y5, Y1^X4^Y4, X1, Z2, }, // 466 + {Y4^X5^Y5, X4^Y4, Z3^X5, Y2, }, // 467 + {Y4^X5^Y5, X4^Y4, Z2^X5, Y2, }, // 468 + {Z3^Y4^X5^Y5, X4^Y4, Z2^X5, Y1, }, // 469 + {Z3^Y4^X5^Y5, Y1^X4^Y4, Z2^X5, X1, }, // 470 + {Y4^X6^Y6, X4^Y4, Y2, Y3, }, // 471 + {Y4^X6^Y6, X4^Y4, Z3, Y3, }, // 472 + {Y4^X6^Y6, X4^Y4, Z2, Y3, }, // 473 + {Z3^Y4^X6^Y6, X4^Y4, Z2, Y2, }, // 474 + {Z3^Y4^X6^Y6, Y1^X4^Y4, Z2, Y2, }, // 475 + {Y4^X6^Y6, X4^Y4, X5^Y5, Y2, }, // 476 + {Y4^X6^Y6, X4^Y4, Y2^X5^Y5, Z3, }, // 477 + {Y4^X6^Y6, X4^Y4, Y2^X5^Y5, Z2, }, // 478 + {Z3^Y4^X6^Y6, X4^Y4, Y1^X5^Y5, Z2, }, // 479 + {Z3^Y4^X6^Y6, Y1^X4^Y4, X1^X5^Y5, Z2, }, // 480 + {Y4^X6^Y6, X4^Y4, X5^Y5, Z3^X6, }, // 481 + {Y4^X6^Y6, X4^Y4, Y2^X5^Y5, Z3^X6, }, // 482 + {Y4^X6^Y6, X4^Y4, Y2^X5^Y5, Z2^X6, }, // 483 + {Z3^Y4^X6^Y6, X4^Y4, Y1^X5^Y5, Z2^X6, }, // 484 + {Z3^Y4^X6^Y6, Y1^X4^Y4, X1^X5^Y5, Z2^X6, }, // 485 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, Y3, }, // 486 + {Z3^Y4^X7^Y7, X4^Y4, Y1^Y5^X6, Y2, }, // 487 + {Z3^Y4^X7^Y7, Y1^X4^Y4, X1^Y5^X6, Y2, }, // 488 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, X5^Y6, }, // 489 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, Z3^X5^Y6, }, // 490 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, Z2^X5^Y6, }, // 491 + {Z3^Y4^X7^Y7, X4^Y4, Y1^Y5^X6, Z2^X5^Y6, }, // 492 + {Z3^Y4^X7^Y7, Y1^X4^Y4, X1^Y5^X6, Z2^X5^Y6, }, // 493 + {Y4^X7^Y7, X4^Y4, Y2^Y5^X6, Y3^X5^Y6, }, // 494 + {Z3^Y4^X7^Y7, X4^Y4, Y1^Y5^X6, Y2^X5^Y6, }, // 495 + {Z3^Y4^X7^Y7, Y1^X4^Y4, X1^Y5^X6, Y2^X5^Y6, }, // 496 + {Y4^X8^Y8, X4^Y4, Y2^Y5^X7, X5^Y7, }, // 497 + {Y4^X8^Y8, X4^Y4, Y2^Y5^X7, Z3^X5^Y7, }, // 498 + {Y4^X8^Y8, X4^Y4, Y2^Y5^X7, Z2^X5^Y7, }, // 499 + {Z3^Y4^X8^Y8, X4^Y4, Y1^Y5^X7, Z2^X5^Y7, }, // 500 + {Z3^Y4^X8^Y8, Y1^X4^Y4, X1^Y5^X7, Z2^X5^Y7, }, // 501 + {Y4^X8^Y8, X4^Y4, Y2^Y5^X7, Y3^X5^Y7, }, // 502 + {Z3^Y4^X8^Y8, X4^Y4, Y1^Y5^X7, Y2^X5^Y7, }, // 503 + {Z3^Y4^X8^Y8, Y1^X4^Y4, X1^Y5^X7, Y2^X5^Y7, }, // 504 + {Y4^X9^Y9, X4^Y4, Y2^Y5^X8, X5^Y8, }, // 505 + {Y4^X9^Y9, X4^Y4, Y2^Y5^X8, Z3^X5^Y8, }, // 506 + {Y4^X9^Y9, X4^Y4, Y2^Y5^X8, Z2^X5^Y8, }, // 507 + {Z3^Y4^X9^Y9, X4^Y4, Y1^Y5^X8, Z2^X5^Y8, }, // 508 + {Z3^Y4^X9^Y9, Y1^X4^Y4, X1^Y5^X8, Z2^X5^Y8, }, // 509 +}; + +const UINT_64 GFX10_SW_PATTERN_NIBBLE3[][4] = +{ + {0, 0, 0, 0, }, // 0 + {Y6, X6, Y7, X7, }, // 1 + {Y5, X6, Y6, X7, }, // 2 + {Y5, X5, Y6, X6, }, // 3 + {Y4, X5, Y5, X6, }, // 4 + {Y4, X4, Y5, X5, }, // 5 + {Z0^X6^Y6, X6, Y7, X7, }, // 6 + {Z0^Y5^X6, X6, Y6, X7, }, // 7 + {Z0^X5^Y5, X5, Y6, X6, }, // 8 + {Z0^Y4^X5, X5, Y5, X6, }, // 9 + {Z0^X4^Y4, X4, Y5, X5, }, // 10 + {Z1^Y6^X7, Z0^X6^Y7, Y7, X7, }, // 11 + {Z1^Y5^X7, Z0^X6^Y6, Y6, X7, }, // 12 + {Z1^Y5^X6, Z0^X5^Y6, Y6, X6, }, // 13 + {Z1^Y4^X6, Z0^X5^Y5, Y5, X6, }, // 14 + {Z1^Y4^X5, Z0^X4^Y5, Y5, X5, }, // 15 + {X6^Y6, X6, Y7, X7, }, // 16 + {Y5^X6, X6, Y6, X7, }, // 17 + {X5^Y5, X5, Y6, X6, }, // 18 + {Y4^X5, X5, Y5, X6, }, // 19 + {X4^Y4, X4, Y5, X5, }, // 20 + {Y6^X7, X6^Y7, Y7, X7, }, // 21 + {Y5^X7, X6^Y6, Y6, X7, }, // 22 + {Y5^X6, X5^Y6, Y6, X6, }, // 23 + {Y4^X6, X5^Y5, Y5, X6, }, // 24 + {Y4^X5, X4^Y5, Y5, X5, }, // 25 + {Y3, X4, Y5, X5, }, // 26 + {Y4, X5, Y6, X6, }, // 27 + {Y2, X4, Y5, X6, }, // 28 + {Y2, X3, Y4, X5, }, // 29 + {Y4, X6, Y6, X7, }, // 30 + {Y3, X4, Y6, X6, }, // 31 + {Y2, X3, Y4, X6, }, // 32 + {Y2, X2, Y3, X4, }, // 33 + {Z0^X6^Y6, X4, Y6, X7, }, // 34 + {Z0^X6^Y6, X3, Y4, X6, }, // 35 + {Z0^X6^Y6, Y2, X3, Y4, }, // 36 + {Y2^X6^Y6, X2, Y3, X4, }, // 37 + {Z1^Y6^X7, Z0^X6^Y7, Y4, X7, }, // 38 + {Z1^Y6^X7, Z0^X6^Y7, Y3, X4, }, // 39 + {Y2^Y6^X7, Z0^X6^Y7, Y3, X4, }, // 40 + {Y2^Y6^X7, X2^X6^Y7, Y3, X4, }, // 41 + {X5, Y6, X6, Y7, }, // 42 + {Y5, X5, Y6, Y2^Y7, }, // 43 + {X4, Y5, X5, Y2^Y6, }, // 44 + {Y4, X4, Y5, Y1^Y6, }, // 45 + {Y3, X4, Y5, Y1^Y6, }, // 46 + {Y4, X5, Y6, Y2^Y7, }, // 47 + {X3, Y4, X5, Y2^Y6, }, // 48 + {Y2, X3, Y4, Y1^Y6, }, // 49 + {Y4, Y6, X6, Y7, }, // 50 + {Y3, X4, Y6, Y2^Y7, }, // 51 + {X2, Y3, X4, Y2^Y6, }, // 52 + {Y1, X3, Y4, X2^Y6, }, // 53 + {Z0^X6^Y6, Y4, X6, Y7, }, // 54 + {Z0^X6^Y6, X3, Y4, Y2^Y7, }, // 55 + {Y2^X6^Y6, Y3, X4, X2^Y7, }, // 56 + {X2^X6^Y6, X3, Y4, Y1^Y7, }, // 57 + {Z0^Y6^X7, Z5^X6^Y7, Y4, Y7, }, // 58 + {Z0^Y6^X7, Z5^X6^Y7, Y3, X4, }, // 59 + {Z0^Y6^X7, Y2^X6^Y7, X3, Y4, }, // 60 + {X2^Y6^X7, Y1^X6^Y7, X3, Y4, }, // 61 + {X5, Y5, X6, Y2^Y6, }, // 62 + {Y5, X5, Y2^Y6, X2^Y7, }, // 63 + {Y4, X5, Y1^Y5, X2^Y6, }, // 64 + {Y4, X4, Y1^Y5, X1^Y6, }, // 65 + {Y5, X5, X2^Y6, Y2^Y7, }, // 66 + {Y4, X5, X2^Y5, Y1^Y6, }, // 67 + {Y4, X4, X1^Y5, Y1^Y6, }, // 68 + {Y3, X4, Y1^Y5, X1^Y6, }, // 69 + {X4, Y5, X6, Y2^Y6, }, // 70 + {Y4, X5, X2^Y6, Y2^Y7, }, // 71 + {X3, Y4, Y1^Y5, X2^Y6, }, // 72 + {Y3, X4, X1^Y6, Y1^Y7, }, // 73 + {X3, Y4, X6, Y2^Y6, }, // 74 + {Y3, X4, Y2^Y6, X2^Y7, }, // 75 + {Y3, X4, Y1^Y6, X2^Y7, }, // 76 + {Z4^X6^Y6, X3, Y4, X6, }, // 77 + {Z4^X6^Y6, X3, Y4, Y2^Y6, }, // 78 + {Y1^X6^Y6, Y3, X4, X2^Y7, }, // 79 + {Z5^Y6^X7, Z4^X6^Y7, Y3, X4, }, // 80 + {Y2^Y6^X7, Z4^X6^Y7, Y3, X4, }, // 81 + {Y1^Y6^X7, X2^X6^Y7, Y3, X4, }, // 82 + {Y5, Y1^Y6, Y2^Y7, X2^Y8, }, // 83 + {X4, Y1^Y5, X1^Y6, Y2^Y7, }, // 84 + {Y4, Y0^Y5, Y1^Y6, X1^Y7, }, // 85 + {Y5, Y1^Y6, X2^Y7, Y2^Y8, }, // 86 + {X4, X1^Y5, Y1^Y6, X2^Y7, }, // 87 + {Y4, Y0^Y5, X1^Y6, Y1^Y7, }, // 88 + {X3, Y0^Y5, X1^Y6, Y1^Y7, }, // 89 + {Y4, Y1^Y6, X2^Y7, Y2^Y8, }, // 90 + {X4, X1^Y6, Y1^Y7, X2^Y8, }, // 91 + {X3, X1^Y6, Y1^Y7, X2^Y8, }, // 92 + {X3, Y4, X2^Y6, Y1^Y7, }, // 93 + {X3, Y1^Y6, X2^Y7, Y2^Y8, }, // 94 + {Z3^X6^Y6, X3, Y4, Y2^Y7, }, // 95 + {Y2^X6^Y6, X3, X2^Y7, Y1^Y8, }, // 96 + {Z3^Y6^X7, Y2^X6^Y7, X3, Y4, }, // 97 + {Y2^Y6^X7, X2^X6^Y7, X3, Y1^Y7, }, // 98 + {Y6, X6, Y7, S0^Y8, }, // 99 + {Y5, X6, Y6, S0^Y7, }, // 100 + {Y5, X5, Y6, S0^Y7, }, // 101 + {Y4, X5, Y5, S0^Y6, }, // 102 + {Y4, X4, Y5, S0^Y6, }, // 103 + {Y3, X4, Y5, S0^Y6, }, // 104 + {Y4, X5, Y6, S0^Y7, }, // 105 + {Y2, X4, Y5, S0^Y6, }, // 106 + {Y2, X3, Y4, S0^Y6, }, // 107 + {Y4, X6, Y6, S0^Y7, }, // 108 + {Y3, X4, Y6, S0^Y7, }, // 109 + {Z0^X6^Y6, X6, Y7, S0^Y8, }, // 110 + {Z0^X6^Y6, X4, Y6, S0^Y7, }, // 111 + {Z0^X6^Y6, X3, Y4, S0^Y7, }, // 112 + {S0^X6^Y6, Y2, X3, Y4, }, // 113 + {Z0^Y6^X7, Z5^X6^Y7, Y7, S0^Y8, }, // 114 + {Z0^Y6^X7, Z5^X6^Y7, Y4, S0^Y7, }, // 115 + {Z0^Y6^X7, S0^X6^Y7, Y3, X4, }, // 116 + {S0^Y6^X7, Y2^X6^Y7, X3, Y4, }, // 117 + {Y6, X6, S0^Y7, S1^Y8, }, // 118 + {Y5, X6, S0^Y6, S1^Y7, }, // 119 + {Y5, X5, S0^Y6, S1^Y7, }, // 120 + {Y4, X5, S0^Y5, S1^Y6, }, // 121 + {Y4, X4, S0^Y5, S1^Y6, }, // 122 + {Y3, X4, S0^Y5, S1^Y6, }, // 123 + {Y4, X5, S0^Y6, S1^Y7, }, // 124 + {X3, Y4, S0^Y5, S1^Y6, }, // 125 + {Y4, X6, S0^Y6, S1^Y7, }, // 126 + {Y3, X4, S0^Y6, S1^Y7, }, // 127 + {Z4^X6^Y6, X6, S0^Y7, S1^Y8, }, // 128 + {Z4^X6^Y6, Y4, S0^Y6, S1^Y7, }, // 129 + {S1^X6^Y6, X3, Y4, S0^Y7, }, // 130 + {Z5^Y6^X7, Z4^X6^Y7, S0^Y7, S1^Y8, }, // 131 + {S1^Y6^X7, Z4^X6^Y7, Y4, S0^Y7, }, // 132 + {S1^Y6^X7, S0^X6^Y7, Y3, X4, }, // 133 + {Y6, S0^Y7, S1^Y8, S2^Y9, }, // 134 + {Y5, S0^Y6, S1^Y7, S2^Y8, }, // 135 + {Y4, S0^Y5, S1^Y6, S2^Y7, }, // 136 + {X3, S0^Y5, S1^Y6, S2^Y7, }, // 137 + {Y4, S0^Y6, S1^Y7, S2^Y8, }, // 138 + {X3, Y4, S0^Y6, S1^Y7, }, // 139 + {Y2, X3, S0^Y6, S1^Y7, }, // 140 + {X2, Y2, X3, S0^Y6, }, // 141 + {Z3^X6^Y6, S0^Y7, S1^Y8, S2^Y9, }, // 142 + {S2^X6^Y6, Y4, S0^Y7, S1^Y8, }, // 143 + {S0^X6^Y6, X2, Y2, X3, }, // 144 + {Z3^Y6^X7, S2^X6^Y7, S0^Y7, S1^Y8, }, // 145 + {S2^Y6^X7, S1^X6^Y7, Y4, S0^Y7, }, // 146 + {S0^Y6^X7, X2^X6^Y7, Y2, X3, }, // 147 + {X4, Z4, Y4, X5, }, // 148 + {X3, Z4, Y4, X4, }, // 149 + {X3, Z3, Y4, X4, }, // 150 + {X3, Z3, Y3, X4, }, // 151 + {X2, Z3, Y3, X3, }, // 152 + {X4^Y4^Z4, Z4, Y4, X5, }, // 153 + {X3^Y4^Z4, Z4, Y4, X4, }, // 154 + {X3^Z3^Y4, Z3, Y4, X4, }, // 155 + {X3^Y3^Z3, Z3, Y3, X4, }, // 156 + {X2^Y3^Z3, Z3, Y3, X3, }, // 157 + {X4^Y5^Z5, Y4^Z4^X5, Y4, X5, }, // 158 + {X3^Y5^Z5, X4^Y4^Z4, Y4, X4, }, // 159 + {X3^Z4^Y5, Z3^X4^Y4, Y4, X4, }, // 160 + {X3^Y4^Z4, Y3^Z3^X4, Y3, X4, }, // 161 + {X2^Y4^Z4, X3^Y3^Z3, Y3, X3, }, // 162 + {X4, Y4^Z4^X5, Y4, X5, }, // 163 + {X3, X4^Y4^Z4, Y4, X4, }, // 164 + {X3, Z3^X4^Y4, Y4, X4, }, // 165 + {X3, Y3^Z3^X4, Y3, X4, }, // 166 + {X2, X3^Y3^Z3, Y3, X3, }, // 167 + {X3, Z3, Y2, X4, }, // 168 + {X2, Z3, Y2, X3, }, // 169 + {X3, Z4, Y4, X5, }, // 170 + {X2, Z4, Y3, X4, }, // 171 + {X2, Z3, Y3, X4, }, // 172 + {Y2, X3, Z4, Y4, }, // 173 + {Z3, Y3, X4, Z4, }, // 174 + {Z3^X6^Y6, Y3, X4, Z4, }, // 175 + {X2^X6^Y6, Z4, Y3, X4, }, // 176 + {X2^X6^Y6, Z3, Y3, X4, }, // 177 + {X2^X6^Y6, Z3, Y2, X3, }, // 178 + {Z3^Y6^X7, Z4^X6^Y7, Y3, X4, }, // 179 + {X2^Y6^X7, Z4^X6^Y7, Y3, X4, }, // 180 + {X2^Y6^X7, Z3^X6^Y7, Y3, X4, }, // 181 + {X2^Y6^X7, Z3^X6^Y7, Y2, X3, }, // 182 + {X6^Y7, Y6^X7, 0, 0, }, // 183 + {Y5^X7, X6^Y6, 0, 0, }, // 184 + {X5^Y6, Y5^X6, 0, 0, }, // 185 + {Y4^X6, X5^Y5, 0, 0, }, // 186 + {X4^Y5, Y4^X5, 0, 0, }, // 187 + {Y5^X9, X7^Y7, Y6^X8, 0, }, // 188 + {Y5^X8, X6^Y7, Y6^X7, 0, }, // 189 + {Y4^X8, X6^Y6, Y5^X7, 0, }, // 190 + {Y4^X7, X5^Y6, Y5^X6, 0, }, // 191 + {Y3^X7, X5^Y5, Y4^X6, 0, }, // 192 + {X6^Y9, Y6^X9, X7^Y8, Y7^X8, }, // 193 + {X6^Y8, Y5^X9, X7^Y7, Y6^X8, }, // 194 + {X5^Y8, Y5^X8, X6^Y7, Y6^X7, }, // 195 + {Y3^X8, X5^Y7, X6^Y6, Y5^X7, }, // 196 + {Y3^X7, X3^Y7, X5^Y6, Y5^X6, }, // 197 + {X6, X7^Y9, Y6^X10, X8^Y8, }, // 198 + {Y5, X6^Y9, Y6^X9, X7^Y8, }, // 199 + {Y3, X6^Y8, Y5^X9, X7^Y7, }, // 200 + {X3, Y3^X9, Y5^X8, X6^Y7, }, // 201 + {Y2, X3^Y7, Y3^X8, X6^Y6, }, // 202 + {Y6^X9, X7^Y8, Y7^X8, Z0^X5^Y5, }, // 203 + {X6^Y8, Y6^X8, X7^Y7, Z0^X5^Y5, }, // 204 + {X5^Y8, X6^Y7, Y6^X7, Z0^X5^Y5, }, // 205 + {Y3^X7, X5^Y7, X6^Y6, Z0^X5^Y5, }, // 206 + {X3^Y7, Y3^X6, X5^Y6, Z0^X5^Y5, }, // 207 + {X6, Y6^X10, X7^Y9, Y7^X9, }, // 208 + {X5, X6^Y9, Y6^X9, X7^Y8, }, // 209 + {Y3, X5^Y9, X6^Y8, Y6^X8, }, // 210 + {X3, Y3^X8, X5^Y8, X6^Y7, }, // 211 + {Y2, X3^Y8, Y3^X7, X5^Y7, }, // 212 + {X6, Y6, X7^Y10, Y7^X10, }, // 213 + {Y3, X6, Y6^X10, X7^Y9, }, // 214 + {X3, Y3, X6^Y9, Y6^X9, }, // 215 + {Y2, X3, Y3^X9, X6^Y8, }, // 216 + {X2, Y2, X3^Y8, Y3^X8, }, // 217 + {Y6, X7^Y9, X8^Y8, Y7^X9, }, // 218 + {X6, Y6^X9, X7^Y8, Y7^X8, }, // 219 + {Y3, X6^Y8, X7^Y7, Y6^X8, }, // 220 + {X3, Y3^X8, X6^Y7, Y6^X7, }, // 221 + {Y2, X3^Y7, Y3^X7, X6^Y6, }, // 222 + {Y3, X6, X7^Y9, Y6^X10, }, // 223 + {X2, Y2, Y3^X8, X3^Y8, }, // 224 + {X6^Y6, Y6, X7, X8^Y10, }, // 225 + {X6^Y6, Y3, Y6, X7^Y10, }, // 226 + {X6^Y6, X3, Y3, X7^Y9, }, // 227 + {X6^Y6, Y2, X3, Y3^X10, }, // 228 + {X6^Y6, X2, Y2, X3^Y8, }, // 229 + {X6, X7, Y7^X10, X8^Y9, }, // 230 + {Y3, X6, X7^Y9, Y7^X9, }, // 231 + {X3, Y3, X6^Y9, X7^Y8, }, // 232 + {Y2, X3, Y3^X8, X6^Y8, }, // 233 + {X2, Y2, X3^Y8, Y3^X7, }, // 234 + {X6^Y6, X6, X7, Y7^X11, }, // 235 + {X6^Y6, Y3, X6, X7^Y10, }, // 236 + {X6^Y6, X3, Y3, X6^Y10, }, // 237 + {Z0^X6^Y6, Y2, X3, Y3^X9, }, // 238 + {Z0^X6^Y6, X2, Y2, X3^Y9, }, // 239 + {X6^Y6, X6^Y8, X7, Y7, }, // 240 + {X6^Y6, X6^Y8, Y3, X7, }, // 241 + {X6^Y6, X6^Y8, X3, Y3, }, // 242 + {Z0^X6^Y6, X6^Y8, Y2, X3, }, // 243 + {Z0^X6^Y6, X6^Y8, X2, Y2, }, // 244 + {Y6^X7, X7, Y7, X8^Y10, }, // 245 + {Y6^X7, Y3, X7, Y7^X10, }, // 246 + {Y6^X7, X3, Y3, X7^Y9, }, // 247 + {Z1^Y6^X7, Y2, X3, Y3^X9, }, // 248 + {Z1^Y6^X7, X2, Y2, X3^Y8, }, // 249 + {Y6^X7, X6^Y7, X7, Y7, }, // 250 + {Y6^X7, X6^Y7, Y3, X7, }, // 251 + {Y6^X7, X6^Y7, X3, Y3, }, // 252 + {Z1^Y6^X7, Z0^X6^Y7, Y2, X3, }, // 253 + {Z1^Y6^X7, Z0^X6^Y7, X2, Y2, }, // 254 + {X5^Y7, X6^Y6, 0, 0, }, // 255 + {Y5^X6, Y2^X5^Y6, 0, 0, }, // 256 + {Y4^X6, X2^X5^Y5, 0, 0, }, // 257 + {Y4^X5, Y1^X4^Y5, 0, 0, }, // 258 + {X5^Y7, Y5^X7, Y2^X6^Y6, 0, }, // 259 + {X5^Y6, Y4^X7, X2^Y5^X6, 0, }, // 260 + {X3^Y6, Y4^X6, Y1^X5^Y5, 0, }, // 261 + {Y5^X9, Y6^X8, X6^Y8, X7^Y7, }, // 262 + {Y5^X8, X5^Y8, Y6^X7, Y2^X6^Y7, }, // 263 + {Y3^X8, X5^Y7, Y5^X7, Y2^X6^Y6, }, // 264 + {Y3^X7, X3^Y7, Y5^X6, Y1^X5^Y6, }, // 265 + {Y3, X5^Y9, X6^Y8, X7^Y7, }, // 266 + {Y2, Y3^X7, X3^Y8, X5^Y7, }, // 267 + {Y6^X8, X6^Y8, X7^Y7, Z0^X5^Y5, }, // 268 + {X5^Y8, Y6^X7, Y2^X6^Y7, Z0^X5^Y5, }, // 269 + {Y3^X7, X5^Y7, X2^X6^Y6, Z0^X5^Y5, }, // 270 + {Y3^X6, X3^Y7, Y1^X5^Y6, Z0^X5^Y5, }, // 271 + {Y3, X5, X6^Y10, Y7^X9, }, // 272 + {X3, Y3, X5^Y10, X6^Y9, }, // 273 + {Y2, X3, Y3^X8, X5^Y9, }, // 274 + {X2, Y2, Y3^X7, X3^Y9, }, // 275 + {Y3, X6^Y8, Y6^X8, Y2^X7^Y7, }, // 276 + {X3, Y3^X8, X6^Y7, X2^Y6^X7, }, // 277 + {Y2, Y3^X7, X3^Y7, Y1^X6^Y6, }, // 278 + {Y3, X6, Y6^X10, Y7^X9, }, // 279 + {X3, Y3, Y6^X9, X6^Y9, }, // 280 + {X2, X3, Y3^X9, X6^Y8, }, // 281 + {X6^Y6, Y2, X3, Y3^X9, }, // 282 + {X6^Y6, X2, Y2, Y3^X8, }, // 283 + {Y3, X6, Y7^X9, X7^Y9, }, // 284 + {X3, Y3, X6^Y9, Y7^X8, }, // 285 + {X2, Y2, Y3^X7, X3^Y8, }, // 286 + {Z0^Y6^X7, Y2, X3, Y3^X9, }, // 287 + {Z0^Y6^X7, X2, Y2, Y3^X8, }, // 288 + {Z0^Y6^X7, Z4^X6^Y7, X2, X3, }, // 289 + {Z0^Y6^X7, Z4^X6^Y7, X2, Y2, }, // 290 + {X5^Y6, Y2^Y5^X6, 0, 0, }, // 291 + {X2^X5^Y6, Y2^Y5^X6, 0, 0, }, // 292 + {X2^X5^Y5, Y1^Y4^X6, 0, 0, }, // 293 + {X1^X4^Y5, Y1^Y4^X5, 0, 0, }, // 294 + {Y4^X8, X2^X6^Y6, Y2^Y5^X7, 0, }, // 295 + {Y4^X7, Y2^Y5^X6, Y1^X5^Y6, 0, }, // 296 + {Y3^X7, X1^X5^Y5, Y1^Y4^X6, 0, }, // 297 + {X5^Y8, X6^Y7, Y5^X8, Y2^Y6^X7, }, // 298 + {X5^Y8, Y5^X8, X2^Y6^X7, Y2^X6^Y7, }, // 299 + {Y3^X8, X5^Y7, X2^Y5^X7, Y1^X6^Y6, }, // 300 + {Y3^X7, X3^Y7, X1^Y5^X6, Y1^X5^Y6, }, // 301 + {Y3, Y5^X9, X6^Y8, Y6^X8, }, // 302 + {Y3, X6^Y8, Y5^X9, X2^X7^Y7, }, // 303 + {X3, Y3^X9, Y5^X8, Y2^Y6^X7, }, // 304 + {Y2, X3^Y7, Y3^X8, X1^X6^Y6, }, // 305 + {X5^Y8, X6^Y7, Y2^Y6^X7, Z0^X5^Y5, }, // 306 + {X5^Y8, X2^X6^Y7, Y2^Y6^X7, Z0^X5^Y5, }, // 307 + {Y3^X8, Y2^Y5^X7, Y1^X6^Y6, Z0^X5^Y5, }, // 308 + {Y3^X7, Y2^X6^Y6, X1^X5^Y7, Y1^X5^Y5, }, // 309 + {Y3, X5^Y9, X6^Y8, X2^Y6^X8, }, // 310 + {X3, Y3^X8, X5^Y8, X2^Y6^X7, }, // 311 + {Y2, Y3^X8, X3^Y7, X1^Y5^X7, }, // 312 + {Y3, X6^Y8, X2^X7^Y7, Y2^Y6^X8, }, // 313 + {X3, Y3^X8, Y2^Y6^X7, Y1^X6^Y7, }, // 314 + {X3, Y3^X8, Y2^Y6^X7, X1^X6^Y7, }, // 315 + {X6^Y6, X3, Y3, Y6^X10, }, // 316 + {X6^Y6, X2, X3, Y3^X10, }, // 317 + {X3, Y3, X6^Y9, X2^X7^Y8, }, // 318 + {X2, X3, Y3^X9, Y2^Y6^X8, }, // 319 + {X2, X3, Y3^X8, Y2^X7^Y7, }, // 320 + {Z3^X6^Y6, Y2, X3, Y3^X9, }, // 321 + {Z3^X6^Y6, X2, Y2, Y3^X9, }, // 322 + {Z3^X6^Y6, X6^Y8, Y2, X3, }, // 323 + {Z3^X6^Y6, X6^Y8, X2, Y2, }, // 324 + {Z4^Y6^X7, X2, X3, Y3^X9, }, // 325 + {Y1^Y6^X7, X2, X3, Y3^X9, }, // 326 + {Z4^Y6^X7, Z3^X6^Y7, Y2, X3, }, // 327 + {Z4^Y6^X7, Z3^X6^Y7, X2, Y2, }, // 328 + {Y1^Y4^X6, X2^X5^Y5, 0, 0, }, // 329 + {Y1^X5^Y7, X2^X6^Y6, Y2^Y5^X7, 0, }, // 330 + {X1^X5^Y6, Y1^Y4^X7, X2^Y5^X6, 0, }, // 331 + {Y5^X8, Y1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, }, // 332 + {Y3^X8, Y1^X5^Y7, X1^Y5^X7, Y2^X6^Y6, }, // 333 + {Y3^X7, Y1^X4^Y7, Y2^X5^Y6, X1^Y5^X6, }, // 334 + {Y3, X5^Y9, X6^Y8, X2^X7^Y7, }, // 335 + {Y3, X5^Y9, Y1^X6^Y8, X2^X7^Y7, }, // 336 + {X3, Y3^X8, X5^Y7, X1^X6^Y6, }, // 337 + {Y2, Y3^X7, X3^Y7, Y0^X5^Y6, }, // 338 + {Y1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, Z0^X5^Y5, }, // 339 + {X1^X5^Y8, Y2^Y6^X7, X2^X6^Y7, Y1^X5^Y5, }, // 340 + {X1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, Y1^X5^Y5, }, // 341 + {Y3, X5^Y9, Y1^X6^Y8, X2^Y6^X8, }, // 342 + {X3, Y3^X9, Y1^X6^Y7, X1^Y5^X8, }, // 343 + {X3, Y3^X8, Y1^X5^Y8, Y2^X6^Y7, }, // 344 + {X3, Y3, X5^Y10, Y1^X6^Y9, }, // 345 + {Y2, X3, Y3^X8, X5^Y8, }, // 346 + {Y3, Y1^X6^Y8, X2^X7^Y7, Y2^Y6^X8, }, // 347 + {Y3, X1^X6^Y8, Y2^Y6^X8, X2^X7^Y7, }, // 348 + {Y3, X1^X6^Y8, X2^X7^Y7, Y2^Y6^X8, }, // 349 + {X3, Y3, Y6^X9, Y1^X6^Y9, }, // 350 + {X2, X3, Y3^X9, Y1^X6^Y8, }, // 351 + {X2^X6^Y6, Y2, X3, Y3^X9, }, // 352 + {Y1^X6^Y6, X2, Y2, Y3^X8, }, // 353 + {X3, Y3, Y1^X6^Y9, X2^X7^Y8, }, // 354 + {X3, Y3, X1^X6^Y9, Y2^Y7^X8, }, // 355 + {X3, Y3, X1^X6^Y9, X2^X7^Y8, }, // 356 + {Z2^X6^Y6, X2, X3, Y3^X10, }, // 357 + {Y0^X6^Y6, X2, X3, Y3^X9, }, // 358 + {Z2^X6^Y6, X6^Y8, Y2, X3, }, // 359 + {Z2^X6^Y6, Y1^X6^Y8, X2, Y2, }, // 360 + {Y6^X7, X3, Y3, Y1^X7^Y9, }, // 361 + {Y1^Y6^X7, X3, Y3, X1^X7^Y9, }, // 362 + {Y0^Y6^X7, X3, Y3, X1^X7^Y9, }, // 363 + {Z3^Y6^X7, Z2^X6^Y7, X2, X3, }, // 364 + {Z2^Y6^X7, Y0^X6^Y7, X2, X3, }, // 365 + {Y5^X9, X6^Y8, Y6^X8, X7^Y7, }, // 366 + {Y4^X8, X5^Y7, Y5^X7, X6^Y6, }, // 367 + {X4^Y7, Y4^X7, X5^Y6, Y5^X6, }, // 368 + {X5^Y7, Y4^X8, X6^Y6, Y5^X7, }, // 369 + {X3^Y7, Y4^X7, X5^Y6, Y5^X6, }, // 370 + {Y5, X6^Y8, X7^Y7, Y6^X8, }, // 371 + {Y3, Y5^X8, X6^Y7, Y6^X7, }, // 372 + {X3, Y3^X8, X6^Y6, Y5^X7, }, // 373 + {Y2, Y3^X7, X3^Y6, Y5^X6, }, // 374 + {X5, X6^Y8, Y6^X8, X7^Y7, }, // 375 + {Y3, X5^Y8, X6^Y7, Y6^X7, }, // 376 + {X3, Y3^X7, X5^Y7, X6^Y6, }, // 377 + {Y2, X3^Y7, Y3^X6, X5^Y6, }, // 378 + {X6, Y6, X7^Y8, Y7^X8, }, // 379 + {Y3, X6, Y6^X8, X7^Y7, }, // 380 + {X3, Y3, X6^Y7, Y6^X7, }, // 381 + {Y2, X3, Y3^X7, X6^Y6, }, // 382 + {X2, Y2, X3^Y6, Y3^X6, }, // 383 + {Y6, X7^Y8, Y7^X8, X5^Y6, }, // 384 + {X6, X7^Y7, Y6^X8, X5^Y6, }, // 385 + {Y3, X6^Y7, Y6^X7, X5^Y6, }, // 386 + {X3, Y3^X7, X6^Y6, Z0^X5^Y6, }, // 387 + {Y2, Y3^X6, X3^Y6, Z0^X5^Y6, }, // 388 + {Y3, X6, X7^Y7, Y6^X8, }, // 389 + {X2, Y2, Y3^X6, X3^Y6, }, // 390 + {X6^Y6, Y6, X7, Y7^X8, }, // 391 + {X6^Y6, Y3, Y6, X7^Y7, }, // 392 + {X6^Y6, X3, Y3, Y6^X7, }, // 393 + {X6^Y6, Y2, X3, Y3^X7, }, // 394 + {X3^Y6, X2, Y2, Y3^X6, }, // 395 + {X6, X7, Y7^X8, X6^Y6, }, // 396 + {Y3, X6, X7^Y7, X6^Y6, }, // 397 + {X3, Y3, X6^Y7, X6^Y6, }, // 398 + {Y2, X3, Y3^X7, Z0^X6^Y6, }, // 399 + {X2, X3, Y3^X6, Y2^X6^Y6, }, // 400 + {X6^Y6, X6, X7, Y7^X8, }, // 401 + {X6^Y6, Y3, X6, X7^Y7, }, // 402 + {X6^Y6, X3, Y3, X6^Y7, }, // 403 + {Z0^X6^Y6, Y2, X3, Y3^X7, }, // 404 + {Y2^X6^Y6, X2, X3, Y3^X6, }, // 405 + {Z0^X6^Y6, X3^Y8, Y2, Y3, }, // 406 + {Y2^X6^Y6, X3^Y8, X2, Y3, }, // 407 + {Y6^X7, X7, Y7, X6^Y7, }, // 408 + {Y6^X7, Y3, X7, X6^Y7, }, // 409 + {Y6^X7, X3, Y3, X6^Y7, }, // 410 + {Y2^Y6^X7, X3, Y3, Z0^X6^Y7, }, // 411 + {Y2^Y6^X7, X3, Y3, X2^X6^Y7, }, // 412 + {Y2^Y6^X7, Z0^X6^Y7, X3, Y3, }, // 413 + {Y2^Y6^X7, X2^X6^Y7, X3, Y3, }, // 414 + {X5^Y9, Y6^X8, X6^Y8, X7^Y7, }, // 415 + {Y4^X8, X5^Y7, Y5^X7, X2^X6^Y6, }, // 416 + {Y4^X7, X4^Y7, Y5^X6, Y1^X5^Y6, }, // 417 + {Y4^X8, X5^Y7, Y5^X7, Y2^X6^Y6, }, // 418 + {Y4^X7, X3^Y7, Y5^X6, Y1^X5^Y6, }, // 419 + {X5, Y6^X8, X6^Y8, X7^Y7, }, // 420 + {Y3, X5^Y8, Y6^X7, Y2^X6^Y7, }, // 421 + {X3, Y3^X7, X5^Y7, Y2^X6^Y6, }, // 422 + {Y2, Y3^X6, X3^Y7, Y1^X5^Y6, }, // 423 + {X3, Y3^X7, X5^Y7, X2^X6^Y6, }, // 424 + {Y3, X5, X6^Y8, X7^Y7, }, // 425 + {X3, Y3, X5^Y8, X6^Y7, }, // 426 + {X3, Y3, X5^Y8, Y2^X6^Y7, }, // 427 + {Y2, X3, Y3^X6, X5^Y6, }, // 428 + {X2, Y2, Y3^X5, X3^Y6, }, // 429 + {X6, Y6^X8, X7^Y7, X5^Y6, }, // 430 + {Y3, Y6^X7, Y2^X6^Y7, X5^Y6, }, // 431 + {X3, Y3^X7, Y2^X6^Y6, Z0^X5^Y6, }, // 432 + {X3, Y3^X7, Y2^X6^Y6, Y1^X5^Y6, }, // 433 + {X3, Y3, Y6^X7, Y2^X6^Y7, }, // 434 + {X2, X3, Y3^X7, Y2^X6^Y6, }, // 435 + {X6^Y6, X3, Y3, Y2^X6^Y7, }, // 436 + {X3, Y3, Y2^X6^Y7, X6^Y6, }, // 437 + {X3, Y3, X2^X6^Y7, Y2^X6^Y6, }, // 438 + {Y2^X6^Y6, X3, Y3, X2^X6^Y7, }, // 439 + {X6^Y6, X6^Y8, Y3, Y7, }, // 440 + {X6^Y6, Y2^X6^Y8, X3, Y3, }, // 441 + {Y2^X6^Y6, X2^X6^Y8, X3, Y3, }, // 442 + {Y6^X7, Y3, Y7, X6^Y7, }, // 443 + {Y6^X7, X3, Y3, Y2^X6^Y7, }, // 444 + {Y6^X7, X6^Y7, Y3, Y7, }, // 445 + {Y6^X7, Y2^X6^Y7, X3, Y3, }, // 446 + {X5^Y8, Y5^X8, X6^Y7, Y2^Y6^X7, }, // 447 + {X5^Y8, Y5^X8, X2^X6^Y7, Y2^Y6^X7, }, // 448 + {Y4^X8, X5^Y7, X2^X6^Y6, Y1^Y5^X7, }, // 449 + {X4^Y7, Y4^X7, X1^X5^Y6, Y1^Y5^X6, }, // 450 + {Y4^X9, X6^Y7, Y5^X8, Y2^Y6^X7, }, // 451 + {X5^Y7, Y4^X8, X2^Y5^X7, Y1^X6^Y6, }, // 452 + {X3^Y7, Y4^X7, X1^Y5^X6, Y1^X5^Y6, }, // 453 + {Y3, X6^Y7, Y5^X8, Y2^Y6^X7, }, // 454 + {Y3, Y5^X8, X2^Y6^X7, Y2^X6^Y7, }, // 455 + {X3, Y3^X8, X2^Y5^X7, Y1^X6^Y6, }, // 456 + {Y2, Y3^X6, X3^Y6, X1^X5^Y5, }, // 457 + {Y3, X5^Y8, X6^Y7, Y2^Y6^X7, }, // 458 + {Y3, X5^Y8, X2^X6^Y7, Y2^Y6^X7, }, // 459 + {X3, Y3^X8, Y2^Y5^X7, Y1^X6^Y6, }, // 460 + {X3, Y3^X7, Y2^X6^Y6, X1^X5^Y7, }, // 461 + {X3, Y3, X6^Y7, Y2^Y6^X7, }, // 462 + {X3, Y3, X2^X6^Y7, Y2^Y6^X7, }, // 463 + {X2, X3, Y3^X7, Y2^Y5^X6, }, // 464 + {X2, X3, Y3^X6, Y2^X5^Y6, }, // 465 + {Y3, X6^Y7, Y2^Y6^X7, X5^Y6, }, // 466 + {Y3, X2^Y6^X7, Y2^X6^Y7, X5^Y6, }, // 467 + {Y3, X2^Y6^X7, Y2^X6^Y7, Z0^X5^Y6, }, // 468 + {Y3, X2^Y6^X7, Y2^X6^Y7, X1^X5^Y6, }, // 469 + {X3, Y3, X2^Y6^X7, Y2^X6^Y7, }, // 470 + {X6^Y6, X3, Y3, Y2^Y6^X7, }, // 471 + {Y2^X6^Y6, X3, Y3, X2^X6^Y6, }, // 472 + {X3, Y3, Y2^Y6^X7, X6^Y6, }, // 473 + {Y2^Y6^X7, X3, Y3, X6^Y7, }, // 474 + {Y2^Y6^X7, X6^Y7, X3, Y3, }, // 475 + {Y4^X8, X1^X5^Y7, Y1^Y5^X7, X2^X6^Y6, }, // 476 + {Y4^X7, Y0^X4^Y7, X1^X5^Y6, Y1^Y5^X6, }, // 477 + {Y4^X8, Y1^X5^Y7, X1^Y5^X7, Y2^X6^Y6, }, // 478 + {Y3^X7, Y0^X4^Y6, X1^Y4^X6, Y1^X5^Y5, }, // 479 + {Y3, X5^Y8, X2^Y6^X7, Y2^X6^Y7, }, // 480 + {Y3, Y1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, }, // 481 + {X3, Y3^X7, Y1^X5^Y6, X1^Y5^X6, }, // 482 + {X3, Y3^X6, Y1^X4^Y6, Y2^X5^Y5, }, // 483 + {Y3, X1^X5^Y8, Y2^Y6^X7, X2^X6^Y7, }, // 484 + {Y3, X1^X5^Y8, X2^X6^Y7, Y2^Y6^X7, }, // 485 + {X3, Y3, Y1^X5^Y7, X2^X6^Y6, }, // 486 + {X3, Y3, X1^X5^Y7, Y2^X6^Y6, }, // 487 + {X3, Y3, X1^X5^Y7, X2^X6^Y6, }, // 488 + {Y3, X2^Y6^X7, Y1^X6^Y7, Y2^X5^Y6, }, // 489 + {X3, Y3, X2^Y6^X7, Y1^X6^Y7, }, // 490 + {X2^X6^Y6, X3, Y3, Y1^X6^Y6, }, // 491 + {X2^X6^Y6, X3, Y3, Y2^X6^Y6, }, // 492 + {X3, Y3, Y1^X6^Y7, X2^X6^Y6, }, // 493 + {Y2^X6^Y6, X3, Y3, Y1^X6^Y7, }, // 494 + {Y2^X6^Y6, Y1^X6^Y8, X3, Y3, }, // 495 + {Y2^Y6^X7, X3, Y3, Y1^X6^Y7, }, // 496 + {X6^X8^Y8, Y6, X7, X8^Y10, }, // 497 + {X6^X8^Y8, Y3, Y6, X7^Y10, }, // 498 + {X6^X8^Y8, X3, Y3, X7^Y9, }, // 499 + {X6^X8^Y8, Y2, X3, Y3^X10, }, // 500 + {X6^X8^Y8, X2, Y2, X3^Y8, }, // 501 + {Z0^X6^Y6, X6, X7, Y7^X11, }, // 502 + {Z0^X6^Y6, Y3, X6, X7^Y10, }, // 503 + {Z0^X6^Y6, X3, Y3, X6^Y10, }, // 504 + {Z0^X6^Y6, X6^X9^Y9, X7, Y7, }, // 505 + {Z0^X6^Y6, X6^X9^Y9, Y3, X7, }, // 506 + {Z0^X6^Y6, X6^X9^Y9, X3, Y3, }, // 507 + {Z0^X6^Y6, X6^X9^Y9, Y2, X3, }, // 508 + {Z0^X6^Y6, X6^X9^Y9, X2, Y2, }, // 509 + {Z1^Y6^X7, X7, Y7, X8^Y10, }, // 510 + {Z1^Y6^X7, Y3, X7, Y7^X10, }, // 511 + {Z1^Y6^X7, X3, Y3, X7^Y9, }, // 512 + {Z1^Y6^X7, Z0^X6^Y7, X7, Y7, }, // 513 + {Z1^Y6^X7, Z0^X6^Y7, Y3, X7, }, // 514 + {Z1^Y6^X7, Z0^X6^Y7, X3, Y3, }, // 515 + {Y6^X7, S0^X6^Y7, 0, 0, }, // 516 + {Y5^X7, S0^X6^Y6, 0, 0, }, // 517 + {Y5^X6, S0^X5^Y6, 0, 0, }, // 518 + {Y4^X6, S0^X5^Y5, 0, 0, }, // 519 + {Y4^X5, S0^X4^Y5, 0, 0, }, // 520 + {X6^Y8, Y6^X8, S0^X7^Y7, 0, }, // 521 + {X6^Y7, Y5^X8, S0^Y6^X7, 0, }, // 522 + {X5^Y7, Y5^X7, S0^X6^Y6, 0, }, // 523 + {X5^Y6, Y4^X7, S0^Y5^X6, 0, }, // 524 + {X3^Y6, Y4^X6, S0^X5^Y5, 0, }, // 525 + {Y6^X9, X6^Y9, Y7^X8, S0^X7^Y8, }, // 526 + {Y5^X9, X6^Y8, Y6^X8, S0^X7^Y7, }, // 527 + {Y5^X8, X5^Y8, Y6^X7, S0^X6^Y7, }, // 528 + {Y3^X8, X5^Y7, Y5^X7, S0^X6^Y6, }, // 529 + {Y3^X7, X3^Y7, Y5^X6, S0^X5^Y6, }, // 530 + {Y5, X6^Y9, X7^Y8, Y6^X9, }, // 531 + {X3, Y3^X9, X6^Y7, Y5^X8, }, // 532 + {Y2, Y3^X8, X3^Y7, Y5^X7, }, // 533 + {Y6^X9, Y7^X8, S0^X7^Y8, Z0^X5^Y5, }, // 534 + {X6^Y8, Y6^X8, S0^X7^Y7, Z0^X5^Y5, }, // 535 + {X5^Y8, Y6^X7, S0^X6^Y7, Z0^X5^Y5, }, // 536 + {Y3^X7, X5^Y7, S0^X6^Y6, Z0^X5^Y5, }, // 537 + {Y3^X6, X3^Y7, S0^X5^Y6, Z0^X5^Y5, }, // 538 + {X6, Y6, Y7^X10, X7^Y10, }, // 539 + {Y6, X7^Y9, Y7^X9, S0^X8^Y8, }, // 540 + {X6, X7^Y8, Y6^X9, S0^Y7^X8, }, // 541 + {Y3, X6^Y8, Y6^X8, S0^X7^Y7, }, // 542 + {X3, Y3^X8, X6^Y7, S0^Y6^X7, }, // 543 + {Y2, Y3^X7, X3^Y7, S0^X6^Y6, }, // 544 + {X6^X8^Y8, Y6, X7, Y7^X11, }, // 545 + {X6^X8^Y8, X3, Y3, Y6^X10, }, // 546 + {X6^X8^Y8, X2, Y2, Y3^X9, }, // 547 + {X6, X7, Y7^X10, Y8^X9, }, // 548 + {Z0^Y6^X7, X7, Y7, X8^Y10, }, // 549 + {Z0^Y6^X7, Y3, X7, X8^Y9, }, // 550 + {Z0^Y6^X7, X3, Y3, X7^Y9, }, // 551 + {Z0^Y6^X7, Z4^X6^Y7, X7, Y7, }, // 552 + {Z0^Y6^X7, Z4^X6^Y7, Y3, X7, }, // 553 + {Z0^Y6^X7, Z4^X6^Y7, X3, Y3, }, // 554 + {Z0^Y6^X7, Z4^X6^Y7, Y2, X3, }, // 555 + {S0^X6^Y7, S1^Y6^X7, 0, 0, }, // 556 + {S0^Y5^X7, S1^X6^Y6, 0, 0, }, // 557 + {S0^X5^Y6, S1^Y5^X6, 0, 0, }, // 558 + {S0^Y4^X6, S1^X5^Y5, 0, 0, }, // 559 + {S0^X4^Y5, S1^Y4^X5, 0, 0, }, // 560 + {Y5^X9, S0^X7^Y7, S1^Y6^X8, 0, }, // 561 + {Y5^X8, S0^X6^Y7, S1^Y6^X7, 0, }, // 562 + {Y4^X8, S0^X6^Y6, S1^Y5^X7, 0, }, // 563 + {Y4^X7, S0^X5^Y6, S1^Y5^X6, 0, }, // 564 + {Y3^X7, S0^X5^Y5, S1^Y4^X6, 0, }, // 565 + {X6^Y9, Y6^X9, S0^X7^Y8, S1^Y7^X8, }, // 566 + {X6^Y8, Y5^X9, S0^X7^Y7, S1^Y6^X8, }, // 567 + {X5^Y8, Y5^X8, S0^X6^Y7, S1^Y6^X7, }, // 568 + {Y3^X8, X5^Y7, S0^X6^Y6, S1^Y5^X7, }, // 569 + {Y3^X7, X3^Y7, S0^X5^Y6, S1^Y5^X6, }, // 570 + {X6, X7^Y9, Y6^X10, S0^X8^Y8, }, // 571 + {Y5, X6^Y9, Y6^X9, S0^X7^Y8, }, // 572 + {Y3, X6^Y8, Y5^X9, S0^X7^Y7, }, // 573 + {X3, Y3^X9, Y5^X8, S0^X6^Y7, }, // 574 + {Y2, X3^Y7, Y3^X8, S0^X6^Y6, }, // 575 + {Y6^X9, S0^X7^Y8, S1^Y7^X8, Z0^X5^Y5, }, // 576 + {X6^Y8, S0^Y6^X8, S1^X7^Y7, Z0^X5^Y5, }, // 577 + {X5^Y8, S0^X6^Y7, S1^Y6^X7, Z0^X5^Y5, }, // 578 + {Y3^X8, S0^X6^Y6, S1^Y5^X7, Z0^X5^Y5, }, // 579 + {Y3^X6, X3^Y7, S0^X5^Y6, S1^X5^Y5, }, // 580 + {X6, Y6^X10, X7^Y9, S0^Y7^X9, }, // 581 + {X5, X6^Y9, Y6^X9, S0^X7^Y8, }, // 582 + {Y3, X5^Y9, X6^Y8, S0^Y6^X8, }, // 583 + {X3, Y3^X8, X5^Y8, S0^X6^Y7, }, // 584 + {Y2, Y3^X8, X3^Y7, S0^X6^Y6, }, // 585 + {Y6, X7^Y9, S0^X8^Y8, S1^Y7^X9, }, // 586 + {X6, Y6^X9, S0^X7^Y8, S1^Y7^X8, }, // 587 + {Y3, X6^Y8, S0^X7^Y7, S1^Y6^X8, }, // 588 + {X3, Y3^X8, S0^X6^Y7, S1^Y6^X7, }, // 589 + {X6, X7, Y7^X10, S0^X8^Y9, }, // 590 + {Y3, X6, X7^Y9, S0^Y7^X9, }, // 591 + {X3, Y3, X6^Y9, S0^X7^Y8, }, // 592 + {Y2, X3, Y3^X9, S0^X7^Y7, }, // 593 + {Z3^X6^Y6, X6, X7, Y7^X11, }, // 594 + {Z3^X6^Y6, Y3, X6, X7^Y10, }, // 595 + {Z3^X6^Y6, X3, Y3, X6^Y10, }, // 596 + {Z3^X6^Y6, X6^X9^Y9, X7, Y7, }, // 597 + {Z3^X6^Y6, X6^X9^Y9, Y3, X7, }, // 598 + {Z3^X6^Y6, X6^X9^Y9, X3, Y3, }, // 599 + {Z3^X6^Y6, X6^X9^Y9, Y2, X3, }, // 600 + {Z3^X6^Y6, X6^X9^Y9, X2, Y2, }, // 601 + {Z4^Y6^X7, X7, Y7, X8^Y10, }, // 602 + {Z4^Y6^X7, Y3, X7, Y7^X10, }, // 603 + {Z4^Y6^X7, X3, Y3, X7^Y9, }, // 604 + {Z4^Y6^X7, Y2, X3, Y3^X9, }, // 605 + {S1^Y6^X7, X2, Y2, Y3^X8, }, // 606 + {Z4^Y6^X7, Z3^X6^Y7, X7, Y7, }, // 607 + {Z4^Y6^X7, Z3^X6^Y7, Y3, X7, }, // 608 + {Z4^Y6^X7, Z3^X6^Y7, X3, Y3, }, // 609 + {S1^Y6^X7, S2^X6^Y7, 0, 0, }, // 610 + {S1^Y5^X7, S2^X6^Y6, 0, 0, }, // 611 + {S1^Y5^X6, S2^X5^Y6, 0, 0, }, // 612 + {S1^Y4^X6, S2^X5^Y5, 0, 0, }, // 613 + {S1^Y4^X5, S2^X4^Y5, 0, 0, }, // 614 + {S0^X6^Y8, S1^Y6^X8, S2^X7^Y7, 0, }, // 615 + {S0^X6^Y7, S1^Y5^X8, S2^Y6^X7, 0, }, // 616 + {S0^X5^Y7, S1^Y5^X7, S2^X6^Y6, 0, }, // 617 + {S0^X5^Y6, S1^Y4^X7, S2^Y5^X6, 0, }, // 618 + {Y6^X9, S0^X6^Y9, S1^Y7^X8, S2^X7^Y8, }, // 619 + {Y5^X9, S0^X6^Y8, S1^Y6^X8, S2^X7^Y7, }, // 620 + {Y5^X8, S0^X5^Y8, S1^Y6^X7, S2^X6^Y7, }, // 621 + {Y3^X8, S0^X5^Y7, S1^Y5^X7, S2^X6^Y6, }, // 622 + {Y3^X6, X3^Y7, S0^X4^Y6, S1^X5^Y5, }, // 623 + {X6, Y6^X10, S0^X7^Y9, S1^Y7^X9, }, // 624 + {Y5, X6^Y9, S0^X7^Y8, S1^Y6^X9, }, // 625 + {Y3, Y5^X9, S0^X6^Y8, S1^Y6^X8, }, // 626 + {X3, Y3^X9, S0^X6^Y7, S1^Y5^X8, }, // 627 + {Y2, Y3^X8, S0^X5^Y7, S1^Y5^X7, }, // 628 + {S0^X6^Y9, S1^Y7^X8, S2^X7^Y8, Z0^X5^Y5, }, // 629 + {S0^X6^Y8, S1^Y6^X8, S2^X7^Y7, Z0^X5^Y5, }, // 630 + {S0^X5^Y8, S1^Y6^X7, S2^X6^Y7, Z0^X5^Y5, }, // 631 + {Y3^X7, S0^X5^Y7, S1^X6^Y6, S2^X5^Y5, }, // 632 + {X5, X6^Y9, S0^Y6^X9, S1^X7^Y8, }, // 633 + {Y3, X5^Y9, S0^X6^Y8, S1^Y6^X8, }, // 634 + {Y2, Y3^X7, X3^Y8, S0^X5^Y7, }, // 635 + {X6, Y6, Y7^X10, S0^X7^Y10, }, // 636 + {Y3, X6, Y6^X10, S0^X7^Y9, }, // 637 + {X3, Y3, Y6^X9, S0^X6^Y9, }, // 638 + {Y2, X3, Y3^X9, S0^X6^Y8, }, // 639 + {X2, Y2, Y3^X8, S0^X5^Y8, }, // 640 + {Y6, S0^X7^Y9, S1^Y7^X9, S2^X8^Y8, }, // 641 + {X6, S0^X7^Y8, S1^Y6^X9, S2^Y7^X8, }, // 642 + {Y3, S0^X6^Y8, S1^Y6^X8, S2^X7^Y7, }, // 643 + {X3^X8^Y8, X2, Y2, Y3^X9, }, // 644 + {X6, Y7, S0^X7^Y10, S1^Y8^X9, }, // 645 + {Y3, X6, S0^X7^Y9, S1^Y7^X9, }, // 646 + {X3, Y3, S0^X6^Y9, S1^Y7^X8, }, // 647 + {Y2, X3, Y3^X8, S0^X6^Y8, }, // 648 + {Z2^X6^Y6, X6, X7, Y7^X11, }, // 649 + {Z2^X6^Y6, Y3, X6, X7^Y10, }, // 650 + {Z2^X6^Y6, X3, Y3, X6^Y10, }, // 651 + {Z2^X6^Y6, Y2, X3, Y3^X10, }, // 652 + {S2^X6^Y6, X2, Y2, Y3^X8, }, // 653 + {Z2^X6^Y6, X6^X9^Y9, X7, Y7, }, // 654 + {Z2^X6^Y6, X6^X9^Y9, Y3, X7, }, // 655 + {Z2^X6^Y6, X6^X9^Y9, X3, Y3, }, // 656 + {Z2^X6^Y6, X6^X9^Y9, Y2, X3, }, // 657 + {Z2^X6^Y6, X3^X9^Y9, X2, Y2, }, // 658 + {Z3^Y6^X7, X7, Y7, S0^X8^Y10, }, // 659 + {Z3^Y6^X7, Y3, X7, S0^X8^Y9, }, // 660 + {Z3^Y6^X7, X3, Y3, S0^X7^Y9, }, // 661 + {S2^Y6^X7, Y2, X3, Y3^X9, }, // 662 + {S2^Y6^X7, X2, Y2, Y3^X8, }, // 663 + {Z3^Y6^X7, Z2^X6^Y7, X7, Y7, }, // 664 + {Z3^Y6^X7, Z2^X6^Y7, Y3, X7, }, // 665 + {Z3^Y6^X7, Z2^X6^Y7, X3, Y3, }, // 666 + {Z3^Y6^X7, Z2^X6^Y7, Y2, X3, }, // 667 + {Z2^Y6^X7, S2^X6^Y7, X2, Y2, }, // 668 + {Y6, X7^Y8, Y7^X8, Z0^X5^Y6, }, // 669 + {X6, X7^Y7, Y6^X8, Z0^X5^Y6, }, // 670 + {Y3, X6^Y7, Y6^X7, Z0^X5^Y6, }, // 671 + {X6^X8^Y8, Y6, X7, Y7^X8, }, // 672 + {X6^X8^Y8, Y3, Y6, X7^Y7, }, // 673 + {X6^X8^Y8, X3, Y3, Y6^X7, }, // 674 + {X6^X8^Y8, Y2, X3, Y3^X7, }, // 675 + {X3^X8^Y8, X2, Y2, Y3^X6, }, // 676 + {X6, X7, Y7^X8, Z0^X6^Y6, }, // 677 + {Y3, X6, X7^Y7, Z0^X6^Y6, }, // 678 + {X3, Y3, X6^Y7, Z0^X6^Y6, }, // 679 + {Z0^X6^Y6, X6, X7, Y7^X8, }, // 680 + {Z0^X6^Y6, Y3, X6, X7^Y7, }, // 681 + {Z0^X6^Y6, X3, Y3, X6^Y7, }, // 682 + {Z0^X6^Y6, X3^X9^Y9, Y2, Y3, }, // 683 + {Y2^X6^Y6, X3^X9^Y9, X2, Y3, }, // 684 + {Z1^Y6^X7, X7, Y7, Z0^X6^Y7, }, // 685 + {Z1^Y6^X7, Y3, X7, Z0^X6^Y7, }, // 686 + {Z1^Y6^X7, X3, Y3, Z0^X6^Y7, }, // 687 + {Y4^X8, X5^Y7, Y5^X7, S0^X6^Y6, }, // 688 + {Y4^X7, X4^Y7, Y5^X6, S0^X5^Y6, }, // 689 + {Y4^X7, X3^Y7, Y5^X6, S0^X5^Y6, }, // 690 + {X6, Y6^X9, Y7^X8, S0^X7^Y8, }, // 691 + {Y5, X6^Y8, Y6^X8, S0^X7^Y7, }, // 692 + {Y3, Y5^X8, Y6^X7, S0^X6^Y7, }, // 693 + {X3, Y3^X8, Y5^X7, S0^X6^Y6, }, // 694 + {Y2, Y3^X6, X3^Y6, X5^Y5, }, // 695 + {X5, X6^Y8, Y6^X8, S0^X7^Y7, }, // 696 + {Y3, X5^Y8, Y6^X7, S0^X6^Y7, }, // 697 + {X3, Y3^X7, X5^Y7, S0^X6^Y6, }, // 698 + {Y2, Y3^X6, X3^Y7, S0^X5^Y6, }, // 699 + {X6, Y6, Y7^X8, S0^X7^Y8, }, // 700 + {Y3, X6, Y6^X8, S0^X7^Y7, }, // 701 + {X3, Y3, Y6^X7, S0^X6^Y7, }, // 702 + {Y2, X3, Y3^X7, S0^X6^Y6, }, // 703 + {Y6, Y7^X8, S0^X7^Y8, Z0^X5^Y6, }, // 704 + {X6, Y6^X8, S0^X7^Y7, Z0^X5^Y6, }, // 705 + {Y3, Y6^X7, S0^X6^Y7, Z0^X5^Y6, }, // 706 + {X3, Y3^X7, S0^X6^Y6, Z0^X5^Y6, }, // 707 + {Y2, Y3^X6, X3^Y6, S0^X5^Y6, }, // 708 + {X6^X8^Y8, Y6, Y7, S0^X7^Y8, }, // 709 + {X6^X8^Y8, Y3, Y6, S0^X7^Y7, }, // 710 + {S0^X8^Y8, X3, Y3, X6^Y6, }, // 711 + {S0^X8^Y8, Y2, X3, Y3^X6, }, // 712 + {X6, Y7, S0^X7^Y8, Z0^X6^Y6, }, // 713 + {Y3, X6, S0^X7^Y7, Z0^X6^Y6, }, // 714 + {X3, Y3, S0^X6^Y7, Z0^X6^Y6, }, // 715 + {Y2, X3, Y3^X6, S0^X6^Y6, }, // 716 + {Z0^X6^Y6, X6, Y7, S0^X7^Y8, }, // 717 + {Z0^X6^Y6, Y3, X6, S0^X7^Y7, }, // 718 + {Z0^X6^Y6, X3, Y3, S0^X6^Y7, }, // 719 + {S0^X6^Y6, Y2, X3, Y3^X6, }, // 720 + {Z0^X6^Y6, X6^X9^Y9, Y7, S0^X7, }, // 721 + {Z0^X6^Y6, X6^X9^Y9, Y3, S0^X7, }, // 722 + {Z0^X6^Y6, S0^X9^Y9, X3, Y3, }, // 723 + {S0^X6^Y6, X3^X9^Y9, Y2, Y3, }, // 724 + {Z0^Y6^X7, Y7, S0^X7, Z4^X6^Y7, }, // 725 + {Z0^Y6^X7, Y3, S0^X7, Z4^X6^Y7, }, // 726 + {Z0^Y6^X7, X3, Y3, S0^X6^Y7, }, // 727 + {S0^Y6^X7, X3, Y3, Y2^X6^Y7, }, // 728 + {Z0^Y6^X7, Z4^X6^Y7, Y7, S0^X7, }, // 729 + {Z0^Y6^X7, Z4^X6^Y7, Y3, S0^X7, }, // 730 + {Z0^Y6^X7, S0^X6^Y7, X3, Y3, }, // 731 + {S0^Y6^X7, Y2^X6^Y7, X3, Y3, }, // 732 + {Y5^X9, X6^Y8, S0^Y6^X8, S1^X7^Y7, }, // 733 + {Y4^X8, X5^Y7, S0^Y5^X7, S1^X6^Y6, }, // 734 + {X4^Y7, Y4^X7, S0^X5^Y6, S1^Y5^X6, }, // 735 + {X5^Y7, Y4^X8, S0^X6^Y6, S1^Y5^X7, }, // 736 + {X3^Y7, Y4^X7, S0^X5^Y6, S1^Y5^X6, }, // 737 + {Y5, X6^Y8, S0^X7^Y7, S1^Y6^X8, }, // 738 + {Y3, Y5^X8, S0^X6^Y7, S1^Y6^X7, }, // 739 + {X3, Y3^X8, S0^X6^Y6, S1^Y5^X7, }, // 740 + {Y2, Y3^X6, X3^Y6, S0^X5^Y5, }, // 741 + {X5, X6^Y8, S0^Y6^X8, S1^X7^Y7, }, // 742 + {Y3, X5^Y8, S0^X6^Y7, S1^Y6^X7, }, // 743 + {X6, Y6, S0^X7^Y8, S1^Y7^X8, }, // 744 + {Y3, X6, S0^Y6^X8, S1^X7^Y7, }, // 745 + {X3, Y3, S0^X6^Y7, S1^Y6^X7, }, // 746 + {Y2, X3, Y3^X7, S0^Y5^X6, }, // 747 + {Y6, S0^X7^Y8, S1^Y7^X8, Z0^X5^Y6, }, // 748 + {X6, S0^X7^Y7, S1^Y6^X8, Z0^X5^Y6, }, // 749 + {Y3, S0^X6^Y7, S1^Y6^X7, Z0^X5^Y6, }, // 750 + {Y3, X6, S0^X7^Y7, S1^Y6^X8, }, // 751 + {X6^X8^Y8, Y6, S0^X7, S1^Y7^X8, }, // 752 + {X6^X8^Y8, Y3, S0^X7, S1^Y6^X8, }, // 753 + {S1^X8^Y8, X3, Y3, S0^X6^Y6, }, // 754 + {X6, S0^X7, S1^Y7^X8, Z3^X6^Y6, }, // 755 + {Y3, S0^X7, S1^Y6^X8, Z3^X6^Y6, }, // 756 + {X3, Y3, S0^X6^Y7, S1^X6^Y6, }, // 757 + {Z3^X6^Y6, X6, S0^X7, S1^Y7^X8, }, // 758 + {Z3^X6^Y6, Y3, S0^X7, S1^Y6^X8, }, // 759 + {S1^X6^Y6, X3, Y3, S0^X6^Y7, }, // 760 + {Z3^X6^Y6, X6^X9^Y9, S0^X7, S1^Y7, }, // 761 + {Z3^X6^Y6, S1^X9^Y9, Y3, S0^X7, }, // 762 + {S1^X6^Y6, S0^X9^Y9, X3, Y3, }, // 763 + {Z4^Y6^X7, S0^X7, S1^Y7, Z3^X6^Y7, }, // 764 + {S1^Y6^X7, Y3, S0^X7, Z3^X6^Y7, }, // 765 + {S1^Y6^X7, X3, Y3, S0^X6^Y7, }, // 766 + {Z4^Y6^X7, Z3^X6^Y7, S0^X7, S1^Y7, }, // 767 + {S1^Y6^X7, Z3^X6^Y7, Y3, S0^X7, }, // 768 + {S1^Y6^X7, S0^X6^Y7, X3, Y3, }, // 769 + {Y4^X8, S0^X5^Y7, S1^Y5^X7, S2^X6^Y6, }, // 770 + {Y4^X7, S0^X4^Y7, S1^Y5^X6, S2^X5^Y6, }, // 771 + {Y3^X7, S0^X4^Y6, S1^Y4^X6, S2^X5^Y5, }, // 772 + {Y6, S0^X6^Y9, S1^Y7^X8, S2^X7^Y8, }, // 773 + {Y5, S0^X6^Y8, S1^Y6^X8, S2^X7^Y7, }, // 774 + {Y3, Y5^X7, S0^X5^Y7, S1^X6^Y6, }, // 775 + {X3, Y3^X7, S0^X5^Y6, S1^Y5^X6, }, // 776 + {Y2, Y3^X5, X3^Y6, S0^X4^Y5, }, // 777 + {X5, S0^X6^Y8, S1^Y6^X8, S2^X7^Y7, }, // 778 + {Y3, S0^X5^Y8, S1^Y6^X7, S2^X6^Y7, }, // 779 + {X3, Y3^X7, S0^X5^Y7, S1^X6^Y6, }, // 780 + {Y6, S0^X6, S1^Y7^X8, S2^X7^Y8, }, // 781 + {Y3, S0^X6, S1^Y6^X8, S2^X7^Y7, }, // 782 + {X3, Y3, S0^X5^Y7, S1^X6^Y6, }, // 783 + {Y2, X3, Y3^X6, S0^X5^Y6, }, // 784 + {S0^X6, S1^Y7^X8, S2^X7^Y8, Z2^X5^Y6, }, // 785 + {S0^X6, S1^Y6^X8, S2^X7^Y7, Z2^X5^Y6, }, // 786 + {Y3, S0^X6^Y7, S1^Y6^X7, S2^X5^Y6, }, // 787 + {X3, Y3^X7, S0^X6^Y6, S1^X5^Y6, }, // 788 + {S2^X8^Y8, Y6, S0^X6, S1^X7^Y7, }, // 789 + {S2^X8^Y8, Y3, S0^X6, S1^Y6^X7, }, // 790 + {S0^X6, S1^Y7, S2^X7^Y8, Z2^X6^Y6, }, // 791 + {Y3, S0^X6, S1^X7^Y7, S2^X6^Y6, }, // 792 + {Z2^X6^Y6, S0^X6, S1^Y7, S2^X7^Y8, }, // 793 + {S2^X6^Y6, Y3, S0^X6, S1^X7^Y7, }, // 794 + {Z2^X6^Y6, S2^X9^Y9, S0^X6, S1^Y7, }, // 795 + {S2^X6^Y6, S1^X9^Y9, Y3, S0^X6, }, // 796 + {Z2^Y6^X7, S0^X7, S1^Y7, S2^X6^Y7, }, // 797 + {S2^Y6^X7, Y3, S0^X7, S1^X6^Y7, }, // 798 + {Z2^Y6^X7, S2^X6^Y7, S0^X7, S1^Y7, }, // 799 + {S2^Y6^X7, S1^X6^Y7, Y3, S0^X7, }, // 800 + {X2, Z4, Y4, X3, }, // 801 + {X2, Z3, Y4, X3, }, // 802 + {Y3, X3, Z4, X5, }, // 803 + {Y3, X2, Z4, X3, }, // 804 + {Y3, X2, Z3, X3, }, // 805 + {Y2, X2, Y3, X3, }, // 806 + {Z3, X3, Z4, X5^Y5, }, // 807 + {X2, Z4, X3, Y2^X5^Y5, }, // 808 + {X2, Z3, X3, Y2^X5^Y5, }, // 809 + {X2, Y3, X3, Y1^X5^Y5, }, // 810 + {X2, Y3, X3, X1^X5^Y5, }, // 811 + {Y3, Z3, X3, Z4, }, // 812 + {Y2, Y3, X3, Z4, }, // 813 + {Z3, X3, Z4, X5^Y6, }, // 814 + {X2, Z4, X3, Z3^X5^Y6, }, // 815 + {X2, Z3, X3, Z2^X5^Y6, }, // 816 + {X2, Y3, X3, Z2^X5^Y6, }, // 817 + {Z3^X7, Y3, X3, Z4, }, // 818 + {Z3^X7, X2, Z4, X3, }, // 819 + {Z2^X7, X2, Z3, X3, }, // 820 + {Z2^X7, X2, Y3, X3, }, // 821 + {Z3, X3, Z4, Y3^X6^Y6, }, // 822 + {X2, Z4, X3, Y3^X6^Y6, }, // 823 + {X2, Z3, X3, Y3^X6^Y6, }, // 824 + {X2, Y3, X3, Y2^X6^Y6, }, // 825 + {Y3^X6^Y6, Z3, X3, Z4, }, // 826 + {Y3^X6^Y6, X2, Z4, X3, }, // 827 + {Y3^X6^Y6, X2, Z3, X3, }, // 828 + {Y2^X6^Y6, X2, Y3, X3, }, // 829 + {Y3^X6^Y6, Z3^X8, X3, Z4, }, // 830 + {X2^X6^Y6, Z3^X8, Z4, X3, }, // 831 + {X2^X6^Y6, Z2^X8, Z3, X3, }, // 832 + {X2^X6^Y6, Z2^X8, Y3, X3, }, // 833 + {Y3^Y6^X7, X3, Z4, Z3^X6^Y7, }, // 834 + {Y3^Y6^X7, Z4, X3, X2^X6^Y7, }, // 835 + {Y3^Y6^X7, Z3, X3, X2^X6^Y7, }, // 836 + {Y2^Y6^X7, Y3, X3, X2^X6^Y7, }, // 837 + {Y3^Y6^X7, Z3^X6^Y7, X3, Z4, }, // 838 + {Y3^Y6^X7, X2^X6^Y7, Z4, X3, }, // 839 + {Y3^Y6^X7, X2^X6^Y7, Z3, X3, }, // 840 + {Y2^Y6^X7, X2^X6^Y7, Y3, X3, }, // 841 +}; + +const UINT_64 GFX10_SW_PATTERN_NIBBLE4[][4] = +{ + {0, 0, 0, 0, }, // 0 + {Y7^X9, 0, 0, 0, }, // 1 + {Y7^X8, 0, 0, 0, }, // 2 + {Y6^X8, 0, 0, 0, }, // 3 + {Y6^X7, 0, 0, 0, }, // 4 + {Y5^X7, 0, 0, 0, }, // 5 + {X8^Y8, 0, 0, 0, }, // 6 + {X7^Y7, 0, 0, 0, }, // 7 + {X6^Y6, 0, 0, 0, }, // 8 + {X8^Y9, Y8^X9, 0, 0, }, // 9 + {Y7^X9, X8^Y8, 0, 0, }, // 10 + {X7^Y8, Y7^X8, 0, 0, }, // 11 + {Y6^X8, X7^Y7, 0, 0, }, // 12 + {X6^Y7, Y6^X7, 0, 0, }, // 13 + {X5^Y6, 0, 0, 0, }, // 14 + {Z0^X5^Y6, 0, 0, 0, }, // 15 + {X8^Y8, Y7^X9, 0, 0, }, // 16 + {X7^Y7, Y6^X8, 0, 0, }, // 17 + {Y7^X11, X9^Y9, Y8^X10, 0, }, // 18 + {Y7^X10, X8^Y9, Y8^X9, 0, }, // 19 + {Y6^X10, X8^Y8, Y7^X9, 0, }, // 20 + {Y6^X9, X7^Y8, Y7^X8, 0, }, // 21 + {Y3^X9, X7^Y7, Y6^X8, 0, }, // 22 + {Y8^X9, X6^Y6, 0, 0, }, // 23 + {X8^Y8, X6^Y6, 0, 0, }, // 24 + {Y7^X8, X6^Y6, 0, 0, }, // 25 + {X7^Y7, Z0^X6^Y6, 0, 0, }, // 26 + {X6^Y7, Z0^X6^Y6, 0, 0, }, // 27 + {X8^Y10, Y8^X10, X9^Y9, 0, }, // 28 + {X7^Y9, Y7^X9, X8^Y8, 0, }, // 29 + {X6^Y9, X7^Y8, Y7^X8, 0, }, // 30 + {Y3^X8, X6^Y8, X7^Y7, 0, }, // 31 + {X8^Y11, Y8^X11, X9^Y10, Y9^X10, }, // 32 + {Y7^X11, X8^Y10, Y8^X10, X9^Y9, }, // 33 + {X7^Y10, Y7^X10, X8^Y9, Y8^X9, }, // 34 + {Y3^X10, X7^Y9, Y7^X9, X8^Y8, }, // 35 + {X3^Y9, Y3^X9, X7^Y8, Y7^X8, }, // 36 + {X9^Y9, Y8^X10, X6^Y7, 0, }, // 37 + {X8^Y9, Y8^X9, X6^Y7, 0, }, // 38 + {X8^Y8, Y7^X9, X6^Y7, 0, }, // 39 + {X7^Y8, Y7^X8, Z0^X6^Y7, 0, }, // 40 + {Y3^X8, X7^Y7, Z0^X6^Y7, 0, }, // 41 + {X8^Y10, Y7^X11, X9^Y9, Y8^X10, }, // 42 + {Y3^X10, X7^Y9, X8^Y8, Y7^X9, }, // 43 + {Y3^X9, X3^Y9, X7^Y8, Y7^X8, }, // 44 + {Y2^X7^Y7, 0, 0, 0, }, // 45 + {X2^Y6^X7, 0, 0, 0, }, // 46 + {Y1^X6^Y6, 0, 0, 0, }, // 47 + {X7^Y9, X8^Y8, 0, 0, }, // 48 + {Y7^X8, Y2^X7^Y8, 0, 0, }, // 49 + {X6^Y8, X2^X7^Y7, 0, 0, }, // 50 + {X5^Y8, Y1^X6^Y7, 0, 0, }, // 51 + {Y6^X8, Y2^X7^Y7, 0, 0, }, // 52 + {Y6^X7, Y1^X6^Y7, 0, 0, }, // 53 + {X7^Y9, X8^Y8, Y7^X9, 0, }, // 54 + {X7^Y9, Y7^X9, Y2^X8^Y8, 0, }, // 55 + {X6^Y9, X7^Y8, X2^Y7^X8, 0, }, // 56 + {X3^Y9, X6^Y8, Y1^X7^Y7, 0, }, // 57 + {Y2^X7^Y8, X6^Y6, 0, 0, }, // 58 + {X2^X7^Y7, Z0^X6^Y6, 0, 0, }, // 59 + {Y1^X6^Y7, Z0^X6^Y6, 0, 0, }, // 60 + {Y3^X8, X6^Y8, Y1^X7^Y7, 0, }, // 61 + {Y7^X11, Y8^X10, X8^Y10, X9^Y9, }, // 62 + {Y7^X10, X7^Y10, Y8^X9, Y2^X8^Y9, }, // 63 + {Y3^X10, X7^Y9, Y7^X9, X2^X8^Y8, }, // 64 + {Y3^X9, X3^Y9, Y7^X8, Y1^X7^Y8, }, // 65 + {Y7^X9, Y2^X8^Y8, X6^Y7, 0, }, // 66 + {X7^Y8, X2^Y7^X8, Z4^X6^Y7, 0, }, // 67 + {X3^Y8, Y1^X7^Y7, Z4^X6^Y7, 0, }, // 68 + {Y3^X10, X7^Y9, Y7^X9, Y2^X8^Y8, }, // 69 + {Y2^Y6^X8, 0, 0, 0, }, // 70 + {Y1^X6^Y7, 0, 0, 0, }, // 71 + {Y1^Y5^X7, 0, 0, 0, }, // 72 + {X7^Y8, Y2^Y7^X8, 0, 0, }, // 73 + {X2^X7^Y8, Y2^Y7^X8, 0, 0, }, // 74 + {X2^X7^Y7, Y1^Y6^X8, 0, 0, }, // 75 + {X1^X6^Y7, Y1^Y6^X7, 0, 0, }, // 76 + {Y6^X9, Y2^Y7^X8, 0, 0, }, // 77 + {X2^Y7^X8, Y2^X7^Y8, 0, 0, }, // 78 + {X2^Y6^X8, Y1^X7^Y7, 0, 0, }, // 79 + {X1^Y6^X7, Y1^X6^Y7, 0, 0, }, // 80 + {Y6^X10, X2^X8^Y8, Y2^Y7^X9, 0, }, // 81 + {Y6^X9, Y2^Y7^X8, Y1^X7^Y8, 0, }, // 82 + {Y3^X9, X1^X7^Y7, Y1^Y6^X8, 0, }, // 83 + {Y2^Y7^X8, X6^Y6, 0, 0, }, // 84 + {Y1^X7^Y7, Z3^X6^Y6, 0, 0, }, // 85 + {X1^X6^Y8, Y1^X6^Y6, 0, 0, }, // 86 + {X7^Y9, X2^Y7^X9, Y2^X8^Y8, 0, }, // 87 + {X6^Y9, X2^Y7^X8, Y1^X7^Y8, 0, }, // 88 + {X3^Y8, X1^Y6^X8, Y1^X7^Y7, 0, }, // 89 + {X7^Y10, Y7^X10, X8^Y9, Y2^Y8^X9, }, // 90 + {X7^Y10, Y7^X10, X2^X8^Y9, Y2^Y8^X9, }, // 91 + {Y3^X10, X7^Y9, X2^X8^Y8, Y1^Y7^X9, }, // 92 + {X3^Y9, Y3^X9, X1^X7^Y8, Y1^Y7^X8, }, // 93 + {X2^X8^Y8, Y2^Y7^X9, X6^Y7, 0, }, // 94 + {Y2^Y7^X8, Y1^X7^Y8, Z3^X6^Y7, 0, }, // 95 + {Y2^Y7^X8, X1^X7^Y8, Z3^X6^Y7, 0, }, // 96 + {X7^Y10, X8^Y9, Y7^X10, Y2^Y8^X9, }, // 97 + {X7^Y10, Y7^X10, X2^Y8^X9, Y2^X8^Y9, }, // 98 + {Y3^X10, X7^Y9, X2^Y7^X9, Y1^X8^Y8, }, // 99 + {Y3^X9, X3^Y9, X1^Y7^X8, Y1^X7^Y8, }, // 100 + {X1^Y5^X6, 0, 0, 0, }, // 101 + {Y2^Y6^X7, 0, 0, 0, }, // 102 + {X1^Y6^X7, 0, 0, 0, }, // 103 + {Y0^X5^Y7, X1^X6^Y6, 0, 0, }, // 104 + {Z1^X5^Y6, 0, 0, 0, }, // 105 + {Y1^X5^Y6, 0, 0, 0, }, // 106 + {X1^Y6^X8, Y2^X7^Y7, 0, 0, }, // 107 + {Y2^X7^Y7, X1^Y6^X8, 0, 0, }, // 108 + {X7^Y9, X2^X8^Y8, Y2^Y7^X9, 0, }, // 109 + {Y1^X7^Y9, X2^X8^Y8, Y2^Y7^X9, 0, }, // 110 + {X6^Y8, X1^X7^Y7, Y1^Y6^X8, 0, }, // 111 + {X3^Y8, Y0^X6^Y7, X1^Y6^X7, 0, }, // 112 + {X2^X7^Y8, Y1^X6^Y6, 0, 0, }, // 113 + {Y2^Y7^X8, Y1^X6^Y6, 0, 0, }, // 114 + {Y1^X7^Y9, X2^Y7^X9, Y2^X8^Y8, 0, }, // 115 + {Y1^X7^Y8, X1^Y6^X9, Y2^Y7^X8, 0, }, // 116 + {Y1^X6^Y9, Y2^X7^Y8, X1^Y7^X8, 0, }, // 117 + {Y7^X10, Y1^X7^Y10, X2^X8^Y9, Y2^Y8^X9, }, // 118 + {Y3^X10, X1^X7^Y9, Y1^Y7^X9, X2^X8^Y8, }, // 119 + {Y3^X8, X3^Y9, Y0^X6^Y8, X1^X7^Y7, }, // 120 + {Y2^Y7^X9, X2^X8^Y8, Z2^X6^Y7, 0, }, // 121 + {X2^X8^Y8, Y2^Y7^X9, Y1^X6^Y7, 0, }, // 122 + {Y3^X10, Y1^X7^Y9, X1^Y7^X9, Y2^X8^Y8, }, // 123 + {Y3^X10, Y1^X7^Y9, Y2^X8^Y8, X1^Y7^X9, }, // 124 + {Y8^X9, Z0^X6^Y6, 0, 0, }, // 125 + {X8^Y8, Z0^X6^Y6, 0, 0, }, // 126 + {Y7^X8, Z0^X6^Y6, 0, 0, }, // 127 + {X9^Y9, Y8^X10, Z0^X6^Y7, 0, }, // 128 + {X8^Y9, Y8^X9, Z0^X6^Y7, 0, }, // 129 + {X8^Y8, Y7^X9, Z0^X6^Y7, 0, }, // 130 + {S0^X8^Y8, 0, 0, 0, }, // 131 + {S0^Y7^X8, 0, 0, 0, }, // 132 + {S0^X7^Y7, 0, 0, 0, }, // 133 + {S0^Y6^X7, 0, 0, 0, }, // 134 + {S0^X6^Y6, 0, 0, 0, }, // 135 + {Y8^X9, S0^X8^Y9, 0, 0, }, // 136 + {Y7^X9, S0^X8^Y8, 0, 0, }, // 137 + {Y7^X8, S0^X7^Y8, 0, 0, }, // 138 + {Y6^X8, S0^X7^Y7, 0, 0, }, // 139 + {Y6^X7, S0^X6^Y7, 0, 0, }, // 140 + {X8^Y10, Y8^X10, S0^X9^Y9, 0, }, // 141 + {X8^Y9, Y7^X10, S0^Y8^X9, 0, }, // 142 + {X7^Y9, Y7^X9, S0^X8^Y8, 0, }, // 143 + {X7^Y8, Y6^X9, S0^Y7^X8, 0, }, // 144 + {X3^Y8, Y6^X8, S0^X7^Y7, 0, }, // 145 + {S0^X8^Y9, Z0^X6^Y6, 0, 0, }, // 146 + {S0^X8^Y8, Z0^X6^Y6, 0, 0, }, // 147 + {S0^X7^Y8, Z0^X6^Y6, 0, 0, }, // 148 + {S0^X7^Y7, Z0^X6^Y6, 0, 0, }, // 149 + {S0^X6^Y7, Z0^X6^Y6, 0, 0, }, // 150 + {Y7^X10, X8^Y9, S0^Y8^X9, 0, }, // 151 + {X6^Y9, X7^Y8, S0^Y7^X8, 0, }, // 152 + {Y3^X8, X6^Y8, S0^X7^Y7, 0, }, // 153 + {Y8^X11, X8^Y11, Y9^X10, S0^X9^Y10, }, // 154 + {Y7^X11, X8^Y10, Y8^X10, S0^X9^Y9, }, // 155 + {Y7^X10, X7^Y10, Y8^X9, S0^X8^Y9, }, // 156 + {Y3^X10, X7^Y9, Y7^X9, S0^X8^Y8, }, // 157 + {Y3^X9, X3^Y9, Y7^X8, S0^X7^Y8, }, // 158 + {Y8^X10, S0^X9^Y9, Z4^X6^Y7, 0, }, // 159 + {Y7^X10, S0^Y8^X9, Z4^X6^Y7, 0, }, // 160 + {Y7^X9, S0^X8^Y8, Z4^X6^Y7, 0, }, // 161 + {X7^Y8, S0^Y7^X8, Z4^X6^Y7, 0, }, // 162 + {X3^Y8, S0^X7^Y7, Z4^X6^Y7, 0, }, // 163 + {S1^Y7^X9, 0, 0, 0, }, // 164 + {S1^Y7^X8, 0, 0, 0, }, // 165 + {S1^Y6^X8, 0, 0, 0, }, // 166 + {S1^Y6^X7, 0, 0, 0, }, // 167 + {S1^Y5^X7, 0, 0, 0, }, // 168 + {S1^X8^Y8, 0, 0, 0, }, // 169 + {S1^X7^Y7, 0, 0, 0, }, // 170 + {S0^X8^Y9, S1^Y8^X9, 0, 0, }, // 171 + {S0^Y7^X9, S1^X8^Y8, 0, 0, }, // 172 + {S0^X7^Y8, S1^Y7^X8, 0, 0, }, // 173 + {S0^Y6^X8, S1^X7^Y7, 0, 0, }, // 174 + {S0^X6^Y7, S1^Y6^X7, 0, 0, }, // 175 + {S0^X8^Y8, S1^Y7^X9, 0, 0, }, // 176 + {S0^X7^Y7, S1^Y6^X8, 0, 0, }, // 177 + {Y7^X11, S0^X9^Y9, S1^Y8^X10, 0, }, // 178 + {Y7^X10, S0^X8^Y9, S1^Y8^X9, 0, }, // 179 + {Y6^X10, S0^X8^Y8, S1^Y7^X9, 0, }, // 180 + {Y6^X9, S0^X7^Y8, S1^Y7^X8, 0, }, // 181 + {Y3^X9, S0^X7^Y7, S1^Y6^X8, 0, }, // 182 + {S1^Y8^X9, Z3^X6^Y6, 0, 0, }, // 183 + {S1^X8^Y8, Z3^X6^Y6, 0, 0, }, // 184 + {S1^Y7^X8, Z3^X6^Y6, 0, 0, }, // 185 + {S1^Y6^X8, Z3^X6^Y6, 0, 0, }, // 186 + {S0^X6^Y7, S1^X6^Y6, 0, 0, }, // 187 + {X8^Y10, S0^Y8^X10, S1^X9^Y9, 0, }, // 188 + {X7^Y9, S0^Y7^X9, S1^X8^Y8, 0, }, // 189 + {X6^Y9, S0^X7^Y8, S1^Y7^X8, 0, }, // 190 + {X3^Y8, S0^X7^Y7, S1^Y6^X8, 0, }, // 191 + {X8^Y11, Y8^X11, S0^X9^Y10, S1^Y9^X10, }, // 192 + {Y7^X11, X8^Y10, S0^Y8^X10, S1^X9^Y9, }, // 193 + {X7^Y10, Y7^X10, S0^X8^Y9, S1^Y8^X9, }, // 194 + {Y3^X10, X7^Y9, S0^Y7^X9, S1^X8^Y8, }, // 195 + {X3^Y9, Y3^X9, S0^X7^Y8, S1^Y7^X8, }, // 196 + {S0^X9^Y9, S1^Y8^X10, Z3^X6^Y7, 0, }, // 197 + {S0^X8^Y9, S1^Y8^X9, Z3^X6^Y7, 0, }, // 198 + {S0^X8^Y8, S1^Y7^X9, Z3^X6^Y7, 0, }, // 199 + {S0^X7^Y8, S1^Y7^X8, Z3^X6^Y7, 0, }, // 200 + {X3^Y8, S0^X7^Y7, Z3^X6^Y7, 0, }, // 201 + {X8^Y10, Y7^X11, S0^X9^Y9, S1^Y8^X10, }, // 202 + {Y3^X10, X7^Y9, S0^X8^Y8, S1^Y7^X9, }, // 203 + {Y3^X9, X3^Y9, S0^X7^Y8, S1^Y7^X8, }, // 204 + {S2^X8^Y8, 0, 0, 0, }, // 205 + {S2^Y7^X8, 0, 0, 0, }, // 206 + {S2^X7^Y7, 0, 0, 0, }, // 207 + {S2^Y6^X7, 0, 0, 0, }, // 208 + {S2^X6^Y6, 0, 0, 0, }, // 209 + {S1^X6^Y6, 0, 0, 0, }, // 210 + {S1^Y8^X9, S2^X8^Y9, 0, 0, }, // 211 + {S1^Y7^X9, S2^X8^Y8, 0, 0, }, // 212 + {S1^Y7^X8, S2^X7^Y8, 0, 0, }, // 213 + {S1^Y6^X8, S2^X7^Y7, 0, 0, }, // 214 + {S1^Y6^X7, S2^X6^Y7, 0, 0, }, // 215 + {Z2^X5^Y6, 0, 0, 0, }, // 216 + {S1^X5^Y6, 0, 0, 0, }, // 217 + {S0^X8^Y10, S1^Y8^X10, S2^X9^Y9, 0, }, // 218 + {S0^X8^Y9, S1^Y7^X10, S2^Y8^X9, 0, }, // 219 + {S0^X7^Y9, S1^Y7^X9, S2^X8^Y8, 0, }, // 220 + {S0^X7^Y8, S1^Y6^X9, S2^Y7^X8, 0, }, // 221 + {S0^X6^Y8, S1^Y6^X8, S2^X7^Y7, 0, }, // 222 + {S2^X8^Y9, Z2^X6^Y6, 0, 0, }, // 223 + {S2^X8^Y8, Z2^X6^Y6, 0, 0, }, // 224 + {S2^X7^Y8, Z2^X6^Y6, 0, 0, }, // 225 + {S1^X7^Y7, S2^X6^Y6, 0, 0, }, // 226 + {S0^Y7^X10, S1^X8^Y9, S2^Y8^X9, 0, }, // 227 + {X3^Y9, S0^X6^Y8, S1^X7^Y7, 0, }, // 228 + {Y8^X11, S0^X8^Y11, S1^Y9^X10, S2^X9^Y10, }, // 229 + {Y7^X11, S0^X8^Y10, S1^Y8^X10, S2^X9^Y9, }, // 230 + {Y7^X10, S0^X7^Y10, S1^Y8^X9, S2^X8^Y9, }, // 231 + {Y3^X10, S0^X7^Y9, S1^Y7^X9, S2^X8^Y8, }, // 232 + {Y3^X9, S0^X6^Y9, S1^Y7^X8, S2^X7^Y8, }, // 233 + {S1^Y8^X10, S2^X9^Y9, Z2^X6^Y7, 0, }, // 234 + {S1^Y7^X10, S2^Y8^X9, Z2^X6^Y7, 0, }, // 235 + {S1^Y7^X9, S2^X8^Y8, Z2^X6^Y7, 0, }, // 236 + {S0^X7^Y8, S1^Y7^X8, Z2^X6^Y7, 0, }, // 237 + {X3^Y8, S0^X7^Y7, S1^X6^Y7, 0, }, // 238 +}; + +const UINT_8 DCC_64K_R_X_PATIDX[] = +{ + 0, // 1 pipes 1 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 1, // 1 pipes 2 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 2, // 1 pipes 4 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 3, // 1 pipes 8 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 4, // 1 pipes 16 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 5, // 2 pipes 1 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 6, // 2 pipes 2 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 2, // 2 pipes 4 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 3, // 2 pipes 8 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 4, // 2 pipes 16 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 7, // 4+ pipes 1 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 6, // 4+ pipes 2 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 2, // 4+ pipes 4 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 3, // 4+ pipes 8 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 4, // 4+ pipes 16 bpe ua @ SW_64K_R_X 1xaa @ Navi1x + 0, // 1 pipes 1 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 1, // 1 pipes 2 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 2, // 1 pipes 4 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 3, // 1 pipes 8 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 4, // 1 pipes 16 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 8, // 2 pipes 1 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 9, // 2 pipes 2 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 10, // 2 pipes 4 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 11, // 2 pipes 8 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 12, // 2 pipes 16 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 13, // 4 pipes 1 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 14, // 4 pipes 2 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 15, // 4 pipes 4 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 16, // 4 pipes 8 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 17, // 4 pipes 16 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 18, // 8 pipes 1 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 19, // 8 pipes 2 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 20, // 8 pipes 4 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 21, // 8 pipes 8 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 22, // 8 pipes 16 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 23, // 16 pipes 1 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 24, // 16 pipes 2 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 25, // 16 pipes 4 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 26, // 16 pipes 8 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 27, // 16 pipes 16 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 28, // 32 pipes 1 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 29, // 32 pipes 2 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 30, // 32 pipes 4 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 31, // 32 pipes 8 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 32, // 32 pipes 16 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 33, // 64 pipes 1 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 34, // 64 pipes 2 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 35, // 64 pipes 4 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 36, // 64 pipes 8 bpe pa @ SW_64K_R_X 1xaa @ Navi1x + 37, // 64 pipes 16 bpe pa @ SW_64K_R_X 1xaa @ Navi1x +}; + +const UINT_8 HTILE_PATIDX[] = +{ + 0, // 1xaa ua @ HTILE_64K @ Navi1x + 0, // 2xaa ua @ HTILE_64K @ Navi1x + 0, // 4xaa ua @ HTILE_64K @ Navi1x + 0, // 8xaa ua @ HTILE_64K @ Navi1x + 0, // 1 pipes 1xaa pa @ HTILE_64K @ Navi1x + 0, // 1 pipes 2xaa pa @ HTILE_64K @ Navi1x + 0, // 1 pipes 4xaa pa @ HTILE_64K @ Navi1x + 0, // 1 pipes 8xaa pa @ HTILE_64K @ Navi1x + 1, // 2 pipes 1xaa pa @ HTILE_64K @ Navi1x + 1, // 2 pipes 2xaa pa @ HTILE_64K @ Navi1x + 1, // 2 pipes 4xaa pa @ HTILE_64K @ Navi1x + 1, // 2 pipes 8xaa pa @ HTILE_64K @ Navi1x + 2, // 4 pipes 1xaa pa @ HTILE_64K @ Navi1x + 2, // 4 pipes 2xaa pa @ HTILE_64K @ Navi1x + 2, // 4 pipes 4xaa pa @ HTILE_64K @ Navi1x + 2, // 4 pipes 8xaa pa @ HTILE_64K @ Navi1x + 3, // 8 pipes 1xaa pa @ HTILE_64K @ Navi1x + 3, // 8 pipes 2xaa pa @ HTILE_64K @ Navi1x + 3, // 8 pipes 4xaa pa @ HTILE_64K @ Navi1x + 3, // 8 pipes 8xaa pa @ HTILE_64K @ Navi1x + 4, // 16 pipes 1xaa pa @ HTILE_64K @ Navi1x + 4, // 16 pipes 2xaa pa @ HTILE_64K @ Navi1x + 4, // 16 pipes 4xaa pa @ HTILE_64K @ Navi1x + 5, // 16 pipes 8xaa pa @ HTILE_64K @ Navi1x + 6, // 32 pipes 1xaa pa @ HTILE_64K @ Navi1x + 6, // 32 pipes 2xaa pa @ HTILE_64K @ Navi1x + 7, // 32 pipes 4xaa pa @ HTILE_64K @ Navi1x + 8, // 32 pipes 8xaa pa @ HTILE_64K @ Navi1x + 9, // 64 pipes 1xaa pa @ HTILE_64K @ Navi1x + 10, // 64 pipes 2xaa pa @ HTILE_64K @ Navi1x + 11, // 64 pipes 4xaa pa @ HTILE_64K @ Navi1x + 12, // 64 pipes 8xaa pa @ HTILE_64K @ Navi1x +}; + +const UINT_8 CMASK_64K_PATIDX[] = +{ + 0, // 1 bpe ua @ CMASK_64K @ Navi1x + 0, // 2 bpe ua @ CMASK_64K @ Navi1x + 0, // 4 bpe ua @ CMASK_64K @ Navi1x + 0, // 8 bpe ua @ CMASK_64K @ Navi1x + 0, // 1 pipes 1 bpe pa @ CMASK_64K @ Navi1x + 0, // 1 pipes 2 bpe pa @ CMASK_64K @ Navi1x + 0, // 1 pipes 4 bpe pa @ CMASK_64K @ Navi1x + 0, // 1 pipes 8 bpe pa @ CMASK_64K @ Navi1x + 1, // 2 pipes 1 bpe pa @ CMASK_64K @ Navi1x + 1, // 2 pipes 2 bpe pa @ CMASK_64K @ Navi1x + 1, // 2 pipes 4 bpe pa @ CMASK_64K @ Navi1x + 1, // 2 pipes 8 bpe pa @ CMASK_64K @ Navi1x + 2, // 4 pipes 1 bpe pa @ CMASK_64K @ Navi1x + 2, // 4 pipes 2 bpe pa @ CMASK_64K @ Navi1x + 2, // 4 pipes 4 bpe pa @ CMASK_64K @ Navi1x + 2, // 4 pipes 8 bpe pa @ CMASK_64K @ Navi1x + 3, // 8 pipes 1 bpe pa @ CMASK_64K @ Navi1x + 3, // 8 pipes 2 bpe pa @ CMASK_64K @ Navi1x + 3, // 8 pipes 4 bpe pa @ CMASK_64K @ Navi1x + 3, // 8 pipes 8 bpe pa @ CMASK_64K @ Navi1x + 4, // 16 pipes 1 bpe pa @ CMASK_64K @ Navi1x + 4, // 16 pipes 2 bpe pa @ CMASK_64K @ Navi1x + 4, // 16 pipes 4 bpe pa @ CMASK_64K @ Navi1x + 4, // 16 pipes 8 bpe pa @ CMASK_64K @ Navi1x + 5, // 32 pipes 1 bpe pa @ CMASK_64K @ Navi1x + 5, // 32 pipes 2 bpe pa @ CMASK_64K @ Navi1x + 5, // 32 pipes 4 bpe pa @ CMASK_64K @ Navi1x + 5, // 32 pipes 8 bpe pa @ CMASK_64K @ Navi1x + 6, // 64 pipes 1 bpe pa @ CMASK_64K @ Navi1x + 6, // 64 pipes 2 bpe pa @ CMASK_64K @ Navi1x + 6, // 64 pipes 4 bpe pa @ CMASK_64K @ Navi1x + 7, // 64 pipes 8 bpe pa @ CMASK_64K @ Navi1x +}; + +const UINT_8 DCC_64K_R_X_RBPLUS_PATIDX[] = +{ + 0, // 1 bpe ua @ SW_64K_R_X 1xaa @ RbPlus + 1, // 2 bpe ua @ SW_64K_R_X 1xaa @ RbPlus + 2, // 4 bpe ua @ SW_64K_R_X 1xaa @ RbPlus + 3, // 8 bpe ua @ SW_64K_R_X 1xaa @ RbPlus + 4, // 16 bpe ua @ SW_64K_R_X 1xaa @ RbPlus + 0, // 1 pipes (1 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 1, // 1 pipes (1 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 2, // 1 pipes (1 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 3, // 1 pipes (1 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 4, // 1 pipes (1 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 38, // 2 pipes (1-2 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 39, // 2 pipes (1-2 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 40, // 2 pipes (1-2 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 41, // 2 pipes (1-2 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 42, // 2 pipes (1-2 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 43, // 4 pipes (1-2 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 44, // 4 pipes (1-2 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 45, // 4 pipes (1-2 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 46, // 4 pipes (1-2 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 47, // 4 pipes (1-2 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 48, // 8 pipes (2 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 49, // 8 pipes (2 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 50, // 8 pipes (2 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 51, // 8 pipes (2 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 52, // 8 pipes (2 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 53, // 4 pipes (4 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 54, // 4 pipes (4 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 55, // 4 pipes (4 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 56, // 4 pipes (4 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 57, // 4 pipes (4 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 58, // 8 pipes (4 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 59, // 8 pipes (4 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 60, // 8 pipes (4 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 61, // 8 pipes (4 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 62, // 8 pipes (4 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 63, // 16 pipes (4 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 64, // 16 pipes (4 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 65, // 16 pipes (4 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 66, // 16 pipes (4 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 67, // 16 pipes (4 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 68, // 8 pipes (8 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 69, // 8 pipes (8 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 70, // 8 pipes (8 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 71, // 8 pipes (8 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 72, // 8 pipes (8 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 73, // 16 pipes (8 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 74, // 16 pipes (8 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 75, // 16 pipes (8 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 76, // 16 pipes (8 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 77, // 16 pipes (8 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 78, // 32 pipes (8 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 79, // 32 pipes (8 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 80, // 32 pipes (8 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 81, // 32 pipes (8 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 82, // 32 pipes (8 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 83, // 16 pipes (16 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 84, // 16 pipes (16 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 85, // 16 pipes (16 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 86, // 16 pipes (16 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 87, // 16 pipes (16 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 88, // 32 pipes (16 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 89, // 32 pipes (16 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 90, // 32 pipes (16 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 91, // 32 pipes (16 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 92, // 32 pipes (16 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 93, // 64 pipes (16 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 94, // 64 pipes (16 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 95, // 64 pipes (16 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 96, // 64 pipes (16 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 97, // 64 pipes (16 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 98, // 32 pipes (32 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 99, // 32 pipes (32 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 100, // 32 pipes (32 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 101, // 32 pipes (32 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 102, // 32 pipes (32 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 103, // 64 pipes (32 PKRs) 1 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 104, // 64 pipes (32 PKRs) 2 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 105, // 64 pipes (32 PKRs) 4 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 106, // 64 pipes (32 PKRs) 8 bpe pa @ SW_64K_R_X 1xaa @ RbPlus + 107, // 64 pipes (32 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus +}; + +const UINT_8 HTILE_RBPLUS_PATIDX[] = +{ + 0, // 1xaa ua @ HTILE_64K @ RbPlus + 0, // 2xaa ua @ HTILE_64K @ RbPlus + 0, // 4xaa ua @ HTILE_64K @ RbPlus + 0, // 8xaa ua @ HTILE_64K @ RbPlus + 0, // 1 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 0, // 1 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 0, // 1 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 0, // 1 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 13, // 2 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 13, // 2 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 13, // 2 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 13, // 2 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 14, // 4 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 14, // 4 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 14, // 4 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 14, // 4 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 15, // 8 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 15, // 8 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 15, // 8 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 15, // 8 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 13, // 2 pipes (4 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 13, // 2 pipes (4 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 13, // 2 pipes (4 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 13, // 2 pipes (4 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 16, // 4 pipes (4 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 16, // 4 pipes (4 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 16, // 4 pipes (4 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 16, // 4 pipes (4 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 17, // 8 pipes (4 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 17, // 8 pipes (4 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 17, // 8 pipes (4 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 17, // 8 pipes (4 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 18, // 16 pipes (4 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 18, // 16 pipes (4 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 18, // 16 pipes (4 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 18, // 16 pipes (4 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 19, // 4 pipes (8 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 19, // 4 pipes (8 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 19, // 4 pipes (8 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 19, // 4 pipes (8 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 20, // 8 pipes (8 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 20, // 8 pipes (8 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 20, // 8 pipes (8 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 20, // 8 pipes (8 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 21, // 16 pipes (8 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 21, // 16 pipes (8 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 21, // 16 pipes (8 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 21, // 16 pipes (8 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 22, // 32 pipes (8 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 22, // 32 pipes (8 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 22, // 32 pipes (8 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 22, // 32 pipes (8 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 23, // 8 pipes (16 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 23, // 8 pipes (16 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 23, // 8 pipes (16 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 23, // 8 pipes (16 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 24, // 16 pipes (16 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 24, // 16 pipes (16 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 24, // 16 pipes (16 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 24, // 16 pipes (16 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 25, // 32 pipes (16 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 25, // 32 pipes (16 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 25, // 32 pipes (16 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 25, // 32 pipes (16 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 26, // 64 pipes (16 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 26, // 64 pipes (16 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 26, // 64 pipes (16 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 26, // 64 pipes (16 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 27, // 16 pipes (32 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 27, // 16 pipes (32 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 27, // 16 pipes (32 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 27, // 16 pipes (32 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 28, // 32 pipes (32 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 28, // 32 pipes (32 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 28, // 32 pipes (32 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 28, // 32 pipes (32 PKRs) 8xaa pa @ HTILE_64K @ RbPlus + 29, // 64 pipes (32 PKRs) 1xaa pa @ HTILE_64K @ RbPlus + 29, // 64 pipes (32 PKRs) 2xaa pa @ HTILE_64K @ RbPlus + 29, // 64 pipes (32 PKRs) 4xaa pa @ HTILE_64K @ RbPlus + 29, // 64 pipes (32 PKRs) 8xaa pa @ HTILE_64K @ RbPlus +}; + +const UINT_8 CMASK_64K_RBPLUS_PATIDX[] = +{ + 0, // 1 bpe ua @ CMASK_64K @ RbPlus + 0, // 2 bpe ua @ CMASK_64K @ RbPlus + 0, // 4 bpe ua @ CMASK_64K @ RbPlus + 0, // 8 bpe ua @ CMASK_64K @ RbPlus + 0, // 1 pipes (1-2 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 0, // 1 pipes (1-2 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 0, // 1 pipes (1-2 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 0, // 1 pipes (1-2 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 8, // 2 pipes (1-2 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 8, // 2 pipes (1-2 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 8, // 2 pipes (1-2 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 8, // 2 pipes (1-2 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 9, // 4 pipes (1-2 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 9, // 4 pipes (1-2 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 9, // 4 pipes (1-2 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 9, // 4 pipes (1-2 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 10, // 8 pipes (1-2 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 10, // 8 pipes (1-2 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 10, // 8 pipes (1-2 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 10, // 8 pipes (1-2 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 8, // 2 pipes (4 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 8, // 2 pipes (4 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 8, // 2 pipes (4 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 8, // 2 pipes (4 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 11, // 4 pipes (4 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 11, // 4 pipes (4 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 11, // 4 pipes (4 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 11, // 4 pipes (4 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 12, // 8 pipes (4 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 12, // 8 pipes (4 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 12, // 8 pipes (4 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 12, // 8 pipes (4 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 13, // 16 pipes (4 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 13, // 16 pipes (4 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 13, // 16 pipes (4 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 13, // 16 pipes (4 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 14, // 4 pipes (8 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 14, // 4 pipes (8 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 14, // 4 pipes (8 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 14, // 4 pipes (8 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 15, // 8 pipes (8 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 15, // 8 pipes (8 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 15, // 8 pipes (8 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 16, // 8 pipes (8 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 15, // 16 pipes (8 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 15, // 16 pipes (8 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 15, // 16 pipes (8 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 17, // 16 pipes (8 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 18, // 32 pipes (8 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 18, // 32 pipes (8 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 18, // 32 pipes (8 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 19, // 32 pipes (8 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 20, // 8 pipes (16 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 20, // 8 pipes (16 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 20, // 8 pipes (16 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 21, // 8 pipes (16 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 22, // 16 pipes (16 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 22, // 16 pipes (16 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 22, // 16 pipes (16 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 23, // 16 pipes (16 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 22, // 32 pipes (16 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 22, // 32 pipes (16 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 22, // 32 pipes (16 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 24, // 32 pipes (16 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 25, // 64 pipes (16 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 25, // 64 pipes (16 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 25, // 64 pipes (16 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 32, // 64 pipes (16 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 27, // 16 pipes (32 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 27, // 16 pipes (32 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 27, // 16 pipes (32 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 28, // 16 pipes (32 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 29, // 32 pipes (32 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 29, // 32 pipes (32 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 29, // 32 pipes (32 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 33, // 32 pipes (32 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus + 29, // 64 pipes (32 PKRs) 1 bpe pa @ CMASK_64K @ RbPlus + 29, // 64 pipes (32 PKRs) 2 bpe pa @ CMASK_64K @ RbPlus + 29, // 64 pipes (32 PKRs) 4 bpe pa @ CMASK_64K @ RbPlus + 34, // 64 pipes (32 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus +}; + +const UINT_8 CMASK_VAR_RBPLUS_PATIDX[] = +{ + 0, // 1 bpe ua @ CMASK_VAR @ RbPlus + 0, // 2 bpe ua @ CMASK_VAR @ RbPlus + 0, // 4 bpe ua @ CMASK_VAR @ RbPlus + 0, // 8 bpe ua @ CMASK_VAR @ RbPlus + 0, // 1 pipes (1-2 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 0, // 1 pipes (1-2 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 0, // 1 pipes (1-2 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 0, // 1 pipes (1-2 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 8, // 2 pipes (1-2 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 8, // 2 pipes (1-2 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 8, // 2 pipes (1-2 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 8, // 2 pipes (1-2 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 9, // 4 pipes (1-2 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 9, // 4 pipes (1-2 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 9, // 4 pipes (1-2 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 9, // 4 pipes (1-2 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 10, // 8 pipes (1-2 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 10, // 8 pipes (1-2 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 10, // 8 pipes (1-2 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 10, // 8 pipes (1-2 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 8, // 2 pipes (4 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 8, // 2 pipes (4 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 8, // 2 pipes (4 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 8, // 2 pipes (4 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 11, // 4 pipes (4 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 11, // 4 pipes (4 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 11, // 4 pipes (4 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 11, // 4 pipes (4 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 12, // 8 pipes (4 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 12, // 8 pipes (4 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 12, // 8 pipes (4 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 12, // 8 pipes (4 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 13, // 16 pipes (4 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 13, // 16 pipes (4 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 13, // 16 pipes (4 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 13, // 16 pipes (4 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 14, // 4 pipes (8 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 14, // 4 pipes (8 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 14, // 4 pipes (8 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 14, // 4 pipes (8 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 15, // 8 pipes (8 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 15, // 8 pipes (8 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 15, // 8 pipes (8 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 16, // 8 pipes (8 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 15, // 16 pipes (8 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 15, // 16 pipes (8 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 15, // 16 pipes (8 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 17, // 16 pipes (8 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 18, // 32 pipes (8 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 18, // 32 pipes (8 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 18, // 32 pipes (8 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 19, // 32 pipes (8 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 20, // 8 pipes (16 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 20, // 8 pipes (16 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 20, // 8 pipes (16 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 21, // 8 pipes (16 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 22, // 16 pipes (16 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 22, // 16 pipes (16 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 22, // 16 pipes (16 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 23, // 16 pipes (16 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 22, // 32 pipes (16 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 22, // 32 pipes (16 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 22, // 32 pipes (16 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 24, // 32 pipes (16 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 25, // 64 pipes (16 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 25, // 64 pipes (16 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 25, // 64 pipes (16 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 26, // 64 pipes (16 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 27, // 16 pipes (32 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 27, // 16 pipes (32 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 27, // 16 pipes (32 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 28, // 16 pipes (32 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 29, // 32 pipes (32 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 29, // 32 pipes (32 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 29, // 32 pipes (32 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 30, // 32 pipes (32 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus + 29, // 64 pipes (32 PKRs) 1 bpe pa @ CMASK_VAR @ RbPlus + 29, // 64 pipes (32 PKRs) 2 bpe pa @ CMASK_VAR @ RbPlus + 29, // 64 pipes (32 PKRs) 4 bpe pa @ CMASK_VAR @ RbPlus + 31, // 64 pipes (32 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus +}; + +const UINT_64 DCC_64K_R_X_SW_PATTERN[][17] = +{ + {0, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, Y9, 0, 0, 0, 0, }, //0 + {0, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, 0, 0, 0, 0, }, //1 + {0, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, 0, 0, 0, 0, }, //2 + {0, Y2, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, 0, 0, 0, 0, }, //3 + {0, X2, Y2, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, 0, 0, 0, 0, }, //4 + {0, X3^Y3, X4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, Y9, 0, 0, 0, 0, }, //5 + {0, X3^Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, 0, 0, 0, 0, }, //6 + {0, X3^Y3, X4^Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, Y9, 0, 0, 0, 0, }, //7 + {0, X4, X5, Y5, X6, Y6, X7, Y7, X8, Z0^X3^Y3, Y8, X9, Y9, 0, 0, 0, 0, }, //8 + {0, Y4, X4, X5, Y5, X6, Y6, X7, Y7, Z0^X3^Y3, X8, Y8, X9, 0, 0, 0, 0, }, //9 + {0, X3, Y4, X4, X5, Y5, X6, Y6, X7, Z0^X3^Y3, Y7, X8, Y8, 0, 0, 0, 0, }, //10 + {0, Y2, X3, Y4, X4, X5, Y5, X6, Y6, Z0^X3^Y3, X7, Y7, X8, 0, 0, 0, 0, }, //11 + {0, X2, Y2, X3, Y4, X4, X5, Y5, X6, Z0^X3^Y3, Y6, X7, Y7, 0, 0, 0, 0, }, //12 + {0, X5, Y5, X6, Y6, X7, Y7, X8, Y8, Z1^X3^Y3, Z0^X4^Y4, X9, Y9, 0, 0, 0, 0, }, //13 + {0, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Z1^X3^Y3, Z0^X4^Y4, Y8, X9, 0, 0, 0, 0, }, //14 + {0, X3, Y4, X5, Y5, X6, Y6, X7, Y7, Z1^X3^Y3, Z0^X4^Y4, X8, Y8, 0, 0, 0, 0, }, //15 + {0, Y2, X3, Y4, X5, Y5, X6, Y6, X7, Z1^X3^Y3, Z0^X4^Y4, Y7, X8, 0, 0, 0, 0, }, //16 + {0, X2, Y2, X3, Y4, X5, Y5, X6, Y6, Z1^X3^Y3, Z0^X4^Y4, X7, Y7, 0, 0, 0, 0, }, //17 + {0, Y5, X6, Y6, X7, Y7, X8, Y8, X9, Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, Y9, 0, 0, 0, 0, }, //18 + {0, Y4, Y5, X6, Y6, X7, Y7, X8, Y8, Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, X9, 0, 0, 0, 0, }, //19 + {0, X3, Y4, Y5, X6, Y6, X7, Y7, X8, Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, Y8, 0, 0, 0, 0, }, //20 + {0, Y2, X3, Y4, Y5, X6, Y6, X7, Y7, Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, X8, 0, 0, 0, 0, }, //21 + {0, X2, Y2, X3, Y4, Y5, X6, Y6, X7, Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, Y7, 0, 0, 0, 0, }, //22 + {0, X6, Y6, X7, Y7, X8, Y8, X9, Y9, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //23 + {0, Y4, X6, Y6, X7, Y7, X8, Y8, X9, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //24 + {0, X3, Y4, X6, Y6, X7, Y7, X8, Y8, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //25 + {0, Y2, X3, Y4, X6, Y6, X7, Y7, X8, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //26 + {0, X2, Y2, X3, Y4, X6, Y6, X7, Y7, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //27 + {0, Y6, X7, Y7, X8, Y8, X9, Y9, X10, X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //28 + {0, Y4, Y6, X7, Y7, X8, Y8, X9, Y9, X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //29 + {0, X3, Y4, Y6, X7, Y7, X8, Y8, X9, X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //30 + {0, Y2, X3, Y4, Y6, X7, Y7, X8, Y8, X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //31 + {0, X2, X3, Y4, Y6, X7, Y7, Y2, X8, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, Y2^X6^Y6, 0, 0, 0, }, //32 + {0, X7, Y7, X8, Y8, X9, Y9, X10, Y10, X3^Y3^Z5, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //33 + {0, Y4, X7, Y7, X8, Y8, X9, Y9, X10, X3^Y3^Z5, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //34 + {0, X3, Y4, X7, Y7, X8, Y8, X9, Y9, X3^Y3^Z5, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //35 + {0, X3, Y4, X7, Y7, X8, Y8, Y2, X9, X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, Y2^Y6^X7, Z0^X6^Y7, 0, 0, }, //36 + {0, X3, Y4, X7, Y7, X8, Y8, X2, Y2, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, Y2^Y6^X7, X2^X6^Y7, 0, 0, }, //37 + {0, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Z0^X4^Y4, Y8, X9, Y9, 0, 0, 0, 0, }, //38 + {0, Y3, Y4, X5, Y5, X6, Y6, X7, Y7, Z0^X4^Y4, X8, Y8, X9, 0, 0, 0, 0, }, //39 + {0, X3, Y3, Y4, X5, Y5, X6, Y6, X7, Z0^X4^Y4, Y7, X8, Y8, 0, 0, 0, 0, }, //40 + {0, Y2, X3, Y3, Y4, X5, Y5, X6, Y6, Z0^X4^Y4, X7, Y7, X8, 0, 0, 0, 0, }, //41 + {0, X2, Y2, X3, Y3, Y4, X5, Y5, X6, Z0^X4^Y4, Y6, X7, Y7, 0, 0, 0, 0, }, //42 + {0, X5, Y5, X6, Y6, X7, Y7, X8, Y8, Y4^X5^Y5, Z0^X4^Y4, X9, Y9, 0, 0, 0, 0, }, //43 + {0, Y3, X5, Y5, X6, Y6, X7, Y7, X8, Y4^X5^Y5, Z0^X4^Y4, Y8, X9, 0, 0, 0, 0, }, //44 + {0, X3, Y3, X5, Y5, X6, Y6, X7, Y7, Y4^X5^Y5, Z0^X4^Y4, X8, Y8, 0, 0, 0, 0, }, //45 + {0, Y2, X3, Y3, X5, Y5, X6, Y6, X7, Y4^X5^Y5, Z0^X4^Y4, Y7, X8, 0, 0, 0, 0, }, //46 + {0, X2, Y2, X3, Y3, X5, Y5, X6, Y6, Y4^X5^Y5, Z0^X4^Y4, X7, Y7, 0, 0, 0, 0, }, //47 + {0, Y5, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, Y9, 0, 0, 0, 0, }, //48 + {0, Y3, Y5, X6, Y6, X7, Y7, X8, Y8, Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, X9, 0, 0, 0, 0, }, //49 + {0, X3, Y3, Y5, X6, Y6, X7, Y7, X8, Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, Y8, 0, 0, 0, 0, }, //50 + {0, Y2, X3, Y3, Y5, X6, Y6, X7, Y7, Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, X8, 0, 0, 0, 0, }, //51 + {0, X2, Y2, X3, Y3, Y5, X6, Y6, X7, Y4^X5^Y5, Z0^X4^Y4, X5^X6^Y6, Y7, 0, 0, 0, 0, }, //52 + {0, X5, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, Y9, 0, 0, 0, 0, }, //53 + {0, Y3, X5, X6, Y6, X7, Y7, X8, Y8, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, X9, 0, 0, 0, 0, }, //54 + {0, X3, Y3, X5, X6, Y6, X7, Y7, X8, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, Y8, 0, 0, 0, 0, }, //55 + {0, Y2, X3, Y3, X5, X6, Y6, X7, Y7, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, X8, 0, 0, 0, 0, }, //56 + {0, X2, Y2, X3, Y3, X5, X6, Y6, X7, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, Y7, 0, 0, 0, 0, }, //57 + {0, X5, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y9, 0, 0, 0, 0, }, //58 + {0, Y3, X5, X6, Y6, X7, Y7, X8, Y8, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X9, 0, 0, 0, 0, }, //59 + {0, X3, Y3, X5, X6, Y6, X7, Y7, X8, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y8, 0, 0, 0, 0, }, //60 + {0, Y2, X3, Y3, X5, X6, Y6, X7, Y7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X8, 0, 0, 0, 0, }, //61 + {0, X2, Y2, X3, Y3, X5, X6, Y6, X7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y7, 0, 0, 0, 0, }, //62 + {0, X6, Y6, X7, Y7, X8, Y8, X9, Y9, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^X7^Y7, 0, 0, 0, 0, }, //63 + {0, Y3, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^X7^Y7, 0, 0, 0, 0, }, //64 + {0, X3, Y3, X6, Y6, X7, Y7, X8, Y8, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^X7^Y7, 0, 0, 0, 0, }, //65 + {0, Y2, X3, Y3, X6, Y6, X7, Y7, X8, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^X7^Y7, 0, 0, 0, 0, }, //66 + {0, X2, Y2, X3, Y3, X6, Y6, X7, Y7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^X7^Y7, 0, 0, 0, 0, }, //67 + {0, X6, Y6, X7, Y7, X8, Y8, X9, Y9, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //68 + {0, Y3, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //69 + {0, X3, Y3, X6, Y6, X7, Y7, X8, Y8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //70 + {0, Y2, X3, Y3, X6, Y6, X7, Y7, X8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //71 + {0, X2, Y2, X3, Y3, X6, Y6, X7, Y7, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //72 + {0, X6, Y6, X7, Y7, X8, Y8, X9, Y9, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //73 + {0, Y3, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //74 + {0, X3, Y3, X6, Y6, X7, Y7, X8, Y8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //75 + {0, Y2, X3, Y3, X6, Y6, X7, Y7, X8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //76 + {0, X2, Y2, X3, Y3, X6, Y6, X7, Y7, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //77 + {0, Y6, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X6^X8^Y8, 0, 0, 0, }, //78 + {0, Y3, Y6, X7, Y7, X8, Y8, X9, Y9, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X6^X8^Y8, 0, 0, 0, }, //79 + {0, X3, Y3, Y6, X7, Y7, X8, Y8, X9, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X6^X8^Y8, 0, 0, 0, }, //80 + {0, Y2, X3, Y3, Y6, X7, Y7, X8, Y8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X6^X8^Y8, 0, 0, 0, }, //81 + {0, X2, Y2, Y3, X6, Y6, X7, Y7, X8, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X3^X8^Y8, 0, 0, 0, }, //82 + {0, X6, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, X6^Y6, 0, 0, 0, }, //83 + {0, Y3, X6, X7, Y7, X8, Y8, X9, Y9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, X6^Y6, 0, 0, 0, }, //84 + {0, X3, Y3, X6, X7, Y7, X8, Y8, X9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, X6^Y6, 0, 0, 0, }, //85 + {0, Y2, X3, Y3, X6, X7, Y7, X8, Y8, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, X6^Y6, 0, 0, 0, }, //86 + {0, X2, X3, Y3, X6, X7, Y7, Y2, X8, Y4^X8^Y8, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, X6^Y6, 0, 0, 0, }, //87 + {0, X6, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //88 + {0, Y3, X6, X7, Y7, X8, Y8, X9, Y9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //89 + {0, X3, Y3, X6, X7, Y7, X8, Y8, X9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //90 + {0, Y2, X3, Y3, X6, X7, Y7, X8, Y8, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //91 + {0, X2, X3, Y3, X6, X7, Y7, Y2, X8, Y4^X8^Y8, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, Y2^X6^Y6, 0, 0, 0, }, //92 + {0, X7, Y7, X8, Y8, X9, Y9, X10, Y10, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, X6^X9^Y9, 0, 0, }, //93 + {0, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, X6^X9^Y9, 0, 0, }, //94 + {0, X3, Y3, X7, Y7, X8, Y8, X9, Y9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, X6^X9^Y9, 0, 0, }, //95 + {0, Y2, Y3, X6, X7, Y7, X8, Y8, X9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, X3^X9^Y9, 0, 0, }, //96 + {0, X2, Y3, X6, X7, Y7, X8, Y2, Y8, Y4^X8^Y8, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, Y2^X6^Y6, X3^X9^Y9, 0, 0, }, //97 + {0, X7, Y7, X8, Y8, X9, Y9, X10, Y10, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, X6^Y7, 0, 0, }, //98 + {0, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, X6^Y7, 0, 0, }, //99 + {0, X3, Y3, X7, Y7, X8, Y8, X9, Y9, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, X6^Y7, 0, 0, }, //100 + {0, X3, Y3, X7, Y7, X8, Y8, Y2, X9, Y4^X9^Y9, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, Y2^Y6^X7, X6^Y7, 0, 0, }, //101 + {0, X3, Y3, X7, Y7, X8, Y8, X2, Y2, Y4^X9^Y9, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, Y2^Y6^X7, X6^Y7, 0, 0, }, //102 + {0, X7, Y7, X8, Y8, X9, Y9, X10, Y10, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //103 + {0, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //104 + {0, X3, Y3, X7, Y7, X8, Y8, X9, Y9, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //105 + {0, X3, Y3, X7, Y7, X8, Y8, Y2, X9, Y4^X9^Y9, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, Y2^Y6^X7, Z0^X6^Y7, 0, 0, }, //106 + {0, X3, Y3, X7, Y7, X8, Y8, X2, Y2, Y4^X9^Y9, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, Y2^Y6^X7, X2^X6^Y7, 0, 0, }, //107 +}; + +const UINT_64 HTILE_SW_PATTERN[][18] = +{ + {0, 0, 0, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, 0, 0, 0, 0, 0, }, //0 + {0, 0, 0, X3, Y4, X4, X5, Y5, X6, Z0^X3^Y3, Y6, X7, Y7, 0, 0, 0, 0, 0, }, //1 + {0, 0, 0, X3, Y4, X5, Y5, X6, Y6, Z1^X3^Y3, Z0^X4^Y4, X7, Y7, X8, 0, 0, 0, 0, }, //2 + {0, 0, 0, X3, Y4, Y5, X6, Y6, X7, Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, Y7, X8, Y8, 0, 0, 0, }, //3 + {0, 0, 0, X3, Y4, X6, Y6, X7, Y7, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X8, Y8, X9, 0, 0, }, //4 + {0, 0, 0, X3, Y4, X6, Y6, X7, Y7, Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X8, Y8, X9, 0, 0, }, //5 + {0, 0, 0, X3, Y4, Y6, X7, Y7, X8, X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, Y8, X9, Y9, 0, }, //6 + {0, 0, 0, X3, Y4, Y6, X7, Y7, X8, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X7, Z0^X5^Y7, X6^Y6, Y8, X9, Y9, 0, }, //7 + {0, 0, 0, X3, Y4, Y6, X7, Y7, X8, Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, Y8, X9, Y9, 0, }, //8 + {0, 0, 0, X3, Y4, X7, Y7, X8, Y8, X3^Y3^Z5, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, X9, Y9, X10, }, //9 + {0, 0, 0, X3, Y4, X7, Y7, X8, Y8, X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, Z0^Y6^X7, X6^Y7, X9, Y9, X10, }, //10 + {0, 0, 0, X3, Y4, X7, Y7, X8, Y8, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, Y6^X7, X6^Y7, X9, Y9, X10, }, //11 + {0, 0, 0, X3, Y4, X7, Y7, X8, Y8, Z2^X3^Y3, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X6^Y7, X9, Y9, X10, }, //12 + {0, 0, 0, X3, Y3, Y4, X5, Y5, X6, Z0^X4^Y4, Y6, X7, Y7, 0, 0, 0, 0, 0, }, //13 + {0, 0, 0, X3, Y3, X5, Y5, X6, Y6, Y4^X5^Y5, Z0^X4^Y4, X7, Y7, X8, 0, 0, 0, 0, }, //14 + {0, 0, 0, X3, Y3, Y5, X6, Y6, X7, Y4^X5^Y5, Z0^X4^Y4, X5^Y5, Y7, X8, Y8, 0, 0, 0, }, //15 + {0, 0, 0, X3, Y3, X5, X6, Y6, X7, Y4^X6^Y6, Z1^X4^Y4, Y7, X8, Y8, X5^Y5, 0, 0, 0, }, //16 + {0, 0, 0, X3, Y3, X5, X6, Y6, X7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, Y7, X8, Y8, 0, 0, 0, }, //17 + {0, 0, 0, X3, Y3, X6, Y6, X7, Y7, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, X8, Y8, X9, 0, 0, }, //18 + {0, 0, 0, X3, Y3, Y4, X5, X6, Y6, Z1^X4^Y4, Z0^X5^Y5, X7, Y7, X8, 0, 0, 0, 0, }, //19 + {0, 0, 0, X3, Y3, X6, Y6, X7, Y7, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X8, Y8, X9, X5^Y6, 0, 0, }, //20 + {0, 0, 0, X3, Y3, X6, Y6, X7, Y7, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X8, Y8, X9, 0, 0, }, //21 + {0, 0, 0, X3, Y3, Y6, X7, Y7, X8, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X6^Y6, Y8, X9, Y9, 0, }, //22 + {0, 0, 0, X3, Y3, Y4, X6, Y6, X7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, Y7, X8, Y8, 0, 0, 0, }, //23 + {0, 0, 0, X3, Y3, X6, X7, Y7, X8, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, Y8, X9, Y9, X6^Y6, 0, }, //24 + {0, 0, 0, X3, Y3, X6, X7, Y7, X8, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, Y8, X9, Y9, 0, }, //25 + {0, 0, 0, X3, Y3, X7, Y7, X8, Y8, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, X6^Y8, X9, Y9, X10, }, //26 + {0, 0, 0, X3, Y3, Y4, X6, X7, Y7, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, X8, Y8, X9, 0, 0, }, //27 + {0, 0, 0, X3, Y3, X7, Y7, X8, Y8, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X9, Y9, X10, X6^Y7, }, //28 + {0, 0, 0, X3, Y3, X7, Y7, X8, Y8, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X6^Y7, X9, Y9, X10, }, //29 +}; + +const UINT_64 CMASK_SW_PATTERN[][17] = +{ + {X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, 0, 0, 0, 0, }, //0 + {X3, Y4, X4, X5, Y5, X6, Y6, X7, Y7, Z0^X3^Y3, X8, Y8, X9, 0, 0, 0, 0, }, //1 + {X3, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Z1^X3^Y3, Z0^X4^Y4, Y8, X9, 0, 0, 0, 0, }, //2 + {X3, Y4, Y5, X6, Y6, X7, Y7, X8, Y8, Z2^X3^Y3, Z1^X4^Y4, Z0^X5^Y5, X9, 0, 0, 0, 0, }, //3 + {X3, Y4, X6, Y6, X7, Y7, X8, Y8, X9, X3^Y3^Z3, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //4 + {X3, Y4, Y6, X7, Y7, X8, Y8, X9, Y9, X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //5 + {X3, Y4, X7, Y7, X8, Y8, X9, Y9, X10, X3^Y3^Z5, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //6 + {X3, Y4, X7, Y7, X8, Y8, X9, Y9, X10, X3^Y3^Z4, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, Y6^X7, Z0^X6^Y7, 0, 0, }, //7 + {X3, Y3, Y4, X5, Y5, X6, Y6, X7, Y7, Z0^X4^Y4, X8, Y8, X9, 0, 0, 0, 0, }, //8 + {X3, Y3, X5, Y5, X6, Y6, X7, Y7, X8, Y4^X5^Y5, Z0^X4^Y4, Y8, X9, 0, 0, 0, 0, }, //9 + {X3, Y3, Y5, X6, Y6, X7, Y7, X8, Y8, Y4^X5^Y5, Z0^X4^Y4, X5^Y5, X9, 0, 0, 0, 0, }, //10 + {X3, Y3, X5, X6, Y6, X7, Y7, X8, Y8, Y4^X6^Y6, Z1^X4^Y4, X5^Y5, X9, 0, 0, 0, 0, }, //11 + {X3, Y3, X5, X6, Y6, X7, Y7, X8, Y8, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X9, 0, 0, 0, 0, }, //12 + {X3, Y3, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X6^Y6, Z1^X4^Y4, Z0^X5^Y5, X5^Y6, 0, 0, 0, 0, }, //13 + {X3, Y3, Y4, X5, X6, Y6, X7, Y7, X8, Z1^X4^Y4, Z0^X5^Y5, Y8, X9, 0, 0, 0, 0, }, //14 + {X3, Y3, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //15 + {X3, Y3, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, X5^Y6, 0, 0, 0, 0, }, //16 + {X3, Y3, X6, Y6, X7, Y7, X8, Y8, X9, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, 0, 0, 0, 0, }, //17 + {X3, Y3, Y6, X7, Y7, X8, Y8, X9, Y9, Y4^X7^Y7, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X6^Y6, 0, 0, 0, }, //18 + {X3, Y3, Y6, X7, Y7, X8, Y8, X9, Y9, Y4^X7^Y7, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X6^Y6, 0, 0, 0, }, //19 + {X3, Y3, Y4, X6, Y6, X7, Y7, X8, Y8, Z1^X4^Y4, Z0^Y5^X6, X5^Y6, X9, 0, 0, 0, 0, }, //20 + {X3, Y3, Y4, X6, Y6, X7, Y7, X8, Y8, Z2^X4^Y4, Z1^Y5^X6, Z0^X5^Y6, X9, 0, 0, 0, 0, }, //21 + {X3, Y3, X6, X7, Y7, X8, Y8, X9, Y9, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, 0, 0, 0, }, //22 + {X3, Y3, X6, X7, Y7, X8, Y8, X9, Y9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, X6^Y6, 0, 0, 0, }, //23 + {X3, Y3, X6, X7, Y7, X8, Y8, X9, Y9, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, }, //24 + {X3, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X8^Y8, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, X6^Y8, 0, 0, }, //25 + {X3, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, X6^Y8, 0, 0, }, //26 + {X3, Y3, Y4, X6, X7, Y7, X8, Y8, X9, Z1^X4^Y4, Z0^Y5^X7, X5^Y7, X6^Y6, 0, 0, 0, 0, }, //27 + {X3, Y3, Y4, X6, X7, Y7, X8, Y8, X9, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, 0, 0, 0, 0, }, //28 + {X3, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X6^Y7, 0, 0, }, //29 + {X3, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, X6^Y7, 0, 0, }, //30 + {X3, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X9^Y9, X4^Y4^Z4, Z3^Y5^X8, Z2^X5^Y8, Z1^Y6^X7, Z0^X6^Y7, 0, 0, }, //31 + {X3, Y3, X6, X7, Y7, X8, X9, Y9, X10, Y4^X8^Y8, Z3^X4^Y4, Z2^Y5^X7, Z1^X5^Y7, Z0^X6^Y6, X3^Y8, 0, 0, }, //32 + {X3, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X9^Y9, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, Y6^X7, X6^Y7, 0, 0, }, //33 + {X3, Y3, X7, Y7, X8, Y8, X9, Y9, X10, Y4^X9^Y9, Z3^X4^Y4, Z2^Y5^X8, Z1^X5^Y8, Y6^X7, Z0^X6^Y7, 0, 0, }, //34 +}; + +} // V2 +} // Addr + +#endif diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.cpp new file mode 100644 index 0000000000..eea3deefff --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.cpp @@ -0,0 +1,4327 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +************************************************************************************************************************ +* @file gfx10addrlib.cpp +* @brief Contain the implementation for the Gfx10Lib class. +************************************************************************************************************************ +*/ + +#include "gfx10addrlib.h" +#include "gfx10_gb_reg.h" + +#include "amdgpu_asic_addr.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +namespace Addr +{ +/** +************************************************************************************************************************ +* Gfx10HwlInit +* +* @brief +* Creates an Gfx10Lib object. +* +* @return +* Returns an Gfx10Lib object pointer. +************************************************************************************************************************ +*/ +Addr::Lib* Gfx10HwlInit(const Client* pClient) +{ + return V2::Gfx10Lib::CreateObj(pClient); +} + +namespace V2 +{ + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Static Const Member +//////////////////////////////////////////////////////////////////////////////////////////////////// + +const SwizzleModeFlags Gfx10Lib::SwizzleModeTable[ADDR_SW_MAX_TYPE] = +{//Linear 256B 4KB 64KB Var Z Std Disp Rot XOR T RtOpt Reserved + {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR + {0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_256B_S + {0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_256B_D + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_S + {0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_D + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_S + {0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_D + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_S_T + {0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_D_T + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_S_X + {0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_D_X + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + + {0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_Z_X + {0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_S_X + {0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_D_X + {0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0}, // ADDR_SW_64KB_R_X + + {0, 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_VAR_Z_X + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0}, // ADDR_SW_VAR_R_X + {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR_GENERAL +}; + +const Dim3d Gfx10Lib::Block256_3d[] = {{8, 4, 8}, {4, 4, 8}, {4, 4, 4}, {4, 2, 4}, {2, 2, 4}}; + +const Dim3d Gfx10Lib::Block64K_Log2_3d[] = {{6, 5, 5}, {5, 5, 5}, {5, 5, 4}, {5, 4, 4}, {4, 4, 4}}; +const Dim3d Gfx10Lib::Block4K_Log2_3d[] = {{4, 4, 4}, {3, 4, 4}, {3, 4, 3}, {3, 3, 3}, {2, 3, 3}}; + +/** +************************************************************************************************************************ +* Gfx10Lib::Gfx10Lib +* +* @brief +* Constructor +* +************************************************************************************************************************ +*/ +Gfx10Lib::Gfx10Lib(const Client* pClient) + : + Lib(pClient), + m_colorBaseIndex(0), + m_xmaskBaseIndex(0), + m_dccBaseIndex(0) +{ + m_class = AI_ADDRLIB; + memset(&m_settings, 0, sizeof(m_settings)); + memcpy(m_swizzleModeTable, SwizzleModeTable, sizeof(SwizzleModeTable)); +} + +/** +************************************************************************************************************************ +* Gfx10Lib::~Gfx10Lib +* +* @brief +* Destructor +************************************************************************************************************************ +*/ +Gfx10Lib::~Gfx10Lib() +{ +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeHtileInfo +* +* @brief +* Interface function stub of AddrComputeHtilenfo +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileInfo( + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + if (((pIn->swizzleMode != ADDR_SW_64KB_Z_X) && + ((pIn->swizzleMode != ADDR_SW_VAR_Z_X) || (m_blockVarSizeLog2 == 0))) || + (pIn->hTileFlags.pipeAligned != TRUE)) + { + ret = ADDR_INVALIDPARAMS; + } + else + { + Dim3d metaBlk = {0}; + const UINT_32 metaBlkSize = GetMetaBlkSize(Gfx10DataDepthStencil, + ADDR_RSRC_TEX_2D, + pIn->swizzleMode, + 0, + 0, + TRUE, + &metaBlk); + + pOut->pitch = PowTwoAlign(pIn->unalignedWidth, metaBlk.w); + pOut->height = PowTwoAlign(pIn->unalignedHeight, metaBlk.h); + pOut->baseAlign = Max(metaBlkSize, 1u << (m_pipesLog2 + 11u)); + pOut->metaBlkWidth = metaBlk.w; + pOut->metaBlkHeight = metaBlk.h; + + if (pIn->numMipLevels > 1) + { + ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); + + UINT_32 offset = (pIn->firstMipIdInTail == pIn->numMipLevels) ? 0 : metaBlkSize; + + for (INT_32 i = static_cast(pIn->firstMipIdInTail) - 1; i >=0; i--) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(pIn->unalignedWidth, pIn->unalignedHeight, 1, i, &mipWidth, &mipHeight); + + mipWidth = PowTwoAlign(mipWidth, metaBlk.w); + mipHeight = PowTwoAlign(mipHeight, metaBlk.h); + + const UINT_32 pitchInM = mipWidth / metaBlk.w; + const UINT_32 heightInM = mipHeight / metaBlk.h; + const UINT_32 mipSliceSize = pitchInM * heightInM * metaBlkSize; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].inMiptail = FALSE; + pOut->pMipInfo[i].offset = offset; + pOut->pMipInfo[i].sliceSize = mipSliceSize; + } + + offset += mipSliceSize; + } + + pOut->sliceSize = offset; + pOut->metaBlkNumPerSlice = offset / metaBlkSize; + pOut->htileBytes = pOut->sliceSize * pIn->numSlices; + + if (pOut->pMipInfo != NULL) + { + for (UINT_32 i = pIn->firstMipIdInTail; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].inMiptail = TRUE; + pOut->pMipInfo[i].offset = 0; + pOut->pMipInfo[i].sliceSize = 0; + } + + if (pIn->firstMipIdInTail != pIn->numMipLevels) + { + pOut->pMipInfo[pIn->firstMipIdInTail].sliceSize = metaBlkSize; + } + } + } + else + { + const UINT_32 pitchInM = pOut->pitch / metaBlk.w; + const UINT_32 heightInM = pOut->height / metaBlk.h; + + pOut->metaBlkNumPerSlice = pitchInM * heightInM; + pOut->sliceSize = pOut->metaBlkNumPerSlice * metaBlkSize; + pOut->htileBytes = pOut->sliceSize * pIn->numSlices; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].inMiptail = FALSE; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].sliceSize = pOut->sliceSize; + } + } + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeCmaskInfo +* +* @brief +* Interface function stub of AddrComputeCmaskInfo +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeCmaskInfo( + const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + if ((pIn->resourceType != ADDR_RSRC_TEX_2D) || + (pIn->cMaskFlags.pipeAligned != TRUE) || + ((pIn->swizzleMode != ADDR_SW_64KB_Z_X) && + ((pIn->swizzleMode != ADDR_SW_VAR_Z_X) || (m_blockVarSizeLog2 == 0)))) + { + ret = ADDR_INVALIDPARAMS; + } + else + { + Dim3d metaBlk = {0}; + const UINT_32 metaBlkSize = GetMetaBlkSize(Gfx10DataFmask, + ADDR_RSRC_TEX_2D, + pIn->swizzleMode, + 0, + 0, + TRUE, + &metaBlk); + + pOut->pitch = PowTwoAlign(pIn->unalignedWidth, metaBlk.w); + pOut->height = PowTwoAlign(pIn->unalignedHeight, metaBlk.h); + pOut->baseAlign = metaBlkSize; + pOut->metaBlkWidth = metaBlk.w; + pOut->metaBlkHeight = metaBlk.h; + + if (pIn->numMipLevels > 1) + { + ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); + + UINT_32 metaBlkPerSlice = (pIn->firstMipIdInTail == pIn->numMipLevels) ? 0 : 1; + + for (INT_32 i = static_cast(pIn->firstMipIdInTail) - 1; i >= 0; i--) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(pIn->unalignedWidth, pIn->unalignedHeight, 1, i, &mipWidth, &mipHeight); + + mipWidth = PowTwoAlign(mipWidth, metaBlk.w); + mipHeight = PowTwoAlign(mipHeight, metaBlk.h); + + const UINT_32 pitchInM = mipWidth / metaBlk.w; + const UINT_32 heightInM = mipHeight / metaBlk.h; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].inMiptail = FALSE; + pOut->pMipInfo[i].offset = metaBlkPerSlice * metaBlkSize; + pOut->pMipInfo[i].sliceSize = pitchInM * heightInM * metaBlkSize; + } + + metaBlkPerSlice += pitchInM * heightInM; + } + + pOut->metaBlkNumPerSlice = metaBlkPerSlice; + + if (pOut->pMipInfo != NULL) + { + for (UINT_32 i = pIn->firstMipIdInTail; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].inMiptail = TRUE; + pOut->pMipInfo[i].offset = 0; + pOut->pMipInfo[i].sliceSize = 0; + } + + if (pIn->firstMipIdInTail != pIn->numMipLevels) + { + pOut->pMipInfo[pIn->firstMipIdInTail].sliceSize = metaBlkSize; + } + } + } + else + { + const UINT_32 pitchInM = pOut->pitch / metaBlk.w; + const UINT_32 heightInM = pOut->height / metaBlk.h; + + pOut->metaBlkNumPerSlice = pitchInM * heightInM; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].inMiptail = FALSE; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].sliceSize = pOut->metaBlkNumPerSlice * metaBlkSize; + } + } + + pOut->sliceSize = pOut->metaBlkNumPerSlice * metaBlkSize; + pOut->cmaskBytes = pOut->sliceSize * pIn->numSlices; + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeDccInfo +* +* @brief +* Interface function to compute DCC key info +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeDccInfo( + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + if (pIn->swizzleMode != ADDR_SW_64KB_Z_X && pIn->swizzleMode != ADDR_SW_64KB_R_X) + { + // Hardware does not support DCC for this swizzle mode. + ret = ADDR_INVALIDPARAMS; + } + else if (m_settings.dccUnsup3DSwDis && IsTex3d(pIn->resourceType) && IsDisplaySwizzle(pIn->swizzleMode)) + { + // DCC is not supported on 3D Display surfaces for GFX10.0 and GFX10.1 + ret = ADDR_INVALIDPARAMS; + } + else + { + // only SW_*_R_X surfaces may be DCC compressed when attached to the CB + ADDR_ASSERT(IsRtOptSwizzle(pIn->swizzleMode)); + + Dim3d metaBlk = {0}; + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 numFragLog2 = Log2(pIn->numFrags); + const UINT_32 metaBlkSize = GetMetaBlkSize(Gfx10DataColor, + pIn->resourceType, + pIn->swizzleMode, + elemLog2, + numFragLog2, + pIn->dccKeyFlags.pipeAligned, + &metaBlk); + const BOOL_32 isThick = IsThick(pIn->resourceType, pIn->swizzleMode); + + pOut->compressBlkWidth = isThick ? Block256_3d[elemLog2].w : Block256_2d[elemLog2].w; + pOut->compressBlkHeight = isThick ? Block256_3d[elemLog2].h : Block256_2d[elemLog2].h; + pOut->compressBlkDepth = isThick ? Block256_3d[elemLog2].d : 1; + + pOut->dccRamBaseAlign = metaBlkSize; + pOut->metaBlkWidth = metaBlk.w; + pOut->metaBlkHeight = metaBlk.h; + pOut->metaBlkDepth = metaBlk.d; + + pOut->pitch = PowTwoAlign(pIn->unalignedWidth, metaBlk.w); + pOut->height = PowTwoAlign(pIn->unalignedHeight, metaBlk.h); + pOut->depth = PowTwoAlign(pIn->numSlices, metaBlk.d); + + if (pIn->numMipLevels > 1) + { + ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); + + UINT_32 offset = (pIn->firstMipIdInTail == pIn->numMipLevels) ? 0 : metaBlkSize; + + for (INT_32 i = static_cast(pIn->firstMipIdInTail) - 1; i >= 0; i--) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(pIn->unalignedWidth, pIn->unalignedHeight, 1, i, &mipWidth, &mipHeight); + + mipWidth = PowTwoAlign(mipWidth, metaBlk.w); + mipHeight = PowTwoAlign(mipHeight, metaBlk.h); + + const UINT_32 pitchInM = mipWidth / metaBlk.w; + const UINT_32 heightInM = mipHeight / metaBlk.h; + const UINT_32 mipSliceSize = pitchInM * heightInM * metaBlkSize; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].inMiptail = FALSE; + pOut->pMipInfo[i].offset = offset; + pOut->pMipInfo[i].sliceSize = mipSliceSize; + } + + offset += mipSliceSize; + } + + pOut->dccRamSliceSize = offset; + pOut->metaBlkNumPerSlice = offset / metaBlkSize; + pOut->dccRamSize = pOut->dccRamSliceSize * (pOut->depth / metaBlk.d); + + if (pOut->pMipInfo != NULL) + { + for (UINT_32 i = pIn->firstMipIdInTail; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].inMiptail = TRUE; + pOut->pMipInfo[i].offset = 0; + pOut->pMipInfo[i].sliceSize = 0; + } + + if (pIn->firstMipIdInTail != pIn->numMipLevels) + { + pOut->pMipInfo[pIn->firstMipIdInTail].sliceSize = metaBlkSize; + } + } + } + else + { + const UINT_32 pitchInM = pOut->pitch / metaBlk.w; + const UINT_32 heightInM = pOut->height / metaBlk.h; + + pOut->metaBlkNumPerSlice = pitchInM * heightInM; + pOut->dccRamSliceSize = pOut->metaBlkNumPerSlice * metaBlkSize; + pOut->dccRamSize = pOut->dccRamSliceSize * (pOut->depth / metaBlk.d); + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].inMiptail = FALSE; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].sliceSize = pOut->dccRamSliceSize; + } + } + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeCmaskAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeCmaskAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeCmaskAddrFromCoord( + const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + // Only support pipe aligned CMask + ADDR_ASSERT(pIn->cMaskFlags.pipeAligned == TRUE); + + ADDR2_COMPUTE_CMASK_INFO_INPUT input = {}; + input.size = sizeof(input); + input.cMaskFlags = pIn->cMaskFlags; + input.colorFlags = pIn->colorFlags; + input.unalignedWidth = Max(pIn->unalignedWidth, 1u); + input.unalignedHeight = Max(pIn->unalignedHeight, 1u); + input.numSlices = Max(pIn->numSlices, 1u); + input.swizzleMode = pIn->swizzleMode; + input.resourceType = pIn->resourceType; + + ADDR2_COMPUTE_CMASK_INFO_OUTPUT output = {}; + output.size = sizeof(output); + + ADDR_E_RETURNCODE returnCode = ComputeCmaskInfo(&input, &output); + + if (returnCode == ADDR_OK) + { + const UINT_32 fmaskBpp = GetFmaskBpp(pIn->numSamples, pIn->numFrags); + const UINT_32 fmaskElemLog2 = Log2(fmaskBpp >> 3); + const UINT_32 pipeMask = (1 << m_pipesLog2) - 1; + const UINT_32 index = m_xmaskBaseIndex + fmaskElemLog2; + const UINT_8* patIdxTable = (pIn->swizzleMode == ADDR_SW_VAR_Z_X) ? CMASK_VAR_RBPLUS_PATIDX : + (m_settings.supportRbPlus ? CMASK_64K_RBPLUS_PATIDX : CMASK_64K_PATIDX); + + const UINT_32 blkSizeLog2 = Log2(output.metaBlkWidth) + Log2(output.metaBlkHeight) - 7; + const UINT_32 blkMask = (1 << blkSizeLog2) - 1; + const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(CMASK_SW_PATTERN[patIdxTable[index]], + blkSizeLog2 + 1, // +1 for nibble offset + pIn->x, + pIn->y, + pIn->slice, + 0); + const UINT_32 xb = pIn->x / output.metaBlkWidth; + const UINT_32 yb = pIn->y / output.metaBlkHeight; + const UINT_32 pb = output.pitch / output.metaBlkWidth; + const UINT_32 blkIndex = (yb * pb) + xb; + const UINT_32 pipeXor = ((pIn->pipeXor & pipeMask) << m_pipeInterleaveLog2) & blkMask; + + pOut->addr = (output.sliceSize * pIn->slice) + + (blkIndex * (1 << blkSizeLog2)) + + ((blkOffset >> 1) ^ pipeXor); + pOut->bitPosition = (blkOffset & 1) << 2; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeHtileAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeHtileAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileAddrFromCoord( + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numMipLevels > 1) + { + returnCode = ADDR_NOTIMPLEMENTED; + } + else + { + ADDR2_COMPUTE_HTILE_INFO_INPUT input = {0}; + input.size = sizeof(input); + input.hTileFlags = pIn->hTileFlags; + input.depthFlags = pIn->depthflags; + input.swizzleMode = pIn->swizzleMode; + input.unalignedWidth = Max(pIn->unalignedWidth, 1u); + input.unalignedHeight = Max(pIn->unalignedHeight, 1u); + input.numSlices = Max(pIn->numSlices, 1u); + input.numMipLevels = 1; + + ADDR2_COMPUTE_HTILE_INFO_OUTPUT output = {0}; + output.size = sizeof(output); + + returnCode = ComputeHtileInfo(&input, &output); + + if (returnCode == ADDR_OK) + { + const UINT_32 numSampleLog2 = Log2(pIn->numSamples); + const UINT_32 pipeMask = (1 << m_pipesLog2) - 1; + const UINT_32 index = m_xmaskBaseIndex + numSampleLog2; + const UINT_8* patIdxTable = m_settings.supportRbPlus ? HTILE_RBPLUS_PATIDX : HTILE_PATIDX; + + const UINT_32 blkSizeLog2 = Log2(output.metaBlkWidth) + Log2(output.metaBlkHeight) - 4; + const UINT_32 blkMask = (1 << blkSizeLog2) - 1; + const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(HTILE_SW_PATTERN[patIdxTable[index]], + blkSizeLog2 + 1, // +1 for nibble offset + pIn->x, + pIn->y, + pIn->slice, + 0); + const UINT_32 xb = pIn->x / output.metaBlkWidth; + const UINT_32 yb = pIn->y / output.metaBlkHeight; + const UINT_32 pb = output.pitch / output.metaBlkWidth; + const UINT_32 blkIndex = (yb * pb) + xb; + const UINT_32 pipeXor = ((pIn->pipeXor & pipeMask) << m_pipeInterleaveLog2) & blkMask; + + pOut->addr = (static_cast(output.sliceSize) * pIn->slice) + + (blkIndex * (1 << blkSizeLog2)) + + ((blkOffset >> 1) ^ pipeXor); + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeHtileCoordFromAddr +* +* @brief +* Interface function stub of AddrComputeHtileCoordFromAddr +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeHtileCoordFromAddr( + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_NOT_IMPLEMENTED(); + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeDccAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeDccAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if ((pIn->resourceType != ADDR_RSRC_TEX_2D) || + (pIn->swizzleMode != ADDR_SW_64KB_R_X) || + (pIn->dccKeyFlags.linear == TRUE) || + (pIn->numFrags > 1) || + (pIn->numMipLevels > 1) || + (pIn->mipId > 0)) + { + returnCode = ADDR_NOTSUPPORTED; + } + else + { + ADDR2_COMPUTE_DCCINFO_INPUT input = {0}; + input.size = sizeof(input); + input.dccKeyFlags = pIn->dccKeyFlags; + input.colorFlags = pIn->colorFlags; + input.swizzleMode = pIn->swizzleMode; + input.resourceType = pIn->resourceType; + input.bpp = pIn->bpp; + input.unalignedWidth = Max(pIn->unalignedWidth, 1u); + input.unalignedHeight = Max(pIn->unalignedHeight, 1u); + input.numSlices = Max(pIn->numSlices, 1u); + input.numFrags = Max(pIn->numFrags, 1u); + input.numMipLevels = Max(pIn->numMipLevels, 1u); + + ADDR2_COMPUTE_DCCINFO_OUTPUT output = {0}; + output.size = sizeof(output); + + returnCode = ComputeDccInfo(&input, &output); + + if (returnCode == ADDR_OK) + { + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 numPipeLog2 = m_pipesLog2; + const UINT_32 pipeMask = (1 << numPipeLog2) - 1; + UINT_32 index = m_dccBaseIndex + elemLog2; + const UINT_8* patIdxTable; + + if (m_settings.supportRbPlus) + { + patIdxTable = DCC_64K_R_X_RBPLUS_PATIDX; + + if (pIn->dccKeyFlags.pipeAligned) + { + index += MaxNumOfBpp; + + if (m_numPkrLog2 < 2) + { + index += m_pipesLog2 * MaxNumOfBpp; + } + else + { + // 4 groups for "m_numPkrLog2 < 2" case + index += 4 * MaxNumOfBpp; + + const UINT_32 dccPipePerPkr = 3; + + index += (m_numPkrLog2 - 2) * dccPipePerPkr * MaxNumOfBpp + + (m_pipesLog2 - m_numPkrLog2) * MaxNumOfBpp; + } + } + } + else + { + patIdxTable = DCC_64K_R_X_PATIDX; + + if (pIn->dccKeyFlags.pipeAligned) + { + index += (numPipeLog2 + UnalignedDccType) * MaxNumOfBpp; + } + else + { + index += Min(numPipeLog2, UnalignedDccType - 1) * MaxNumOfBpp; + } + } + + const UINT_32 blkSizeLog2 = Log2(output.metaBlkWidth) + Log2(output.metaBlkHeight) + elemLog2 - 8; + const UINT_32 blkMask = (1 << blkSizeLog2) - 1; + const UINT_32 blkOffset = ComputeOffsetFromSwizzlePattern(DCC_64K_R_X_SW_PATTERN[patIdxTable[index]], + blkSizeLog2 + 1, // +1 for nibble offset + pIn->x, + pIn->y, + pIn->slice, + 0); + const UINT_32 xb = pIn->x / output.metaBlkWidth; + const UINT_32 yb = pIn->y / output.metaBlkHeight; + const UINT_32 pb = output.pitch / output.metaBlkWidth; + const UINT_32 blkIndex = (yb * pb) + xb; + const UINT_32 pipeXor = ((pIn->pipeXor & pipeMask) << m_pipeInterleaveLog2) & blkMask; + + pOut->addr = (static_cast(output.dccRamSliceSize) * pIn->slice) + + (blkIndex * (1 << blkSizeLog2)) + + ((blkOffset >> 1) ^ pipeXor); + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlInitGlobalParams +* +* @brief +* Initializes global parameters +* +* @return +* TRUE if all settings are valid +* +************************************************************************************************************************ +*/ +BOOL_32 Gfx10Lib::HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input +{ + BOOL_32 valid = TRUE; + GB_ADDR_CONFIG gbAddrConfig; + + gbAddrConfig.u32All = pCreateIn->regValue.gbAddrConfig; + + // These values are copied from CModel code + switch (gbAddrConfig.bits.NUM_PIPES) + { + case ADDR_CONFIG_1_PIPE: + m_pipes = 1; + m_pipesLog2 = 0; + break; + case ADDR_CONFIG_2_PIPE: + m_pipes = 2; + m_pipesLog2 = 1; + break; + case ADDR_CONFIG_4_PIPE: + m_pipes = 4; + m_pipesLog2 = 2; + break; + case ADDR_CONFIG_8_PIPE: + m_pipes = 8; + m_pipesLog2 = 3; + break; + case ADDR_CONFIG_16_PIPE: + m_pipes = 16; + m_pipesLog2 = 4; + break; + case ADDR_CONFIG_32_PIPE: + m_pipes = 32; + m_pipesLog2 = 5; + break; + case ADDR_CONFIG_64_PIPE: + m_pipes = 64; + m_pipesLog2 = 6; + break; + default: + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + break; + } + + switch (gbAddrConfig.bits.PIPE_INTERLEAVE_SIZE) + { + case ADDR_CONFIG_PIPE_INTERLEAVE_256B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_256B; + m_pipeInterleaveLog2 = 8; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_512B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_512B; + m_pipeInterleaveLog2 = 9; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_1KB: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_1KB; + m_pipeInterleaveLog2 = 10; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_2KB: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_2KB; + m_pipeInterleaveLog2 = 11; + break; + default: + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + break; + } + + // Addr::V2::Lib::ComputePipeBankXor()/ComputeSlicePipeBankXor() requires pipe interleave to be exactly 8 bits, and + // any larger value requires a post-process (left shift) on the output pipeBankXor bits. + // And more importantly, SW AddrLib doesn't support sw equation/pattern for PI != 256 case. + ADDR_ASSERT(m_pipeInterleaveBytes == ADDR_PIPEINTERLEAVE_256B); + + switch (gbAddrConfig.bits.MAX_COMPRESSED_FRAGS) + { + case ADDR_CONFIG_1_MAX_COMPRESSED_FRAGMENTS: + m_maxCompFrag = 1; + m_maxCompFragLog2 = 0; + break; + case ADDR_CONFIG_2_MAX_COMPRESSED_FRAGMENTS: + m_maxCompFrag = 2; + m_maxCompFragLog2 = 1; + break; + case ADDR_CONFIG_4_MAX_COMPRESSED_FRAGMENTS: + m_maxCompFrag = 4; + m_maxCompFragLog2 = 2; + break; + case ADDR_CONFIG_8_MAX_COMPRESSED_FRAGMENTS: + m_maxCompFrag = 8; + m_maxCompFragLog2 = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + break; + } + + { + // Skip unaligned case + m_xmaskBaseIndex += MaxNumOfAA; + + m_xmaskBaseIndex += m_pipesLog2 * MaxNumOfAA; + m_colorBaseIndex += m_pipesLog2 * MaxNumOfBpp; + + if (m_settings.supportRbPlus) + { + m_numPkrLog2 = gbAddrConfig.bits.NUM_PKRS; + m_numSaLog2 = (m_numPkrLog2 > 0) ? (m_numPkrLog2 - 1) : 0; + + ADDR_ASSERT((m_numPkrLog2 <= m_pipesLog2) && ((m_pipesLog2 - m_numPkrLog2) <= 2)); + + ADDR_C_ASSERT(sizeof(HTILE_RBPLUS_PATIDX) / sizeof(HTILE_RBPLUS_PATIDX[0]) == + sizeof(CMASK_64K_RBPLUS_PATIDX) / sizeof(CMASK_64K_RBPLUS_PATIDX[0])); + + if (m_numPkrLog2 >= 2) + { + m_colorBaseIndex += (2 * m_numPkrLog2 - 2) * MaxNumOfBpp; + m_xmaskBaseIndex += (m_numPkrLog2 - 1) * 3 * MaxNumOfAA; + } + } + else + { + const UINT_32 numPipeType = static_cast(ADDR_CONFIG_64_PIPE) - + static_cast(ADDR_CONFIG_1_PIPE) + + 1; + + ADDR_C_ASSERT(sizeof(HTILE_PATIDX) / sizeof(HTILE_PATIDX[0]) == (numPipeType + 1) * MaxNumOfAA); + + ADDR_C_ASSERT(sizeof(HTILE_PATIDX) / sizeof(HTILE_PATIDX[0]) == + sizeof(CMASK_64K_PATIDX) / sizeof(CMASK_64K_PATIDX[0])); + } + } + + if (m_settings.supportRbPlus) + { + // VAR block size = 16K * num_pipes. For 4 pipe configuration, SW_VAR_* mode swizzle patterns are same as the + // corresponding SW_64KB_* mode + m_blockVarSizeLog2 = m_pipesLog2 + 14; + } + + if (valid) + { + InitEquationTable(); + } + + return valid; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlConvertChipFamily +* +* @brief +* Convert familyID defined in atiid.h to ChipFamily and set m_chipFamily/m_chipRevision +* @return +* ChipFamily +************************************************************************************************************************ +*/ +ChipFamily Gfx10Lib::HwlConvertChipFamily( + UINT_32 chipFamily, ///< [in] chip family defined in atiih.h + UINT_32 chipRevision) ///< [in] chip revision defined in "asic_family"_id.h +{ + ChipFamily family = ADDR_CHIP_FAMILY_NAVI; + + m_settings.dccUnsup3DSwDis = 1; + + switch (chipFamily) + { + case FAMILY_NV: + m_settings.isDcn2 = 1; + break; + default: + ADDR_ASSERT(!"Unknown chip family"); + break; + } + + m_settings.dsMipmapHtileFix = 1; + + if (ASICREV_IS_NAVI10_P(chipRevision)) + { + m_settings.dsMipmapHtileFix = 0; + } + + m_configFlags.use32bppFor422Fmt = TRUE; + + return family; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::GetBlk256SizeLog2 +* +* @brief +* Get block 256 size +* +* @return +* N/A +************************************************************************************************************************ +*/ +void Gfx10Lib::GetBlk256SizeLog2( + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2, ///< [in] element size log2 + UINT_32 numSamplesLog2, ///< [in] number of samples + Dim3d* pBlock ///< [out] block size + ) const +{ + if (IsThin(resourceType, swizzleMode)) + { + UINT_32 blockBits = 8 - elemLog2; + + if (IsZOrderSwizzle(swizzleMode)) + { + blockBits -= numSamplesLog2; + } + + pBlock->w = (blockBits >> 1) + (blockBits & 1); + pBlock->h = (blockBits >> 1); + pBlock->d = 0; + } + else + { + ADDR_ASSERT(IsThick(resourceType, swizzleMode)); + + UINT_32 blockBits = 8 - elemLog2; + + pBlock->d = (blockBits / 3) + (((blockBits % 3) > 0) ? 1 : 0); + pBlock->w = (blockBits / 3) + (((blockBits % 3) > 1) ? 1 : 0); + pBlock->h = (blockBits / 3); + } +} + +/** +************************************************************************************************************************ +* Gfx10Lib::GetCompressedBlockSizeLog2 +* +* @brief +* Get compress block size +* +* @return +* N/A +************************************************************************************************************************ +*/ +void Gfx10Lib::GetCompressedBlockSizeLog2( + Gfx10DataType dataType, ///< [in] Data type + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2, ///< [in] element size log2 + UINT_32 numSamplesLog2, ///< [in] number of samples + Dim3d* pBlock ///< [out] block size + ) const +{ + if (dataType == Gfx10DataColor) + { + GetBlk256SizeLog2(resourceType, swizzleMode, elemLog2, numSamplesLog2, pBlock); + } + else + { + ADDR_ASSERT((dataType == Gfx10DataDepthStencil) || (dataType == Gfx10DataFmask)); + pBlock->w = 3; + pBlock->h = 3; + pBlock->d = 0; + } +} + +/** +************************************************************************************************************************ +* Gfx10Lib::GetMetaOverlapLog2 +* +* @brief +* Get meta block overlap +* +* @return +* N/A +************************************************************************************************************************ +*/ +INT_32 Gfx10Lib::GetMetaOverlapLog2( + Gfx10DataType dataType, ///< [in] Data type + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2, ///< [in] element size log2 + UINT_32 numSamplesLog2 ///< [in] number of samples + ) const +{ + Dim3d compBlock; + Dim3d microBlock; + + GetCompressedBlockSizeLog2(dataType, resourceType, swizzleMode, elemLog2, numSamplesLog2, &compBlock); + GetBlk256SizeLog2(resourceType, swizzleMode, elemLog2, numSamplesLog2, µBlock); + + const INT_32 compSizeLog2 = compBlock.w + compBlock.h + compBlock.d; + const INT_32 blk256SizeLog2 = microBlock.w + microBlock.h + microBlock.d; + const INT_32 maxSizeLog2 = Max(compSizeLog2, blk256SizeLog2); + const INT_32 numPipesLog2 = GetEffectiveNumPipes(); + INT_32 overlap = numPipesLog2 - maxSizeLog2; + + if ((numPipesLog2 > 1) && m_settings.supportRbPlus) + { + overlap++; + } + + // In 16Bpp 8xaa, we lose 1 overlap bit because the block size reduction eats into a pipe anchor bit (y4) + if ((elemLog2 == 4) && (numSamplesLog2 == 3)) + { + overlap--; + } + overlap = Max(overlap, 0); + return overlap; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::Get3DMetaOverlapLog2 +* +* @brief +* Get 3d meta block overlap +* +* @return +* N/A +************************************************************************************************************************ +*/ +INT_32 Gfx10Lib::Get3DMetaOverlapLog2( + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2 ///< [in] element size log2 + ) const +{ + Dim3d microBlock; + GetBlk256SizeLog2(resourceType, swizzleMode, elemLog2, 0, µBlock); + + INT_32 overlap = GetEffectiveNumPipes() - static_cast(microBlock.w); + + if (m_settings.supportRbPlus) + { + overlap++; + } + + if ((overlap < 0) || (IsStandardSwizzle(resourceType, swizzleMode) == TRUE)) + { + overlap = 0; + } + return overlap; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::GetPipeRotateAmount +* +* @brief +* Get pipe rotate amount +* +* @return +* Pipe rotate amount +************************************************************************************************************************ +*/ + +INT_32 Gfx10Lib::GetPipeRotateAmount( + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode ///< [in] Swizzle mode + ) const +{ + INT_32 amount = 0; + + if (m_settings.supportRbPlus && (m_pipesLog2 >= (m_numSaLog2 + 1)) && (m_pipesLog2 > 1)) + { + amount = ((m_pipesLog2 == (m_numSaLog2 + 1)) && IsRbAligned(resourceType, swizzleMode)) ? + 1 : m_pipesLog2 - (m_numSaLog2 + 1); + } + + return amount; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::GetMetaBlkSize +* +* @brief +* Get metadata block size +* +* @return +* Meta block size +************************************************************************************************************************ +*/ +UINT_32 Gfx10Lib::GetMetaBlkSize( + Gfx10DataType dataType, ///< [in] Data type + AddrResourceType resourceType, ///< [in] Resource type + AddrSwizzleMode swizzleMode, ///< [in] Swizzle mode + UINT_32 elemLog2, ///< [in] element size log2 + UINT_32 numSamplesLog2, ///< [in] number of samples + BOOL_32 pipeAlign, ///< [in] pipe align + Dim3d* pBlock ///< [out] block size + ) const +{ + INT_32 metablkSizeLog2; + const INT_32 metaElemSizeLog2 = GetMetaElementSizeLog2(dataType); + const INT_32 metaCacheSizeLog2 = GetMetaCacheSizeLog2(dataType); + const INT_32 compBlkSizeLog2 = (dataType == Gfx10DataColor) ? 8 : 6 + numSamplesLog2 + elemLog2; + const INT_32 metaBlkSamplesLog2 = (dataType == Gfx10DataDepthStencil) ? + numSamplesLog2 : Min(numSamplesLog2, m_maxCompFragLog2); + const INT_32 dataBlkSizeLog2 = GetBlockSizeLog2(swizzleMode); + INT_32 numPipesLog2 = m_pipesLog2; + + if (IsThin(resourceType, swizzleMode)) + { + if ((pipeAlign == FALSE) || + (IsStandardSwizzle(resourceType, swizzleMode) == TRUE) || + (IsDisplaySwizzle(resourceType, swizzleMode) == TRUE)) + { + if (pipeAlign) + { + metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); + metablkSizeLog2 = Min(metablkSizeLog2, dataBlkSizeLog2); + } + else + { + metablkSizeLog2 = Min(dataBlkSizeLog2, 12); + } + } + else + { + if (m_settings.supportRbPlus && (m_pipesLog2 == m_numSaLog2 + 1) && (m_pipesLog2 > 1)) + { + numPipesLog2++; + } + + INT_32 pipeRotateLog2 = GetPipeRotateAmount(resourceType, swizzleMode); + + if (numPipesLog2 >= 4) + { + INT_32 overlapLog2 = GetMetaOverlapLog2(dataType, resourceType, swizzleMode, elemLog2, numSamplesLog2); + + // In 16Bpe 8xaa, we have an extra overlap bit + if ((pipeRotateLog2 > 0) && + (elemLog2 == 4) && + (numSamplesLog2 == 3) && + (IsZOrderSwizzle(swizzleMode) || (GetEffectiveNumPipes() > 3))) + { + overlapLog2++; + } + + metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; + metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); + + if (m_settings.supportRbPlus && + IsRtOptSwizzle(swizzleMode) && + (numPipesLog2 == 6) && + (numSamplesLog2 == 3) && + (m_maxCompFragLog2 == 3) && + (metablkSizeLog2 < 15)) + { + metablkSizeLog2 = 15; + } + } + else + { + metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); + } + + if (dataType == Gfx10DataDepthStencil) + { + // For htile surfaces, pad meta block size to 2K * num_pipes + metablkSizeLog2 = Max(metablkSizeLog2, 11 + numPipesLog2); + } + + const INT_32 compFragLog2 = Min(m_maxCompFragLog2, numSamplesLog2); + + if (IsRtOptSwizzle(swizzleMode) && (compFragLog2 > 1) && (pipeRotateLog2 >= 1)) + { + const INT_32 tmp = 8 + m_pipesLog2 + Max(pipeRotateLog2, compFragLog2 - 1); + + metablkSizeLog2 = Max(metablkSizeLog2, tmp); + } + } + + const INT_32 metablkBitsLog2 = + metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; + pBlock->w = 1 << ((metablkBitsLog2 >> 1) + (metablkBitsLog2 & 1)); + pBlock->h = 1 << (metablkBitsLog2 >> 1); + pBlock->d = 1; + } + else + { + ADDR_ASSERT(IsThick(resourceType, swizzleMode)); + + if (pipeAlign) + { + if (m_settings.supportRbPlus && + (m_pipesLog2 == m_numSaLog2 + 1) && + (m_pipesLog2 > 1) && + IsRbAligned(resourceType, swizzleMode)) + { + numPipesLog2++; + } + + const INT_32 overlapLog2 = Get3DMetaOverlapLog2(resourceType, swizzleMode, elemLog2); + + metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; + metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); + metablkSizeLog2 = Max(metablkSizeLog2, 12); + } + else + { + metablkSizeLog2 = 12; + } + + const INT_32 metablkBitsLog2 = + metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; + pBlock->w = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 0) ? 1 : 0)); + pBlock->h = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 1) ? 1 : 0)); + pBlock->d = 1 << (metablkBitsLog2 / 3); + } + + return (1 << static_cast(metablkSizeLog2)); +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ConvertSwizzlePatternToEquation +* +* @brief +* Convert swizzle pattern to equation. +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx10Lib::ConvertSwizzlePatternToEquation( + UINT_32 elemLog2, ///< [in] element bytes log2 + AddrResourceType rsrcType, ///< [in] resource type + AddrSwizzleMode swMode, ///< [in] swizzle mode + const ADDR_SW_PATINFO* pPatInfo, ///< [in] swizzle pattern infor + ADDR_EQUATION* pEquation) ///< [out] equation converted from swizzle pattern + const +{ + ADDR_BIT_SETTING fullSwizzlePattern[20]; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + + const ADDR_BIT_SETTING* pSwizzle = fullSwizzlePattern; + const UINT_32 blockSizeLog2 = GetBlockSizeLog2(swMode); + + pEquation->numBits = blockSizeLog2; + pEquation->stackedDepthSlices = FALSE; + + for (UINT_32 i = 0; i < elemLog2; i++) + { + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = i; + } + + if (IsXor(swMode) == FALSE) + { + for (UINT_32 i = elemLog2; i < blockSizeLog2; i++) + { + ADDR_ASSERT(IsPow2(pSwizzle[i].value)); + + if (pSwizzle[i].x != 0) + { + ADDR_ASSERT(IsPow2(static_cast(pSwizzle[i].x))); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].x) + elemLog2; + } + else if (pSwizzle[i].y != 0) + { + ADDR_ASSERT(IsPow2(static_cast(pSwizzle[i].y))); + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].y); + } + else + { + ADDR_ASSERT(pSwizzle[i].z != 0); + ADDR_ASSERT(IsPow2(static_cast(pSwizzle[i].z))); + + pEquation->addr[i].channel = 2; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].z); + } + + pEquation->xor1[i].value = 0; + pEquation->xor2[i].value = 0; + } + } + else if (IsThin(rsrcType, swMode)) + { + Dim3d dim; + ComputeThinBlockDimension(&dim.w, &dim.h, &dim.d, 8u << elemLog2, 0, rsrcType, swMode); + + const UINT_32 blkXLog2 = Log2(dim.w); + const UINT_32 blkYLog2 = Log2(dim.h); + const UINT_32 blkXMask = dim.w - 1; + const UINT_32 blkYMask = dim.h - 1; + + ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT]; + UINT_32 xMask = 0; + UINT_32 yMask = 0; + UINT_32 bMask = (1 << elemLog2) - 1; + + for (UINT_32 i = elemLog2; i < blockSizeLog2; i++) + { + if (IsPow2(pSwizzle[i].value)) + { + if (pSwizzle[i].x != 0) + { + ADDR_ASSERT((xMask & pSwizzle[i].x) == 0); + xMask |= pSwizzle[i].x; + + const UINT_32 xLog2 = Log2(pSwizzle[i].x); + + ADDR_ASSERT(xLog2 < blkXLog2); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = xLog2 + elemLog2; + } + else + { + ADDR_ASSERT(pSwizzle[i].y != 0); + ADDR_ASSERT((yMask & pSwizzle[i].y) == 0); + yMask |= pSwizzle[i].y; + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].y); + + ADDR_ASSERT(pEquation->addr[i].index < blkYLog2); + } + + swizzle[i].value = 0; + bMask |= 1 << i; + } + else + { + if (pSwizzle[i].z != 0) + { + ADDR_ASSERT(IsPow2(static_cast(pSwizzle[i].z))); + + pEquation->xor2[i].channel = 2; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(pSwizzle[i].z); + } + + swizzle[i].x = pSwizzle[i].x; + swizzle[i].y = pSwizzle[i].y; + swizzle[i].z = swizzle[i].s = 0; + + ADDR_ASSERT(IsPow2(swizzle[i].value) == FALSE); + + const UINT_32 xHi = swizzle[i].x & (~blkXMask); + + if (xHi != 0) + { + ADDR_ASSERT(IsPow2(xHi)); + ADDR_ASSERT(pEquation->xor1[i].value == 0); + + pEquation->xor1[i].channel = 0; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(xHi) + elemLog2; + + swizzle[i].x &= blkXMask; + } + + const UINT_32 yHi = swizzle[i].y & (~blkYMask); + + if (yHi != 0) + { + ADDR_ASSERT(IsPow2(yHi)); + + if (xHi == 0) + { + ADDR_ASSERT(pEquation->xor1[i].value == 0); + pEquation->xor1[i].channel = 1; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(yHi); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 1; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(yHi); + } + + swizzle[i].y &= blkYMask; + } + + if (swizzle[i].value == 0) + { + bMask |= 1 << i; + } + } + } + + const UINT_32 pipeIntMask = (1 << m_pipeInterleaveLog2) - 1; + const UINT_32 blockMask = (1 << blockSizeLog2) - 1; + + ADDR_ASSERT((bMask & pipeIntMask) == pipeIntMask); + + while (bMask != blockMask) + { + for (UINT_32 i = m_pipeInterleaveLog2; i < blockSizeLog2; i++) + { + if ((bMask & (1 << i)) == 0) + { + if (IsPow2(swizzle[i].value)) + { + if (swizzle[i].x != 0) + { + ADDR_ASSERT((xMask & swizzle[i].x) == 0); + xMask |= swizzle[i].x; + + const UINT_32 xLog2 = Log2(swizzle[i].x); + + ADDR_ASSERT(xLog2 < blkXLog2); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = xLog2 + elemLog2; + } + else + { + ADDR_ASSERT(swizzle[i].y != 0); + ADDR_ASSERT((yMask & swizzle[i].y) == 0); + yMask |= swizzle[i].y; + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(swizzle[i].y); + + ADDR_ASSERT(pEquation->addr[i].index < blkYLog2); + } + + swizzle[i].value = 0; + bMask |= 1 << i; + } + else + { + const UINT_32 x = swizzle[i].x & xMask; + const UINT_32 y = swizzle[i].y & yMask; + + if (x != 0) + { + ADDR_ASSERT(IsPow2(x)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 0; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(x) + elemLog2; + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 0; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(x) + elemLog2; + } + } + + if (y != 0) + { + ADDR_ASSERT(IsPow2(y)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 1; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(y); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 1; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(y); + } + } + + swizzle[i].x &= ~x; + swizzle[i].y &= ~y; + } + } + } + } + + ADDR_ASSERT((xMask == blkXMask) && (yMask == blkYMask)); + } + else + { + const UINT_32 blkXLog2 = (blockSizeLog2 == 12) ? Block4K_Log2_3d[elemLog2].w : Block64K_Log2_3d[elemLog2].w; + const UINT_32 blkYLog2 = (blockSizeLog2 == 12) ? Block4K_Log2_3d[elemLog2].h : Block64K_Log2_3d[elemLog2].h; + const UINT_32 blkZLog2 = (blockSizeLog2 == 12) ? Block4K_Log2_3d[elemLog2].d : Block64K_Log2_3d[elemLog2].d; + const UINT_32 blkXMask = (1 << blkXLog2) - 1; + const UINT_32 blkYMask = (1 << blkYLog2) - 1; + const UINT_32 blkZMask = (1 << blkZLog2) - 1; + + ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT]; + UINT_32 xMask = 0; + UINT_32 yMask = 0; + UINT_32 zMask = 0; + UINT_32 bMask = (1 << elemLog2) - 1; + + for (UINT_32 i = elemLog2; i < blockSizeLog2; i++) + { + if (IsPow2(pSwizzle[i].value)) + { + if (pSwizzle[i].x != 0) + { + ADDR_ASSERT((xMask & pSwizzle[i].x) == 0); + xMask |= pSwizzle[i].x; + + const UINT_32 xLog2 = Log2(pSwizzle[i].x); + + ADDR_ASSERT(xLog2 < blkXLog2); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = xLog2 + elemLog2; + } + else if (pSwizzle[i].y != 0) + { + ADDR_ASSERT((yMask & pSwizzle[i].y) == 0); + yMask |= pSwizzle[i].y; + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].y); + + ADDR_ASSERT(pEquation->addr[i].index < blkYLog2); + } + else + { + ADDR_ASSERT(pSwizzle[i].z != 0); + ADDR_ASSERT((zMask & pSwizzle[i].z) == 0); + zMask |= pSwizzle[i].z; + + pEquation->addr[i].channel = 2; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(pSwizzle[i].z); + + ADDR_ASSERT(pEquation->addr[i].index < blkZLog2); + } + + swizzle[i].value = 0; + bMask |= 1 << i; + } + else + { + swizzle[i].x = pSwizzle[i].x; + swizzle[i].y = pSwizzle[i].y; + swizzle[i].z = pSwizzle[i].z; + swizzle[i].s = 0; + + ADDR_ASSERT(IsPow2(swizzle[i].value) == FALSE); + + const UINT_32 xHi = swizzle[i].x & (~blkXMask); + const UINT_32 yHi = swizzle[i].y & (~blkYMask); + const UINT_32 zHi = swizzle[i].z & (~blkZMask); + + ADDR_ASSERT((xHi == 0) || (yHi== 0) || (zHi == 0)); + + if (xHi != 0) + { + ADDR_ASSERT(IsPow2(xHi)); + ADDR_ASSERT(pEquation->xor1[i].value == 0); + + pEquation->xor1[i].channel = 0; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(xHi) + elemLog2; + + swizzle[i].x &= blkXMask; + } + + if (yHi != 0) + { + ADDR_ASSERT(IsPow2(yHi)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 1; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(yHi); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 1; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(yHi); + } + + swizzle[i].y &= blkYMask; + } + + if (zHi != 0) + { + ADDR_ASSERT(IsPow2(zHi)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 2; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(zHi); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 2; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(zHi); + } + + swizzle[i].z &= blkZMask; + } + + if (swizzle[i].value == 0) + { + bMask |= 1 << i; + } + } + } + + const UINT_32 pipeIntMask = (1 << m_pipeInterleaveLog2) - 1; + const UINT_32 blockMask = (1 << blockSizeLog2) - 1; + + ADDR_ASSERT((bMask & pipeIntMask) == pipeIntMask); + + while (bMask != blockMask) + { + for (UINT_32 i = m_pipeInterleaveLog2; i < blockSizeLog2; i++) + { + if ((bMask & (1 << i)) == 0) + { + if (IsPow2(swizzle[i].value)) + { + if (swizzle[i].x != 0) + { + ADDR_ASSERT((xMask & swizzle[i].x) == 0); + xMask |= swizzle[i].x; + + const UINT_32 xLog2 = Log2(swizzle[i].x); + + ADDR_ASSERT(xLog2 < blkXLog2); + + pEquation->addr[i].channel = 0; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = xLog2 + elemLog2; + } + else if (swizzle[i].y != 0) + { + ADDR_ASSERT((yMask & swizzle[i].y) == 0); + yMask |= swizzle[i].y; + + pEquation->addr[i].channel = 1; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(swizzle[i].y); + + ADDR_ASSERT(pEquation->addr[i].index < blkYLog2); + } + else + { + ADDR_ASSERT(swizzle[i].z != 0); + ADDR_ASSERT((zMask & swizzle[i].z) == 0); + zMask |= swizzle[i].z; + + pEquation->addr[i].channel = 2; + pEquation->addr[i].valid = 1; + pEquation->addr[i].index = Log2(swizzle[i].z); + + ADDR_ASSERT(pEquation->addr[i].index < blkZLog2); + } + + swizzle[i].value = 0; + bMask |= 1 << i; + } + else + { + const UINT_32 x = swizzle[i].x & xMask; + const UINT_32 y = swizzle[i].y & yMask; + const UINT_32 z = swizzle[i].z & zMask; + + if (x != 0) + { + ADDR_ASSERT(IsPow2(x)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 0; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(x) + elemLog2; + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 0; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(x) + elemLog2; + } + } + + if (y != 0) + { + ADDR_ASSERT(IsPow2(y)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 1; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(y); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 1; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(y); + } + } + + if (z != 0) + { + ADDR_ASSERT(IsPow2(z)); + + if (pEquation->xor1[i].value == 0) + { + pEquation->xor1[i].channel = 2; + pEquation->xor1[i].valid = 1; + pEquation->xor1[i].index = Log2(z); + } + else + { + ADDR_ASSERT(pEquation->xor2[i].value == 0); + pEquation->xor2[i].channel = 2; + pEquation->xor2[i].valid = 1; + pEquation->xor2[i].index = Log2(z); + } + } + + swizzle[i].x &= ~x; + swizzle[i].y &= ~y; + swizzle[i].z &= ~z; + } + } + } + } + + ADDR_ASSERT((xMask == blkXMask) && (yMask == blkYMask) && (zMask == blkZMask)); + } +} + +/** +************************************************************************************************************************ +* Gfx10Lib::InitEquationTable +* +* @brief +* Initialize Equation table. +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx10Lib::InitEquationTable() +{ + memset(m_equationTable, 0, sizeof(m_equationTable)); + + for (UINT_32 rsrcTypeIdx = 0; rsrcTypeIdx < MaxRsrcType; rsrcTypeIdx++) + { + const AddrResourceType rsrcType = static_cast(rsrcTypeIdx + ADDR_RSRC_TEX_2D); + + for (UINT_32 swModeIdx = 0; swModeIdx < MaxSwModeType; swModeIdx++) + { + const AddrSwizzleMode swMode = static_cast(swModeIdx); + + for (UINT_32 elemLog2 = 0; elemLog2 < MaxElementBytesLog2; elemLog2++) + { + UINT_32 equationIndex = ADDR_INVALID_EQUATION_INDEX; + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(swMode, rsrcType, elemLog2, 1); + + if (pPatInfo != NULL) + { + ADDR_ASSERT(IsValidSwMode(swMode)); + + if (pPatInfo->maxItemCount <= 3) + { + ADDR_EQUATION equation = {}; + + ConvertSwizzlePatternToEquation(elemLog2, rsrcType, swMode, pPatInfo, &equation); + + equationIndex = m_numEquations; + ADDR_ASSERT(equationIndex < EquationTableSize); + + m_equationTable[equationIndex] = equation; + + m_numEquations++; + } + else + { + // We only see "ill" equation from 64/128 BPE + 3D resource + SW_64KB_D_X under RB+ case + ADDR_ASSERT((elemLog2 == 3) || (elemLog2 == 4)); + ADDR_ASSERT(rsrcTypeIdx == 1); + ADDR_ASSERT(swMode == ADDR_SW_64KB_D_X); + ADDR_ASSERT(m_settings.supportRbPlus == 1); + } + } + + m_equationLookupTable[rsrcTypeIdx][swModeIdx][elemLog2] = equationIndex; + } + } + } +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlGetEquationIndex +* +* @brief +* Interface function stub of GetEquationIndex +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +UINT_32 Gfx10Lib::HwlGetEquationIndex( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + UINT_32 equationIdx = ADDR_INVALID_EQUATION_INDEX; + + if ((pIn->resourceType == ADDR_RSRC_TEX_2D) || + (pIn->resourceType == ADDR_RSRC_TEX_3D)) + { + const UINT_32 rsrcTypeIdx = static_cast(pIn->resourceType) - 1; + const UINT_32 swModeIdx = static_cast(pIn->swizzleMode); + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + + equationIdx = m_equationLookupTable[rsrcTypeIdx][swModeIdx][elemLog2]; + } + + if (pOut->pMipInfo != NULL) + { + for (UINT_32 i = 0; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].equationIndex = equationIdx; + } + } + + return equationIdx; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::IsValidDisplaySwizzleMode +* +* @brief +* Check if a swizzle mode is supported by display engine +* +* @return +* TRUE is swizzle mode is supported by display engine +************************************************************************************************************************ +*/ +BOOL_32 Gfx10Lib::IsValidDisplaySwizzleMode( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in] input structure + ) const +{ + ADDR_ASSERT(pIn->resourceType == ADDR_RSRC_TEX_2D); + + BOOL_32 support = FALSE; + + if (m_settings.isDcn2) + { + switch (pIn->swizzleMode) + { + case ADDR_SW_4KB_D: + case ADDR_SW_4KB_D_X: + case ADDR_SW_64KB_D: + case ADDR_SW_64KB_D_T: + case ADDR_SW_64KB_D_X: + support = (pIn->bpp == 64); + break; + + case ADDR_SW_LINEAR: + case ADDR_SW_4KB_S: + case ADDR_SW_4KB_S_X: + case ADDR_SW_64KB_S: + case ADDR_SW_64KB_S_T: + case ADDR_SW_64KB_S_X: + case ADDR_SW_64KB_R_X: + support = (pIn->bpp <= 64); + break; + + default: + break; + } + } + else + { + ADDR_NOT_IMPLEMENTED(); + } + + return support; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::GetMaxNumMipsInTail +* +* @brief +* Return max number of mips in tails +* +* @return +* Max number of mips in tails +************************************************************************************************************************ +*/ +UINT_32 Gfx10Lib::GetMaxNumMipsInTail( + UINT_32 blockSizeLog2, ///< block size log2 + BOOL_32 isThin ///< is thin or thick + ) const +{ + UINT_32 effectiveLog2 = blockSizeLog2; + + if (isThin == FALSE) + { + effectiveLog2 -= (blockSizeLog2 - 8) / 3; + } + + return (effectiveLog2 <= 11) ? (1 + (1 << (effectiveLog2 - 9))) : (effectiveLog2 - 4); +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputePipeBankXor +* +* @brief +* Generate a PipeBankXor value to be ORed into bits above pipeInterleaveBits of address +* +* @return +* PipeBankXor value +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputePipeBankXor( + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut ///< [out] output structure + ) const +{ + if (IsNonPrtXor(pIn->swizzleMode)) + { + const UINT_32 blockBits = GetBlockSizeLog2(pIn->swizzleMode); + const UINT_32 pipeBits = GetPipeXorBits(blockBits); + const UINT_32 bankBits = GetBankXorBits(blockBits); + + UINT_32 pipeXor = 0; + UINT_32 bankXor = 0; + + if (bankBits != 0) + { + if (blockBits == 16) + { + const UINT_32 XorPatternLen = 8; + static const UINT_32 XorBank1b[XorPatternLen] = {0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80}; + static const UINT_32 XorBank2b[XorPatternLen] = {0x00, 0x80, 0x40, 0xC0, 0x80, 0x00, 0xC0, 0x40}; + static const UINT_32 XorBank3b[XorPatternLen] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0}; + + const UINT_32 index = pIn->surfIndex % XorPatternLen; + + if (bankBits == 1) + { + bankXor = XorBank1b[index]; + } + else if (bankBits == 2) + { + bankXor = XorBank2b[index]; + } + else + { + bankXor = XorBank3b[index]; + + if (bankBits == 4) + { + bankXor >>= (2 - pipeBits); + } + } + } + } + + pOut->pipeBankXor = bankXor | pipeXor; + } + else + { + pOut->pipeBankXor = 0; + } + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeSlicePipeBankXor +* +* @brief +* Generate slice PipeBankXor value based on base PipeBankXor value and slice id +* +* @return +* PipeBankXor value +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSlicePipeBankXor( + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut ///< [out] output structure + ) const +{ + if (IsNonPrtXor(pIn->swizzleMode)) + { + const UINT_32 blockBits = GetBlockSizeLog2(pIn->swizzleMode); + const UINT_32 pipeBits = GetPipeXorBits(blockBits); + const UINT_32 pipeXor = ReverseBitVector(pIn->slice, pipeBits); + + pOut->pipeBankXor = pIn->basePipeBankXor ^ pipeXor; + } + else + { + pOut->pipeBankXor = 0; + } + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeSubResourceOffsetForSwizzlePattern +* +* @brief +* Compute sub resource offset to support swizzle pattern +* +* @return +* Offset +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSubResourceOffsetForSwizzlePattern( + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_ASSERT(IsThin(pIn->resourceType, pIn->swizzleMode)); + + pOut->offset = pIn->slice * pIn->sliceSize + pIn->macroBlockOffset; + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ValidateNonSwModeParams +* +* @brief +* Validate compute surface info params except swizzle mode +* +* @return +* TRUE if parameters are valid, FALSE otherwise +************************************************************************************************************************ +*/ +BOOL_32 Gfx10Lib::ValidateNonSwModeParams( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const +{ + BOOL_32 valid = TRUE; + + if ((pIn->bpp == 0) || (pIn->bpp > 128) || (pIn->width == 0) || (pIn->numFrags > 8) || (pIn->numSamples > 16)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + if (pIn->resourceType >= ADDR_RSRC_MAX_TYPE) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + const ADDR2_SURFACE_FLAGS flags = pIn->flags; + const AddrResourceType rsrcType = pIn->resourceType; + const BOOL_32 mipmap = (pIn->numMipLevels > 1); + const BOOL_32 msaa = (pIn->numFrags > 1); + const BOOL_32 display = flags.display; + const BOOL_32 tex3d = IsTex3d(rsrcType); + const BOOL_32 tex2d = IsTex2d(rsrcType); + const BOOL_32 tex1d = IsTex1d(rsrcType); + const BOOL_32 stereo = flags.qbStereo; + + // Resource type check + if (tex1d) + { + if (msaa || display || stereo) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex2d) + { + if ((msaa && mipmap) || (stereo && msaa) || (stereo && mipmap)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex3d) + { + if (msaa || display || stereo) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + return valid; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ValidateSwModeParams +* +* @brief +* Validate compute surface info related to swizzle mode +* +* @return +* TRUE if parameters are valid, FALSE otherwise +************************************************************************************************************************ +*/ +BOOL_32 Gfx10Lib::ValidateSwModeParams( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const +{ + BOOL_32 valid = TRUE; + + if ((pIn->swizzleMode >= ADDR_SW_MAX_TYPE) || (IsValidSwMode(pIn->swizzleMode) == FALSE)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + const ADDR2_SURFACE_FLAGS flags = pIn->flags; + const AddrResourceType rsrcType = pIn->resourceType; + const AddrSwizzleMode swizzle = pIn->swizzleMode; + const BOOL_32 msaa = (pIn->numFrags > 1); + const BOOL_32 zbuffer = flags.depth || flags.stencil; + const BOOL_32 color = flags.color; + const BOOL_32 display = flags.display; + const BOOL_32 tex3d = IsTex3d(rsrcType); + const BOOL_32 tex2d = IsTex2d(rsrcType); + const BOOL_32 tex1d = IsTex1d(rsrcType); + const BOOL_32 thin3d = flags.view3dAs2dArray; + const BOOL_32 linear = IsLinear(swizzle); + const BOOL_32 blk256B = IsBlock256b(swizzle); + const BOOL_32 blkVar = IsBlockVariable(swizzle); + const BOOL_32 isNonPrtXor = IsNonPrtXor(swizzle); + const BOOL_32 prt = flags.prt; + const BOOL_32 fmask = flags.fmask; + + // Misc check + if ((pIn->numFrags > 1) && + (GetBlockSize(swizzle) < (m_pipeInterleaveBytes * pIn->numFrags))) + { + // MSAA surface must have blk_bytes/pipe_interleave >= num_samples + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + if (display && (IsValidDisplaySwizzleMode(pIn) == FALSE)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + if ((pIn->bpp == 96) && (linear == FALSE)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + const UINT_32 swizzleMask = 1 << swizzle; + + // Resource type check + if (tex1d) + { + if ((swizzleMask & Gfx10Rsrc1dSwModeMask) == 0) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex2d) + { + if (((swizzleMask & Gfx10Rsrc2dSwModeMask) == 0) || + (prt && ((swizzleMask & Gfx10Rsrc2dPrtSwModeMask) == 0)) || + (fmask && ((swizzleMask & Gfx10ZSwModeMask) == 0))) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex3d) + { + if (((swizzleMask & Gfx10Rsrc3dSwModeMask) == 0) || + (prt && ((swizzleMask & Gfx10Rsrc3dPrtSwModeMask) == 0)) || + (thin3d && ((swizzleMask & Gfx10Rsrc3dThinSwModeMask) == 0))) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + + // Swizzle type check + if (linear) + { + if (zbuffer || msaa || (pIn->bpp == 0) || ((pIn->bpp % 8) != 0)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsZOrderSwizzle(swizzle)) + { + if ((pIn->bpp > 64) || + (msaa && (color || (pIn->bpp > 32))) || + ElemLib::IsBlockCompressed(pIn->format) || + ElemLib::IsMacroPixelPacked(pIn->format)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsStandardSwizzle(rsrcType, swizzle)) + { + if (zbuffer || msaa) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsDisplaySwizzle(rsrcType, swizzle)) + { + if (zbuffer || msaa) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsRtOptSwizzle(swizzle)) + { + if (zbuffer) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + // Block type check + if (blk256B) + { + if (zbuffer || tex3d || msaa) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (blkVar) + { + if (m_blockVarSizeLog2 == 0) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + + return valid; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeSurfaceInfoSanityCheck +* +* @brief +* Compute surface info sanity check +* +* @return +* Offset +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSurfaceInfoSanityCheck( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in] input structure + ) const +{ + return ValidateNonSwModeParams(pIn) && ValidateSwModeParams(pIn) ? ADDR_OK : ADDR_INVALIDPARAMS; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlGetPreferredSurfaceSetting +* +* @brief +* Internal function to get suggested surface information for cliet to use +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, ///< [in] input structure + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->flags.fmask) + { + const BOOL_32 forbid64KbBlockType = pIn->forbiddenBlock.macroThin64KB ? TRUE : FALSE; + const BOOL_32 forbidVarBlockType = ((m_blockVarSizeLog2 == 0) || (pIn->forbiddenBlock.var != 0)); + + if (forbid64KbBlockType && forbidVarBlockType) + { + // Invalid combination... + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + else + { + pOut->resourceType = ADDR_RSRC_TEX_2D; + pOut->validBlockSet.value = 0; + pOut->validBlockSet.macroThin64KB = forbid64KbBlockType ? 0 : 1; + pOut->validBlockSet.var = forbidVarBlockType ? 0 : 1; + pOut->validSwModeSet.value = 0; + pOut->validSwModeSet.sw64KB_Z_X = forbid64KbBlockType ? 0 : 1; + pOut->validSwModeSet.swVar_Z_X = forbidVarBlockType ? 0 : 1; + pOut->canXor = TRUE; + pOut->validSwTypeSet.value = AddrSwSetZ; + pOut->clientPreferredSwSet = pOut->validSwTypeSet; + + BOOL_32 use64KbBlockType = (forbid64KbBlockType == FALSE); + + if ((forbid64KbBlockType == FALSE) && (forbidVarBlockType == FALSE)) + { + const UINT_8 maxFmaskSwizzleModeType = 2; + const UINT_32 ratioLow = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 3 : 2); + const UINT_32 ratioHi = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 2 : 1); + const UINT_32 fmaskBpp = GetFmaskBpp(pIn->numSamples, pIn->numFrags); + const UINT_32 numSlices = Max(pIn->numSlices, 1u); + const UINT_32 width = Max(pIn->width, 1u); + const UINT_32 height = Max(pIn->height, 1u); + const UINT_64 sizeAlignInElement = Max(NextPow2(pIn->minSizeAlign) / (fmaskBpp >> 3), 1u); + + AddrSwizzleMode swMode[maxFmaskSwizzleModeType] = {ADDR_SW_64KB_Z_X, ADDR_SW_VAR_Z_X}; + Dim3d blkDim[maxFmaskSwizzleModeType] = {{0}, {0}}; + Dim3d padDim[maxFmaskSwizzleModeType] = {{0}, {0}}; + UINT_64 padSize[maxFmaskSwizzleModeType] = {0}; + + for (UINT_8 i = 0; i < maxFmaskSwizzleModeType; i++) + { + ComputeBlockDimensionForSurf(&blkDim[i].w, + &blkDim[i].h, + &blkDim[i].d, + fmaskBpp, + 1, + pOut->resourceType, + swMode[i]); + + padSize[i] = ComputePadSize(&blkDim[i], width, height, numSlices, &padDim[i]); + padSize[i] = PowTwoAlign(padSize[i], sizeAlignInElement); + } + + if (GetBlockSizeLog2(swMode[1]) >= GetBlockSizeLog2(swMode[0])) + { + if ((padSize[1] * ratioHi) <= (padSize[0] * ratioLow)) + { + use64KbBlockType = FALSE; + } + } + else + { + if ((padSize[1] * ratioLow) < (padSize[0] * ratioHi)) + { + use64KbBlockType = FALSE; + } + } + } + else if (forbidVarBlockType) + { + use64KbBlockType = TRUE; + } + + if (use64KbBlockType) + { + pOut->swizzleMode = ADDR_SW_64KB_Z_X; + } + else + { + pOut->swizzleMode = ADDR_SW_VAR_Z_X; + } + } + } + else + { + UINT_32 bpp = pIn->bpp; + UINT_32 width = Max(pIn->width, 1u); + UINT_32 height = Max(pIn->height, 1u); + + // Set format to INVALID will skip this conversion + if (pIn->format != ADDR_FMT_INVALID) + { + ElemMode elemMode = ADDR_UNCOMPRESSED; + UINT_32 expandX, expandY; + + // Get compression/expansion factors and element mode which indicates compression/expansion + bpp = GetElemLib()->GetBitsPerPixel(pIn->format, + &elemMode, + &expandX, + &expandY); + + UINT_32 basePitch = 0; + GetElemLib()->AdjustSurfaceInfo(elemMode, + expandX, + expandY, + &bpp, + &basePitch, + &width, + &height); + } + + const UINT_32 numSlices = Max(pIn->numSlices, 1u); + const UINT_32 numMipLevels = Max(pIn->numMipLevels, 1u); + const UINT_32 numSamples = Max(pIn->numSamples, 1u); + const UINT_32 numFrags = (pIn->numFrags == 0) ? numSamples : pIn->numFrags; + const BOOL_32 msaa = (numFrags > 1) || (numSamples > 1); + + // Pre sanity check on non swizzle mode parameters + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {}; + localIn.flags = pIn->flags; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = bpp; + localIn.width = width; + localIn.height = height; + localIn.numSlices = numSlices; + localIn.numMipLevels = numMipLevels; + localIn.numSamples = numSamples; + localIn.numFrags = numFrags; + + if (ValidateNonSwModeParams(&localIn)) + { + // Forbid swizzle mode(s) by client setting + ADDR2_SWMODE_SET allowedSwModeSet = {}; + allowedSwModeSet.value |= pIn->forbiddenBlock.linear ? 0 : Gfx10LinearSwModeMask; + allowedSwModeSet.value |= pIn->forbiddenBlock.micro ? 0 : Gfx10Blk256BSwModeMask; + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThin4KB ? 0 : + ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? 0 : Gfx10Blk4KBSwModeMask); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThick4KB ? 0 : + ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThick4KBSwModeMask : 0); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThin64KB ? 0 : + ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThin64KBSwModeMask : Gfx10Blk64KBSwModeMask); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThick64KB ? 0 : + ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThick64KBSwModeMask : 0); + allowedSwModeSet.value |= + pIn->forbiddenBlock.var ? 0 : (m_blockVarSizeLog2 ? Gfx10BlkVarSwModeMask : 0); + + if (pIn->preferredSwSet.value != 0) + { + allowedSwModeSet.value &= pIn->preferredSwSet.sw_Z ? ~0 : ~Gfx10ZSwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_S ? ~0 : ~Gfx10StandardSwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_D ? ~0 : ~Gfx10DisplaySwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_R ? ~0 : ~Gfx10RenderSwModeMask; + } + + if (pIn->noXor) + { + allowedSwModeSet.value &= ~Gfx10XorSwModeMask; + } + + if (pIn->maxAlign > 0) + { + if (pIn->maxAlign < (1u << m_blockVarSizeLog2)) + { + allowedSwModeSet.value &= ~Gfx10BlkVarSwModeMask; + } + + if (pIn->maxAlign < Size64K) + { + allowedSwModeSet.value &= ~Gfx10Blk64KBSwModeMask; + } + + if (pIn->maxAlign < Size4K) + { + allowedSwModeSet.value &= ~Gfx10Blk4KBSwModeMask; + } + + if (pIn->maxAlign < Size256) + { + allowedSwModeSet.value &= ~Gfx10Blk256BSwModeMask; + } + } + + // Filter out invalid swizzle mode(s) by image attributes and HW restrictions + switch (pIn->resourceType) + { + case ADDR_RSRC_TEX_1D: + allowedSwModeSet.value &= Gfx10Rsrc1dSwModeMask; + break; + + case ADDR_RSRC_TEX_2D: + allowedSwModeSet.value &= pIn->flags.prt ? Gfx10Rsrc2dPrtSwModeMask : Gfx10Rsrc2dSwModeMask; + break; + + case ADDR_RSRC_TEX_3D: + allowedSwModeSet.value &= pIn->flags.prt ? Gfx10Rsrc3dPrtSwModeMask : Gfx10Rsrc3dSwModeMask; + + if (pIn->flags.view3dAs2dArray) + { + allowedSwModeSet.value &= Gfx10Rsrc3dThinSwModeMask; + } + break; + + default: + ADDR_ASSERT_ALWAYS(); + allowedSwModeSet.value = 0; + break; + } + + if (ElemLib::IsBlockCompressed(pIn->format) || + ElemLib::IsMacroPixelPacked(pIn->format) || + (bpp > 64) || + (msaa && ((bpp > 32) || pIn->flags.color || pIn->flags.unordered))) + { + allowedSwModeSet.value &= ~Gfx10ZSwModeMask; + } + + if (pIn->format == ADDR_FMT_32_32_32) + { + allowedSwModeSet.value &= Gfx10LinearSwModeMask; + } + + if (msaa) + { + allowedSwModeSet.value &= Gfx10MsaaSwModeMask; + } + + if (pIn->flags.depth || pIn->flags.stencil) + { + allowedSwModeSet.value &= Gfx10ZSwModeMask; + } + + if (pIn->flags.display) + { + if (m_settings.isDcn2) + { + allowedSwModeSet.value &= (bpp == 64) ? Dcn2Bpp64SwModeMask : Dcn2NonBpp64SwModeMask; + } + else + { + ADDR_NOT_IMPLEMENTED(); + } + } + + if (allowedSwModeSet.value != 0) + { +#if DEBUG + // Post sanity check, at least AddrLib should accept the output generated by its own + UINT_32 validateSwModeSet = allowedSwModeSet.value; + + for (UINT_32 i = 0; validateSwModeSet != 0; i++) + { + if (validateSwModeSet & 1) + { + localIn.swizzleMode = static_cast(i); + ADDR_ASSERT(ValidateSwModeParams(&localIn)); + } + + validateSwModeSet >>= 1; + } +#endif + + pOut->resourceType = pIn->resourceType; + pOut->validSwModeSet = allowedSwModeSet; + pOut->canXor = (allowedSwModeSet.value & Gfx10XorSwModeMask) ? TRUE : FALSE; + pOut->validBlockSet = GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType); + pOut->validSwTypeSet = GetAllowedSwSet(allowedSwModeSet); + + pOut->clientPreferredSwSet = pIn->preferredSwSet; + + if (pOut->clientPreferredSwSet.value == 0) + { + pOut->clientPreferredSwSet.value = AddrSwSetAll; + } + + // Apply optional restrictions + if ((pIn->flags.depth || pIn->flags.stencil) && msaa && m_configFlags.nonPower2MemConfig) + { + if ((allowedSwModeSet.value &= ~Gfx10BlkVarSwModeMask) != 0) + { + // MSAA depth in non power of 2 memory configs would suffer from non-local channel accesses from + // the GL2 in VAR mode, so it should be avoided. + allowedSwModeSet.value &= ~Gfx10BlkVarSwModeMask; + } + else + { + // We should still be able to use VAR for non power of 2 memory configs with MSAA z/stencil. + // But we have to suffer from low performance because there is no other choice... + ADDR_ASSERT_ALWAYS(); + } + } + + if (pIn->flags.needEquation) + { + FilterInvalidEqSwizzleMode(allowedSwModeSet, pIn->resourceType, Log2(bpp >> 3)); + } + + if (allowedSwModeSet.value == Gfx10LinearSwModeMask) + { + pOut->swizzleMode = ADDR_SW_LINEAR; + } + else + { + // Always ignore linear swizzle mode if there is other choice. + allowedSwModeSet.swLinear = 0; + + ADDR2_BLOCK_SET allowedBlockSet = GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType); + + // Determine block size if there is 2 or more block type candidates + if (IsPow2(allowedBlockSet.value) == FALSE) + { + AddrSwizzleMode swMode[AddrBlockMaxTiledType] = { ADDR_SW_LINEAR }; + + if (m_blockVarSizeLog2 != 0) + { + swMode[AddrBlockVar] = ADDR_SW_VAR_R_X; + } + + if (pOut->resourceType == ADDR_RSRC_TEX_3D) + { + swMode[AddrBlockThick4KB] = ADDR_SW_4KB_S; + swMode[AddrBlockThin64KB] = ADDR_SW_64KB_R_X; + swMode[AddrBlockThick64KB] = ADDR_SW_64KB_S; + } + else + { + swMode[AddrBlockMicro] = ADDR_SW_256B_S; + swMode[AddrBlockThin4KB] = ADDR_SW_4KB_S; + swMode[AddrBlockThin64KB] = ADDR_SW_64KB_S; + } + + Dim3d blkDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}}; + Dim3d padDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}}; + UINT_64 padSize[AddrBlockMaxTiledType] = {0}; + + const UINT_32 ratioLow = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 3 : 2); + const UINT_32 ratioHi = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 2 : 1); + const UINT_64 sizeAlignInElement = Max(NextPow2(pIn->minSizeAlign) / (bpp >> 3), 1u); + UINT_32 minSizeBlk = AddrBlockMicro; + UINT_64 minSize = 0; + + for (UINT_32 i = AddrBlockMicro; i < AddrBlockMaxTiledType; i++) + { + if (allowedBlockSet.value & (1 << i)) + { + ComputeBlockDimensionForSurf(&blkDim[i].w, + &blkDim[i].h, + &blkDim[i].d, + bpp, + numFrags, + pOut->resourceType, + swMode[i]); + + padSize[i] = ComputePadSize(&blkDim[i], width, height, numSlices, &padDim[i]); + padSize[i] = PowTwoAlign(padSize[i] * numFrags, sizeAlignInElement); + + if (minSize == 0) + { + minSize = padSize[i]; + minSizeBlk = i; + } + else + { + // Due to the fact that VAR block size = 16KB * m_pipes, it is possible that VAR + // block size < 64KB. And ratio[Hi/Low] logic implicitly requires iterating from + // smaller block type to bigger block type. So we have to correct comparing logic + // according to the size of existing "minimun block" and size of coming/comparing + // block. The new logic can also be useful to any future change about AddrBlockType. + if (GetBlockSizeLog2(swMode[i]) >= GetBlockSizeLog2(swMode[minSizeBlk])) + { + if ((padSize[i] * ratioHi) <= (minSize * ratioLow)) + { + minSize = padSize[i]; + minSizeBlk = i; + } + } + else + { + if ((padSize[i] * ratioLow) < (minSize * ratioHi)) + { + minSize = padSize[i]; + minSizeBlk = i; + } + } + } + } + } + + if ((allowedBlockSet.micro == TRUE) && + (width <= blkDim[AddrBlockMicro].w) && + (height <= blkDim[AddrBlockMicro].h)) + { + minSizeBlk = AddrBlockMicro; + } + + if (minSizeBlk == AddrBlockMicro) + { + ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx10Blk256BSwModeMask; + } + else if (minSizeBlk == AddrBlockThick4KB) + { + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx10Rsrc3dThick4KBSwModeMask; + } + else if (minSizeBlk == AddrBlockThin4KB) + { + ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx10Blk4KBSwModeMask; + } + else if (minSizeBlk == AddrBlockThick64KB) + { + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx10Rsrc3dThick64KBSwModeMask; + } + else if (minSizeBlk == AddrBlockThin64KB) + { + allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? + Gfx10Rsrc3dThin64KBSwModeMask : Gfx10Blk64KBSwModeMask; + } + else + { + ADDR_ASSERT(minSizeBlk == AddrBlockVar); + allowedSwModeSet.value &= Gfx10BlkVarSwModeMask; + } + } + + // Block type should be determined. + ADDR_ASSERT(IsPow2(GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType).value)); + + ADDR2_SWTYPE_SET allowedSwSet = GetAllowedSwSet(allowedSwModeSet); + + // Determine swizzle type if there is 2 or more swizzle type candidates + if (IsPow2(allowedSwSet.value) == FALSE) + { + if (ElemLib::IsBlockCompressed(pIn->format)) + { + if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx10DisplaySwModeMask; + } + else if (allowedSwSet.sw_S) + { + allowedSwModeSet.value &= Gfx10StandardSwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_R); + allowedSwModeSet.value &= Gfx10RenderSwModeMask; + } + } + else if (ElemLib::IsMacroPixelPacked(pIn->format)) + { + if (allowedSwSet.sw_S) + { + allowedSwModeSet.value &= Gfx10StandardSwModeMask; + } + else if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx10DisplaySwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_R); + allowedSwModeSet.value &= Gfx10RenderSwModeMask; + } + } + else if (pIn->resourceType == ADDR_RSRC_TEX_3D) + { + if (pIn->flags.color && + GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType).macroThick64KB && + allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx10DisplaySwModeMask; + } + else if (allowedSwSet.sw_S) + { + allowedSwModeSet.value &= Gfx10StandardSwModeMask; + } + else if (allowedSwSet.sw_R) + { + allowedSwModeSet.value &= Gfx10RenderSwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_Z); + allowedSwModeSet.value &= Gfx10ZSwModeMask; + } + } + else + { + if (allowedSwSet.sw_R) + { + allowedSwModeSet.value &= Gfx10RenderSwModeMask; + } + else if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx10DisplaySwModeMask; + } + else if (allowedSwSet.sw_S) + { + allowedSwModeSet.value &= Gfx10StandardSwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_Z); + allowedSwModeSet.value &= Gfx10ZSwModeMask; + } + } + } + + // Swizzle type should be determined. + ADDR_ASSERT(IsPow2(GetAllowedSwSet(allowedSwModeSet).value)); + + // Determine swizzle mode now. Always select the "largest" swizzle mode for a given block type + + // swizzle type combination. E.g, for AddrBlockThin64KB + ADDR_SW_S, select SW_64KB_S_X(25) if it's + // available, or otherwise select SW_64KB_S_T(17) if it's available, or otherwise select SW_64KB_S(9). + pOut->swizzleMode = static_cast(Log2NonPow2(allowedSwModeSet.value)); + } + } + else + { + // Invalid combination... + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + } + else + { + // Invalid combination... + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ComputeStereoInfo +* +* @brief +* Compute height alignment and right eye pipeBankXor for stereo surface +* +* @return +* Error code +* +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::ComputeStereoInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< Compute surface info + UINT_32 blkHeight, ///< Block height + UINT_32* pAlignY, ///< Stereo requested additional alignment in Y + UINT_32* pRightXor ///< Right eye xor + ) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + *pAlignY = 1; + *pRightXor = 0; + + if (IsNonPrtXor(pIn->swizzleMode)) + { + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 rsrcType = static_cast(pIn->resourceType) - 1; + const UINT_32 swMode = static_cast(pIn->swizzleMode); + const UINT_32 eqIndex = m_equationLookupTable[rsrcType][swMode][elemLog2]; + + if (eqIndex != ADDR_INVALID_EQUATION_INDEX) + { + UINT_32 yMax = 0; + UINT_32 yPos = 0; + + for (UINT_32 i = m_pipeInterleaveLog2; i < blkSizeLog2; i++) + { + if (m_equationTable[eqIndex].xor1[i].value == 0) + { + break; + } + + ADDR_ASSERT(m_equationTable[eqIndex].xor1[i].valid == 1); + + if ((m_equationTable[eqIndex].xor1[i].channel == 1) && + (m_equationTable[eqIndex].xor1[i].index > yMax)) + { + yMax = m_equationTable[eqIndex].xor1[i].index; + yPos = i; + } + } + + const UINT_32 additionalAlign = 1 << yMax; + + if (additionalAlign >= blkHeight) + { + *pAlignY *= (additionalAlign / blkHeight); + + const UINT_32 alignedHeight = PowTwoAlign(pIn->height, additionalAlign); + + if ((alignedHeight >> yMax) & 1) + { + *pRightXor = 1 << (yPos - m_pipeInterleaveLog2); + } + } + } + else + { + ret = ADDR_INVALIDPARAMS; + } + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeSurfaceInfoTiled +* +* @brief +* Internal function to calculate alignment for tiled surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSurfaceInfoTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret; + + if (IsBlock256b(pIn->swizzleMode)) + { + ret = ComputeSurfaceInfoMicroTiled(pIn, pOut); + } + else + { + ret = ComputeSurfaceInfoMacroTiled(pIn, pOut); + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ComputeSurfaceInfoMicroTiled +* +* @brief +* Internal function to calculate alignment for micro tiled surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceInfoMicroTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret = ComputeBlockDimensionForSurf(&pOut->blockWidth, + &pOut->blockHeight, + &pOut->blockSlices, + pIn->bpp, + pIn->numFrags, + pIn->resourceType, + pIn->swizzleMode); + + if (ret == ADDR_OK) + { + pOut->mipChainPitch = 0; + pOut->mipChainHeight = 0; + pOut->mipChainSlice = 0; + pOut->epitchIsHeight = FALSE; + pOut->mipChainInTail = FALSE; + pOut->firstMipIdInTail = pIn->numMipLevels; + + const UINT_32 blockSize = GetBlockSize(pIn->swizzleMode); + + pOut->pitch = PowTwoAlign(pIn->width, pOut->blockWidth); + pOut->height = PowTwoAlign(pIn->height, pOut->blockHeight); + pOut->numSlices = pIn->numSlices; + pOut->baseAlign = blockSize; + + if (pIn->numMipLevels > 1) + { + const UINT_32 mip0Width = pIn->width; + const UINT_32 mip0Height = pIn->height; + UINT_64 mipSliceSize = 0; + + for (INT_32 i = static_cast(pIn->numMipLevels) - 1; i >= 0; i--) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(mip0Width, mip0Height, 1, i, &mipWidth, &mipHeight); + + const UINT_32 mipActualWidth = PowTwoAlign(mipWidth, pOut->blockWidth); + const UINT_32 mipActualHeight = PowTwoAlign(mipHeight, pOut->blockHeight); + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].pitch = mipActualWidth; + pOut->pMipInfo[i].height = mipActualHeight; + pOut->pMipInfo[i].depth = 1; + pOut->pMipInfo[i].offset = mipSliceSize; + pOut->pMipInfo[i].mipTailOffset = 0; + pOut->pMipInfo[i].macroBlockOffset = mipSliceSize; + } + + mipSliceSize += mipActualWidth * mipActualHeight * (pIn->bpp >> 3); + } + + pOut->sliceSize = mipSliceSize; + pOut->surfSize = mipSliceSize * pOut->numSlices; + } + else + { + pOut->sliceSize = static_cast(pOut->pitch) * pOut->height * (pIn->bpp >> 3); + pOut->surfSize = pOut->sliceSize * pOut->numSlices; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].pitch = pOut->pitch; + pOut->pMipInfo[0].height = pOut->height; + pOut->pMipInfo[0].depth = 1; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].mipTailOffset = 0; + pOut->pMipInfo[0].macroBlockOffset = 0; + } + } + + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ComputeSurfaceInfoMacroTiled +* +* @brief +* Internal function to calculate alignment for macro tiled surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceInfoMacroTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ComputeBlockDimensionForSurf(&pOut->blockWidth, + &pOut->blockHeight, + &pOut->blockSlices, + pIn->bpp, + pIn->numFrags, + pIn->resourceType, + pIn->swizzleMode); + + if (returnCode == ADDR_OK) + { + UINT_32 heightAlign = pOut->blockHeight; + + if (pIn->flags.qbStereo) + { + UINT_32 rightXor = 0; + UINT_32 alignY = 1; + + returnCode = ComputeStereoInfo(pIn, heightAlign, &alignY, &rightXor); + + if (returnCode == ADDR_OK) + { + pOut->pStereoInfo->rightSwizzle = rightXor; + + heightAlign *= alignY; + } + } + + if (returnCode == ADDR_OK) + { + // Mip chain dimesion and epitch has no meaning in GFX10, set to default value + pOut->mipChainPitch = 0; + pOut->mipChainHeight = 0; + pOut->mipChainSlice = 0; + pOut->epitchIsHeight = FALSE; + pOut->mipChainInTail = FALSE; + pOut->firstMipIdInTail = pIn->numMipLevels; + + const UINT_32 blockSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const UINT_32 blockSize = 1 << blockSizeLog2; + + pOut->pitch = PowTwoAlign(pIn->width, pOut->blockWidth); + pOut->height = PowTwoAlign(pIn->height, heightAlign); + pOut->numSlices = PowTwoAlign(pIn->numSlices, pOut->blockSlices); + pOut->baseAlign = blockSize; + + if (pIn->numMipLevels > 1) + { + const Dim3d tailMaxDim = GetMipTailDim(pIn->resourceType, + pIn->swizzleMode, + pOut->blockWidth, + pOut->blockHeight, + pOut->blockSlices); + const UINT_32 mip0Width = pIn->width; + const UINT_32 mip0Height = pIn->height; + const BOOL_32 isThin = IsThin(pIn->resourceType, pIn->swizzleMode); + const UINT_32 mip0Depth = isThin ? 1 : pIn->numSlices; + const UINT_32 maxMipsInTail = GetMaxNumMipsInTail(blockSizeLog2, isThin); + const UINT_32 index = Log2(pIn->bpp >> 3); + UINT_32 firstMipInTail = pIn->numMipLevels; + UINT_64 mipChainSliceSize = 0; + UINT_64 mipSize[MaxMipLevels]; + UINT_64 mipSliceSize[MaxMipLevels]; + + Dim3d fixedTailMaxDim = tailMaxDim; + + if (m_settings.dsMipmapHtileFix && IsZOrderSwizzle(pIn->swizzleMode) && (index <= 1)) + { + fixedTailMaxDim.w /= Block256_2d[index].w / Block256_2d[2].w; + fixedTailMaxDim.h /= Block256_2d[index].h / Block256_2d[2].h; + } + + for (UINT_32 i = 0; i < pIn->numMipLevels; i++) + { + UINT_32 mipWidth, mipHeight, mipDepth; + + GetMipSize(mip0Width, mip0Height, mip0Depth, i, &mipWidth, &mipHeight, &mipDepth); + + if (IsInMipTail(fixedTailMaxDim, maxMipsInTail, mipWidth, mipHeight, pIn->numMipLevels - i)) + { + firstMipInTail = i; + mipChainSliceSize += blockSize / pOut->blockSlices; + break; + } + else + { + const UINT_32 pitch = PowTwoAlign(mipWidth, pOut->blockWidth); + const UINT_32 height = PowTwoAlign(mipHeight, pOut->blockHeight); + const UINT_32 depth = PowTwoAlign(mipDepth, pOut->blockSlices); + const UINT_64 sliceSize = static_cast(pitch) * height * (pIn->bpp >> 3); + + mipSize[i] = sliceSize * depth; + mipSliceSize[i] = sliceSize * pOut->blockSlices; + mipChainSliceSize += sliceSize; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].pitch = pitch; + pOut->pMipInfo[i].height = height; + pOut->pMipInfo[i].depth = depth; + } + } + } + + pOut->sliceSize = mipChainSliceSize; + pOut->surfSize = mipChainSliceSize * pOut->numSlices; + pOut->mipChainInTail = (firstMipInTail == 0) ? TRUE : FALSE; + pOut->firstMipIdInTail = firstMipInTail; + + if (pOut->pMipInfo != NULL) + { + UINT_64 offset = 0; + UINT_64 macroBlkOffset = 0; + UINT_32 tailMaxDepth = 0; + + if (firstMipInTail != pIn->numMipLevels) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(mip0Width, mip0Height, mip0Depth, firstMipInTail, + &mipWidth, &mipHeight, &tailMaxDepth); + + offset = blockSize * PowTwoAlign(tailMaxDepth, pOut->blockSlices) / pOut->blockSlices; + macroBlkOffset = blockSize; + } + + for (INT_32 i = firstMipInTail - 1; i >= 0; i--) + { + pOut->pMipInfo[i].offset = offset; + pOut->pMipInfo[i].macroBlockOffset = macroBlkOffset; + pOut->pMipInfo[i].mipTailOffset = 0; + + offset += mipSize[i]; + macroBlkOffset += mipSliceSize[i]; + } + + UINT_32 pitch = tailMaxDim.w; + UINT_32 height = tailMaxDim.h; + UINT_32 depth = isThin ? 1 : PowTwoAlign(tailMaxDepth, Block256_3d[index].d); + + tailMaxDepth = isThin ? 1 : (depth / Block256_3d[index].d); + + for (UINT_32 i = firstMipInTail; i < pIn->numMipLevels; i++) + { + const UINT_32 m = maxMipsInTail - 1 - (i - firstMipInTail); + const UINT_32 mipOffset = (m > 6) ? (16 << m) : (m << 8); + + pOut->pMipInfo[i].offset = mipOffset * tailMaxDepth; + pOut->pMipInfo[i].mipTailOffset = mipOffset; + pOut->pMipInfo[i].macroBlockOffset = 0; + + pOut->pMipInfo[i].pitch = pitch; + pOut->pMipInfo[i].height = height; + pOut->pMipInfo[i].depth = depth; + + UINT_32 mipX = ((mipOffset >> 9) & 1) | + ((mipOffset >> 10) & 2) | + ((mipOffset >> 11) & 4) | + ((mipOffset >> 12) & 8) | + ((mipOffset >> 13) & 16) | + ((mipOffset >> 14) & 32); + UINT_32 mipY = ((mipOffset >> 8) & 1) | + ((mipOffset >> 9) & 2) | + ((mipOffset >> 10) & 4) | + ((mipOffset >> 11) & 8) | + ((mipOffset >> 12) & 16) | + ((mipOffset >> 13) & 32); + + if (blockSizeLog2 & 1) + { + const UINT_32 temp = mipX; + mipX = mipY; + mipY = temp; + + if (index & 1) + { + mipY = (mipY << 1) | (mipX & 1); + mipX = mipX >> 1; + } + } + + if (isThin) + { + pOut->pMipInfo[i].mipTailCoordX = mipX * Block256_2d[index].w; + pOut->pMipInfo[i].mipTailCoordY = mipY * Block256_2d[index].h; + pOut->pMipInfo[i].mipTailCoordZ = 0; + + pitch = Max(pitch >> 1, Block256_2d[index].w); + height = Max(height >> 1, Block256_2d[index].h); + depth = 1; + } + else + { + pOut->pMipInfo[i].mipTailCoordX = mipX * Block256_3d[index].w; + pOut->pMipInfo[i].mipTailCoordY = mipY * Block256_3d[index].h; + pOut->pMipInfo[i].mipTailCoordZ = 0; + + pitch = Max(pitch >> 1, Block256_3d[index].w); + height = Max(height >> 1, Block256_3d[index].h); + depth = PowTwoAlign(Max(depth >> 1, 1u), Block256_3d[index].d); + } + } + } + } + else + { + pOut->sliceSize = static_cast(pOut->pitch) * pOut->height * (pIn->bpp >> 3) * pIn->numFrags; + pOut->surfSize = pOut->sliceSize * pOut->numSlices; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].pitch = pOut->pitch; + pOut->pMipInfo[0].height = pOut->height; + pOut->pMipInfo[0].depth = IsTex3d(pIn->resourceType)? pOut->numSlices : 1; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].mipTailOffset = 0; + pOut->pMipInfo[0].macroBlockOffset = 0; + pOut->pMipInfo[0].mipTailCoordX = 0; + pOut->pMipInfo[0].mipTailCoordY = 0; + pOut->pMipInfo[0].mipTailCoordZ = 0; + } + } + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeSurfaceAddrFromCoordTiled +* +* @brief +* Internal function to calculate address from coord for tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSurfaceAddrFromCoordTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret; + + if (IsBlock256b(pIn->swizzleMode)) + { + ret = ComputeSurfaceAddrFromCoordMicroTiled(pIn, pOut); + } + else + { + ret = ComputeSurfaceAddrFromCoordMacroTiled(pIn, pOut); + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ComputeOffsetFromEquation +* +* @brief +* Compute offset from equation +* +* @return +* Offset +************************************************************************************************************************ +*/ +UINT_32 Gfx10Lib::ComputeOffsetFromEquation( + const ADDR_EQUATION* pEq, ///< Equation + UINT_32 x, ///< x coord in bytes + UINT_32 y, ///< y coord in pixel + UINT_32 z ///< z coord in slice + ) const +{ + UINT_32 offset = 0; + + for (UINT_32 i = 0; i < pEq->numBits; i++) + { + UINT_32 v = 0; + + if (pEq->addr[i].valid) + { + if (pEq->addr[i].channel == 0) + { + v ^= (x >> pEq->addr[i].index) & 1; + } + else if (pEq->addr[i].channel == 1) + { + v ^= (y >> pEq->addr[i].index) & 1; + } + else + { + ADDR_ASSERT(pEq->addr[i].channel == 2); + v ^= (z >> pEq->addr[i].index) & 1; + } + } + + if (pEq->xor1[i].valid) + { + if (pEq->xor1[i].channel == 0) + { + v ^= (x >> pEq->xor1[i].index) & 1; + } + else if (pEq->xor1[i].channel == 1) + { + v ^= (y >> pEq->xor1[i].index) & 1; + } + else + { + ADDR_ASSERT(pEq->xor1[i].channel == 2); + v ^= (z >> pEq->xor1[i].index) & 1; + } + } + + if (pEq->xor2[i].valid) + { + if (pEq->xor2[i].channel == 0) + { + v ^= (x >> pEq->xor2[i].index) & 1; + } + else if (pEq->xor2[i].channel == 1) + { + v ^= (y >> pEq->xor2[i].index) & 1; + } + else + { + ADDR_ASSERT(pEq->xor2[i].channel == 2); + v ^= (z >> pEq->xor2[i].index) & 1; + } + } + + offset |= (v << i); + } + + return offset; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ComputeOffsetFromSwizzlePattern +* +* @brief +* Compute offset from swizzle pattern +* +* @return +* Offset +************************************************************************************************************************ +*/ +UINT_32 Gfx10Lib::ComputeOffsetFromSwizzlePattern( + const UINT_64* pPattern, ///< Swizzle pattern + UINT_32 numBits, ///< Number of bits in pattern + UINT_32 x, ///< x coord in pixel + UINT_32 y, ///< y coord in pixel + UINT_32 z, ///< z coord in slice + UINT_32 s ///< sample id + ) const +{ + UINT_32 offset = 0; + const ADDR_BIT_SETTING* pSwizzlePattern = reinterpret_cast(pPattern); + + for (UINT_32 i = 0; i < numBits; i++) + { + UINT_32 v = 0; + + if (pSwizzlePattern[i].x != 0) + { + UINT_16 mask = pSwizzlePattern[i].x; + UINT_32 xBits = x; + + while (mask != 0) + { + if (mask & 1) + { + v ^= xBits & 1; + } + + xBits >>= 1; + mask >>= 1; + } + } + + if (pSwizzlePattern[i].y != 0) + { + UINT_16 mask = pSwizzlePattern[i].y; + UINT_32 yBits = y; + + while (mask != 0) + { + if (mask & 1) + { + v ^= yBits & 1; + } + + yBits >>= 1; + mask >>= 1; + } + } + + if (pSwizzlePattern[i].z != 0) + { + UINT_16 mask = pSwizzlePattern[i].z; + UINT_32 zBits = z; + + while (mask != 0) + { + if (mask & 1) + { + v ^= zBits & 1; + } + + zBits >>= 1; + mask >>= 1; + } + } + + if (pSwizzlePattern[i].s != 0) + { + UINT_16 mask = pSwizzlePattern[i].s; + UINT_32 sBits = s; + + while (mask != 0) + { + if (mask & 1) + { + v ^= sBits & 1; + } + + sBits >>= 1; + mask >>= 1; + } + } + + offset |= (v << i); + } + + return offset; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::GetSwizzlePatternInfo +* +* @brief +* Get swizzle pattern +* +* @return +* Swizzle pattern information +************************************************************************************************************************ +*/ +const ADDR_SW_PATINFO* Gfx10Lib::GetSwizzlePatternInfo( + AddrSwizzleMode swizzleMode, ///< Swizzle mode + AddrResourceType resourceType, ///< Resource type + UINT_32 elemLog2, ///< Element size in bytes log2 + UINT_32 numFrag ///< Number of fragment + ) const +{ + const UINT_32 index = IsXor(swizzleMode) ? (m_colorBaseIndex + elemLog2) : elemLog2; + const ADDR_SW_PATINFO* patInfo = NULL; + const UINT_32 swizzleMask = 1 << swizzleMode; + + if (IsLinear(swizzleMode) == FALSE) + { + if (IsBlockVariable(swizzleMode)) + { + if (m_blockVarSizeLog2 != 0) + { + ADDR_ASSERT(m_settings.supportRbPlus); + + if (IsRtOptSwizzle(swizzleMode)) + { + if (numFrag == 1) + { + patInfo = SW_VAR_R_X_1xaa_RBPLUS_PATINFO; + } + else if (numFrag == 2) + { + patInfo = SW_VAR_R_X_2xaa_RBPLUS_PATINFO; + } + else if (numFrag == 4) + { + patInfo = SW_VAR_R_X_4xaa_RBPLUS_PATINFO; + } + else + { + ADDR_ASSERT(numFrag == 8); + patInfo = SW_VAR_R_X_8xaa_RBPLUS_PATINFO; + } + } + else if (IsZOrderSwizzle(swizzleMode)) + { + if (numFrag == 1) + { + patInfo = SW_VAR_Z_X_1xaa_RBPLUS_PATINFO; + } + else if (numFrag == 2) + { + patInfo = SW_VAR_Z_X_2xaa_RBPLUS_PATINFO; + } + else if (numFrag == 4) + { + patInfo = SW_VAR_Z_X_4xaa_RBPLUS_PATINFO; + } + else + { + ADDR_ASSERT(numFrag == 8); + patInfo = SW_VAR_Z_X_8xaa_RBPLUS_PATINFO; + } + } + } + } + else if (resourceType == ADDR_RSRC_TEX_3D) + { + ADDR_ASSERT(numFrag == 1); + + if ((swizzleMask & Gfx10Rsrc3dSwModeMask) != 0) + { + if (IsRtOptSwizzle(swizzleMode)) + { + patInfo = m_settings.supportRbPlus ? SW_64K_R_X_1xaa_RBPLUS_PATINFO : SW_64K_R_X_1xaa_PATINFO; + } + else if (IsZOrderSwizzle(swizzleMode)) + { + patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_1xaa_RBPLUS_PATINFO : SW_64K_Z_X_1xaa_PATINFO; + } + else if (IsDisplaySwizzle(resourceType, swizzleMode)) + { + ADDR_ASSERT(swizzleMode == ADDR_SW_64KB_D_X); + patInfo = m_settings.supportRbPlus ? SW_64K_D3_X_RBPLUS_PATINFO : SW_64K_D3_X_PATINFO; + } + else + { + ADDR_ASSERT(IsStandardSwizzle(resourceType, swizzleMode)); + + if (IsBlock4kb(swizzleMode)) + { + if (swizzleMode == ADDR_SW_4KB_S) + { + patInfo = m_settings.supportRbPlus ? SW_4K_S3_RBPLUS_PATINFO : SW_4K_S3_PATINFO; + } + else + { + ADDR_ASSERT(swizzleMode == ADDR_SW_4KB_S_X); + patInfo = m_settings.supportRbPlus ? SW_4K_S3_X_RBPLUS_PATINFO : SW_4K_S3_X_PATINFO; + } + } + else + { + if (swizzleMode == ADDR_SW_64KB_S) + { + patInfo = m_settings.supportRbPlus ? SW_64K_S3_RBPLUS_PATINFO : SW_64K_S3_PATINFO; + } + else if (swizzleMode == ADDR_SW_64KB_S_X) + { + patInfo = m_settings.supportRbPlus ? SW_64K_S3_X_RBPLUS_PATINFO : SW_64K_S3_X_PATINFO; + } + else + { + ADDR_ASSERT(swizzleMode == ADDR_SW_64KB_S_T); + patInfo = m_settings.supportRbPlus ? SW_64K_S3_T_RBPLUS_PATINFO : SW_64K_S3_T_PATINFO; + } + } + } + } + } + else + { + if ((swizzleMask & Gfx10Rsrc2dSwModeMask) != 0) + { + if (IsBlock256b(swizzleMode)) + { + if (swizzleMode == ADDR_SW_256B_S) + { + patInfo = m_settings.supportRbPlus ? SW_256_S_RBPLUS_PATINFO : SW_256_S_PATINFO; + } + else + { + ADDR_ASSERT(swizzleMode == ADDR_SW_256B_D); + patInfo = m_settings.supportRbPlus ? SW_256_D_RBPLUS_PATINFO : SW_256_D_PATINFO; + } + } + else if (IsBlock4kb(swizzleMode)) + { + if (IsStandardSwizzle(resourceType, swizzleMode)) + { + if (swizzleMode == ADDR_SW_4KB_S) + { + patInfo = m_settings.supportRbPlus ? SW_4K_S_RBPLUS_PATINFO : SW_4K_S_PATINFO; + } + else + { + ADDR_ASSERT(swizzleMode == ADDR_SW_4KB_S_X); + patInfo = m_settings.supportRbPlus ? SW_4K_S_X_RBPLUS_PATINFO : SW_4K_S_X_PATINFO; + } + } + else + { + if (swizzleMode == ADDR_SW_4KB_D) + { + patInfo = m_settings.supportRbPlus ? SW_4K_D_RBPLUS_PATINFO : SW_4K_D_PATINFO; + } + else + { + ADDR_ASSERT(swizzleMode == ADDR_SW_4KB_D_X); + patInfo = m_settings.supportRbPlus ? SW_4K_D_X_RBPLUS_PATINFO : SW_4K_D_X_PATINFO; + } + } + } + else + { + if (IsRtOptSwizzle(swizzleMode)) + { + if (numFrag == 1) + { + patInfo = m_settings.supportRbPlus ? SW_64K_R_X_1xaa_RBPLUS_PATINFO : SW_64K_R_X_1xaa_PATINFO; + } + else if (numFrag == 2) + { + patInfo = m_settings.supportRbPlus ? SW_64K_R_X_2xaa_RBPLUS_PATINFO : SW_64K_R_X_2xaa_PATINFO; + } + else if (numFrag == 4) + { + patInfo = m_settings.supportRbPlus ? SW_64K_R_X_4xaa_RBPLUS_PATINFO : SW_64K_R_X_4xaa_PATINFO; + } + else + { + ADDR_ASSERT(numFrag == 8); + patInfo = m_settings.supportRbPlus ? SW_64K_R_X_8xaa_RBPLUS_PATINFO : SW_64K_R_X_8xaa_PATINFO; + } + } + else if (IsZOrderSwizzle(swizzleMode)) + { + if (numFrag == 1) + { + patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_1xaa_RBPLUS_PATINFO : SW_64K_Z_X_1xaa_PATINFO; + } + else if (numFrag == 2) + { + patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_2xaa_RBPLUS_PATINFO : SW_64K_Z_X_2xaa_PATINFO; + } + else if (numFrag == 4) + { + patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_4xaa_RBPLUS_PATINFO : SW_64K_Z_X_4xaa_PATINFO; + } + else + { + ADDR_ASSERT(numFrag == 8); + patInfo = m_settings.supportRbPlus ? SW_64K_Z_X_8xaa_RBPLUS_PATINFO : SW_64K_Z_X_8xaa_PATINFO; + } + } + else if (IsDisplaySwizzle(resourceType, swizzleMode)) + { + if (swizzleMode == ADDR_SW_64KB_D) + { + patInfo = m_settings.supportRbPlus ? SW_64K_D_RBPLUS_PATINFO : SW_64K_D_PATINFO; + } + else if (swizzleMode == ADDR_SW_64KB_D_X) + { + patInfo = m_settings.supportRbPlus ? SW_64K_D_X_RBPLUS_PATINFO : SW_64K_D_X_PATINFO; + } + else + { + ADDR_ASSERT(swizzleMode == ADDR_SW_64KB_D_T); + patInfo = m_settings.supportRbPlus ? SW_64K_D_T_RBPLUS_PATINFO : SW_64K_D_T_PATINFO; + } + } + else + { + if (swizzleMode == ADDR_SW_64KB_S) + { + patInfo = m_settings.supportRbPlus ? SW_64K_S_RBPLUS_PATINFO : SW_64K_S_PATINFO; + } + else if (swizzleMode == ADDR_SW_64KB_S_X) + { + patInfo = m_settings.supportRbPlus ? SW_64K_S_X_RBPLUS_PATINFO : SW_64K_S_X_PATINFO; + } + else + { + ADDR_ASSERT(swizzleMode == ADDR_SW_64KB_S_T); + patInfo = m_settings.supportRbPlus ? SW_64K_S_T_RBPLUS_PATINFO : SW_64K_S_T_PATINFO; + } + } + } + } + } + } + + return (patInfo != NULL) ? &patInfo[index] : NULL; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ComputeSurfaceAddrFromCoordMicroTiled +* +* @brief +* Internal function to calculate address from coord for micro tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceAddrFromCoordMicroTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels]; + + localIn.swizzleMode = pIn->swizzleMode; + localIn.flags = pIn->flags; + localIn.resourceType = pIn->resourceType; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unalignedWidth, 1u); + localIn.height = Max(pIn->unalignedHeight, 1u); + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + localIn.numFrags = Max(pIn->numFrags, 1u); + localOut.pMipInfo = mipInfo; + + ADDR_E_RETURNCODE ret = ComputeSurfaceInfoMicroTiled(&localIn, &localOut); + + if (ret == ADDR_OK) + { + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 rsrcType = static_cast(pIn->resourceType) - 1; + const UINT_32 swMode = static_cast(pIn->swizzleMode); + const UINT_32 eqIndex = m_equationLookupTable[rsrcType][swMode][elemLog2]; + + if (eqIndex != ADDR_INVALID_EQUATION_INDEX) + { + const UINT_32 pb = mipInfo[pIn->mipId].pitch / localOut.blockWidth; + const UINT_32 yb = pIn->y / localOut.blockHeight; + const UINT_32 xb = pIn->x / localOut.blockWidth; + const UINT_32 blockIndex = yb * pb + xb; + const UINT_32 blockSize = 256; + const UINT_32 blk256Offset = ComputeOffsetFromEquation(&m_equationTable[eqIndex], + pIn->x << elemLog2, + pIn->y, + 0); + pOut->addr = localOut.sliceSize * pIn->slice + + mipInfo[pIn->mipId].macroBlockOffset + + (blockIndex * blockSize) + + blk256Offset; + } + else + { + ret = ADDR_INVALIDPARAMS; + } + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::ComputeSurfaceAddrFromCoordMacroTiled +* +* @brief +* Internal function to calculate address from coord for macro tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceAddrFromCoordMacroTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels]; + + localIn.swizzleMode = pIn->swizzleMode; + localIn.flags = pIn->flags; + localIn.resourceType = pIn->resourceType; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unalignedWidth, 1u); + localIn.height = Max(pIn->unalignedHeight, 1u); + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + localIn.numFrags = Max(pIn->numFrags, 1u); + localOut.pMipInfo = mipInfo; + + ADDR_E_RETURNCODE ret = ComputeSurfaceInfoMacroTiled(&localIn, &localOut); + + if (ret == ADDR_OK) + { + const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const UINT_32 blkMask = (1 << blkSizeLog2) - 1; + const UINT_32 pipeMask = (1 << m_pipesLog2) - 1; + const UINT_32 bankMask = ((1 << GetBankXorBits(blkSizeLog2)) - 1) << (m_pipesLog2 + ColumnBits); + const UINT_32 pipeBankXor = IsXor(pIn->swizzleMode) ? + (((pIn->pipeBankXor & (pipeMask | bankMask)) << m_pipeInterleaveLog2) & blkMask) : 0; + + if (localIn.numFrags > 1) + { + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + pIn->resourceType, + elemLog2, + localIn.numFrags); + + if (pPatInfo != NULL) + { + const UINT_32 pb = localOut.pitch / localOut.blockWidth; + const UINT_32 yb = pIn->y / localOut.blockHeight; + const UINT_32 xb = pIn->x / localOut.blockWidth; + const UINT_64 blkIdx = yb * pb + xb; + + ADDR_BIT_SETTING fullSwizzlePattern[20]; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + + const UINT_32 blkOffset = + ComputeOffsetFromSwizzlePattern(reinterpret_cast(fullSwizzlePattern), + blkSizeLog2, + pIn->x, + pIn->y, + pIn->slice, + pIn->sample); + + pOut->addr = (localOut.sliceSize * pIn->slice) + + (blkIdx << blkSizeLog2) + + (blkOffset ^ pipeBankXor); + } + else + { + ret = ADDR_INVALIDPARAMS; + } + } + else + { + const UINT_32 rsrcIdx = (pIn->resourceType == ADDR_RSRC_TEX_3D) ? 1 : 0; + const UINT_32 swMode = static_cast(pIn->swizzleMode); + const UINT_32 eqIndex = m_equationLookupTable[rsrcIdx][swMode][elemLog2]; + + if (eqIndex != ADDR_INVALID_EQUATION_INDEX) + { + const BOOL_32 inTail = (mipInfo[pIn->mipId].mipTailOffset != 0) ? TRUE : FALSE; + const BOOL_32 isThin = IsThin(pIn->resourceType, pIn->swizzleMode); + const UINT_64 sliceSize = isThin ? localOut.sliceSize : (localOut.sliceSize * localOut.blockSlices); + const UINT_32 sliceId = isThin ? pIn->slice : (pIn->slice / localOut.blockSlices); + const UINT_32 x = inTail ? (pIn->x + mipInfo[pIn->mipId].mipTailCoordX) : pIn->x; + const UINT_32 y = inTail ? (pIn->y + mipInfo[pIn->mipId].mipTailCoordY) : pIn->y; + const UINT_32 z = inTail ? (pIn->slice + mipInfo[pIn->mipId].mipTailCoordZ) : pIn->slice; + const UINT_32 pb = mipInfo[pIn->mipId].pitch / localOut.blockWidth; + const UINT_32 yb = pIn->y / localOut.blockHeight; + const UINT_32 xb = pIn->x / localOut.blockWidth; + const UINT_64 blkIdx = yb * pb + xb; + const UINT_32 blkOffset = ComputeOffsetFromEquation(&m_equationTable[eqIndex], + x << elemLog2, + y, + z); + pOut->addr = sliceSize * sliceId + + mipInfo[pIn->mipId].macroBlockOffset + + (blkIdx << blkSizeLog2) + + (blkOffset ^ pipeBankXor); + } + else + { + ret = ADDR_INVALIDPARAMS; + } + } + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeMaxBaseAlignments +* +* @brief +* Gets maximum alignments +* @return +* maximum alignments +************************************************************************************************************************ +*/ +UINT_32 Gfx10Lib::HwlComputeMaxBaseAlignments() const +{ + return m_blockVarSizeLog2 ? Max(Size64K, 1u << m_blockVarSizeLog2) : Size64K; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeMaxMetaBaseAlignments +* +* @brief +* Gets maximum alignments for metadata +* @return +* maximum alignments for metadata +************************************************************************************************************************ +*/ +UINT_32 Gfx10Lib::HwlComputeMaxMetaBaseAlignments() const +{ + Dim3d metaBlk; + + const AddrSwizzleMode ValidSwizzleModeForXmask[] = + { + ADDR_SW_64KB_Z_X, + m_blockVarSizeLog2 ? ADDR_SW_VAR_Z_X : ADDR_SW_64KB_Z_X, + }; + + UINT_32 maxBaseAlignHtile = 0; + UINT_32 maxBaseAlignCmask = 0; + + for (UINT_32 swIdx = 0; swIdx < sizeof(ValidSwizzleModeForXmask) / sizeof(ValidSwizzleModeForXmask[0]); swIdx++) + { + for (UINT_32 bppLog2 = 0; bppLog2 < 3; bppLog2++) + { + for (UINT_32 numFragLog2 = 0; numFragLog2 < 4; numFragLog2++) + { + // Max base alignment for Htile + const UINT_32 metaBlkSizeHtile = GetMetaBlkSize(Gfx10DataDepthStencil, + ADDR_RSRC_TEX_2D, + ValidSwizzleModeForXmask[swIdx], + bppLog2, + numFragLog2, + TRUE, + &metaBlk); + + maxBaseAlignHtile = Max(maxBaseAlignHtile, metaBlkSizeHtile); + } + } + + // Max base alignment for Cmask + const UINT_32 metaBlkSizeCmask = GetMetaBlkSize(Gfx10DataFmask, + ADDR_RSRC_TEX_2D, + ValidSwizzleModeForXmask[swIdx], + 0, + 0, + TRUE, + &metaBlk); + + maxBaseAlignCmask = Max(maxBaseAlignCmask, metaBlkSizeCmask); + } + + // Max base alignment for 2D Dcc + const AddrSwizzleMode ValidSwizzleModeForDcc2D[] = + { + ADDR_SW_64KB_S_X, + ADDR_SW_64KB_D_X, + ADDR_SW_64KB_R_X, + m_blockVarSizeLog2 ? ADDR_SW_VAR_R_X : ADDR_SW_64KB_R_X, + }; + + UINT_32 maxBaseAlignDcc2D = 0; + + for (UINT_32 swIdx = 0; swIdx < sizeof(ValidSwizzleModeForDcc2D) / sizeof(ValidSwizzleModeForDcc2D[0]); swIdx++) + { + for (UINT_32 bppLog2 = 0; bppLog2 < MaxNumOfBpp; bppLog2++) + { + for (UINT_32 numFragLog2 = 0; numFragLog2 < 4; numFragLog2++) + { + const UINT_32 metaBlkSize2D = GetMetaBlkSize(Gfx10DataColor, + ADDR_RSRC_TEX_2D, + ValidSwizzleModeForDcc2D[swIdx], + bppLog2, + numFragLog2, + TRUE, + &metaBlk); + + maxBaseAlignDcc2D = Max(maxBaseAlignDcc2D, metaBlkSize2D); + } + } + } + + // Max base alignment for 3D Dcc + const AddrSwizzleMode ValidSwizzleModeForDcc3D[] = + { + ADDR_SW_64KB_Z_X, + ADDR_SW_64KB_S_X, + ADDR_SW_64KB_D_X, + ADDR_SW_64KB_R_X, + m_blockVarSizeLog2 ? ADDR_SW_VAR_R_X : ADDR_SW_64KB_R_X, + }; + + UINT_32 maxBaseAlignDcc3D = 0; + + for (UINT_32 swIdx = 0; swIdx < sizeof(ValidSwizzleModeForDcc3D) / sizeof(ValidSwizzleModeForDcc3D[0]); swIdx++) + { + for (UINT_32 bppLog2 = 0; bppLog2 < MaxNumOfBpp; bppLog2++) + { + const UINT_32 metaBlkSize3D = GetMetaBlkSize(Gfx10DataColor, + ADDR_RSRC_TEX_3D, + ValidSwizzleModeForDcc3D[swIdx], + bppLog2, + 0, + TRUE, + &metaBlk); + + maxBaseAlignDcc3D = Max(maxBaseAlignDcc3D, metaBlkSize3D); + } + } + + return Max(Max(maxBaseAlignHtile, maxBaseAlignCmask), Max(maxBaseAlignDcc2D, maxBaseAlignDcc3D)); +} + +/** +************************************************************************************************************************ +* Gfx10Lib::GetMetaElementSizeLog2 +* +* @brief +* Gets meta data element size log2 +* @return +* Meta data element size log2 +************************************************************************************************************************ +*/ +INT_32 Gfx10Lib::GetMetaElementSizeLog2( + Gfx10DataType dataType) ///< Data surface type +{ + INT_32 elemSizeLog2 = 0; + + if (dataType == Gfx10DataColor) + { + elemSizeLog2 = 0; + } + else if (dataType == Gfx10DataDepthStencil) + { + elemSizeLog2 = 2; + } + else + { + ADDR_ASSERT(dataType == Gfx10DataFmask); + elemSizeLog2 = -1; + } + + return elemSizeLog2; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::GetMetaCacheSizeLog2 +* +* @brief +* Gets meta data cache line size log2 +* @return +* Meta data cache line size log2 +************************************************************************************************************************ +*/ +INT_32 Gfx10Lib::GetMetaCacheSizeLog2( + Gfx10DataType dataType) ///< Data surface type +{ + INT_32 cacheSizeLog2 = 0; + + if (dataType == Gfx10DataColor) + { + cacheSizeLog2 = 6; + } + else if (dataType == Gfx10DataDepthStencil) + { + cacheSizeLog2 = 8; + } + else + { + ADDR_ASSERT(dataType == Gfx10DataFmask); + cacheSizeLog2 = 8; + } + return cacheSizeLog2; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlComputeSurfaceInfoLinear +* +* @brief +* Internal function to calculate alignment for linear surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSurfaceInfoLinear( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (IsTex1d(pIn->resourceType) && (pIn->height > 1)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + const UINT_32 elementBytes = pIn->bpp >> 3; + const UINT_32 pitchAlign = (pIn->swizzleMode == ADDR_SW_LINEAR_GENERAL) ? 1 : (256 / elementBytes); + const UINT_32 mipDepth = (pIn->resourceType == ADDR_RSRC_TEX_3D) ? pIn->numSlices : 1; + UINT_32 pitch = PowTwoAlign(pIn->width, pitchAlign); + UINT_32 actualHeight = pIn->height; + UINT_64 sliceSize = 0; + + if (pIn->numMipLevels > 1) + { + for (INT_32 i = static_cast(pIn->numMipLevels) - 1; i >= 0; i--) + { + UINT_32 mipWidth, mipHeight; + + GetMipSize(pIn->width, pIn->height, 1, i, &mipWidth, &mipHeight); + + const UINT_32 mipActualWidth = PowTwoAlign(mipWidth, pitchAlign); + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[i].pitch = mipActualWidth; + pOut->pMipInfo[i].height = mipHeight; + pOut->pMipInfo[i].depth = mipDepth; + pOut->pMipInfo[i].offset = sliceSize; + pOut->pMipInfo[i].mipTailOffset = 0; + pOut->pMipInfo[i].macroBlockOffset = sliceSize; + } + + sliceSize += static_cast(mipActualWidth) * mipHeight * elementBytes; + } + } + else + { + returnCode = ApplyCustomizedPitchHeight(pIn, elementBytes, pitchAlign, &pitch, &actualHeight); + + if (returnCode == ADDR_OK) + { + sliceSize = static_cast(pitch) * actualHeight * elementBytes; + + if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].pitch = pitch; + pOut->pMipInfo[0].height = actualHeight; + pOut->pMipInfo[0].depth = mipDepth; + pOut->pMipInfo[0].offset = 0; + pOut->pMipInfo[0].mipTailOffset = 0; + pOut->pMipInfo[0].macroBlockOffset = 0; + } + } + } + + if (returnCode == ADDR_OK) + { + pOut->pitch = pitch; + pOut->height = actualHeight; + pOut->numSlices = pIn->numSlices; + pOut->sliceSize = sliceSize; + pOut->surfSize = sliceSize * pOut->numSlices; + pOut->baseAlign = (pIn->swizzleMode == ADDR_SW_LINEAR_GENERAL) ? elementBytes : 256; + pOut->blockWidth = pitchAlign; + pOut->blockHeight = 1; + pOut->blockSlices = 1; + + // Following members are useless on GFX10 + pOut->mipChainPitch = 0; + pOut->mipChainHeight = 0; + pOut->mipChainSlice = 0; + pOut->epitchIsHeight = FALSE; + + // Post calculation validate + ADDR_ASSERT(pOut->sliceSize > 0); + } + } + + return returnCode; +} + +} // V2 +} // Addr diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.h new file mode 100644 index 0000000000..c9a24c04cc --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.h @@ -0,0 +1,583 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +************************************************************************************************************************ +* @file gfx10addrlib.h +* @brief Contains the Gfx10Lib class definition. +************************************************************************************************************************ +*/ + +#ifndef __GFX10_ADDR_LIB_H__ +#define __GFX10_ADDR_LIB_H__ + +#include "addrlib2.h" +#include "coord.h" +#include "gfx10SwizzlePattern.h" + +namespace Addr +{ +namespace V2 +{ + +/** +************************************************************************************************************************ +* @brief GFX10 specific settings structure. +************************************************************************************************************************ +*/ +struct Gfx10ChipSettings +{ + struct + { + UINT_32 reserved1 : 32; + + // Misc configuration bits + UINT_32 isDcn2 : 1; + UINT_32 supportRbPlus : 1; + UINT_32 dsMipmapHtileFix : 1; + UINT_32 dccUnsup3DSwDis : 1; + UINT_32 reserved2 : 28; + }; +}; + +/** +************************************************************************************************************************ +* @brief GFX10 data surface type. +************************************************************************************************************************ +*/ +enum Gfx10DataType +{ + Gfx10DataColor, + Gfx10DataDepthStencil, + Gfx10DataFmask +}; + +const UINT_32 Gfx10LinearSwModeMask = (1u << ADDR_SW_LINEAR); + +const UINT_32 Gfx10Blk256BSwModeMask = (1u << ADDR_SW_256B_S) | + (1u << ADDR_SW_256B_D); + +const UINT_32 Gfx10Blk4KBSwModeMask = (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_4KB_D_X); + +const UINT_32 Gfx10Blk64KBSwModeMask = (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Gfx10BlkVarSwModeMask = (1u << ADDR_SW_VAR_Z_X) | + (1u << ADDR_SW_VAR_R_X); + +const UINT_32 Gfx10ZSwModeMask = (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_VAR_Z_X); + +const UINT_32 Gfx10StandardSwModeMask = (1u << ADDR_SW_256B_S) | + (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_64KB_S_X); + +const UINT_32 Gfx10DisplaySwModeMask = (1u << ADDR_SW_256B_D) | + (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_64KB_D_X); + +const UINT_32 Gfx10RenderSwModeMask = (1u << ADDR_SW_64KB_R_X) | + (1u << ADDR_SW_VAR_R_X); + +const UINT_32 Gfx10XSwModeMask = (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_64KB_R_X) | + Gfx10BlkVarSwModeMask; + +const UINT_32 Gfx10TSwModeMask = (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_64KB_D_T); + +const UINT_32 Gfx10XorSwModeMask = Gfx10XSwModeMask | + Gfx10TSwModeMask; + +const UINT_32 Gfx10Rsrc1dSwModeMask = Gfx10LinearSwModeMask | + Gfx10RenderSwModeMask | + Gfx10ZSwModeMask; + +const UINT_32 Gfx10Rsrc2dSwModeMask = Gfx10LinearSwModeMask | + Gfx10Blk256BSwModeMask | + Gfx10Blk4KBSwModeMask | + Gfx10Blk64KBSwModeMask | + Gfx10BlkVarSwModeMask; + +const UINT_32 Gfx10Rsrc3dSwModeMask = (1u << ADDR_SW_LINEAR) | + (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_64KB_R_X) | + Gfx10BlkVarSwModeMask; + +const UINT_32 Gfx10Rsrc2dPrtSwModeMask = (Gfx10Blk4KBSwModeMask | Gfx10Blk64KBSwModeMask) & ~Gfx10XSwModeMask; + +const UINT_32 Gfx10Rsrc3dPrtSwModeMask = Gfx10Rsrc2dPrtSwModeMask & ~Gfx10DisplaySwModeMask; + +const UINT_32 Gfx10Rsrc3dThin64KBSwModeMask = (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Gfx10Rsrc3dThinSwModeMask = Gfx10Rsrc3dThin64KBSwModeMask | Gfx10BlkVarSwModeMask; + +const UINT_32 Gfx10Rsrc3dThickSwModeMask = Gfx10Rsrc3dSwModeMask & ~(Gfx10Rsrc3dThinSwModeMask | Gfx10LinearSwModeMask); + +const UINT_32 Gfx10Rsrc3dThick4KBSwModeMask = Gfx10Rsrc3dThickSwModeMask & Gfx10Blk4KBSwModeMask; + +const UINT_32 Gfx10Rsrc3dThick64KBSwModeMask = Gfx10Rsrc3dThickSwModeMask & Gfx10Blk64KBSwModeMask; + +const UINT_32 Gfx10MsaaSwModeMask = Gfx10ZSwModeMask | + Gfx10RenderSwModeMask; + +const UINT_32 Dcn2NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) | + (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Dcn2Bpp64SwModeMask = (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_64KB_D_X) | + Dcn2NonBpp64SwModeMask; +/** +************************************************************************************************************************ +* @brief This class is the GFX10 specific address library +* function set. +************************************************************************************************************************ +*/ +class Gfx10Lib : public Lib +{ +public: + /// Creates Gfx10Lib object + static Addr::Lib* CreateObj(const Client* pClient) + { + VOID* pMem = Object::ClientAlloc(sizeof(Gfx10Lib), pClient); + return (pMem != NULL) ? new (pMem) Gfx10Lib(pClient) : NULL; + } + +protected: + Gfx10Lib(const Client* pClient); + virtual ~Gfx10Lib(); + + virtual BOOL_32 HwlIsStandardSwizzle( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isStd; + } + + virtual BOOL_32 HwlIsDisplaySwizzle( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isDisp; + } + + virtual BOOL_32 HwlIsThin( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return ((IsTex1d(resourceType) == TRUE) || + (IsTex2d(resourceType) == TRUE) || + ((IsTex3d(resourceType) == TRUE) && + (m_swizzleModeTable[swizzleMode].isStd == FALSE) && + (m_swizzleModeTable[swizzleMode].isDisp == FALSE))); + } + + virtual BOOL_32 HwlIsThick( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return ((IsTex3d(resourceType) == TRUE) && + (m_swizzleModeTable[swizzleMode].isStd || m_swizzleModeTable[swizzleMode].isDisp)); + } + + virtual ADDR_E_RETURNCODE HwlComputeHtileInfo( + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeCmaskInfo( + const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, + ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeDccInfo( + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( + const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr( + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut); + + virtual UINT_32 HwlGetEquationIndex( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const + { + *ppEquationTable = m_equationTable; + + return m_numEquations; + } + + virtual ADDR_E_RETURNCODE HwlComputePipeBankXor( + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor( + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern( + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoLinear( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual UINT_32 HwlComputeMaxBaseAlignments() const; + + virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; + + virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn); + + virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision); + + // Initialize equation table + VOID InitEquationTable(); + + ADDR_E_RETURNCODE ComputeSurfaceInfoMacroTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceInfoMicroTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMacroTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMicroTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + +private: + UINT_32 ComputeOffsetFromSwizzlePattern( + const UINT_64* pPattern, + UINT_32 numBits, + UINT_32 x, + UINT_32 y, + UINT_32 z, + UINT_32 s) const; + + UINT_32 ComputeOffsetFromEquation( + const ADDR_EQUATION* pEq, + UINT_32 x, + UINT_32 y, + UINT_32 z) const; + + ADDR_E_RETURNCODE ComputeStereoInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + UINT_32 blkHeight, + UINT_32* pAlignY, + UINT_32* pRightXor) const; + + Dim3d GetDccCompressBlk( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 bpp) const + { + UINT_32 index = Log2(bpp >> 3); + Dim3d compressBlkDim; + + if (IsThin(resourceType, swizzleMode)) + { + compressBlkDim.w = Block256_2d[index].w; + compressBlkDim.h = Block256_2d[index].h; + compressBlkDim.d = 1; + } + else + { + compressBlkDim = Block256_3d[index]; + } + + return compressBlkDim; + } + + static void GetMipSize( + UINT_32 mip0Width, + UINT_32 mip0Height, + UINT_32 mip0Depth, + UINT_32 mipId, + UINT_32* pMipWidth, + UINT_32* pMipHeight, + UINT_32* pMipDepth = NULL) + { + *pMipWidth = ShiftCeil(Max(mip0Width, 1u), mipId); + *pMipHeight = ShiftCeil(Max(mip0Height, 1u), mipId); + + if (pMipDepth != NULL) + { + *pMipDepth = ShiftCeil(Max(mip0Depth, 1u), mipId); + } + } + + const ADDR_SW_PATINFO* GetSwizzlePatternInfo( + AddrSwizzleMode swizzleMode, + AddrResourceType resourceType, + UINT_32 log2Elem, + UINT_32 numFrag) const; + + VOID GetSwizzlePatternFromPatternInfo( + const ADDR_SW_PATINFO* pPatInfo, + ADDR_BIT_SETTING (&pSwizzle)[20]) const + { + memcpy(pSwizzle, + GFX10_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx], + sizeof(GFX10_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx])); + + memcpy(&pSwizzle[8], + GFX10_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx], + sizeof(GFX10_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx])); + + memcpy(&pSwizzle[12], + GFX10_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx], + sizeof(GFX10_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx])); + + memcpy(&pSwizzle[16], + GFX10_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx], + sizeof(GFX10_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx])); + } + + VOID ConvertSwizzlePatternToEquation( + UINT_32 elemLog2, + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + const ADDR_SW_PATINFO* pPatInfo, + ADDR_EQUATION* pEquation) const; + + static INT_32 GetMetaElementSizeLog2(Gfx10DataType dataType); + + static INT_32 GetMetaCacheSizeLog2(Gfx10DataType dataType); + + void GetBlk256SizeLog2( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2, + UINT_32 numSamplesLog2, + Dim3d* pBlock) const; + + void GetCompressedBlockSizeLog2( + Gfx10DataType dataType, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2, + UINT_32 numSamplesLog2, + Dim3d* pBlock) const; + + INT_32 GetMetaOverlapLog2( + Gfx10DataType dataType, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2, + UINT_32 numSamplesLog2) const; + + INT_32 Get3DMetaOverlapLog2( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2) const; + + UINT_32 GetMetaBlkSize( + Gfx10DataType dataType, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 elemLog2, + UINT_32 numSamplesLog2, + BOOL_32 pipeAlign, + Dim3d* pBlock) const; + + INT_32 GetPipeRotateAmount( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const; + + INT_32 GetEffectiveNumPipes() const + { + return ((m_settings.supportRbPlus == FALSE) || + ((m_numSaLog2 + 1) >= m_pipesLog2)) ? m_pipesLog2 : m_numSaLog2 + 1; + } + + BOOL_32 IsRbAligned( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + const BOOL_32 isRtopt = IsRtOptSwizzle(swizzleMode); + const BOOL_32 isZ = IsZOrderSwizzle(swizzleMode); + const BOOL_32 isDisplay = IsDisplaySwizzle(swizzleMode); + + return (IsTex2d(resourceType) && (isRtopt || isZ)) || + (IsTex3d(resourceType) && isDisplay); + + } + + BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + UINT_32 GetMaxNumMipsInTail(UINT_32 blockSizeLog2, BOOL_32 isThin) const; + + static ADDR2_BLOCK_SET GetAllowedBlockSet(ADDR2_SWMODE_SET allowedSwModeSet, AddrResourceType rsrcType) + { + ADDR2_BLOCK_SET allowedBlockSet = {}; + + allowedBlockSet.micro = (allowedSwModeSet.value & Gfx10Blk256BSwModeMask) ? TRUE : FALSE; + allowedBlockSet.linear = (allowedSwModeSet.value & Gfx10LinearSwModeMask) ? TRUE : FALSE; + allowedBlockSet.var = (allowedSwModeSet.value & Gfx10BlkVarSwModeMask) ? TRUE : FALSE; + + if (rsrcType == ADDR_RSRC_TEX_3D) + { + allowedBlockSet.macroThick4KB = (allowedSwModeSet.value & Gfx10Rsrc3dThick4KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx10Rsrc3dThin64KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThick64KB = (allowedSwModeSet.value & Gfx10Rsrc3dThick64KBSwModeMask) ? TRUE : FALSE; + } + else + { + allowedBlockSet.macroThin4KB = (allowedSwModeSet.value & Gfx10Blk4KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx10Blk64KBSwModeMask) ? TRUE : FALSE; + } + + return allowedBlockSet; + } + + static ADDR2_SWTYPE_SET GetAllowedSwSet(ADDR2_SWMODE_SET allowedSwModeSet) + { + ADDR2_SWTYPE_SET allowedSwSet = {}; + + allowedSwSet.sw_Z = (allowedSwModeSet.value & Gfx10ZSwModeMask) ? TRUE : FALSE; + allowedSwSet.sw_S = (allowedSwModeSet.value & Gfx10StandardSwModeMask) ? TRUE : FALSE; + allowedSwSet.sw_D = (allowedSwModeSet.value & Gfx10DisplaySwModeMask) ? TRUE : FALSE; + allowedSwSet.sw_R = (allowedSwModeSet.value & Gfx10RenderSwModeMask) ? TRUE : FALSE; + + return allowedSwSet; + } + + BOOL_32 IsInMipTail( + Dim3d mipTailDim, + UINT_32 maxNumMipsInTail, + UINT_32 mipWidth, + UINT_32 mipHeight, + UINT_32 numMipsToTheEnd) const + { + BOOL_32 inTail = ((mipWidth <= mipTailDim.w) && + (mipHeight <= mipTailDim.h) && + (numMipsToTheEnd <= maxNumMipsInTail)); + + return inTail; + } + + UINT_32 GetBankXorBits(UINT_32 blockBits) const + { + return (blockBits > m_pipeInterleaveLog2 + m_pipesLog2 + ColumnBits) ? + Min(blockBits - m_pipeInterleaveLog2 - m_pipesLog2 - ColumnBits, BankBits) : 0; + } + + BOOL_32 ValidateNonSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + BOOL_32 ValidateSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + static const UINT_32 ColumnBits = 2; + static const UINT_32 BankBits = 4; + static const UINT_32 UnalignedDccType = 3; + + static const Dim3d Block256_3d[MaxNumOfBpp]; + static const Dim3d Block64K_Log2_3d[MaxNumOfBpp]; + static const Dim3d Block4K_Log2_3d[MaxNumOfBpp]; + + static const SwizzleModeFlags SwizzleModeTable[ADDR_SW_MAX_TYPE]; + + // Number of packers log2 + UINT_32 m_numPkrLog2; + // Number of shader array log2 + UINT_32 m_numSaLog2; + + Gfx10ChipSettings m_settings; + + UINT_32 m_colorBaseIndex; + UINT_32 m_xmaskBaseIndex; + UINT_32 m_dccBaseIndex; +}; + +} // V2 +} // Addr + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.cpp new file mode 100644 index 0000000000..8d2b5700c4 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.cpp @@ -0,0 +1,5076 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +************************************************************************************************************************ +* @file gfx9addrlib.cpp +* @brief Contgfx9ns the implementation for the Gfx9Lib class. +************************************************************************************************************************ +*/ + +#include "gfx9addrlib.h" + +#include "gfx9_gb_reg.h" + +#include "amdgpu_asic_addr.h" + +#include "util/macros.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////////////////////////// + +namespace Addr +{ + +/** +************************************************************************************************************************ +* Gfx9HwlInit +* +* @brief +* Creates an Gfx9Lib object. +* +* @return +* Returns an Gfx9Lib object pointer. +************************************************************************************************************************ +*/ +Addr::Lib* Gfx9HwlInit(const Client* pClient) +{ + return V2::Gfx9Lib::CreateObj(pClient); +} + +namespace V2 +{ + +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Static Const Member +//////////////////////////////////////////////////////////////////////////////////////////////////// + +const SwizzleModeFlags Gfx9Lib::SwizzleModeTable[ADDR_SW_MAX_TYPE] = +{//Linear 256B 4KB 64KB Var Z Std Disp Rot XOR T RtOpt Reserved + {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR + {0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_256B_S + {0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_256B_D + {0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}, // ADDR_SW_256B_R + + {0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_Z + {0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_S + {0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_D + {0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}, // ADDR_SW_4KB_R + + {0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_Z + {0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_S + {0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_D + {0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0}, // ADDR_SW_64KB_R + + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + + {0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_Z_T + {0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_S_T + {0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_D_T + {0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0}, // ADDR_SW_64KB_R_T + + {0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_Z_x + {0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_S_x + {0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_D_x + {0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0}, // ADDR_SW_4KB_R_x + + {0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_Z_X + {0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_S_X + {0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_D_X + {0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0}, // ADDR_SW_64KB_R_X + + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved + {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR_GENERAL +}; + +const UINT_32 Gfx9Lib::MipTailOffset256B[] = {2048, 1024, 512, 256, 128, 64, 32, 16, 8, 6, 5, 4, 3, 2, 1, 0}; + +const Dim3d Gfx9Lib::Block256_3dS[] = {{16, 4, 4}, {8, 4, 4}, {4, 4, 4}, {2, 4, 4}, {1, 4, 4}}; + +const Dim3d Gfx9Lib::Block256_3dZ[] = {{8, 4, 8}, {4, 4, 8}, {4, 4, 4}, {4, 2, 4}, {2, 2, 4}}; + +/** +************************************************************************************************************************ +* Gfx9Lib::Gfx9Lib +* +* @brief +* Constructor +* +************************************************************************************************************************ +*/ +Gfx9Lib::Gfx9Lib(const Client* pClient) + : + Lib(pClient) +{ + m_class = AI_ADDRLIB; + memset(&m_settings, 0, sizeof(m_settings)); + memcpy(m_swizzleModeTable, SwizzleModeTable, sizeof(SwizzleModeTable)); + memset(m_cachedMetaEqKey, 0, sizeof(m_cachedMetaEqKey)); + m_metaEqOverrideIndex = 0; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::~Gfx9Lib +* +* @brief +* Destructor +************************************************************************************************************************ +*/ +Gfx9Lib::~Gfx9Lib() +{ +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeHtileInfo +* +* @brief +* Interface function stub of AddrComputeHtilenfo +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileInfo( + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + UINT_32 numPipeTotal = GetPipeNumForMetaAddressing(pIn->hTileFlags.pipeAligned, + pIn->swizzleMode); + + UINT_32 numRbTotal = pIn->hTileFlags.rbAligned ? m_se * m_rbPerSe : 1; + + UINT_32 numCompressBlkPerMetaBlk, numCompressBlkPerMetaBlkLog2; + + if ((numPipeTotal == 1) && (numRbTotal == 1)) + { + numCompressBlkPerMetaBlkLog2 = 10; + } + else + { + if (m_settings.applyAliasFix) + { + numCompressBlkPerMetaBlkLog2 = m_seLog2 + m_rbPerSeLog2 + Max(10u, m_pipeInterleaveLog2); + } + else + { + numCompressBlkPerMetaBlkLog2 = m_seLog2 + m_rbPerSeLog2 + 10; + } + } + + numCompressBlkPerMetaBlk = 1 << numCompressBlkPerMetaBlkLog2; + + Dim3d metaBlkDim = {8, 8, 1}; + UINT_32 totalAmpBits = numCompressBlkPerMetaBlkLog2; + UINT_32 widthAmp = (pIn->numMipLevels > 1) ? (totalAmpBits >> 1) : RoundHalf(totalAmpBits); + UINT_32 heightAmp = totalAmpBits - widthAmp; + metaBlkDim.w <<= widthAmp; + metaBlkDim.h <<= heightAmp; + +#if DEBUG + Dim3d metaBlkDimDbg = {8, 8, 1}; + for (UINT_32 index = 0; index < numCompressBlkPerMetaBlkLog2; index++) + { + if ((metaBlkDimDbg.h < metaBlkDimDbg.w) || + ((pIn->numMipLevels > 1) && (metaBlkDimDbg.h == metaBlkDimDbg.w))) + { + metaBlkDimDbg.h <<= 1; + } + else + { + metaBlkDimDbg.w <<= 1; + } + } + ADDR_ASSERT((metaBlkDimDbg.w == metaBlkDim.w) && (metaBlkDimDbg.h == metaBlkDim.h)); +#endif + + UINT_32 numMetaBlkX; + UINT_32 numMetaBlkY; + UINT_32 numMetaBlkZ; + + GetMetaMipInfo(pIn->numMipLevels, &metaBlkDim, FALSE, pOut->pMipInfo, + pIn->unalignedWidth, pIn->unalignedHeight, pIn->numSlices, + &numMetaBlkX, &numMetaBlkY, &numMetaBlkZ); + + const UINT_32 metaBlkSize = numCompressBlkPerMetaBlk << 2; + UINT_32 align = numPipeTotal * numRbTotal * m_pipeInterleaveBytes; + + if ((IsXor(pIn->swizzleMode) == FALSE) && (numPipeTotal > 2)) + { + align *= (numPipeTotal >> 1); + } + + align = Max(align, metaBlkSize); + + if (m_settings.metaBaseAlignFix) + { + align = Max(align, GetBlockSize(pIn->swizzleMode)); + } + + if (m_settings.htileAlignFix) + { + const INT_32 metaBlkSizeLog2 = numCompressBlkPerMetaBlkLog2 + 2; + const INT_32 htileCachelineSizeLog2 = 11; + const INT_32 maxNumOfRbMaskBits = 1 + Log2(numPipeTotal) + Log2(numRbTotal); + + INT_32 rbMaskPadding = Max(0, htileCachelineSizeLog2 - (metaBlkSizeLog2 - maxNumOfRbMaskBits)); + + align <<= rbMaskPadding; + } + + pOut->pitch = numMetaBlkX * metaBlkDim.w; + pOut->height = numMetaBlkY * metaBlkDim.h; + pOut->sliceSize = numMetaBlkX * numMetaBlkY * metaBlkSize; + + pOut->metaBlkWidth = metaBlkDim.w; + pOut->metaBlkHeight = metaBlkDim.h; + pOut->metaBlkNumPerSlice = numMetaBlkX * numMetaBlkY; + + pOut->baseAlign = align; + pOut->htileBytes = PowTwoAlign(pOut->sliceSize * numMetaBlkZ, align); + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeCmaskInfo +* +* @brief +* Interface function stub of AddrComputeCmaskInfo +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeCmaskInfo( + const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_ASSERT(pIn->resourceType == ADDR_RSRC_TEX_2D); + + UINT_32 numPipeTotal = GetPipeNumForMetaAddressing(pIn->cMaskFlags.pipeAligned, + pIn->swizzleMode); + + UINT_32 numRbTotal = pIn->cMaskFlags.rbAligned ? m_se * m_rbPerSe : 1; + + UINT_32 numCompressBlkPerMetaBlkLog2, numCompressBlkPerMetaBlk; + + if ((numPipeTotal == 1) && (numRbTotal == 1)) + { + numCompressBlkPerMetaBlkLog2 = 13; + } + else + { + if (m_settings.applyAliasFix) + { + numCompressBlkPerMetaBlkLog2 = m_seLog2 + m_rbPerSeLog2 + Max(10u, m_pipeInterleaveLog2); + } + else + { + numCompressBlkPerMetaBlkLog2 = m_seLog2 + m_rbPerSeLog2 + 10; + } + + numCompressBlkPerMetaBlkLog2 = Max(numCompressBlkPerMetaBlkLog2, 13u); + } + + numCompressBlkPerMetaBlk = 1 << numCompressBlkPerMetaBlkLog2; + + Dim2d metaBlkDim = {8, 8}; + UINT_32 totalAmpBits = numCompressBlkPerMetaBlkLog2; + UINT_32 heightAmp = totalAmpBits >> 1; + UINT_32 widthAmp = totalAmpBits - heightAmp; + metaBlkDim.w <<= widthAmp; + metaBlkDim.h <<= heightAmp; + +#if DEBUG + Dim2d metaBlkDimDbg = {8, 8}; + for (UINT_32 index = 0; index < numCompressBlkPerMetaBlkLog2; index++) + { + if (metaBlkDimDbg.h < metaBlkDimDbg.w) + { + metaBlkDimDbg.h <<= 1; + } + else + { + metaBlkDimDbg.w <<= 1; + } + } + ADDR_ASSERT((metaBlkDimDbg.w == metaBlkDim.w) && (metaBlkDimDbg.h == metaBlkDim.h)); +#endif + + UINT_32 numMetaBlkX = (pIn->unalignedWidth + metaBlkDim.w - 1) / metaBlkDim.w; + UINT_32 numMetaBlkY = (pIn->unalignedHeight + metaBlkDim.h - 1) / metaBlkDim.h; + UINT_32 numMetaBlkZ = Max(pIn->numSlices, 1u); + + UINT_32 sizeAlign = numPipeTotal * numRbTotal * m_pipeInterleaveBytes; + + if (m_settings.metaBaseAlignFix) + { + sizeAlign = Max(sizeAlign, GetBlockSize(pIn->swizzleMode)); + } + + pOut->pitch = numMetaBlkX * metaBlkDim.w; + pOut->height = numMetaBlkY * metaBlkDim.h; + pOut->sliceSize = (numMetaBlkX * numMetaBlkY * numCompressBlkPerMetaBlk) >> 1; + pOut->cmaskBytes = PowTwoAlign(pOut->sliceSize * numMetaBlkZ, sizeAlign); + pOut->baseAlign = Max(numCompressBlkPerMetaBlk >> 1, sizeAlign); + + pOut->metaBlkWidth = metaBlkDim.w; + pOut->metaBlkHeight = metaBlkDim.h; + + pOut->metaBlkNumPerSlice = numMetaBlkX * numMetaBlkY; + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::GetMetaMipInfo +* +* @brief +* Get meta mip info +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx9Lib::GetMetaMipInfo( + UINT_32 numMipLevels, ///< [in] number of mip levels + Dim3d* pMetaBlkDim, ///< [in] meta block dimension + BOOL_32 dataThick, ///< [in] data surface is thick + ADDR2_META_MIP_INFO* pInfo, ///< [out] meta mip info + UINT_32 mip0Width, ///< [in] mip0 width + UINT_32 mip0Height, ///< [in] mip0 height + UINT_32 mip0Depth, ///< [in] mip0 depth + UINT_32* pNumMetaBlkX, ///< [out] number of metablock X in mipchain + UINT_32* pNumMetaBlkY, ///< [out] number of metablock Y in mipchain + UINT_32* pNumMetaBlkZ) ///< [out] number of metablock Z in mipchain + const +{ + UINT_32 numMetaBlkX = (mip0Width + pMetaBlkDim->w - 1) / pMetaBlkDim->w; + UINT_32 numMetaBlkY = (mip0Height + pMetaBlkDim->h - 1) / pMetaBlkDim->h; + UINT_32 numMetaBlkZ = (mip0Depth + pMetaBlkDim->d - 1) / pMetaBlkDim->d; + UINT_32 tailWidth = pMetaBlkDim->w; + UINT_32 tailHeight = pMetaBlkDim->h >> 1; + UINT_32 tailDepth = pMetaBlkDim->d; + BOOL_32 inTail = FALSE; + AddrMajorMode major = ADDR_MAJOR_MAX_TYPE; + + if (numMipLevels > 1) + { + if (dataThick && (numMetaBlkZ > numMetaBlkX) && (numMetaBlkZ > numMetaBlkY)) + { + // Z major + major = ADDR_MAJOR_Z; + } + else if (numMetaBlkX >= numMetaBlkY) + { + // X major + major = ADDR_MAJOR_X; + } + else + { + // Y major + major = ADDR_MAJOR_Y; + } + + inTail = ((mip0Width <= tailWidth) && + (mip0Height <= tailHeight) && + ((dataThick == FALSE) || (mip0Depth <= tailDepth))); + + if (inTail == FALSE) + { + UINT_32 orderLimit; + UINT_32 *pMipDim; + UINT_32 *pOrderDim; + + if (major == ADDR_MAJOR_Z) + { + // Z major + pMipDim = &numMetaBlkY; + pOrderDim = &numMetaBlkZ; + orderLimit = 4; + } + else if (major == ADDR_MAJOR_X) + { + // X major + pMipDim = &numMetaBlkY; + pOrderDim = &numMetaBlkX; + orderLimit = 4; + } + else + { + // Y major + pMipDim = &numMetaBlkX; + pOrderDim = &numMetaBlkY; + orderLimit = 2; + } + + if ((*pMipDim < 3) && (*pOrderDim > orderLimit) && (numMipLevels > 3)) + { + *pMipDim += 2; + } + else + { + *pMipDim += ((*pMipDim / 2) + (*pMipDim & 1)); + } + } + } + + if (pInfo != NULL) + { + UINT_32 mipWidth = mip0Width; + UINT_32 mipHeight = mip0Height; + UINT_32 mipDepth = mip0Depth; + Dim3d mipCoord = {0}; + + for (UINT_32 mip = 0; mip < numMipLevels; mip++) + { + if (inTail) + { + GetMetaMiptailInfo(&pInfo[mip], mipCoord, numMipLevels - mip, + pMetaBlkDim); + break; + } + else + { + mipWidth = PowTwoAlign(mipWidth, pMetaBlkDim->w); + mipHeight = PowTwoAlign(mipHeight, pMetaBlkDim->h); + mipDepth = PowTwoAlign(mipDepth, pMetaBlkDim->d); + + pInfo[mip].inMiptail = FALSE; + pInfo[mip].startX = mipCoord.w; + pInfo[mip].startY = mipCoord.h; + pInfo[mip].startZ = mipCoord.d; + pInfo[mip].width = mipWidth; + pInfo[mip].height = mipHeight; + pInfo[mip].depth = dataThick ? mipDepth : 1; + + if ((mip >= 3) || (mip & 1)) + { + switch (major) + { + case ADDR_MAJOR_X: + mipCoord.w += mipWidth; + break; + case ADDR_MAJOR_Y: + mipCoord.h += mipHeight; + break; + case ADDR_MAJOR_Z: + mipCoord.d += mipDepth; + break; + default: + break; + } + } + else + { + switch (major) + { + case ADDR_MAJOR_X: + mipCoord.h += mipHeight; + break; + case ADDR_MAJOR_Y: + mipCoord.w += mipWidth; + break; + case ADDR_MAJOR_Z: + mipCoord.h += mipHeight; + break; + default: + break; + } + } + + mipWidth = Max(mipWidth >> 1, 1u); + mipHeight = Max(mipHeight >> 1, 1u); + mipDepth = Max(mipDepth >> 1, 1u); + + inTail = ((mipWidth <= tailWidth) && + (mipHeight <= tailHeight) && + ((dataThick == FALSE) || (mipDepth <= tailDepth))); + } + } + } + + *pNumMetaBlkX = numMetaBlkX; + *pNumMetaBlkY = numMetaBlkY; + *pNumMetaBlkZ = numMetaBlkZ; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeDccInfo +* +* @brief +* Interface function to compute DCC key info +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeDccInfo( + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + BOOL_32 dataLinear = IsLinear(pIn->swizzleMode); + BOOL_32 metaLinear = pIn->dccKeyFlags.linear; + BOOL_32 pipeAligned = pIn->dccKeyFlags.pipeAligned; + + if (dataLinear) + { + metaLinear = TRUE; + } + else if (metaLinear == TRUE) + { + pipeAligned = FALSE; + } + + UINT_32 numPipeTotal = GetPipeNumForMetaAddressing(pipeAligned, pIn->swizzleMode); + + if (metaLinear) + { + // Linear metadata supporting was removed for GFX9! No one can use this feature on GFX9. + ADDR_ASSERT_ALWAYS(); + + pOut->dccRamBaseAlign = numPipeTotal * m_pipeInterleaveBytes; + pOut->dccRamSize = PowTwoAlign((pIn->dataSurfaceSize / 256), pOut->dccRamBaseAlign); + } + else + { + BOOL_32 dataThick = IsThick(pIn->resourceType, pIn->swizzleMode); + + UINT_32 minMetaBlkSize = dataThick ? 65536 : 4096; + + UINT_32 numFrags = Max(pIn->numFrags, 1u); + UINT_32 numSlices = Max(pIn->numSlices, 1u); + + minMetaBlkSize /= numFrags; + + UINT_32 numCompressBlkPerMetaBlk = minMetaBlkSize; + + UINT_32 numRbTotal = pIn->dccKeyFlags.rbAligned ? m_se * m_rbPerSe : 1; + + if ((numPipeTotal > 1) || (numRbTotal > 1)) + { + const UINT_32 thinBlkSize = 1 << (m_settings.applyAliasFix ? Max(10u, m_pipeInterleaveLog2) : 10); + + numCompressBlkPerMetaBlk = + Max(numCompressBlkPerMetaBlk, m_se * m_rbPerSe * (dataThick ? 262144 : thinBlkSize)); + + if (numCompressBlkPerMetaBlk > 65536 * pIn->bpp) + { + numCompressBlkPerMetaBlk = 65536 * pIn->bpp; + } + } + + Dim3d compressBlkDim = GetDccCompressBlk(pIn->resourceType, pIn->swizzleMode, pIn->bpp); + Dim3d metaBlkDim = compressBlkDim; + + for (UINT_32 index = 1; index < numCompressBlkPerMetaBlk; index <<= 1) + { + if ((metaBlkDim.h < metaBlkDim.w) || + ((pIn->numMipLevels > 1) && (metaBlkDim.h == metaBlkDim.w))) + { + if ((dataThick == FALSE) || (metaBlkDim.h <= metaBlkDim.d)) + { + metaBlkDim.h <<= 1; + } + else + { + metaBlkDim.d <<= 1; + } + } + else + { + if ((dataThick == FALSE) || (metaBlkDim.w <= metaBlkDim.d)) + { + metaBlkDim.w <<= 1; + } + else + { + metaBlkDim.d <<= 1; + } + } + } + + UINT_32 numMetaBlkX; + UINT_32 numMetaBlkY; + UINT_32 numMetaBlkZ; + + GetMetaMipInfo(pIn->numMipLevels, &metaBlkDim, dataThick, pOut->pMipInfo, + pIn->unalignedWidth, pIn->unalignedHeight, numSlices, + &numMetaBlkX, &numMetaBlkY, &numMetaBlkZ); + + UINT_32 sizeAlign = numPipeTotal * numRbTotal * m_pipeInterleaveBytes; + + if (numFrags > m_maxCompFrag) + { + sizeAlign *= (numFrags / m_maxCompFrag); + } + + if (m_settings.metaBaseAlignFix) + { + sizeAlign = Max(sizeAlign, GetBlockSize(pIn->swizzleMode)); + } + + pOut->dccRamSize = numMetaBlkX * numMetaBlkY * numMetaBlkZ * + numCompressBlkPerMetaBlk * numFrags; + pOut->dccRamSize = PowTwoAlign(pOut->dccRamSize, sizeAlign); + pOut->dccRamBaseAlign = Max(numCompressBlkPerMetaBlk, sizeAlign); + + pOut->pitch = numMetaBlkX * metaBlkDim.w; + pOut->height = numMetaBlkY * metaBlkDim.h; + pOut->depth = numMetaBlkZ * metaBlkDim.d; + + pOut->compressBlkWidth = compressBlkDim.w; + pOut->compressBlkHeight = compressBlkDim.h; + pOut->compressBlkDepth = compressBlkDim.d; + + pOut->metaBlkWidth = metaBlkDim.w; + pOut->metaBlkHeight = metaBlkDim.h; + pOut->metaBlkDepth = metaBlkDim.d; + + pOut->metaBlkNumPerSlice = numMetaBlkX * numMetaBlkY; + pOut->fastClearSizePerSlice = + pOut->metaBlkNumPerSlice * numCompressBlkPerMetaBlk * Min(numFrags, m_maxCompFrag); + } + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeMaxBaseAlignments +* +* @brief +* Gets maximum alignments +* @return +* maximum alignments +************************************************************************************************************************ +*/ +UINT_32 Gfx9Lib::HwlComputeMaxBaseAlignments() const +{ + return Size64K; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeMaxMetaBaseAlignments +* +* @brief +* Gets maximum alignments for metadata +* @return +* maximum alignments for metadata +************************************************************************************************************************ +*/ +UINT_32 Gfx9Lib::HwlComputeMaxMetaBaseAlignments() const +{ + // Max base alignment for Htile + const UINT_32 maxNumPipeTotal = GetPipeNumForMetaAddressing(TRUE, ADDR_SW_64KB_Z); + const UINT_32 maxNumRbTotal = m_se * m_rbPerSe; + + // If applyAliasFix was set, the extra bits should be MAX(10u, m_pipeInterleaveLog2), + // but we never saw any ASIC whose m_pipeInterleaveLog2 != 8, so just put an assertion and simply the logic. + ADDR_ASSERT((m_settings.applyAliasFix == FALSE) || (m_pipeInterleaveLog2 <= 10u)); + const UINT_32 maxNumCompressBlkPerMetaBlk = 1u << (m_seLog2 + m_rbPerSeLog2 + 10u); + + UINT_32 maxBaseAlignHtile = maxNumPipeTotal * maxNumRbTotal * m_pipeInterleaveBytes; + + if (maxNumPipeTotal > 2) + { + maxBaseAlignHtile *= (maxNumPipeTotal >> 1); + } + + maxBaseAlignHtile = Max(maxNumCompressBlkPerMetaBlk << 2, maxBaseAlignHtile); + + if (m_settings.metaBaseAlignFix) + { + maxBaseAlignHtile = Max(maxBaseAlignHtile, Size64K); + } + + if (m_settings.htileAlignFix) + { + maxBaseAlignHtile *= maxNumPipeTotal; + } + + // Max base alignment for Cmask will not be larger than that for Htile, no need to calculate + + // Max base alignment for 2D Dcc will not be larger than that for 3D, no need to calculate + UINT_32 maxBaseAlignDcc3D = 65536; + + if ((maxNumPipeTotal > 1) || (maxNumRbTotal > 1)) + { + maxBaseAlignDcc3D = Min(m_se * m_rbPerSe * 262144, 65536 * 128u); + } + + // Max base alignment for Msaa Dcc + UINT_32 maxBaseAlignDccMsaa = maxNumPipeTotal * maxNumRbTotal * m_pipeInterleaveBytes * (8 / m_maxCompFrag); + + if (m_settings.metaBaseAlignFix) + { + maxBaseAlignDccMsaa = Max(maxBaseAlignDccMsaa, Size64K); + } + + return Max(maxBaseAlignHtile, Max(maxBaseAlignDccMsaa, maxBaseAlignDcc3D)); +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeCmaskAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeCmaskAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeCmaskAddrFromCoord( + const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + ADDR2_COMPUTE_CMASK_INFO_INPUT input = {0}; + input.size = sizeof(input); + input.cMaskFlags = pIn->cMaskFlags; + input.colorFlags = pIn->colorFlags; + input.unalignedWidth = Max(pIn->unalignedWidth, 1u); + input.unalignedHeight = Max(pIn->unalignedHeight, 1u); + input.numSlices = Max(pIn->numSlices, 1u); + input.swizzleMode = pIn->swizzleMode; + input.resourceType = pIn->resourceType; + + ADDR2_COMPUTE_CMASK_INFO_OUTPUT output = {0}; + output.size = sizeof(output); + + ADDR_E_RETURNCODE returnCode = ComputeCmaskInfo(&input, &output); + + if (returnCode == ADDR_OK) + { + UINT_32 fmaskBpp = GetFmaskBpp(pIn->numSamples, pIn->numFrags); + UINT_32 fmaskElementBytesLog2 = Log2(fmaskBpp >> 3); + UINT_32 metaBlkWidthLog2 = Log2(output.metaBlkWidth); + UINT_32 metaBlkHeightLog2 = Log2(output.metaBlkHeight); + + MetaEqParams metaEqParams = {0, fmaskElementBytesLog2, 0, pIn->cMaskFlags, + Gfx9DataFmask, pIn->swizzleMode, pIn->resourceType, + metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0}; + + const CoordEq* pMetaEq = GetMetaEquation(metaEqParams); + + UINT_32 xb = pIn->x / output.metaBlkWidth; + UINT_32 yb = pIn->y / output.metaBlkHeight; + UINT_32 zb = pIn->slice; + + UINT_32 pitchInBlock = output.pitch / output.metaBlkWidth; + UINT_32 sliceSizeInBlock = (output.height / output.metaBlkHeight) * pitchInBlock; + UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb; + + UINT_64 address = pMetaEq->solve(pIn->x, pIn->y, pIn->slice, 0, blockIndex); + + pOut->addr = address >> 1; + pOut->bitPosition = static_cast((address & 1) << 2); + + UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->cMaskFlags.pipeAligned, + pIn->swizzleMode); + + UINT_64 pipeXor = static_cast(pIn->pipeXor & ((1 << numPipeBits) - 1)); + + pOut->addr ^= (pipeXor << m_pipeInterleaveLog2); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeHtileAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeHtileAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileAddrFromCoord( + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numMipLevels > 1) + { + returnCode = ADDR_NOTIMPLEMENTED; + } + else + { + ADDR2_COMPUTE_HTILE_INFO_INPUT input = {0}; + input.size = sizeof(input); + input.hTileFlags = pIn->hTileFlags; + input.depthFlags = pIn->depthflags; + input.swizzleMode = pIn->swizzleMode; + input.unalignedWidth = Max(pIn->unalignedWidth, 1u); + input.unalignedHeight = Max(pIn->unalignedHeight, 1u); + input.numSlices = Max(pIn->numSlices, 1u); + input.numMipLevels = Max(pIn->numMipLevels, 1u); + + ADDR2_COMPUTE_HTILE_INFO_OUTPUT output = {0}; + output.size = sizeof(output); + + returnCode = ComputeHtileInfo(&input, &output); + + if (returnCode == ADDR_OK) + { + UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3); + UINT_32 metaBlkWidthLog2 = Log2(output.metaBlkWidth); + UINT_32 metaBlkHeightLog2 = Log2(output.metaBlkHeight); + UINT_32 numSamplesLog2 = Log2(pIn->numSamples); + + MetaEqParams metaEqParams = {0, elementBytesLog2, numSamplesLog2, pIn->hTileFlags, + Gfx9DataDepthStencil, pIn->swizzleMode, ADDR_RSRC_TEX_2D, + metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0}; + + const CoordEq* pMetaEq = GetMetaEquation(metaEqParams); + + UINT_32 xb = pIn->x / output.metaBlkWidth; + UINT_32 yb = pIn->y / output.metaBlkHeight; + UINT_32 zb = pIn->slice; + + UINT_32 pitchInBlock = output.pitch / output.metaBlkWidth; + UINT_32 sliceSizeInBlock = (output.height / output.metaBlkHeight) * pitchInBlock; + UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb; + + UINT_64 address = pMetaEq->solve(pIn->x, pIn->y, pIn->slice, 0, blockIndex); + + pOut->addr = address >> 1; + + UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->hTileFlags.pipeAligned, + pIn->swizzleMode); + + UINT_64 pipeXor = static_cast(pIn->pipeXor & ((1 << numPipeBits) - 1)); + + pOut->addr ^= (pipeXor << m_pipeInterleaveLog2); + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeHtileCoordFromAddr +* +* @brief +* Interface function stub of AddrComputeHtileCoordFromAddr +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileCoordFromAddr( + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numMipLevels > 1) + { + returnCode = ADDR_NOTIMPLEMENTED; + } + else + { + ADDR2_COMPUTE_HTILE_INFO_INPUT input = {0}; + input.size = sizeof(input); + input.hTileFlags = pIn->hTileFlags; + input.swizzleMode = pIn->swizzleMode; + input.unalignedWidth = Max(pIn->unalignedWidth, 1u); + input.unalignedHeight = Max(pIn->unalignedHeight, 1u); + input.numSlices = Max(pIn->numSlices, 1u); + input.numMipLevels = Max(pIn->numMipLevels, 1u); + + ADDR2_COMPUTE_HTILE_INFO_OUTPUT output = {0}; + output.size = sizeof(output); + + returnCode = ComputeHtileInfo(&input, &output); + + if (returnCode == ADDR_OK) + { + UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3); + UINT_32 metaBlkWidthLog2 = Log2(output.metaBlkWidth); + UINT_32 metaBlkHeightLog2 = Log2(output.metaBlkHeight); + UINT_32 numSamplesLog2 = Log2(pIn->numSamples); + + MetaEqParams metaEqParams = {0, elementBytesLog2, numSamplesLog2, pIn->hTileFlags, + Gfx9DataDepthStencil, pIn->swizzleMode, ADDR_RSRC_TEX_2D, + metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0}; + + const CoordEq* pMetaEq = GetMetaEquation(metaEqParams); + + UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->hTileFlags.pipeAligned, + pIn->swizzleMode); + + UINT_64 pipeXor = static_cast(pIn->pipeXor & ((1 << numPipeBits) - 1)); + + UINT_64 nibbleAddress = (pIn->addr ^ (pipeXor << m_pipeInterleaveLog2)) << 1; + + UINT_32 pitchInBlock = output.pitch / output.metaBlkWidth; + UINT_32 sliceSizeInBlock = (output.height / output.metaBlkHeight) * pitchInBlock; + + UINT_32 x, y, z, s, m; + pMetaEq->solveAddr(nibbleAddress, sliceSizeInBlock, x, y, z, s, m); + + pOut->slice = m / sliceSizeInBlock; + pOut->y = ((m % sliceSizeInBlock) / pitchInBlock) * output.metaBlkHeight + y; + pOut->x = (m % pitchInBlock) * output.metaBlkWidth + x; + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeDccAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeDccAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if ((pIn->numMipLevels > 1) || (pIn->mipId > 1) || pIn->dccKeyFlags.linear) + { + returnCode = ADDR_NOTIMPLEMENTED; + } + else + { + ADDR2_COMPUTE_DCCINFO_INPUT input = {0}; + input.size = sizeof(input); + input.dccKeyFlags = pIn->dccKeyFlags; + input.colorFlags = pIn->colorFlags; + input.swizzleMode = pIn->swizzleMode; + input.resourceType = pIn->resourceType; + input.bpp = pIn->bpp; + input.unalignedWidth = Max(pIn->unalignedWidth, 1u); + input.unalignedHeight = Max(pIn->unalignedHeight, 1u); + input.numSlices = Max(pIn->numSlices, 1u); + input.numFrags = Max(pIn->numFrags, 1u); + input.numMipLevels = Max(pIn->numMipLevels, 1u); + + ADDR2_COMPUTE_DCCINFO_OUTPUT output = {0}; + output.size = sizeof(output); + + returnCode = ComputeDccInfo(&input, &output); + + if (returnCode == ADDR_OK) + { + UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3); + UINT_32 numSamplesLog2 = Log2(pIn->numFrags); + UINT_32 metaBlkWidthLog2 = Log2(output.metaBlkWidth); + UINT_32 metaBlkHeightLog2 = Log2(output.metaBlkHeight); + UINT_32 metaBlkDepthLog2 = Log2(output.metaBlkDepth); + UINT_32 compBlkWidthLog2 = Log2(output.compressBlkWidth); + UINT_32 compBlkHeightLog2 = Log2(output.compressBlkHeight); + UINT_32 compBlkDepthLog2 = Log2(output.compressBlkDepth); + + MetaEqParams metaEqParams = {pIn->mipId, elementBytesLog2, numSamplesLog2, pIn->dccKeyFlags, + Gfx9DataColor, pIn->swizzleMode, pIn->resourceType, + metaBlkWidthLog2, metaBlkHeightLog2, metaBlkDepthLog2, + compBlkWidthLog2, compBlkHeightLog2, compBlkDepthLog2}; + + const CoordEq* pMetaEq = GetMetaEquation(metaEqParams); + + UINT_32 xb = pIn->x / output.metaBlkWidth; + UINT_32 yb = pIn->y / output.metaBlkHeight; + UINT_32 zb = pIn->slice / output.metaBlkDepth; + + UINT_32 pitchInBlock = output.pitch / output.metaBlkWidth; + UINT_32 sliceSizeInBlock = (output.height / output.metaBlkHeight) * pitchInBlock; + UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb; + + UINT_64 address = pMetaEq->solve(pIn->x, pIn->y, pIn->slice, pIn->sample, blockIndex); + + pOut->addr = address >> 1; + + UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->dccKeyFlags.pipeAligned, + pIn->swizzleMode); + + UINT_64 pipeXor = static_cast(pIn->pipeXor & ((1 << numPipeBits) - 1)); + + pOut->addr ^= (pipeXor << m_pipeInterleaveLog2); + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlInitGlobalParams +* +* @brief +* Initializes global parameters +* +* @return +* TRUE if all settings are valid +* +************************************************************************************************************************ +*/ +BOOL_32 Gfx9Lib::HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input +{ + BOOL_32 valid = TRUE; + + if (m_settings.isArcticIsland) + { + GB_ADDR_CONFIG gbAddrConfig; + + gbAddrConfig.u32All = pCreateIn->regValue.gbAddrConfig; + + // These values are copied from CModel code + switch (gbAddrConfig.bits.NUM_PIPES) + { + case ADDR_CONFIG_1_PIPE: + m_pipes = 1; + m_pipesLog2 = 0; + break; + case ADDR_CONFIG_2_PIPE: + m_pipes = 2; + m_pipesLog2 = 1; + break; + case ADDR_CONFIG_4_PIPE: + m_pipes = 4; + m_pipesLog2 = 2; + break; + case ADDR_CONFIG_8_PIPE: + m_pipes = 8; + m_pipesLog2 = 3; + break; + case ADDR_CONFIG_16_PIPE: + m_pipes = 16; + m_pipesLog2 = 4; + break; + case ADDR_CONFIG_32_PIPE: + m_pipes = 32; + m_pipesLog2 = 5; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + switch (gbAddrConfig.bits.PIPE_INTERLEAVE_SIZE) + { + case ADDR_CONFIG_PIPE_INTERLEAVE_256B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_256B; + m_pipeInterleaveLog2 = 8; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_512B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_512B; + m_pipeInterleaveLog2 = 9; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_1KB: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_1KB; + m_pipeInterleaveLog2 = 10; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_2KB: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_2KB; + m_pipeInterleaveLog2 = 11; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + // Addr::V2::Lib::ComputePipeBankXor()/ComputeSlicePipeBankXor() requires pipe interleave to be exactly 8 bits, + // and any larger value requires a post-process (left shift) on the output pipeBankXor bits. + ADDR_ASSERT(m_pipeInterleaveBytes == ADDR_PIPEINTERLEAVE_256B); + + switch (gbAddrConfig.bits.NUM_BANKS) + { + case ADDR_CONFIG_1_BANK: + m_banks = 1; + m_banksLog2 = 0; + break; + case ADDR_CONFIG_2_BANK: + m_banks = 2; + m_banksLog2 = 1; + break; + case ADDR_CONFIG_4_BANK: + m_banks = 4; + m_banksLog2 = 2; + break; + case ADDR_CONFIG_8_BANK: + m_banks = 8; + m_banksLog2 = 3; + break; + case ADDR_CONFIG_16_BANK: + m_banks = 16; + m_banksLog2 = 4; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + switch (gbAddrConfig.bits.NUM_SHADER_ENGINES) + { + case ADDR_CONFIG_1_SHADER_ENGINE: + m_se = 1; + m_seLog2 = 0; + break; + case ADDR_CONFIG_2_SHADER_ENGINE: + m_se = 2; + m_seLog2 = 1; + break; + case ADDR_CONFIG_4_SHADER_ENGINE: + m_se = 4; + m_seLog2 = 2; + break; + case ADDR_CONFIG_8_SHADER_ENGINE: + m_se = 8; + m_seLog2 = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + switch (gbAddrConfig.bits.NUM_RB_PER_SE) + { + case ADDR_CONFIG_1_RB_PER_SHADER_ENGINE: + m_rbPerSe = 1; + m_rbPerSeLog2 = 0; + break; + case ADDR_CONFIG_2_RB_PER_SHADER_ENGINE: + m_rbPerSe = 2; + m_rbPerSeLog2 = 1; + break; + case ADDR_CONFIG_4_RB_PER_SHADER_ENGINE: + m_rbPerSe = 4; + m_rbPerSeLog2 = 2; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + switch (gbAddrConfig.bits.MAX_COMPRESSED_FRAGS) + { + case ADDR_CONFIG_1_MAX_COMPRESSED_FRAGMENTS: + m_maxCompFrag = 1; + m_maxCompFragLog2 = 0; + break; + case ADDR_CONFIG_2_MAX_COMPRESSED_FRAGMENTS: + m_maxCompFrag = 2; + m_maxCompFragLog2 = 1; + break; + case ADDR_CONFIG_4_MAX_COMPRESSED_FRAGMENTS: + m_maxCompFrag = 4; + m_maxCompFragLog2 = 2; + break; + case ADDR_CONFIG_8_MAX_COMPRESSED_FRAGMENTS: + m_maxCompFrag = 8; + m_maxCompFragLog2 = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + if ((m_rbPerSeLog2 == 1) && + (((m_pipesLog2 == 1) && ((m_seLog2 == 2) || (m_seLog2 == 3))) || + ((m_pipesLog2 == 2) && ((m_seLog2 == 1) || (m_seLog2 == 2))))) + { + ADDR_ASSERT(m_settings.isVega10 == FALSE); + ADDR_ASSERT(m_settings.isRaven == FALSE); + + ADDR_ASSERT(m_settings.isVega20 == FALSE); + + if (m_settings.isVega12) + { + m_settings.htileCacheRbConflict = 1; + } + } + + // For simplicity we never allow VAR swizzle mode for GFX9, the actural value is 18 on GFX9 + m_blockVarSizeLog2 = 0; + } + else + { + valid = FALSE; + ADDR_NOT_IMPLEMENTED(); + } + + if (valid) + { + InitEquationTable(); + } + + return valid; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlConvertChipFamily +* +* @brief +* Convert familyID defined in atiid.h to ChipFamily and set m_chipFamily/m_chipRevision +* @return +* ChipFamily +************************************************************************************************************************ +*/ +ChipFamily Gfx9Lib::HwlConvertChipFamily( + UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h + UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h +{ + ChipFamily family = ADDR_CHIP_FAMILY_AI; + + switch (uChipFamily) + { + case FAMILY_AI: + m_settings.isArcticIsland = 1; + m_settings.isVega10 = ASICREV_IS_VEGA10_P(uChipRevision); + m_settings.isVega12 = ASICREV_IS_VEGA12_P(uChipRevision); + m_settings.isVega20 = ASICREV_IS_VEGA20_P(uChipRevision); + m_settings.isDce12 = 1; + + if (m_settings.isVega10 == 0) + { + m_settings.htileAlignFix = 1; + m_settings.applyAliasFix = 1; + } + + m_settings.metaBaseAlignFix = 1; + + m_settings.depthPipeXorDisable = 1; + break; + case FAMILY_RV: + m_settings.isArcticIsland = 1; + + if (ASICREV_IS_RAVEN(uChipRevision)) + { + m_settings.isRaven = 1; + + m_settings.depthPipeXorDisable = 1; + } + + if (ASICREV_IS_RAVEN2(uChipRevision)) + { + m_settings.isRaven = 1; + } + + if (m_settings.isRaven == 0) + { + m_settings.htileAlignFix = 1; + m_settings.applyAliasFix = 1; + } + + if (ASICREV_IS_RENOIR(uChipRevision)) + { + m_settings.isRaven = 1; + } + + m_settings.isDcn1 = m_settings.isRaven; + + m_settings.metaBaseAlignFix = 1; + break; + + default: + ADDR_ASSERT(!"This should be a Fusion"); + break; + } + + return family; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::InitRbEquation +* +* @brief +* Init RB equation +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx9Lib::GetRbEquation( + CoordEq* pRbEq, ///< [out] rb equation + UINT_32 numRbPerSeLog2, ///< [in] number of rb per shader engine + UINT_32 numSeLog2) ///< [in] number of shader engine + const +{ + // RB's are distributed on 16x16, except when we have 1 rb per se, in which case its 32x32 + UINT_32 rbRegion = (numRbPerSeLog2 == 0) ? 5 : 4; + Coordinate cx('x', rbRegion); + Coordinate cy('y', rbRegion); + + UINT_32 start = 0; + UINT_32 numRbTotalLog2 = numRbPerSeLog2 + numSeLog2; + + // Clear the rb equation + pRbEq->resize(0); + pRbEq->resize(numRbTotalLog2); + + if ((numSeLog2 > 0) && (numRbPerSeLog2 == 1)) + { + // Special case when more than 1 SE, and 2 RB per SE + (*pRbEq)[0].add(cx); + (*pRbEq)[0].add(cy); + cx++; + cy++; + + if (m_settings.applyAliasFix == false) + { + (*pRbEq)[0].add(cy); + } + + (*pRbEq)[0].add(cy); + start++; + } + + UINT_32 numBits = 2 * (numRbTotalLog2 - start); + + for (UINT_32 i = 0; i < numBits; i++) + { + UINT_32 idx = + start + (((start + i) >= numRbTotalLog2) ? (2 * (numRbTotalLog2 - start) - i - 1) : i); + + if ((i % 2) == 1) + { + (*pRbEq)[idx].add(cx); + cx++; + } + else + { + (*pRbEq)[idx].add(cy); + cy++; + } + } +} + +/** +************************************************************************************************************************ +* Gfx9Lib::GetDataEquation +* +* @brief +* Get data equation for fmask and Z +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx9Lib::GetDataEquation( + CoordEq* pDataEq, ///< [out] data surface equation + Gfx9DataType dataSurfaceType, ///< [in] data surface type + AddrSwizzleMode swizzleMode, ///< [in] data surface swizzle mode + AddrResourceType resourceType, ///< [in] data surface resource type + UINT_32 elementBytesLog2, ///< [in] data surface element bytes + UINT_32 numSamplesLog2) ///< [in] data surface sample count + const +{ + Coordinate cx('x', 0); + Coordinate cy('y', 0); + Coordinate cz('z', 0); + Coordinate cs('s', 0); + + // Clear the equation + pDataEq->resize(0); + pDataEq->resize(27); + + if (dataSurfaceType == Gfx9DataColor) + { + if (IsLinear(swizzleMode)) + { + Coordinate cm('m', 0); + + pDataEq->resize(49); + + for (UINT_32 i = 0; i < 49; i++) + { + (*pDataEq)[i].add(cm); + cm++; + } + } + else if (IsThick(resourceType, swizzleMode)) + { + // Color 3d_S and 3d_Z modes, 3d_D is same as color 2d + UINT_32 i; + if (IsStandardSwizzle(resourceType, swizzleMode)) + { + // Standard 3d swizzle + // Fill in bottom x bits + for (i = elementBytesLog2; i < 4; i++) + { + (*pDataEq)[i].add(cx); + cx++; + } + // Fill in 2 bits of y and then z + for (i = 4; i < 6; i++) + { + (*pDataEq)[i].add(cy); + cy++; + } + for (i = 6; i < 8; i++) + { + (*pDataEq)[i].add(cz); + cz++; + } + if (elementBytesLog2 < 2) + { + // fill in z & y bit + (*pDataEq)[8].add(cz); + (*pDataEq)[9].add(cy); + cz++; + cy++; + } + else if (elementBytesLog2 == 2) + { + // fill in y and x bit + (*pDataEq)[8].add(cy); + (*pDataEq)[9].add(cx); + cy++; + cx++; + } + else + { + // fill in 2 x bits + (*pDataEq)[8].add(cx); + cx++; + (*pDataEq)[9].add(cx); + cx++; + } + } + else + { + // Z 3d swizzle + UINT_32 m2dEnd = (elementBytesLog2 ==0) ? 3 : ((elementBytesLog2 < 4) ? 4 : 5); + UINT_32 numZs = (elementBytesLog2 == 0 || elementBytesLog2 == 4) ? + 2 : ((elementBytesLog2 == 1) ? 3 : 1); + pDataEq->mort2d(cx, cy, elementBytesLog2, m2dEnd); + for (i = m2dEnd + 1; i <= m2dEnd + numZs; i++) + { + (*pDataEq)[i].add(cz); + cz++; + } + if ((elementBytesLog2 == 0) || (elementBytesLog2 == 3)) + { + // add an x and z + (*pDataEq)[6].add(cx); + (*pDataEq)[7].add(cz); + cx++; + cz++; + } + else if (elementBytesLog2 == 2) + { + // add a y and z + (*pDataEq)[6].add(cy); + (*pDataEq)[7].add(cz); + cy++; + cz++; + } + // add y and x + (*pDataEq)[8].add(cy); + (*pDataEq)[9].add(cx); + cy++; + cx++; + } + // Fill in bit 10 and up + pDataEq->mort3d( cz, cy, cx, 10 ); + } + else if (IsThin(resourceType, swizzleMode)) + { + UINT_32 blockSizeLog2 = GetBlockSizeLog2(swizzleMode); + // Color 2D + UINT_32 microYBits = (8 - elementBytesLog2) / 2; + UINT_32 tileSplitStart = blockSizeLog2 - numSamplesLog2; + UINT_32 i; + // Fill in bottom x bits + for (i = elementBytesLog2; i < 4; i++) + { + (*pDataEq)[i].add(cx); + cx++; + } + // Fill in bottom y bits + for (i = 4; i < 4 + microYBits; i++) + { + (*pDataEq)[i].add(cy); + cy++; + } + // Fill in last of the micro_x bits + for (i = 4 + microYBits; i < 8; i++) + { + (*pDataEq)[i].add(cx); + cx++; + } + // Fill in x/y bits below sample split + pDataEq->mort2d(cy, cx, 8, tileSplitStart - 1); + // Fill in sample bits + for (i = 0; i < numSamplesLog2; i++) + { + cs.set('s', i); + (*pDataEq)[tileSplitStart + i].add(cs); + } + // Fill in x/y bits above sample split + if ((numSamplesLog2 & 1) ^ (blockSizeLog2 & 1)) + { + pDataEq->mort2d(cx, cy, blockSizeLog2); + } + else + { + pDataEq->mort2d(cy, cx, blockSizeLog2); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + else + { + // Fmask or depth + UINT_32 sampleStart = elementBytesLog2; + UINT_32 pixelStart = elementBytesLog2 + numSamplesLog2; + UINT_32 ymajStart = 6 + numSamplesLog2; + + for (UINT_32 s = 0; s < numSamplesLog2; s++) + { + cs.set('s', s); + (*pDataEq)[sampleStart + s].add(cs); + } + + // Put in the x-major order pixel bits + pDataEq->mort2d(cx, cy, pixelStart, ymajStart - 1); + // Put in the y-major order pixel bits + pDataEq->mort2d(cy, cx, ymajStart); + } +} + +/** +************************************************************************************************************************ +* Gfx9Lib::GetPipeEquation +* +* @brief +* Get pipe equation +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx9Lib::GetPipeEquation( + CoordEq* pPipeEq, ///< [out] pipe equation + CoordEq* pDataEq, ///< [in] data equation + UINT_32 pipeInterleaveLog2, ///< [in] pipe interleave + UINT_32 numPipeLog2, ///< [in] number of pipes + UINT_32 numSamplesLog2, ///< [in] data surface sample count + Gfx9DataType dataSurfaceType, ///< [in] data surface type + AddrSwizzleMode swizzleMode, ///< [in] data surface swizzle mode + AddrResourceType resourceType ///< [in] data surface resource type + ) const +{ + UINT_32 blockSizeLog2 = GetBlockSizeLog2(swizzleMode); + CoordEq dataEq; + + pDataEq->copy(dataEq); + + if (dataSurfaceType == Gfx9DataColor) + { + INT_32 shift = static_cast(numSamplesLog2); + dataEq.shift(-shift, blockSizeLog2 - numSamplesLog2); + } + + dataEq.copy(*pPipeEq, pipeInterleaveLog2, numPipeLog2); + + // This section should only apply to z/stencil, maybe fmask + // If the pipe bit is below the comp block size, + // then keep moving up the address until we find a bit that is above + UINT_32 pipeStart = 0; + + if (dataSurfaceType != Gfx9DataColor) + { + Coordinate tileMin('x', 3); + + while (dataEq[pipeInterleaveLog2 + pipeStart][0] < tileMin) + { + pipeStart++; + } + + // if pipe is 0, then the first pipe bit is above the comp block size, + // so we don't need to do anything + // Note, this if condition is not necessary, since if we execute the loop when pipe==0, + // we will get the same pipe equation + if (pipeStart != 0) + { + for (UINT_32 i = 0; i < numPipeLog2; i++) + { + // Copy the jth bit above pipe interleave to the current pipe equation bit + dataEq[pipeInterleaveLog2 + pipeStart + i].copyto((*pPipeEq)[i]); + } + } + } + + if (IsPrt(swizzleMode)) + { + // Clear out bits above the block size if prt's are enabled + dataEq.resize(blockSizeLog2); + dataEq.resize(48); + } + + if (IsXor(swizzleMode)) + { + CoordEq xorMask; + + if (IsThick(resourceType, swizzleMode)) + { + CoordEq xorMask2; + + dataEq.copy(xorMask2, pipeInterleaveLog2 + numPipeLog2, 2 * numPipeLog2); + + xorMask.resize(numPipeLog2); + + for (UINT_32 pipeIdx = 0; pipeIdx < numPipeLog2; pipeIdx++) + { + xorMask[pipeIdx].add(xorMask2[2 * pipeIdx]); + xorMask[pipeIdx].add(xorMask2[2 * pipeIdx + 1]); + } + } + else + { + // Xor in the bits above the pipe+gpu bits + dataEq.copy(xorMask, pipeInterleaveLog2 + pipeStart + numPipeLog2, numPipeLog2); + + if ((numSamplesLog2 == 0) && (IsPrt(swizzleMode) == FALSE)) + { + Coordinate co; + CoordEq xorMask2; + // if 1xaa and not prt, then xor in the z bits + xorMask2.resize(0); + xorMask2.resize(numPipeLog2); + for (UINT_32 pipeIdx = 0; pipeIdx < numPipeLog2; pipeIdx++) + { + co.set('z', numPipeLog2 - 1 - pipeIdx); + xorMask2[pipeIdx].add(co); + } + + pPipeEq->xorin(xorMask2); + } + } + + xorMask.reverse(); + pPipeEq->xorin(xorMask); + } +} +/** +************************************************************************************************************************ +* Gfx9Lib::GetMetaEquation +* +* @brief +* Get meta equation for cmask/htile/DCC +* @return +* Pointer to a calculated meta equation +************************************************************************************************************************ +*/ +const CoordEq* Gfx9Lib::GetMetaEquation( + const MetaEqParams& metaEqParams) +{ + UINT_32 cachedMetaEqIndex; + + for (cachedMetaEqIndex = 0; cachedMetaEqIndex < MaxCachedMetaEq; cachedMetaEqIndex++) + { + if (memcmp(&metaEqParams, + &m_cachedMetaEqKey[cachedMetaEqIndex], + static_cast(sizeof(metaEqParams))) == 0) + { + break; + } + } + + CoordEq* pMetaEq = NULL; + + if (cachedMetaEqIndex < MaxCachedMetaEq) + { + pMetaEq = &m_cachedMetaEq[cachedMetaEqIndex]; + } + else + { + m_cachedMetaEqKey[m_metaEqOverrideIndex] = metaEqParams; + + pMetaEq = &m_cachedMetaEq[m_metaEqOverrideIndex++]; + + m_metaEqOverrideIndex %= MaxCachedMetaEq; + + GenMetaEquation(pMetaEq, + metaEqParams.maxMip, + metaEqParams.elementBytesLog2, + metaEqParams.numSamplesLog2, + metaEqParams.metaFlag, + metaEqParams.dataSurfaceType, + metaEqParams.swizzleMode, + metaEqParams.resourceType, + metaEqParams.metaBlkWidthLog2, + metaEqParams.metaBlkHeightLog2, + metaEqParams.metaBlkDepthLog2, + metaEqParams.compBlkWidthLog2, + metaEqParams.compBlkHeightLog2, + metaEqParams.compBlkDepthLog2); + } + + return pMetaEq; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::GenMetaEquation +* +* @brief +* Get meta equation for cmask/htile/DCC +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx9Lib::GenMetaEquation( + CoordEq* pMetaEq, ///< [out] meta equation + UINT_32 maxMip, ///< [in] max mip Id + UINT_32 elementBytesLog2, ///< [in] data surface element bytes + UINT_32 numSamplesLog2, ///< [in] data surface sample count + ADDR2_META_FLAGS metaFlag, ///< [in] meta falg + Gfx9DataType dataSurfaceType, ///< [in] data surface type + AddrSwizzleMode swizzleMode, ///< [in] data surface swizzle mode + AddrResourceType resourceType, ///< [in] data surface resource type + UINT_32 metaBlkWidthLog2, ///< [in] meta block width + UINT_32 metaBlkHeightLog2, ///< [in] meta block height + UINT_32 metaBlkDepthLog2, ///< [in] meta block depth + UINT_32 compBlkWidthLog2, ///< [in] compress block width + UINT_32 compBlkHeightLog2, ///< [in] compress block height + UINT_32 compBlkDepthLog2) ///< [in] compress block depth + const +{ + UINT_32 numPipeTotalLog2 = GetPipeLog2ForMetaAddressing(metaFlag.pipeAligned, swizzleMode); + UINT_32 pipeInterleaveLog2 = m_pipeInterleaveLog2; + + // Get the correct data address and rb equation + CoordEq dataEq; + GetDataEquation(&dataEq, dataSurfaceType, swizzleMode, resourceType, + elementBytesLog2, numSamplesLog2); + + // Get pipe and rb equations + CoordEq pipeEquation; + GetPipeEquation(&pipeEquation, &dataEq, pipeInterleaveLog2, numPipeTotalLog2, + numSamplesLog2, dataSurfaceType, swizzleMode, resourceType); + numPipeTotalLog2 = pipeEquation.getsize(); + + if (metaFlag.linear) + { + // Linear metadata supporting was removed for GFX9! No one can use this feature. + ADDR_ASSERT_ALWAYS(); + + ADDR_ASSERT(dataSurfaceType == Gfx9DataColor); + + dataEq.copy(*pMetaEq); + + if (IsLinear(swizzleMode)) + { + if (metaFlag.pipeAligned) + { + // Remove the pipe bits + INT_32 shift = static_cast(numPipeTotalLog2); + pMetaEq->shift(-shift, pipeInterleaveLog2); + } + // Divide by comp block size, which for linear (which is always color) is 256 B + pMetaEq->shift(-8); + + if (metaFlag.pipeAligned) + { + // Put pipe bits back in + pMetaEq->shift(numPipeTotalLog2, pipeInterleaveLog2); + + for (UINT_32 i = 0; i < numPipeTotalLog2; i++) + { + pipeEquation[i].copyto((*pMetaEq)[pipeInterleaveLog2 + i]); + } + } + } + + pMetaEq->shift(1); + } + else + { + UINT_32 maxCompFragLog2 = static_cast(m_maxCompFragLog2); + UINT_32 compFragLog2 = + ((dataSurfaceType == Gfx9DataColor) && (numSamplesLog2 > maxCompFragLog2)) ? + maxCompFragLog2 : numSamplesLog2; + + UINT_32 uncompFragLog2 = numSamplesLog2 - compFragLog2; + + // Make sure the metaaddr is cleared + pMetaEq->resize(0); + pMetaEq->resize(27); + + if (IsThick(resourceType, swizzleMode)) + { + Coordinate cx('x', 0); + Coordinate cy('y', 0); + Coordinate cz('z', 0); + + if (maxMip > 0) + { + pMetaEq->mort3d(cy, cx, cz); + } + else + { + pMetaEq->mort3d(cx, cy, cz); + } + } + else + { + Coordinate cx('x', 0); + Coordinate cy('y', 0); + Coordinate cs; + + if (maxMip > 0) + { + pMetaEq->mort2d(cy, cx, compFragLog2); + } + else + { + pMetaEq->mort2d(cx, cy, compFragLog2); + } + + //------------------------------------------------------------------------------------------------------------------------ + // Put the compressible fragments at the lsb + // the uncompressible frags will be at the msb of the micro address + //------------------------------------------------------------------------------------------------------------------------ + for (UINT_32 s = 0; s < compFragLog2; s++) + { + cs.set('s', s); + (*pMetaEq)[s].add(cs); + } + } + + // Keep a copy of the pipe equations + CoordEq origPipeEquation; + pipeEquation.copy(origPipeEquation); + + Coordinate co; + // filter out everything under the compressed block size + co.set('x', compBlkWidthLog2); + pMetaEq->Filter('<', co, 0, 'x'); + co.set('y', compBlkHeightLog2); + pMetaEq->Filter('<', co, 0, 'y'); + co.set('z', compBlkDepthLog2); + pMetaEq->Filter('<', co, 0, 'z'); + + // For non-color, filter out sample bits + if (dataSurfaceType != Gfx9DataColor) + { + co.set('x', 0); + pMetaEq->Filter('<', co, 0, 's'); + } + + // filter out everything above the metablock size + co.set('x', metaBlkWidthLog2 - 1); + pMetaEq->Filter('>', co, 0, 'x'); + co.set('y', metaBlkHeightLog2 - 1); + pMetaEq->Filter('>', co, 0, 'y'); + co.set('z', metaBlkDepthLog2 - 1); + pMetaEq->Filter('>', co, 0, 'z'); + + // filter out everything above the metablock size for the channel bits + co.set('x', metaBlkWidthLog2 - 1); + pipeEquation.Filter('>', co, 0, 'x'); + co.set('y', metaBlkHeightLog2 - 1); + pipeEquation.Filter('>', co, 0, 'y'); + co.set('z', metaBlkDepthLog2 - 1); + pipeEquation.Filter('>', co, 0, 'z'); + + // Make sure we still have the same number of channel bits + if (pipeEquation.getsize() != numPipeTotalLog2) + { + ADDR_ASSERT_ALWAYS(); + } + + // Loop through all channel and rb bits, + // and make sure these components exist in the metadata address + for (UINT_32 i = 0; i < numPipeTotalLog2; i++) + { + for (UINT_32 j = pipeEquation[i].getsize(); j > 0; j--) + { + if (pMetaEq->Exists(pipeEquation[i][j - 1]) == FALSE) + { + ADDR_ASSERT_ALWAYS(); + } + } + } + + const UINT_32 numSeLog2 = metaFlag.rbAligned ? m_seLog2 : 0; + const UINT_32 numRbPeSeLog2 = metaFlag.rbAligned ? m_rbPerSeLog2 : 0; + const UINT_32 numRbTotalLog2 = numRbPeSeLog2 + numSeLog2; + CoordEq origRbEquation; + + GetRbEquation(&origRbEquation, numRbPeSeLog2, numSeLog2); + + CoordEq rbEquation = origRbEquation; + + for (UINT_32 i = 0; i < numRbTotalLog2; i++) + { + for (UINT_32 j = rbEquation[i].getsize(); j > 0; j--) + { + if (pMetaEq->Exists(rbEquation[i][j - 1]) == FALSE) + { + ADDR_ASSERT_ALWAYS(); + } + } + } + + if (m_settings.applyAliasFix) + { + co.set('z', -1); + } + + // Loop through each rb id bit; if it is equal to any of the filtered channel bits, clear it + for (UINT_32 i = 0; i < numRbTotalLog2; i++) + { + for (UINT_32 j = 0; j < numPipeTotalLog2; j++) + { + BOOL_32 isRbEquationInPipeEquation = FALSE; + + if (m_settings.applyAliasFix) + { + CoordTerm filteredPipeEq; + filteredPipeEq = pipeEquation[j]; + + filteredPipeEq.Filter('>', co, 0, 'z'); + + isRbEquationInPipeEquation = (rbEquation[i] == filteredPipeEq); + } + else + { + isRbEquationInPipeEquation = (rbEquation[i] == pipeEquation[j]); + } + + if (isRbEquationInPipeEquation) + { + rbEquation[i].Clear(); + } + } + } + + bool rbAppendedWithPipeBits[1 << (MaxSeLog2 + MaxRbPerSeLog2)] = {}; + + // Loop through each bit of the channel, get the smallest coordinate, + // and remove it from the metaaddr, and rb_equation + for (UINT_32 i = 0; i < numPipeTotalLog2; i++) + { + pipeEquation[i].getsmallest(co); + + UINT_32 old_size = pMetaEq->getsize(); + pMetaEq->Filter('=', co); + UINT_32 new_size = pMetaEq->getsize(); + if (new_size != old_size-1) + { + ADDR_ASSERT_ALWAYS(); + } + pipeEquation.remove(co); + for (UINT_32 j = 0; j < numRbTotalLog2; j++) + { + if (rbEquation[j].remove(co)) + { + // if we actually removed something from this bit, then add the remaining + // channel bits, as these can be removed for this bit + for (UINT_32 k = 0; k < pipeEquation[i].getsize(); k++) + { + if (pipeEquation[i][k] != co) + { + rbEquation[j].add(pipeEquation[i][k]); + rbAppendedWithPipeBits[j] = true; + } + } + } + } + } + + // Loop through the rb bits and see what remain; + // filter out the smallest coordinate if it remains + UINT_32 rbBitsLeft = 0; + for (UINT_32 i = 0; i < numRbTotalLog2; i++) + { + BOOL_32 isRbEqAppended = FALSE; + + if (m_settings.applyAliasFix) + { + isRbEqAppended = (rbEquation[i].getsize() > (rbAppendedWithPipeBits[i] ? 1 : 0)); + } + else + { + isRbEqAppended = (rbEquation[i].getsize() > 0); + } + + if (isRbEqAppended) + { + rbBitsLeft++; + rbEquation[i].getsmallest(co); + UINT_32 old_size = pMetaEq->getsize(); + pMetaEq->Filter('=', co); + UINT_32 new_size = pMetaEq->getsize(); + if (new_size != old_size - 1) + { + // assert warning + } + for (UINT_32 j = i + 1; j < numRbTotalLog2; j++) + { + if (rbEquation[j].remove(co)) + { + // if we actually removed something from this bit, then add the remaining + // rb bits, as these can be removed for this bit + for (UINT_32 k = 0; k < rbEquation[i].getsize(); k++) + { + if (rbEquation[i][k] != co) + { + rbEquation[j].add(rbEquation[i][k]); + rbAppendedWithPipeBits[j] |= rbAppendedWithPipeBits[i]; + } + } + } + } + } + } + + // capture the size of the metaaddr + UINT_32 metaSize = pMetaEq->getsize(); + // resize to 49 bits...make this a nibble address + pMetaEq->resize(49); + // Concatenate the macro address above the current address + for (UINT_32 i = metaSize, j = 0; i < 49; i++, j++) + { + co.set('m', j); + (*pMetaEq)[i].add(co); + } + + // Multiply by meta element size (in nibbles) + if (dataSurfaceType == Gfx9DataColor) + { + pMetaEq->shift(1); + } + else if (dataSurfaceType == Gfx9DataDepthStencil) + { + pMetaEq->shift(3); + } + + //------------------------------------------------------------------------------------------ + // Note the pipeInterleaveLog2+1 is because address is a nibble address + // Shift up from pipe interleave number of channel + // and rb bits left, and uncompressed fragments + //------------------------------------------------------------------------------------------ + + pMetaEq->shift(numPipeTotalLog2 + rbBitsLeft + uncompFragLog2, pipeInterleaveLog2 + 1); + + // Put in the channel bits + for (UINT_32 i = 0; i < numPipeTotalLog2; i++) + { + origPipeEquation[i].copyto((*pMetaEq)[pipeInterleaveLog2+1 + i]); + } + + // Put in remaining rb bits + for (UINT_32 i = 0, j = 0; j < rbBitsLeft; i = (i + 1) % numRbTotalLog2) + { + BOOL_32 isRbEqAppended = FALSE; + + if (m_settings.applyAliasFix) + { + isRbEqAppended = (rbEquation[i].getsize() > (rbAppendedWithPipeBits[i] ? 1 : 0)); + } + else + { + isRbEqAppended = (rbEquation[i].getsize() > 0); + } + + if (isRbEqAppended) + { + origRbEquation[i].copyto((*pMetaEq)[pipeInterleaveLog2 + 1 + numPipeTotalLog2 + j]); + // Mark any rb bit we add in to the rb mask + j++; + } + } + + //------------------------------------------------------------------------------------------ + // Put in the uncompressed fragment bits + //------------------------------------------------------------------------------------------ + for (UINT_32 i = 0; i < uncompFragLog2; i++) + { + co.set('s', compFragLog2 + i); + (*pMetaEq)[pipeInterleaveLog2 + 1 + numPipeTotalLog2 + rbBitsLeft + i].add(co); + } + } +} + +/** +************************************************************************************************************************ +* Gfx9Lib::IsEquationSupported +* +* @brief +* Check if equation is supported for given swizzle mode and resource type. +* +* @return +* TRUE if supported +************************************************************************************************************************ +*/ +BOOL_32 Gfx9Lib::IsEquationSupported( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2) const +{ + BOOL_32 supported = (elementBytesLog2 < MaxElementBytesLog2) && + (IsValidSwMode(swMode) == TRUE) && + (IsLinear(swMode) == FALSE) && + (((IsTex2d(rsrcType) == TRUE) && + ((elementBytesLog2 < 4) || + ((IsRotateSwizzle(swMode) == FALSE) && + (IsZOrderSwizzle(swMode) == FALSE)))) || + ((IsTex3d(rsrcType) == TRUE) && + (IsRotateSwizzle(swMode) == FALSE) && + (IsBlock256b(swMode) == FALSE))); + + return supported; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::InitEquationTable +* +* @brief +* Initialize Equation table. +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx9Lib::InitEquationTable() +{ + memset(m_equationTable, 0, sizeof(m_equationTable)); + + // Loop all possible resource type (2D/3D) + for (UINT_32 rsrcTypeIdx = 0; rsrcTypeIdx < MaxRsrcType; rsrcTypeIdx++) + { + AddrResourceType rsrcType = static_cast(rsrcTypeIdx + ADDR_RSRC_TEX_2D); + + // Loop all possible swizzle mode + for (UINT_32 swModeIdx = 0; swModeIdx < MaxSwModeType; swModeIdx++) + { + AddrSwizzleMode swMode = static_cast(swModeIdx); + + // Loop all possible bpp + for (UINT_32 bppIdx = 0; bppIdx < MaxElementBytesLog2; bppIdx++) + { + UINT_32 equationIndex = ADDR_INVALID_EQUATION_INDEX; + + // Check if the input is supported + if (IsEquationSupported(rsrcType, swMode, bppIdx)) + { + ADDR_EQUATION equation; + ADDR_E_RETURNCODE retCode; + + memset(&equation, 0, sizeof(ADDR_EQUATION)); + + // Generate the equation + if (IsBlock256b(swMode) && IsTex2d(rsrcType)) + { + retCode = ComputeBlock256Equation(rsrcType, swMode, bppIdx, &equation); + } + else if (IsThin(rsrcType, swMode)) + { + retCode = ComputeThinEquation(rsrcType, swMode, bppIdx, &equation); + } + else + { + retCode = ComputeThickEquation(rsrcType, swMode, bppIdx, &equation); + } + + // Only fill the equation into the table if the return code is ADDR_OK, + // otherwise if the return code is not ADDR_OK, it indicates this is not + // a valid input, we do nothing but just fill invalid equation index + // into the lookup table. + if (retCode == ADDR_OK) + { + equationIndex = m_numEquations; + ADDR_ASSERT(equationIndex < EquationTableSize); + + m_equationTable[equationIndex] = equation; + + m_numEquations++; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + + // Fill the index into the lookup table, if the combination is not supported + // fill the invalid equation index + m_equationLookupTable[rsrcTypeIdx][swModeIdx][bppIdx] = equationIndex; + } + } + } +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlGetEquationIndex +* +* @brief +* Interface function stub of GetEquationIndex +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +UINT_32 Gfx9Lib::HwlGetEquationIndex( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut + ) const +{ + AddrResourceType rsrcType = pIn->resourceType; + AddrSwizzleMode swMode = pIn->swizzleMode; + UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3); + UINT_32 index = ADDR_INVALID_EQUATION_INDEX; + + if (IsEquationSupported(rsrcType, swMode, elementBytesLog2)) + { + UINT_32 rsrcTypeIdx = static_cast(rsrcType) - 1; + UINT_32 swModeIdx = static_cast(swMode); + + index = m_equationLookupTable[rsrcTypeIdx][swModeIdx][elementBytesLog2]; + } + + if (pOut->pMipInfo != NULL) + { + for (UINT_32 i = 0; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].equationIndex = index; + } + } + + return index; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeBlock256Equation +* +* @brief +* Interface function stub of ComputeBlock256Equation +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeBlock256Equation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + pEquation->numBits = 8; + + UINT_32 i = 0; + for (; i < elementBytesLog2; i++) + { + InitChannel(1, 0 , i, &pEquation->addr[i]); + } + + ADDR_CHANNEL_SETTING* pixelBit = &pEquation->addr[elementBytesLog2]; + + const UINT_32 maxBitsUsed = 4; + ADDR_CHANNEL_SETTING x[maxBitsUsed] = {}; + ADDR_CHANNEL_SETTING y[maxBitsUsed] = {}; + + for (i = 0; i < maxBitsUsed; i++) + { + InitChannel(1, 0, elementBytesLog2 + i, &x[i]); + InitChannel(1, 1, i, &y[i]); + } + + if (IsStandardSwizzle(rsrcType, swMode)) + { + switch (elementBytesLog2) + { + case 0: + pixelBit[0] = x[0]; + pixelBit[1] = x[1]; + pixelBit[2] = x[2]; + pixelBit[3] = x[3]; + pixelBit[4] = y[0]; + pixelBit[5] = y[1]; + pixelBit[6] = y[2]; + pixelBit[7] = y[3]; + break; + case 1: + pixelBit[0] = x[0]; + pixelBit[1] = x[1]; + pixelBit[2] = x[2]; + pixelBit[3] = y[0]; + pixelBit[4] = y[1]; + pixelBit[5] = y[2]; + pixelBit[6] = x[3]; + break; + case 2: + pixelBit[0] = x[0]; + pixelBit[1] = x[1]; + pixelBit[2] = y[0]; + pixelBit[3] = y[1]; + pixelBit[4] = y[2]; + pixelBit[5] = x[2]; + break; + case 3: + pixelBit[0] = x[0]; + pixelBit[1] = y[0]; + pixelBit[2] = y[1]; + pixelBit[3] = x[1]; + pixelBit[4] = x[2]; + break; + case 4: + pixelBit[0] = y[0]; + pixelBit[1] = y[1]; + pixelBit[2] = x[0]; + pixelBit[3] = x[1]; + break; + default: + ADDR_ASSERT_ALWAYS(); + ret = ADDR_INVALIDPARAMS; + break; + } + } + else if (IsDisplaySwizzle(rsrcType, swMode)) + { + switch (elementBytesLog2) + { + case 0: + pixelBit[0] = x[0]; + pixelBit[1] = x[1]; + pixelBit[2] = x[2]; + pixelBit[3] = y[1]; + pixelBit[4] = y[0]; + pixelBit[5] = y[2]; + pixelBit[6] = x[3]; + pixelBit[7] = y[3]; + break; + case 1: + pixelBit[0] = x[0]; + pixelBit[1] = x[1]; + pixelBit[2] = x[2]; + pixelBit[3] = y[0]; + pixelBit[4] = y[1]; + pixelBit[5] = y[2]; + pixelBit[6] = x[3]; + break; + case 2: + pixelBit[0] = x[0]; + pixelBit[1] = x[1]; + pixelBit[2] = y[0]; + pixelBit[3] = x[2]; + pixelBit[4] = y[1]; + pixelBit[5] = y[2]; + break; + case 3: + pixelBit[0] = x[0]; + pixelBit[1] = y[0]; + pixelBit[2] = x[1]; + pixelBit[3] = x[2]; + pixelBit[4] = y[1]; + break; + case 4: + pixelBit[0] = x[0]; + pixelBit[1] = y[0]; + pixelBit[2] = x[1]; + pixelBit[3] = y[1]; + break; + default: + ADDR_ASSERT_ALWAYS(); + ret = ADDR_INVALIDPARAMS; + break; + } + } + else if (IsRotateSwizzle(swMode)) + { + switch (elementBytesLog2) + { + case 0: + pixelBit[0] = y[0]; + pixelBit[1] = y[1]; + pixelBit[2] = y[2]; + pixelBit[3] = x[1]; + pixelBit[4] = x[0]; + pixelBit[5] = x[2]; + pixelBit[6] = x[3]; + pixelBit[7] = y[3]; + break; + case 1: + pixelBit[0] = y[0]; + pixelBit[1] = y[1]; + pixelBit[2] = y[2]; + pixelBit[3] = x[0]; + pixelBit[4] = x[1]; + pixelBit[5] = x[2]; + pixelBit[6] = x[3]; + break; + case 2: + pixelBit[0] = y[0]; + pixelBit[1] = y[1]; + pixelBit[2] = x[0]; + pixelBit[3] = y[2]; + pixelBit[4] = x[1]; + pixelBit[5] = x[2]; + break; + case 3: + pixelBit[0] = y[0]; + pixelBit[1] = x[0]; + pixelBit[2] = y[1]; + pixelBit[3] = x[1]; + pixelBit[4] = x[2]; + break; + default: + ADDR_ASSERT_ALWAYS(); + case 4: + ret = ADDR_INVALIDPARAMS; + break; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + ret = ADDR_INVALIDPARAMS; + } + + // Post validation + if (ret == ADDR_OK) + { + ASSERTED Dim2d microBlockDim = Block256_2d[elementBytesLog2]; + ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 0)) == + (microBlockDim.w * (1 << elementBytesLog2))); + ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 1)) == microBlockDim.h); + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeThinEquation +* +* @brief +* Interface function stub of ComputeThinEquation +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeThinEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + UINT_32 blockSizeLog2 = GetBlockSizeLog2(swMode); + + UINT_32 maxXorBits = blockSizeLog2; + if (IsNonPrtXor(swMode)) + { + // For non-prt-xor, maybe need to initialize some more bits for xor + // The highest xor bit used in equation will be max the following 3 items: + // 1. m_pipeInterleaveLog2 + 2 * pipeXorBits + // 2. m_pipeInterleaveLog2 + pipeXorBits + 2 * bankXorBits + // 3. blockSizeLog2 + + maxXorBits = Max(maxXorBits, m_pipeInterleaveLog2 + 2 * GetPipeXorBits(blockSizeLog2)); + maxXorBits = Max(maxXorBits, m_pipeInterleaveLog2 + + GetPipeXorBits(blockSizeLog2) + + 2 * GetBankXorBits(blockSizeLog2)); + } + + const UINT_32 maxBitsUsed = 14; + ADDR_ASSERT((2 * maxBitsUsed) >= maxXorBits); + ADDR_CHANNEL_SETTING x[maxBitsUsed] = {}; + ADDR_CHANNEL_SETTING y[maxBitsUsed] = {}; + + const UINT_32 extraXorBits = 16; + ADDR_ASSERT(extraXorBits >= maxXorBits - blockSizeLog2); + ADDR_CHANNEL_SETTING xorExtra[extraXorBits] = {}; + + for (UINT_32 i = 0; i < maxBitsUsed; i++) + { + InitChannel(1, 0, elementBytesLog2 + i, &x[i]); + InitChannel(1, 1, i, &y[i]); + } + + ADDR_CHANNEL_SETTING* pixelBit = pEquation->addr; + + for (UINT_32 i = 0; i < elementBytesLog2; i++) + { + InitChannel(1, 0 , i, &pixelBit[i]); + } + + UINT_32 xIdx = 0; + UINT_32 yIdx = 0; + UINT_32 lowBits = 0; + + if (IsZOrderSwizzle(swMode)) + { + if (elementBytesLog2 <= 3) + { + for (UINT_32 i = elementBytesLog2; i < 6; i++) + { + pixelBit[i] = (((i - elementBytesLog2) & 1) == 0) ? x[xIdx++] : y[yIdx++]; + } + + lowBits = 6; + } + else + { + ret = ADDR_INVALIDPARAMS; + } + } + else + { + ret = HwlComputeBlock256Equation(rsrcType, swMode, elementBytesLog2, pEquation); + + if (ret == ADDR_OK) + { + Dim2d microBlockDim = Block256_2d[elementBytesLog2]; + xIdx = Log2(microBlockDim.w); + yIdx = Log2(microBlockDim.h); + lowBits = 8; + } + } + + if (ret == ADDR_OK) + { + for (UINT_32 i = lowBits; i < blockSizeLog2; i++) + { + pixelBit[i] = ((i & 1) == 0) ? y[yIdx++] : x[xIdx++]; + } + + for (UINT_32 i = blockSizeLog2; i < maxXorBits; i++) + { + xorExtra[i - blockSizeLog2] = ((i & 1) == 0) ? y[yIdx++] : x[xIdx++]; + } + + if (IsXor(swMode)) + { + // Fill XOR bits + UINT_32 pipeStart = m_pipeInterleaveLog2; + UINT_32 pipeXorBits = GetPipeXorBits(blockSizeLog2); + + UINT_32 bankStart = pipeStart + pipeXorBits; + UINT_32 bankXorBits = GetBankXorBits(blockSizeLog2); + + for (UINT_32 i = 0; i < pipeXorBits; i++) + { + UINT_32 xor1BitPos = pipeStart + 2 * pipeXorBits - 1 - i; + ADDR_CHANNEL_SETTING* pXor1Src = (xor1BitPos < blockSizeLog2) ? + &pEquation->addr[xor1BitPos] : &xorExtra[xor1BitPos - blockSizeLog2]; + + InitChannel(&pEquation->xor1[pipeStart + i], pXor1Src); + } + + for (UINT_32 i = 0; i < bankXorBits; i++) + { + UINT_32 xor1BitPos = bankStart + 2 * bankXorBits - 1 - i; + ADDR_CHANNEL_SETTING* pXor1Src = (xor1BitPos < blockSizeLog2) ? + &pEquation->addr[xor1BitPos] : &xorExtra[xor1BitPos - blockSizeLog2]; + + InitChannel(&pEquation->xor1[bankStart + i], pXor1Src); + } + + if (IsPrt(swMode) == FALSE) + { + for (UINT_32 i = 0; i < pipeXorBits; i++) + { + InitChannel(1, 2, pipeXorBits - i - 1, &pEquation->xor2[pipeStart + i]); + } + + for (UINT_32 i = 0; i < bankXorBits; i++) + { + InitChannel(1, 2, bankXorBits - i - 1 + pipeXorBits, &pEquation->xor2[bankStart + i]); + } + } + } + + pEquation->numBits = blockSizeLog2; + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeThickEquation +* +* @brief +* Interface function stub of ComputeThickEquation +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeThickEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + ADDR_ASSERT(IsTex3d(rsrcType)); + + UINT_32 blockSizeLog2 = GetBlockSizeLog2(swMode); + + UINT_32 maxXorBits = blockSizeLog2; + if (IsNonPrtXor(swMode)) + { + // For non-prt-xor, maybe need to initialize some more bits for xor + // The highest xor bit used in equation will be max the following 3: + // 1. m_pipeInterleaveLog2 + 3 * pipeXorBits + // 2. m_pipeInterleaveLog2 + pipeXorBits + 3 * bankXorBits + // 3. blockSizeLog2 + + maxXorBits = Max(maxXorBits, m_pipeInterleaveLog2 + 3 * GetPipeXorBits(blockSizeLog2)); + maxXorBits = Max(maxXorBits, m_pipeInterleaveLog2 + + GetPipeXorBits(blockSizeLog2) + + 3 * GetBankXorBits(blockSizeLog2)); + } + + for (UINT_32 i = 0; i < elementBytesLog2; i++) + { + InitChannel(1, 0 , i, &pEquation->addr[i]); + } + + ADDR_CHANNEL_SETTING* pixelBit = &pEquation->addr[elementBytesLog2]; + + const UINT_32 maxBitsUsed = 12; + ADDR_ASSERT((3 * maxBitsUsed) >= maxXorBits); + ADDR_CHANNEL_SETTING x[maxBitsUsed] = {}; + ADDR_CHANNEL_SETTING y[maxBitsUsed] = {}; + ADDR_CHANNEL_SETTING z[maxBitsUsed] = {}; + + const UINT_32 extraXorBits = 24; + ADDR_ASSERT(extraXorBits >= maxXorBits - blockSizeLog2); + ADDR_CHANNEL_SETTING xorExtra[extraXorBits] = {}; + + for (UINT_32 i = 0; i < maxBitsUsed; i++) + { + InitChannel(1, 0, elementBytesLog2 + i, &x[i]); + InitChannel(1, 1, i, &y[i]); + InitChannel(1, 2, i, &z[i]); + } + + if (IsZOrderSwizzle(swMode)) + { + switch (elementBytesLog2) + { + case 0: + pixelBit[0] = x[0]; + pixelBit[1] = y[0]; + pixelBit[2] = x[1]; + pixelBit[3] = y[1]; + pixelBit[4] = z[0]; + pixelBit[5] = z[1]; + pixelBit[6] = x[2]; + pixelBit[7] = z[2]; + pixelBit[8] = y[2]; + pixelBit[9] = x[3]; + break; + case 1: + pixelBit[0] = x[0]; + pixelBit[1] = y[0]; + pixelBit[2] = x[1]; + pixelBit[3] = y[1]; + pixelBit[4] = z[0]; + pixelBit[5] = z[1]; + pixelBit[6] = z[2]; + pixelBit[7] = y[2]; + pixelBit[8] = x[2]; + break; + case 2: + pixelBit[0] = x[0]; + pixelBit[1] = y[0]; + pixelBit[2] = x[1]; + pixelBit[3] = z[0]; + pixelBit[4] = y[1]; + pixelBit[5] = z[1]; + pixelBit[6] = y[2]; + pixelBit[7] = x[2]; + break; + case 3: + pixelBit[0] = x[0]; + pixelBit[1] = y[0]; + pixelBit[2] = z[0]; + pixelBit[3] = x[1]; + pixelBit[4] = z[1]; + pixelBit[5] = y[1]; + pixelBit[6] = x[2]; + break; + case 4: + pixelBit[0] = x[0]; + pixelBit[1] = y[0]; + pixelBit[2] = z[0]; + pixelBit[3] = z[1]; + pixelBit[4] = y[1]; + pixelBit[5] = x[1]; + break; + default: + ADDR_ASSERT_ALWAYS(); + ret = ADDR_INVALIDPARAMS; + break; + } + } + else if (IsStandardSwizzle(rsrcType, swMode)) + { + switch (elementBytesLog2) + { + case 0: + pixelBit[0] = x[0]; + pixelBit[1] = x[1]; + pixelBit[2] = x[2]; + pixelBit[3] = x[3]; + pixelBit[4] = y[0]; + pixelBit[5] = y[1]; + pixelBit[6] = z[0]; + pixelBit[7] = z[1]; + pixelBit[8] = z[2]; + pixelBit[9] = y[2]; + break; + case 1: + pixelBit[0] = x[0]; + pixelBit[1] = x[1]; + pixelBit[2] = x[2]; + pixelBit[3] = y[0]; + pixelBit[4] = y[1]; + pixelBit[5] = z[0]; + pixelBit[6] = z[1]; + pixelBit[7] = z[2]; + pixelBit[8] = y[2]; + break; + case 2: + pixelBit[0] = x[0]; + pixelBit[1] = x[1]; + pixelBit[2] = y[0]; + pixelBit[3] = y[1]; + pixelBit[4] = z[0]; + pixelBit[5] = z[1]; + pixelBit[6] = y[2]; + pixelBit[7] = x[2]; + break; + case 3: + pixelBit[0] = x[0]; + pixelBit[1] = y[0]; + pixelBit[2] = y[1]; + pixelBit[3] = z[0]; + pixelBit[4] = z[1]; + pixelBit[5] = x[1]; + pixelBit[6] = x[2]; + break; + case 4: + pixelBit[0] = y[0]; + pixelBit[1] = y[1]; + pixelBit[2] = z[0]; + pixelBit[3] = z[1]; + pixelBit[4] = x[0]; + pixelBit[5] = x[1]; + break; + default: + ADDR_ASSERT_ALWAYS(); + ret = ADDR_INVALIDPARAMS; + break; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + ret = ADDR_INVALIDPARAMS; + } + + if (ret == ADDR_OK) + { + Dim3d microBlockDim = Block1K_3d[elementBytesLog2]; + UINT_32 xIdx = Log2(microBlockDim.w); + UINT_32 yIdx = Log2(microBlockDim.h); + UINT_32 zIdx = Log2(microBlockDim.d); + + pixelBit = pEquation->addr; + + const UINT_32 lowBits = 10; + ADDR_ASSERT(pEquation->addr[lowBits - 1].valid == 1); + ADDR_ASSERT(pEquation->addr[lowBits].valid == 0); + + for (UINT_32 i = lowBits; i < blockSizeLog2; i++) + { + if ((i % 3) == 0) + { + pixelBit[i] = x[xIdx++]; + } + else if ((i % 3) == 1) + { + pixelBit[i] = z[zIdx++]; + } + else + { + pixelBit[i] = y[yIdx++]; + } + } + + for (UINT_32 i = blockSizeLog2; i < maxXorBits; i++) + { + if ((i % 3) == 0) + { + xorExtra[i - blockSizeLog2] = x[xIdx++]; + } + else if ((i % 3) == 1) + { + xorExtra[i - blockSizeLog2] = z[zIdx++]; + } + else + { + xorExtra[i - blockSizeLog2] = y[yIdx++]; + } + } + + if (IsXor(swMode)) + { + // Fill XOR bits + UINT_32 pipeStart = m_pipeInterleaveLog2; + UINT_32 pipeXorBits = GetPipeXorBits(blockSizeLog2); + for (UINT_32 i = 0; i < pipeXorBits; i++) + { + UINT_32 xor1BitPos = pipeStart + (3 * pipeXorBits) - 1 - (2 * i); + ADDR_CHANNEL_SETTING* pXor1Src = (xor1BitPos < blockSizeLog2) ? + &pEquation->addr[xor1BitPos] : &xorExtra[xor1BitPos - blockSizeLog2]; + + InitChannel(&pEquation->xor1[pipeStart + i], pXor1Src); + + UINT_32 xor2BitPos = pipeStart + (3 * pipeXorBits) - 2 - (2 * i); + ADDR_CHANNEL_SETTING* pXor2Src = (xor2BitPos < blockSizeLog2) ? + &pEquation->addr[xor2BitPos] : &xorExtra[xor2BitPos - blockSizeLog2]; + + InitChannel(&pEquation->xor2[pipeStart + i], pXor2Src); + } + + UINT_32 bankStart = pipeStart + pipeXorBits; + UINT_32 bankXorBits = GetBankXorBits(blockSizeLog2); + for (UINT_32 i = 0; i < bankXorBits; i++) + { + UINT_32 xor1BitPos = bankStart + (3 * bankXorBits) - 1 - (2 * i); + ADDR_CHANNEL_SETTING* pXor1Src = (xor1BitPos < blockSizeLog2) ? + &pEquation->addr[xor1BitPos] : &xorExtra[xor1BitPos - blockSizeLog2]; + + InitChannel(&pEquation->xor1[bankStart + i], pXor1Src); + + UINT_32 xor2BitPos = bankStart + (3 * bankXorBits) - 2 - (2 * i); + ADDR_CHANNEL_SETTING* pXor2Src = (xor2BitPos < blockSizeLog2) ? + &pEquation->addr[xor2BitPos] : &xorExtra[xor2BitPos - blockSizeLog2]; + + InitChannel(&pEquation->xor2[bankStart + i], pXor2Src); + } + } + + pEquation->numBits = blockSizeLog2; + } + + return ret; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::IsValidDisplaySwizzleMode +* +* @brief +* Check if a swizzle mode is supported by display engine +* +* @return +* TRUE is swizzle mode is supported by display engine +************************************************************************************************************************ +*/ +BOOL_32 Gfx9Lib::IsValidDisplaySwizzleMode( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const +{ + BOOL_32 support = FALSE; + + if (m_settings.isDce12) + { + switch (pIn->swizzleMode) + { + case ADDR_SW_256B_D: + case ADDR_SW_256B_R: + support = (pIn->bpp == 32); + break; + + case ADDR_SW_LINEAR: + case ADDR_SW_4KB_D: + case ADDR_SW_4KB_R: + case ADDR_SW_64KB_D: + case ADDR_SW_64KB_R: + case ADDR_SW_4KB_D_X: + case ADDR_SW_4KB_R_X: + case ADDR_SW_64KB_D_X: + case ADDR_SW_64KB_R_X: + support = (pIn->bpp <= 64); + break; + + default: + break; + } + } + else if (m_settings.isDcn1) + { + switch (pIn->swizzleMode) + { + case ADDR_SW_4KB_D: + case ADDR_SW_64KB_D: + case ADDR_SW_64KB_D_T: + case ADDR_SW_4KB_D_X: + case ADDR_SW_64KB_D_X: + support = (pIn->bpp == 64); + break; + + case ADDR_SW_LINEAR: + case ADDR_SW_4KB_S: + case ADDR_SW_64KB_S: + case ADDR_SW_64KB_S_T: + case ADDR_SW_4KB_S_X: + case ADDR_SW_64KB_S_X: + support = (pIn->bpp <= 64); + break; + + default: + break; + } + } + else + { + ADDR_NOT_IMPLEMENTED(); + } + + return support; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputePipeBankXor +* +* @brief +* Generate a PipeBankXor value to be ORed into bits above pipeInterleaveBits of address +* +* @return +* PipeBankXor value +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputePipeBankXor( + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const +{ + if (IsXor(pIn->swizzleMode)) + { + UINT_32 macroBlockBits = GetBlockSizeLog2(pIn->swizzleMode); + UINT_32 pipeBits = GetPipeXorBits(macroBlockBits); + UINT_32 bankBits = GetBankXorBits(macroBlockBits); + + UINT_32 pipeXor = 0; + UINT_32 bankXor = 0; + + const UINT_32 bankMask = (1 << bankBits) - 1; + const UINT_32 index = pIn->surfIndex & bankMask; + + const UINT_32 bpp = pIn->flags.fmask ? + GetFmaskBpp(pIn->numSamples, pIn->numFrags) : GetElemLib()->GetBitsPerPixel(pIn->format); + if (bankBits == 4) + { + static const UINT_32 BankXorSmallBpp[] = {0, 7, 4, 3, 8, 15, 12, 11, 1, 6, 5, 2, 9, 14, 13, 10}; + static const UINT_32 BankXorLargeBpp[] = {0, 7, 8, 15, 4, 3, 12, 11, 1, 6, 9, 14, 5, 2, 13, 10}; + + bankXor = (bpp <= 32) ? BankXorSmallBpp[index] : BankXorLargeBpp[index]; + } + else if (bankBits > 0) + { + UINT_32 bankIncrease = (1 << (bankBits - 1)) - 1; + bankIncrease = (bankIncrease == 0) ? 1 : bankIncrease; + bankXor = (index * bankIncrease) & bankMask; + } + + pOut->pipeBankXor = (bankXor << pipeBits) | pipeXor; + } + else + { + pOut->pipeBankXor = 0; + } + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeSlicePipeBankXor +* +* @brief +* Generate slice PipeBankXor value based on base PipeBankXor value and slice id +* +* @return +* PipeBankXor value +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeSlicePipeBankXor( + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const +{ + UINT_32 macroBlockBits = GetBlockSizeLog2(pIn->swizzleMode); + UINT_32 pipeBits = GetPipeXorBits(macroBlockBits); + UINT_32 bankBits = GetBankXorBits(macroBlockBits); + + UINT_32 pipeXor = ReverseBitVector(pIn->slice, pipeBits); + UINT_32 bankXor = ReverseBitVector(pIn->slice >> pipeBits, bankBits); + + pOut->pipeBankXor = pIn->basePipeBankXor ^ (pipeXor | (bankXor << pipeBits)); + + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeSubResourceOffsetForSwizzlePattern +* +* @brief +* Compute sub resource offset to support swizzle pattern +* +* @return +* Offset +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeSubResourceOffsetForSwizzlePattern( + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const +{ + ADDR_ASSERT(IsThin(pIn->resourceType, pIn->swizzleMode)); + + UINT_32 macroBlockBits = GetBlockSizeLog2(pIn->swizzleMode); + UINT_32 pipeBits = GetPipeXorBits(macroBlockBits); + UINT_32 bankBits = GetBankXorBits(macroBlockBits); + UINT_32 pipeXor = ReverseBitVector(pIn->slice, pipeBits); + UINT_32 bankXor = ReverseBitVector(pIn->slice >> pipeBits, bankBits); + UINT_32 pipeBankXor = ((pipeXor | (bankXor << pipeBits)) ^ (pIn->pipeBankXor)) << m_pipeInterleaveLog2; + + pOut->offset = pIn->slice * pIn->sliceSize + + pIn->macroBlockOffset + + (pIn->mipTailOffset ^ pipeBankXor) - + static_cast(pipeBankXor); + return ADDR_OK; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::ValidateNonSwModeParams +* +* @brief +* Validate compute surface info params except swizzle mode +* +* @return +* TRUE if parameters are valid, FALSE otherwise +************************************************************************************************************************ +*/ +BOOL_32 Gfx9Lib::ValidateNonSwModeParams( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const +{ + BOOL_32 valid = TRUE; + + if ((pIn->bpp == 0) || (pIn->bpp > 128) || (pIn->width == 0) || (pIn->numFrags > 8) || (pIn->numSamples > 16)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + if (pIn->resourceType >= ADDR_RSRC_MAX_TYPE) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + const BOOL_32 mipmap = (pIn->numMipLevels > 1); + const BOOL_32 msaa = (pIn->numFrags > 1); + const BOOL_32 isBc = ElemLib::IsBlockCompressed(pIn->format); + + const AddrResourceType rsrcType = pIn->resourceType; + const BOOL_32 tex3d = IsTex3d(rsrcType); + const BOOL_32 tex2d = IsTex2d(rsrcType); + const BOOL_32 tex1d = IsTex1d(rsrcType); + + const ADDR2_SURFACE_FLAGS flags = pIn->flags; + const BOOL_32 zbuffer = flags.depth || flags.stencil; + const BOOL_32 display = flags.display || flags.rotated; + const BOOL_32 stereo = flags.qbStereo; + const BOOL_32 fmask = flags.fmask; + + // Resource type check + if (tex1d) + { + if (msaa || zbuffer || display || stereo || isBc || fmask) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex2d) + { + if ((msaa && mipmap) || (stereo && msaa) || (stereo && mipmap)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (tex3d) + { + if (msaa || zbuffer || display || stereo || fmask) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + return valid; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::ValidateSwModeParams +* +* @brief +* Validate compute surface info related to swizzle mode +* +* @return +* TRUE if parameters are valid, FALSE otherwise +************************************************************************************************************************ +*/ +BOOL_32 Gfx9Lib::ValidateSwModeParams( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const +{ + BOOL_32 valid = TRUE; + + if ((pIn->swizzleMode >= ADDR_SW_MAX_TYPE) || (IsValidSwMode(pIn->swizzleMode) == FALSE)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + const BOOL_32 mipmap = (pIn->numMipLevels > 1); + const BOOL_32 msaa = (pIn->numFrags > 1); + const BOOL_32 isBc = ElemLib::IsBlockCompressed(pIn->format); + const BOOL_32 is422 = ElemLib::IsMacroPixelPacked(pIn->format); + + const AddrResourceType rsrcType = pIn->resourceType; + const BOOL_32 tex3d = IsTex3d(rsrcType); + const BOOL_32 tex2d = IsTex2d(rsrcType); + const BOOL_32 tex1d = IsTex1d(rsrcType); + + const AddrSwizzleMode swizzle = pIn->swizzleMode; + const BOOL_32 linear = IsLinear(swizzle); + const BOOL_32 blk256B = IsBlock256b(swizzle); + const BOOL_32 isNonPrtXor = IsNonPrtXor(swizzle); + + const ADDR2_SURFACE_FLAGS flags = pIn->flags; + const BOOL_32 zbuffer = flags.depth || flags.stencil; + const BOOL_32 color = flags.color; + const BOOL_32 texture = flags.texture; + const BOOL_32 display = flags.display || flags.rotated; + const BOOL_32 prt = flags.prt; + const BOOL_32 fmask = flags.fmask; + + const BOOL_32 thin3d = tex3d && flags.view3dAs2dArray; + const BOOL_32 zMaxMip = tex3d && mipmap && + (pIn->numSlices >= pIn->width) && (pIn->numSlices >= pIn->height); + + // Misc check + if (msaa && (GetBlockSize(swizzle) < (m_pipeInterleaveBytes * pIn->numFrags))) + { + // MSAA surface must have blk_bytes/pipe_interleave >= num_samples + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + if (display && (IsValidDisplaySwizzleMode(pIn) == FALSE)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + if ((pIn->bpp == 96) && (linear == FALSE)) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + if (prt && isNonPrtXor) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + // Resource type check + if (tex1d) + { + if (linear == FALSE) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + + // Swizzle type check + if (linear) + { + if (((tex1d == FALSE) && prt) || zbuffer || msaa || (pIn->bpp == 0) || + ((pIn->bpp % 8) != 0) || (isBc && texture) || fmask) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsZOrderSwizzle(swizzle)) + { + if ((color && msaa) || thin3d || isBc || is422 || (tex2d && (pIn->bpp > 64)) || (msaa && (pIn->bpp > 32))) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsStandardSwizzle(swizzle)) + { + if (zbuffer || thin3d || (tex3d && (pIn->bpp == 128) && color) || fmask) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsDisplaySwizzle(swizzle)) + { + if (zbuffer || (prt && tex3d) || fmask || zMaxMip) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else if (IsRotateSwizzle(swizzle)) + { + if (zbuffer || (pIn->bpp > 64) || tex3d || isBc || fmask) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + + // Block type check + if (blk256B) + { + if (prt || zbuffer || tex3d || mipmap || msaa) + { + ADDR_ASSERT_ALWAYS(); + valid = FALSE; + } + } + + return valid; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeSurfaceInfoSanityCheck +* +* @brief +* Compute surface info sanity check +* +* @return +* ADDR_OK if parameters are valid, ADDR_INVALIDPARAMS otherwise +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeSurfaceInfoSanityCheck( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const +{ + return ValidateNonSwModeParams(pIn) && ValidateSwModeParams(pIn) ? ADDR_OK : ADDR_INVALIDPARAMS; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlGetPreferredSurfaceSetting +* +* @brief +* Internal function to get suggested surface information for cliet to use +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_INVALIDPARAMS; + ElemLib* pElemLib = GetElemLib(); + + UINT_32 bpp = pIn->bpp; + UINT_32 width = Max(pIn->width, 1u); + UINT_32 height = Max(pIn->height, 1u); + UINT_32 numSamples = Max(pIn->numSamples, 1u); + UINT_32 numFrags = (pIn->numFrags == 0) ? numSamples : pIn->numFrags; + + if (pIn->flags.fmask) + { + bpp = GetFmaskBpp(numSamples, numFrags); + numFrags = 1; + numSamples = 1; + pOut->resourceType = ADDR_RSRC_TEX_2D; + } + else + { + // Set format to INVALID will skip this conversion + if (pIn->format != ADDR_FMT_INVALID) + { + UINT_32 expandX, expandY; + + // Don't care for this case + ElemMode elemMode = ADDR_UNCOMPRESSED; + + // Get compression/expansion factors and element mode which indicates compression/expansion + bpp = pElemLib->GetBitsPerPixel(pIn->format, + &elemMode, + &expandX, + &expandY); + + UINT_32 basePitch = 0; + GetElemLib()->AdjustSurfaceInfo(elemMode, + expandX, + expandY, + &bpp, + &basePitch, + &width, + &height); + } + + // The output may get changed for volume(3D) texture resource in future + pOut->resourceType = pIn->resourceType; + } + + const UINT_32 numSlices = Max(pIn->numSlices, 1u); + const UINT_32 numMipLevels = Max(pIn->numMipLevels, 1u); + const BOOL_32 msaa = (numFrags > 1) || (numSamples > 1); + const BOOL_32 displayRsrc = pIn->flags.display || pIn->flags.rotated; + + // Pre sanity check on non swizzle mode parameters + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {}; + localIn.flags = pIn->flags; + localIn.resourceType = pOut->resourceType; + localIn.format = pIn->format; + localIn.bpp = bpp; + localIn.width = width; + localIn.height = height; + localIn.numSlices = numSlices; + localIn.numMipLevels = numMipLevels; + localIn.numSamples = numSamples; + localIn.numFrags = numFrags; + + if (ValidateNonSwModeParams(&localIn)) + { + // Forbid swizzle mode(s) by client setting + ADDR2_SWMODE_SET allowedSwModeSet = {}; + allowedSwModeSet.value |= pIn->forbiddenBlock.linear ? 0 : Gfx9LinearSwModeMask; + allowedSwModeSet.value |= pIn->forbiddenBlock.micro ? 0 : Gfx9Blk256BSwModeMask; + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThin4KB ? 0 : + ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx9Rsrc3dThin4KBSwModeMask : Gfx9Blk4KBSwModeMask); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThick4KB ? 0 : + ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx9Rsrc3dThick4KBSwModeMask : 0); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThin64KB ? 0 : + ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx9Rsrc3dThin64KBSwModeMask : Gfx9Blk64KBSwModeMask); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThick64KB ? 0 : + ((pOut->resourceType == ADDR_RSRC_TEX_3D) ? Gfx9Rsrc3dThick64KBSwModeMask : 0); + + if (pIn->preferredSwSet.value != 0) + { + allowedSwModeSet.value &= pIn->preferredSwSet.sw_Z ? ~0 : ~Gfx9ZSwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_S ? ~0 : ~Gfx9StandardSwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_D ? ~0 : ~Gfx9DisplaySwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_R ? ~0 : ~Gfx9RotateSwModeMask; + } + + if (pIn->noXor) + { + allowedSwModeSet.value &= ~Gfx9XorSwModeMask; + } + + if (pIn->maxAlign > 0) + { + if (pIn->maxAlign < Size64K) + { + allowedSwModeSet.value &= ~Gfx9Blk64KBSwModeMask; + } + + if (pIn->maxAlign < Size4K) + { + allowedSwModeSet.value &= ~Gfx9Blk4KBSwModeMask; + } + + if (pIn->maxAlign < Size256) + { + allowedSwModeSet.value &= ~Gfx9Blk256BSwModeMask; + } + } + + // Filter out invalid swizzle mode(s) by image attributes and HW restrictions + switch (pOut->resourceType) + { + case ADDR_RSRC_TEX_1D: + allowedSwModeSet.value &= Gfx9Rsrc1dSwModeMask; + break; + + case ADDR_RSRC_TEX_2D: + allowedSwModeSet.value &= pIn->flags.prt ? Gfx9Rsrc2dPrtSwModeMask : Gfx9Rsrc2dSwModeMask; + + if (bpp > 64) + { + allowedSwModeSet.value &= ~(Gfx9RotateSwModeMask | Gfx9ZSwModeMask); + } + break; + + case ADDR_RSRC_TEX_3D: + allowedSwModeSet.value &= pIn->flags.prt ? Gfx9Rsrc3dPrtSwModeMask : Gfx9Rsrc3dSwModeMask; + + if ((numMipLevels > 1) && (numSlices >= width) && (numSlices >= height)) + { + // SW_*_D for 3D mipmaps (maxmip > 0) is only supported for Xmajor or Ymajor mipmap + // When depth (Z) is the maximum dimension then must use one of the SW_*_S + // or SW_*_Z modes if mipmapping is desired on a 3D surface + allowedSwModeSet.value &= ~Gfx9DisplaySwModeMask; + } + + if ((bpp == 128) && pIn->flags.color) + { + allowedSwModeSet.value &= ~Gfx9StandardSwModeMask; + } + + if (pIn->flags.view3dAs2dArray) + { + allowedSwModeSet.value &= Gfx9Rsrc3dThinSwModeMask | Gfx9LinearSwModeMask; + } + break; + + default: + ADDR_ASSERT_ALWAYS(); + allowedSwModeSet.value = 0; + break; + } + + if (pIn->format == ADDR_FMT_32_32_32) + { + allowedSwModeSet.value &= Gfx9LinearSwModeMask; + } + + if (ElemLib::IsBlockCompressed(pIn->format)) + { + if (pIn->flags.texture) + { + allowedSwModeSet.value &= Gfx9StandardSwModeMask | Gfx9DisplaySwModeMask; + } + else + { + allowedSwModeSet.value &= Gfx9StandardSwModeMask | Gfx9DisplaySwModeMask | Gfx9LinearSwModeMask; + } + } + + if (ElemLib::IsMacroPixelPacked(pIn->format) || + (msaa && ((bpp > 32) || pIn->flags.color || pIn->flags.unordered))) + { + allowedSwModeSet.value &= ~Gfx9ZSwModeMask; + } + + if (pIn->flags.fmask || pIn->flags.depth || pIn->flags.stencil) + { + allowedSwModeSet.value &= Gfx9ZSwModeMask; + + if (pIn->flags.noMetadata == FALSE) + { + if (pIn->flags.depth && + pIn->flags.texture && + (((bpp == 16) && (numFrags >= 4)) || ((bpp == 32) && (numFrags >= 2)))) + { + // When _X/_T swizzle mode was used for MSAA depth texture, TC will get zplane + // equation from wrong address within memory range a tile covered and use the + // garbage data for compressed Z reading which finally leads to corruption. + allowedSwModeSet.value &= ~Gfx9XorSwModeMask; + } + + if (m_settings.htileCacheRbConflict && + (pIn->flags.depth || pIn->flags.stencil) && + (numSlices > 1) && + (pIn->flags.metaRbUnaligned == FALSE) && + (pIn->flags.metaPipeUnaligned == FALSE)) + { + // Z_X 2D array with Rb/Pipe aligned HTile won't have metadata cache coherency + allowedSwModeSet.value &= ~Gfx9XSwModeMask; + } + } + } + + if (msaa) + { + allowedSwModeSet.value &= Gfx9MsaaSwModeMask; + } + + if ((numFrags > 1) && + (Size4K < (m_pipeInterleaveBytes * numFrags))) + { + // MSAA surface must have blk_bytes/pipe_interleave >= num_samples + allowedSwModeSet.value &= Gfx9Blk64KBSwModeMask; + } + + if (numMipLevels > 1) + { + allowedSwModeSet.value &= ~Gfx9Blk256BSwModeMask; + } + + if (displayRsrc) + { + if (m_settings.isDce12) + { + allowedSwModeSet.value &= (bpp == 32) ? Dce12Bpp32SwModeMask : Dce12NonBpp32SwModeMask; + } + else if (m_settings.isDcn1) + { + allowedSwModeSet.value &= (bpp == 64) ? Dcn1Bpp64SwModeMask : Dcn1NonBpp64SwModeMask; + } + else + { + ADDR_NOT_IMPLEMENTED(); + } + } + + if (allowedSwModeSet.value != 0) + { +#if DEBUG + // Post sanity check, at least AddrLib should accept the output generated by its own + UINT_32 validateSwModeSet = allowedSwModeSet.value; + + for (UINT_32 i = 0; validateSwModeSet != 0; i++) + { + if (validateSwModeSet & 1) + { + localIn.swizzleMode = static_cast(i); + ADDR_ASSERT(ValidateSwModeParams(&localIn)); + } + + validateSwModeSet >>= 1; + } +#endif + + pOut->validSwModeSet = allowedSwModeSet; + pOut->canXor = (allowedSwModeSet.value & Gfx9XorSwModeMask) ? TRUE : FALSE; + pOut->validBlockSet = GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType); + pOut->validSwTypeSet = GetAllowedSwSet(allowedSwModeSet); + + pOut->clientPreferredSwSet = pIn->preferredSwSet; + + if (pOut->clientPreferredSwSet.value == 0) + { + pOut->clientPreferredSwSet.value = AddrSwSetAll; + } + + // Apply optional restrictions + if (pIn->flags.needEquation) + { + FilterInvalidEqSwizzleMode(allowedSwModeSet, pIn->resourceType, Log2(bpp >> 3)); + } + + if (allowedSwModeSet.value == Gfx9LinearSwModeMask) + { + pOut->swizzleMode = ADDR_SW_LINEAR; + } + else + { + // Always ignore linear swizzle mode if there is other choice. + allowedSwModeSet.swLinear = 0; + + ADDR2_BLOCK_SET allowedBlockSet = GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType); + + // Determine block size if there is 2 or more block type candidates + if (IsPow2(allowedBlockSet.value) == FALSE) + { + AddrSwizzleMode swMode[AddrBlockMaxTiledType] = { ADDR_SW_LINEAR }; + + swMode[AddrBlockMicro] = ADDR_SW_256B_D; + swMode[AddrBlockThin4KB] = ADDR_SW_4KB_D; + swMode[AddrBlockThin64KB] = ADDR_SW_64KB_D; + + if (pOut->resourceType == ADDR_RSRC_TEX_3D) + { + swMode[AddrBlockThick4KB] = ADDR_SW_4KB_S; + swMode[AddrBlockThick64KB] = ADDR_SW_64KB_S; + } + + Dim3d blkDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}}; + Dim3d padDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}}; + UINT_64 padSize[AddrBlockMaxTiledType] = {0}; + + const UINT_32 ratioLow = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 3 : 2); + const UINT_32 ratioHi = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 2 : 1); + const UINT_64 sizeAlignInElement = Max(NextPow2(pIn->minSizeAlign) / (bpp >> 3), 1u); + UINT_32 minSizeBlk = AddrBlockMicro; + UINT_64 minSize = 0; + + for (UINT_32 i = AddrBlockMicro; i < AddrBlockMaxTiledType; i++) + { + if (allowedBlockSet.value & (1 << i)) + { + ComputeBlockDimensionForSurf(&blkDim[i].w, + &blkDim[i].h, + &blkDim[i].d, + bpp, + numFrags, + pOut->resourceType, + swMode[i]); + + if (displayRsrc) + { + blkDim[i].w = PowTwoAlign(blkDim[i].w, 32); + } + + padSize[i] = ComputePadSize(&blkDim[i], width, height, numSlices, &padDim[i]); + padSize[i] = PowTwoAlign(padSize[i] * numFrags, sizeAlignInElement); + + if ((minSize == 0) || + ((padSize[i] * ratioHi) <= (minSize * ratioLow))) + { + minSize = padSize[i]; + minSizeBlk = i; + } + } + } + + if ((allowedBlockSet.micro == TRUE) && + (width <= blkDim[AddrBlockMicro].w) && + (height <= blkDim[AddrBlockMicro].h) && + (NextPow2(pIn->minSizeAlign) <= Size256)) + { + minSizeBlk = AddrBlockMicro; + } + + if (minSizeBlk == AddrBlockMicro) + { + ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx9Blk256BSwModeMask; + } + else if (minSizeBlk == AddrBlockThick4KB) + { + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx9Rsrc3dThick4KBSwModeMask; + } + else if (minSizeBlk == AddrBlockThin4KB) + { + allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? + Gfx9Rsrc3dThin4KBSwModeMask : Gfx9Blk4KBSwModeMask; + } + else if (minSizeBlk == AddrBlockThick64KB) + { + ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D); + allowedSwModeSet.value &= Gfx9Rsrc3dThick64KBSwModeMask; + } + else + { + ADDR_ASSERT(minSizeBlk == AddrBlockThin64KB); + allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ? + Gfx9Rsrc3dThin64KBSwModeMask : Gfx9Blk64KBSwModeMask; + } + } + + // Block type should be determined. + ADDR_ASSERT(IsPow2(GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType).value)); + + ADDR2_SWTYPE_SET allowedSwSet = GetAllowedSwSet(allowedSwModeSet); + + // Determine swizzle type if there is 2 or more swizzle type candidates + if (IsPow2(allowedSwSet.value) == FALSE) + { + if (ElemLib::IsBlockCompressed(pIn->format)) + { + if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx9DisplaySwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_S); + allowedSwModeSet.value &= Gfx9StandardSwModeMask; + } + } + else if (ElemLib::IsMacroPixelPacked(pIn->format)) + { + if (allowedSwSet.sw_S) + { + allowedSwModeSet.value &= Gfx9StandardSwModeMask; + } + else if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx9DisplaySwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_R); + allowedSwModeSet.value &= Gfx9RotateSwModeMask; + } + } + else if (pOut->resourceType == ADDR_RSRC_TEX_3D) + { + if (pIn->flags.color && allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx9DisplaySwModeMask; + } + else if (allowedSwSet.sw_Z) + { + allowedSwModeSet.value &= Gfx9ZSwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_S); + allowedSwModeSet.value &= Gfx9StandardSwModeMask; + } + } + else + { + if (pIn->flags.rotated && allowedSwSet.sw_R) + { + allowedSwModeSet.value &= Gfx9RotateSwModeMask; + } + else if (allowedSwSet.sw_D) + { + allowedSwModeSet.value &= Gfx9DisplaySwModeMask; + } + else if (allowedSwSet.sw_S) + { + allowedSwModeSet.value &= Gfx9StandardSwModeMask; + } + else + { + ADDR_ASSERT(allowedSwSet.sw_Z); + allowedSwModeSet.value &= Gfx9ZSwModeMask; + } + } + } + + // Swizzle type should be determined. + ADDR_ASSERT(IsPow2(GetAllowedSwSet(allowedSwModeSet).value)); + + // Determine swizzle mode now. Always select the "largest" swizzle mode for a given block type + swizzle + // type combination. For example, for AddrBlockThin64KB + ADDR_SW_S, select SW_64KB_S_X(25) if it's + // available, or otherwise select SW_64KB_S_T(17) if it's available, or otherwise select SW_64KB_S(9). + pOut->swizzleMode = static_cast(Log2NonPow2(allowedSwModeSet.value)); + } + + returnCode = ADDR_OK; + } + else + { + // Invalid combination... + ADDR_ASSERT_ALWAYS(); + } + } + else + { + // Invalid combination... + ADDR_ASSERT_ALWAYS(); + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::ComputeStereoInfo +* +* @brief +* Compute height alignment and right eye pipeBankXor for stereo surface +* +* @return +* Error code +* +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::ComputeStereoInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut, + UINT_32* pHeightAlign + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + UINT_32 eqIndex = HwlGetEquationIndex(pIn, pOut); + + if (eqIndex < m_numEquations) + { + if (IsXor(pIn->swizzleMode)) + { + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const UINT_32 numPipeBits = GetPipeXorBits(blkSizeLog2); + const UINT_32 numBankBits = GetBankXorBits(blkSizeLog2); + const UINT_32 bppLog2 = Log2(pIn->bpp >> 3); + const UINT_32 maxYCoordBlock256 = Log2(Block256_2d[bppLog2].h) - 1; + const ADDR_EQUATION *pEqToCheck = &m_equationTable[eqIndex]; + + ADDR_ASSERT(maxYCoordBlock256 == + GetMaxValidChannelIndex(&pEqToCheck->addr[0], Log2Size256, 1)); + + const UINT_32 maxYCoordInBaseEquation = + (blkSizeLog2 - Log2Size256) / 2 + maxYCoordBlock256; + + ADDR_ASSERT(maxYCoordInBaseEquation == + GetMaxValidChannelIndex(&pEqToCheck->addr[0], blkSizeLog2, 1)); + + const UINT_32 maxYCoordInPipeXor = (numPipeBits == 0) ? 0 : maxYCoordBlock256 + numPipeBits; + + ADDR_ASSERT(maxYCoordInPipeXor == + GetMaxValidChannelIndex(&pEqToCheck->xor1[m_pipeInterleaveLog2], numPipeBits, 1)); + + const UINT_32 maxYCoordInBankXor = (numBankBits == 0) ? + 0 : maxYCoordBlock256 + (numPipeBits + 1) / 2 + numBankBits; + + ADDR_ASSERT(maxYCoordInBankXor == + GetMaxValidChannelIndex(&pEqToCheck->xor1[m_pipeInterleaveLog2 + numPipeBits], numBankBits, 1)); + + const UINT_32 maxYCoordInPipeBankXor = Max(maxYCoordInPipeXor, maxYCoordInBankXor); + + if (maxYCoordInPipeBankXor > maxYCoordInBaseEquation) + { + *pHeightAlign = 1u << maxYCoordInPipeBankXor; + + if (pOut->pStereoInfo != NULL) + { + pOut->pStereoInfo->rightSwizzle = 0; + + if ((PowTwoAlign(pIn->height, *pHeightAlign) % (*pHeightAlign * 2)) != 0) + { + if (maxYCoordInPipeXor == maxYCoordInPipeBankXor) + { + pOut->pStereoInfo->rightSwizzle |= (1u << 1); + } + + if (maxYCoordInBankXor == maxYCoordInPipeBankXor) + { + pOut->pStereoInfo->rightSwizzle |= + 1u << ((numPipeBits % 2) ? numPipeBits : numPipeBits + 1); + } + + ADDR_ASSERT(pOut->pStereoInfo->rightSwizzle == + GetCoordActiveMask(&pEqToCheck->xor1[m_pipeInterleaveLog2], + numPipeBits + numBankBits, 1, maxYCoordInPipeBankXor)); + } + } + } + } + } + else + { + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeSurfaceInfoTiled +* +* @brief +* Internal function to calculate alignment for tiled surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeSurfaceInfoTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ComputeBlockDimensionForSurf(&pOut->blockWidth, + &pOut->blockHeight, + &pOut->blockSlices, + pIn->bpp, + pIn->numFrags, + pIn->resourceType, + pIn->swizzleMode); + + if (returnCode == ADDR_OK) + { + UINT_32 pitchAlignInElement = pOut->blockWidth; + + if ((IsTex2d(pIn->resourceType) == TRUE) && + (pIn->flags.display || pIn->flags.rotated) && + (pIn->numMipLevels <= 1) && + (pIn->numSamples <= 1) && + (pIn->numFrags <= 1)) + { + // Display engine needs pitch align to be at least 32 pixels. + pitchAlignInElement = PowTwoAlign(pitchAlignInElement, 32); + } + + pOut->pitch = PowTwoAlign(pIn->width, pitchAlignInElement); + + if ((pIn->numMipLevels <= 1) && (pIn->pitchInElement > 0)) + { + if ((pIn->pitchInElement % pitchAlignInElement) != 0) + { + returnCode = ADDR_INVALIDPARAMS; + } + else if (pIn->pitchInElement < pOut->pitch) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + pOut->pitch = pIn->pitchInElement; + } + } + + UINT_32 heightAlign = 0; + + if (pIn->flags.qbStereo) + { + returnCode = ComputeStereoInfo(pIn, pOut, &heightAlign); + } + + if (returnCode == ADDR_OK) + { + pOut->height = PowTwoAlign(pIn->height, pOut->blockHeight); + + if (heightAlign > 1) + { + pOut->height = PowTwoAlign(pOut->height, heightAlign); + } + + pOut->numSlices = PowTwoAlign(pIn->numSlices, pOut->blockSlices); + + pOut->epitchIsHeight = FALSE; + pOut->mipChainInTail = FALSE; + pOut->firstMipIdInTail = pIn->numMipLevels; + + pOut->mipChainPitch = pOut->pitch; + pOut->mipChainHeight = pOut->height; + pOut->mipChainSlice = pOut->numSlices; + + if (pIn->numMipLevels > 1) + { + pOut->firstMipIdInTail = GetMipChainInfo(pIn->resourceType, + pIn->swizzleMode, + pIn->bpp, + pIn->width, + pIn->height, + pIn->numSlices, + pOut->blockWidth, + pOut->blockHeight, + pOut->blockSlices, + pIn->numMipLevels, + pOut->pMipInfo); + + const UINT_32 endingMipId = Min(pOut->firstMipIdInTail, pIn->numMipLevels - 1); + + if (endingMipId == 0) + { + const Dim3d tailMaxDim = GetMipTailDim(pIn->resourceType, + pIn->swizzleMode, + pOut->blockWidth, + pOut->blockHeight, + pOut->blockSlices); + + pOut->epitchIsHeight = TRUE; + pOut->pitch = tailMaxDim.w; + pOut->height = tailMaxDim.h; + pOut->numSlices = IsThick(pIn->resourceType, pIn->swizzleMode) ? + tailMaxDim.d : pIn->numSlices; + pOut->mipChainInTail = TRUE; + } + else + { + UINT_32 mip0WidthInBlk = pOut->pitch / pOut->blockWidth; + UINT_32 mip0HeightInBlk = pOut->height / pOut->blockHeight; + + AddrMajorMode majorMode = GetMajorMode(pIn->resourceType, + pIn->swizzleMode, + mip0WidthInBlk, + mip0HeightInBlk, + pOut->numSlices / pOut->blockSlices); + if (majorMode == ADDR_MAJOR_Y) + { + UINT_32 mip1WidthInBlk = RoundHalf(mip0WidthInBlk); + + if ((mip1WidthInBlk == 1) && (endingMipId > 2)) + { + mip1WidthInBlk++; + } + + pOut->mipChainPitch += (mip1WidthInBlk * pOut->blockWidth); + + pOut->epitchIsHeight = FALSE; + } + else + { + UINT_32 mip1HeightInBlk = RoundHalf(mip0HeightInBlk); + + if ((mip1HeightInBlk == 1) && (endingMipId > 2)) + { + mip1HeightInBlk++; + } + + pOut->mipChainHeight += (mip1HeightInBlk * pOut->blockHeight); + + pOut->epitchIsHeight = TRUE; + } + } + + if (pOut->pMipInfo != NULL) + { + UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3); + + for (UINT_32 i = 0; i < pIn->numMipLevels; i++) + { + Dim3d mipStartPos = {0}; + UINT_32 mipTailOffsetInBytes = 0; + + mipStartPos = GetMipStartPos(pIn->resourceType, + pIn->swizzleMode, + pOut->pitch, + pOut->height, + pOut->numSlices, + pOut->blockWidth, + pOut->blockHeight, + pOut->blockSlices, + i, + elementBytesLog2, + &mipTailOffsetInBytes); + + UINT_32 pitchInBlock = + pOut->mipChainPitch / pOut->blockWidth; + UINT_32 sliceInBlock = + (pOut->mipChainHeight / pOut->blockHeight) * pitchInBlock; + UINT_64 blockIndex = + mipStartPos.d * sliceInBlock + mipStartPos.h * pitchInBlock + mipStartPos.w; + UINT_64 macroBlockOffset = + blockIndex << GetBlockSizeLog2(pIn->swizzleMode); + + pOut->pMipInfo[i].macroBlockOffset = macroBlockOffset; + pOut->pMipInfo[i].mipTailOffset = mipTailOffsetInBytes; + } + } + } + else if (pOut->pMipInfo != NULL) + { + pOut->pMipInfo[0].pitch = pOut->pitch; + pOut->pMipInfo[0].height = pOut->height; + pOut->pMipInfo[0].depth = IsTex3d(pIn->resourceType)? pOut->numSlices : 1; + pOut->pMipInfo[0].offset = 0; + } + + pOut->sliceSize = static_cast(pOut->mipChainPitch) * pOut->mipChainHeight * + (pIn->bpp >> 3) * pIn->numFrags; + pOut->surfSize = pOut->sliceSize * pOut->mipChainSlice; + pOut->baseAlign = ComputeSurfaceBaseAlignTiled(pIn->swizzleMode); + + if ((IsBlock256b(pIn->swizzleMode) == FALSE) && + (pIn->flags.color || pIn->flags.depth || pIn->flags.stencil || pIn->flags.fmask) && + (pIn->flags.texture == TRUE) && + (pIn->flags.noMetadata == FALSE) && + (pIn->flags.metaPipeUnaligned == FALSE)) + { + // Assume client requires pipe aligned metadata, which is TcCompatible and will be accessed by TC... + // Then we need extra padding for base surface. Otherwise, metadata and data surface for same pixel will + // be flushed to different pipes, but texture engine only uses pipe id of data surface to fetch both of + // them, which may cause invalid metadata to be fetched. + pOut->baseAlign = Max(pOut->baseAlign, m_pipeInterleaveBytes * m_pipes * m_se); + } + + if (pIn->flags.prt) + { + pOut->baseAlign = Max(pOut->baseAlign, PrtAlignment); + } + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeSurfaceInfoLinear +* +* @brief +* Internal function to calculate alignment for linear surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeSurfaceInfoLinear( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + UINT_32 pitch = 0; + UINT_32 actualHeight = 0; + UINT_32 elementBytes = pIn->bpp >> 3; + const UINT_32 alignment = pIn->flags.prt ? PrtAlignment : 256; + + if (IsTex1d(pIn->resourceType)) + { + if (pIn->height > 1) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + const UINT_32 pitchAlignInElement = alignment / elementBytes; + + pitch = PowTwoAlign(pIn->width, pitchAlignInElement); + actualHeight = pIn->numMipLevels; + + if (pIn->flags.prt == FALSE) + { + returnCode = ApplyCustomizedPitchHeight(pIn, elementBytes, pitchAlignInElement, + &pitch, &actualHeight); + } + + if (returnCode == ADDR_OK) + { + if (pOut->pMipInfo != NULL) + { + for (UINT_32 i = 0; i < pIn->numMipLevels; i++) + { + pOut->pMipInfo[i].offset = pitch * elementBytes * i; + pOut->pMipInfo[i].pitch = pitch; + pOut->pMipInfo[i].height = 1; + pOut->pMipInfo[i].depth = 1; + } + } + } + } + } + else + { + returnCode = ComputeSurfaceLinearPadding(pIn, &pitch, &actualHeight, pOut->pMipInfo); + } + + if ((pitch == 0) || (actualHeight == 0)) + { + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + pOut->pitch = pitch; + pOut->height = pIn->height; + pOut->numSlices = pIn->numSlices; + pOut->mipChainPitch = pitch; + pOut->mipChainHeight = actualHeight; + pOut->mipChainSlice = pOut->numSlices; + pOut->epitchIsHeight = (pIn->numMipLevels > 1) ? TRUE : FALSE; + pOut->sliceSize = static_cast(pOut->pitch) * actualHeight * elementBytes; + pOut->surfSize = pOut->sliceSize * pOut->numSlices; + pOut->baseAlign = (pIn->swizzleMode == ADDR_SW_LINEAR_GENERAL) ? (pIn->bpp / 8) : alignment; + pOut->blockWidth = (pIn->swizzleMode == ADDR_SW_LINEAR_GENERAL) ? 1 : (256 / elementBytes); + pOut->blockHeight = 1; + pOut->blockSlices = 1; + } + + // Post calculation validate + ADDR_ASSERT(pOut->sliceSize > 0); + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::GetMipChainInfo +* +* @brief +* Internal function to get out information about mip chain +* +* @return +* Smaller value between Id of first mip fitted in mip tail and max Id of mip being created +************************************************************************************************************************ +*/ +UINT_32 Gfx9Lib::GetMipChainInfo( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 bpp, + UINT_32 mip0Width, + UINT_32 mip0Height, + UINT_32 mip0Depth, + UINT_32 blockWidth, + UINT_32 blockHeight, + UINT_32 blockDepth, + UINT_32 numMipLevel, + ADDR2_MIP_INFO* pMipInfo) const +{ + const Dim3d tailMaxDim = + GetMipTailDim(resourceType, swizzleMode, blockWidth, blockHeight, blockDepth); + + UINT_32 mipPitch = mip0Width; + UINT_32 mipHeight = mip0Height; + UINT_32 mipDepth = IsTex3d(resourceType) ? mip0Depth : 1; + UINT_32 offset = 0; + UINT_32 firstMipIdInTail = numMipLevel; + BOOL_32 inTail = FALSE; + BOOL_32 finalDim = FALSE; + BOOL_32 is3dThick = IsThick(resourceType, swizzleMode); + BOOL_32 is3dThin = IsTex3d(resourceType) && (is3dThick == FALSE); + + for (UINT_32 mipId = 0; mipId < numMipLevel; mipId++) + { + if (inTail) + { + if (finalDim == FALSE) + { + UINT_32 mipSize; + + if (is3dThick) + { + mipSize = mipPitch * mipHeight * mipDepth * (bpp >> 3); + } + else + { + mipSize = mipPitch * mipHeight * (bpp >> 3); + } + + if (mipSize <= 256) + { + UINT_32 index = Log2(bpp >> 3); + + if (is3dThick) + { + mipPitch = Block256_3dZ[index].w; + mipHeight = Block256_3dZ[index].h; + mipDepth = Block256_3dZ[index].d; + } + else + { + mipPitch = Block256_2d[index].w; + mipHeight = Block256_2d[index].h; + } + + finalDim = TRUE; + } + } + } + else + { + inTail = IsInMipTail(resourceType, swizzleMode, tailMaxDim, + mipPitch, mipHeight, mipDepth); + + if (inTail) + { + firstMipIdInTail = mipId; + mipPitch = tailMaxDim.w; + mipHeight = tailMaxDim.h; + + if (is3dThick) + { + mipDepth = tailMaxDim.d; + } + } + else + { + mipPitch = PowTwoAlign(mipPitch, blockWidth); + mipHeight = PowTwoAlign(mipHeight, blockHeight); + + if (is3dThick) + { + mipDepth = PowTwoAlign(mipDepth, blockDepth); + } + } + } + + if (pMipInfo != NULL) + { + pMipInfo[mipId].pitch = mipPitch; + pMipInfo[mipId].height = mipHeight; + pMipInfo[mipId].depth = mipDepth; + pMipInfo[mipId].offset = offset; + } + + offset += (mipPitch * mipHeight * mipDepth * (bpp >> 3)); + + if (finalDim) + { + if (is3dThin) + { + mipDepth = Max(mipDepth >> 1, 1u); + } + } + else + { + mipPitch = Max(mipPitch >> 1, 1u); + mipHeight = Max(mipHeight >> 1, 1u); + + if (is3dThick || is3dThin) + { + mipDepth = Max(mipDepth >> 1, 1u); + } + } + } + + return firstMipIdInTail; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::GetMetaMiptailInfo +* +* @brief +* Get mip tail coordinate information. +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx9Lib::GetMetaMiptailInfo( + ADDR2_META_MIP_INFO* pInfo, ///< [out] output structure to store per mip coord + Dim3d mipCoord, ///< [in] mip tail base coord + UINT_32 numMipInTail, ///< [in] number of mips in tail + Dim3d* pMetaBlkDim ///< [in] meta block width/height/depth + ) const +{ + BOOL_32 isThick = (pMetaBlkDim->d > 1); + UINT_32 mipWidth = pMetaBlkDim->w; + UINT_32 mipHeight = pMetaBlkDim->h >> 1; + UINT_32 mipDepth = pMetaBlkDim->d; + UINT_32 minInc; + + if (isThick) + { + minInc = (pMetaBlkDim->h >= 512) ? 128 : ((pMetaBlkDim->h == 256) ? 64 : 32); + } + else if (pMetaBlkDim->h >= 1024) + { + minInc = 256; + } + else if (pMetaBlkDim->h == 512) + { + minInc = 128; + } + else + { + minInc = 64; + } + + UINT_32 blk32MipId = 0xFFFFFFFF; + + for (UINT_32 mip = 0; mip < numMipInTail; mip++) + { + pInfo[mip].inMiptail = TRUE; + pInfo[mip].startX = mipCoord.w; + pInfo[mip].startY = mipCoord.h; + pInfo[mip].startZ = mipCoord.d; + pInfo[mip].width = mipWidth; + pInfo[mip].height = mipHeight; + pInfo[mip].depth = mipDepth; + + if (mipWidth <= 32) + { + if (blk32MipId == 0xFFFFFFFF) + { + blk32MipId = mip; + } + + mipCoord.w = pInfo[blk32MipId].startX; + mipCoord.h = pInfo[blk32MipId].startY; + mipCoord.d = pInfo[blk32MipId].startZ; + + switch (mip - blk32MipId) + { + case 0: + mipCoord.w += 32; // 16x16 + break; + case 1: + mipCoord.h += 32; // 8x8 + break; + case 2: + mipCoord.h += 32; // 4x4 + mipCoord.w += 16; + break; + case 3: + mipCoord.h += 32; // 2x2 + mipCoord.w += 32; + break; + case 4: + mipCoord.h += 32; // 1x1 + mipCoord.w += 48; + break; + // The following are for BC/ASTC formats + case 5: + mipCoord.h += 48; // 1/2 x 1/2 + break; + case 6: + mipCoord.h += 48; // 1/4 x 1/4 + mipCoord.w += 16; + break; + case 7: + mipCoord.h += 48; // 1/8 x 1/8 + mipCoord.w += 32; + break; + case 8: + mipCoord.h += 48; // 1/16 x 1/16 + mipCoord.w += 48; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + mipWidth = ((mip - blk32MipId) == 0) ? 16 : 8; + mipHeight = mipWidth; + + if (isThick) + { + mipDepth = mipWidth; + } + } + else + { + if (mipWidth <= minInc) + { + // if we're below the minimal increment... + if (isThick) + { + // For 3d, just go in z direction + mipCoord.d += mipDepth; + } + else + { + // For 2d, first go across, then down + if ((mipWidth * 2) == minInc) + { + // if we're 2 mips below, that's when we go back in x, and down in y + mipCoord.w -= minInc; + mipCoord.h += minInc; + } + else + { + // otherwise, just go across in x + mipCoord.w += minInc; + } + } + } + else + { + // On even mip, go down, otherwise, go across + if (mip & 1) + { + mipCoord.w += mipWidth; + } + else + { + mipCoord.h += mipHeight; + } + } + // Divide the width by 2 + mipWidth >>= 1; + // After the first mip in tail, the mip is always a square + mipHeight = mipWidth; + // ...or for 3d, a cube + if (isThick) + { + mipDepth = mipWidth; + } + } + } +} + +/** +************************************************************************************************************************ +* Gfx9Lib::GetMipStartPos +* +* @brief +* Internal function to get out information about mip logical start position +* +* @return +* logical start position in macro block width/heith/depth of one mip level within one slice +************************************************************************************************************************ +*/ +Dim3d Gfx9Lib::GetMipStartPos( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 width, + UINT_32 height, + UINT_32 depth, + UINT_32 blockWidth, + UINT_32 blockHeight, + UINT_32 blockDepth, + UINT_32 mipId, + UINT_32 log2ElementBytes, + UINT_32* pMipTailBytesOffset) const +{ + Dim3d mipStartPos = {0}; + const Dim3d tailMaxDim = GetMipTailDim(resourceType, swizzleMode, blockWidth, blockHeight, blockDepth); + + // Report mip in tail if Mip0 is already in mip tail + BOOL_32 inMipTail = IsInMipTail(resourceType, swizzleMode, tailMaxDim, width, height, depth); + UINT_32 log2BlkSize = GetBlockSizeLog2(swizzleMode); + UINT_32 mipIndexInTail = mipId; + + if (inMipTail == FALSE) + { + // Mip 0 dimension, unit in block + UINT_32 mipWidthInBlk = width / blockWidth; + UINT_32 mipHeightInBlk = height / blockHeight; + UINT_32 mipDepthInBlk = depth / blockDepth; + AddrMajorMode majorMode = GetMajorMode(resourceType, + swizzleMode, + mipWidthInBlk, + mipHeightInBlk, + mipDepthInBlk); + + UINT_32 endingMip = mipId + 1; + + for (UINT_32 i = 1; i <= mipId; i++) + { + if ((i == 1) || (i == 3)) + { + if (majorMode == ADDR_MAJOR_Y) + { + mipStartPos.w += mipWidthInBlk; + } + else + { + mipStartPos.h += mipHeightInBlk; + } + } + else + { + if (majorMode == ADDR_MAJOR_X) + { + mipStartPos.w += mipWidthInBlk; + } + else if (majorMode == ADDR_MAJOR_Y) + { + mipStartPos.h += mipHeightInBlk; + } + else + { + mipStartPos.d += mipDepthInBlk; + } + } + + BOOL_32 inTail = FALSE; + + if (IsThick(resourceType, swizzleMode)) + { + UINT_32 dim = log2BlkSize % 3; + + if (dim == 0) + { + inTail = + (mipWidthInBlk <= 2) && (mipHeightInBlk == 1) && (mipDepthInBlk <= 2); + } + else if (dim == 1) + { + inTail = + (mipWidthInBlk == 1) && (mipHeightInBlk <= 2) && (mipDepthInBlk <= 2); + } + else + { + inTail = + (mipWidthInBlk <= 2) && (mipHeightInBlk <= 2) && (mipDepthInBlk == 1); + } + } + else + { + if (log2BlkSize & 1) + { + inTail = (mipWidthInBlk <= 2) && (mipHeightInBlk == 1); + } + else + { + inTail = (mipWidthInBlk == 1) && (mipHeightInBlk <= 2); + } + } + + if (inTail) + { + endingMip = i; + break; + } + + mipWidthInBlk = RoundHalf(mipWidthInBlk); + mipHeightInBlk = RoundHalf(mipHeightInBlk); + mipDepthInBlk = RoundHalf(mipDepthInBlk); + } + + if (mipId >= endingMip) + { + inMipTail = TRUE; + mipIndexInTail = mipId - endingMip; + } + } + + if (inMipTail) + { + UINT_32 index = mipIndexInTail + MaxMacroBits - log2BlkSize; + ADDR_ASSERT(index < sizeof(MipTailOffset256B) / sizeof(UINT_32)); + *pMipTailBytesOffset = MipTailOffset256B[index] << 8; + } + + return mipStartPos; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::HwlComputeSurfaceAddrFromCoordTiled +* +* @brief +* Internal function to calculate address from coord for tiled swizzle surface +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::HwlComputeSurfaceAddrFromCoordTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + localIn.swizzleMode = pIn->swizzleMode; + localIn.flags = pIn->flags; + localIn.resourceType = pIn->resourceType; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unalignedWidth, 1u); + localIn.height = Max(pIn->unalignedHeight, 1u); + localIn.numSlices = Max(pIn->numSlices, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + localIn.numFrags = Max(pIn->numFrags, 1u); + if (localIn.numMipLevels <= 1) + { + localIn.pitchInElement = pIn->pitchInElement; + } + + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR_E_RETURNCODE returnCode = ComputeSurfaceInfoTiled(&localIn, &localOut); + + BOOL_32 valid = (returnCode == ADDR_OK) && + (IsThin(pIn->resourceType, pIn->swizzleMode) || + IsThick(pIn->resourceType, pIn->swizzleMode)) && + ((pIn->pipeBankXor == 0) || (IsXor(pIn->swizzleMode))); + + if (valid) + { + UINT_32 log2ElementBytes = Log2(pIn->bpp >> 3); + Dim3d mipStartPos = {0}; + UINT_32 mipTailBytesOffset = 0; + + if (pIn->numMipLevels > 1) + { + // Mip-map chain cannot be MSAA surface + ADDR_ASSERT((pIn->numSamples <= 1) && (pIn->numFrags<= 1)); + + mipStartPos = GetMipStartPos(pIn->resourceType, + pIn->swizzleMode, + localOut.pitch, + localOut.height, + localOut.numSlices, + localOut.blockWidth, + localOut.blockHeight, + localOut.blockSlices, + pIn->mipId, + log2ElementBytes, + &mipTailBytesOffset); + } + + UINT_32 interleaveOffset = 0; + UINT_32 pipeBits = 0; + UINT_32 pipeXor = 0; + UINT_32 bankBits = 0; + UINT_32 bankXor = 0; + + if (IsThin(pIn->resourceType, pIn->swizzleMode)) + { + UINT_32 blockOffset = 0; + UINT_32 log2BlkSize = GetBlockSizeLog2(pIn->swizzleMode); + + if (IsZOrderSwizzle(pIn->swizzleMode)) + { + // Morton generation + if ((log2ElementBytes == 0) || (log2ElementBytes == 2)) + { + UINT_32 totalLowBits = 6 - log2ElementBytes; + UINT_32 mortBits = totalLowBits / 2; + UINT_32 lowBitsValue = MortonGen2d(pIn->y, pIn->x, mortBits); + // Are 9 bits enough? + UINT_32 highBitsValue = + MortonGen2d(pIn->x >> mortBits, pIn->y >> mortBits, 9) << totalLowBits; + blockOffset = lowBitsValue | highBitsValue; + ADDR_ASSERT(blockOffset == lowBitsValue + highBitsValue); + } + else + { + blockOffset = MortonGen2d(pIn->y, pIn->x, 13); + } + + // Fill LSBs with sample bits + if (pIn->numSamples > 1) + { + blockOffset *= pIn->numSamples; + blockOffset |= pIn->sample; + } + + // Shift according to BytesPP + blockOffset <<= log2ElementBytes; + } + else + { + // Micro block offset + UINT_32 microBlockOffset = ComputeSurface2DMicroBlockOffset(pIn); + blockOffset = microBlockOffset; + + // Micro block dimension + ADDR_ASSERT(log2ElementBytes < MaxNumOfBpp); + Dim2d microBlockDim = Block256_2d[log2ElementBytes]; + // Morton generation, does 12 bit enough? + blockOffset |= + MortonGen2d((pIn->x / microBlockDim.w), (pIn->y / microBlockDim.h), 12) << 8; + + // Sample bits start location + UINT_32 sampleStart = log2BlkSize - Log2(pIn->numSamples); + // Join sample bits information to the highest Macro block bits + if (IsNonPrtXor(pIn->swizzleMode)) + { + // Non-prt-Xor : xor highest Macro block bits with sample bits + blockOffset = blockOffset ^ (pIn->sample << sampleStart); + } + else + { + // Non-Xor or prt-Xor: replace highest Macro block bits with sample bits + // after this op, the blockOffset only contains log2 Macro block size bits + blockOffset %= (1 << sampleStart); + blockOffset |= (pIn->sample << sampleStart); + ADDR_ASSERT((blockOffset >> log2BlkSize) == 0); + } + } + + if (IsXor(pIn->swizzleMode)) + { + // Mask off bits above Macro block bits to keep page synonyms working for prt + if (IsPrt(pIn->swizzleMode)) + { + blockOffset &= ((1 << log2BlkSize) - 1); + } + + // Preserve offset inside pipe interleave + interleaveOffset = blockOffset & ((1 << m_pipeInterleaveLog2) - 1); + blockOffset >>= m_pipeInterleaveLog2; + + // Pipe/Se xor bits + pipeBits = GetPipeXorBits(log2BlkSize); + // Pipe xor + pipeXor = FoldXor2d(blockOffset, pipeBits); + blockOffset >>= pipeBits; + + // Bank xor bits + bankBits = GetBankXorBits(log2BlkSize); + // Bank Xor + bankXor = FoldXor2d(blockOffset, bankBits); + blockOffset >>= bankBits; + + // Put all the part back together + blockOffset <<= bankBits; + blockOffset |= bankXor; + blockOffset <<= pipeBits; + blockOffset |= pipeXor; + blockOffset <<= m_pipeInterleaveLog2; + blockOffset |= interleaveOffset; + } + + ADDR_ASSERT((blockOffset | mipTailBytesOffset) == (blockOffset + mipTailBytesOffset)); + ADDR_ASSERT((mipTailBytesOffset == 0u) || (blockOffset < (1u << log2BlkSize))); + + blockOffset |= mipTailBytesOffset; + + if (IsNonPrtXor(pIn->swizzleMode) && (pIn->numSamples <= 1)) + { + // Apply slice xor if not MSAA/PRT + blockOffset ^= (ReverseBitVector(pIn->slice, pipeBits) << m_pipeInterleaveLog2); + blockOffset ^= (ReverseBitVector(pIn->slice >> pipeBits, bankBits) << + (m_pipeInterleaveLog2 + pipeBits)); + } + + returnCode = ApplyCustomerPipeBankXor(pIn->swizzleMode, pIn->pipeBankXor, + bankBits, pipeBits, &blockOffset); + + blockOffset %= (1 << log2BlkSize); + + UINT_32 pitchInMacroBlock = localOut.mipChainPitch / localOut.blockWidth; + UINT_32 paddedHeightInMacroBlock = localOut.mipChainHeight / localOut.blockHeight; + UINT_32 sliceSizeInMacroBlock = pitchInMacroBlock * paddedHeightInMacroBlock; + UINT_64 macroBlockIndex = + (pIn->slice + mipStartPos.d) * sliceSizeInMacroBlock + + ((pIn->y / localOut.blockHeight) + mipStartPos.h) * pitchInMacroBlock + + ((pIn->x / localOut.blockWidth) + mipStartPos.w); + + pOut->addr = blockOffset | (macroBlockIndex << log2BlkSize); + } + else + { + UINT_32 log2BlkSize = GetBlockSizeLog2(pIn->swizzleMode); + + Dim3d microBlockDim = Block1K_3d[log2ElementBytes]; + + UINT_32 blockOffset = MortonGen3d((pIn->x / microBlockDim.w), + (pIn->y / microBlockDim.h), + (pIn->slice / microBlockDim.d), + 8); + + blockOffset <<= 10; + blockOffset |= ComputeSurface3DMicroBlockOffset(pIn); + + if (IsXor(pIn->swizzleMode)) + { + // Mask off bits above Macro block bits to keep page synonyms working for prt + if (IsPrt(pIn->swizzleMode)) + { + blockOffset &= ((1 << log2BlkSize) - 1); + } + + // Preserve offset inside pipe interleave + interleaveOffset = blockOffset & ((1 << m_pipeInterleaveLog2) - 1); + blockOffset >>= m_pipeInterleaveLog2; + + // Pipe/Se xor bits + pipeBits = GetPipeXorBits(log2BlkSize); + // Pipe xor + pipeXor = FoldXor3d(blockOffset, pipeBits); + blockOffset >>= pipeBits; + + // Bank xor bits + bankBits = GetBankXorBits(log2BlkSize); + // Bank Xor + bankXor = FoldXor3d(blockOffset, bankBits); + blockOffset >>= bankBits; + + // Put all the part back together + blockOffset <<= bankBits; + blockOffset |= bankXor; + blockOffset <<= pipeBits; + blockOffset |= pipeXor; + blockOffset <<= m_pipeInterleaveLog2; + blockOffset |= interleaveOffset; + } + + ADDR_ASSERT((blockOffset | mipTailBytesOffset) == (blockOffset + mipTailBytesOffset)); + ADDR_ASSERT((mipTailBytesOffset == 0u) || (blockOffset < (1u << log2BlkSize))); + blockOffset |= mipTailBytesOffset; + + returnCode = ApplyCustomerPipeBankXor(pIn->swizzleMode, pIn->pipeBankXor, + bankBits, pipeBits, &blockOffset); + + blockOffset %= (1 << log2BlkSize); + + UINT_32 xb = pIn->x / localOut.blockWidth + mipStartPos.w; + UINT_32 yb = pIn->y / localOut.blockHeight + mipStartPos.h; + UINT_32 zb = pIn->slice / localOut.blockSlices + + mipStartPos.d; + + UINT_32 pitchInBlock = localOut.mipChainPitch / localOut.blockWidth; + UINT_32 sliceSizeInBlock = + (localOut.mipChainHeight / localOut.blockHeight) * pitchInBlock; + UINT_64 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb; + + pOut->addr = blockOffset | (blockIndex << log2BlkSize); + } + } + else + { + returnCode = ADDR_INVALIDPARAMS; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::ComputeSurfaceInfoLinear +* +* @brief +* Internal function to calculate padding for linear swizzle 2D/3D surface +* +* @return +* N/A +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx9Lib::ComputeSurfaceLinearPadding( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input srtucture + UINT_32* pMipmap0PaddedWidth, ///< [out] padded width in element + UINT_32* pSlice0PaddedHeight, ///< [out] padded height for HW + ADDR2_MIP_INFO* pMipInfo ///< [out] per mip information + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + UINT_32 elementBytes = pIn->bpp >> 3; + UINT_32 pitchAlignInElement = 0; + + if (pIn->swizzleMode == ADDR_SW_LINEAR_GENERAL) + { + ADDR_ASSERT(pIn->numMipLevels <= 1); + ADDR_ASSERT(pIn->numSlices <= 1); + pitchAlignInElement = 1; + } + else + { + pitchAlignInElement = (256 / elementBytes); + } + + UINT_32 mipChainWidth = PowTwoAlign(pIn->width, pitchAlignInElement); + UINT_32 slice0PaddedHeight = pIn->height; + + returnCode = ApplyCustomizedPitchHeight(pIn, elementBytes, pitchAlignInElement, + &mipChainWidth, &slice0PaddedHeight); + + if (returnCode == ADDR_OK) + { + UINT_32 mipChainHeight = 0; + UINT_32 mipHeight = pIn->height; + UINT_32 mipDepth = (pIn->resourceType == ADDR_RSRC_TEX_3D) ? pIn->numSlices : 1; + + for (UINT_32 i = 0; i < pIn->numMipLevels; i++) + { + if (pMipInfo != NULL) + { + pMipInfo[i].offset = mipChainWidth * mipChainHeight * elementBytes; + pMipInfo[i].pitch = mipChainWidth; + pMipInfo[i].height = mipHeight; + pMipInfo[i].depth = mipDepth; + } + + mipChainHeight += mipHeight; + mipHeight = RoundHalf(mipHeight); + mipHeight = Max(mipHeight, 1u); + } + + *pMipmap0PaddedWidth = mipChainWidth; + *pSlice0PaddedHeight = (pIn->numMipLevels > 1) ? mipChainHeight : slice0PaddedHeight; + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx9Lib::ComputeThinBlockDimension +* +* @brief +* Internal function to get thin block width/height/depth in element from surface input params. +* +* @return +* N/A +************************************************************************************************************************ +*/ +VOID Gfx9Lib::ComputeThinBlockDimension( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + UINT_32 numSamples, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const +{ + ADDR_ASSERT(IsThin(resourceType, swizzleMode)); + + const UINT_32 log2BlkSize = GetBlockSizeLog2(swizzleMode); + const UINT_32 eleBytes = bpp >> 3; + const UINT_32 microBlockSizeTableIndex = Log2(eleBytes); + const UINT_32 log2blkSizeIn256B = log2BlkSize - 8; + const UINT_32 widthAmp = log2blkSizeIn256B / 2; + const UINT_32 heightAmp = log2blkSizeIn256B - widthAmp; + + ADDR_ASSERT(microBlockSizeTableIndex < sizeof(Block256_2d) / sizeof(Block256_2d[0])); + + *pWidth = (Block256_2d[microBlockSizeTableIndex].w << widthAmp); + *pHeight = (Block256_2d[microBlockSizeTableIndex].h << heightAmp); + *pDepth = 1; + + if (numSamples > 1) + { + const UINT_32 log2sample = Log2(numSamples); + const UINT_32 q = log2sample >> 1; + const UINT_32 r = log2sample & 1; + + if (log2BlkSize & 1) + { + *pWidth >>= q; + *pHeight >>= (q + r); + } + else + { + *pWidth >>= (q + r); + *pHeight >>= q; + } + } +} + +} // V2 +} // Addr diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.h new file mode 100644 index 0000000000..93e6515b26 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.h @@ -0,0 +1,640 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +************************************************************************************************************************ +* @file gfx9addrlib.h +* @brief Contgfx9ns the Gfx9Lib class definition. +************************************************************************************************************************ +*/ + +#ifndef __GFX9_ADDR_LIB_H__ +#define __GFX9_ADDR_LIB_H__ + +#include "addrlib2.h" +#include "coord.h" + +namespace Addr +{ +namespace V2 +{ + +/** +************************************************************************************************************************ +* @brief GFX9 specific settings structure. +************************************************************************************************************************ +*/ +struct Gfx9ChipSettings +{ + struct + { + // Asic/Generation name + UINT_32 isArcticIsland : 1; + UINT_32 isVega10 : 1; + UINT_32 isRaven : 1; + UINT_32 isVega12 : 1; + UINT_32 isVega20 : 1; + UINT_32 reserved0 : 27; + + // Display engine IP version name + UINT_32 isDce12 : 1; + UINT_32 isDcn1 : 1; + UINT_32 reserved1 : 30; + + // Misc configuration bits + UINT_32 metaBaseAlignFix : 1; + UINT_32 depthPipeXorDisable : 1; + UINT_32 htileAlignFix : 1; + UINT_32 applyAliasFix : 1; + UINT_32 htileCacheRbConflict: 1; + UINT_32 reserved2 : 27; + }; +}; + +/** +************************************************************************************************************************ +* @brief GFX9 data surface type. +************************************************************************************************************************ +*/ +enum Gfx9DataType +{ + Gfx9DataColor, + Gfx9DataDepthStencil, + Gfx9DataFmask +}; + +const UINT_32 Gfx9LinearSwModeMask = (1u << ADDR_SW_LINEAR); + +const UINT_32 Gfx9Blk256BSwModeMask = (1u << ADDR_SW_256B_S) | + (1u << ADDR_SW_256B_D) | + (1u << ADDR_SW_256B_R); + +const UINT_32 Gfx9Blk4KBSwModeMask = (1u << ADDR_SW_4KB_Z) | + (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_4KB_R) | + (1u << ADDR_SW_4KB_Z_X) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_4KB_R_X); + +const UINT_32 Gfx9Blk64KBSwModeMask = (1u << ADDR_SW_64KB_Z) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_R) | + (1u << ADDR_SW_64KB_Z_T) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_64KB_R_T) | + (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Gfx9ZSwModeMask = (1u << ADDR_SW_4KB_Z) | + (1u << ADDR_SW_64KB_Z) | + (1u << ADDR_SW_64KB_Z_T) | + (1u << ADDR_SW_4KB_Z_X) | + (1u << ADDR_SW_64KB_Z_X); + +const UINT_32 Gfx9StandardSwModeMask = (1u << ADDR_SW_256B_S) | + (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_64KB_S_X); + +const UINT_32 Gfx9DisplaySwModeMask = (1u << ADDR_SW_256B_D) | + (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_64KB_D_X); + +const UINT_32 Gfx9RotateSwModeMask = (1u << ADDR_SW_256B_R) | + (1u << ADDR_SW_4KB_R) | + (1u << ADDR_SW_64KB_R) | + (1u << ADDR_SW_64KB_R_T) | + (1u << ADDR_SW_4KB_R_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Gfx9XSwModeMask = (1u << ADDR_SW_4KB_Z_X) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_4KB_R_X) | + (1u << ADDR_SW_64KB_Z_X) | + (1u << ADDR_SW_64KB_S_X) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Gfx9TSwModeMask = (1u << ADDR_SW_64KB_Z_T) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_64KB_R_T); + +const UINT_32 Gfx9XorSwModeMask = Gfx9XSwModeMask | + Gfx9TSwModeMask; + +const UINT_32 Gfx9AllSwModeMask = Gfx9LinearSwModeMask | + Gfx9ZSwModeMask | + Gfx9StandardSwModeMask | + Gfx9DisplaySwModeMask | + Gfx9RotateSwModeMask; + +const UINT_32 Gfx9Rsrc1dSwModeMask = Gfx9LinearSwModeMask; + +const UINT_32 Gfx9Rsrc2dSwModeMask = Gfx9AllSwModeMask; + +const UINT_32 Gfx9Rsrc3dSwModeMask = Gfx9AllSwModeMask & ~Gfx9Blk256BSwModeMask & ~Gfx9RotateSwModeMask; + +const UINT_32 Gfx9Rsrc2dPrtSwModeMask = (Gfx9Blk4KBSwModeMask | Gfx9Blk64KBSwModeMask) & ~Gfx9XSwModeMask; + +const UINT_32 Gfx9Rsrc3dPrtSwModeMask = Gfx9Rsrc2dPrtSwModeMask & ~Gfx9RotateSwModeMask & ~Gfx9DisplaySwModeMask; + +const UINT_32 Gfx9Rsrc3dThinSwModeMask = Gfx9DisplaySwModeMask & ~Gfx9Blk256BSwModeMask; + +const UINT_32 Gfx9Rsrc3dThin4KBSwModeMask = Gfx9Rsrc3dThinSwModeMask & Gfx9Blk4KBSwModeMask; + +const UINT_32 Gfx9Rsrc3dThin64KBSwModeMask = Gfx9Rsrc3dThinSwModeMask & Gfx9Blk64KBSwModeMask; + +const UINT_32 Gfx9Rsrc3dThickSwModeMask = Gfx9Rsrc3dSwModeMask & ~(Gfx9Rsrc3dThinSwModeMask | Gfx9LinearSwModeMask); + +const UINT_32 Gfx9Rsrc3dThick4KBSwModeMask = Gfx9Rsrc3dThickSwModeMask & Gfx9Blk4KBSwModeMask; + +const UINT_32 Gfx9Rsrc3dThick64KBSwModeMask = Gfx9Rsrc3dThickSwModeMask & Gfx9Blk64KBSwModeMask; + +const UINT_32 Gfx9MsaaSwModeMask = Gfx9AllSwModeMask & ~Gfx9Blk256BSwModeMask & ~Gfx9LinearSwModeMask; + +const UINT_32 Dce12NonBpp32SwModeMask = (1u << ADDR_SW_LINEAR) | + (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_4KB_R) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_R) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_4KB_R_X) | + (1u << ADDR_SW_64KB_D_X) | + (1u << ADDR_SW_64KB_R_X); + +const UINT_32 Dce12Bpp32SwModeMask = (1u << ADDR_SW_256B_D) | + (1u << ADDR_SW_256B_R) | + Dce12NonBpp32SwModeMask; + +const UINT_32 Dcn1NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) | + (1u << ADDR_SW_4KB_S) | + (1u << ADDR_SW_64KB_S) | + (1u << ADDR_SW_64KB_S_T) | + (1u << ADDR_SW_4KB_S_X) | + (1u << ADDR_SW_64KB_S_X); +const UINT_32 Dcn1Bpp64SwModeMask = (1u << ADDR_SW_4KB_D) | + (1u << ADDR_SW_64KB_D) | + (1u << ADDR_SW_64KB_D_T) | + (1u << ADDR_SW_4KB_D_X) | + (1u << ADDR_SW_64KB_D_X) | + Dcn1NonBpp64SwModeMask; + +/** +************************************************************************************************************************ +* @brief GFX9 meta equation parameters +************************************************************************************************************************ +*/ +struct MetaEqParams +{ + UINT_32 maxMip; + UINT_32 elementBytesLog2; + UINT_32 numSamplesLog2; + ADDR2_META_FLAGS metaFlag; + Gfx9DataType dataSurfaceType; + AddrSwizzleMode swizzleMode; + AddrResourceType resourceType; + UINT_32 metaBlkWidthLog2; + UINT_32 metaBlkHeightLog2; + UINT_32 metaBlkDepthLog2; + UINT_32 compBlkWidthLog2; + UINT_32 compBlkHeightLog2; + UINT_32 compBlkDepthLog2; +}; + +/** +************************************************************************************************************************ +* @brief This class is the GFX9 specific address library +* function set. +************************************************************************************************************************ +*/ +class Gfx9Lib : public Lib +{ +public: + /// Creates Gfx9Lib object + static Addr::Lib* CreateObj(const Client* pClient) + { + VOID* pMem = Object::ClientAlloc(sizeof(Gfx9Lib), pClient); + return (pMem != NULL) ? new (pMem) Gfx9Lib(pClient) : NULL; + } + +protected: + Gfx9Lib(const Client* pClient); + virtual ~Gfx9Lib(); + + virtual BOOL_32 HwlIsStandardSwizzle( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return m_swizzleModeTable[swizzleMode].isStd || + (IsTex3d(resourceType) && m_swizzleModeTable[swizzleMode].isDisp); + } + + virtual BOOL_32 HwlIsDisplaySwizzle( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return IsTex2d(resourceType) && m_swizzleModeTable[swizzleMode].isDisp; + } + + virtual BOOL_32 HwlIsThin( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return ((IsTex2d(resourceType) == TRUE) || + ((IsTex3d(resourceType) == TRUE) && + (m_swizzleModeTable[swizzleMode].isZ == FALSE) && + (m_swizzleModeTable[swizzleMode].isStd == FALSE))); + } + + virtual BOOL_32 HwlIsThick( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const + { + return (IsTex3d(resourceType) && + (m_swizzleModeTable[swizzleMode].isZ || m_swizzleModeTable[swizzleMode].isStd)); + } + + virtual ADDR_E_RETURNCODE HwlComputeHtileInfo( + const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeCmaskInfo( + const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn, + ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeDccInfo( + const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, + ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( + const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( + const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr( + const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord( + const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut); + + virtual UINT_32 HwlGetEquationIndex( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeBlock256Equation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const; + + virtual ADDR_E_RETURNCODE HwlComputeThinEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const; + + virtual ADDR_E_RETURNCODE HwlComputeThickEquation( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2, + ADDR_EQUATION* pEquation) const; + + // Get equation table pointer and number of equations + virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const + { + *ppEquationTable = m_equationTable; + + return m_numEquations; + } + + virtual BOOL_32 IsEquationSupported( + AddrResourceType rsrcType, + AddrSwizzleMode swMode, + UINT_32 elementBytesLog2) const; + + virtual ADDR_E_RETURNCODE HwlComputePipeBankXor( + const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor( + const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, + ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern( + const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, + ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoLinear( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled( + const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual UINT_32 HwlComputeMaxBaseAlignments() const; + + virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; + + virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn); + + virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision); + + virtual VOID ComputeThinBlockDimension( + UINT_32* pWidth, + UINT_32* pHeight, + UINT_32* pDepth, + UINT_32 bpp, + UINT_32 numSamples, + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode) const; + +private: + VOID GetRbEquation(CoordEq* pRbEq, UINT_32 rbPerSeLog2, UINT_32 seLog2) const; + + VOID GetDataEquation(CoordEq* pDataEq, Gfx9DataType dataSurfaceType, + AddrSwizzleMode swizzleMode, AddrResourceType resourceType, + UINT_32 elementBytesLog2, UINT_32 numSamplesLog2) const; + + VOID GetPipeEquation(CoordEq* pPipeEq, CoordEq* pDataEq, + UINT_32 pipeInterleaveLog2, UINT_32 numPipesLog2, + UINT_32 numSamplesLog2, Gfx9DataType dataSurfaceType, + AddrSwizzleMode swizzleMode, AddrResourceType resourceType) const; + + VOID GenMetaEquation(CoordEq* pMetaEq, UINT_32 maxMip, + UINT_32 elementBytesLog2, UINT_32 numSamplesLog2, + ADDR2_META_FLAGS metaFlag, Gfx9DataType dataSurfaceType, + AddrSwizzleMode swizzleMode, AddrResourceType resourceType, + UINT_32 metaBlkWidthLog2, UINT_32 metaBlkHeightLog2, + UINT_32 metaBlkDepthLog2, UINT_32 compBlkWidthLog2, + UINT_32 compBlkHeightLog2, UINT_32 compBlkDepthLog2) const; + + const CoordEq* GetMetaEquation(const MetaEqParams& metaEqParams); + + VOID GetMetaMipInfo(UINT_32 numMipLevels, Dim3d* pMetaBlkDim, + BOOL_32 dataThick, ADDR2_META_MIP_INFO* pInfo, + UINT_32 mip0Width, UINT_32 mip0Height, UINT_32 mip0Depth, + UINT_32* pNumMetaBlkX, UINT_32* pNumMetaBlkY, UINT_32* pNumMetaBlkZ) const; + + BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + ADDR_E_RETURNCODE ComputeSurfaceLinearPadding( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + UINT_32* pMipmap0PaddedWidth, + UINT_32* pSlice0PaddedHeight, + ADDR2_MIP_INFO* pMipInfo = NULL) const; + + static ADDR2_BLOCK_SET GetAllowedBlockSet(ADDR2_SWMODE_SET allowedSwModeSet, AddrResourceType rsrcType) + { + ADDR2_BLOCK_SET allowedBlockSet = {}; + + allowedBlockSet.micro = (allowedSwModeSet.value & Gfx9Blk256BSwModeMask) ? TRUE : FALSE; + allowedBlockSet.linear = (allowedSwModeSet.value & Gfx9LinearSwModeMask) ? TRUE : FALSE; + + if (rsrcType == ADDR_RSRC_TEX_3D) + { + allowedBlockSet.macroThin4KB = (allowedSwModeSet.value & Gfx9Rsrc3dThin4KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThick4KB = (allowedSwModeSet.value & Gfx9Rsrc3dThick4KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx9Rsrc3dThin64KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThick64KB = (allowedSwModeSet.value & Gfx9Rsrc3dThick64KBSwModeMask) ? TRUE : FALSE; + } + else + { + allowedBlockSet.macroThin4KB = (allowedSwModeSet.value & Gfx9Blk4KBSwModeMask) ? TRUE : FALSE; + allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx9Blk64KBSwModeMask) ? TRUE : FALSE; + } + + return allowedBlockSet; + } + + static ADDR2_SWTYPE_SET GetAllowedSwSet(ADDR2_SWMODE_SET allowedSwModeSet) + { + ADDR2_SWTYPE_SET allowedSwSet = {}; + + allowedSwSet.sw_Z = (allowedSwModeSet.value & Gfx9ZSwModeMask) ? TRUE : FALSE; + allowedSwSet.sw_S = (allowedSwModeSet.value & Gfx9StandardSwModeMask) ? TRUE : FALSE; + allowedSwSet.sw_D = (allowedSwModeSet.value & Gfx9DisplaySwModeMask) ? TRUE : FALSE; + allowedSwSet.sw_R = (allowedSwModeSet.value & Gfx9RotateSwModeMask) ? TRUE : FALSE; + + return allowedSwSet; + } + + BOOL_32 IsInMipTail( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + Dim3d mipTailDim, + UINT_32 width, + UINT_32 height, + UINT_32 depth) const + { + BOOL_32 inTail = ((width <= mipTailDim.w) && + (height <= mipTailDim.h) && + (IsThin(resourceType, swizzleMode) || (depth <= mipTailDim.d))); + + return inTail; + } + + BOOL_32 ValidateNonSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + BOOL_32 ValidateSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + UINT_32 GetBankXorBits(UINT_32 macroBlockBits) const + { + UINT_32 pipeBits = GetPipeXorBits(macroBlockBits); + + // Bank xor bits + UINT_32 bankBits = Min(macroBlockBits - pipeBits - m_pipeInterleaveLog2, m_banksLog2); + + return bankBits; + } + + UINT_32 ComputeSurfaceBaseAlignTiled(AddrSwizzleMode swizzleMode) const + { + UINT_32 baseAlign; + + if (IsXor(swizzleMode)) + { + baseAlign = GetBlockSize(swizzleMode); + } + else + { + baseAlign = 256; + } + + return baseAlign; + } + + // Initialize equation table + VOID InitEquationTable(); + + ADDR_E_RETURNCODE ComputeStereoInfo( + const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut, + UINT_32* pHeightAlign) const; + + UINT_32 GetMipChainInfo( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 bpp, + UINT_32 mip0Width, + UINT_32 mip0Height, + UINT_32 mip0Depth, + UINT_32 blockWidth, + UINT_32 blockHeight, + UINT_32 blockDepth, + UINT_32 numMipLevel, + ADDR2_MIP_INFO* pMipInfo) const; + + VOID GetMetaMiptailInfo( + ADDR2_META_MIP_INFO* pInfo, + Dim3d mipCoord, + UINT_32 numMipInTail, + Dim3d* pMetaBlkDim) const; + + Dim3d GetMipStartPos( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 width, + UINT_32 height, + UINT_32 depth, + UINT_32 blockWidth, + UINT_32 blockHeight, + UINT_32 blockDepth, + UINT_32 mipId, + UINT_32 log2ElementBytes, + UINT_32* pMipTailBytesOffset) const; + + AddrMajorMode GetMajorMode( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 mip0WidthInBlk, + UINT_32 mip0HeightInBlk, + UINT_32 mip0DepthInBlk) const + { + BOOL_32 yMajor = (mip0WidthInBlk < mip0HeightInBlk); + BOOL_32 xMajor = (yMajor == FALSE); + + if (IsThick(resourceType, swizzleMode)) + { + yMajor = yMajor && (mip0HeightInBlk >= mip0DepthInBlk); + xMajor = xMajor && (mip0WidthInBlk >= mip0DepthInBlk); + } + + AddrMajorMode majorMode; + if (xMajor) + { + majorMode = ADDR_MAJOR_X; + } + else if (yMajor) + { + majorMode = ADDR_MAJOR_Y; + } + else + { + majorMode = ADDR_MAJOR_Z; + } + + return majorMode; + } + + Dim3d GetDccCompressBlk( + AddrResourceType resourceType, + AddrSwizzleMode swizzleMode, + UINT_32 bpp) const + { + UINT_32 index = Log2(bpp >> 3); + Dim3d compressBlkDim; + + if (IsThin(resourceType, swizzleMode)) + { + compressBlkDim.w = Block256_2d[index].w; + compressBlkDim.h = Block256_2d[index].h; + compressBlkDim.d = 1; + } + else if (IsStandardSwizzle(resourceType, swizzleMode)) + { + compressBlkDim = Block256_3dS[index]; + } + else + { + compressBlkDim = Block256_3dZ[index]; + } + + return compressBlkDim; + } + + static const UINT_32 MaxSeLog2 = 3; + static const UINT_32 MaxRbPerSeLog2 = 2; + + static const Dim3d Block256_3dS[MaxNumOfBpp]; + static const Dim3d Block256_3dZ[MaxNumOfBpp]; + + static const UINT_32 MipTailOffset256B[]; + + static const SwizzleModeFlags SwizzleModeTable[ADDR_SW_MAX_TYPE]; + + static const UINT_32 MaxCachedMetaEq = 2; + + Gfx9ChipSettings m_settings; + + CoordEq m_cachedMetaEq[MaxCachedMetaEq]; + MetaEqParams m_cachedMetaEqKey[MaxCachedMetaEq]; + UINT_32 m_metaEqOverrideIndex; +}; + +} // V2 +} // Addr + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.cpp new file mode 100644 index 0000000000..5a83e71530 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.cpp @@ -0,0 +1,2339 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file ciaddrlib.cpp +* @brief Contains the implementation for the CiLib class. +**************************************************************************************************** +*/ + +#include "ciaddrlib.h" + +#include "si_gb_reg.h" + +#include "amdgpu_asic_addr.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////////////////////////// + +namespace Addr +{ + +/** +**************************************************************************************************** +* CiHwlInit +* +* @brief +* Creates an CiLib object. +* +* @return +* Returns an CiLib object pointer. +**************************************************************************************************** +*/ +Lib* CiHwlInit(const Client* pClient) +{ + return V1::CiLib::CreateObj(pClient); +} + +namespace V1 +{ + +/** +**************************************************************************************************** +* Mask +* +* @brief +* Gets a mask of "width" +* @return +* Bit mask +**************************************************************************************************** +*/ +static UINT_64 Mask( + UINT_32 width) ///< Width of bits +{ + UINT_64 ret; + + if (width >= sizeof(UINT_64)*8) + { + ret = ~((UINT_64) 0); + } + else + { + return (((UINT_64) 1) << width) - 1; + } + return ret; +} + +/** +**************************************************************************************************** +* GetBits +* +* @brief +* Gets bits within a range of [msb, lsb] +* @return +* Bits of this range +**************************************************************************************************** +*/ +static UINT_64 GetBits( + UINT_64 bits, ///< Source bits + UINT_32 msb, ///< Most signicant bit + UINT_32 lsb) ///< Least signicant bit +{ + UINT_64 ret = 0; + + if (msb >= lsb) + { + ret = (bits >> lsb) & (Mask(1 + msb - lsb)); + } + return ret; +} + +/** +**************************************************************************************************** +* RemoveBits +* +* @brief +* Removes bits within the range of [msb, lsb] +* @return +* Modified bits +**************************************************************************************************** +*/ +static UINT_64 RemoveBits( + UINT_64 bits, ///< Source bits + UINT_32 msb, ///< Most signicant bit + UINT_32 lsb) ///< Least signicant bit +{ + UINT_64 ret = bits; + + if (msb >= lsb) + { + ret = GetBits(bits, lsb - 1, 0) // low bits + | (GetBits(bits, 8 * sizeof(bits) - 1, msb + 1) << lsb); //high bits + } + return ret; +} + +/** +**************************************************************************************************** +* InsertBits +* +* @brief +* Inserts new bits into the range of [msb, lsb] +* @return +* Modified bits +**************************************************************************************************** +*/ +static UINT_64 InsertBits( + UINT_64 bits, ///< Source bits + UINT_64 newBits, ///< New bits to be inserted + UINT_32 msb, ///< Most signicant bit + UINT_32 lsb) ///< Least signicant bit +{ + UINT_64 ret = bits; + + if (msb >= lsb) + { + ret = GetBits(bits, lsb - 1, 0) // old low bitss + | (GetBits(newBits, msb - lsb, 0) << lsb) //new bits + | (GetBits(bits, 8 * sizeof(bits) - 1, lsb) << (msb + 1)); //old high bits + } + return ret; +} + +/** +**************************************************************************************************** +* CiLib::CiLib +* +* @brief +* Constructor +* +**************************************************************************************************** +*/ +CiLib::CiLib(const Client* pClient) + : + SiLib(pClient), + m_noOfMacroEntries(0), + m_allowNonDispThickModes(FALSE) +{ + m_class = CI_ADDRLIB; +} + +/** +**************************************************************************************************** +* CiLib::~CiLib +* +* @brief +* Destructor +**************************************************************************************************** +*/ +CiLib::~CiLib() +{ +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeDccInfo +* +* @brief +* Compute DCC key size, base alignment +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE CiLib::HwlComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (SupportDccAndTcCompatibility() && IsMacroTiled(pIn->tileMode)) + { + UINT_64 dccFastClearSize = pIn->colorSurfSize >> 8; + + ADDR_ASSERT(0 == (pIn->colorSurfSize & 0xff)); + + if (pIn->numSamples > 1) + { + UINT_32 tileSizePerSample = BITS_TO_BYTES(pIn->bpp * MicroTileWidth * MicroTileHeight); + UINT_32 samplesPerSplit = pIn->tileInfo.tileSplitBytes / tileSizePerSample; + + if (samplesPerSplit < pIn->numSamples) + { + UINT_32 numSplits = pIn->numSamples / samplesPerSplit; + UINT_32 fastClearBaseAlign = HwlGetPipes(&pIn->tileInfo) * m_pipeInterleaveBytes; + + ADDR_ASSERT(IsPow2(fastClearBaseAlign)); + + dccFastClearSize /= numSplits; + + if (0 != (dccFastClearSize & (fastClearBaseAlign - 1))) + { + // Disable dcc fast clear + // if key size of fisrt sample split is not pipe*interleave aligned + dccFastClearSize = 0; + } + } + } + + pOut->dccRamSize = pIn->colorSurfSize >> 8; + pOut->dccRamBaseAlign = pIn->tileInfo.banks * + HwlGetPipes(&pIn->tileInfo) * + m_pipeInterleaveBytes; + pOut->dccFastClearSize = dccFastClearSize; + pOut->dccRamSizeAligned = TRUE; + + ADDR_ASSERT(IsPow2(pOut->dccRamBaseAlign)); + + if (0 == (pOut->dccRamSize & (pOut->dccRamBaseAlign - 1))) + { + pOut->subLvlCompressible = TRUE; + } + else + { + UINT_64 dccRamSizeAlign = HwlGetPipes(&pIn->tileInfo) * m_pipeInterleaveBytes; + + if (pOut->dccRamSize == pOut->dccFastClearSize) + { + pOut->dccFastClearSize = PowTwoAlign(pOut->dccRamSize, dccRamSizeAlign); + } + if ((pOut->dccRamSize & (dccRamSizeAlign - 1)) != 0) + { + pOut->dccRamSizeAligned = FALSE; + } + pOut->dccRamSize = PowTwoAlign(pOut->dccRamSize, dccRamSizeAlign); + pOut->subLvlCompressible = FALSE; + } + } + else + { + returnCode = ADDR_NOTSUPPORTED; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeCmaskAddrFromCoord +* +* @brief +* Compute tc compatible Cmask address from fmask ram address +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE CiLib::HwlComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] fmask addr/bpp/tile input + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] cmask address + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_NOTSUPPORTED; + + if ((SupportDccAndTcCompatibility() == TRUE) && + (pIn->flags.tcCompatible == TRUE)) + { + UINT_32 numOfPipes = HwlGetPipes(pIn->pTileInfo); + UINT_32 numOfBanks = pIn->pTileInfo->banks; + UINT_64 fmaskAddress = pIn->fmaskAddr; + UINT_32 elemBits = pIn->bpp; + UINT_32 blockByte = 64 * elemBits / 8; + UINT_64 metaNibbleAddress = HwlComputeMetadataNibbleAddress(fmaskAddress, + 0, + 0, + 4, // cmask 4 bits + elemBits, + blockByte, + m_pipeInterleaveBytes, + numOfPipes, + numOfBanks, + 1); + pOut->addr = (metaNibbleAddress >> 1); + pOut->bitPosition = (metaNibbleAddress % 2) ? 4 : 0; + returnCode = ADDR_OK; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeHtileAddrFromCoord +* +* @brief +* Compute tc compatible Htile address from depth/stencil address +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE CiLib::HwlComputeHtileAddrFromCoord( + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] depth/stencil addr/bpp/tile input + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] htile address + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_NOTSUPPORTED; + + if ((SupportDccAndTcCompatibility() == TRUE) && + (pIn->flags.tcCompatible == TRUE)) + { + UINT_32 numOfPipes = HwlGetPipes(pIn->pTileInfo); + UINT_32 numOfBanks = pIn->pTileInfo->banks; + UINT_64 zStencilAddr = pIn->zStencilAddr; + UINT_32 elemBits = pIn->bpp; + UINT_32 blockByte = 64 * elemBits / 8; + UINT_64 metaNibbleAddress = HwlComputeMetadataNibbleAddress(zStencilAddr, + 0, + 0, + 32, // htile 32 bits + elemBits, + blockByte, + m_pipeInterleaveBytes, + numOfPipes, + numOfBanks, + 1); + pOut->addr = (metaNibbleAddress >> 1); + pOut->bitPosition = 0; + returnCode = ADDR_OK; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* CiLib::HwlConvertChipFamily +* +* @brief +* Convert familyID defined in atiid.h to ChipFamily and set m_chipFamily/m_chipRevision +* @return +* ChipFamily +**************************************************************************************************** +*/ +ChipFamily CiLib::HwlConvertChipFamily( + UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h + UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h +{ + ChipFamily family = ADDR_CHIP_FAMILY_CI; + + switch (uChipFamily) + { + case FAMILY_CI: + m_settings.isSeaIsland = 1; + m_settings.isBonaire = ASICREV_IS_BONAIRE_M(uChipRevision); + m_settings.isHawaii = ASICREV_IS_HAWAII_P(uChipRevision); + break; + case FAMILY_KV: + m_settings.isKaveri = 1; + m_settings.isSpectre = ASICREV_IS_SPECTRE(uChipRevision); + m_settings.isSpooky = ASICREV_IS_SPOOKY(uChipRevision); + m_settings.isKalindi = ASICREV_IS_KALINDI(uChipRevision); + break; + case FAMILY_VI: + m_settings.isVolcanicIslands = 1; + m_settings.isIceland = ASICREV_IS_ICELAND_M(uChipRevision); + m_settings.isTonga = ASICREV_IS_TONGA_P(uChipRevision); + m_settings.isFiji = ASICREV_IS_FIJI_P(uChipRevision); + m_settings.isPolaris10 = ASICREV_IS_POLARIS10_P(uChipRevision); + m_settings.isPolaris11 = ASICREV_IS_POLARIS11_M(uChipRevision); + m_settings.isPolaris12 = ASICREV_IS_POLARIS12_V(uChipRevision); + m_settings.isVegaM = ASICREV_IS_VEGAM_P(uChipRevision); + family = ADDR_CHIP_FAMILY_VI; + break; + case FAMILY_CZ: + m_settings.isCarrizo = 1; + m_settings.isVolcanicIslands = 1; + family = ADDR_CHIP_FAMILY_VI; + break; + default: + ADDR_ASSERT(!"This should be a unexpected Fusion"); + break; + } + + return family; +} + +/** +**************************************************************************************************** +* CiLib::HwlInitGlobalParams +* +* @brief +* Initializes global parameters +* +* @return +* TRUE if all settings are valid +* +**************************************************************************************************** +*/ +BOOL_32 CiLib::HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input +{ + BOOL_32 valid = TRUE; + + const ADDR_REGISTER_VALUE* pRegValue = &pCreateIn->regValue; + + valid = DecodeGbRegs(pRegValue); + + // The following assignments for m_pipes is only for fail-safe, InitTileSettingTable should + // read the correct pipes from tile mode table + if (m_settings.isHawaii) + { + m_pipes = 16; + } + else if (m_settings.isBonaire || m_settings.isSpectre) + { + m_pipes = 4; + } + else // Treat other KV asics to be 2-pipe + { + m_pipes = 2; + } + + // @todo: VI + // Move this to VI code path once created + if (m_settings.isTonga || m_settings.isPolaris10) + { + m_pipes = 8; + } + else if (m_settings.isIceland) + { + m_pipes = 2; + } + else if (m_settings.isFiji) + { + m_pipes = 16; + } + else if (m_settings.isPolaris11 || m_settings.isPolaris12) + { + m_pipes = 4; + } + else if (m_settings.isVegaM) + { + m_pipes = 16; + } + + if (valid) + { + valid = InitTileSettingTable(pRegValue->pTileConfig, pRegValue->noOfEntries); + } + if (valid) + { + valid = InitMacroTileCfgTable(pRegValue->pMacroTileConfig, pRegValue->noOfMacroEntries); + } + + if (valid) + { + InitEquationTable(); + } + + return valid; +} + +/** +**************************************************************************************************** +* CiLib::HwlPostCheckTileIndex +* +* @brief +* Map a tile setting to index if curIndex is invalid, otherwise check if curIndex matches +* tile mode/type/info and change the index if needed +* @return +* Tile index. +**************************************************************************************************** +*/ +INT_32 CiLib::HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, ///< [in] Tile Info + AddrTileMode mode, ///< [in] Tile mode + AddrTileType type, ///< [in] Tile type + INT curIndex ///< [in] Current index assigned in HwlSetupTileInfo + ) const +{ + INT_32 index = curIndex; + + if (mode == ADDR_TM_LINEAR_GENERAL) + { + index = TileIndexLinearGeneral; + } + else + { + BOOL_32 macroTiled = IsMacroTiled(mode); + + // We need to find a new index if either of them is true + // 1. curIndex is invalid + // 2. tile mode is changed + // 3. tile info does not match for macro tiled + if ((index == TileIndexInvalid) || + (mode != m_tileTable[index].mode) || + (macroTiled && pInfo->pipeConfig != m_tileTable[index].info.pipeConfig)) + { + for (index = 0; index < static_cast(m_noOfEntries); index++) + { + if (macroTiled) + { + // macro tile modes need all to match + if ((pInfo->pipeConfig == m_tileTable[index].info.pipeConfig) && + (mode == m_tileTable[index].mode) && + (type == m_tileTable[index].type)) + { + // tileSplitBytes stored in m_tileTable is only valid for depth entries + if (type == ADDR_DEPTH_SAMPLE_ORDER) + { + if (Min(m_tileTable[index].info.tileSplitBytes, + m_rowSize) == pInfo->tileSplitBytes) + { + break; + } + } + else // other entries are determined by other 3 fields + { + break; + } + } + } + else if (mode == ADDR_TM_LINEAR_ALIGNED) + { + // linear mode only needs tile mode to match + if (mode == m_tileTable[index].mode) + { + break; + } + } + else + { + // micro tile modes only need tile mode and tile type to match + if (mode == m_tileTable[index].mode && + type == m_tileTable[index].type) + { + break; + } + } + } + } + } + + ADDR_ASSERT(index < static_cast(m_noOfEntries)); + + if (index >= static_cast(m_noOfEntries)) + { + index = TileIndexInvalid; + } + + return index; +} + +/** +**************************************************************************************************** +* CiLib::HwlSetupTileCfg +* +* @brief +* Map tile index to tile setting. +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE CiLib::HwlSetupTileCfg( + UINT_32 bpp, ///< Bits per pixel + INT_32 index, ///< Tile index + INT_32 macroModeIndex, ///< Index in macro tile mode table(CI) + ADDR_TILEINFO* pInfo, ///< [out] Tile Info + AddrTileMode* pMode, ///< [out] Tile mode + AddrTileType* pType ///< [out] Tile type + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + // Global flag to control usage of tileIndex + if (UseTileIndex(index)) + { + if (index == TileIndexLinearGeneral) + { + pInfo->banks = 2; + pInfo->bankWidth = 1; + pInfo->bankHeight = 1; + pInfo->macroAspectRatio = 1; + pInfo->tileSplitBytes = 64; + pInfo->pipeConfig = ADDR_PIPECFG_P2; + } + else if (static_cast(index) >= m_noOfEntries) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + const TileConfig* pCfgTable = GetTileSetting(index); + + if (pInfo != NULL) + { + if (IsMacroTiled(pCfgTable->mode)) + { + ADDR_ASSERT((macroModeIndex != TileIndexInvalid) && + (macroModeIndex != TileIndexNoMacroIndex)); + + UINT_32 tileSplit; + + *pInfo = m_macroTileTable[macroModeIndex]; + + if (pCfgTable->type == ADDR_DEPTH_SAMPLE_ORDER) + { + tileSplit = pCfgTable->info.tileSplitBytes; + } + else + { + if (bpp > 0) + { + UINT_32 thickness = Thickness(pCfgTable->mode); + UINT_32 tileBytes1x = BITS_TO_BYTES(bpp * MicroTilePixels * thickness); + // Non-depth entries store a split factor + UINT_32 sampleSplit = m_tileTable[index].info.tileSplitBytes; + tileSplit = Max(256u, sampleSplit * tileBytes1x); + } + else + { + // Return tileBytes instead if not enough info + tileSplit = pInfo->tileSplitBytes; + } + } + + // Clamp to row_size + pInfo->tileSplitBytes = Min(m_rowSize, tileSplit); + + pInfo->pipeConfig = pCfgTable->info.pipeConfig; + } + else // 1D and linear modes, we return default value stored in table + { + *pInfo = pCfgTable->info; + } + } + + if (pMode != NULL) + { + *pMode = pCfgTable->mode; + } + + if (pType != NULL) + { + *pType = pCfgTable->type; + } + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeSurfaceInfo +* +* @brief +* Entry of CI's ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE CiLib::HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + // If tileIndex is invalid, force macroModeIndex to be invalid, too + if (pIn->tileIndex == TileIndexInvalid) + { + pOut->macroModeIndex = TileIndexInvalid; + } + + ADDR_E_RETURNCODE retCode = SiLib::HwlComputeSurfaceInfo(pIn, pOut); + + if ((pIn->mipLevel > 0) && + (pOut->tcCompatible == TRUE) && + (pOut->tileMode != pIn->tileMode) && + (SupportDccAndTcCompatibility() == TRUE)) + { + pOut->tcCompatible = CheckTcCompatibility(pOut->pTileInfo, pIn->bpp, pOut->tileMode, pOut->tileType, pOut); + } + + if (pOut->macroModeIndex == TileIndexNoMacroIndex) + { + pOut->macroModeIndex = TileIndexInvalid; + } + + if ((pIn->flags.matchStencilTileCfg == TRUE) && + (pIn->flags.depth == TRUE)) + { + pOut->stencilTileIdx = TileIndexInvalid; + + if ((MinDepth2DThinIndex <= pOut->tileIndex) && + (MaxDepth2DThinIndex >= pOut->tileIndex)) + { + BOOL_32 depthStencil2DTileConfigMatch = DepthStencilTileCfgMatch(pIn, pOut); + + if ((depthStencil2DTileConfigMatch == FALSE) && + (pOut->tcCompatible == TRUE)) + { + pOut->macroModeIndex = TileIndexInvalid; + + ADDR_COMPUTE_SURFACE_INFO_INPUT localIn = *pIn; + localIn.tileIndex = TileIndexInvalid; + localIn.pTileInfo = NULL; + localIn.flags.tcCompatible = FALSE; + + SiLib::HwlComputeSurfaceInfo(&localIn, pOut); + + ADDR_ASSERT((MinDepth2DThinIndex <= pOut->tileIndex) && (MaxDepth2DThinIndex >= pOut->tileIndex)); + + depthStencil2DTileConfigMatch = DepthStencilTileCfgMatch(pIn, pOut); + } + + if ((depthStencil2DTileConfigMatch == FALSE) && + (pIn->numSamples <= 1)) + { + pOut->macroModeIndex = TileIndexInvalid; + + ADDR_COMPUTE_SURFACE_INFO_INPUT localIn = *pIn; + localIn.tileMode = ADDR_TM_1D_TILED_THIN1; + localIn.tileIndex = TileIndexInvalid; + localIn.pTileInfo = NULL; + + retCode = SiLib::HwlComputeSurfaceInfo(&localIn, pOut); + } + } + + if (pOut->tileIndex == Depth1DThinIndex) + { + pOut->stencilTileIdx = Depth1DThinIndex; + } + } + + return retCode; +} + +/** +**************************************************************************************************** +* CiLib::HwlFmaskSurfaceInfo +* @brief +* Entry of r800's ComputeFmaskInfo +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE CiLib::HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + ADDR_TILEINFO tileInfo = {0}; + ADDR_COMPUTE_FMASK_INFO_INPUT fmaskIn; + fmaskIn = *pIn; + + AddrTileMode tileMode = pIn->tileMode; + + // Use internal tile info if pOut does not have a valid pTileInfo + if (pOut->pTileInfo == NULL) + { + pOut->pTileInfo = &tileInfo; + } + + ADDR_ASSERT(tileMode == ADDR_TM_2D_TILED_THIN1 || + tileMode == ADDR_TM_3D_TILED_THIN1 || + tileMode == ADDR_TM_PRT_TILED_THIN1 || + tileMode == ADDR_TM_PRT_2D_TILED_THIN1 || + tileMode == ADDR_TM_PRT_3D_TILED_THIN1); + + ADDR_ASSERT(m_tileTable[14].mode == ADDR_TM_2D_TILED_THIN1); + ADDR_ASSERT(m_tileTable[15].mode == ADDR_TM_3D_TILED_THIN1); + + // The only valid tile modes for fmask are 2D_THIN1 and 3D_THIN1 plus non-displayable + INT_32 tileIndex = tileMode == ADDR_TM_2D_TILED_THIN1 ? 14 : 15; + ADDR_SURFACE_FLAGS flags = {{0}}; + flags.fmask = 1; + + INT_32 macroModeIndex = TileIndexInvalid; + + UINT_32 numSamples = pIn->numSamples; + UINT_32 numFrags = pIn->numFrags == 0 ? numSamples : pIn->numFrags; + + UINT_32 bpp = QLog2(numFrags); + + // EQAA needs one more bit + if (numSamples > numFrags) + { + bpp++; + } + + if (bpp == 3) + { + bpp = 4; + } + + bpp = Max(8u, bpp * numSamples); + + macroModeIndex = HwlComputeMacroModeIndex(tileIndex, flags, bpp, numSamples, pOut->pTileInfo); + + fmaskIn.tileIndex = tileIndex; + fmaskIn.pTileInfo = pOut->pTileInfo; + pOut->macroModeIndex = macroModeIndex; + pOut->tileIndex = tileIndex; + + retCode = DispatchComputeFmaskInfo(&fmaskIn, pOut); + + if (retCode == ADDR_OK) + { + pOut->tileIndex = + HwlPostCheckTileIndex(pOut->pTileInfo, pIn->tileMode, ADDR_NON_DISPLAYABLE, + pOut->tileIndex); + } + + // Resets pTileInfo to NULL if the internal tile info is used + if (pOut->pTileInfo == &tileInfo) + { + pOut->pTileInfo = NULL; + } + + return retCode; +} + +/** +**************************************************************************************************** +* CiLib::HwlFmaskPreThunkSurfInfo +* +* @brief +* Some preparation before thunking a ComputeSurfaceInfo call for Fmask +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +VOID CiLib::HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, ///< [in] Input of fmask info + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ///< [in] Output of fmask info + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ///< [out] Input of thunked surface info + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut ///< [out] Output of thunked surface info + ) const +{ + pSurfIn->tileIndex = pFmaskIn->tileIndex; + pSurfOut->macroModeIndex = pFmaskOut->macroModeIndex; +} + +/** +**************************************************************************************************** +* CiLib::HwlFmaskPostThunkSurfInfo +* +* @brief +* Copy hwl extra field after calling thunked ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +VOID CiLib::HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ///< [in] Output of surface info + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut ///< [out] Output of fmask info + ) const +{ + pFmaskOut->tileIndex = pSurfOut->tileIndex; + pFmaskOut->macroModeIndex = pSurfOut->macroModeIndex; +} + +/** +**************************************************************************************************** +* CiLib::HwlDegradeThickTileMode +* +* @brief +* Degrades valid tile mode for thick modes if needed +* +* @return +* Suitable tile mode +**************************************************************************************************** +*/ +AddrTileMode CiLib::HwlDegradeThickTileMode( + AddrTileMode baseTileMode, ///< [in] base tile mode + UINT_32 numSlices, ///< [in] current number of slices + UINT_32* pBytesPerTile ///< [in,out] pointer to bytes per slice + ) const +{ + return baseTileMode; +} + +/** +**************************************************************************************************** +* CiLib::HwlOptimizeTileMode +* +* @brief +* Optimize tile mode on CI +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID CiLib::HwlOptimizeTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + AddrTileMode tileMode = pInOut->tileMode; + + // Override 2D/3D macro tile mode to PRT_* tile mode if + // client driver requests this surface is equation compatible + if (IsMacroTiled(tileMode) == TRUE) + { + if ((pInOut->flags.needEquation == TRUE) && + (pInOut->numSamples <= 1) && + (IsPrtTileMode(tileMode) == FALSE)) + { + if ((pInOut->numSlices > 1) && ((pInOut->maxBaseAlign == 0) || (pInOut->maxBaseAlign >= Block64K))) + { + UINT_32 thickness = Thickness(tileMode); + + if (thickness == 1) + { + tileMode = ADDR_TM_PRT_TILED_THIN1; + } + else + { + static const UINT_32 PrtTileBytes = 0x10000; + // First prt thick tile index in the tile mode table + static const UINT_32 PrtThickTileIndex = 22; + ADDR_TILEINFO tileInfo = {0}; + + HwlComputeMacroModeIndex(PrtThickTileIndex, + pInOut->flags, + pInOut->bpp, + pInOut->numSamples, + &tileInfo); + + UINT_32 macroTileBytes = ((pInOut->bpp) >> 3) * 64 * pInOut->numSamples * + thickness * HwlGetPipes(&tileInfo) * + tileInfo.banks * tileInfo.bankWidth * + tileInfo.bankHeight; + + if (macroTileBytes <= PrtTileBytes) + { + tileMode = ADDR_TM_PRT_TILED_THICK; + } + else + { + tileMode = ADDR_TM_PRT_TILED_THIN1; + } + } + } + } + + if (pInOut->maxBaseAlign != 0) + { + pInOut->flags.dccPipeWorkaround = FALSE; + } + } + + if (tileMode != pInOut->tileMode) + { + pInOut->tileMode = tileMode; + } +} + +/** +**************************************************************************************************** +* CiLib::HwlOverrideTileMode +* +* @brief +* Override THICK to THIN, for specific formats on CI +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID CiLib::HwlOverrideTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + AddrTileMode tileMode = pInOut->tileMode; + AddrTileType tileType = pInOut->tileType; + + // currently, all CI/VI family do not + // support ADDR_TM_PRT_2D_TILED_THICK,ADDR_TM_PRT_3D_TILED_THICK and + // ADDR_TM_PRT_2D_TILED_THIN1, ADDR_TM_PRT_3D_TILED_THIN1 + switch (tileMode) + { + case ADDR_TM_PRT_2D_TILED_THICK: + case ADDR_TM_PRT_3D_TILED_THICK: + tileMode = ADDR_TM_PRT_TILED_THICK; + break; + case ADDR_TM_PRT_2D_TILED_THIN1: + case ADDR_TM_PRT_3D_TILED_THIN1: + tileMode = ADDR_TM_PRT_TILED_THIN1; + break; + default: + break; + } + + // UBTS#404321, we do not need such overriding, as THICK+THICK entries removed from the tile-mode table + if (!m_settings.isBonaire) + { + UINT_32 thickness = Thickness(tileMode); + + // tile_thickness = (array_mode == XTHICK) ? 8 : ((array_mode == THICK) ? 4 : 1) + if (thickness > 1) + { + switch (pInOut->format) + { + // tcpError("Thick micro tiling is not supported for format... + case ADDR_FMT_X24_8_32_FLOAT: + case ADDR_FMT_32_AS_8: + case ADDR_FMT_32_AS_8_8: + case ADDR_FMT_32_AS_32_32_32_32: + + // packed formats + case ADDR_FMT_GB_GR: + case ADDR_FMT_BG_RG: + case ADDR_FMT_1_REVERSED: + case ADDR_FMT_1: + case ADDR_FMT_BC1: + case ADDR_FMT_BC2: + case ADDR_FMT_BC3: + case ADDR_FMT_BC4: + case ADDR_FMT_BC5: + case ADDR_FMT_BC6: + case ADDR_FMT_BC7: + switch (tileMode) + { + case ADDR_TM_1D_TILED_THICK: + tileMode = ADDR_TM_1D_TILED_THIN1; + break; + + case ADDR_TM_2D_TILED_XTHICK: + case ADDR_TM_2D_TILED_THICK: + tileMode = ADDR_TM_2D_TILED_THIN1; + break; + + case ADDR_TM_3D_TILED_XTHICK: + case ADDR_TM_3D_TILED_THICK: + tileMode = ADDR_TM_3D_TILED_THIN1; + break; + + case ADDR_TM_PRT_TILED_THICK: + tileMode = ADDR_TM_PRT_TILED_THIN1; + break; + + case ADDR_TM_PRT_2D_TILED_THICK: + tileMode = ADDR_TM_PRT_2D_TILED_THIN1; + break; + + case ADDR_TM_PRT_3D_TILED_THICK: + tileMode = ADDR_TM_PRT_3D_TILED_THIN1; + break; + + default: + break; + + } + + // Switch tile type from thick to thin + if (tileMode != pInOut->tileMode) + { + // see tileIndex: 13-18 + tileType = ADDR_NON_DISPLAYABLE; + } + + break; + default: + break; + } + } + } + + if (tileMode != pInOut->tileMode) + { + pInOut->tileMode = tileMode; + pInOut->tileType = tileType; + } +} + +/** +**************************************************************************************************** +* CiLib::HwlSelectTileMode +* +* @brief +* Select tile modes. +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID CiLib::HwlSelectTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + AddrTileMode tileMode; + AddrTileType tileType; + + if (pInOut->flags.rotateDisplay) + { + tileMode = ADDR_TM_2D_TILED_THIN1; + tileType = ADDR_ROTATED; + } + else if (pInOut->flags.volume) + { + BOOL_32 bThin = (m_settings.isBonaire == TRUE) || + ((m_allowNonDispThickModes == TRUE) && (pInOut->flags.color == TRUE)); + + if (pInOut->numSlices >= 8) + { + tileMode = ADDR_TM_2D_TILED_XTHICK; + tileType = (bThin == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK; + } + else if (pInOut->numSlices >= 4) + { + tileMode = ADDR_TM_2D_TILED_THICK; + tileType = (bThin == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK; + } + else + { + tileMode = ADDR_TM_2D_TILED_THIN1; + tileType = ADDR_NON_DISPLAYABLE; + } + } + else + { + tileMode = ADDR_TM_2D_TILED_THIN1; + + if (pInOut->flags.depth || pInOut->flags.stencil) + { + tileType = ADDR_DEPTH_SAMPLE_ORDER; + } + else if ((pInOut->bpp <= 32) || + (pInOut->flags.display == TRUE) || + (pInOut->flags.overlay == TRUE)) + { + tileType = ADDR_DISPLAYABLE; + } + else + { + tileType = ADDR_NON_DISPLAYABLE; + } + } + + if (pInOut->flags.prt) + { + if (Thickness(tileMode) > 1) + { + tileMode = ADDR_TM_PRT_TILED_THICK; + tileType = (m_settings.isBonaire == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK; + } + else + { + tileMode = ADDR_TM_PRT_TILED_THIN1; + } + } + + pInOut->tileMode = tileMode; + pInOut->tileType = tileType; + + if ((pInOut->flags.dccCompatible == FALSE) && + (pInOut->flags.tcCompatible == FALSE)) + { + pInOut->flags.opt4Space = TRUE; + pInOut->maxBaseAlign = Block64K; + } + + // Optimize tile mode if possible + OptimizeTileMode(pInOut); + + HwlOverrideTileMode(pInOut); +} + +/** +**************************************************************************************************** +* CiLib::HwlSetPrtTileMode +* +* @brief +* Set PRT tile mode. +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID CiLib::HwlSetPrtTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + AddrTileMode tileMode = pInOut->tileMode; + AddrTileType tileType = pInOut->tileType; + + if (Thickness(tileMode) > 1) + { + tileMode = ADDR_TM_PRT_TILED_THICK; + tileType = (m_settings.isBonaire == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK; + } + else + { + tileMode = ADDR_TM_PRT_TILED_THIN1; + tileType = (tileType == ADDR_THICK) ? ADDR_NON_DISPLAYABLE : tileType; + } + + pInOut->tileMode = tileMode; + pInOut->tileType = tileType; +} + +/** +**************************************************************************************************** +* CiLib::HwlSetupTileInfo +* +* @brief +* Setup default value of tile info for SI +**************************************************************************************************** +*/ +VOID CiLib::HwlSetupTileInfo( + AddrTileMode tileMode, ///< [in] Tile mode + ADDR_SURFACE_FLAGS flags, ///< [in] Surface type flags + UINT_32 bpp, ///< [in] Bits per pixel + UINT_32 pitch, ///< [in] Pitch in pixels + UINT_32 height, ///< [in] Height in pixels + UINT_32 numSamples, ///< [in] Number of samples + ADDR_TILEINFO* pTileInfoIn, ///< [in] Tile info input: NULL for default + ADDR_TILEINFO* pTileInfoOut, ///< [out] Tile info output + AddrTileType inTileType, ///< [in] Tile type + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] Output + ) const +{ + UINT_32 thickness = Thickness(tileMode); + ADDR_TILEINFO* pTileInfo = pTileInfoOut; + INT index = TileIndexInvalid; + INT macroModeIndex = TileIndexInvalid; + + // Fail-safe code + if (IsLinear(tileMode) == FALSE) + { + // Thick tile modes must use thick micro tile mode but Bonaire does not support due to + // old derived netlists (UBTS 404321) + if (thickness > 1) + { + if (m_settings.isBonaire) + { + inTileType = ADDR_NON_DISPLAYABLE; + } + else if ((m_allowNonDispThickModes == FALSE) || + (inTileType != ADDR_NON_DISPLAYABLE) || + // There is no PRT_THICK + THIN entry in tile mode table except Bonaire + (IsPrtTileMode(tileMode) == TRUE)) + { + inTileType = ADDR_THICK; + } + } + // 128 bpp tiling must be non-displayable. + // Fmask reuse color buffer's entry but bank-height field can be from another entry + // To simplify the logic, fmask entry should be picked from non-displayable ones + else if (bpp == 128 || flags.fmask) + { + inTileType = ADDR_NON_DISPLAYABLE; + } + // These two modes only have non-disp entries though they can be other micro tile modes + else if (tileMode == ADDR_TM_3D_TILED_THIN1 || tileMode == ADDR_TM_PRT_3D_TILED_THIN1) + { + inTileType = ADDR_NON_DISPLAYABLE; + } + + if (flags.depth || flags.stencil) + { + inTileType = ADDR_DEPTH_SAMPLE_ORDER; + } + } + + // tcCompatible flag is only meaningful for gfx8. + if (SupportDccAndTcCompatibility() == FALSE) + { + flags.tcCompatible = FALSE; + } + + if (IsTileInfoAllZero(pTileInfo)) + { + // See table entries 0-4 + if (flags.depth || flags.stencil) + { + // tileSize = thickness * bpp * numSamples * 8 * 8 / 8 + UINT_32 tileSize = thickness * bpp * numSamples * 8; + + // Turn off tc compatible if row_size is smaller than tile size (tile split occurs). + if (m_rowSize < tileSize) + { + flags.tcCompatible = FALSE; + } + + if (flags.nonSplit | flags.tcCompatible | flags.needEquation) + { + // Texture readable depth surface should not be split + switch (tileSize) + { + case 64: + index = 0; + break; + case 128: + index = 1; + break; + case 256: + index = 2; + break; + case 512: + index = 3; + break; + default: + index = 4; + break; + } + } + else + { + // Depth and stencil need to use the same index, thus the pre-defined tile_split + // can meet the requirement to choose the same macro mode index + // uncompressed depth/stencil are not supported for now + switch (numSamples) + { + case 1: + index = 0; + break; + case 2: + case 4: + index = 1; + break; + case 8: + index = 2; + break; + default: + break; + } + } + } + + // See table entries 5-6 + if (inTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + index = 5; + break; + case ADDR_TM_PRT_TILED_THIN1: + index = 6; + break; + default: + break; + } + } + + // See table entries 8-12 + if (inTileType == ADDR_DISPLAYABLE) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + index = 9; + break; + case ADDR_TM_2D_TILED_THIN1: + index = 10; + break; + case ADDR_TM_PRT_TILED_THIN1: + index = 11; + break; + default: + break; + } + } + + // See table entries 13-18 + if (inTileType == ADDR_NON_DISPLAYABLE) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + index = 13; + break; + case ADDR_TM_2D_TILED_THIN1: + index = 14; + break; + case ADDR_TM_3D_TILED_THIN1: + index = 15; + break; + case ADDR_TM_PRT_TILED_THIN1: + index = 16; + break; + default: + break; + } + } + + // See table entries 19-26 + if (thickness > 1) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THICK: + // special check for bonaire, for the compatablity between old KMD and new UMD + index = ((inTileType == ADDR_THICK) || m_settings.isBonaire) ? 19 : 18; + break; + case ADDR_TM_2D_TILED_THICK: + // special check for bonaire, for the compatablity between old KMD and new UMD + index = ((inTileType == ADDR_THICK) || m_settings.isBonaire) ? 20 : 24; + break; + case ADDR_TM_3D_TILED_THICK: + index = 21; + break; + case ADDR_TM_PRT_TILED_THICK: + index = 22; + break; + case ADDR_TM_2D_TILED_XTHICK: + index = 25; + break; + case ADDR_TM_3D_TILED_XTHICK: + index = 26; + break; + default: + break; + } + } + + // See table entries 27-30 + if (inTileType == ADDR_ROTATED) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + index = 27; + break; + case ADDR_TM_2D_TILED_THIN1: + index = 28; + break; + case ADDR_TM_PRT_TILED_THIN1: + index = 29; + break; + case ADDR_TM_PRT_2D_TILED_THIN1: + index = 30; + break; + default: + break; + } + } + + if (m_pipes >= 8) + { + ADDR_ASSERT((index + 1) < static_cast(m_noOfEntries)); + // Only do this when tile mode table is updated. + if (((tileMode == ADDR_TM_PRT_TILED_THIN1) || (tileMode == ADDR_TM_PRT_TILED_THICK)) && + (m_tileTable[index + 1].mode == tileMode)) + { + static const UINT_32 PrtTileBytes = 0x10000; + ADDR_TILEINFO tileInfo = {0}; + + HwlComputeMacroModeIndex(index, flags, bpp, numSamples, &tileInfo); + + UINT_32 macroTileBytes = (bpp >> 3) * 64 * numSamples * thickness * + HwlGetPipes(&tileInfo) * tileInfo.banks * + tileInfo.bankWidth * tileInfo.bankHeight; + + if (macroTileBytes != PrtTileBytes) + { + // Switching to next tile mode entry to make sure macro tile size is 64KB + index += 1; + + tileInfo.pipeConfig = m_tileTable[index].info.pipeConfig; + + macroTileBytes = (bpp >> 3) * 64 * numSamples * thickness * + HwlGetPipes(&tileInfo) * tileInfo.banks * + tileInfo.bankWidth * tileInfo.bankHeight; + + ADDR_ASSERT(macroTileBytes == PrtTileBytes); + + flags.tcCompatible = FALSE; + pOut->dccUnsupport = TRUE; + } + } + } + } + else + { + // A pre-filled tile info is ready + index = pOut->tileIndex; + macroModeIndex = pOut->macroModeIndex; + + // pass tile type back for post tile index compute + pOut->tileType = inTileType; + + if (flags.depth || flags.stencil) + { + // tileSize = thickness * bpp * numSamples * 8 * 8 / 8 + UINT_32 tileSize = thickness * bpp * numSamples * 8; + + // Turn off tc compatible if row_size is smaller than tile size (tile split occurs). + if (m_rowSize < tileSize) + { + flags.tcCompatible = FALSE; + } + } + + UINT_32 numPipes = GetPipePerSurf(pTileInfo->pipeConfig); + + if (m_pipes != numPipes) + { + pOut->dccUnsupport = TRUE; + } + } + + // We only need to set up tile info if there is a valid index but macroModeIndex is invalid + if ((index != TileIndexInvalid) && (macroModeIndex == TileIndexInvalid)) + { + macroModeIndex = HwlComputeMacroModeIndex(index, flags, bpp, numSamples, pTileInfo); + + // Copy to pOut->tileType/tileIndex/macroModeIndex + pOut->tileIndex = index; + pOut->tileType = m_tileTable[index].type; // Or inTileType, the samea + pOut->macroModeIndex = macroModeIndex; + } + else if (tileMode == ADDR_TM_LINEAR_GENERAL) + { + pOut->tileIndex = TileIndexLinearGeneral; + + // Copy linear-aligned entry?? + *pTileInfo = m_tileTable[8].info; + } + else if (tileMode == ADDR_TM_LINEAR_ALIGNED) + { + pOut->tileIndex = 8; + *pTileInfo = m_tileTable[8].info; + } + + if (flags.tcCompatible) + { + flags.tcCompatible = CheckTcCompatibility(pTileInfo, bpp, tileMode, inTileType, pOut); + } + + pOut->tcCompatible = flags.tcCompatible; +} + +/** +**************************************************************************************************** +* CiLib::ReadGbTileMode +* +* @brief +* Convert GB_TILE_MODE HW value to ADDR_TILE_CONFIG. +**************************************************************************************************** +*/ +VOID CiLib::ReadGbTileMode( + UINT_32 regValue, ///< [in] GB_TILE_MODE register + TileConfig* pCfg ///< [out] output structure + ) const +{ + GB_TILE_MODE gbTileMode; + gbTileMode.val = regValue; + + pCfg->type = static_cast(gbTileMode.f.micro_tile_mode_new); + pCfg->info.pipeConfig = static_cast(gbTileMode.f.pipe_config + 1); + + if (pCfg->type == ADDR_DEPTH_SAMPLE_ORDER) + { + pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; + } + else + { + pCfg->info.tileSplitBytes = 1 << gbTileMode.f.sample_split; + } + + UINT_32 regArrayMode = gbTileMode.f.array_mode; + + pCfg->mode = static_cast(regArrayMode); + + switch (regArrayMode) + { + case 5: + pCfg->mode = ADDR_TM_PRT_TILED_THIN1; + break; + case 6: + pCfg->mode = ADDR_TM_PRT_2D_TILED_THIN1; + break; + case 8: + pCfg->mode = ADDR_TM_2D_TILED_XTHICK; + break; + case 9: + pCfg->mode = ADDR_TM_PRT_TILED_THICK; + break; + case 0xa: + pCfg->mode = ADDR_TM_PRT_2D_TILED_THICK; + break; + case 0xb: + pCfg->mode = ADDR_TM_PRT_3D_TILED_THIN1; + break; + case 0xe: + pCfg->mode = ADDR_TM_3D_TILED_XTHICK; + break; + case 0xf: + pCfg->mode = ADDR_TM_PRT_3D_TILED_THICK; + break; + default: + break; + } + + // Fail-safe code for these always convert tile info, as the non-macro modes + // return the entry of tile mode table directly without looking up macro mode table + if (!IsMacroTiled(pCfg->mode)) + { + pCfg->info.banks = 2; + pCfg->info.bankWidth = 1; + pCfg->info.bankHeight = 1; + pCfg->info.macroAspectRatio = 1; + pCfg->info.tileSplitBytes = 64; + } +} + +/** +**************************************************************************************************** +* CiLib::InitTileSettingTable +* +* @brief +* Initialize the ADDR_TILE_CONFIG table. +* @return +* TRUE if tile table is correctly initialized +**************************************************************************************************** +*/ +BOOL_32 CiLib::InitTileSettingTable( + const UINT_32* pCfg, ///< [in] Pointer to table of tile configs + UINT_32 noOfEntries ///< [in] Numbe of entries in the table above + ) +{ + BOOL_32 initOk = TRUE; + + ADDR_ASSERT(noOfEntries <= TileTableSize); + + memset(m_tileTable, 0, sizeof(m_tileTable)); + + if (noOfEntries != 0) + { + m_noOfEntries = noOfEntries; + } + else + { + m_noOfEntries = TileTableSize; + } + + if (pCfg) // From Client + { + for (UINT_32 i = 0; i < m_noOfEntries; i++) + { + ReadGbTileMode(*(pCfg + i), &m_tileTable[i]); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + initOk = FALSE; + } + + if (initOk) + { + ADDR_ASSERT(m_tileTable[TILEINDEX_LINEAR_ALIGNED].mode == ADDR_TM_LINEAR_ALIGNED); + + if (m_settings.isBonaire == FALSE) + { + // Check if entry 18 is "thick+thin" combination + if ((m_tileTable[18].mode == ADDR_TM_1D_TILED_THICK) && + (m_tileTable[18].type == ADDR_NON_DISPLAYABLE)) + { + m_allowNonDispThickModes = TRUE; + ADDR_ASSERT(m_tileTable[24].mode == ADDR_TM_2D_TILED_THICK); + } + } + else + { + m_allowNonDispThickModes = TRUE; + } + + // Assume the first entry is always programmed with full pipes + m_pipes = HwlGetPipes(&m_tileTable[0].info); + } + + return initOk; +} + +/** +**************************************************************************************************** +* CiLib::ReadGbMacroTileCfg +* +* @brief +* Convert GB_MACRO_TILE_CFG HW value to ADDR_TILE_CONFIG. +**************************************************************************************************** +*/ +VOID CiLib::ReadGbMacroTileCfg( + UINT_32 regValue, ///< [in] GB_MACRO_TILE_MODE register + ADDR_TILEINFO* pCfg ///< [out] output structure + ) const +{ + GB_MACROTILE_MODE gbTileMode; + gbTileMode.val = regValue; + + pCfg->bankHeight = 1 << gbTileMode.f.bank_height; + pCfg->bankWidth = 1 << gbTileMode.f.bank_width; + pCfg->banks = 1 << (gbTileMode.f.num_banks + 1); + pCfg->macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; +} + +/** +**************************************************************************************************** +* CiLib::InitMacroTileCfgTable +* +* @brief +* Initialize the ADDR_MACRO_TILE_CONFIG table. +* @return +* TRUE if macro tile table is correctly initialized +**************************************************************************************************** +*/ +BOOL_32 CiLib::InitMacroTileCfgTable( + const UINT_32* pCfg, ///< [in] Pointer to table of tile configs + UINT_32 noOfMacroEntries ///< [in] Numbe of entries in the table above + ) +{ + BOOL_32 initOk = TRUE; + + ADDR_ASSERT(noOfMacroEntries <= MacroTileTableSize); + + memset(m_macroTileTable, 0, sizeof(m_macroTileTable)); + + if (noOfMacroEntries != 0) + { + m_noOfMacroEntries = noOfMacroEntries; + } + else + { + m_noOfMacroEntries = MacroTileTableSize; + } + + if (pCfg) // From Client + { + for (UINT_32 i = 0; i < m_noOfMacroEntries; i++) + { + ReadGbMacroTileCfg(*(pCfg + i), &m_macroTileTable[i]); + + m_macroTileTable[i].tileSplitBytes = 64 << (i % 8); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + initOk = FALSE; + } + return initOk; +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeMacroModeIndex +* +* @brief +* Computes macro tile mode index +* @return +* TRUE if macro tile table is correctly initialized +**************************************************************************************************** +*/ +INT_32 CiLib::HwlComputeMacroModeIndex( + INT_32 tileIndex, ///< [in] Tile mode index + ADDR_SURFACE_FLAGS flags, ///< [in] Surface flags + UINT_32 bpp, ///< [in] Bit per pixel + UINT_32 numSamples, ///< [in] Number of samples + ADDR_TILEINFO* pTileInfo, ///< [out] Pointer to ADDR_TILEINFO + AddrTileMode* pTileMode, ///< [out] Pointer to AddrTileMode + AddrTileType* pTileType ///< [out] Pointer to AddrTileType + ) const +{ + INT_32 macroModeIndex = TileIndexInvalid; + + AddrTileMode tileMode = m_tileTable[tileIndex].mode; + AddrTileType tileType = m_tileTable[tileIndex].type; + UINT_32 thickness = Thickness(tileMode); + + if (!IsMacroTiled(tileMode)) + { + *pTileInfo = m_tileTable[tileIndex].info; + macroModeIndex = TileIndexNoMacroIndex; + } + else + { + UINT_32 tileBytes1x = BITS_TO_BYTES(bpp * MicroTilePixels * thickness); + UINT_32 tileSplit; + + if (m_tileTable[tileIndex].type == ADDR_DEPTH_SAMPLE_ORDER) + { + // Depth entries store real tileSplitBytes + tileSplit = m_tileTable[tileIndex].info.tileSplitBytes; + } + else + { + // Non-depth entries store a split factor + UINT_32 sampleSplit = m_tileTable[tileIndex].info.tileSplitBytes; + UINT_32 colorTileSplit = Max(256u, sampleSplit * tileBytes1x); + + tileSplit = colorTileSplit; + } + + UINT_32 tileSplitC = Min(m_rowSize, tileSplit); + UINT_32 tileBytes; + + if (flags.fmask) + { + tileBytes = Min(tileSplitC, tileBytes1x); + } + else + { + tileBytes = Min(tileSplitC, numSamples * tileBytes1x); + } + + if (tileBytes < 64) + { + tileBytes = 64; + } + + macroModeIndex = Log2(tileBytes / 64); + + if (flags.prt || IsPrtTileMode(tileMode)) + { + macroModeIndex += PrtMacroModeOffset; + *pTileInfo = m_macroTileTable[macroModeIndex]; + } + else + { + *pTileInfo = m_macroTileTable[macroModeIndex]; + } + + pTileInfo->pipeConfig = m_tileTable[tileIndex].info.pipeConfig; + + pTileInfo->tileSplitBytes = tileSplitC; + } + + if (NULL != pTileMode) + { + *pTileMode = tileMode; + } + + if (NULL != pTileType) + { + *pTileType = tileType; + } + + return macroModeIndex; +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeTileDataWidthAndHeightLinear +* +* @brief +* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout +* +* @note +* MacroWidth and macroHeight are measured in pixels +**************************************************************************************************** +*/ +VOID CiLib::HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, ///< [out] macro tile width + UINT_32* pMacroHeight, ///< [out] macro tile height + UINT_32 bpp, ///< [in] bits per pixel + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + ADDR_ASSERT(pTileInfo != NULL); + + UINT_32 numTiles; + + switch (pTileInfo->pipeConfig) + { + case ADDR_PIPECFG_P16_32x32_8x16: + case ADDR_PIPECFG_P16_32x32_16x16: + case ADDR_PIPECFG_P8_32x64_32x32: + case ADDR_PIPECFG_P8_32x32_16x32: + case ADDR_PIPECFG_P8_32x32_16x16: + case ADDR_PIPECFG_P8_32x32_8x16: + case ADDR_PIPECFG_P4_32x32: + numTiles = 8; + break; + default: + numTiles = 4; + break; + } + + *pMacroWidth = numTiles * MicroTileWidth; + *pMacroHeight = numTiles * MicroTileHeight; +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeMetadataNibbleAddress +* +* @brief +* calculate meta data address based on input information +* +* ¶meter +* uncompressedDataByteAddress - address of a pixel in color surface +* dataBaseByteAddress - base address of color surface +* metadataBaseByteAddress - base address of meta ram +* metadataBitSize - meta key size, 8 for DCC, 4 for cmask +* elementBitSize - element size of color surface +* blockByteSize - compression block size, 256 for DCC +* pipeInterleaveBytes - pipe interleave size +* numOfPipes - number of pipes +* numOfBanks - number of banks +* numOfSamplesPerSplit - number of samples per tile split +* @return +* meta data nibble address (nibble address is used to support DCC compatible cmask) +* +**************************************************************************************************** +*/ +UINT_64 CiLib::HwlComputeMetadataNibbleAddress( + UINT_64 uncompressedDataByteAddress, + UINT_64 dataBaseByteAddress, + UINT_64 metadataBaseByteAddress, + UINT_32 metadataBitSize, + UINT_32 elementBitSize, + UINT_32 blockByteSize, + UINT_32 pipeInterleaveBytes, + UINT_32 numOfPipes, + UINT_32 numOfBanks, + UINT_32 numOfSamplesPerSplit) const +{ + ///-------------------------------------------------------------------------------------------- + /// Get pipe interleave, bank and pipe bits + ///-------------------------------------------------------------------------------------------- + UINT_32 pipeInterleaveBits = Log2(pipeInterleaveBytes); + UINT_32 pipeBits = Log2(numOfPipes); + UINT_32 bankBits = Log2(numOfBanks); + + ///-------------------------------------------------------------------------------------------- + /// Clear pipe and bank swizzles + ///-------------------------------------------------------------------------------------------- + UINT_32 dataMacrotileBits = pipeInterleaveBits + pipeBits + bankBits; + UINT_32 metadataMacrotileBits = pipeInterleaveBits + pipeBits + bankBits; + + UINT_64 dataMacrotileClearMask = ~((1L << dataMacrotileBits) - 1); + UINT_64 metadataMacrotileClearMask = ~((1L << metadataMacrotileBits) - 1); + + UINT_64 dataBaseByteAddressNoSwizzle = dataBaseByteAddress & dataMacrotileClearMask; + UINT_64 metadataBaseByteAddressNoSwizzle = metadataBaseByteAddress & metadataMacrotileClearMask; + + ///-------------------------------------------------------------------------------------------- + /// Modify metadata base before adding in so that when final address is divided by data ratio, + /// the base address returns to where it should be + ///-------------------------------------------------------------------------------------------- + ADDR_ASSERT((0 != metadataBitSize)); + UINT_64 metadataBaseShifted = metadataBaseByteAddressNoSwizzle * blockByteSize * 8 / + metadataBitSize; + UINT_64 offset = uncompressedDataByteAddress - + dataBaseByteAddressNoSwizzle + + metadataBaseShifted; + + ///-------------------------------------------------------------------------------------------- + /// Save bank data bits + ///-------------------------------------------------------------------------------------------- + UINT_32 lsb = pipeBits + pipeInterleaveBits; + UINT_32 msb = bankBits - 1 + lsb; + + UINT_64 bankDataBits = GetBits(offset, msb, lsb); + + ///-------------------------------------------------------------------------------------------- + /// Save pipe data bits + ///-------------------------------------------------------------------------------------------- + lsb = pipeInterleaveBits; + msb = pipeBits - 1 + lsb; + + UINT_64 pipeDataBits = GetBits(offset, msb, lsb); + + ///-------------------------------------------------------------------------------------------- + /// Remove pipe and bank bits + ///-------------------------------------------------------------------------------------------- + lsb = pipeInterleaveBits; + msb = dataMacrotileBits - 1; + + UINT_64 offsetWithoutPipeBankBits = RemoveBits(offset, msb, lsb); + + ADDR_ASSERT((0 != blockByteSize)); + UINT_64 blockInBankpipe = offsetWithoutPipeBankBits / blockByteSize; + + UINT_32 tileSize = 8 * 8 * elementBitSize/8 * numOfSamplesPerSplit; + UINT_32 blocksInTile = tileSize / blockByteSize; + + if (0 == blocksInTile) + { + lsb = 0; + } + else + { + lsb = Log2(blocksInTile); + } + msb = bankBits - 1 + lsb; + + UINT_64 blockInBankpipeWithBankBits = InsertBits(blockInBankpipe, bankDataBits, msb, lsb); + + /// NOTE *2 because we are converting to Nibble address in this step + UINT_64 metaAddressInPipe = blockInBankpipeWithBankBits * 2 * metadataBitSize / 8; + + ///-------------------------------------------------------------------------------------------- + /// Reinsert pipe bits back into the final address + ///-------------------------------------------------------------------------------------------- + lsb = pipeInterleaveBits + 1; ///<+1 due to Nibble address now gives interleave bits extra lsb. + msb = pipeBits - 1 + lsb; + UINT_64 metadataAddress = InsertBits(metaAddressInPipe, pipeDataBits, msb, lsb); + + return metadataAddress; +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeSurfaceAlignmentsMacroTiled +* +* @brief +* Hardware layer function to compute alignment request for macro tile mode +* +**************************************************************************************************** +*/ +VOID CiLib::HwlComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 mipLevel, ///< [in] mip level + UINT_32 numSamples, ///< [in] number of samples + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in,out] Surface output + ) const +{ + // This is to workaround a H/W limitation that DCC doesn't work when pipe config is switched to + // P4. In theory, all asics that have such switching should be patched but we now only know what + // to pad for Fiji. + if ((m_settings.isFiji == TRUE) && + (flags.dccPipeWorkaround == TRUE) && + (flags.prt == FALSE) && + (mipLevel == 0) && + (tileMode == ADDR_TM_PRT_TILED_THIN1) && + (pOut->dccUnsupport == TRUE)) + { + pOut->pitchAlign = PowTwoAlign(pOut->pitchAlign, 256); + // In case the client still requests DCC usage. + pOut->dccUnsupport = FALSE; + } +} + +/** +**************************************************************************************************** +* CiLib::HwlPadDimensions +* +* @brief +* Helper function to pad dimensions +* +**************************************************************************************************** +*/ +VOID CiLib::HwlPadDimensions( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + ADDR_TILEINFO* pTileInfo, ///< [in] tile info + UINT_32 mipLevel, ///< [in] mip level + UINT_32* pPitch, ///< [in,out] pitch in pixels + UINT_32* pPitchAlign, ///< [in,out] pitch alignment + UINT_32 height, ///< [in] height in pixels + UINT_32 heightAlign ///< [in] height alignment + ) const +{ + if ((SupportDccAndTcCompatibility() == TRUE) && + (flags.dccCompatible == TRUE) && + (numSamples > 1) && + (mipLevel == 0) && + (IsMacroTiled(tileMode) == TRUE)) + { + UINT_32 tileSizePerSample = BITS_TO_BYTES(bpp * MicroTileWidth * MicroTileHeight); + UINT_32 samplesPerSplit = pTileInfo->tileSplitBytes / tileSizePerSample; + + if (samplesPerSplit < numSamples) + { + UINT_32 dccFastClearByteAlign = HwlGetPipes(pTileInfo) * m_pipeInterleaveBytes * 256; + UINT_32 bytesPerSplit = BITS_TO_BYTES((*pPitch) * height * bpp * samplesPerSplit); + + ADDR_ASSERT(IsPow2(dccFastClearByteAlign)); + + if (0 != (bytesPerSplit & (dccFastClearByteAlign - 1))) + { + UINT_32 dccFastClearPixelAlign = dccFastClearByteAlign / + BITS_TO_BYTES(bpp) / + samplesPerSplit; + UINT_32 macroTilePixelAlign = (*pPitchAlign) * heightAlign; + + if ((dccFastClearPixelAlign >= macroTilePixelAlign) && + ((dccFastClearPixelAlign % macroTilePixelAlign) == 0)) + { + UINT_32 dccFastClearPitchAlignInMacroTile = + dccFastClearPixelAlign / macroTilePixelAlign; + UINT_32 heightInMacroTile = height / heightAlign; + + while ((heightInMacroTile > 1) && + ((heightInMacroTile % 2) == 0) && + (dccFastClearPitchAlignInMacroTile > 1) && + ((dccFastClearPitchAlignInMacroTile % 2) == 0)) + { + heightInMacroTile >>= 1; + dccFastClearPitchAlignInMacroTile >>= 1; + } + + UINT_32 dccFastClearPitchAlignInPixels = + (*pPitchAlign) * dccFastClearPitchAlignInMacroTile; + + if (IsPow2(dccFastClearPitchAlignInPixels)) + { + *pPitch = PowTwoAlign((*pPitch), dccFastClearPitchAlignInPixels); + } + else + { + *pPitch += (dccFastClearPitchAlignInPixels - 1); + *pPitch /= dccFastClearPitchAlignInPixels; + *pPitch *= dccFastClearPitchAlignInPixels; + } + + *pPitchAlign = dccFastClearPitchAlignInPixels; + } + } + } + } +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeMaxBaseAlignments +* +* @brief +* Gets maximum alignments +* @return +* maximum alignments +**************************************************************************************************** +*/ +UINT_32 CiLib::HwlComputeMaxBaseAlignments() const +{ + const UINT_32 pipes = HwlGetPipes(&m_tileTable[0].info); + + // Initial size is 64 KiB for PRT. + UINT_32 maxBaseAlign = 64 * 1024; + + for (UINT_32 i = 0; i < m_noOfMacroEntries; i++) + { + // The maximum tile size is 16 byte-per-pixel and either 8-sample or 8-slice. + UINT_32 tileSize = m_macroTileTable[i].tileSplitBytes; + + UINT_32 baseAlign = tileSize * pipes * m_macroTileTable[i].banks * + m_macroTileTable[i].bankWidth * m_macroTileTable[i].bankHeight; + + if (baseAlign > maxBaseAlign) + { + maxBaseAlign = baseAlign; + } + } + + return maxBaseAlign; +} + +/** +**************************************************************************************************** +* CiLib::HwlComputeMaxMetaBaseAlignments +* +* @brief +* Gets maximum alignments for metadata +* @return +* maximum alignments for metadata +**************************************************************************************************** +*/ +UINT_32 CiLib::HwlComputeMaxMetaBaseAlignments() const +{ + UINT_32 maxBank = 1; + + for (UINT_32 i = 0; i < m_noOfMacroEntries; i++) + { + if (SupportDccAndTcCompatibility() && IsMacroTiled(m_tileTable[i].mode)) + { + maxBank = Max(maxBank, m_macroTileTable[i].banks); + } + } + + return SiLib::HwlComputeMaxMetaBaseAlignments() * maxBank; +} + +/** +**************************************************************************************************** +* CiLib::DepthStencilTileCfgMatch +* +* @brief +* Try to find a tile index for stencil which makes its tile config parameters matches to depth +* @return +* TRUE if such tile index for stencil can be found +**************************************************************************************************** +*/ +BOOL_32 CiLib::DepthStencilTileCfgMatch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + BOOL_32 depthStencil2DTileConfigMatch = FALSE; + + for (INT_32 stencilTileIndex = MinDepth2DThinIndex; + stencilTileIndex <= MaxDepth2DThinIndex; + stencilTileIndex++) + { + ADDR_TILEINFO tileInfo = {0}; + INT_32 stencilMacroIndex = HwlComputeMacroModeIndex(stencilTileIndex, + pIn->flags, + 8, + pIn->numSamples, + &tileInfo); + + if (stencilMacroIndex != TileIndexNoMacroIndex) + { + if ((m_macroTileTable[stencilMacroIndex].banks == + m_macroTileTable[pOut->macroModeIndex].banks) && + (m_macroTileTable[stencilMacroIndex].bankWidth == + m_macroTileTable[pOut->macroModeIndex].bankWidth) && + (m_macroTileTable[stencilMacroIndex].bankHeight == + m_macroTileTable[pOut->macroModeIndex].bankHeight) && + (m_macroTileTable[stencilMacroIndex].macroAspectRatio == + m_macroTileTable[pOut->macroModeIndex].macroAspectRatio) && + (m_macroTileTable[stencilMacroIndex].pipeConfig == + m_macroTileTable[pOut->macroModeIndex].pipeConfig)) + { + if ((pOut->tcCompatible == FALSE) || + (tileInfo.tileSplitBytes >= MicroTileWidth * MicroTileHeight * pIn->numSamples)) + { + depthStencil2DTileConfigMatch = TRUE; + pOut->stencilTileIdx = stencilTileIndex; + break; + } + } + } + else + { + ADDR_ASSERT_ALWAYS(); + } + } + + return depthStencil2DTileConfigMatch; +} + +/** +**************************************************************************************************** +* CiLib::DepthStencilTileCfgMatch +* +* @brief +* Check if tc compatibility is available +* @return +* If tc compatibility is not available +**************************************************************************************************** +*/ +BOOL_32 CiLib::CheckTcCompatibility( + const ADDR_TILEINFO* pTileInfo, ///< [in] input tile info + UINT_32 bpp, ///< [in] Bits per pixel + AddrTileMode tileMode, ///< [in] input tile mode + AddrTileType tileType, ///< [in] input tile type + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in] output surf info + ) const +{ + BOOL_32 tcCompatible = TRUE; + + if (IsMacroTiled(tileMode)) + { + if (tileType != ADDR_DEPTH_SAMPLE_ORDER) + { + // Turn off tcCompatible for color surface if tileSplit happens. Depth/stencil + // tileSplit case was handled at tileIndex selecting time. + INT_32 tileIndex = pOut->tileIndex; + + if ((tileIndex == TileIndexInvalid) && (IsTileInfoAllZero(pTileInfo) == FALSE)) + { + tileIndex = HwlPostCheckTileIndex(pTileInfo, tileMode, tileType, tileIndex); + } + + if (tileIndex != TileIndexInvalid) + { + UINT_32 thickness = Thickness(tileMode); + + ADDR_ASSERT(static_cast(tileIndex) < TileTableSize); + // Non-depth entries store a split factor + UINT_32 sampleSplit = m_tileTable[tileIndex].info.tileSplitBytes; + UINT_32 tileBytes1x = BITS_TO_BYTES(bpp * MicroTilePixels * thickness); + UINT_32 colorTileSplit = Max(256u, sampleSplit * tileBytes1x); + + if (m_rowSize < colorTileSplit) + { + tcCompatible = FALSE; + } + } + } + } + else + { + // Client should not enable tc compatible for linear and 1D tile modes. + tcCompatible = FALSE; + } + + return tcCompatible; +} + +} // V1 +} // Addr diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.h new file mode 100644 index 0000000000..6461389f42 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.h @@ -0,0 +1,205 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file ciaddrlib.h +* @brief Contains the CiLib class definition. +**************************************************************************************************** +*/ + +#ifndef __CI_ADDR_LIB_H__ +#define __CI_ADDR_LIB_H__ + +#include "addrlib1.h" +#include "siaddrlib.h" + +namespace Addr +{ +namespace V1 +{ + +/** +**************************************************************************************************** +* @brief This class is the CI specific address library +* function set. +**************************************************************************************************** +*/ +class CiLib : public SiLib +{ +public: + /// Creates CiLib object + static Addr::Lib* CreateObj(const Client* pClient) + { + VOID* pMem = Object::ClientAlloc(sizeof(CiLib), pClient); + return (pMem != NULL) ? new (pMem) CiLib(pClient) : NULL; + } + +private: + CiLib(const Client* pClient); + virtual ~CiLib(); + +protected: + + // Hwl interface - defined in AddrLib1 + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + virtual ChipFamily HwlConvertChipFamily( + UINT_32 uChipFamily, UINT_32 uChipRevision); + + virtual BOOL_32 HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn); + + virtual ADDR_E_RETURNCODE HwlSetupTileCfg( + UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo, + AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; + + virtual VOID HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, UINT_32* pMacroHeight, + UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; + + virtual INT_32 HwlComputeMacroModeIndex( + INT_32 tileIndex, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, + ADDR_TILEINFO* pTileInfo, AddrTileMode* pTileMode = NULL, AddrTileType* pTileType = NULL + ) const; + + // Sub-hwl interface - defined in EgBasedLib + virtual VOID HwlSetupTileInfo( + AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, + AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual INT_32 HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, + INT curIndex = TileIndexInvalid) const; + + virtual VOID HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; + + virtual VOID HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const; + + virtual AddrTileMode HwlDegradeThickTileMode( + AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; + + virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; + + virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; + + virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; + + /// Overwrite tile setting to PRT + virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual UINT_32 HwlComputeMaxBaseAlignments() const; + + virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; + + virtual VOID HwlPadDimensions( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel, + UINT_32* pPitch, UINT_32 *PitchAlign, UINT_32 height, UINT_32 heightAlign) const; + + virtual VOID HwlComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 mipLevel, UINT_32 numSamples, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + +private: + VOID ReadGbTileMode( + UINT_32 regValue, TileConfig* pCfg) const; + + VOID ReadGbMacroTileCfg( + UINT_32 regValue, ADDR_TILEINFO* pCfg) const; + +private: + BOOL_32 InitTileSettingTable( + const UINT_32 *pSetting, UINT_32 noOfEntries); + + BOOL_32 InitMacroTileCfgTable( + const UINT_32 *pSetting, UINT_32 noOfEntries); + + UINT_64 HwlComputeMetadataNibbleAddress( + UINT_64 uncompressedDataByteAddress, + UINT_64 dataBaseByteAddress, + UINT_64 metadataBaseByteAddress, + UINT_32 metadataBitSize, + UINT_32 elementBitSize, + UINT_32 blockByteSize, + UINT_32 pipeInterleaveBytes, + UINT_32 numOfPipes, + UINT_32 numOfBanks, + UINT_32 numOfSamplesPerSplit) const; + + BOOL_32 DepthStencilTileCfgMatch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + BOOL_32 CheckTcCompatibility(const ADDR_TILEINFO* pTileInfo, UINT_32 bpp, AddrTileMode tileMode, + AddrTileType tileType, const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + BOOL_32 SupportDccAndTcCompatibility() const + { + return ((m_settings.isVolcanicIslands == TRUE) || (m_configFlags.forceDccAndTcCompat == TRUE)); + } + + static const UINT_32 MacroTileTableSize = 16; + static const UINT_32 PrtMacroModeOffset = MacroTileTableSize / 2; + static const INT_32 MinDepth2DThinIndex = 0; + static const INT_32 MaxDepth2DThinIndex = 4; + static const INT_32 Depth1DThinIndex = 5; + + ADDR_TILEINFO m_macroTileTable[MacroTileTableSize]; + UINT_32 m_noOfMacroEntries; + BOOL_32 m_allowNonDispThickModes; +}; + +} // V1 +} // Addr + +#endif diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.cpp new file mode 100644 index 0000000000..bdeda5ff5f --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.cpp @@ -0,0 +1,4153 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ +/** +**************************************************************************************************** +* @file egbaddrlib.cpp +* @brief Contains the EgBasedLib class implementation. +**************************************************************************************************** +*/ + +#include "egbaddrlib.h" + +#include "util/macros.h" + +namespace Addr +{ +namespace V1 +{ + +/** +**************************************************************************************************** +* EgBasedLib::EgBasedLib +* +* @brief +* Constructor +* +* @note +* +**************************************************************************************************** +*/ +EgBasedLib::EgBasedLib(const Client* pClient) + : + Lib(pClient), + m_ranks(0), + m_logicalBanks(0), + m_bankInterleave(1) +{ +} + +/** +**************************************************************************************************** +* EgBasedLib::~EgBasedLib +* +* @brief +* Destructor +**************************************************************************************************** +*/ +EgBasedLib::~EgBasedLib() +{ +} + +/** +**************************************************************************************************** +* EgBasedLib::DispatchComputeSurfaceInfo +* +* @brief +* Compute surface sizes include padded pitch,height,slices,total size in bytes, +* meanwhile output suitable tile mode and base alignment might be changed in this +* call as well. Results are returned through output parameters. +* +* @return +* TRUE if no error occurs +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::DispatchComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + AddrTileMode tileMode = pIn->tileMode; + UINT_32 bpp = pIn->bpp; + UINT_32 numSamples = pIn->numSamples; + UINT_32 numFrags = ((pIn->numFrags == 0) ? numSamples : pIn->numFrags); + UINT_32 pitch = pIn->width; + UINT_32 height = pIn->height; + UINT_32 numSlices = pIn->numSlices; + UINT_32 mipLevel = pIn->mipLevel; + ADDR_SURFACE_FLAGS flags = pIn->flags; + + ADDR_TILEINFO tileInfoDef = {0}; + ADDR_TILEINFO* pTileInfo = &tileInfoDef; + UINT_32 padDims = 0; + BOOL_32 valid; + + if (pIn->flags.disallowLargeThickDegrade == 0) + { + tileMode = DegradeLargeThickTile(tileMode, bpp); + } + + // Only override numSamples for NI above + if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) + { + if (numFrags != numSamples) // This means EQAA + { + // The real surface size needed is determined by number of fragments + numSamples = numFrags; + } + + // Save altered numSamples in pOut + pOut->numSamples = numSamples; + } + + // Caller makes sure pOut->pTileInfo is not NULL, see HwlComputeSurfaceInfo + ADDR_ASSERT(pOut->pTileInfo); + + if (pOut->pTileInfo != NULL) + { + pTileInfo = pOut->pTileInfo; + } + + // Set default values + if (pIn->pTileInfo != NULL) + { + if (pTileInfo != pIn->pTileInfo) + { + *pTileInfo = *pIn->pTileInfo; + } + } + else + { + memset(pTileInfo, 0, sizeof(ADDR_TILEINFO)); + } + + // For macro tile mode, we should calculate default tiling parameters + HwlSetupTileInfo(tileMode, + flags, + bpp, + pitch, + height, + numSamples, + pIn->pTileInfo, + pTileInfo, + pIn->tileType, + pOut); + + if (flags.cube) + { + if (mipLevel == 0) + { + padDims = 2; + } + + if (numSlices == 1) + { + // This is calculating one face, remove cube flag + flags.cube = 0; + } + } + + switch (tileMode) + { + case ADDR_TM_LINEAR_GENERAL://fall through + case ADDR_TM_LINEAR_ALIGNED: + valid = ComputeSurfaceInfoLinear(pIn, pOut, padDims); + break; + + case ADDR_TM_1D_TILED_THIN1://fall through + case ADDR_TM_1D_TILED_THICK: + valid = ComputeSurfaceInfoMicroTiled(pIn, pOut, padDims, tileMode); + break; + + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_2D_TILED_XTHICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: //fall through + case ADDR_TM_PRT_TILED_THIN1: //fall through + case ADDR_TM_PRT_2D_TILED_THIN1://fall through + case ADDR_TM_PRT_3D_TILED_THIN1://fall through + case ADDR_TM_PRT_TILED_THICK: //fall through + case ADDR_TM_PRT_2D_TILED_THICK://fall through + case ADDR_TM_PRT_3D_TILED_THICK: + valid = ComputeSurfaceInfoMacroTiled(pIn, pOut, padDims, tileMode); + break; + + default: + valid = FALSE; + ADDR_ASSERT_ALWAYS(); + break; + } + + return valid; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceInfoLinear +* +* @brief +* Compute linear surface sizes include padded pitch, height, slices, total size in +* bytes, meanwhile alignments as well. Since it is linear mode, so output tile mode +* will not be changed here. Results are returned through output parameters. +* +* @return +* TRUE if no error occurs +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::ComputeSurfaceInfoLinear( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, ///< [out] Output structure + UINT_32 padDims ///< [in] Dimensions to padd + ) const +{ + UINT_32 expPitch = pIn->width; + UINT_32 expHeight = pIn->height; + UINT_32 expNumSlices = pIn->numSlices; + + // No linear MSAA on real H/W, keep this for TGL + UINT_32 numSamples = pOut->numSamples; + + const UINT_32 microTileThickness = 1; + + // + // Compute the surface alignments. + // + ComputeSurfaceAlignmentsLinear(pIn->tileMode, + pIn->bpp, + pIn->flags, + &pOut->baseAlign, + &pOut->pitchAlign, + &pOut->heightAlign); + + if ((pIn->tileMode == ADDR_TM_LINEAR_GENERAL) && pIn->flags.color && (pIn->height > 1)) + { +#if !ALT_TEST + // When linear_general surface is accessed in multiple lines, it requires 8 pixels in pitch + // alignment since PITCH_TILE_MAX is in unit of 8 pixels. + // It is OK if it is accessed per line. + ADDR_ASSERT((pIn->width % 8) == 0); +#endif + } + + pOut->depthAlign = microTileThickness; + + expPitch = HwlPreHandleBaseLvl3xPitch(pIn, expPitch); + + // + // Pad pitch and height to the required granularities. + // + PadDimensions(pIn->tileMode, + pIn->bpp, + pIn->flags, + numSamples, + pOut->pTileInfo, + padDims, + pIn->mipLevel, + &expPitch, &pOut->pitchAlign, + &expHeight, pOut->heightAlign, + &expNumSlices, microTileThickness); + + expPitch = HwlPostHandleBaseLvl3xPitch(pIn, expPitch); + + // + // Adjust per HWL + // + + UINT_64 logicalSliceSize; + + logicalSliceSize = HwlGetSizeAdjustmentLinear(pIn->tileMode, + pIn->bpp, + numSamples, + pOut->baseAlign, + pOut->pitchAlign, + &expPitch, + &expHeight, + &pOut->heightAlign); + + if ((pIn->pitchAlign != 0) || (pIn->heightAlign != 0)) + { + if (pIn->pitchAlign != 0) + { + ADDR_ASSERT((pIn->pitchAlign % pOut->pitchAlign) == 0); + pOut->pitchAlign = pIn->pitchAlign; + + if (IsPow2(pOut->pitchAlign)) + { + expPitch = PowTwoAlign(expPitch, pOut->pitchAlign); + } + else + { + expPitch += pOut->pitchAlign - 1; + expPitch /= pOut->pitchAlign; + expPitch *= pOut->pitchAlign; + } + } + + if (pIn->heightAlign != 0) + { + ADDR_ASSERT((pIn->heightAlign % pOut->heightAlign) == 0); + pOut->heightAlign = pIn->heightAlign; + + if (IsPow2(pOut->heightAlign)) + { + expHeight = PowTwoAlign(expHeight, pOut->heightAlign); + } + else + { + expHeight += pOut->heightAlign - 1; + expHeight /= pOut->heightAlign; + expHeight *= pOut->heightAlign; + } + } + + logicalSliceSize = BITS_TO_BYTES(expPitch * expHeight * pIn->bpp); + } + + pOut->pitch = expPitch; + pOut->height = expHeight; + pOut->depth = expNumSlices; + + pOut->surfSize = logicalSliceSize * expNumSlices; + + pOut->tileMode = pIn->tileMode; + + return TRUE; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceInfoMicroTiled +* +* @brief +* Compute 1D/Micro Tiled surface sizes include padded pitch, height, slices, total +* size in bytes, meanwhile alignments as well. Results are returned through output +* parameters. +* +* @return +* TRUE if no error occurs +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::ComputeSurfaceInfoMicroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, ///< [out] Output structure + UINT_32 padDims, ///< [in] Dimensions to padd + AddrTileMode expTileMode ///< [in] Expected tile mode + ) const +{ + BOOL_32 valid = TRUE; + + UINT_32 microTileThickness; + UINT_32 expPitch = pIn->width; + UINT_32 expHeight = pIn->height; + UINT_32 expNumSlices = pIn->numSlices; + + // No 1D MSAA on real H/W, keep this for TGL + UINT_32 numSamples = pOut->numSamples; + + // + // Compute the micro tile thickness. + // + microTileThickness = Thickness(expTileMode); + + // + // Extra override for mip levels + // + if (pIn->mipLevel > 0) + { + // + // Reduce tiling mode from thick to thin if the number of slices is less than the + // micro tile thickness. + // + if ((expTileMode == ADDR_TM_1D_TILED_THICK) && + (expNumSlices < ThickTileThickness)) + { + expTileMode = HwlDegradeThickTileMode(ADDR_TM_1D_TILED_THICK, expNumSlices, NULL); + if (expTileMode != ADDR_TM_1D_TILED_THICK) + { + microTileThickness = 1; + } + } + } + + // + // Compute the surface restrictions. + // + ComputeSurfaceAlignmentsMicroTiled(expTileMode, + pIn->bpp, + pIn->flags, + pIn->mipLevel, + numSamples, + &pOut->baseAlign, + &pOut->pitchAlign, + &pOut->heightAlign); + + pOut->depthAlign = microTileThickness; + + // + // Pad pitch and height to the required granularities. + // Compute surface size. + // Return parameters. + // + PadDimensions(expTileMode, + pIn->bpp, + pIn->flags, + numSamples, + pOut->pTileInfo, + padDims, + pIn->mipLevel, + &expPitch, &pOut->pitchAlign, + &expHeight, pOut->heightAlign, + &expNumSlices, microTileThickness); + + // + // Get HWL specific pitch adjustment + // + UINT_64 logicalSliceSize = HwlGetSizeAdjustmentMicroTiled(microTileThickness, + pIn->bpp, + pIn->flags, + numSamples, + pOut->baseAlign, + pOut->pitchAlign, + &expPitch, + &expHeight); + + pOut->pitch = expPitch; + pOut->height = expHeight; + pOut->depth = expNumSlices; + + pOut->surfSize = logicalSliceSize * expNumSlices; + + pOut->tileMode = expTileMode; + + return valid; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceInfoMacroTiled +* +* @brief +* Compute 2D/macro tiled surface sizes include padded pitch, height, slices, total +* size in bytes, meanwhile output suitable tile mode and alignments might be changed +* in this call as well. Results are returned through output parameters. +* +* @return +* TRUE if no error occurs +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::ComputeSurfaceInfoMacroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, ///< [out] Output structure + UINT_32 padDims, ///< [in] Dimensions to padd + AddrTileMode expTileMode ///< [in] Expected tile mode + ) const +{ + BOOL_32 valid = TRUE; + + AddrTileMode origTileMode = expTileMode; + UINT_32 microTileThickness; + + UINT_32 paddedPitch; + UINT_32 paddedHeight; + UINT_64 bytesPerSlice; + + UINT_32 expPitch = pIn->width; + UINT_32 expHeight = pIn->height; + UINT_32 expNumSlices = pIn->numSlices; + + UINT_32 numSamples = pOut->numSamples; + + // + // Compute the surface restrictions as base + // SanityCheckMacroTiled is called in ComputeSurfaceAlignmentsMacroTiled + // + valid = ComputeSurfaceAlignmentsMacroTiled(expTileMode, + pIn->bpp, + pIn->flags, + pIn->mipLevel, + numSamples, + pOut); + + if (valid) + { + // + // Compute the micro tile thickness. + // + microTileThickness = Thickness(expTileMode); + + // + // Find the correct tiling mode for mip levels + // + if (pIn->mipLevel > 0) + { + // + // Try valid tile mode + // + expTileMode = ComputeSurfaceMipLevelTileMode(expTileMode, + pIn->bpp, + expPitch, + expHeight, + expNumSlices, + numSamples, + pOut->blockWidth, + pOut->blockHeight, + pOut->pTileInfo); + + if (!IsMacroTiled(expTileMode)) // Downgraded to micro-tiled + { + return ComputeSurfaceInfoMicroTiled(pIn, pOut, padDims, expTileMode); + } + else if (microTileThickness != Thickness(expTileMode)) + { + // + // Re-compute if thickness changed since bank-height may be changed! + // + return ComputeSurfaceInfoMacroTiled(pIn, pOut, padDims, expTileMode); + } + } + + paddedPitch = expPitch; + paddedHeight = expHeight; + + // + // Re-cal alignment + // + if (expTileMode != origTileMode) // Tile mode is changed but still macro-tiled + { + valid = ComputeSurfaceAlignmentsMacroTiled(expTileMode, + pIn->bpp, + pIn->flags, + pIn->mipLevel, + numSamples, + pOut); + } + + // + // Do padding + // + PadDimensions(expTileMode, + pIn->bpp, + pIn->flags, + numSamples, + pOut->pTileInfo, + padDims, + pIn->mipLevel, + &paddedPitch, &pOut->pitchAlign, + &paddedHeight, pOut->heightAlign, + &expNumSlices, microTileThickness); + + if (pIn->flags.qbStereo && + (pOut->pStereoInfo != NULL)) + { + UINT_32 stereoHeightAlign = HwlStereoCheckRightOffsetPadding(pOut->pTileInfo); + + if (stereoHeightAlign != 0) + { + paddedHeight = PowTwoAlign(paddedHeight, stereoHeightAlign); + } + } + + if ((pIn->flags.needEquation == TRUE) && + (m_chipFamily == ADDR_CHIP_FAMILY_SI) && + (pIn->numMipLevels > 1) && + (pIn->mipLevel == 0)) + { + BOOL_32 convertTo1D = FALSE; + + ADDR_ASSERT(Thickness(expTileMode) == 1); + + for (UINT_32 i = 1; i < pIn->numMipLevels; i++) + { + UINT_32 mipPitch = Max(1u, paddedPitch >> i); + UINT_32 mipHeight = Max(1u, pIn->height >> i); + UINT_32 mipSlices = pIn->flags.volume ? + Max(1u, pIn->numSlices >> i) : pIn->numSlices; + expTileMode = ComputeSurfaceMipLevelTileMode(expTileMode, + pIn->bpp, + mipPitch, + mipHeight, + mipSlices, + numSamples, + pOut->blockWidth, + pOut->blockHeight, + pOut->pTileInfo); + + if (IsMacroTiled(expTileMode)) + { + if (PowTwoAlign(mipPitch, pOut->blockWidth) != + PowTwoAlign(mipPitch, pOut->pitchAlign)) + { + convertTo1D = TRUE; + break; + } + } + else + { + break; + } + } + + if (convertTo1D) + { + return ComputeSurfaceInfoMicroTiled(pIn, pOut, padDims, ADDR_TM_1D_TILED_THIN1); + } + } + + pOut->pitch = paddedPitch; + // Put this check right here to workaround special mipmap cases which the original height + // is needed. + // The original height is pre-stored in pOut->height in PostComputeMipLevel and + // pOut->pitch is needed in HwlCheckLastMacroTiledLvl, too. + if (m_configFlags.checkLast2DLevel && (numSamples == 1)) // Don't check MSAA + { + // Set a TRUE in pOut if next Level is the first 1D sub level + HwlCheckLastMacroTiledLvl(pIn, pOut); + } + pOut->height = paddedHeight; + + pOut->depth = expNumSlices; + + // + // Compute the size of a slice. + // + bytesPerSlice = BITS_TO_BYTES(static_cast(paddedPitch) * + paddedHeight * NextPow2(pIn->bpp) * numSamples); + + pOut->surfSize = bytesPerSlice * expNumSlices; + + pOut->tileMode = expTileMode; + + pOut->depthAlign = microTileThickness; + + } // if (valid) + + return valid; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceAlignmentsLinear +* +* @brief +* Compute linear surface alignment, calculation results are returned through +* output parameters. +* +* @return +* TRUE if no error occurs +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::ComputeSurfaceAlignmentsLinear( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32* pBaseAlign, ///< [out] base address alignment in bytes + UINT_32* pPitchAlign, ///< [out] pitch alignment in pixels + UINT_32* pHeightAlign ///< [out] height alignment in pixels + ) const +{ + BOOL_32 valid = TRUE; + + switch (tileMode) + { + case ADDR_TM_LINEAR_GENERAL: + // + // The required base alignment and pitch and height granularities is to 1 element. + // + *pBaseAlign = (bpp > 8) ? bpp / 8 : 1; + *pPitchAlign = 1; + *pHeightAlign = 1; + break; + case ADDR_TM_LINEAR_ALIGNED: + // + // The required alignment for base is the pipe interleave size. + // The required granularity for pitch is hwl dependent. + // The required granularity for height is one row. + // + *pBaseAlign = m_pipeInterleaveBytes; + *pPitchAlign = HwlGetPitchAlignmentLinear(bpp, flags); + *pHeightAlign = 1; + break; + default: + *pBaseAlign = 1; + *pPitchAlign = 1; + *pHeightAlign = 1; + ADDR_UNHANDLED_CASE(); + break; + } + + AdjustPitchAlignment(flags, pPitchAlign); + + return valid; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceAlignmentsMicroTiled +* +* @brief +* Compute 1D tiled surface alignment, calculation results are returned through +* output parameters. +* +* @return +* TRUE if no error occurs +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::ComputeSurfaceAlignmentsMicroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 mipLevel, ///< [in] mip level + UINT_32 numSamples, ///< [in] number of samples + UINT_32* pBaseAlign, ///< [out] base address alignment in bytes + UINT_32* pPitchAlign, ///< [out] pitch alignment in pixels + UINT_32* pHeightAlign ///< [out] height alignment in pixels + ) const +{ + BOOL_32 valid = TRUE; + + // + // The required alignment for base is the pipe interleave size. + // + *pBaseAlign = m_pipeInterleaveBytes; + + *pPitchAlign = HwlGetPitchAlignmentMicroTiled(tileMode, bpp, flags, numSamples); + + *pHeightAlign = MicroTileHeight; + + AdjustPitchAlignment(flags, pPitchAlign); + + if (flags.czDispCompatible && (mipLevel == 0)) + { + *pBaseAlign = PowTwoAlign(*pBaseAlign, 4096); //Base address MOD 4096 = 0 + *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 / (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0 + } + // end Carrizo workaround for 1D tilling + + return valid; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlReduceBankWidthHeight +* +* @brief +* Additional checks, reduce bankHeight/bankWidth if needed and possible +* tileSize*BANK_WIDTH*BANK_HEIGHT <= ROW_SIZE +* +* @return +* TRUE if no error occurs +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::HwlReduceBankWidthHeight( + UINT_32 tileSize, ///< [in] tile size + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + UINT_32 bankHeightAlign, ///< [in] bank height alignment + UINT_32 pipes, ///< [in] pipes + ADDR_TILEINFO* pTileInfo ///< [in,out] bank structure. + ) const +{ + UINT_32 macroAspectAlign; + BOOL_32 valid = TRUE; + + if (tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize) + { + BOOL_32 stillGreater = TRUE; + + // Try reducing bankWidth first + if (stillGreater && pTileInfo->bankWidth > 1) + { + while (stillGreater && pTileInfo->bankWidth > 0) + { + pTileInfo->bankWidth >>= 1; + + if (pTileInfo->bankWidth == 0) + { + pTileInfo->bankWidth = 1; + break; + } + + stillGreater = + tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; + } + + // bankWidth is reduced above, so we need to recalculate bankHeight and ratio + bankHeightAlign = Max(1u, + m_pipeInterleaveBytes * m_bankInterleave / + (tileSize * pTileInfo->bankWidth) + ); + + // We cannot increase bankHeight so just assert this case. + ADDR_ASSERT((pTileInfo->bankHeight % bankHeightAlign) == 0); + + if (numSamples == 1) + { + macroAspectAlign = Max(1u, + m_pipeInterleaveBytes * m_bankInterleave / + (tileSize * pipes * pTileInfo->bankWidth) + ); + pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, + macroAspectAlign); + } + } + + // Early quit bank_height degradation for "64" bit z buffer + if (flags.depth && bpp >= 64) + { + stillGreater = FALSE; + } + + // Then try reducing bankHeight + if (stillGreater && pTileInfo->bankHeight > bankHeightAlign) + { + while (stillGreater && pTileInfo->bankHeight > bankHeightAlign) + { + pTileInfo->bankHeight >>= 1; + + if (pTileInfo->bankHeight < bankHeightAlign) + { + pTileInfo->bankHeight = bankHeightAlign; + break; + } + + stillGreater = + tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; + } + } + + valid = !stillGreater; + + // Generate a warning if we still fail to meet this constraint + if (valid == FALSE) + { + ADDR_WARN( + 0, ("TILE_SIZE(%d)*BANK_WIDTH(%d)*BANK_HEIGHT(%d) <= ROW_SIZE(%d)", + tileSize, pTileInfo->bankWidth, pTileInfo->bankHeight, m_rowSize)); + } + } + + return valid; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceAlignmentsMacroTiled +* +* @brief +* Compute 2D tiled surface alignment, calculation results are returned through +* output parameters. +* +* @return +* TRUE if no error occurs +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::ComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 mipLevel, ///< [in] mip level + UINT_32 numSamples, ///< [in] number of samples + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in,out] Surface output + ) const +{ + ADDR_TILEINFO* pTileInfo = pOut->pTileInfo; + + BOOL_32 valid = SanityCheckMacroTiled(pTileInfo); + + if (valid) + { + UINT_32 macroTileWidth; + UINT_32 macroTileHeight; + + UINT_32 tileSize; + UINT_32 bankHeightAlign; + UINT_32 macroAspectAlign; + + UINT_32 thickness = Thickness(tileMode); + UINT_32 pipes = HwlGetPipes(pTileInfo); + + // + // Align bank height first according to latest h/w spec + // + + // tile_size = MIN(tile_split, 64 * tile_thickness * element_bytes * num_samples) + tileSize = Min(pTileInfo->tileSplitBytes, + BITS_TO_BYTES(64 * thickness * bpp * numSamples)); + + // bank_height_align = + // MAX(1, (pipe_interleave_bytes * bank_interleave)/(tile_size*bank_width)) + bankHeightAlign = Max(1u, + m_pipeInterleaveBytes * m_bankInterleave / + (tileSize * pTileInfo->bankWidth) + ); + + pTileInfo->bankHeight = PowTwoAlign(pTileInfo->bankHeight, bankHeightAlign); + + // num_pipes * bank_width * macro_tile_aspect >= + // (pipe_interleave_size * bank_interleave) / tile_size + if (numSamples == 1) + { + // this restriction is only for mipmap (mipmap's numSamples must be 1) + macroAspectAlign = Max(1u, + m_pipeInterleaveBytes * m_bankInterleave / + (tileSize * pipes * pTileInfo->bankWidth) + ); + pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, macroAspectAlign); + } + + valid = HwlReduceBankWidthHeight(tileSize, + bpp, + flags, + numSamples, + bankHeightAlign, + pipes, + pTileInfo); + + // + // The required granularity for pitch is the macro tile width. + // + macroTileWidth = MicroTileWidth * pTileInfo->bankWidth * pipes * + pTileInfo->macroAspectRatio; + + pOut->pitchAlign = macroTileWidth; + pOut->blockWidth = macroTileWidth; + + AdjustPitchAlignment(flags, &pOut->pitchAlign); + + // + // The required granularity for height is the macro tile height. + // + macroTileHeight = MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / + pTileInfo->macroAspectRatio; + + pOut->heightAlign = macroTileHeight; + pOut->blockHeight = macroTileHeight; + + // + // Compute base alignment + // + pOut->baseAlign = + pipes * pTileInfo->bankWidth * pTileInfo->banks * pTileInfo->bankHeight * tileSize; + + HwlComputeSurfaceAlignmentsMacroTiled(tileMode, bpp, flags, mipLevel, numSamples, pOut); + } + + return valid; +} + +/** +**************************************************************************************************** +* EgBasedLib::SanityCheckMacroTiled +* +* @brief +* Check if macro-tiled parameters are valid +* @return +* TRUE if valid +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::SanityCheckMacroTiled( + ADDR_TILEINFO* pTileInfo ///< [in] macro-tiled parameters + ) const +{ + BOOL_32 valid = TRUE; + ASSERTED UINT_32 numPipes = HwlGetPipes(pTileInfo); + + switch (pTileInfo->banks) + { + case 2: //fall through + case 4: //fall through + case 8: //fall through + case 16: + break; + default: + valid = FALSE; + break; + + } + + if (valid) + { + switch (pTileInfo->bankWidth) + { + case 1: //fall through + case 2: //fall through + case 4: //fall through + case 8: + break; + default: + valid = FALSE; + break; + } + } + + if (valid) + { + switch (pTileInfo->bankHeight) + { + case 1: //fall through + case 2: //fall through + case 4: //fall through + case 8: + break; + default: + valid = FALSE; + break; + } + } + + if (valid) + { + switch (pTileInfo->macroAspectRatio) + { + case 1: //fall through + case 2: //fall through + case 4: //fall through + case 8: + break; + default: + valid = FALSE; + break; + } + } + + if (valid) + { + if (pTileInfo->banks < pTileInfo->macroAspectRatio) + { + // This will generate macro tile height <= 1 + valid = FALSE; + } + } + + if (valid) + { + if (pTileInfo->tileSplitBytes > m_rowSize) + { + ADDR_WARN(0, ("tileSplitBytes is bigger than row size")); + } + } + + if (valid) + { + valid = HwlSanityCheckMacroTiled(pTileInfo); + } + + ADDR_ASSERT(valid == TRUE); + + // Add this assert for guidance + ADDR_ASSERT(numPipes * pTileInfo->banks >= 4); + + return valid; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceMipLevelTileMode +* +* @brief +* Compute valid tile mode for surface mipmap sub-levels +* +* @return +* Suitable tile mode +**************************************************************************************************** +*/ +AddrTileMode EgBasedLib::ComputeSurfaceMipLevelTileMode( + AddrTileMode baseTileMode, ///< [in] base tile mode + UINT_32 bpp, ///< [in] bits per pixels + UINT_32 pitch, ///< [in] current level pitch + UINT_32 height, ///< [in] current level height + UINT_32 numSlices, ///< [in] current number of slices + UINT_32 numSamples, ///< [in] number of samples + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32 heightAlign, ///< [in] height alignment + ADDR_TILEINFO* pTileInfo ///< [in] ptr to bank structure + ) const +{ + UINT_64 bytesPerSlice; + (void)bytesPerSlice; + UINT_32 bytesPerTile; + + AddrTileMode expTileMode = baseTileMode; + UINT_32 microTileThickness = Thickness(expTileMode); + UINT_32 interleaveSize = m_pipeInterleaveBytes * m_bankInterleave; + + // + // Compute the size of a slice. + // + bytesPerSlice = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); + bytesPerTile = BITS_TO_BYTES(MicroTilePixels * microTileThickness * NextPow2(bpp) * numSamples); + + // + // Reduce tiling mode from thick to thin if the number of slices is less than the + // micro tile thickness. + // + if (numSlices < microTileThickness) + { + expTileMode = HwlDegradeThickTileMode(expTileMode, numSlices, &bytesPerTile); + } + + if (bytesPerTile > pTileInfo->tileSplitBytes) + { + bytesPerTile = pTileInfo->tileSplitBytes; + } + + UINT_32 threshold1 = + bytesPerTile * HwlGetPipes(pTileInfo) * pTileInfo->bankWidth * pTileInfo->macroAspectRatio; + + UINT_32 threshold2 = + bytesPerTile * pTileInfo->bankWidth * pTileInfo->bankHeight; + + // + // Reduce the tile mode from 2D/3D to 1D in following conditions + // + switch (expTileMode) + { + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THIN1: + case ADDR_TM_PRT_TILED_THIN1: + case ADDR_TM_PRT_2D_TILED_THIN1: + case ADDR_TM_PRT_3D_TILED_THIN1: + if ((pitch < pitchAlign) || + (height < heightAlign) || + (interleaveSize > threshold1) || + (interleaveSize > threshold2)) + { + expTileMode = ADDR_TM_1D_TILED_THIN1; + } + break; + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_THICK: + case ADDR_TM_2D_TILED_XTHICK: + case ADDR_TM_3D_TILED_XTHICK: + case ADDR_TM_PRT_TILED_THICK: + case ADDR_TM_PRT_2D_TILED_THICK: + case ADDR_TM_PRT_3D_TILED_THICK: + if ((pitch < pitchAlign) || + (height < heightAlign)) + { + expTileMode = ADDR_TM_1D_TILED_THICK; + } + break; + default: + break; + } + + return expTileMode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlGetAlignmentInfoMacroTiled +* @brief +* Get alignment info for giving tile mode +* @return +* TRUE if getting alignment is OK +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::HwlGetAlignmentInfoMacroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] create surface info + UINT_32* pPitchAlign, ///< [out] pitch alignment + UINT_32* pHeightAlign, ///< [out] height alignment + UINT_32* pSizeAlign ///< [out] size alignment + ) const +{ + BOOL_32 valid = TRUE; + + ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); + + UINT_32 numSamples = (pIn->numFrags == 0) ? pIn->numSamples : pIn->numFrags; + + ADDR_ASSERT(pIn->pTileInfo); + ADDR_TILEINFO tileInfo = *pIn->pTileInfo; + ADDR_COMPUTE_SURFACE_INFO_OUTPUT out = {0}; + out.pTileInfo = &tileInfo; + + if (UseTileIndex(pIn->tileIndex)) + { + out.tileIndex = pIn->tileIndex; + out.macroModeIndex = TileIndexInvalid; + } + + HwlSetupTileInfo(pIn->tileMode, + pIn->flags, + pIn->bpp, + pIn->width, + pIn->height, + numSamples, + &tileInfo, + &tileInfo, + pIn->tileType, + &out); + + valid = ComputeSurfaceAlignmentsMacroTiled(pIn->tileMode, + pIn->bpp, + pIn->flags, + pIn->mipLevel, + numSamples, + &out); + + if (valid) + { + *pPitchAlign = out.pitchAlign; + *pHeightAlign = out.heightAlign; + *pSizeAlign = out.baseAlign; + } + + return valid; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlDegradeThickTileMode +* +* @brief +* Degrades valid tile mode for thick modes if needed +* +* @return +* Suitable tile mode +**************************************************************************************************** +*/ +AddrTileMode EgBasedLib::HwlDegradeThickTileMode( + AddrTileMode baseTileMode, ///< [in] base tile mode + UINT_32 numSlices, ///< [in] current number of slices + UINT_32* pBytesPerTile ///< [in,out] pointer to bytes per slice + ) const +{ + ADDR_ASSERT(numSlices < Thickness(baseTileMode)); + // if pBytesPerTile is NULL, this is a don't-care.... + UINT_32 bytesPerTile = pBytesPerTile != NULL ? *pBytesPerTile : 64; + + AddrTileMode expTileMode = baseTileMode; + switch (baseTileMode) + { + case ADDR_TM_1D_TILED_THICK: + expTileMode = ADDR_TM_1D_TILED_THIN1; + bytesPerTile >>= 2; + break; + case ADDR_TM_2D_TILED_THICK: + expTileMode = ADDR_TM_2D_TILED_THIN1; + bytesPerTile >>= 2; + break; + case ADDR_TM_3D_TILED_THICK: + expTileMode = ADDR_TM_3D_TILED_THIN1; + bytesPerTile >>= 2; + break; + case ADDR_TM_2D_TILED_XTHICK: + if (numSlices < ThickTileThickness) + { + expTileMode = ADDR_TM_2D_TILED_THIN1; + bytesPerTile >>= 3; + } + else + { + expTileMode = ADDR_TM_2D_TILED_THICK; + bytesPerTile >>= 1; + } + break; + case ADDR_TM_3D_TILED_XTHICK: + if (numSlices < ThickTileThickness) + { + expTileMode = ADDR_TM_3D_TILED_THIN1; + bytesPerTile >>= 3; + } + else + { + expTileMode = ADDR_TM_3D_TILED_THICK; + bytesPerTile >>= 1; + } + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + if (pBytesPerTile != NULL) + { + *pBytesPerTile = bytesPerTile; + } + + return expTileMode; +} + +/** +**************************************************************************************************** +* EgBasedLib::DispatchComputeSurfaceAddrFromCoord +* +* @brief +* Compute surface address from given coord (x, y, slice,sample) +* +* @return +* Address in bytes +**************************************************************************************************** +*/ +UINT_64 EgBasedLib::DispatchComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + UINT_32 x = pIn->x; + UINT_32 y = pIn->y; + UINT_32 slice = pIn->slice; + UINT_32 sample = pIn->sample; + UINT_32 bpp = pIn->bpp; + UINT_32 pitch = pIn->pitch; + UINT_32 height = pIn->height; + UINT_32 numSlices = pIn->numSlices; + UINT_32 numSamples = ((pIn->numSamples == 0) ? 1 : pIn->numSamples); + UINT_32 numFrags = ((pIn->numFrags == 0) ? numSamples : pIn->numFrags); + AddrTileMode tileMode = pIn->tileMode; + AddrTileType microTileType = pIn->tileType; + BOOL_32 ignoreSE = pIn->ignoreSE; + BOOL_32 isDepthSampleOrder = pIn->isDepth; + ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; + + UINT_32* pBitPosition = &pOut->bitPosition; + UINT_64 addr; + + // ADDR_DEPTH_SAMPLE_ORDER = non-disp + depth-sample-order + if (microTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + isDepthSampleOrder = TRUE; + } + + if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) + { + if (numFrags != numSamples) + { + numSamples = numFrags; + ADDR_ASSERT(sample < numSamples); + } + + /// @note + /// 128 bit/thick tiled surface doesn't support display tiling and + /// mipmap chain must have the same tileType, so please fill tileType correctly + if (IsLinear(pIn->tileMode) == FALSE) + { + if (bpp >= 128 || Thickness(tileMode) > 1) + { + ADDR_ASSERT(microTileType != ADDR_DISPLAYABLE); + } + } + } + + switch (tileMode) + { + case ADDR_TM_LINEAR_GENERAL://fall through + case ADDR_TM_LINEAR_ALIGNED: + addr = ComputeSurfaceAddrFromCoordLinear(x, + y, + slice, + sample, + bpp, + pitch, + height, + numSlices, + pBitPosition); + break; + case ADDR_TM_1D_TILED_THIN1://fall through + case ADDR_TM_1D_TILED_THICK: + addr = ComputeSurfaceAddrFromCoordMicroTiled(x, + y, + slice, + sample, + bpp, + pitch, + height, + numSamples, + tileMode, + microTileType, + isDepthSampleOrder, + pBitPosition); + break; + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_2D_TILED_XTHICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: //fall through + case ADDR_TM_PRT_TILED_THIN1: //fall through + case ADDR_TM_PRT_2D_TILED_THIN1://fall through + case ADDR_TM_PRT_3D_TILED_THIN1://fall through + case ADDR_TM_PRT_TILED_THICK: //fall through + case ADDR_TM_PRT_2D_TILED_THICK://fall through + case ADDR_TM_PRT_3D_TILED_THICK: + UINT_32 pipeSwizzle; + UINT_32 bankSwizzle; + + if (m_configFlags.useCombinedSwizzle) + { + ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, + &bankSwizzle, &pipeSwizzle); + } + else + { + pipeSwizzle = pIn->pipeSwizzle; + bankSwizzle = pIn->bankSwizzle; + } + + addr = ComputeSurfaceAddrFromCoordMacroTiled(x, + y, + slice, + sample, + bpp, + pitch, + height, + numSamples, + tileMode, + microTileType, + ignoreSE, + isDepthSampleOrder, + pipeSwizzle, + bankSwizzle, + pTileInfo, + pBitPosition); + break; + default: + addr = 0; + ADDR_ASSERT_ALWAYS(); + break; + } + + return addr; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeMacroTileEquation +* +* @brief +* Computes the address equation in macro tile +* @return +* If equation can be computed +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::ComputeMacroTileEquation( + UINT_32 log2BytesPP, ///< [in] log2 of bytes per pixel + AddrTileMode tileMode, ///< [in] tile mode + AddrTileType microTileType, ///< [in] micro tiling type + ADDR_TILEINFO* pTileInfo, ///< [in] bank structure + ADDR_EQUATION* pEquation ///< [out] Equation for addressing in macro tile + ) const +{ + ADDR_E_RETURNCODE retCode; + + // Element equation within a tile + retCode = ComputeMicroTileEquation(log2BytesPP, tileMode, microTileType, pEquation); + + if (retCode == ADDR_OK) + { + // Tile equesiton with signle pipe bank + UINT_32 numPipes = HwlGetPipes(pTileInfo); + UINT_32 numPipeBits = Log2(numPipes); + + for (UINT_32 i = 0; i < Log2(pTileInfo->bankWidth); i++) + { + pEquation->addr[pEquation->numBits].valid = 1; + pEquation->addr[pEquation->numBits].channel = 0; + pEquation->addr[pEquation->numBits].index = i + log2BytesPP + 3 + numPipeBits; + pEquation->numBits++; + } + + for (UINT_32 i = 0; i < Log2(pTileInfo->bankHeight); i++) + { + pEquation->addr[pEquation->numBits].valid = 1; + pEquation->addr[pEquation->numBits].channel = 1; + pEquation->addr[pEquation->numBits].index = i + 3; + pEquation->numBits++; + } + + ADDR_EQUATION equation; + memset(&equation, 0, sizeof(ADDR_EQUATION)); + + UINT_32 thresholdX = 32; + UINT_32 thresholdY = 32; + + if (IsPrtNoRotationTileMode(tileMode)) + { + UINT_32 macroTilePitch = + (MicroTileWidth * pTileInfo->bankWidth * numPipes) * pTileInfo->macroAspectRatio; + UINT_32 macroTileHeight = + (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / + pTileInfo->macroAspectRatio; + thresholdX = Log2(macroTilePitch); + thresholdY = Log2(macroTileHeight); + } + + // Pipe equation + retCode = ComputePipeEquation(log2BytesPP, thresholdX, thresholdY, pTileInfo, &equation); + + if (retCode == ADDR_OK) + { + UINT_32 pipeBitStart = Log2(m_pipeInterleaveBytes); + + if (pEquation->numBits > pipeBitStart) + { + UINT_32 numLeftShift = pEquation->numBits - pipeBitStart; + + for (UINT_32 i = 0; i < numLeftShift; i++) + { + pEquation->addr[pEquation->numBits + equation.numBits - i - 1] = + pEquation->addr[pEquation->numBits - i - 1]; + pEquation->xor1[pEquation->numBits + equation.numBits - i - 1] = + pEquation->xor1[pEquation->numBits - i - 1]; + pEquation->xor2[pEquation->numBits + equation.numBits - i - 1] = + pEquation->xor2[pEquation->numBits - i - 1]; + } + } + + for (UINT_32 i = 0; i < equation.numBits; i++) + { + pEquation->addr[pipeBitStart + i] = equation.addr[i]; + pEquation->xor1[pipeBitStart + i] = equation.xor1[i]; + pEquation->xor2[pipeBitStart + i] = equation.xor2[i]; + pEquation->numBits++; + } + + // Bank equation + memset(&equation, 0, sizeof(ADDR_EQUATION)); + + retCode = ComputeBankEquation(log2BytesPP, thresholdX, thresholdY, + pTileInfo, &equation); + + if (retCode == ADDR_OK) + { + UINT_32 bankBitStart = pipeBitStart + numPipeBits + Log2(m_bankInterleave); + + if (pEquation->numBits > bankBitStart) + { + UINT_32 numLeftShift = pEquation->numBits - bankBitStart; + + for (UINT_32 i = 0; i < numLeftShift; i++) + { + pEquation->addr[pEquation->numBits + equation.numBits - i - 1] = + pEquation->addr[pEquation->numBits - i - 1]; + pEquation->xor1[pEquation->numBits + equation.numBits - i - 1] = + pEquation->xor1[pEquation->numBits - i - 1]; + pEquation->xor2[pEquation->numBits + equation.numBits - i - 1] = + pEquation->xor2[pEquation->numBits - i - 1]; + } + } + + for (UINT_32 i = 0; i < equation.numBits; i++) + { + pEquation->addr[bankBitStart + i] = equation.addr[i]; + pEquation->xor1[bankBitStart + i] = equation.xor1[i]; + pEquation->xor2[bankBitStart + i] = equation.xor2[i]; + pEquation->numBits++; + } + } + } + } + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceAddrFromCoordMicroTiled +* +* @brief +* Computes the surface address and bit position from a +* coordinate for 2D tilied (macro tiled) +* @return +* The byte address +**************************************************************************************************** +*/ +UINT_64 EgBasedLib::ComputeSurfaceAddrFromCoordMacroTiled( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 sample, ///< [in] sample index + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] surface pitch, in pixels + UINT_32 height, ///< [in] surface height, in pixels + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + AddrTileType microTileType, ///< [in] micro tiling type + BOOL_32 ignoreSE, ///< [in] TRUE if shader enginers can be ignored + BOOL_32 isDepthSampleOrder, ///< [in] TRUE if it depth sample ordering is used + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + UINT_32 bankSwizzle, ///< [in] bank swizzle + ADDR_TILEINFO* pTileInfo, ///< [in] bank structure + /// **All fields to be valid on entry** + UINT_32* pBitPosition ///< [out] bit position, e.g. FMT_1 will use this + ) const +{ + UINT_64 addr; + + UINT_32 microTileBytes; + UINT_32 microTileBits; + UINT_32 sampleOffset; + UINT_32 pixelIndex; + UINT_32 pixelOffset; + UINT_32 elementOffset; + UINT_32 tileSplitSlice; + UINT_32 pipe; + UINT_32 bank; + UINT_64 sliceBytes; + UINT_64 sliceOffset; + UINT_32 macroTilePitch; + UINT_32 macroTileHeight; + UINT_32 macroTilesPerRow; + UINT_32 macroTilesPerSlice; + UINT_64 macroTileBytes; + UINT_32 macroTileIndexX; + UINT_32 macroTileIndexY; + UINT_64 macroTileOffset; + UINT_64 totalOffset; + UINT_64 pipeInterleaveMask; + UINT_64 bankInterleaveMask; + UINT_64 pipeInterleaveOffset; + UINT_32 bankInterleaveOffset; + UINT_64 offset; + UINT_32 tileRowIndex; + UINT_32 tileColumnIndex; + UINT_32 tileIndex; + UINT_32 tileOffset; + + UINT_32 microTileThickness = Thickness(tileMode); + + // + // Compute the number of group, pipe, and bank bits. + // + UINT_32 numPipes = HwlGetPipes(pTileInfo); + UINT_32 numPipeInterleaveBits = Log2(m_pipeInterleaveBytes); + UINT_32 numPipeBits = Log2(numPipes); + UINT_32 numBankInterleaveBits = Log2(m_bankInterleave); + UINT_32 numBankBits = Log2(pTileInfo->banks); + + // + // Compute the micro tile size. + // + microTileBits = MicroTilePixels * microTileThickness * bpp * numSamples; + + microTileBytes = microTileBits / 8; + // + // Compute the pixel index within the micro tile. + // + pixelIndex = ComputePixelIndexWithinMicroTile(x, + y, + slice, + bpp, + tileMode, + microTileType); + + // + // Compute the sample offset and pixel offset. + // + if (isDepthSampleOrder) + { + // + // For depth surfaces, samples are stored contiguously for each element, so the sample + // offset is the sample number times the element size. + // + sampleOffset = sample * bpp; + pixelOffset = pixelIndex * bpp * numSamples; + } + else + { + // + // For color surfaces, all elements for a particular sample are stored contiguously, so + // the sample offset is the sample number times the micro tile size divided yBit the number + // of samples. + // + sampleOffset = sample * (microTileBits / numSamples); + pixelOffset = pixelIndex * bpp; + } + + // + // Compute the element offset. + // + elementOffset = pixelOffset + sampleOffset; + + *pBitPosition = static_cast(elementOffset % 8); + + elementOffset /= 8; //bit-to-byte + + // + // Determine if tiles need to be split across slices. + // + // If the size of the micro tile is larger than the tile split size, then the tile will be + // split across multiple slices. + // + UINT_32 slicesPerTile = 1; + + if ((microTileBytes > pTileInfo->tileSplitBytes) && (microTileThickness == 1)) + { //don't support for thick mode + + // + // Compute the number of slices per tile. + // + slicesPerTile = microTileBytes / pTileInfo->tileSplitBytes; + + // + // Compute the tile split slice number for use in rotating the bank. + // + tileSplitSlice = elementOffset / pTileInfo->tileSplitBytes; + + // + // Adjust the element offset to account for the portion of the tile that is being moved to + // a new slice.. + // + elementOffset %= pTileInfo->tileSplitBytes; + + // + // Adjust the microTileBytes size to tileSplitBytes size since + // a new slice.. + // + microTileBytes = pTileInfo->tileSplitBytes; + } + else + { + tileSplitSlice = 0; + } + + // + // Compute macro tile pitch and height. + // + macroTilePitch = + (MicroTileWidth * pTileInfo->bankWidth * numPipes) * pTileInfo->macroAspectRatio; + macroTileHeight = + (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / pTileInfo->macroAspectRatio; + + // + // Compute the number of bytes per macro tile. Note: bytes of the same bank/pipe actually + // + macroTileBytes = + static_cast(microTileBytes) * + (macroTilePitch / MicroTileWidth) * (macroTileHeight / MicroTileHeight) / + (numPipes * pTileInfo->banks); + + // + // Compute the number of macro tiles per row. + // + macroTilesPerRow = pitch / macroTilePitch; + + // + // Compute the offset to the macro tile containing the specified coordinate. + // + macroTileIndexX = x / macroTilePitch; + macroTileIndexY = y / macroTileHeight; + macroTileOffset = ((macroTileIndexY * macroTilesPerRow) + macroTileIndexX) * macroTileBytes; + + // + // Compute the number of macro tiles per slice. + // + macroTilesPerSlice = macroTilesPerRow * (height / macroTileHeight); + + // + // Compute the slice size. + // + sliceBytes = macroTilesPerSlice * macroTileBytes; + + // + // Compute the slice offset. + // + sliceOffset = sliceBytes * (tileSplitSlice + slicesPerTile * (slice / microTileThickness)); + + // + // Compute tile offest + // + tileRowIndex = (y / MicroTileHeight) % pTileInfo->bankHeight; + tileColumnIndex = ((x / MicroTileWidth) / numPipes) % pTileInfo->bankWidth; + tileIndex = (tileRowIndex * pTileInfo->bankWidth) + tileColumnIndex; + tileOffset = tileIndex * microTileBytes; + + // + // Combine the slice offset and macro tile offset with the pixel and sample offsets, accounting + // for the pipe and bank bits in the middle of the address. + // + totalOffset = sliceOffset + macroTileOffset + elementOffset + tileOffset; + + // + // Get the pipe and bank. + // + + // when the tileMode is PRT type, then adjust x and y coordinates + if (IsPrtNoRotationTileMode(tileMode)) + { + x = x % macroTilePitch; + y = y % macroTileHeight; + } + + pipe = ComputePipeFromCoord(x, + y, + slice, + tileMode, + pipeSwizzle, + ignoreSE, + pTileInfo); + + bank = ComputeBankFromCoord(x, + y, + slice, + tileMode, + bankSwizzle, + tileSplitSlice, + pTileInfo); + + // + // Split the offset to put some bits below the pipe+bank bits and some above. + // + pipeInterleaveMask = (1 << numPipeInterleaveBits) - 1; + bankInterleaveMask = (1 << numBankInterleaveBits) - 1; + pipeInterleaveOffset = totalOffset & pipeInterleaveMask; + bankInterleaveOffset = static_cast((totalOffset >> numPipeInterleaveBits) & + bankInterleaveMask); + offset = totalOffset >> (numPipeInterleaveBits + numBankInterleaveBits); + + // + // Assemble the address from its components. + // + addr = pipeInterleaveOffset; + // This is to remove /analyze warnings + UINT_32 pipeBits = pipe << numPipeInterleaveBits; + UINT_32 bankInterleaveBits = bankInterleaveOffset << (numPipeInterleaveBits + numPipeBits); + UINT_32 bankBits = bank << (numPipeInterleaveBits + numPipeBits + + numBankInterleaveBits); + UINT_64 offsetBits = offset << (numPipeInterleaveBits + numPipeBits + + numBankInterleaveBits + numBankBits); + + addr |= pipeBits; + addr |= bankInterleaveBits; + addr |= bankBits; + addr |= offsetBits; + + return addr; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceAddrFromCoordMicroTiled +* +* @brief +* Computes the surface address and bit position from a coordinate for 1D tilied +* (micro tiled) +* @return +* The byte address +**************************************************************************************************** +*/ +UINT_64 EgBasedLib::ComputeSurfaceAddrFromCoordMicroTiled( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 sample, ///< [in] sample index + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch, in pixels + UINT_32 height, ///< [in] height, in pixels + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + AddrTileType microTileType, ///< [in] micro tiling type + BOOL_32 isDepthSampleOrder, ///< [in] TRUE if depth sample ordering is used + UINT_32* pBitPosition ///< [out] bit position, e.g. FMT_1 will use this + ) const +{ + UINT_64 addr = 0; + + UINT_32 microTileBytes; + UINT_64 sliceBytes; + UINT_32 microTilesPerRow; + UINT_32 microTileIndexX; + UINT_32 microTileIndexY; + UINT_32 microTileIndexZ; + UINT_64 sliceOffset; + UINT_64 microTileOffset; + UINT_32 sampleOffset; + UINT_32 pixelIndex; + UINT_32 pixelOffset; + + UINT_32 microTileThickness = Thickness(tileMode); + + // + // Compute the micro tile size. + // + microTileBytes = BITS_TO_BYTES(MicroTilePixels * microTileThickness * bpp * numSamples); + + // + // Compute the slice size. + // + sliceBytes = + BITS_TO_BYTES(static_cast(pitch) * height * microTileThickness * bpp * numSamples); + + // + // Compute the number of micro tiles per row. + // + microTilesPerRow = pitch / MicroTileWidth; + + // + // Compute the micro tile index. + // + microTileIndexX = x / MicroTileWidth; + microTileIndexY = y / MicroTileHeight; + microTileIndexZ = slice / microTileThickness; + + // + // Compute the slice offset. + // + sliceOffset = static_cast(microTileIndexZ) * sliceBytes; + + // + // Compute the offset to the micro tile containing the specified coordinate. + // + microTileOffset = (static_cast(microTileIndexY) * microTilesPerRow + microTileIndexX) * + microTileBytes; + + // + // Compute the pixel index within the micro tile. + // + pixelIndex = ComputePixelIndexWithinMicroTile(x, + y, + slice, + bpp, + tileMode, + microTileType); + + // Compute the sample offset. + // + if (isDepthSampleOrder) + { + // + // For depth surfaces, samples are stored contiguously for each element, so the sample + // offset is the sample number times the element size. + // + sampleOffset = sample * bpp; + pixelOffset = pixelIndex * bpp * numSamples; + } + else + { + // + // For color surfaces, all elements for a particular sample are stored contiguously, so + // the sample offset is the sample number times the micro tile size divided yBit the number + // of samples. + // + sampleOffset = sample * (microTileBytes*8 / numSamples); + pixelOffset = pixelIndex * bpp; + } + + // + // Compute the bit position of the pixel. Each element is stored with one bit per sample. + // + + UINT_32 elemOffset = sampleOffset + pixelOffset; + + *pBitPosition = elemOffset % 8; + elemOffset /= 8; + + // + // Combine the slice offset, micro tile offset, sample offset, and pixel offsets. + // + addr = sliceOffset + microTileOffset + elemOffset; + + return addr; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputePixelCoordFromOffset +* +* @brief +* Compute pixel coordinate from offset inside a micro tile +* @return +* N/A +**************************************************************************************************** +*/ +VOID EgBasedLib::HwlComputePixelCoordFromOffset( + UINT_32 offset, ///< [in] offset inside micro tile in bits + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 tileBase, ///< [in] base offset within a tile + UINT_32 compBits, ///< [in] component bits actually needed(for planar surface) + UINT_32* pX, ///< [out] x coordinate + UINT_32* pY, ///< [out] y coordinate + UINT_32* pSlice, ///< [out] slice index + UINT_32* pSample, ///< [out] sample index + AddrTileType microTileType, ///< [in] micro tiling type + BOOL_32 isDepthSampleOrder ///< [in] TRUE if depth sample order in microtile is used + ) const +{ + UINT_32 x = 0; + UINT_32 y = 0; + UINT_32 z = 0; + UINT_32 thickness = Thickness(tileMode); + + // For planar surface, we adjust offset acoording to tile base + if ((bpp != compBits) && (compBits != 0) && isDepthSampleOrder) + { + offset -= tileBase; + + ADDR_ASSERT(microTileType == ADDR_NON_DISPLAYABLE || + microTileType == ADDR_DEPTH_SAMPLE_ORDER); + + bpp = compBits; + } + + UINT_32 sampleTileBits; + UINT_32 samplePixelBits; + UINT_32 pixelIndex; + + if (isDepthSampleOrder) + { + samplePixelBits = bpp * numSamples; + pixelIndex = offset / samplePixelBits; + *pSample = (offset % samplePixelBits) / bpp; + } + else + { + sampleTileBits = MicroTilePixels * bpp * thickness; + *pSample = offset / sampleTileBits; + pixelIndex = (offset % sampleTileBits) / bpp; + } + + if (microTileType != ADDR_THICK) + { + if (microTileType == ADDR_DISPLAYABLE) // displayable + { + switch (bpp) + { + case 8: + x = pixelIndex & 0x7; + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,3),_BIT(pixelIndex,4)); + break; + case 16: + x = pixelIndex & 0x7; + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,3)); + break; + case 32: + x = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,1),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,2)); + break; + case 64: + x = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,1)); + break; + case 128: + x = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,2),_BIT(pixelIndex,1)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,0)); + break; + default: + break; + } + } + else if (microTileType == ADDR_NON_DISPLAYABLE || microTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + x = Bits2Number(3, _BIT(pixelIndex,4),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,3),_BIT(pixelIndex,1)); + } + else if (microTileType == ADDR_ROTATED) + { + /* + 8-Bit Elements + element_index[5:0] = { x[2], x[0], x[1], y[2], y[1], y[0] } + + 16-Bit Elements + element_index[5:0] = { x[2], x[1], x[0], y[2], y[1], y[0] } + + 32-Bit Elements + element_index[5:0] = { x[2], x[1], y[2], x[0], y[1], y[0] } + + 64-Bit Elements + element_index[5:0] = { y[2], x[2], x[1], y[1], x[0], y[0] } + */ + switch(bpp) + { + case 8: + x = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,3),_BIT(pixelIndex,4)); + y = pixelIndex & 0x7; + break; + case 16: + x = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,3)); + y = pixelIndex & 0x7; + break; + case 32: + x = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,2)); + y = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,1),_BIT(pixelIndex,0)); + break; + case 64: + x = Bits2Number(3, _BIT(pixelIndex,4),_BIT(pixelIndex,3),_BIT(pixelIndex,1)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + + if (thickness > 1) // thick + { + z = Bits2Number(3, _BIT(pixelIndex,8),_BIT(pixelIndex,7),_BIT(pixelIndex,6)); + } + } + else + { + ADDR_ASSERT((m_chipFamily >= ADDR_CHIP_FAMILY_CI) && (thickness > 1)); + /* + 8-Bit Elements and 16-Bit Elements + element_index[7:0] = { y[2], x[2], z[1], z[0], y[1], x[1], y[0], x[0] } + + 32-Bit Elements + element_index[7:0] = { y[2], x[2], z[1], y[1], z[0], x[1], y[0], x[0] } + + 64-Bit Elements and 128-Bit Elements + element_index[7:0] = { y[2], x[2], z[1], y[1], x[1], z[0], y[0], x[0] } + + The equation to compute the element index for the extra thick tile: + element_index[8] = z[2] + */ + switch (bpp) + { + case 8: + case 16: // fall-through + x = Bits2Number(3, _BIT(pixelIndex,6),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,7),_BIT(pixelIndex,3),_BIT(pixelIndex,1)); + z = Bits2Number(2, _BIT(pixelIndex,5),_BIT(pixelIndex,4)); + break; + case 32: + x = Bits2Number(3, _BIT(pixelIndex,6),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,7),_BIT(pixelIndex,4),_BIT(pixelIndex,1)); + z = Bits2Number(2, _BIT(pixelIndex,5),_BIT(pixelIndex,3)); + break; + case 64: + case 128: // fall-through + x = Bits2Number(3, _BIT(pixelIndex,6),_BIT(pixelIndex,3),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,7),_BIT(pixelIndex,4),_BIT(pixelIndex,1)); + z = Bits2Number(2, _BIT(pixelIndex,5),_BIT(pixelIndex,2)); + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + if (thickness == 8) + { + z += Bits2Number(3,_BIT(pixelIndex,8),0,0); + } + } + + *pX = x; + *pY = y; + *pSlice += z; +} + +/** +**************************************************************************************************** +* EgBasedLib::DispatchComputeSurfaceCoordFromAddrDispatch +* +* @brief +* Compute (x,y,slice,sample) coordinates from surface address +* @return +* N/A +**************************************************************************************************** +*/ +VOID EgBasedLib::DispatchComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + UINT_64 addr = pIn->addr; + UINT_32 bitPosition = pIn->bitPosition; + UINT_32 bpp = pIn->bpp; + UINT_32 pitch = pIn->pitch; + UINT_32 height = pIn->height; + UINT_32 numSlices = pIn->numSlices; + UINT_32 numSamples = ((pIn->numSamples == 0) ? 1 : pIn->numSamples); + UINT_32 numFrags = ((pIn->numFrags == 0) ? numSamples : pIn->numFrags); + AddrTileMode tileMode = pIn->tileMode; + UINT_32 tileBase = pIn->tileBase; + UINT_32 compBits = pIn->compBits; + AddrTileType microTileType = pIn->tileType; + BOOL_32 ignoreSE = pIn->ignoreSE; + BOOL_32 isDepthSampleOrder = pIn->isDepth; + ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; + + UINT_32* pX = &pOut->x; + UINT_32* pY = &pOut->y; + UINT_32* pSlice = &pOut->slice; + UINT_32* pSample = &pOut->sample; + + if (microTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + isDepthSampleOrder = TRUE; + } + + if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) + { + if (numFrags != numSamples) + { + numSamples = numFrags; + } + + /// @note + /// 128 bit/thick tiled surface doesn't support display tiling and + /// mipmap chain must have the same tileType, so please fill tileType correctly + if (IsLinear(pIn->tileMode) == FALSE) + { + if (bpp >= 128 || Thickness(tileMode) > 1) + { + ADDR_ASSERT(microTileType != ADDR_DISPLAYABLE); + } + } + } + + switch (tileMode) + { + case ADDR_TM_LINEAR_GENERAL://fall through + case ADDR_TM_LINEAR_ALIGNED: + ComputeSurfaceCoordFromAddrLinear(addr, + bitPosition, + bpp, + pitch, + height, + numSlices, + pX, + pY, + pSlice, + pSample); + break; + case ADDR_TM_1D_TILED_THIN1://fall through + case ADDR_TM_1D_TILED_THICK: + ComputeSurfaceCoordFromAddrMicroTiled(addr, + bitPosition, + bpp, + pitch, + height, + numSamples, + tileMode, + tileBase, + compBits, + pX, + pY, + pSlice, + pSample, + microTileType, + isDepthSampleOrder); + break; + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_2D_TILED_XTHICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: //fall through + case ADDR_TM_PRT_TILED_THIN1: //fall through + case ADDR_TM_PRT_2D_TILED_THIN1://fall through + case ADDR_TM_PRT_3D_TILED_THIN1://fall through + case ADDR_TM_PRT_TILED_THICK: //fall through + case ADDR_TM_PRT_2D_TILED_THICK://fall through + case ADDR_TM_PRT_3D_TILED_THICK: + UINT_32 pipeSwizzle; + UINT_32 bankSwizzle; + + if (m_configFlags.useCombinedSwizzle) + { + ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, + &bankSwizzle, &pipeSwizzle); + } + else + { + pipeSwizzle = pIn->pipeSwizzle; + bankSwizzle = pIn->bankSwizzle; + } + + ComputeSurfaceCoordFromAddrMacroTiled(addr, + bitPosition, + bpp, + pitch, + height, + numSamples, + tileMode, + tileBase, + compBits, + microTileType, + ignoreSE, + isDepthSampleOrder, + pipeSwizzle, + bankSwizzle, + pTileInfo, + pX, + pY, + pSlice, + pSample); + break; + default: + ADDR_ASSERT_ALWAYS(); + } +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled +* +* @brief +* Compute surface coordinates from address for macro tiled surface +* @return +* N/A +**************************************************************************************************** +*/ +VOID EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled( + UINT_64 addr, ///< [in] byte address + UINT_32 bitPosition, ///< [in] bit position + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch in pixels + UINT_32 height, ///< [in] height in pixels + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 tileBase, ///< [in] tile base offset + UINT_32 compBits, ///< [in] component bits (for planar surface) + AddrTileType microTileType, ///< [in] micro tiling type + BOOL_32 ignoreSE, ///< [in] TRUE if shader engines can be ignored + BOOL_32 isDepthSampleOrder, ///< [in] TRUE if depth sample order is used + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + UINT_32 bankSwizzle, ///< [in] bank swizzle + ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. + /// **All fields to be valid on entry** + UINT_32* pX, ///< [out] X coord + UINT_32* pY, ///< [out] Y coord + UINT_32* pSlice, ///< [out] slice index + UINT_32* pSample ///< [out] sample index + ) const +{ + UINT_32 mx; + UINT_32 my; + UINT_64 tileBits; + UINT_64 macroTileBits; + UINT_32 slices; + UINT_32 tileSlices; + UINT_64 elementOffset; + UINT_64 macroTileIndex; + UINT_32 tileIndex; + UINT_64 totalOffset; + + UINT_32 bank; + UINT_32 pipe; + UINT_32 groupBits = m_pipeInterleaveBytes << 3; + UINT_32 pipes = HwlGetPipes(pTileInfo); + UINT_32 banks = pTileInfo->banks; + + UINT_32 bankInterleave = m_bankInterleave; + + UINT_64 addrBits = BYTES_TO_BITS(addr) + bitPosition; + + // + // remove bits for bank and pipe + // + totalOffset = (addrBits % groupBits) + + (((addrBits / groupBits / pipes) % bankInterleave) * groupBits) + + (((addrBits / groupBits / pipes) / bankInterleave) / banks) * groupBits * bankInterleave; + + UINT_32 microTileThickness = Thickness(tileMode); + + UINT_32 microTileBits = bpp * microTileThickness * MicroTilePixels * numSamples; + + UINT_32 microTileBytes = BITS_TO_BYTES(microTileBits); + // + // Determine if tiles need to be split across slices. + // + // If the size of the micro tile is larger than the tile split size, then the tile will be + // split across multiple slices. + // + UINT_32 slicesPerTile = 1; //_State->TileSlices + + if ((microTileBytes > pTileInfo->tileSplitBytes) && (microTileThickness == 1)) + { //don't support for thick mode + + // + // Compute the number of slices per tile. + // + slicesPerTile = microTileBytes / pTileInfo->tileSplitBytes; + } + + tileBits = microTileBits / slicesPerTile; // micro tile bits + + // in micro tiles because not MicroTileWidth timed. + UINT_32 macroWidth = pTileInfo->bankWidth * pipes * pTileInfo->macroAspectRatio; + // in micro tiles as well + UINT_32 macroHeight = pTileInfo->bankHeight * banks / pTileInfo->macroAspectRatio; + + UINT_32 pitchInMacroTiles = pitch / MicroTileWidth / macroWidth; + + macroTileBits = (macroWidth * macroHeight) * tileBits / (banks * pipes); + + macroTileIndex = totalOffset / macroTileBits; + + // pitchMacros * height / heightMacros; macroTilesPerSlice == _State->SliceMacros + UINT_32 macroTilesPerSlice = (pitch / (macroWidth * MicroTileWidth)) * height / + (macroHeight * MicroTileWidth); + + slices = static_cast(macroTileIndex / macroTilesPerSlice); + + *pSlice = static_cast(slices / slicesPerTile * microTileThickness); + + // + // calculate element offset and x[2:0], y[2:0], z[1:0] for thick + // + tileSlices = slices % slicesPerTile; + + elementOffset = tileSlices * tileBits; + elementOffset += totalOffset % tileBits; + + UINT_32 coordZ = 0; + + HwlComputePixelCoordFromOffset(static_cast(elementOffset), + bpp, + numSamples, + tileMode, + tileBase, + compBits, + pX, + pY, + &coordZ, + pSample, + microTileType, + isDepthSampleOrder); + + macroTileIndex = macroTileIndex % macroTilesPerSlice; + *pY += static_cast(macroTileIndex / pitchInMacroTiles * macroHeight * MicroTileHeight); + *pX += static_cast(macroTileIndex % pitchInMacroTiles * macroWidth * MicroTileWidth); + + *pSlice += coordZ; + + tileIndex = static_cast((totalOffset % macroTileBits) / tileBits); + + my = (tileIndex / pTileInfo->bankWidth) % pTileInfo->bankHeight * MicroTileHeight; + mx = (tileIndex % pTileInfo->bankWidth) * pipes * MicroTileWidth; + + *pY += my; + *pX += mx; + + bank = ComputeBankFromAddr(addr, banks, pipes); + pipe = ComputePipeFromAddr(addr, pipes); + + HwlComputeSurfaceCoord2DFromBankPipe(tileMode, + pX, + pY, + *pSlice, + bank, + pipe, + bankSwizzle, + pipeSwizzle, + tileSlices, + ignoreSE, + pTileInfo); +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSurfaceCoord2DFromBankPipe +* +* @brief +* Compute surface x,y coordinates from bank/pipe info +* @return +* N/A +**************************************************************************************************** +*/ +VOID EgBasedLib::ComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 bank, ///< [in] bank number + UINT_32 pipe, ///< [in] pipe number + UINT_32 bankSwizzle,///< [in] bank swizzle + UINT_32 pipeSwizzle,///< [in] pipe swizzle + UINT_32 tileSlices, ///< [in] slices in a micro tile + ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. **All fields to be valid on entry** + CoordFromBankPipe* pOutput ///< [out] pointer to extracted x/y bits + ) const +{ + UINT_32 yBit3 = 0; + UINT_32 yBit4 = 0; + UINT_32 yBit5 = 0; + UINT_32 yBit6 = 0; + + UINT_32 xBit3 = 0; + UINT_32 xBit4 = 0; + UINT_32 xBit5 = 0; + + UINT_32 tileSplitRotation; + + UINT_32 numPipes = HwlGetPipes(pTileInfo); + + UINT_32 bankRotation = ComputeBankRotation(tileMode, + pTileInfo->banks, numPipes); + + UINT_32 pipeRotation = ComputePipeRotation(tileMode, numPipes); + + UINT_32 xBit = x / (MicroTileWidth * pTileInfo->bankWidth * numPipes); + UINT_32 yBit = y / (MicroTileHeight * pTileInfo->bankHeight); + + //calculate the bank and pipe before rotation and swizzle + + switch (tileMode) + { + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_2D_TILED_XTHICK: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: + tileSplitRotation = ((pTileInfo->banks / 2) + 1); + break; + default: + tileSplitRotation = 0; + break; + } + + UINT_32 microTileThickness = Thickness(tileMode); + + bank ^= tileSplitRotation * tileSlices; + if (pipeRotation == 0) + { + bank ^= bankRotation * (slice / microTileThickness) + bankSwizzle; + bank %= pTileInfo->banks; + pipe ^= pipeSwizzle; + } + else + { + bank ^= bankRotation * (slice / microTileThickness) / numPipes + bankSwizzle; + bank %= pTileInfo->banks; + pipe ^= pipeRotation * (slice / microTileThickness) + pipeSwizzle; + } + + if (pTileInfo->macroAspectRatio == 1) + { + switch (pTileInfo->banks) + { + case 2: + yBit3 = _BIT(bank, 0) ^ _BIT(xBit,0); + break; + case 4: + yBit4 = _BIT(bank, 0) ^ _BIT(xBit,0); + yBit3 = _BIT(bank, 1) ^ _BIT(xBit,1); + break; + case 8: + yBit3 = _BIT(bank, 2) ^ _BIT(xBit,2); + yBit5 = _BIT(bank, 0) ^ _BIT(xBit,0); + yBit4 = _BIT(bank, 1) ^ _BIT(xBit,1) ^ yBit5; + break; + case 16: + yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); + yBit4 = _BIT(bank, 2) ^ _BIT(xBit, 2); + yBit6 = _BIT(bank, 0) ^ _BIT(xBit, 0); + yBit5 = _BIT(bank, 1) ^ _BIT(xBit, 1) ^ yBit6; + break; + default: + break; + } + + } + else if (pTileInfo->macroAspectRatio == 2) + { + switch (pTileInfo->banks) + { + case 2: //xBit3 = yBit3^b0 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,0); + break; + case 4: //xBit3=yBit4^b0; yBit3=xBit4^b1 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,1); + yBit3 = _BIT(bank, 1) ^ _BIT(xBit,1); + break; + case 8: //xBit4, xBit5, yBit5 are known + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,2); + yBit3 = _BIT(bank, 2) ^ _BIT(xBit,2); + yBit4 = _BIT(bank, 1) ^ _BIT(xBit,1) ^ _BIT(yBit, 2); + break; + case 16://x4,x5,x6,y6 are known + xBit3 = _BIT(bank, 0) ^ _BIT(yBit, 3); //x3 = y6 ^ b0 + yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); //y3 = x6 ^ b3 + yBit4 = _BIT(bank, 2) ^ _BIT(xBit, 2); //y4 = x5 ^ b2 + yBit5 = _BIT(bank, 1) ^ _BIT(xBit, 1) ^ _BIT(yBit, 3); //y5=x4^y6^b1 + break; + default: + break; + } + } + else if (pTileInfo->macroAspectRatio == 4) + { + switch (pTileInfo->banks) + { + case 4: //yBit3, yBit4 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,1); + xBit4 = _BIT(bank, 1) ^ _BIT(yBit,0); + break; + case 8: //xBit5, yBit4, yBit5 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,2); + yBit3 = _BIT(bank, 2) ^ _BIT(xBit,2); + xBit4 = _BIT(bank, 1) ^ _BIT(yBit,1) ^ _BIT(yBit,2); + break; + case 16: //xBit5, xBit6, yBit5, yBit6 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit, 3);//x3 = b0 ^ y6 + xBit4 = _BIT(bank, 1) ^ _BIT(yBit, 2) ^ _BIT(yBit, 3);//x4 = b1 ^ y5 ^ y6; + yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); //y3 = b3 ^ x6; + yBit4 = _BIT(bank, 2) ^ _BIT(xBit, 2); //y4 = b2 ^ x5; + break; + default: + break; + } + } + else if (pTileInfo->macroAspectRatio == 8) + { + switch (pTileInfo->banks) + { + case 8: //yBit3, yBit4, yBit5 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,2); //x3 = b0 ^ y5; + xBit4 = _BIT(bank, 1) ^ _BIT(yBit,1) ^ _BIT(yBit, 2);//x4 = b1 ^ y4 ^ y5; + xBit5 = _BIT(bank, 2) ^ _BIT(yBit,0); + break; + case 16: //xBit6, yBit4, yBit5, yBit6 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit, 3);//x3 = y6 ^ b0 + xBit4 = _BIT(bank, 1) ^ _BIT(yBit, 2) ^ _BIT(yBit, 3);//x4 = y5 ^ y6 ^ b1 + xBit5 = _BIT(bank, 2) ^ _BIT(yBit, 1);//x5 = y4 ^ b2 + yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); //y3 = x6 ^ b3 + break; + default: + break; + } + } + + pOutput->xBits = xBit; + pOutput->yBits = yBit; + + pOutput->xBit3 = xBit3; + pOutput->xBit4 = xBit4; + pOutput->xBit5 = xBit5; + pOutput->yBit3 = yBit3; + pOutput->yBit4 = yBit4; + pOutput->yBit5 = yBit5; + pOutput->yBit6 = yBit6; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlExtractBankPipeSwizzle +* @brief +* Entry of EgBasedLib ExtractBankPipeSwizzle +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ExtractBankPipeSwizzle(pIn->base256b, + pIn->pTileInfo, + &pOut->bankSwizzle, + &pOut->pipeSwizzle); + + return ADDR_OK; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlCombineBankPipeSwizzle +* @brief +* Combine bank/pipe swizzle +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlCombineBankPipeSwizzle( + UINT_32 bankSwizzle, ///< [in] bank swizzle + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + ADDR_TILEINFO* pTileInfo, ///< [in] tile info + UINT_64 baseAddr, ///< [in] base address + UINT_32* pTileSwizzle ///< [out] combined swizzle + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if (pTileSwizzle) + { + *pTileSwizzle = GetBankPipeSwizzle(bankSwizzle, pipeSwizzle, baseAddr, pTileInfo); + } + else + { + retCode = ADDR_INVALIDPARAMS; + } + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeBaseSwizzle +* @brief +* Compute base swizzle +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut + ) const +{ + UINT_32 bankSwizzle = 0; + UINT_32 pipeSwizzle = 0; + ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; + + ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); + ADDR_ASSERT(pIn->pTileInfo); + + /// This is a legacy misreading of h/w doc, use it as it doesn't hurt. + static const UINT_8 bankRotationArray[4][16] = { + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, // ADDR_SURF_2_BANK + { 0, 1, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, // ADDR_SURF_4_BANK + { 0, 3, 6, 1, 4, 7, 2, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, // ADDR_SURF_8_BANK + { 0, 7, 14, 5, 12, 3, 10, 1, 8, 15, 6, 13, 4, 11, 2, 9 }, // ADDR_SURF_16_BANK + }; + + UINT_32 pipes = HwlGetPipes(pTileInfo); + (void)pipes; + UINT_32 banks = pTileInfo ? pTileInfo->banks : 2; + UINT_32 hwNumBanks; + + // Uses less bank swizzle bits + if (pIn->option.reduceBankBit && banks > 2) + { + banks >>= 1; + } + + switch (banks) + { + case 2: + hwNumBanks = 0; + break; + case 4: + hwNumBanks = 1; + break; + case 8: + hwNumBanks = 2; + break; + case 16: + hwNumBanks = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + hwNumBanks = 0; + break; + } + + if (pIn->option.genOption == ADDR_SWIZZLE_GEN_LINEAR) + { + bankSwizzle = pIn->surfIndex & (banks - 1); + } + else // (pIn->option.genOption == ADDR_SWIZZLE_GEN_DEFAULT) + { + bankSwizzle = bankRotationArray[hwNumBanks][pIn->surfIndex & (banks - 1)]; + } + + if (IsMacro3dTiled(pIn->tileMode)) + { + pipeSwizzle = pIn->surfIndex & (HwlGetPipes(pTileInfo) - 1); + } + + return HwlCombineBankPipeSwizzle(bankSwizzle, pipeSwizzle, pTileInfo, 0, &pOut->tileSwizzle); +} + +/** +**************************************************************************************************** +* EgBasedLib::ExtractBankPipeSwizzle +* @brief +* Extract bank/pipe swizzle from base256b +* @return +* N/A +**************************************************************************************************** +*/ +VOID EgBasedLib::ExtractBankPipeSwizzle( + UINT_32 base256b, ///< [in] input base256b register value + ADDR_TILEINFO* pTileInfo, ///< [in] 2D tile parameters. Client must provide all data + UINT_32* pBankSwizzle, ///< [out] bank swizzle + UINT_32* pPipeSwizzle ///< [out] pipe swizzle + ) const +{ + UINT_32 bankSwizzle = 0; + UINT_32 pipeSwizzle = 0; + + if (base256b != 0) + { + UINT_32 numPipes = HwlGetPipes(pTileInfo); + UINT_32 bankBits = QLog2(pTileInfo->banks); + UINT_32 pipeBits = QLog2(numPipes); + UINT_32 groupBytes = m_pipeInterleaveBytes; + UINT_32 bankInterleave = m_bankInterleave; + + pipeSwizzle = + (base256b / (groupBytes >> 8)) & ((1<> 8) / numPipes / bankInterleave) & ((1 << bankBits) - 1); + } + + *pPipeSwizzle = pipeSwizzle; + *pBankSwizzle = bankSwizzle; +} + +/** +**************************************************************************************************** +* EgBasedLib::GetBankPipeSwizzle +* @brief +* Combine bank/pipe swizzle +* @return +* Base256b bits (only filled bank/pipe bits) +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::GetBankPipeSwizzle( + UINT_32 bankSwizzle, ///< [in] bank swizzle + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + UINT_64 baseAddr, ///< [in] base address + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + UINT_32 pipeBits = QLog2(HwlGetPipes(pTileInfo)); + UINT_32 bankInterleaveBits = QLog2(m_bankInterleave); + UINT_32 tileSwizzle = pipeSwizzle + ((bankSwizzle << bankInterleaveBits) << pipeBits); + + baseAddr ^= tileSwizzle * m_pipeInterleaveBytes; + baseAddr >>= 8; + + return static_cast(baseAddr); +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeSliceTileSwizzle +* @brief +* Compute cubemap/3d texture faces/slices tile swizzle +* @return +* Tile swizzle +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::ComputeSliceTileSwizzle( + AddrTileMode tileMode, ///< [in] Tile mode + UINT_32 baseSwizzle, ///< [in] Base swizzle + UINT_32 slice, ///< [in] Slice index, Cubemap face index, 0 means +X + UINT_64 baseAddr, ///< [in] Base address + ADDR_TILEINFO* pTileInfo ///< [in] Bank structure + ) const +{ + UINT_32 tileSwizzle = 0; + + if (IsMacroTiled(tileMode)) // Swizzle only for macro tile mode + { + UINT_32 firstSlice = slice / Thickness(tileMode); + + UINT_32 numPipes = HwlGetPipes(pTileInfo); + UINT_32 numBanks = pTileInfo->banks; + + UINT_32 pipeRotation; + UINT_32 bankRotation; + + UINT_32 bankSwizzle = 0; + UINT_32 pipeSwizzle = 0; + + pipeRotation = ComputePipeRotation(tileMode, numPipes); + bankRotation = ComputeBankRotation(tileMode, numBanks, numPipes); + + if (baseSwizzle != 0) + { + ExtractBankPipeSwizzle(baseSwizzle, + pTileInfo, + &bankSwizzle, + &pipeSwizzle); + } + + if (pipeRotation == 0) //2D mode + { + bankSwizzle += firstSlice * bankRotation; + bankSwizzle %= numBanks; + } + else //3D mode + { + pipeSwizzle += firstSlice * pipeRotation; + pipeSwizzle %= numPipes; + bankSwizzle += firstSlice * bankRotation / numPipes; + bankSwizzle %= numBanks; + } + + tileSwizzle = GetBankPipeSwizzle(bankSwizzle, + pipeSwizzle, + baseAddr, + pTileInfo); + } + + return tileSwizzle; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeQbStereoRightSwizzle +* +* @brief +* Compute right eye swizzle +* @return +* swizzle +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::HwlComputeQbStereoRightSwizzle( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pInfo ///< [in] Surface info, must be valid + ) const +{ + UINT_32 bankBits = 0; + UINT_32 swizzle = 0; + + // The assumption is default swizzle for left eye is 0 + if (IsMacroTiled(pInfo->tileMode) && pInfo->pStereoInfo && pInfo->pTileInfo) + { + bankBits = ComputeBankFromCoord(0, pInfo->height, 0, + pInfo->tileMode, 0, 0, pInfo->pTileInfo); + + if (bankBits) + { + HwlCombineBankPipeSwizzle(bankBits, 0, pInfo->pTileInfo, 0, &swizzle); + } + } + + return swizzle; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeBankFromCoord +* +* @brief +* Compute bank number from coordinates +* @return +* Bank number +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::ComputeBankFromCoord( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bankSwizzle, ///< [in] bank swizzle + UINT_32 tileSplitSlice, ///< [in] If the size of the pixel offset is larger than the + /// tile split size, then the pixel will be moved to a separate + /// slice. This value equals pixelOffset / tileSplitBytes + /// in this case. Otherwise this is 0. + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + UINT_32 pipes = HwlGetPipes(pTileInfo); + UINT_32 bankBit0 = 0; + UINT_32 bankBit1 = 0; + UINT_32 bankBit2 = 0; + UINT_32 bankBit3 = 0; + UINT_32 sliceRotation; + UINT_32 tileSplitRotation; + UINT_32 bank; + UINT_32 numBanks = pTileInfo->banks; + UINT_32 bankWidth = pTileInfo->bankWidth; + UINT_32 bankHeight = pTileInfo->bankHeight; + + UINT_32 tx = x / MicroTileWidth / (bankWidth * pipes); + UINT_32 ty = y / MicroTileHeight / bankHeight; + + UINT_32 x3 = _BIT(tx,0); + UINT_32 x4 = _BIT(tx,1); + UINT_32 x5 = _BIT(tx,2); + UINT_32 x6 = _BIT(tx,3); + UINT_32 y3 = _BIT(ty,0); + UINT_32 y4 = _BIT(ty,1); + UINT_32 y5 = _BIT(ty,2); + UINT_32 y6 = _BIT(ty,3); + + switch (numBanks) + { + case 16: + bankBit0 = x3 ^ y6; + bankBit1 = x4 ^ y5 ^ y6; + bankBit2 = x5 ^ y4; + bankBit3 = x6 ^ y3; + break; + case 8: + bankBit0 = x3 ^ y5; + bankBit1 = x4 ^ y4 ^ y5; + bankBit2 = x5 ^ y3; + break; + case 4: + bankBit0 = x3 ^ y4; + bankBit1 = x4 ^ y3; + break; + case 2: + bankBit0 = x3 ^ y3; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + bank = bankBit0 | (bankBit1 << 1) | (bankBit2 << 2) | (bankBit3 << 3); + + //Bits2Number(4, bankBit3, bankBit2, bankBit1, bankBit0); + + bank = HwlPreAdjustBank((x / MicroTileWidth), bank, pTileInfo); + // + // Compute bank rotation for the slice. + // + UINT_32 microTileThickness = Thickness(tileMode); + + switch (tileMode) + { + case ADDR_TM_2D_TILED_THIN1: // fall through + case ADDR_TM_2D_TILED_THICK: // fall through + case ADDR_TM_2D_TILED_XTHICK: + sliceRotation = ((numBanks / 2) - 1) * (slice / microTileThickness); + break; + case ADDR_TM_3D_TILED_THIN1: // fall through + case ADDR_TM_3D_TILED_THICK: // fall through + case ADDR_TM_3D_TILED_XTHICK: + sliceRotation = + Max(1u, (pipes / 2) - 1) * (slice / microTileThickness) / pipes; + break; + default: + sliceRotation = 0; + break; + } + + // + // Compute bank rotation for the tile split slice. + // + // The sample slice will be non-zero if samples must be split across multiple slices. + // This situation arises when the micro tile size multiplied yBit the number of samples exceeds + // the split size (set in GB_ADDR_CONFIG). + // + switch (tileMode) + { + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_PRT_2D_TILED_THIN1: //fall through + case ADDR_TM_PRT_3D_TILED_THIN1: //fall through + tileSplitRotation = ((numBanks / 2) + 1) * tileSplitSlice; + break; + default: + tileSplitRotation = 0; + break; + } + + // + // Apply bank rotation for the slice and tile split slice. + // + bank ^= bankSwizzle + sliceRotation; + bank ^= tileSplitRotation; + + bank &= (numBanks - 1); + + return bank; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeBankFromAddr +* +* @brief +* Compute the bank number from an address +* @return +* Bank number +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::ComputeBankFromAddr( + UINT_64 addr, ///< [in] address + UINT_32 numBanks, ///< [in] number of banks + UINT_32 numPipes ///< [in] number of pipes + ) const +{ + UINT_32 bank; + + // + // The LSBs of the address are arranged as follows: + // bank | bankInterleave | pipe | pipeInterleave + // + // To get the bank number, shift off the pipe interleave, pipe, and bank interlave bits and + // mask the bank bits. + // + bank = static_cast( + (addr >> Log2(m_pipeInterleaveBytes * numPipes * m_bankInterleave)) & + (numBanks - 1) + ); + + return bank; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputePipeRotation +* +* @brief +* Compute pipe rotation value +* @return +* Pipe rotation +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::ComputePipeRotation( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 numPipes ///< [in] number of pipes + ) const +{ + UINT_32 rotation; + + switch (tileMode) + { + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: //fall through + case ADDR_TM_PRT_3D_TILED_THIN1: //fall through + case ADDR_TM_PRT_3D_TILED_THICK: + rotation = (numPipes < 4) ? 1 : (numPipes / 2 - 1); + break; + default: + rotation = 0; + } + + return rotation; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeBankRotation +* +* @brief +* Compute bank rotation value +* @return +* Bank rotation +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::ComputeBankRotation( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 numBanks, ///< [in] number of banks + UINT_32 numPipes ///< [in] number of pipes + ) const +{ + UINT_32 rotation; + + switch (tileMode) + { + case ADDR_TM_2D_TILED_THIN1: // fall through + case ADDR_TM_2D_TILED_THICK: // fall through + case ADDR_TM_2D_TILED_XTHICK: + case ADDR_TM_PRT_2D_TILED_THIN1: + case ADDR_TM_PRT_2D_TILED_THICK: + // Rotate banks per Z-slice yBit 1 for 4-bank or 3 for 8-bank + rotation = numBanks / 2 - 1; + break; + case ADDR_TM_3D_TILED_THIN1: // fall through + case ADDR_TM_3D_TILED_THICK: // fall through + case ADDR_TM_3D_TILED_XTHICK: + case ADDR_TM_PRT_3D_TILED_THIN1: + case ADDR_TM_PRT_3D_TILED_THICK: + rotation = (numPipes < 4) ? 1 : (numPipes / 2 - 1); // rotate pipes & banks + break; + default: + rotation = 0; + } + + return rotation; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeHtileBytes +* +* @brief +* Compute htile size in bytes +* +* @return +* Htile size in bytes +**************************************************************************************************** +*/ +UINT_64 EgBasedLib::ComputeHtileBytes( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 bpp, ///< [in] bits per pixel + BOOL_32 isLinear, ///< [in] if it is linear mode + UINT_32 numSlices, ///< [in] number of slices + UINT_64* sliceBytes, ///< [out] bytes per slice + UINT_32 baseAlign ///< [in] base alignments + ) const +{ + UINT_64 surfBytes; + + const UINT_64 HtileCacheLineSize = BITS_TO_BYTES(HtileCacheBits); + + *sliceBytes = BITS_TO_BYTES(static_cast(pitch) * height * bpp / 64); + + if (m_configFlags.useHtileSliceAlign) + { + // Align the sliceSize to htilecachelinesize * pipes at first + *sliceBytes = PowTwoAlign(*sliceBytes, HtileCacheLineSize * m_pipes); + surfBytes = *sliceBytes * numSlices; + } + else + { + // Align the surfSize to htilecachelinesize * pipes at last + surfBytes = *sliceBytes * numSlices; + surfBytes = PowTwoAlign(surfBytes, HtileCacheLineSize * m_pipes); + } + + return surfBytes; +} + +/** +**************************************************************************************************** +* EgBasedLib::DispatchComputeFmaskInfo +* +* @brief +* Compute fmask sizes include padded pitch, height, slices, total size in bytes, +* meanwhile output suitable tile mode and alignments as well. Results are returned +* through output parameters. +* +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::DispatchComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + ADDR_COMPUTE_SURFACE_INFO_INPUT surfIn = {0}; + ADDR_COMPUTE_SURFACE_INFO_OUTPUT surfOut = {0}; + + // Setup input structure + surfIn.tileMode = pIn->tileMode; + surfIn.width = pIn->pitch; + surfIn.height = pIn->height; + surfIn.numSlices = pIn->numSlices; + surfIn.pTileInfo = pIn->pTileInfo; + surfIn.tileType = ADDR_NON_DISPLAYABLE; + surfIn.flags.fmask = 1; + + // Setup output structure + surfOut.pTileInfo = pOut->pTileInfo; + + // Setup hwl specific fields + HwlFmaskPreThunkSurfInfo(pIn, pOut, &surfIn, &surfOut); + + surfIn.bpp = HwlComputeFmaskBits(pIn, &surfIn.numSamples); + + // ComputeSurfaceInfo needs numSamples in surfOut as surface routines need adjusted numSamples + surfOut.numSamples = surfIn.numSamples; + + retCode = HwlComputeSurfaceInfo(&surfIn, &surfOut); + + // Save bpp field for surface dump support + surfOut.bpp = surfIn.bpp; + + if (retCode == ADDR_OK) + { + pOut->bpp = surfOut.bpp; + pOut->pitch = surfOut.pitch; + pOut->height = surfOut.height; + pOut->numSlices = surfOut.depth; + pOut->fmaskBytes = surfOut.surfSize; + pOut->baseAlign = surfOut.baseAlign; + pOut->pitchAlign = surfOut.pitchAlign; + pOut->heightAlign = surfOut.heightAlign; + + if (surfOut.depth > 1) + { + // For fmask, expNumSlices is stored in depth. + pOut->sliceSize = surfOut.surfSize / surfOut.depth; + } + else + { + pOut->sliceSize = surfOut.surfSize; + } + + // Save numSamples field for surface dump support + pOut->numSamples = surfOut.numSamples; + + HwlFmaskPostThunkSurfInfo(&surfOut, pOut); + } + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlFmaskSurfaceInfo +* @brief +* Entry of EgBasedLib ComputeFmaskInfo +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + ADDR_TILEINFO tileInfo = {0}; + + // Use internal tile info if pOut does not have a valid pTileInfo + if (pOut->pTileInfo == NULL) + { + pOut->pTileInfo = &tileInfo; + } + + retCode = DispatchComputeFmaskInfo(pIn, pOut); + + if (retCode == ADDR_OK) + { + pOut->tileIndex = + HwlPostCheckTileIndex(pOut->pTileInfo, pIn->tileMode, ADDR_NON_DISPLAYABLE, + pOut->tileIndex); + } + + // Resets pTileInfo to NULL if the internal tile info is used + if (pOut->pTileInfo == &tileInfo) + { + pOut->pTileInfo = NULL; + } + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeFmaskAddrFromCoord +* @brief +* Entry of EgBasedLib ComputeFmaskAddrFromCoord +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeFmaskCoordFromAddr +* @brief +* Entry of EgBasedLib ComputeFmaskCoordFromAddr +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeFmaskNumPlanesFromNumSamples +* +* @brief +* Compute fmask number of planes from number of samples +* +* @return +* Number of planes +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::ComputeFmaskNumPlanesFromNumSamples( + UINT_32 numSamples) ///< [in] number of samples +{ + UINT_32 numPlanes; + + // + // FMASK is stored such that each micro tile is composed of elements containing N bits, where + // N is the number of samples. There is a micro tile for each bit in the FMASK address, and + // micro tiles for each address bit, sometimes referred to as a plane, are stored sequentially. + // The FMASK for a 2-sample surface looks like a general surface with 2 bits per element. + // The FMASK for a 4-sample surface looks like a general surface with 4 bits per element and + // 2 samples. The FMASK for an 8-sample surface looks like a general surface with 8 bits per + // element and 4 samples. R6xx and R7xx only stored 3 planes for 8-sample FMASK surfaces. + // This was changed for R8xx to simplify the logic in the CB. + // + switch (numSamples) + { + case 2: + numPlanes = 1; + break; + case 4: + numPlanes = 2; + break; + case 8: + numPlanes = 4; + break; + default: + ADDR_UNHANDLED_CASE(); + numPlanes = 0; + break; + } + return numPlanes; +} + +/** +**************************************************************************************************** +* EgBasedLib::ComputeFmaskResolvedBppFromNumSamples +* +* @brief +* Compute resolved fmask effective bpp based on number of samples +* +* @return +* bpp +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::ComputeFmaskResolvedBppFromNumSamples( + UINT_32 numSamples) ///< number of samples +{ + UINT_32 bpp; + + // + // Resolved FMASK surfaces are generated yBit the CB and read yBit the texture unit + // so that the texture unit can read compressed multi-sample color data. + // These surfaces store each index value packed per element. + // Each element contains at least num_samples * log2(num_samples) bits. + // Resolved FMASK surfaces are addressed as follows: + // 2-sample Addressed similarly to a color surface with 8 bits per element and 1 sample. + // 4-sample Addressed similarly to a color surface with 8 bits per element and 1 sample. + // 8-sample Addressed similarly to a color surface with 32 bits per element and 1 sample. + + switch (numSamples) + { + case 2: + bpp = 8; + break; + case 4: + bpp = 8; + break; + case 8: + bpp = 32; + break; + default: + ADDR_UNHANDLED_CASE(); + bpp = 0; + break; + } + return bpp; +} + +/** +**************************************************************************************************** +* EgBasedLib::IsTileInfoAllZero +* +* @brief +* Return TRUE if all field are zero +* @note +* Since NULL input is consider to be all zero +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::IsTileInfoAllZero( + const ADDR_TILEINFO* pTileInfo) +{ + BOOL_32 allZero = TRUE; + + if (pTileInfo) + { + if ((pTileInfo->banks != 0) || + (pTileInfo->bankWidth != 0) || + (pTileInfo->bankHeight != 0) || + (pTileInfo->macroAspectRatio != 0) || + (pTileInfo->tileSplitBytes != 0) || + (pTileInfo->pipeConfig != 0) + ) + { + allZero = FALSE; + } + } + + return allZero; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlTileInfoEqual +* +* @brief +* Return TRUE if all field are equal +* @note +* Only takes care of current HWL's data +**************************************************************************************************** +*/ +BOOL_32 EgBasedLib::HwlTileInfoEqual( + const ADDR_TILEINFO* pLeft, ///<[in] Left compare operand + const ADDR_TILEINFO* pRight ///<[in] Right compare operand + ) const +{ + BOOL_32 equal = FALSE; + + if (pLeft->banks == pRight->banks && + pLeft->bankWidth == pRight->bankWidth && + pLeft->bankHeight == pRight->bankHeight && + pLeft->macroAspectRatio == pRight->macroAspectRatio && + pLeft->tileSplitBytes == pRight->tileSplitBytes) + { + equal = TRUE; + } + + return equal; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlConvertTileInfoToHW +* @brief +* Entry of EgBasedLib ConvertTileInfoToHW +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + ADDR_TILEINFO *pTileInfoIn = pIn->pTileInfo; + ADDR_TILEINFO *pTileInfoOut = pOut->pTileInfo; + + if ((pTileInfoIn != NULL) && (pTileInfoOut != NULL)) + { + if (pIn->reverse == FALSE) + { + switch (pTileInfoIn->banks) + { + case 2: + pTileInfoOut->banks = 0; + break; + case 4: + pTileInfoOut->banks = 1; + break; + case 8: + pTileInfoOut->banks = 2; + break; + case 16: + pTileInfoOut->banks = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->banks = 0; + break; + } + + switch (pTileInfoIn->bankWidth) + { + case 1: + pTileInfoOut->bankWidth = 0; + break; + case 2: + pTileInfoOut->bankWidth = 1; + break; + case 4: + pTileInfoOut->bankWidth = 2; + break; + case 8: + pTileInfoOut->bankWidth = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->bankWidth = 0; + break; + } + + switch (pTileInfoIn->bankHeight) + { + case 1: + pTileInfoOut->bankHeight = 0; + break; + case 2: + pTileInfoOut->bankHeight = 1; + break; + case 4: + pTileInfoOut->bankHeight = 2; + break; + case 8: + pTileInfoOut->bankHeight = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->bankHeight = 0; + break; + } + + switch (pTileInfoIn->macroAspectRatio) + { + case 1: + pTileInfoOut->macroAspectRatio = 0; + break; + case 2: + pTileInfoOut->macroAspectRatio = 1; + break; + case 4: + pTileInfoOut->macroAspectRatio = 2; + break; + case 8: + pTileInfoOut->macroAspectRatio = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->macroAspectRatio = 0; + break; + } + + switch (pTileInfoIn->tileSplitBytes) + { + case 64: + pTileInfoOut->tileSplitBytes = 0; + break; + case 128: + pTileInfoOut->tileSplitBytes = 1; + break; + case 256: + pTileInfoOut->tileSplitBytes = 2; + break; + case 512: + pTileInfoOut->tileSplitBytes = 3; + break; + case 1024: + pTileInfoOut->tileSplitBytes = 4; + break; + case 2048: + pTileInfoOut->tileSplitBytes = 5; + break; + case 4096: + pTileInfoOut->tileSplitBytes = 6; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->tileSplitBytes = 0; + break; + } + } + else + { + switch (pTileInfoIn->banks) + { + case 0: + pTileInfoOut->banks = 2; + break; + case 1: + pTileInfoOut->banks = 4; + break; + case 2: + pTileInfoOut->banks = 8; + break; + case 3: + pTileInfoOut->banks = 16; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->banks = 2; + break; + } + + switch (pTileInfoIn->bankWidth) + { + case 0: + pTileInfoOut->bankWidth = 1; + break; + case 1: + pTileInfoOut->bankWidth = 2; + break; + case 2: + pTileInfoOut->bankWidth = 4; + break; + case 3: + pTileInfoOut->bankWidth = 8; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->bankWidth = 1; + break; + } + + switch (pTileInfoIn->bankHeight) + { + case 0: + pTileInfoOut->bankHeight = 1; + break; + case 1: + pTileInfoOut->bankHeight = 2; + break; + case 2: + pTileInfoOut->bankHeight = 4; + break; + case 3: + pTileInfoOut->bankHeight = 8; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->bankHeight = 1; + break; + } + + switch (pTileInfoIn->macroAspectRatio) + { + case 0: + pTileInfoOut->macroAspectRatio = 1; + break; + case 1: + pTileInfoOut->macroAspectRatio = 2; + break; + case 2: + pTileInfoOut->macroAspectRatio = 4; + break; + case 3: + pTileInfoOut->macroAspectRatio = 8; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->macroAspectRatio = 1; + break; + } + + switch (pTileInfoIn->tileSplitBytes) + { + case 0: + pTileInfoOut->tileSplitBytes = 64; + break; + case 1: + pTileInfoOut->tileSplitBytes = 128; + break; + case 2: + pTileInfoOut->tileSplitBytes = 256; + break; + case 3: + pTileInfoOut->tileSplitBytes = 512; + break; + case 4: + pTileInfoOut->tileSplitBytes = 1024; + break; + case 5: + pTileInfoOut->tileSplitBytes = 2048; + break; + case 6: + pTileInfoOut->tileSplitBytes = 4096; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->tileSplitBytes = 64; + break; + } + } + + if (pTileInfoIn != pTileInfoOut) + { + pTileInfoOut->pipeConfig = pTileInfoIn->pipeConfig; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + } + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeSurfaceInfo +* @brief +* Entry of EgBasedLib ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if (pIn->numSamples < pIn->numFrags) + { + retCode = ADDR_INVALIDPARAMS; + } + + ADDR_TILEINFO tileInfo = {0}; + + if (retCode == ADDR_OK) + { + // Uses internal tile info if pOut does not have a valid pTileInfo + if (pOut->pTileInfo == NULL) + { + pOut->pTileInfo = &tileInfo; + } + + if (DispatchComputeSurfaceInfo(pIn, pOut) == FALSE) + { + retCode = ADDR_INVALIDPARAMS; + } + + // In case client uses tile info as input and would like to calculate a correct size and + // alignment together with tile info as output when the tile info is not suppose to have any + // matching indices in tile mode tables. + if (pIn->flags.skipIndicesOutput == FALSE) + { + // Returns an index + pOut->tileIndex = HwlPostCheckTileIndex(pOut->pTileInfo, + pOut->tileMode, + pOut->tileType, + pOut->tileIndex); + + if (IsMacroTiled(pOut->tileMode) && (pOut->macroModeIndex == TileIndexInvalid)) + { + pOut->macroModeIndex = HwlComputeMacroModeIndex(pOut->tileIndex, + pIn->flags, + pIn->bpp, + pIn->numSamples, + pOut->pTileInfo); + } + } + + // Resets pTileInfo to NULL if the internal tile info is used + if (pOut->pTileInfo == &tileInfo) + { +#if DEBUG + // Client does not pass in a valid pTileInfo + if (IsMacroTiled(pOut->tileMode)) + { + // If a valid index is returned, then no pTileInfo is okay + ADDR_ASSERT((m_configFlags.useTileIndex == FALSE) || + (pOut->tileIndex != TileIndexInvalid)); + + if (IsTileInfoAllZero(pIn->pTileInfo) == FALSE) + { + // The initial value of pIn->pTileInfo is copied to tileInfo + // We do not expect any of these value to be changed nor any 0 of inputs + ADDR_ASSERT(tileInfo.banks == pIn->pTileInfo->banks); + ADDR_ASSERT(tileInfo.bankWidth == pIn->pTileInfo->bankWidth); + ADDR_ASSERT(tileInfo.bankHeight == pIn->pTileInfo->bankHeight); + ADDR_ASSERT(tileInfo.macroAspectRatio == pIn->pTileInfo->macroAspectRatio); + ADDR_ASSERT(tileInfo.tileSplitBytes == pIn->pTileInfo->tileSplitBytes); + } + } +#endif + pOut->pTileInfo = NULL; + } + } + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeSurfaceAddrFromCoord +* @brief +* Entry of EgBasedLib ComputeSurfaceAddrFromCoord +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if ( +#if !ALT_TEST // Overflow test needs this out-of-boundary coord + (pIn->x > pIn->pitch) || + (pIn->y > pIn->height) || +#endif + (pIn->numSamples > m_maxSamples)) + { + retCode = ADDR_INVALIDPARAMS; + } + else + { + pOut->addr = DispatchComputeSurfaceAddrFromCoord(pIn, pOut); + } + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeSurfaceCoordFromAddr +* @brief +* Entry of EgBasedLib ComputeSurfaceCoordFromAddr +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if ((pIn->bitPosition >= 8) || + (pIn->numSamples > m_maxSamples)) + { + retCode = ADDR_INVALIDPARAMS; + } + else + { + DispatchComputeSurfaceCoordFromAddr(pIn, pOut); + } + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeSliceTileSwizzle +* @brief +* Entry of EgBasedLib ComputeSurfaceCoordFromAddr +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedLib::HwlComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if (pIn->pTileInfo && (pIn->pTileInfo->banks > 0)) + { + + pOut->tileSwizzle = ComputeSliceTileSwizzle(pIn->tileMode, + pIn->baseSwizzle, + pIn->slice, + pIn->baseAddr, + pIn->pTileInfo); + } + else + { + retCode = ADDR_INVALIDPARAMS; + } + + return retCode; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeHtileBpp +* +* @brief +* Compute htile bpp +* +* @return +* Htile bpp +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::HwlComputeHtileBpp( + BOOL_32 isWidth8, ///< [in] TRUE if block width is 8 + BOOL_32 isHeight8 ///< [in] TRUE if block height is 8 + ) const +{ + // only support 8x8 mode + ADDR_ASSERT(isWidth8 && isHeight8); + return 32; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlComputeHtileBaseAlign +* +* @brief +* Compute htile base alignment +* +* @return +* Htile base alignment +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::HwlComputeHtileBaseAlign( + BOOL_32 isTcCompatible, ///< [in] if TC compatible + BOOL_32 isLinear, ///< [in] if it is linear mode + ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + UINT_32 baseAlign = m_pipeInterleaveBytes * HwlGetPipes(pTileInfo); + + if (isTcCompatible) + { + ADDR_ASSERT(pTileInfo != NULL); + if (pTileInfo) + { + baseAlign *= pTileInfo->banks; + } + } + + return baseAlign; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlGetPitchAlignmentMicroTiled +* +* @brief +* Compute 1D tiled surface pitch alignment, calculation results are returned through +* output parameters. +* +* @return +* pitch alignment +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::HwlGetPitchAlignmentMicroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples ///< [in] number of samples + ) const +{ + UINT_32 pitchAlign; + + UINT_32 microTileThickness = Thickness(tileMode); + + UINT_32 pixelsPerMicroTile; + UINT_32 pixelsPerPipeInterleave; + UINT_32 microTilesPerPipeInterleave; + + // + // Special workaround for depth/stencil buffer, use 8 bpp to meet larger requirement for + // stencil buffer since pitch alignment is related to bpp. + // For a depth only buffer do not set this. + // + // Note: this actually does not work for mipmap but mipmap depth texture is not really + // sampled with mipmap. + // + if (flags.depth && (flags.noStencil == FALSE)) + { + bpp = 8; + } + + pixelsPerMicroTile = MicroTilePixels * microTileThickness; + pixelsPerPipeInterleave = BYTES_TO_BITS(m_pipeInterleaveBytes) / (bpp * numSamples); + microTilesPerPipeInterleave = pixelsPerPipeInterleave / pixelsPerMicroTile; + + pitchAlign = Max(MicroTileWidth, microTilesPerPipeInterleave * MicroTileWidth); + + return pitchAlign; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlGetSizeAdjustmentMicroTiled +* +* @brief +* Adjust 1D tiled surface pitch and slice size +* +* @return +* Logical slice size in bytes +**************************************************************************************************** +*/ +UINT_64 EgBasedLib::HwlGetSizeAdjustmentMicroTiled( + UINT_32 thickness, ///< [in] thickness + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + UINT_32 baseAlign, ///< [in] base alignment + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32* pPitch, ///< [in,out] pointer to pitch + UINT_32* pHeight ///< [in,out] pointer to height + ) const +{ + UINT_64 logicalSliceSize; + ASSERTED UINT_64 physicalSliceSize; + + UINT_32 pitch = *pPitch; + UINT_32 height = *pHeight; + + // Logical slice: pitch * height * bpp * numSamples (no 1D MSAA so actually numSamples == 1) + logicalSliceSize = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); + + // Physical slice: multiplied by thickness + physicalSliceSize = logicalSliceSize * thickness; + + // + // R800 will always pad physical slice size to baseAlign which is pipe_interleave_bytes + // + ADDR_ASSERT((physicalSliceSize % baseAlign) == 0); + + return logicalSliceSize; +} + +/** +**************************************************************************************************** +* EgBasedLib::HwlStereoCheckRightOffsetPadding +* +* @brief +* check if the height needs extra padding for stereo right eye offset, to avoid swizzling +* +* @return +* TRUE is the extra padding is needed +* +**************************************************************************************************** +*/ +UINT_32 EgBasedLib::HwlStereoCheckRightOffsetPadding( + ADDR_TILEINFO* pTileInfo ///< Tiling info + ) const +{ + UINT_32 stereoHeightAlign = 0; + + if (pTileInfo->macroAspectRatio > 2) + { + // Since 3D rendering treats right eye surface starting from y == "eye height" while + // display engine treats it to be 0, so the bank bits may be different. + // Additional padding in height is required to make sure it's possible + // to achieve synonym by adjusting bank swizzle of right eye surface. + + static const UINT_32 StereoAspectRatio = 2; + stereoHeightAlign = pTileInfo->banks * + pTileInfo->bankHeight * + MicroTileHeight / + StereoAspectRatio; + } + + return stereoHeightAlign; +} + +} // V1 +} // Addr diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.h new file mode 100644 index 0000000000..55e53540e9 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.h @@ -0,0 +1,430 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file egbaddrlib.h +* @brief Contains the EgBasedLib class definition. +**************************************************************************************************** +*/ + +#ifndef __EG_BASED_ADDR_LIB_H__ +#define __EG_BASED_ADDR_LIB_H__ + +#include "addrlib1.h" + +namespace Addr +{ +namespace V1 +{ +/// Structures for functions +struct CoordFromBankPipe +{ + UINT_32 xBits : 3; + UINT_32 yBits : 4; + + UINT_32 xBit3 : 1; + UINT_32 xBit4 : 1; + UINT_32 xBit5 : 1; + UINT_32 yBit3 : 1; + UINT_32 yBit4 : 1; + UINT_32 yBit5 : 1; + UINT_32 yBit6 : 1; +}; + +/** +**************************************************************************************************** +* @brief This class is the Evergreen based address library +* @note Abstract class +**************************************************************************************************** +*/ +class EgBasedLib : public Lib +{ +protected: + EgBasedLib(const Client* pClient); + virtual ~EgBasedLib(); + +public: + + /// Surface info functions + + // NOTE: DispatchComputeSurfaceInfo using TileInfo takes both an input and an output. + // On input: + // One or more fields may be 0 to be calculated/defaulted - pre-SI h/w. + // H/W using tile mode index only accepts none or all 0's - SI and newer h/w. + // It then returns the actual tiling configuration used. + // Other methods' TileInfo must be valid on entry + BOOL_32 DispatchComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE DispatchComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + +protected: + // Hwl interface + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, + UINT_64 baseAddr, UINT_32* pTileSwizzle) const; + + virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; + + virtual UINT_32 HwlComputeHtileBpp( + BOOL_32 isWidth8, BOOL_32 isHeight8) const; + + virtual UINT_32 HwlComputeHtileBaseAlign( + BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const; + + virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; + + virtual BOOL_32 HwlGetAlignmentInfoMacroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const; + + virtual UINT_32 HwlComputeQbStereoRightSwizzle( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pInfo) const; + + virtual VOID HwlComputePixelCoordFromOffset( + UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, + AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; + + /// Return Cmask block max + virtual BOOL_32 HwlGetMaxCmaskBlockMax() const + { + return 0x3FFF; // 14 bits, 0n16383 + } + + // Sub-hwl interface + /// Pure virtual function to setup tile info (indices) if client requests to do so + virtual VOID HwlSetupTileInfo( + AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, + AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; + + /// Pure virtual function to get pitch alignment for linear modes + virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const = 0; + + /// Pure virtual function to get size adjustment for linear modes + virtual UINT_64 HwlGetSizeAdjustmentLinear( + AddrTileMode tileMode, + UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, + UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const = 0; + + virtual UINT_32 HwlGetPitchAlignmentMicroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; + + virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( + UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, + UINT_32 baseAlign, UINT_32 pitchAlign, + UINT_32 *pPitch, UINT_32 *pHeight) const; + + /// Pure virtual function to do extra sanity check + virtual BOOL_32 HwlSanityCheckMacroTiled( + ADDR_TILEINFO* pTileInfo) const = 0; + + /// Pure virtual function to check current level to be the last macro tiled one + virtual VOID HwlCheckLastMacroTiledLvl( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; + + /// Adjusts bank before bank is modified by rotation + virtual UINT_32 HwlPreAdjustBank( + UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0; + + virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, + UINT_32 bank, UINT_32 pipe, + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, + BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo) const = 0; + + virtual BOOL_32 HwlTileInfoEqual( + const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; + + virtual AddrTileMode HwlDegradeThickTileMode( + AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; + + virtual INT_32 HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, + INT curIndex = TileIndexInvalid) const + { + return TileIndexInvalid; + } + + virtual VOID HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const + { + } + + virtual VOID HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const + { + } + + virtual UINT_32 HwlStereoCheckRightOffsetPadding(ADDR_TILEINFO* pTileInfo) const; + + virtual BOOL_32 HwlReduceBankWidthHeight( + UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, + UINT_32 bankHeightAlign, UINT_32 pipes, + ADDR_TILEINFO* pTileInfo) const; + + // Protected non-virtual functions + + /// Mip level functions + AddrTileMode ComputeSurfaceMipLevelTileMode( + AddrTileMode baseTileMode, UINT_32 bpp, + UINT_32 pitch, UINT_32 height, UINT_32 numSlices, UINT_32 numSamples, + UINT_32 pitchAlign, UINT_32 heightAlign, + ADDR_TILEINFO* pTileInfo) const; + + /// Swizzle functions + VOID ExtractBankPipeSwizzle( + UINT_32 base256b, ADDR_TILEINFO* pTileInfo, + UINT_32* pBankSwizzle, UINT_32* pPipeSwizzle) const; + + UINT_32 GetBankPipeSwizzle( + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, + UINT_64 baseAddr, ADDR_TILEINFO* pTileInfo) const; + + UINT_32 ComputeSliceTileSwizzle( + AddrTileMode tileMode, UINT_32 baseSwizzle, UINT_32 slice, UINT_64 baseAddr, + ADDR_TILEINFO* pTileInfo) const; + + /// Addressing functions + virtual ADDR_E_RETURNCODE ComputeBankEquation( + UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, + ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const + { + return ADDR_NOTSUPPORTED; + } + + UINT_32 ComputeBankFromCoord( + UINT_32 x, UINT_32 y, UINT_32 slice, + AddrTileMode tileMode, UINT_32 bankSwizzle, UINT_32 tileSpitSlice, + ADDR_TILEINFO* pTileInfo) const; + + UINT_32 ComputeBankFromAddr( + UINT_64 addr, UINT_32 numBanks, UINT_32 numPipes) const; + + UINT_32 ComputePipeRotation( + AddrTileMode tileMode, UINT_32 numPipes) const; + + UINT_32 ComputeBankRotation( + AddrTileMode tileMode, UINT_32 numBanks, + UINT_32 numPipes) const; + + VOID ComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, UINT_32 x, UINT_32 y, UINT_32 slice, + UINT_32 bank, UINT_32 pipe, + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, + ADDR_TILEINFO* pTileInfo, + CoordFromBankPipe *pOutput) const; + + /// Htile/Cmask functions + UINT_64 ComputeHtileBytes( + UINT_32 pitch, UINT_32 height, UINT_32 bpp, + BOOL_32 isLinear, UINT_32 numSlices, UINT_64* sliceBytes, UINT_32 baseAlign) const; + + ADDR_E_RETURNCODE ComputeMacroTileEquation( + UINT_32 log2BytesPP, AddrTileMode tileMode, AddrTileType microTileType, + ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const; + + // Static functions + static BOOL_32 IsTileInfoAllZero(const ADDR_TILEINFO* pTileInfo); + static UINT_32 ComputeFmaskNumPlanesFromNumSamples(UINT_32 numSamples); + static UINT_32 ComputeFmaskResolvedBppFromNumSamples(UINT_32 numSamples); + + virtual VOID HwlComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 mipLevel, UINT_32 numSamples, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const + { + } + +private: + + BOOL_32 ComputeSurfaceInfoLinear( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, + UINT_32 padDims) const; + + BOOL_32 ComputeSurfaceInfoMicroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, + UINT_32 padDims, + AddrTileMode expTileMode) const; + + BOOL_32 ComputeSurfaceInfoMacroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, + UINT_32 padDims, + AddrTileMode expTileMode) const; + + BOOL_32 ComputeSurfaceAlignmentsLinear( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; + + BOOL_32 ComputeSurfaceAlignmentsMicroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 mipLevel, UINT_32 numSamples, + UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; + + BOOL_32 ComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 mipLevel, UINT_32 numSamples, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + /// Surface addressing functions + UINT_64 DispatchComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + VOID DispatchComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + UINT_64 ComputeSurfaceAddrFromCoordMicroTiled( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, + AddrTileType microTileType, BOOL_32 isDepthSampleOrder, + UINT_32* pBitPosition) const; + + UINT_64 ComputeSurfaceAddrFromCoordMacroTiled( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, + AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, + UINT_32 pipeSwizzle, UINT_32 bankSwizzle, + ADDR_TILEINFO* pTileInfo, + UINT_32* pBitPosition) const; + + VOID ComputeSurfaceCoordFromAddrMacroTiled( + UINT_64 addr, UINT_32 bitPosition, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, + AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, + UINT_32 pipeSwizzle, UINT_32 bankSwizzle, + ADDR_TILEINFO* pTileInfo, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; + + /// Fmask functions + UINT_64 DispatchComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + VOID DispatchComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; + + // FMASK related methods - private + UINT_64 ComputeFmaskAddrFromCoordMicroTiled( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, + UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, + BOOL_32 resolved, UINT_32* pBitPosition) const; + + VOID ComputeFmaskCoordFromAddrMicroTiled( + UINT_64 addr, UINT_32 bitPosition, + UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, BOOL_32 resolved, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; + + VOID ComputeFmaskCoordFromAddrMacroTiled( + UINT_64 addr, UINT_32 bitPosition, + UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, + UINT_32 pipeSwizzle, UINT_32 bankSwizzle, + BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo, + BOOL_32 resolved, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; + + UINT_64 ComputeFmaskAddrFromCoordMacroTiled( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, + UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 pipeSwizzle, UINT_32 bankSwizzle, + BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo, + BOOL_32 resolved, + UINT_32* pBitPosition) const; + + /// Sanity check functions + BOOL_32 SanityCheckMacroTiled( + ADDR_TILEINFO* pTileInfo) const; + +protected: + UINT_32 m_ranks; ///< Number of ranks - MC_ARB_RAMCFG.NOOFRANK + UINT_32 m_logicalBanks; ///< Logical banks = m_banks * m_ranks if m_banks != 16 + UINT_32 m_bankInterleave; ///< Bank interleave, as a multiple of pipe interleave size +}; + +} // V1 +} // Addr + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.cpp new file mode 100644 index 0000000000..c91f72640a --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.cpp @@ -0,0 +1,3873 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file siaddrlib.cpp +* @brief Contains the implementation for the SiLib class. +**************************************************************************************************** +*/ + +#include "siaddrlib.h" +#include "si_gb_reg.h" + +#include "amdgpu_asic_addr.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////////////////////////////// +namespace Addr +{ + +/** +**************************************************************************************************** +* SiHwlInit +* +* @brief +* Creates an SiLib object. +* +* @return +* Returns an SiLib object pointer. +**************************************************************************************************** +*/ +Lib* SiHwlInit(const Client* pClient) +{ + return V1::SiLib::CreateObj(pClient); +} + +namespace V1 +{ + +// We don't support MSAA for equation +const BOOL_32 SiLib::m_EquationSupport[SiLib::TileTableSize][SiLib::MaxNumElementBytes] = +{ + {TRUE, TRUE, TRUE, FALSE, FALSE}, // 0, non-AA compressed depth or any stencil + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 1, 2xAA/4xAA compressed depth with or without stencil + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 2, 8xAA compressed depth with or without stencil + {FALSE, TRUE, FALSE, FALSE, FALSE}, // 3, 16 bpp depth PRT (non-MSAA), don't support uncompressed depth + {TRUE, TRUE, TRUE, FALSE, FALSE}, // 4, 1D depth + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 5, 16 bpp depth PRT (4xMSAA) + {FALSE, FALSE, TRUE, FALSE, FALSE}, // 6, 32 bpp depth PRT (non-MSAA) + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 7, 32 bpp depth PRT (4xMSAA) + {TRUE, TRUE, TRUE, TRUE, TRUE }, // 8, Linear + {TRUE, TRUE, TRUE, TRUE, TRUE }, // 9, 1D display + {TRUE, FALSE, FALSE, FALSE, FALSE}, // 10, 8 bpp color (displayable) + {FALSE, TRUE, FALSE, FALSE, FALSE}, // 11, 16 bpp color (displayable) + {FALSE, FALSE, TRUE, TRUE, FALSE}, // 12, 32/64 bpp color (displayable) + {TRUE, TRUE, TRUE, TRUE, TRUE }, // 13, 1D thin + {TRUE, FALSE, FALSE, FALSE, FALSE}, // 14, 8 bpp color non-displayable + {FALSE, TRUE, FALSE, FALSE, FALSE}, // 15, 16 bpp color non-displayable + {FALSE, FALSE, TRUE, FALSE, FALSE}, // 16, 32 bpp color non-displayable + {FALSE, FALSE, FALSE, TRUE, TRUE }, // 17, 64/128 bpp color non-displayable + {TRUE, TRUE, TRUE, TRUE, TRUE }, // 18, 1D THICK + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 19, 2D XTHICK + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 20, 2D THICK + {TRUE, FALSE, FALSE, FALSE, FALSE}, // 21, 8 bpp 2D PRTs (non-MSAA) + {FALSE, TRUE, FALSE, FALSE, FALSE}, // 22, 16 bpp 2D PRTs (non-MSAA) + {FALSE, FALSE, TRUE, FALSE, FALSE}, // 23, 32 bpp 2D PRTs (non-MSAA) + {FALSE, FALSE, FALSE, TRUE, FALSE}, // 24, 64 bpp 2D PRTs (non-MSAA) + {FALSE, FALSE, FALSE, FALSE, TRUE }, // 25, 128bpp 2D PRTs (non-MSAA) + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 26, none + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 27, none + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 28, none + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 29, none + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 30, 64bpp 2D PRTs (4xMSAA) + {FALSE, FALSE, FALSE, FALSE, FALSE}, // 31, none +}; + +/** +**************************************************************************************************** +* SiLib::SiLib +* +* @brief +* Constructor +* +**************************************************************************************************** +*/ +SiLib::SiLib(const Client* pClient) + : + EgBasedLib(pClient), + m_noOfEntries(0), + m_numEquations(0) +{ + m_class = SI_ADDRLIB; + memset(&m_settings, 0, sizeof(m_settings)); +} + +/** +**************************************************************************************************** +* SiLib::~SiLib +* +* @brief +* Destructor +**************************************************************************************************** +*/ +SiLib::~SiLib() +{ +} + +/** +**************************************************************************************************** +* SiLib::HwlGetPipes +* +* @brief +* Get number pipes +* @return +* num pipes +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlGetPipes( + const ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + UINT_32 numPipes; + + if (pTileInfo) + { + numPipes = GetPipePerSurf(pTileInfo->pipeConfig); + } + else + { + ADDR_ASSERT_ALWAYS(); + numPipes = m_pipes; // Suppose we should still have a global pipes + } + + return numPipes; +} + +/** +**************************************************************************************************** +* SiLib::GetPipePerSurf +* @brief +* get pipe num base on inputing tileinfo->pipeconfig +* @return +* pipe number +**************************************************************************************************** +*/ +UINT_32 SiLib::GetPipePerSurf( + AddrPipeCfg pipeConfig ///< [in] pipe config + ) const +{ + UINT_32 numPipes = 0; + + switch (pipeConfig) + { + case ADDR_PIPECFG_P2: + numPipes = 2; + break; + case ADDR_PIPECFG_P4_8x16: + case ADDR_PIPECFG_P4_16x16: + case ADDR_PIPECFG_P4_16x32: + case ADDR_PIPECFG_P4_32x32: + numPipes = 4; + break; + case ADDR_PIPECFG_P8_16x16_8x16: + case ADDR_PIPECFG_P8_16x32_8x16: + case ADDR_PIPECFG_P8_32x32_8x16: + case ADDR_PIPECFG_P8_16x32_16x16: + case ADDR_PIPECFG_P8_32x32_16x16: + case ADDR_PIPECFG_P8_32x32_16x32: + case ADDR_PIPECFG_P8_32x64_32x32: + numPipes = 8; + break; + case ADDR_PIPECFG_P16_32x32_8x16: + case ADDR_PIPECFG_P16_32x32_16x16: + numPipes = 16; + break; + default: + ADDR_ASSERT(!"Invalid pipe config"); + numPipes = m_pipes; + } + return numPipes; +} + +/** +**************************************************************************************************** +* SiLib::ComputeBankEquation +* +* @brief +* Compute bank equation +* +* @return +* If equation can be computed +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE SiLib::ComputeBankEquation( + UINT_32 log2BytesPP, ///< [in] log2 of bytes per pixel + UINT_32 threshX, ///< [in] threshold for x channel + UINT_32 threshY, ///< [in] threshold for y channel + ADDR_TILEINFO* pTileInfo, ///< [in] tile info + ADDR_EQUATION* pEquation ///< [out] bank equation + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + UINT_32 pipes = HwlGetPipes(pTileInfo); + UINT_32 bankXStart = 3 + Log2(pipes) + Log2(pTileInfo->bankWidth); + UINT_32 bankYStart = 3 + Log2(pTileInfo->bankHeight); + + ADDR_CHANNEL_SETTING x3 = InitChannel(1, 0, log2BytesPP + bankXStart); + ADDR_CHANNEL_SETTING x4 = InitChannel(1, 0, log2BytesPP + bankXStart + 1); + ADDR_CHANNEL_SETTING x5 = InitChannel(1, 0, log2BytesPP + bankXStart + 2); + ADDR_CHANNEL_SETTING x6 = InitChannel(1, 0, log2BytesPP + bankXStart + 3); + ADDR_CHANNEL_SETTING y3 = InitChannel(1, 1, bankYStart); + ADDR_CHANNEL_SETTING y4 = InitChannel(1, 1, bankYStart + 1); + ADDR_CHANNEL_SETTING y5 = InitChannel(1, 1, bankYStart + 2); + ADDR_CHANNEL_SETTING y6 = InitChannel(1, 1, bankYStart + 3); + + x3.value = (threshX > bankXStart) ? x3.value : 0; + x4.value = (threshX > bankXStart + 1) ? x4.value : 0; + x5.value = (threshX > bankXStart + 2) ? x5.value : 0; + x6.value = (threshX > bankXStart + 3) ? x6.value : 0; + y3.value = (threshY > bankYStart) ? y3.value : 0; + y4.value = (threshY > bankYStart + 1) ? y4.value : 0; + y5.value = (threshY > bankYStart + 2) ? y5.value : 0; + y6.value = (threshY > bankYStart + 3) ? y6.value : 0; + + switch (pTileInfo->banks) + { + case 16: + if (pTileInfo->macroAspectRatio == 1) + { + pEquation->addr[0] = y6; + pEquation->xor1[0] = x3; + pEquation->addr[1] = y5; + pEquation->xor1[1] = y6; + pEquation->xor2[1] = x4; + pEquation->addr[2] = y4; + pEquation->xor1[2] = x5; + pEquation->addr[3] = y3; + pEquation->xor1[3] = x6; + } + else if (pTileInfo->macroAspectRatio == 2) + { + pEquation->addr[0] = x3; + pEquation->xor1[0] = y6; + pEquation->addr[1] = y5; + pEquation->xor1[1] = y6; + pEquation->xor2[1] = x4; + pEquation->addr[2] = y4; + pEquation->xor1[2] = x5; + pEquation->addr[3] = y3; + pEquation->xor1[3] = x6; + } + else if (pTileInfo->macroAspectRatio == 4) + { + pEquation->addr[0] = x3; + pEquation->xor1[0] = y6; + pEquation->addr[1] = x4; + pEquation->xor1[1] = y5; + pEquation->xor2[1] = y6; + pEquation->addr[2] = y4; + pEquation->xor1[2] = x5; + pEquation->addr[3] = y3; + pEquation->xor1[3] = x6; + } + else if (pTileInfo->macroAspectRatio == 8) + { + pEquation->addr[0] = x3; + pEquation->xor1[0] = y6; + pEquation->addr[1] = x4; + pEquation->xor1[1] = y5; + pEquation->xor2[1] = y6; + pEquation->addr[2] = x5; + pEquation->xor1[2] = y4; + pEquation->addr[3] = y3; + pEquation->xor1[3] = x6; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + pEquation->numBits = 4; + break; + case 8: + if (pTileInfo->macroAspectRatio == 1) + { + pEquation->addr[0] = y5; + pEquation->xor1[0] = x3; + pEquation->addr[1] = y4; + pEquation->xor1[1] = y5; + pEquation->xor2[1] = x4; + pEquation->addr[2] = y3; + pEquation->xor1[2] = x5; + } + else if (pTileInfo->macroAspectRatio == 2) + { + pEquation->addr[0] = x3; + pEquation->xor1[0] = y5; + pEquation->addr[1] = y4; + pEquation->xor1[1] = y5; + pEquation->xor2[1] = x4; + pEquation->addr[2] = y3; + pEquation->xor1[2] = x5; + } + else if (pTileInfo->macroAspectRatio == 4) + { + pEquation->addr[0] = x3; + pEquation->xor1[0] = y5; + pEquation->addr[1] = x4; + pEquation->xor1[1] = y4; + pEquation->xor2[1] = y5; + pEquation->addr[2] = y3; + pEquation->xor1[2] = x5; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + pEquation->numBits = 3; + break; + case 4: + if (pTileInfo->macroAspectRatio == 1) + { + pEquation->addr[0] = y4; + pEquation->xor1[0] = x3; + pEquation->addr[1] = y3; + pEquation->xor1[1] = x4; + } + else if (pTileInfo->macroAspectRatio == 2) + { + pEquation->addr[0] = x3; + pEquation->xor1[0] = y4; + pEquation->addr[1] = y3; + pEquation->xor1[1] = x4; + } + else + { + pEquation->addr[0] = x3; + pEquation->xor1[0] = y4; + pEquation->addr[1] = x4; + pEquation->xor1[1] = y3; + } + pEquation->numBits = 2; + break; + case 2: + if (pTileInfo->macroAspectRatio == 1) + { + pEquation->addr[0] = y3; + pEquation->xor1[0] = x3; + } + else + { + pEquation->addr[0] = x3; + pEquation->xor1[0] = y3; + } + pEquation->numBits = 1; + break; + default: + pEquation->numBits = 0; + retCode = ADDR_NOTSUPPORTED; + ADDR_ASSERT_ALWAYS(); + break; + } + + for (UINT_32 i = 0; i < pEquation->numBits; i++) + { + if (pEquation->addr[i].value == 0) + { + if (pEquation->xor1[i].value == 0) + { + // 00X -> X00 + pEquation->addr[i].value = pEquation->xor2[i].value; + pEquation->xor2[i].value = 0; + } + else + { + pEquation->addr[i].value = pEquation->xor1[i].value; + + if (pEquation->xor2[i].value != 0) + { + // 0XY -> XY0 + pEquation->xor1[i].value = pEquation->xor2[i].value; + pEquation->xor2[i].value = 0; + } + else + { + // 0X0 -> X00 + pEquation->xor1[i].value = 0; + } + } + } + else if (pEquation->xor1[i].value == 0) + { + if (pEquation->xor2[i].value != 0) + { + // X0Y -> XY0 + pEquation->xor1[i].value = pEquation->xor2[i].value; + pEquation->xor2[i].value = 0; + } + } + } + + if ((pTileInfo->bankWidth == 1) && + ((pTileInfo->pipeConfig == ADDR_PIPECFG_P4_32x32) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32))) + { + retCode = ADDR_NOTSUPPORTED; + } + + return retCode; +} + +/** +**************************************************************************************************** +* SiLib::ComputePipeEquation +* +* @brief +* Compute pipe equation +* +* @return +* If equation can be computed +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE SiLib::ComputePipeEquation( + UINT_32 log2BytesPP, ///< [in] Log2 of bytes per pixel + UINT_32 threshX, ///< [in] Threshold for X channel + UINT_32 threshY, ///< [in] Threshold for Y channel + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + ADDR_EQUATION* pEquation ///< [out] Pipe configure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + ADDR_CHANNEL_SETTING* pAddr = pEquation->addr; + ADDR_CHANNEL_SETTING* pXor1 = pEquation->xor1; + ADDR_CHANNEL_SETTING* pXor2 = pEquation->xor2; + + ADDR_CHANNEL_SETTING x3 = InitChannel(1, 0, 3 + log2BytesPP); + ADDR_CHANNEL_SETTING x4 = InitChannel(1, 0, 4 + log2BytesPP); + ADDR_CHANNEL_SETTING x5 = InitChannel(1, 0, 5 + log2BytesPP); + ADDR_CHANNEL_SETTING x6 = InitChannel(1, 0, 6 + log2BytesPP); + ADDR_CHANNEL_SETTING y3 = InitChannel(1, 1, 3); + ADDR_CHANNEL_SETTING y4 = InitChannel(1, 1, 4); + ADDR_CHANNEL_SETTING y5 = InitChannel(1, 1, 5); + ADDR_CHANNEL_SETTING y6 = InitChannel(1, 1, 6); + + x3.value = (threshX > 3) ? x3.value : 0; + x4.value = (threshX > 4) ? x4.value : 0; + x5.value = (threshX > 5) ? x5.value : 0; + x6.value = (threshX > 6) ? x6.value : 0; + y3.value = (threshY > 3) ? y3.value : 0; + y4.value = (threshY > 4) ? y4.value : 0; + y5.value = (threshY > 5) ? y5.value : 0; + y6.value = (threshY > 6) ? y6.value : 0; + + switch (pTileInfo->pipeConfig) + { + case ADDR_PIPECFG_P2: + pAddr[0] = x3; + pXor1[0] = y3; + pEquation->numBits = 1; + break; + case ADDR_PIPECFG_P4_8x16: + pAddr[0] = x4; + pXor1[0] = y3; + pAddr[1] = x3; + pXor1[1] = y4; + pEquation->numBits = 2; + break; + case ADDR_PIPECFG_P4_16x16: + pAddr[0] = x3; + pXor1[0] = y3; + pXor2[0] = x4; + pAddr[1] = x4; + pXor1[1] = y4; + pEquation->numBits = 2; + break; + case ADDR_PIPECFG_P4_16x32: + pAddr[0] = x3; + pXor1[0] = y3; + pXor2[0] = x4; + pAddr[1] = x4; + pXor1[1] = y5; + pEquation->numBits = 2; + break; + case ADDR_PIPECFG_P4_32x32: + pAddr[0] = x3; + pXor1[0] = y3; + pXor2[0] = x5; + pAddr[1] = x5; + pXor1[1] = y5; + pEquation->numBits = 2; + break; + case ADDR_PIPECFG_P8_16x16_8x16: + pAddr[0] = x4; + pXor1[0] = y3; + pXor2[0] = x5; + pAddr[1] = x3; + pXor1[1] = y5; + pEquation->numBits = 3; + break; + case ADDR_PIPECFG_P8_16x32_8x16: + pAddr[0] = x4; + pXor1[0] = y3; + pXor2[0] = x5; + pAddr[1] = x3; + pXor1[1] = y4; + pAddr[2] = x4; + pXor1[2] = y5; + pEquation->numBits = 3; + break; + case ADDR_PIPECFG_P8_16x32_16x16: + pAddr[0] = x3; + pXor1[0] = y3; + pXor2[0] = x4; + pAddr[1] = x5; + pXor1[1] = y4; + pAddr[2] = x4; + pXor1[2] = y5; + pEquation->numBits = 3; + break; + case ADDR_PIPECFG_P8_32x32_8x16: + pAddr[0] = x4; + pXor1[0] = y3; + pXor2[0] = x5; + pAddr[1] = x3; + pXor1[1] = y4; + pAddr[2] = x5; + pXor1[2] = y5; + pEquation->numBits = 3; + break; + case ADDR_PIPECFG_P8_32x32_16x16: + pAddr[0] = x3; + pXor1[0] = y3; + pXor2[0] = x4; + pAddr[1] = x4; + pXor1[1] = y4; + pAddr[2] = x5; + pXor1[2] = y5; + pEquation->numBits = 3; + break; + case ADDR_PIPECFG_P8_32x32_16x32: + pAddr[0] = x3; + pXor1[0] = y3; + pXor2[0] = x4; + pAddr[1] = x4; + pXor1[1] = y6; + pAddr[2] = x5; + pXor1[2] = y5; + pEquation->numBits = 3; + break; + case ADDR_PIPECFG_P8_32x64_32x32: + pAddr[0] = x3; + pXor1[0] = y3; + pXor2[0] = x5; + pAddr[1] = x6; + pXor1[1] = y5; + pAddr[2] = x5; + pXor1[2] = y6; + pEquation->numBits = 3; + break; + case ADDR_PIPECFG_P16_32x32_8x16: + pAddr[0] = x4; + pXor1[0] = y3; + pAddr[1] = x3; + pXor1[1] = y4; + pAddr[2] = x5; + pXor1[2] = y6; + pAddr[3] = x6; + pXor1[3] = y5; + pEquation->numBits = 4; + break; + case ADDR_PIPECFG_P16_32x32_16x16: + pAddr[0] = x3; + pXor1[0] = y3; + pXor2[0] = x4; + pAddr[1] = x4; + pXor1[1] = y4; + pAddr[2] = x5; + pXor1[2] = y6; + pAddr[3] = x6; + pXor1[3] = y5; + pEquation->numBits = 4; + break; + default: + ADDR_UNHANDLED_CASE(); + pEquation->numBits = 0; + retCode = ADDR_NOTSUPPORTED; + break; + } + + if (m_settings.isVegaM && (pEquation->numBits == 4)) + { + ADDR_CHANNEL_SETTING addeMsb = pAddr[0]; + ADDR_CHANNEL_SETTING xor1Msb = pXor1[0]; + ADDR_CHANNEL_SETTING xor2Msb = pXor2[0]; + + pAddr[0] = pAddr[1]; + pXor1[0] = pXor1[1]; + pXor2[0] = pXor2[1]; + + pAddr[1] = pAddr[2]; + pXor1[1] = pXor1[2]; + pXor2[1] = pXor2[2]; + + pAddr[2] = pAddr[3]; + pXor1[2] = pXor1[3]; + pXor2[2] = pXor2[3]; + + pAddr[3] = addeMsb; + pXor1[3] = xor1Msb; + pXor2[3] = xor2Msb; + } + + for (UINT_32 i = 0; i < pEquation->numBits; i++) + { + if (pAddr[i].value == 0) + { + if (pXor1[i].value == 0) + { + pAddr[i].value = pXor2[i].value; + } + else + { + pAddr[i].value = pXor1[i].value; + pXor1[i].value = 0; + } + } + } + + return retCode; +} + +/** +**************************************************************************************************** +* SiLib::ComputePipeFromCoord +* +* @brief +* Compute pipe number from coordinates +* @return +* Pipe number +**************************************************************************************************** +*/ +UINT_32 SiLib::ComputePipeFromCoord( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + BOOL_32 ignoreSE, ///< [in] TRUE if shader engines are ignored + ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + UINT_32 pipe; + UINT_32 pipeBit0 = 0; + UINT_32 pipeBit1 = 0; + UINT_32 pipeBit2 = 0; + UINT_32 pipeBit3 = 0; + UINT_32 sliceRotation; + UINT_32 numPipes = 0; + + UINT_32 tx = x / MicroTileWidth; + UINT_32 ty = y / MicroTileHeight; + UINT_32 x3 = _BIT(tx,0); + UINT_32 x4 = _BIT(tx,1); + UINT_32 x5 = _BIT(tx,2); + UINT_32 x6 = _BIT(tx,3); + UINT_32 y3 = _BIT(ty,0); + UINT_32 y4 = _BIT(ty,1); + UINT_32 y5 = _BIT(ty,2); + UINT_32 y6 = _BIT(ty,3); + + switch (pTileInfo->pipeConfig) + { + case ADDR_PIPECFG_P2: + pipeBit0 = x3 ^ y3; + numPipes = 2; + break; + case ADDR_PIPECFG_P4_8x16: + pipeBit0 = x4 ^ y3; + pipeBit1 = x3 ^ y4; + numPipes = 4; + break; + case ADDR_PIPECFG_P4_16x16: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y4; + numPipes = 4; + break; + case ADDR_PIPECFG_P4_16x32: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y5; + numPipes = 4; + break; + case ADDR_PIPECFG_P4_32x32: + pipeBit0 = x3 ^ y3 ^ x5; + pipeBit1 = x5 ^ y5; + numPipes = 4; + break; + case ADDR_PIPECFG_P8_16x16_8x16: + pipeBit0 = x4 ^ y3 ^ x5; + pipeBit1 = x3 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_16x32_8x16: + pipeBit0 = x4 ^ y3 ^ x5; + pipeBit1 = x3 ^ y4; + pipeBit2 = x4 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_16x32_16x16: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x5 ^ y4; + pipeBit2 = x4 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_32x32_8x16: + pipeBit0 = x4 ^ y3 ^ x5; + pipeBit1 = x3 ^ y4; + pipeBit2 = x5 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_32x32_16x16: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y4; + pipeBit2 = x5 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_32x32_16x32: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y6; + pipeBit2 = x5 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_32x64_32x32: + pipeBit0 = x3 ^ y3 ^ x5; + pipeBit1 = x6 ^ y5; + pipeBit2 = x5 ^ y6; + numPipes = 8; + break; + case ADDR_PIPECFG_P16_32x32_8x16: + pipeBit0 = x4 ^ y3; + pipeBit1 = x3 ^ y4; + pipeBit2 = x5 ^ y6; + pipeBit3 = x6 ^ y5; + numPipes = 16; + break; + case ADDR_PIPECFG_P16_32x32_16x16: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y4; + pipeBit2 = x5 ^ y6; + pipeBit3 = x6 ^ y5; + numPipes = 16; + break; + default: + ADDR_UNHANDLED_CASE(); + break; + } + + if (m_settings.isVegaM && (numPipes == 16)) + { + UINT_32 pipeMsb = pipeBit0; + pipeBit0 = pipeBit1; + pipeBit1 = pipeBit2; + pipeBit2 = pipeBit3; + pipeBit3 = pipeMsb; + } + + pipe = pipeBit0 | (pipeBit1 << 1) | (pipeBit2 << 2) | (pipeBit3 << 3); + + UINT_32 microTileThickness = Thickness(tileMode); + + // + // Apply pipe rotation for the slice. + // + switch (tileMode) + { + case ADDR_TM_3D_TILED_THIN1: //fall through thin + case ADDR_TM_3D_TILED_THICK: //fall through thick + case ADDR_TM_3D_TILED_XTHICK: + sliceRotation = + Max(1, static_cast(numPipes / 2) - 1) * (slice / microTileThickness); + break; + default: + sliceRotation = 0; + break; + } + pipeSwizzle += sliceRotation; + pipeSwizzle &= (numPipes - 1); + + pipe = pipe ^ pipeSwizzle; + + return pipe; +} + +/** +**************************************************************************************************** +* SiLib::ComputeTileCoordFromPipeAndElemIdx +* +* @brief +* Compute (x,y) of a tile within a macro tile from address +* @return +* Pipe number +**************************************************************************************************** +*/ +VOID SiLib::ComputeTileCoordFromPipeAndElemIdx( + UINT_32 elemIdx, ///< [in] per pipe element index within a macro tile + UINT_32 pipe, ///< [in] pipe index + AddrPipeCfg pipeCfg, ///< [in] pipe config + UINT_32 pitchInMacroTile, ///< [in] surface pitch in macro tile + UINT_32 x, ///< [in] x coordinate of the (0,0) tile in a macro tile + UINT_32 y, ///< [in] y coordinate of the (0,0) tile in a macro tile + UINT_32* pX, ///< [out] x coordinate + UINT_32* pY ///< [out] y coordinate + ) const +{ + UINT_32 pipebit0 = _BIT(pipe,0); + UINT_32 pipebit1 = _BIT(pipe,1); + UINT_32 pipebit2 = _BIT(pipe,2); + UINT_32 pipebit3 = _BIT(pipe,3); + UINT_32 elemIdx0 = _BIT(elemIdx,0); + UINT_32 elemIdx1 = _BIT(elemIdx,1); + UINT_32 elemIdx2 = _BIT(elemIdx,2); + UINT_32 x3 = 0; + UINT_32 x4 = 0; + UINT_32 x5 = 0; + UINT_32 x6 = 0; + UINT_32 y3 = 0; + UINT_32 y4 = 0; + UINT_32 y5 = 0; + UINT_32 y6 = 0; + + switch(pipeCfg) + { + case ADDR_PIPECFG_P2: + x4 = elemIdx2; + y4 = elemIdx1 ^ x4; + y3 = elemIdx0 ^ x4; + x3 = pipebit0 ^ y3; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P4_8x16: + x4 = elemIdx1; + y4 = elemIdx0 ^ x4; + x3 = pipebit1 ^ y4; + y3 = pipebit0 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P4_16x16: + x4 = elemIdx1; + y3 = elemIdx0 ^ x4; + y4 = pipebit1 ^ x4; + x3 = pipebit0 ^ y3 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P4_16x32: + x3 = elemIdx0 ^ pipebit0; + y5 = _BIT(y,5); + x4 = pipebit1 ^ y5; + y3 = pipebit0 ^ x3 ^ x4; + y4 = elemIdx1 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P4_32x32: + x4 = elemIdx2; + y3 = elemIdx0 ^ x4; + y4 = elemIdx1 ^ x4; + if((pitchInMacroTile % 2) == 0) + { //even + y5 = _BIT(y,5); + x5 = pipebit1 ^ y5; + x3 = pipebit0 ^ y3 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + else + { //odd + x5 = _BIT(x,5); + x3 = pipebit0 ^ y3 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + } + break; + case ADDR_PIPECFG_P8_16x16_8x16: + x4 = elemIdx0; + y5 = _BIT(y,5); + x5 = _BIT(x,5); + x3 = pipebit1 ^ y5; + y4 = pipebit2 ^ x4; + y3 = pipebit0 ^ x5 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P8_16x32_8x16: + x3 = elemIdx0; + y4 = pipebit1 ^ x3; + y5 = _BIT(y,5); + x5 = _BIT(x,5); + x4 = pipebit2 ^ y5; + y3 = pipebit0 ^ x4 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P8_32x32_8x16: + x4 = elemIdx1; + y4 = elemIdx0 ^ x4; + x3 = pipebit1 ^ y4; + if((pitchInMacroTile % 2) == 0) + { //even + y5 = _BIT(y,5); + x5 = _BIT(x,5); + x5 = pipebit2 ^ y5; + y3 = pipebit0 ^ x4 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + else + { //odd + x5 = _BIT(x,5); + y3 = pipebit0 ^ x4 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + } + break; + case ADDR_PIPECFG_P8_16x32_16x16: + x3 = elemIdx0; + x5 = _BIT(x,5); + y5 = _BIT(y,5); + x4 = pipebit2 ^ y5; + y4 = pipebit1 ^ x5; + y3 = pipebit0 ^ x3 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P8_32x32_16x16: + x4 = elemIdx1; + y3 = elemIdx0 ^ x4; + x3 = y3^x4^pipebit0; + y4 = pipebit1 ^ x4; + if((pitchInMacroTile % 2) == 0) + { //even + y5 = _BIT(y,5); + x5 = pipebit2 ^ y5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + else + { //odd + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + } + break; + case ADDR_PIPECFG_P8_32x32_16x32: + if((pitchInMacroTile % 2) == 0) + { //even + y5 = _BIT(y,5); + y6 = _BIT(y,6); + x4 = pipebit1 ^ y6; + y3 = elemIdx0 ^ x4; + y4 = elemIdx1 ^ x4; + x3 = pipebit0 ^ y3 ^ x4; + x5 = pipebit2 ^ y5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + else + { //odd + y6 = _BIT(y,6); + x4 = pipebit1 ^ y6; + y3 = elemIdx0 ^ x4; + y4 = elemIdx1 ^ x4; + x3 = pipebit0 ^ y3 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + } + break; + case ADDR_PIPECFG_P8_32x64_32x32: + x4 = elemIdx2; + y3 = elemIdx0 ^ x4; + y4 = elemIdx1 ^ x4; + if((pitchInMacroTile % 4) == 0) + { //multiple of 4 + y5 = _BIT(y,5); + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + x6 = pipebit1 ^ y5; + x3 = pipebit0 ^ y3 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(4, x6, x5, x4, x3); + } + else + { + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + x3 = pipebit0 ^ y3 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + break; + case ADDR_PIPECFG_P16_32x32_8x16: + x4 = elemIdx1; + y4 = elemIdx0 ^ x4; + y3 = pipebit0 ^ x4; + x3 = pipebit1 ^ y4; + if((pitchInMacroTile % 4) == 0) + { //multiple of 4 + y5 = _BIT(y,5); + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + x6 = pipebit3 ^ y5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(4, x6, x5,x4, x3); + } + else + { + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + break; + case ADDR_PIPECFG_P16_32x32_16x16: + x4 = elemIdx1; + y3 = elemIdx0 ^ x4; + y4 = pipebit1 ^ x4; + x3 = pipebit0 ^ y3 ^ x4; + if((pitchInMacroTile % 4) == 0) + { //multiple of 4 + y5 = _BIT(y,5); + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + x6 = pipebit3 ^ y5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(4, x6, x5, x4, x3); + } + else + { + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + break; + default: + ADDR_UNHANDLED_CASE(); + } +} + +/** +**************************************************************************************************** +* SiLib::TileCoordToMaskElementIndex +* +* @brief +* Compute element index from coordinates in tiles +* @return +* Element index +**************************************************************************************************** +*/ +UINT_32 SiLib::TileCoordToMaskElementIndex( + UINT_32 tx, ///< [in] x coord, in Tiles + UINT_32 ty, ///< [in] y coord, in Tiles + AddrPipeCfg pipeConfig, ///< [in] pipe config + UINT_32* macroShift, ///< [out] macro shift + UINT_32* elemIdxBits ///< [out] tile offset bits + ) const +{ + UINT_32 elemIdx = 0; + UINT_32 elemIdx0, elemIdx1, elemIdx2; + UINT_32 tx0, tx1; + UINT_32 ty0, ty1; + + tx0 = _BIT(tx,0); + tx1 = _BIT(tx,1); + ty0 = _BIT(ty,0); + ty1 = _BIT(ty,1); + + switch(pipeConfig) + { + case ADDR_PIPECFG_P2: + *macroShift = 3; + *elemIdxBits =3; + elemIdx2 = tx1; + elemIdx1 = tx1 ^ ty1; + elemIdx0 = tx1 ^ ty0; + elemIdx = Bits2Number(3,elemIdx2,elemIdx1,elemIdx0); + break; + case ADDR_PIPECFG_P4_8x16: + *macroShift = 2; + *elemIdxBits =2; + elemIdx1 = tx1; + elemIdx0 = tx1 ^ ty1; + elemIdx = Bits2Number(2,elemIdx1,elemIdx0); + break; + case ADDR_PIPECFG_P4_16x16: + *macroShift = 2; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P4_16x32: + *macroShift = 2; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1^ty1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P4_32x32: + *macroShift = 2; + *elemIdxBits =3; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1^ty1; + elemIdx2 = tx1; + elemIdx = Bits2Number(3, elemIdx2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P8_16x16_8x16: + *macroShift = 1; + *elemIdxBits =1; + elemIdx0 = tx1; + elemIdx = elemIdx0; + break; + case ADDR_PIPECFG_P8_16x32_8x16: + *macroShift = 1; + *elemIdxBits =1; + elemIdx0 = tx0; + elemIdx = elemIdx0; + break; + case ADDR_PIPECFG_P8_32x32_8x16: + *macroShift = 1; + *elemIdxBits =2; + elemIdx1 = tx1; + elemIdx0 = tx1^ty1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P8_16x32_16x16: + *macroShift = 1; + *elemIdxBits =1; + elemIdx0 = tx0; + elemIdx = elemIdx0; + break; + case ADDR_PIPECFG_P8_32x32_16x16: + *macroShift = 1; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P8_32x32_16x32: + *macroShift = 1; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1^ty1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P8_32x64_32x32: + *macroShift = 1; + *elemIdxBits =3; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1^ty1; + elemIdx2 = tx1; + elemIdx = Bits2Number(3, elemIdx2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P16_32x32_8x16: + *macroShift = 0; + *elemIdxBits =2; + elemIdx0 = tx1^ty1; + elemIdx1 = tx1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P16_32x32_16x16: + *macroShift = 0; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + default: + ADDR_UNHANDLED_CASE(); + break; + } + + return elemIdx; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeTileDataWidthAndHeightLinear +* +* @brief +* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout +* +* @return +* N/A +* +* @note +* MacroWidth and macroHeight are measured in pixels +**************************************************************************************************** +*/ +VOID SiLib::HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, ///< [out] macro tile width + UINT_32* pMacroHeight, ///< [out] macro tile height + UINT_32 bpp, ///< [in] bits per pixel + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + ADDR_ASSERT(pTileInfo != NULL); + UINT_32 macroWidth; + UINT_32 macroHeight; + + /// In linear mode, the htile or cmask buffer must be padded out to 4 tiles + /// but for P8_32x64_32x32, it must be padded out to 8 tiles + /// Actually there are more pipe configs which need 8-tile padding but SI family + /// has a bug which is fixed in CI family + if ((pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_8x16) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x32_16x16)) + { + macroWidth = 8*MicroTileWidth; + macroHeight = 8*MicroTileHeight; + } + else + { + macroWidth = 4*MicroTileWidth; + macroHeight = 4*MicroTileHeight; + } + + *pMacroWidth = macroWidth; + *pMacroHeight = macroHeight; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeHtileBytes +* +* @brief +* Compute htile size in bytes +* +* @return +* Htile size in bytes +**************************************************************************************************** +*/ +UINT_64 SiLib::HwlComputeHtileBytes( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 bpp, ///< [in] bits per pixel + BOOL_32 isLinear, ///< [in] if it is linear mode + UINT_32 numSlices, ///< [in] number of slices + UINT_64* pSliceBytes, ///< [out] bytes per slice + UINT_32 baseAlign ///< [in] base alignments + ) const +{ + return ComputeHtileBytes(pitch, height, bpp, isLinear, numSlices, pSliceBytes, baseAlign); +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeXmaskAddrFromCoord +* +* @brief +* Compute address from coordinates for htile/cmask +* @return +* Byte address +**************************************************************************************************** +*/ +UINT_64 SiLib::HwlComputeXmaskAddrFromCoord( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 x, ///< [in] x coord + UINT_32 y, ///< [in] y coord + UINT_32 slice, ///< [in] slice/depth index + UINT_32 numSlices, ///< [in] number of slices + UINT_32 factor, ///< [in] factor that indicates cmask(2) or htile(1) + BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout + BOOL_32 isWidth8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + BOOL_32 isHeight8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pBitPosition ///< [out] bit position inside a byte + ) const +{ + UINT_32 tx = x / MicroTileWidth; + UINT_32 ty = y / MicroTileHeight; + UINT_32 newPitch; + UINT_32 newHeight; + UINT_64 totalBytes; + UINT_32 macroWidth; + UINT_32 macroHeight; + UINT_64 pSliceBytes; + UINT_32 pBaseAlign; + UINT_32 tileNumPerPipe; + UINT_32 elemBits; + + if (factor == 2) //CMASK + { + ADDR_CMASK_FLAGS flags = {{0}}; + + tileNumPerPipe = 256; + + ComputeCmaskInfo(flags, + pitch, + height, + numSlices, + isLinear, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + ¯oWidth, + ¯oHeight); + elemBits = CmaskElemBits; + } + else //HTile + { + ADDR_HTILE_FLAGS flags = {{0}}; + + tileNumPerPipe = 512; + + ComputeHtileInfo(flags, + pitch, + height, + numSlices, + isLinear, + TRUE, + TRUE, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + ¯oWidth, + ¯oHeight, + &pSliceBytes, + &pBaseAlign); + elemBits = 32; + } + + const UINT_32 pitchInTile = newPitch / MicroTileWidth; + const UINT_32 heightInTile = newHeight / MicroTileWidth; + UINT_64 macroOffset; // Per pipe starting offset of the macro tile in which this tile lies. + UINT_64 microNumber; // Per pipe starting offset of the macro tile in which this tile lies. + UINT_32 microX; + UINT_32 microY; + UINT_64 microOffset; + UINT_32 microShift; + UINT_64 totalOffset; + UINT_32 elemIdxBits; + UINT_32 elemIdx = + TileCoordToMaskElementIndex(tx, ty, pTileInfo->pipeConfig, µShift, &elemIdxBits); + + UINT_32 numPipes = HwlGetPipes(pTileInfo); + + if (isLinear) + { //linear addressing + // Linear addressing is extremelly wasting memory if slice > 1, since each pipe has the full + // slice memory foot print instead of divided by numPipes. + microX = tx / 4; // Macro Tile is 4x4 + microY = ty / 4 ; + microNumber = static_cast(microX + microY * (pitchInTile / 4)) << microShift; + + UINT_32 sliceBits = pitchInTile * heightInTile; + + // do htile single slice alignment if the flag is true + if (m_configFlags.useHtileSliceAlign && (factor == 1)) //Htile + { + sliceBits = PowTwoAlign(sliceBits, BITS_TO_BYTES(HtileCacheBits) * numPipes / elemBits); + } + macroOffset = slice * (sliceBits / numPipes) * elemBits ; + } + else + { //tiled addressing + const UINT_32 macroWidthInTile = macroWidth / MicroTileWidth; // Now in unit of Tiles + const UINT_32 macroHeightInTile = macroHeight / MicroTileHeight; + const UINT_32 pitchInCL = pitchInTile / macroWidthInTile; + const UINT_32 heightInCL = heightInTile / macroHeightInTile; + + const UINT_32 macroX = x / macroWidth; + const UINT_32 macroY = y / macroHeight; + const UINT_32 macroNumber = macroX + macroY * pitchInCL + slice * pitchInCL * heightInCL; + + // Per pipe starting offset of the cache line in which this tile lies. + microX = (x % macroWidth) / MicroTileWidth / 4; // Macro Tile is 4x4 + microY = (y % macroHeight) / MicroTileHeight / 4 ; + microNumber = static_cast(microX + microY * (macroWidth / MicroTileWidth / 4)) << microShift; + + macroOffset = macroNumber * tileNumPerPipe * elemBits; + } + + if(elemIdxBits == microShift) + { + microNumber += elemIdx; + } + else + { + microNumber >>= elemIdxBits; + microNumber <<= elemIdxBits; + microNumber += elemIdx; + } + + microOffset = elemBits * microNumber; + totalOffset = microOffset + macroOffset; + + UINT_32 pipe = ComputePipeFromCoord(x, y, 0, ADDR_TM_2D_TILED_THIN1, 0, FALSE, pTileInfo); + UINT_64 addrInBits = totalOffset % (m_pipeInterleaveBytes * 8) + + pipe * (m_pipeInterleaveBytes * 8) + + totalOffset / (m_pipeInterleaveBytes * 8) * (m_pipeInterleaveBytes * 8) * numPipes; + *pBitPosition = static_cast(addrInBits) % 8; + UINT_64 addr = addrInBits / 8; + + return addr; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeXmaskCoordFromAddr +* +* @brief +* Compute the coord from an address of a cmask/htile +* +* @return +* N/A +* +* @note +* This method is reused by htile, so rename to Xmask +**************************************************************************************************** +*/ +VOID SiLib::HwlComputeXmaskCoordFromAddr( + UINT_64 addr, ///< [in] address + UINT_32 bitPosition, ///< [in] bitPosition in a byte + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices, ///< [in] number of slices + UINT_32 factor, ///< [in] factor that indicates cmask or htile + BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout + BOOL_32 isWidth8, ///< [in] Not used by SI + BOOL_32 isHeight8, ///< [in] Not used by SI + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pX, ///< [out] x coord + UINT_32* pY, ///< [out] y coord + UINT_32* pSlice ///< [out] slice index + ) const +{ + UINT_32 newPitch; + UINT_32 newHeight; + UINT_64 totalBytes; + UINT_32 clWidth; + UINT_32 clHeight; + UINT_32 tileNumPerPipe; + UINT_64 sliceBytes; + + *pX = 0; + *pY = 0; + *pSlice = 0; + + if (factor == 2) //CMASK + { + ADDR_CMASK_FLAGS flags = {{0}}; + + tileNumPerPipe = 256; + + ComputeCmaskInfo(flags, + pitch, + height, + numSlices, + isLinear, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + &clWidth, + &clHeight); + } + else //HTile + { + ADDR_HTILE_FLAGS flags = {{0}}; + + tileNumPerPipe = 512; + + ComputeHtileInfo(flags, + pitch, + height, + numSlices, + isLinear, + TRUE, + TRUE, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + &clWidth, + &clHeight, + &sliceBytes); + } + + const UINT_32 pitchInTile = newPitch / MicroTileWidth; + const UINT_32 heightInTile = newHeight / MicroTileWidth; + const UINT_32 pitchInMacroTile = pitchInTile / 4; + UINT_32 macroShift; + UINT_32 elemIdxBits; + // get macroShift and elemIdxBits + TileCoordToMaskElementIndex(0, 0, pTileInfo->pipeConfig, ¯oShift, &elemIdxBits); + + const UINT_32 numPipes = HwlGetPipes(pTileInfo); + const UINT_32 pipe = (UINT_32)((addr / m_pipeInterleaveBytes) % numPipes); + // per pipe + UINT_64 localOffset = (addr % m_pipeInterleaveBytes) + + (addr / m_pipeInterleaveBytes / numPipes)* m_pipeInterleaveBytes; + + UINT_32 tileIndex; + if (factor == 2) //CMASK + { + tileIndex = (UINT_32)(localOffset * 2 + (bitPosition != 0)); + } + else + { + tileIndex = (UINT_32)(localOffset / 4); + } + + UINT_32 macroOffset; + if (isLinear) + { + UINT_32 sliceSizeInTile = pitchInTile * heightInTile; + + // do htile single slice alignment if the flag is true + if (m_configFlags.useHtileSliceAlign && (factor == 1)) //Htile + { + sliceSizeInTile = PowTwoAlign(sliceSizeInTile, static_cast(sliceBytes) / 64); + } + *pSlice = tileIndex / (sliceSizeInTile / numPipes); + macroOffset = tileIndex % (sliceSizeInTile / numPipes); + } + else + { + const UINT_32 clWidthInTile = clWidth / MicroTileWidth; // Now in unit of Tiles + const UINT_32 clHeightInTile = clHeight / MicroTileHeight; + const UINT_32 pitchInCL = pitchInTile / clWidthInTile; + const UINT_32 heightInCL = heightInTile / clHeightInTile; + const UINT_32 clIndex = tileIndex / tileNumPerPipe; + + UINT_32 clX = clIndex % pitchInCL; + UINT_32 clY = (clIndex % (heightInCL * pitchInCL)) / pitchInCL; + + *pX = clX * clWidthInTile * MicroTileWidth; + *pY = clY * clHeightInTile * MicroTileHeight; + *pSlice = clIndex / (heightInCL * pitchInCL); + + macroOffset = tileIndex % tileNumPerPipe; + } + + UINT_32 elemIdx = macroOffset & 7; + macroOffset >>= elemIdxBits; + + if (elemIdxBits != macroShift) + { + macroOffset <<= (elemIdxBits - macroShift); + + UINT_32 pipebit1 = _BIT(pipe,1); + UINT_32 pipebit2 = _BIT(pipe,2); + UINT_32 pipebit3 = _BIT(pipe,3); + if (pitchInMacroTile % 2) + { //odd + switch (pTileInfo->pipeConfig) + { + case ADDR_PIPECFG_P4_32x32: + macroOffset |= pipebit1; + break; + case ADDR_PIPECFG_P8_32x32_8x16: + case ADDR_PIPECFG_P8_32x32_16x16: + case ADDR_PIPECFG_P8_32x32_16x32: + macroOffset |= pipebit2; + break; + default: + break; + } + + } + + if (pitchInMacroTile % 4) + { + if (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32) + { + macroOffset |= (pipebit1<<1); + } + if ((pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_8x16) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_16x16) + ) + { + macroOffset |= (pipebit3<<1); + } + } + } + + UINT_32 macroX; + UINT_32 macroY; + + if (isLinear) + { + macroX = macroOffset % pitchInMacroTile; + macroY = macroOffset / pitchInMacroTile; + } + else + { + const UINT_32 clWidthInMacroTile = clWidth / (MicroTileWidth * 4); + macroX = macroOffset % clWidthInMacroTile; + macroY = macroOffset / clWidthInMacroTile; + } + + *pX += macroX * 4 * MicroTileWidth; + *pY += macroY * 4 * MicroTileHeight; + + UINT_32 microX; + UINT_32 microY; + ComputeTileCoordFromPipeAndElemIdx(elemIdx, pipe, pTileInfo->pipeConfig, pitchInMacroTile, + *pX, *pY, µX, µY); + + *pX += microX * MicroTileWidth; + *pY += microY * MicroTileWidth; +} + +/** +**************************************************************************************************** +* SiLib::HwlGetPitchAlignmentLinear +* @brief +* Get pitch alignment +* @return +* pitch alignment +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlGetPitchAlignmentLinear( + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags ///< [in] surface flags + ) const +{ + UINT_32 pitchAlign; + + // Interleaved access requires a 256B aligned pitch, so fall back to pre-SI alignment + if (flags.interleaved) + { + pitchAlign = Max(64u, m_pipeInterleaveBytes / BITS_TO_BYTES(bpp)); + + } + else + { + pitchAlign = Max(8u, 64 / BITS_TO_BYTES(bpp)); + } + + return pitchAlign; +} + +/** +**************************************************************************************************** +* SiLib::HwlGetSizeAdjustmentLinear +* +* @brief +* Adjust linear surface pitch and slice size +* +* @return +* Logical slice size in bytes +**************************************************************************************************** +*/ +UINT_64 SiLib::HwlGetSizeAdjustmentLinear( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 numSamples, ///< [in] number of samples + UINT_32 baseAlign, ///< [in] base alignment + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32* pPitch, ///< [in,out] pointer to pitch + UINT_32* pHeight, ///< [in,out] pointer to height + UINT_32* pHeightAlign ///< [in,out] pointer to height align + ) const +{ + UINT_64 sliceSize; + if (tileMode == ADDR_TM_LINEAR_GENERAL) + { + sliceSize = BITS_TO_BYTES(static_cast(*pPitch) * (*pHeight) * bpp * numSamples); + } + else + { + UINT_32 pitch = *pPitch; + UINT_32 height = *pHeight; + + UINT_32 pixelsPerPipeInterleave = m_pipeInterleaveBytes / BITS_TO_BYTES(bpp); + UINT_32 sliceAlignInPixel = pixelsPerPipeInterleave < 64 ? 64 : pixelsPerPipeInterleave; + + // numSamples should be 1 in real cases (no MSAA for linear but TGL may pass non 1 value) + UINT_64 pixelPerSlice = static_cast(pitch) * height * numSamples; + + while (pixelPerSlice % sliceAlignInPixel) + { + pitch += pitchAlign; + pixelPerSlice = static_cast(pitch) * height * numSamples; + } + + *pPitch = pitch; + + UINT_32 heightAlign = 1; + + while ((pitch * heightAlign) % sliceAlignInPixel) + { + heightAlign++; + } + + *pHeightAlign = heightAlign; + + sliceSize = BITS_TO_BYTES(pixelPerSlice * bpp); + } + + return sliceSize; +} + +/** +**************************************************************************************************** +* SiLib::HwlPreHandleBaseLvl3xPitch +* +* @brief +* Pre-handler of 3x pitch (96 bit) adjustment +* +* @return +* Expected pitch +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlPreHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input + UINT_32 expPitch ///< [in] pitch + ) const +{ + ADDR_ASSERT(pIn->width == expPitch); + + // From SI, if pow2Pad is 1 the pitch is expanded 3x first, then padded to pow2, so nothing to + // do here + if (pIn->flags.pow2Pad == FALSE) + { + Addr::V1::Lib::HwlPreHandleBaseLvl3xPitch(pIn, expPitch); + } + else + { + ADDR_ASSERT(IsPow2(expPitch)); + } + + return expPitch; +} + +/** +**************************************************************************************************** +* SiLib::HwlPostHandleBaseLvl3xPitch +* +* @brief +* Post-handler of 3x pitch adjustment +* +* @return +* Expected pitch +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlPostHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input + UINT_32 expPitch ///< [in] pitch + ) const +{ + /** + * @note The pitch will be divided by 3 in the end so the value will look odd but h/w should + * be able to compute a correct pitch from it as h/w address library is doing the job. + */ + // From SI, the pitch is expanded 3x first, then padded to pow2, so no special handler here + if (pIn->flags.pow2Pad == FALSE) + { + Addr::V1::Lib::HwlPostHandleBaseLvl3xPitch(pIn, expPitch); + } + + return expPitch; +} + +/** +**************************************************************************************************** +* SiLib::HwlGetPitchAlignmentMicroTiled +* +* @brief +* Compute 1D tiled surface pitch alignment +* +* @return +* pitch alignment +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlGetPitchAlignmentMicroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples ///< [in] number of samples + ) const +{ + UINT_32 pitchAlign; + + if (flags.qbStereo) + { + pitchAlign = EgBasedLib::HwlGetPitchAlignmentMicroTiled(tileMode,bpp,flags,numSamples); + } + else + { + pitchAlign = 8; + } + + return pitchAlign; +} + +/** +**************************************************************************************************** +* SiLib::HwlGetSizeAdjustmentMicroTiled +* +* @brief +* Adjust 1D tiled surface pitch and slice size +* +* @return +* Logical slice size in bytes +**************************************************************************************************** +*/ +UINT_64 SiLib::HwlGetSizeAdjustmentMicroTiled( + UINT_32 thickness, ///< [in] thickness + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + UINT_32 baseAlign, ///< [in] base alignment + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32* pPitch, ///< [in,out] pointer to pitch + UINT_32* pHeight ///< [in,out] pointer to height + ) const +{ + UINT_64 logicalSliceSize; + UINT_64 physicalSliceSize; + + UINT_32 pitch = *pPitch; + UINT_32 height = *pHeight; + + // Logical slice: pitch * height * bpp * numSamples (no 1D MSAA so actually numSamples == 1) + logicalSliceSize = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); + + // Physical slice: multiplied by thickness + physicalSliceSize = logicalSliceSize * thickness; + + // Pitch alignment is always 8, so if slice size is not padded to base alignment + // (pipe_interleave_size), we need to increase pitch + while ((physicalSliceSize % baseAlign) != 0) + { + pitch += pitchAlign; + + logicalSliceSize = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); + + physicalSliceSize = logicalSliceSize * thickness; + } + +#if !ALT_TEST + // + // Special workaround for depth/stencil buffer, use 8 bpp to align depth buffer again since + // the stencil plane may have larger pitch if the slice size is smaller than base alignment. + // + // Note: this actually does not work for mipmap but mipmap depth texture is not really + // sampled with mipmap. + // + if (flags.depth && (flags.noStencil == FALSE)) + { + ADDR_ASSERT(numSamples == 1); + + UINT_64 logicalSiceSizeStencil = static_cast(pitch) * height; // 1 byte stencil + + while ((logicalSiceSizeStencil % baseAlign) != 0) + { + pitch += pitchAlign; // Stencil plane's pitch alignment is the same as depth plane's + + logicalSiceSizeStencil = static_cast(pitch) * height; + } + + if (pitch != *pPitch) + { + // If this is a mipmap, this padded one cannot be sampled as a whole mipmap! + logicalSliceSize = logicalSiceSizeStencil * BITS_TO_BYTES(bpp); + } + } +#endif + *pPitch = pitch; + + // No adjust for pHeight + + return logicalSliceSize; +} + +/** +**************************************************************************************************** +* SiLib::HwlConvertChipFamily +* +* @brief +* Convert familyID defined in atiid.h to ChipFamily and set m_chipFamily/m_chipRevision +* @return +* ChipFamily +**************************************************************************************************** +*/ +ChipFamily SiLib::HwlConvertChipFamily( + UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h + UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h +{ + ChipFamily family = ADDR_CHIP_FAMILY_SI; + + switch (uChipFamily) + { + case FAMILY_SI: + m_settings.isSouthernIsland = 1; + m_settings.isTahiti = ASICREV_IS_TAHITI_P(uChipRevision); + m_settings.isPitCairn = ASICREV_IS_PITCAIRN_PM(uChipRevision); + m_settings.isCapeVerde = ASICREV_IS_CAPEVERDE_M(uChipRevision); + m_settings.isOland = ASICREV_IS_OLAND_M(uChipRevision); + m_settings.isHainan = ASICREV_IS_HAINAN_V(uChipRevision); + break; + default: + ADDR_ASSERT(!"This should be a Fusion"); + break; + } + + return family; +} + +/** +**************************************************************************************************** +* SiLib::HwlSetupTileInfo +* +* @brief +* Setup default value of tile info for SI +**************************************************************************************************** +*/ +VOID SiLib::HwlSetupTileInfo( + AddrTileMode tileMode, ///< [in] Tile mode + ADDR_SURFACE_FLAGS flags, ///< [in] Surface type flags + UINT_32 bpp, ///< [in] Bits per pixel + UINT_32 pitch, ///< [in] Pitch in pixels + UINT_32 height, ///< [in] Height in pixels + UINT_32 numSamples, ///< [in] Number of samples + ADDR_TILEINFO* pTileInfoIn, ///< [in] Tile info input: NULL for default + ADDR_TILEINFO* pTileInfoOut, ///< [out] Tile info output + AddrTileType inTileType, ///< [in] Tile type + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] Output + ) const +{ + UINT_32 thickness = Thickness(tileMode); + ADDR_TILEINFO* pTileInfo = pTileInfoOut; + INT index = TileIndexInvalid; + + // Fail-safe code + if (IsLinear(tileMode) == FALSE) + { + // 128 bpp/thick tiling must be non-displayable. + // Fmask reuse color buffer's entry but bank-height field can be from another entry + // To simplify the logic, fmask entry should be picked from non-displayable ones + if (bpp == 128 || thickness > 1 || flags.fmask || flags.prt) + { + inTileType = ADDR_NON_DISPLAYABLE; + } + + if (flags.depth || flags.stencil) + { + inTileType = ADDR_DEPTH_SAMPLE_ORDER; + } + } + + // Partial valid fields are not allowed for SI. + if (IsTileInfoAllZero(pTileInfo)) + { + if (IsMacroTiled(tileMode)) + { + if (flags.prt) + { + if (numSamples == 1) + { + if (flags.depth) + { + switch (bpp) + { + case 16: + index = 3; + break; + case 32: + index = 6; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + else + { + switch (bpp) + { + case 8: + index = 21; + break; + case 16: + index = 22; + break; + case 32: + index = 23; + break; + case 64: + index = 24; + break; + case 128: + index = 25; + break; + default: + break; + } + + if (thickness > 1) + { + ADDR_ASSERT(bpp != 128); + index += 5; + } + } + } + else + { + ADDR_ASSERT(numSamples == 4); + + if (flags.depth) + { + switch (bpp) + { + case 16: + index = 5; + break; + case 32: + index = 7; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + else + { + switch (bpp) + { + case 8: + index = 23; + break; + case 16: + index = 24; + break; + case 32: + index = 25; + break; + case 64: + index = 30; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + } + }//end of PRT part + // See table entries 0-7 + else if (flags.depth || flags.stencil) + { + if (flags.compressZ) + { + if (flags.stencil) + { + index = 0; + } + else + { + // optimal tile index for compressed depth/stencil. + switch (numSamples) + { + case 1: + index = 0; + break; + case 2: + case 4: + index = 1; + break; + case 8: + index = 2; + break; + default: + break; + } + } + } + else // unCompressZ + { + index = 3; + } + } + else //non PRT & non Depth & non Stencil + { + // See table entries 9-12 + if (inTileType == ADDR_DISPLAYABLE) + { + switch (bpp) + { + case 8: + index = 10; + break; + case 16: + index = 11; + break; + case 32: + index = 12; + break; + case 64: + index = 12; + break; + default: + break; + } + } + else + { + // See table entries 13-17 + if (thickness == 1) + { + if (flags.fmask) + { + UINT_32 fmaskPixelSize = bpp * numSamples; + + switch (fmaskPixelSize) + { + case 8: + index = 14; + break; + case 16: + index = 15; + break; + case 32: + index = 16; + break; + case 64: + index = 17; + break; + default: + ADDR_ASSERT_ALWAYS(); + } + } + else + { + switch (bpp) + { + case 8: + index = 14; + break; + case 16: + index = 15; + break; + case 32: + index = 16; + break; + case 64: + index = 17; + break; + case 128: + index = 17; + break; + default: + break; + } + } + } + else // thick tiling - entries 18-20 + { + switch (thickness) + { + case 4: + index = 20; + break; + case 8: + index = 19; + break; + default: + break; + } + } + } + } + } + else + { + if (tileMode == ADDR_TM_LINEAR_ALIGNED) + { + index = 8; + } + else if (tileMode == ADDR_TM_LINEAR_GENERAL) + { + index = TileIndexLinearGeneral; + } + else + { + if (flags.depth || flags.stencil) + { + index = 4; + } + else if (inTileType == ADDR_DISPLAYABLE) + { + index = 9; + } + else if (thickness == 1) + { + index = 13; + } + else + { + index = 18; + } + } + } + + if (index >= 0 && index <= 31) + { + *pTileInfo = m_tileTable[index].info; + pOut->tileType = m_tileTable[index].type; + } + + if (index == TileIndexLinearGeneral) + { + *pTileInfo = m_tileTable[8].info; + pOut->tileType = m_tileTable[8].type; + } + } + else + { + if (pTileInfoIn) + { + if (flags.stencil && pTileInfoIn->tileSplitBytes == 0) + { + // Stencil always uses index 0 + *pTileInfo = m_tileTable[0].info; + } + } + // Pass through tile type + pOut->tileType = inTileType; + } + + pOut->tileIndex = index; + pOut->prtTileIndex = flags.prt; +} + +/** +**************************************************************************************************** +* SiLib::DecodeGbRegs +* +* @brief +* Decodes GB_ADDR_CONFIG and noOfBanks/noOfRanks +* +* @return +* TRUE if all settings are valid +* +**************************************************************************************************** +*/ +BOOL_32 SiLib::DecodeGbRegs( + const ADDR_REGISTER_VALUE* pRegValue) ///< [in] create input +{ + GB_ADDR_CONFIG reg; + BOOL_32 valid = TRUE; + + reg.val = pRegValue->gbAddrConfig; + + switch (reg.f.pipe_interleave_size) + { + case ADDR_CONFIG_PIPE_INTERLEAVE_256B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_256B; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_512B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_512B; + break; + default: + valid = FALSE; + ADDR_UNHANDLED_CASE(); + break; + } + + switch (reg.f.row_size) + { + case ADDR_CONFIG_1KB_ROW: + m_rowSize = ADDR_ROWSIZE_1KB; + break; + case ADDR_CONFIG_2KB_ROW: + m_rowSize = ADDR_ROWSIZE_2KB; + break; + case ADDR_CONFIG_4KB_ROW: + m_rowSize = ADDR_ROWSIZE_4KB; + break; + default: + valid = FALSE; + ADDR_UNHANDLED_CASE(); + break; + } + + switch (pRegValue->noOfBanks) + { + case 0: + m_banks = 4; + break; + case 1: + m_banks = 8; + break; + case 2: + m_banks = 16; + break; + default: + valid = FALSE; + ADDR_UNHANDLED_CASE(); + break; + } + + switch (pRegValue->noOfRanks) + { + case 0: + m_ranks = 1; + break; + case 1: + m_ranks = 2; + break; + default: + valid = FALSE; + ADDR_UNHANDLED_CASE(); + break; + } + + m_logicalBanks = m_banks * m_ranks; + + ADDR_ASSERT(m_logicalBanks <= 16); + + return valid; +} + +/** +**************************************************************************************************** +* SiLib::HwlInitGlobalParams +* +* @brief +* Initializes global parameters +* +* @return +* TRUE if all settings are valid +* +**************************************************************************************************** +*/ +BOOL_32 SiLib::HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input +{ + BOOL_32 valid = TRUE; + const ADDR_REGISTER_VALUE* pRegValue = &pCreateIn->regValue; + + valid = DecodeGbRegs(pRegValue); + + if (valid) + { + if (m_settings.isTahiti || m_settings.isPitCairn) + { + m_pipes = 8; + } + else if (m_settings.isCapeVerde || m_settings.isOland) + { + m_pipes = 4; + } + else + { + // Hainan is 2-pipe (m_settings.isHainan == 1) + m_pipes = 2; + } + + valid = InitTileSettingTable(pRegValue->pTileConfig, pRegValue->noOfEntries); + + if (valid) + { + InitEquationTable(); + } + + m_maxSamples = 16; + } + + return valid; +} + +/** +**************************************************************************************************** +* SiLib::HwlConvertTileInfoToHW +* @brief +* Entry of si's ConvertTileInfoToHW +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE SiLib::HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + retCode = EgBasedLib::HwlConvertTileInfoToHW(pIn, pOut); + + if (retCode == ADDR_OK) + { + if (pIn->reverse == FALSE) + { + if (pIn->pTileInfo->pipeConfig == ADDR_PIPECFG_INVALID) + { + retCode = ADDR_INVALIDPARAMS; + } + else + { + pOut->pTileInfo->pipeConfig = + static_cast(pIn->pTileInfo->pipeConfig - 1); + } + } + else + { + pOut->pTileInfo->pipeConfig = + static_cast(pIn->pTileInfo->pipeConfig + 1); + } + } + + return retCode; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeXmaskCoordYFrom8Pipe +* +* @brief +* Compute the Y coord which will be added to Xmask Y +* coord. +* @return +* Y coord +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlComputeXmaskCoordYFrom8Pipe( + UINT_32 pipe, ///< [in] pipe id + UINT_32 x ///< [in] tile coord x, which is original x coord / 8 + ) const +{ + // This function should never be called since it is 6xx/8xx specfic. + // Keep this empty implementation to avoid any mis-use. + ADDR_ASSERT_ALWAYS(); + + return 0; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeSurfaceCoord2DFromBankPipe +* +* @brief +* Compute surface x,y coordinates from bank/pipe info +* @return +* N/A +**************************************************************************************************** +*/ +VOID SiLib::HwlComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32* pX, ///< [in,out] x coordinate + UINT_32* pY, ///< [in,out] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 bank, ///< [in] bank number + UINT_32 pipe, ///< [in] pipe number + UINT_32 bankSwizzle,///< [in] bank swizzle + UINT_32 pipeSwizzle,///< [in] pipe swizzle + UINT_32 tileSlices, ///< [in] slices in a micro tile + BOOL_32 ignoreSE, ///< [in] TRUE if shader engines are ignored + ADDR_TILEINFO* pTileInfo ///< [in] bank structure. **All fields to be valid on entry** + ) const +{ + UINT_32 xBit; + UINT_32 yBit; + UINT_32 yBit3 = 0; + UINT_32 yBit4 = 0; + UINT_32 yBit5 = 0; + UINT_32 yBit6 = 0; + + UINT_32 xBit3 = 0; + UINT_32 xBit4 = 0; + UINT_32 xBit5 = 0; + + UINT_32 numPipes = GetPipePerSurf(pTileInfo->pipeConfig); + + CoordFromBankPipe xyBits = {0}; + ComputeSurfaceCoord2DFromBankPipe(tileMode, *pX, *pY, slice, bank, pipe, + bankSwizzle, pipeSwizzle, tileSlices, pTileInfo, + &xyBits); + yBit3 = xyBits.yBit3; + yBit4 = xyBits.yBit4; + yBit5 = xyBits.yBit5; + yBit6 = xyBits.yBit6; + + xBit3 = xyBits.xBit3; + xBit4 = xyBits.xBit4; + xBit5 = xyBits.xBit5; + + yBit = xyBits.yBits; + + UINT_32 yBitTemp = 0; + + if ((pTileInfo->pipeConfig == ADDR_PIPECFG_P4_32x32) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32)) + { + ADDR_ASSERT(pTileInfo->bankWidth == 1 && pTileInfo->macroAspectRatio > 1); + UINT_32 yBitToCheck = QLog2(pTileInfo->banks) - 1; + + ADDR_ASSERT(yBitToCheck <= 3); + + yBitTemp = _BIT(yBit, yBitToCheck); + + xBit3 = 0; + } + + yBit = Bits2Number(4, yBit6, yBit5, yBit4, yBit3); + xBit = Bits2Number(3, xBit5, xBit4, xBit3); + + *pY += yBit * pTileInfo->bankHeight * MicroTileHeight; + *pX += xBit * numPipes * pTileInfo->bankWidth * MicroTileWidth; + + //calculate the bank and pipe bits in x, y + UINT_32 xTile; //x in micro tile + UINT_32 x3 = 0; + UINT_32 x4 = 0; + UINT_32 x5 = 0; + UINT_32 x6 = 0; + UINT_32 y = *pY; + + UINT_32 pipeBit0 = _BIT(pipe,0); + UINT_32 pipeBit1 = _BIT(pipe,1); + UINT_32 pipeBit2 = _BIT(pipe,2); + + UINT_32 y3 = _BIT(y, 3); + UINT_32 y4 = _BIT(y, 4); + UINT_32 y5 = _BIT(y, 5); + UINT_32 y6 = _BIT(y, 6); + + // bankbit0 after ^x4^x5 + UINT_32 bankBit00 = _BIT(bank,0); + UINT_32 bankBit0 = 0; + + switch (pTileInfo->pipeConfig) + { + case ADDR_PIPECFG_P2: + x3 = pipeBit0 ^ y3; + break; + case ADDR_PIPECFG_P4_8x16: + x4 = pipeBit0 ^ y3; + x3 = pipeBit0 ^ y4; + break; + case ADDR_PIPECFG_P4_16x16: + x4 = pipeBit1 ^ y4; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P4_16x32: + x4 = pipeBit1 ^ y4; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P4_32x32: + x5 = pipeBit1 ^ y5; + x3 = pipeBit0 ^ y3 ^ x5; + bankBit0 = yBitTemp ^ x5; + x4 = bankBit00 ^ x5 ^ bankBit0; + *pX += x5 * 4 * 1 * 8; // x5 * num_pipes * bank_width * 8; + break; + case ADDR_PIPECFG_P8_16x16_8x16: + x3 = pipeBit1 ^ y5; + x4 = pipeBit2 ^ y4; + x5 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_16x32_8x16: + x3 = pipeBit1 ^ y4; + x4 = pipeBit2 ^ y5; + x5 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_32x32_8x16: + x3 = pipeBit1 ^ y4; + x5 = pipeBit2 ^ y5; + x4 = pipeBit0 ^ y3 ^ x5; + break; + case ADDR_PIPECFG_P8_16x32_16x16: + x4 = pipeBit2 ^ y5; + x5 = pipeBit1 ^ y4; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_32x32_16x16: + x5 = pipeBit2 ^ y5; + x4 = pipeBit1 ^ y4; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_32x32_16x32: + x5 = pipeBit2 ^ y5; + x4 = pipeBit1 ^ y6; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_32x64_32x32: + x6 = pipeBit1 ^ y5; + x5 = pipeBit2 ^ y6; + x3 = pipeBit0 ^ y3 ^ x5; + bankBit0 = yBitTemp ^ x6; + x4 = bankBit00 ^ x5 ^ bankBit0; + *pX += x6 * 8 * 1 * 8; // x6 * num_pipes * bank_width * 8; + break; + default: + ADDR_ASSERT_ALWAYS(); + } + + xTile = Bits2Number(3, x5, x4, x3); + + *pX += xTile << 3; +} + +/** +**************************************************************************************************** +* SiLib::HwlPreAdjustBank +* +* @brief +* Adjust bank before calculating address acoording to bank/pipe +* @return +* Adjusted bank +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlPreAdjustBank( + UINT_32 tileX, ///< [in] x coordinate in unit of tile + UINT_32 bank, ///< [in] bank + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + if (((pTileInfo->pipeConfig == ADDR_PIPECFG_P4_32x32) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32)) && (pTileInfo->bankWidth == 1)) + { + UINT_32 bankBit0 = _BIT(bank, 0); + UINT_32 x4 = _BIT(tileX, 1); + UINT_32 x5 = _BIT(tileX, 2); + + bankBit0 = bankBit0 ^ x4 ^ x5; + bank |= bankBit0; + + ADDR_ASSERT(pTileInfo->macroAspectRatio > 1); + } + + return bank; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeSurfaceInfo +* +* @brief +* Entry of si's ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE SiLib::HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + pOut->tileIndex = pIn->tileIndex; + + ADDR_E_RETURNCODE retCode = EgBasedLib::HwlComputeSurfaceInfo(pIn, pOut); + + UINT_32 tileIndex = static_cast(pOut->tileIndex); + + if (((pIn->flags.needEquation == TRUE) || + (pIn->flags.preferEquation == TRUE)) && + (pIn->numSamples <= 1) && + (tileIndex < TileTableSize)) + { + static const UINT_32 SiUncompressDepthTileIndex = 3; + + if ((pIn->numSlices > 1) && + (IsMacroTiled(pOut->tileMode) == TRUE) && + ((m_chipFamily == ADDR_CHIP_FAMILY_SI) || + (IsPrtTileMode(pOut->tileMode) == FALSE))) + { + pOut->equationIndex = ADDR_INVALID_EQUATION_INDEX; + } + else if ((pIn->flags.prt == FALSE) && + (m_uncompressDepthEqIndex != 0) && + (tileIndex == SiUncompressDepthTileIndex)) + { + pOut->equationIndex = m_uncompressDepthEqIndex + Log2(pIn->bpp >> 3); + } + else + { + + pOut->equationIndex = m_equationLookupTable[Log2(pIn->bpp >> 3)][tileIndex]; + } + + if (pOut->equationIndex != ADDR_INVALID_EQUATION_INDEX) + { + pOut->blockWidth = m_blockWidth[pOut->equationIndex]; + + pOut->blockHeight = m_blockHeight[pOut->equationIndex]; + + pOut->blockSlices = m_blockSlices[pOut->equationIndex]; + } + } + else + { + pOut->equationIndex = ADDR_INVALID_EQUATION_INDEX; + } + + return retCode; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeMipLevel +* @brief +* Compute MipLevel info (including level 0) +* @return +* TRUE if HWL's handled +**************************************************************************************************** +*/ +BOOL_32 SiLib::HwlComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in,out] Input structure + ) const +{ + // basePitch is calculated from level 0 so we only check this for mipLevel > 0 + if (pIn->mipLevel > 0) + { + // Note: Don't check expand 3x formats(96 bit) as the basePitch is not pow2 even if + // we explicity set pow2Pad flag. The 3x base pitch is padded to pow2 but after being + // divided by expandX factor (3) - to program texture pitch, the basePitch is never pow2. + if (ElemLib::IsExpand3x(pIn->format) == FALSE) + { + // Sublevel pitches are generated from base level pitch instead of width on SI + // If pow2Pad is 0, we don't assert - as this is not really used for a mip chain + ADDR_ASSERT((pIn->flags.pow2Pad == FALSE) || + ((pIn->basePitch != 0) && IsPow2(pIn->basePitch))); + } + + if (pIn->basePitch != 0) + { + pIn->width = Max(1u, pIn->basePitch >> pIn->mipLevel); + } + } + + // pow2Pad is done in PostComputeMipLevel + + return TRUE; +} + +/** +**************************************************************************************************** +* SiLib::HwlCheckLastMacroTiledLvl +* +* @brief +* Sets pOut->last2DLevel to TRUE if it is +* @note +* +**************************************************************************************************** +*/ +VOID SiLib::HwlCheckLastMacroTiledLvl( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in,out] Output structure (used as input, too) + ) const +{ + // pow2Pad covers all mipmap cases + if (pIn->flags.pow2Pad) + { + ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); + + UINT_32 nextPitch; + UINT_32 nextHeight; + UINT_32 nextSlices; + + AddrTileMode nextTileMode; + + if (pIn->mipLevel == 0 || pIn->basePitch == 0) + { + // Base level or fail-safe case (basePitch == 0) + nextPitch = pOut->pitch >> 1; + } + else + { + // Sub levels + nextPitch = pIn->basePitch >> (pIn->mipLevel + 1); + } + + // nextHeight must be shifted from this level's original height rather than a pow2 padded + // one but this requires original height stored somewhere (pOut->height) + ADDR_ASSERT(pOut->height != 0); + + // next level's height is just current level's >> 1 in pixels + nextHeight = pOut->height >> 1; + // Special format such as FMT_1 and FMT_32_32_32 can be linear only so we consider block + // compressed foramts + if (ElemLib::IsBlockCompressed(pIn->format)) + { + nextHeight = (nextHeight + 3) / 4; + } + nextHeight = NextPow2(nextHeight); + + // nextSlices may be 0 if this level's is 1 + if (pIn->flags.volume) + { + nextSlices = Max(1u, pIn->numSlices >> 1); + } + else + { + nextSlices = pIn->numSlices; + } + + nextTileMode = ComputeSurfaceMipLevelTileMode(pIn->tileMode, + pIn->bpp, + nextPitch, + nextHeight, + nextSlices, + pIn->numSamples, + pOut->blockWidth, + pOut->blockHeight, + pOut->pTileInfo); + + pOut->last2DLevel = IsMicroTiled(nextTileMode); + } +} + +/** +**************************************************************************************************** +* SiLib::HwlDegradeThickTileMode +* +* @brief +* Degrades valid tile mode for thick modes if needed +* +* @return +* Suitable tile mode +**************************************************************************************************** +*/ +AddrTileMode SiLib::HwlDegradeThickTileMode( + AddrTileMode baseTileMode, ///< base tile mode + UINT_32 numSlices, ///< current number of slices + UINT_32* pBytesPerTile ///< [in,out] pointer to bytes per slice + ) const +{ + return EgBasedLib::HwlDegradeThickTileMode(baseTileMode, numSlices, pBytesPerTile); +} + +/** +**************************************************************************************************** +* SiLib::HwlTileInfoEqual +* +* @brief +* Return TRUE if all field are equal +* @note +* Only takes care of current HWL's data +**************************************************************************************************** +*/ +BOOL_32 SiLib::HwlTileInfoEqual( + const ADDR_TILEINFO* pLeft, ///<[in] Left compare operand + const ADDR_TILEINFO* pRight ///<[in] Right compare operand + ) const +{ + BOOL_32 equal = FALSE; + + if (pLeft->pipeConfig == pRight->pipeConfig) + { + equal = EgBasedLib::HwlTileInfoEqual(pLeft, pRight); + } + + return equal; +} + +/** +**************************************************************************************************** +* SiLib::GetTileSettings +* +* @brief +* Get tile setting infos by index. +* @return +* Tile setting info. +**************************************************************************************************** +*/ +const TileConfig* SiLib::GetTileSetting( + UINT_32 index ///< [in] Tile index + ) const +{ + ADDR_ASSERT(index < m_noOfEntries); + return &m_tileTable[index]; +} + +/** +**************************************************************************************************** +* SiLib::HwlPostCheckTileIndex +* +* @brief +* Map a tile setting to index if curIndex is invalid, otherwise check if curIndex matches +* tile mode/type/info and change the index if needed +* @return +* Tile index. +**************************************************************************************************** +*/ +INT_32 SiLib::HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, ///< [in] Tile Info + AddrTileMode mode, ///< [in] Tile mode + AddrTileType type, ///< [in] Tile type + INT curIndex ///< [in] Current index assigned in HwlSetupTileInfo + ) const +{ + INT_32 index = curIndex; + + if (mode == ADDR_TM_LINEAR_GENERAL) + { + index = TileIndexLinearGeneral; + } + else + { + BOOL_32 macroTiled = IsMacroTiled(mode); + + // We need to find a new index if either of them is true + // 1. curIndex is invalid + // 2. tile mode is changed + // 3. tile info does not match for macro tiled + if ((index == TileIndexInvalid || + (mode != m_tileTable[index].mode) || + (macroTiled && (HwlTileInfoEqual(pInfo, &m_tileTable[index].info) == FALSE)))) + { + for (index = 0; index < static_cast(m_noOfEntries); index++) + { + if (macroTiled) + { + // macro tile modes need all to match + if (HwlTileInfoEqual(pInfo, &m_tileTable[index].info) && + (mode == m_tileTable[index].mode) && + (type == m_tileTable[index].type)) + { + break; + } + } + else if (mode == ADDR_TM_LINEAR_ALIGNED) + { + // linear mode only needs tile mode to match + if (mode == m_tileTable[index].mode) + { + break; + } + } + else + { + // micro tile modes only need tile mode and tile type to match + if (mode == m_tileTable[index].mode && + type == m_tileTable[index].type) + { + break; + } + } + } + } + } + + ADDR_ASSERT(index < static_cast(m_noOfEntries)); + + if (index >= static_cast(m_noOfEntries)) + { + index = TileIndexInvalid; + } + + return index; +} + +/** +**************************************************************************************************** +* SiLib::HwlSetupTileCfg +* +* @brief +* Map tile index to tile setting. +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE SiLib::HwlSetupTileCfg( + UINT_32 bpp, ///< Bits per pixel + INT_32 index, ///< Tile index + INT_32 macroModeIndex, ///< Index in macro tile mode table(CI) + ADDR_TILEINFO* pInfo, ///< [out] Tile Info + AddrTileMode* pMode, ///< [out] Tile mode + AddrTileType* pType ///< [out] Tile type + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + // Global flag to control usage of tileIndex + if (UseTileIndex(index)) + { + if (index == TileIndexLinearGeneral) + { + if (pMode) + { + *pMode = ADDR_TM_LINEAR_GENERAL; + } + + if (pType) + { + *pType = ADDR_DISPLAYABLE; + } + + if (pInfo) + { + pInfo->banks = 2; + pInfo->bankWidth = 1; + pInfo->bankHeight = 1; + pInfo->macroAspectRatio = 1; + pInfo->tileSplitBytes = 64; + pInfo->pipeConfig = ADDR_PIPECFG_P2; + } + } + else if (static_cast(index) >= m_noOfEntries) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + const TileConfig* pCfgTable = GetTileSetting(index); + + if (pInfo) + { + *pInfo = pCfgTable->info; + } + else + { + if (IsMacroTiled(pCfgTable->mode)) + { + returnCode = ADDR_INVALIDPARAMS; + } + } + + if (pMode) + { + *pMode = pCfgTable->mode; + } + + if (pType) + { + *pType = pCfgTable->type; + } + } + } + + return returnCode; +} + +/** +**************************************************************************************************** +* SiLib::ReadGbTileMode +* +* @brief +* Convert GB_TILE_MODE HW value to TileConfig. +* @return +* NA. +**************************************************************************************************** +*/ +VOID SiLib::ReadGbTileMode( + UINT_32 regValue, ///< [in] GB_TILE_MODE register + TileConfig* pCfg ///< [out] output structure + ) const +{ + GB_TILE_MODE gbTileMode; + gbTileMode.val = regValue; + + pCfg->type = static_cast(gbTileMode.f.micro_tile_mode); + pCfg->info.bankHeight = 1 << gbTileMode.f.bank_height; + pCfg->info.bankWidth = 1 << gbTileMode.f.bank_width; + pCfg->info.banks = 1 << (gbTileMode.f.num_banks + 1); + pCfg->info.macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; + pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; + pCfg->info.pipeConfig = static_cast(gbTileMode.f.pipe_config + 1); + + UINT_32 regArrayMode = gbTileMode.f.array_mode; + + pCfg->mode = static_cast(regArrayMode); + + if (regArrayMode == 8) //ARRAY_2D_TILED_XTHICK + { + pCfg->mode = ADDR_TM_2D_TILED_XTHICK; + } + else if (regArrayMode >= 14) //ARRAY_3D_TILED_XTHICK + { + pCfg->mode = static_cast(pCfg->mode + 3); + } +} + +/** +**************************************************************************************************** +* SiLib::InitTileSettingTable +* +* @brief +* Initialize the ADDR_TILE_CONFIG table. +* @return +* TRUE if tile table is correctly initialized +**************************************************************************************************** +*/ +BOOL_32 SiLib::InitTileSettingTable( + const UINT_32* pCfg, ///< [in] Pointer to table of tile configs + UINT_32 noOfEntries ///< [in] Numbe of entries in the table above + ) +{ + BOOL_32 initOk = TRUE; + + ADDR_ASSERT(noOfEntries <= TileTableSize); + + memset(m_tileTable, 0, sizeof(m_tileTable)); + + if (noOfEntries != 0) + { + m_noOfEntries = noOfEntries; + } + else + { + m_noOfEntries = TileTableSize; + } + + if (pCfg) // From Client + { + for (UINT_32 i = 0; i < m_noOfEntries; i++) + { + ReadGbTileMode(*(pCfg + i), &m_tileTable[i]); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + initOk = FALSE; + } + + if (initOk) + { + ADDR_ASSERT(m_tileTable[TILEINDEX_LINEAR_ALIGNED].mode == ADDR_TM_LINEAR_ALIGNED); + } + + return initOk; +} + +/** +**************************************************************************************************** +* SiLib::HwlGetTileIndex +* +* @brief +* Return the virtual/real index for given mode/type/info +* @return +* ADDR_OK if successful. +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE SiLib::HwlGetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + pOut->index = HwlPostCheckTileIndex(pIn->pTileInfo, pIn->tileMode, pIn->tileType); + + return returnCode; +} + +/** +**************************************************************************************************** +* SiLib::HwlFmaskPreThunkSurfInfo +* +* @brief +* Some preparation before thunking a ComputeSurfaceInfo call for Fmask +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +VOID SiLib::HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, ///< [in] Input of fmask info + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ///< [in] Output of fmask info + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ///< [out] Input of thunked surface info + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut ///< [out] Output of thunked surface info + ) const +{ + pSurfIn->tileIndex = pFmaskIn->tileIndex; +} + +/** +**************************************************************************************************** +* SiLib::HwlFmaskPostThunkSurfInfo +* +* @brief +* Copy hwl extra field after calling thunked ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +VOID SiLib::HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ///< [in] Output of surface info + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut ///< [out] Output of fmask info + ) const +{ + pFmaskOut->macroModeIndex = TileIndexInvalid; + pFmaskOut->tileIndex = pSurfOut->tileIndex; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeFmaskBits +* @brief +* Computes fmask bits +* @return +* Fmask bits +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlComputeFmaskBits( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + UINT_32* pNumSamples + ) const +{ + UINT_32 numSamples = pIn->numSamples; + UINT_32 numFrags = GetNumFragments(numSamples, pIn->numFrags); + UINT_32 bpp; + + if (numFrags != numSamples) // EQAA + { + ADDR_ASSERT(numFrags <= 8); + + if (pIn->resolved == FALSE) + { + if (numFrags == 1) + { + bpp = 1; + numSamples = numSamples == 16 ? 16 : 8; + } + else if (numFrags == 2) + { + ADDR_ASSERT(numSamples >= 4); + + bpp = 2; + numSamples = numSamples; + } + else if (numFrags == 4) + { + ADDR_ASSERT(numSamples >= 4); + + bpp = 4; + numSamples = numSamples; + } + else // numFrags == 8 + { + ADDR_ASSERT(numSamples == 16); + + bpp = 4; + numSamples = numSamples; + } + } + else + { + if (numFrags == 1) + { + bpp = (numSamples == 16) ? 16 : 8; + numSamples = 1; + } + else if (numFrags == 2) + { + ADDR_ASSERT(numSamples >= 4); + + bpp = numSamples*2; + numSamples = 1; + } + else if (numFrags == 4) + { + ADDR_ASSERT(numSamples >= 4); + + bpp = numSamples*4; + numSamples = 1; + } + else // numFrags == 8 + { + ADDR_ASSERT(numSamples >= 16); + + bpp = 16*4; + numSamples = 1; + } + } + } + else // Normal AA + { + if (pIn->resolved == FALSE) + { + bpp = ComputeFmaskNumPlanesFromNumSamples(numSamples); + numSamples = numSamples == 2 ? 8 : numSamples; + } + else + { + // The same as 8XX + bpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); + numSamples = 1; // 1x sample + } + } + + SafeAssign(pNumSamples, numSamples); + + return bpp; +} + +/** +**************************************************************************************************** +* SiLib::HwlOptimizeTileMode +* +* @brief +* Optimize tile mode on SI +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID SiLib::HwlOptimizeTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + AddrTileMode tileMode = pInOut->tileMode; + + if ((pInOut->flags.needEquation == TRUE) && + (IsMacroTiled(tileMode) == TRUE) && + (pInOut->numSamples <= 1)) + { + UINT_32 thickness = Thickness(tileMode); + + if (thickness > 1) + { + tileMode = ADDR_TM_1D_TILED_THICK; + } + else if (pInOut->numSlices > 1) + { + tileMode = ADDR_TM_1D_TILED_THIN1; + } + else + { + tileMode = ADDR_TM_2D_TILED_THIN1; + } + } + + if (tileMode != pInOut->tileMode) + { + pInOut->tileMode = tileMode; + } +} + +/** +**************************************************************************************************** +* SiLib::HwlOverrideTileMode +* +* @brief +* Override tile modes (for PRT only, avoid client passes in an invalid PRT mode for SI. +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID SiLib::HwlOverrideTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + AddrTileMode tileMode = pInOut->tileMode; + + switch (tileMode) + { + case ADDR_TM_PRT_TILED_THIN1: + tileMode = ADDR_TM_2D_TILED_THIN1; + break; + + case ADDR_TM_PRT_TILED_THICK: + tileMode = ADDR_TM_2D_TILED_THICK; + break; + + case ADDR_TM_PRT_2D_TILED_THICK: + tileMode = ADDR_TM_2D_TILED_THICK; + break; + + case ADDR_TM_PRT_3D_TILED_THICK: + tileMode = ADDR_TM_3D_TILED_THICK; + break; + + default: + break; + } + + if (tileMode != pInOut->tileMode) + { + pInOut->tileMode = tileMode; + // Only PRT tile modes are overridden for now. Revisit this once new modes are added above. + pInOut->flags.prt = TRUE; + } +} + +/** +**************************************************************************************************** +* SiLib::HwlSetPrtTileMode +* +* @brief +* Set prt tile modes. +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID SiLib::HwlSetPrtTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + pInOut->tileMode = ADDR_TM_2D_TILED_THIN1; + pInOut->tileType = (pInOut->tileType == ADDR_DEPTH_SAMPLE_ORDER) ? + ADDR_DEPTH_SAMPLE_ORDER : ADDR_NON_DISPLAYABLE; + pInOut->flags.prt = TRUE; +} + +/** +**************************************************************************************************** +* SiLib::HwlSelectTileMode +* +* @brief +* Select tile modes. +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID SiLib::HwlSelectTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + AddrTileMode tileMode; + AddrTileType tileType; + + if (pInOut->flags.volume) + { + if (pInOut->numSlices >= 8) + { + tileMode = ADDR_TM_2D_TILED_XTHICK; + } + else if (pInOut->numSlices >= 4) + { + tileMode = ADDR_TM_2D_TILED_THICK; + } + else + { + tileMode = ADDR_TM_2D_TILED_THIN1; + } + tileType = ADDR_NON_DISPLAYABLE; + } + else + { + tileMode = ADDR_TM_2D_TILED_THIN1; + + if (pInOut->flags.depth || pInOut->flags.stencil) + { + tileType = ADDR_DEPTH_SAMPLE_ORDER; + } + else if ((pInOut->bpp <= 32) || + (pInOut->flags.display == TRUE) || + (pInOut->flags.overlay == TRUE)) + { + tileType = ADDR_DISPLAYABLE; + } + else + { + tileType = ADDR_NON_DISPLAYABLE; + } + } + + if (pInOut->flags.prt) + { + tileMode = ADDR_TM_2D_TILED_THIN1; + tileType = (tileType == ADDR_DISPLAYABLE) ? ADDR_NON_DISPLAYABLE : tileType; + } + + pInOut->tileMode = tileMode; + pInOut->tileType = tileType; + + // Optimize tile mode if possible + pInOut->flags.opt4Space = TRUE; + + // Optimize tile mode if possible + OptimizeTileMode(pInOut); + + HwlOverrideTileMode(pInOut); +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeMaxBaseAlignments +* +* @brief +* Gets maximum alignments +* @return +* maximum alignments +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlComputeMaxBaseAlignments() const +{ + const UINT_32 pipes = HwlGetPipes(&m_tileTable[0].info); + + // Initial size is 64 KiB for PRT. + UINT_32 maxBaseAlign = 64 * 1024; + + for (UINT_32 i = 0; i < m_noOfEntries; i++) + { + if ((IsMacroTiled(m_tileTable[i].mode) == TRUE) && + (IsPrtTileMode(m_tileTable[i].mode) == FALSE)) + { + // The maximum tile size is 16 byte-per-pixel and either 8-sample or 8-slice. + UINT_32 tileSize = Min(m_tileTable[i].info.tileSplitBytes, + MicroTilePixels * 8 * 16); + + UINT_32 baseAlign = tileSize * pipes * m_tileTable[i].info.banks * + m_tileTable[i].info.bankWidth * m_tileTable[i].info.bankHeight; + + if (baseAlign > maxBaseAlign) + { + maxBaseAlign = baseAlign; + } + } + } + + return maxBaseAlign; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeMaxMetaBaseAlignments +* +* @brief +* Gets maximum alignments for metadata +* @return +* maximum alignments for metadata +**************************************************************************************************** +*/ +UINT_32 SiLib::HwlComputeMaxMetaBaseAlignments() const +{ + UINT_32 maxPipe = 1; + + for (UINT_32 i = 0; i < m_noOfEntries; i++) + { + maxPipe = Max(maxPipe, HwlGetPipes(&m_tileTable[i].info)); + } + + return m_pipeInterleaveBytes * maxPipe; +} + +/** +**************************************************************************************************** +* SiLib::HwlComputeSurfaceAlignmentsMacroTiled +* +* @brief +* Hardware layer function to compute alignment request for macro tile mode +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID SiLib::HwlComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 mipLevel, ///< [in] mip level + UINT_32 numSamples, ///< [in] number of samples + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in,out] Surface output + ) const +{ + if ((mipLevel == 0) && (flags.prt)) + { + UINT_32 macroTileSize = pOut->blockWidth * pOut->blockHeight * numSamples * bpp / 8; + + if (macroTileSize < PrtTileSize) + { + UINT_32 numMacroTiles = PrtTileSize / macroTileSize; + + ADDR_ASSERT((PrtTileSize % macroTileSize) == 0); + + pOut->pitchAlign *= numMacroTiles; + pOut->baseAlign *= numMacroTiles; + } + } +} + +/** +**************************************************************************************************** +* SiLib::InitEquationTable +* +* @brief +* Initialize Equation table. +* +* @return +* N/A +**************************************************************************************************** +*/ +VOID SiLib::InitEquationTable() +{ + ADDR_EQUATION_KEY equationKeyTable[EquationTableSize]; + memset(equationKeyTable, 0, sizeof(equationKeyTable)); + + memset(m_equationTable, 0, sizeof(m_equationTable)); + + memset(m_blockWidth, 0, sizeof(m_blockWidth)); + + memset(m_blockHeight, 0, sizeof(m_blockHeight)); + + memset(m_blockSlices, 0, sizeof(m_blockSlices)); + + // Loop all possible bpp + for (UINT_32 log2ElementBytes = 0; log2ElementBytes < MaxNumElementBytes; log2ElementBytes++) + { + // Get bits per pixel + UINT_32 bpp = 1 << (log2ElementBytes + 3); + + // Loop all possible tile index + for (INT_32 tileIndex = 0; tileIndex < static_cast(m_noOfEntries); tileIndex++) + { + UINT_32 equationIndex = ADDR_INVALID_EQUATION_INDEX; + + TileConfig tileConfig = m_tileTable[tileIndex]; + + ADDR_SURFACE_FLAGS flags = {{0}}; + + // Compute tile info, hardcode numSamples to 1 because MSAA is not supported + // in swizzle pattern equation + HwlComputeMacroModeIndex(tileIndex, flags, bpp, 1, &tileConfig.info, NULL, NULL); + + // Check if the input is supported + if (IsEquationSupported(bpp, tileConfig, tileIndex, log2ElementBytes) == TRUE) + { + ADDR_EQUATION_KEY key = {{0}}; + + // Generate swizzle equation key from bpp and tile config + key.fields.log2ElementBytes = log2ElementBytes; + key.fields.tileMode = tileConfig.mode; + // Treat depth micro tile type and non-display micro tile type as the same key + // because they have the same equation actually + key.fields.microTileType = (tileConfig.type == ADDR_DEPTH_SAMPLE_ORDER) ? + ADDR_NON_DISPLAYABLE : tileConfig.type; + key.fields.pipeConfig = tileConfig.info.pipeConfig; + key.fields.numBanksLog2 = Log2(tileConfig.info.banks); + key.fields.bankWidth = tileConfig.info.bankWidth; + key.fields.bankHeight = tileConfig.info.bankHeight; + key.fields.macroAspectRatio = tileConfig.info.macroAspectRatio; + key.fields.prt = ((m_chipFamily == ADDR_CHIP_FAMILY_SI) && + ((1 << tileIndex) & SiPrtTileIndexMask)) ? 1 : 0; + + // Find in the table if the equation has been built based on the key + for (UINT_32 i = 0; i < m_numEquations; i++) + { + if (key.value == equationKeyTable[i].value) + { + equationIndex = i; + break; + } + } + + // If found, just fill the index into the lookup table and no need + // to generate the equation again. Otherwise, generate the equation. + if (equationIndex == ADDR_INVALID_EQUATION_INDEX) + { + ADDR_EQUATION equation; + ADDR_E_RETURNCODE retCode; + + memset(&equation, 0, sizeof(ADDR_EQUATION)); + + // Generate the equation + if (IsMicroTiled(tileConfig.mode)) + { + retCode = ComputeMicroTileEquation(log2ElementBytes, + tileConfig.mode, + tileConfig.type, + &equation); + } + else + { + retCode = ComputeMacroTileEquation(log2ElementBytes, + tileConfig.mode, + tileConfig.type, + &tileConfig.info, + &equation); + } + // Only fill the equation into the table if the return code is ADDR_OK, + // otherwise if the return code is not ADDR_OK, it indicates this is not + // a valid input, we do nothing but just fill invalid equation index + // into the lookup table. + if (retCode == ADDR_OK) + { + equationIndex = m_numEquations; + ADDR_ASSERT(equationIndex < EquationTableSize); + + m_blockSlices[equationIndex] = Thickness(tileConfig.mode); + + if (IsMicroTiled(tileConfig.mode)) + { + m_blockWidth[equationIndex] = MicroTileWidth; + m_blockHeight[equationIndex] = MicroTileHeight; + } + else + { + const ADDR_TILEINFO* pTileInfo = &tileConfig.info; + + m_blockWidth[equationIndex] = + HwlGetPipes(pTileInfo) * MicroTileWidth * pTileInfo->bankWidth * + pTileInfo->macroAspectRatio; + m_blockHeight[equationIndex] = + MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / + pTileInfo->macroAspectRatio; + + if (key.fields.prt) + { + UINT_32 macroTileSize = + m_blockWidth[equationIndex] * m_blockHeight[equationIndex] * + bpp / 8; + + if (macroTileSize < PrtTileSize) + { + UINT_32 numMacroTiles = PrtTileSize / macroTileSize; + + ADDR_ASSERT(macroTileSize == (1u << equation.numBits)); + ADDR_ASSERT((PrtTileSize % macroTileSize) == 0); + + UINT_32 numBits = Log2(numMacroTiles); + + UINT_32 xStart = Log2(m_blockWidth[equationIndex]) + + log2ElementBytes; + + m_blockWidth[equationIndex] *= numMacroTiles; + + for (UINT_32 i = 0; i < numBits; i++) + { + equation.addr[equation.numBits + i].valid = 1; + equation.addr[equation.numBits + i].index = xStart + i; + } + + equation.numBits += numBits; + } + } + } + + equationKeyTable[equationIndex] = key; + m_equationTable[equationIndex] = equation; + + m_numEquations++; + } + } + } + + // Fill the index into the lookup table, if the combination is not supported + // fill the invalid equation index + m_equationLookupTable[log2ElementBytes][tileIndex] = equationIndex; + } + + if (m_chipFamily == ADDR_CHIP_FAMILY_SI) + { + // For tile index 3 which is shared between PRT depth and uncompressed depth + m_uncompressDepthEqIndex = m_numEquations; + + for (UINT_32 log2ElemBytes = 0; log2ElemBytes < MaxNumElementBytes; log2ElemBytes++) + { + TileConfig tileConfig = m_tileTable[3]; + ADDR_EQUATION equation; + ADDR_E_RETURNCODE retCode; + + memset(&equation, 0, sizeof(ADDR_EQUATION)); + + retCode = ComputeMacroTileEquation(log2ElemBytes, + tileConfig.mode, + tileConfig.type, + &tileConfig.info, + &equation); + + if (retCode == ADDR_OK) + { + UINT_32 equationIndex = m_numEquations; + ADDR_ASSERT(equationIndex < EquationTableSize); + + m_blockSlices[equationIndex] = 1; + + const ADDR_TILEINFO* pTileInfo = &tileConfig.info; + + m_blockWidth[equationIndex] = + HwlGetPipes(pTileInfo) * MicroTileWidth * pTileInfo->bankWidth * + pTileInfo->macroAspectRatio; + m_blockHeight[equationIndex] = + MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / + pTileInfo->macroAspectRatio; + + m_equationTable[equationIndex] = equation; + + m_numEquations++; + } + } + } + } +} + +/** +**************************************************************************************************** +* SiLib::IsEquationSupported +* +* @brief +* Check if it is supported for given bpp and tile config to generate a equation. +* +* @return +* TRUE if supported +**************************************************************************************************** +*/ +BOOL_32 SiLib::IsEquationSupported( + UINT_32 bpp, ///< Bits per pixel + TileConfig tileConfig, ///< Tile config + INT_32 tileIndex, ///< Tile index + UINT_32 elementBytesLog2 ///< Log2 of element bytes + ) const +{ + BOOL_32 supported = TRUE; + + // Linear tile mode is not supported in swizzle pattern equation + if (IsLinear(tileConfig.mode)) + { + supported = FALSE; + } + // These tile modes are for Tex2DArray and Tex3D which has depth (num_slice > 1) use, + // which is not supported in swizzle pattern equation due to slice rotation + else if ((tileConfig.mode == ADDR_TM_2D_TILED_THICK) || + (tileConfig.mode == ADDR_TM_2D_TILED_XTHICK) || + (tileConfig.mode == ADDR_TM_3D_TILED_THIN1) || + (tileConfig.mode == ADDR_TM_3D_TILED_THICK) || + (tileConfig.mode == ADDR_TM_3D_TILED_XTHICK)) + { + supported = FALSE; + } + // Only 8bpp(stencil), 16bpp and 32bpp is supported for depth + else if ((tileConfig.type == ADDR_DEPTH_SAMPLE_ORDER) && (bpp > 32)) + { + supported = FALSE; + } + // Tile split is not supported in swizzle pattern equation + else if (IsMacroTiled(tileConfig.mode)) + { + UINT_32 thickness = Thickness(tileConfig.mode); + if (((bpp >> 3) * MicroTilePixels * thickness) > tileConfig.info.tileSplitBytes) + { + supported = FALSE; + } + + if ((supported == TRUE) && (m_chipFamily == ADDR_CHIP_FAMILY_SI)) + { + supported = m_EquationSupport[tileIndex][elementBytesLog2]; + } + } + + return supported; +} + +} // V1 +} // Addr diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.h new file mode 100644 index 0000000000..24d49dcced --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.h @@ -0,0 +1,346 @@ +/* + * Copyright © 2007-2019 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +**************************************************************************************************** +* @file siaddrlib.h +* @brief Contains the R800Lib class definition. +**************************************************************************************************** +*/ + +#ifndef __SI_ADDR_LIB_H__ +#define __SI_ADDR_LIB_H__ + +#include "addrlib1.h" +#include "egbaddrlib.h" + +namespace Addr +{ +namespace V1 +{ + +/** +**************************************************************************************************** +* @brief Describes the information in tile mode table +**************************************************************************************************** +*/ +struct TileConfig +{ + AddrTileMode mode; + AddrTileType type; + ADDR_TILEINFO info; +}; + +/** +**************************************************************************************************** +* @brief SI specific settings structure. +**************************************************************************************************** +*/ +struct SiChipSettings +{ + UINT_32 isSouthernIsland : 1; + UINT_32 isTahiti : 1; + UINT_32 isPitCairn : 1; + UINT_32 isCapeVerde : 1; + // Oland/Hainan are of GFXIP 6.0, similar with SI + UINT_32 isOland : 1; + UINT_32 isHainan : 1; + + // CI + UINT_32 isSeaIsland : 1; + UINT_32 isBonaire : 1; + UINT_32 isKaveri : 1; + UINT_32 isSpectre : 1; + UINT_32 isSpooky : 1; + UINT_32 isKalindi : 1; + UINT_32 isHawaii : 1; + + // VI + UINT_32 isVolcanicIslands : 1; + UINT_32 isIceland : 1; + UINT_32 isTonga : 1; + UINT_32 isFiji : 1; + UINT_32 isPolaris10 : 1; + UINT_32 isPolaris11 : 1; + UINT_32 isPolaris12 : 1; + UINT_32 isVegaM : 1; + UINT_32 isCarrizo : 1; +}; + +/** +**************************************************************************************************** +* @brief This class is the SI specific address library +* function set. +**************************************************************************************************** +*/ +class SiLib : public EgBasedLib +{ +public: + /// Creates SiLib object + static Addr::Lib* CreateObj(const Client* pClient) + { + VOID* pMem = Object::ClientAlloc(sizeof(SiLib), pClient); + return (pMem != NULL) ? new (pMem) SiLib(pClient) : NULL; + } + +protected: + SiLib(const Client* pClient); + virtual ~SiLib(); + + // Hwl interface - defined in AddrLib1 + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; + + virtual UINT_64 HwlComputeXmaskAddrFromCoord( + UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 numSlices, + UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, + ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const; + + virtual VOID HwlComputeXmaskCoordFromAddr( + UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, + UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, + ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; + + virtual ADDR_E_RETURNCODE HwlGetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) const; + + virtual BOOL_32 HwlComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + virtual ChipFamily HwlConvertChipFamily( + UINT_32 uChipFamily, UINT_32 uChipRevision); + + virtual BOOL_32 HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn); + + virtual ADDR_E_RETURNCODE HwlSetupTileCfg( + UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, + ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; + + virtual VOID HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, UINT_32* pMacroHeight, + UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; + + virtual UINT_64 HwlComputeHtileBytes( + UINT_32 pitch, UINT_32 height, UINT_32 bpp, + BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const; + + virtual ADDR_E_RETURNCODE ComputeBankEquation( + UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, + ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const; + + virtual ADDR_E_RETURNCODE ComputePipeEquation( + UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, + ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const; + + virtual UINT_32 ComputePipeFromCoord( + UINT_32 x, UINT_32 y, UINT_32 slice, + AddrTileMode tileMode, UINT_32 pipeSwizzle, BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo) const; + + virtual UINT_32 HwlGetPipes(const ADDR_TILEINFO* pTileInfo) const; + + /// Pre-handler of 3x pitch (96 bit) adjustment + virtual UINT_32 HwlPreHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; + /// Post-handler of 3x pitch adjustment + virtual UINT_32 HwlPostHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; + + /// Dummy function to finalize the inheritance + virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( + UINT_32 pipe, UINT_32 x) const; + + // Sub-hwl interface - defined in EgBasedLib + virtual VOID HwlSetupTileInfo( + AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, + AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual UINT_32 HwlGetPitchAlignmentMicroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; + + virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( + UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, + UINT_32 baseAlign, UINT_32 pitchAlign, + UINT_32 *pPitch, UINT_32 *pHeight) const; + + virtual VOID HwlCheckLastMacroTiledLvl( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual BOOL_32 HwlTileInfoEqual( + const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; + + virtual AddrTileMode HwlDegradeThickTileMode( + AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; + + virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; + + virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; + + virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; + + /// Overwrite tile setting to PRT + virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; + + virtual BOOL_32 HwlSanityCheckMacroTiled( + ADDR_TILEINFO* pTileInfo) const + { + return TRUE; + } + + virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const; + + virtual UINT_64 HwlGetSizeAdjustmentLinear( + AddrTileMode tileMode, + UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, + UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const; + + virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, + UINT_32 bank, UINT_32 pipe, + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, + BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo) const; + + virtual UINT_32 HwlPreAdjustBank( + UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const; + + virtual INT_32 HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, + INT curIndex = TileIndexInvalid) const; + + virtual VOID HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; + + virtual VOID HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const; + + virtual UINT_32 HwlComputeFmaskBits( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + UINT_32* pNumSamples) const; + + virtual BOOL_32 HwlReduceBankWidthHeight( + UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, + UINT_32 bankHeightAlign, UINT_32 pipes, + ADDR_TILEINFO* pTileInfo) const + { + return TRUE; + } + + virtual UINT_32 HwlComputeMaxBaseAlignments() const; + + virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; + + virtual VOID HwlComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 mipLevel, UINT_32 numSamples, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + // Get equation table pointer and number of equations + virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const + { + *ppEquationTable = m_equationTable; + + return m_numEquations; + } + + // Check if it is supported for given bpp and tile config to generate an equation + BOOL_32 IsEquationSupported( + UINT_32 bpp, TileConfig tileConfig, INT_32 tileIndex, UINT_32 elementBytesLog2) const; + + // Protected non-virtual functions + VOID ComputeTileCoordFromPipeAndElemIdx( + UINT_32 elemIdx, UINT_32 pipe, AddrPipeCfg pipeCfg, UINT_32 pitchInMacroTile, + UINT_32 x, UINT_32 y, UINT_32* pX, UINT_32* pY) const; + + UINT_32 TileCoordToMaskElementIndex( + UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig, + UINT_32 *macroShift, UINT_32 *elemIdxBits) const; + + BOOL_32 DecodeGbRegs( + const ADDR_REGISTER_VALUE* pRegValue); + + const TileConfig* GetTileSetting( + UINT_32 index) const; + + // Initialize equation table + VOID InitEquationTable(); + + UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const; + + static const UINT_32 TileTableSize = 32; + TileConfig m_tileTable[TileTableSize]; + UINT_32 m_noOfEntries; + + // Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp) + static const UINT_32 MaxNumElementBytes = 5; + + static const BOOL_32 m_EquationSupport[TileTableSize][MaxNumElementBytes]; + + // Prt tile mode index mask + static const UINT_32 SiPrtTileIndexMask = ((1 << 3) | (1 << 5) | (1 << 6) | (1 << 7) | + (1 << 21) | (1 << 22) | (1 << 23) | (1 << 24) | + (1 << 25) | (1 << 30)); + + // More than half slots in tile mode table can't support equation + static const UINT_32 EquationTableSize = (MaxNumElementBytes * TileTableSize) / 2; + // Equation table + ADDR_EQUATION m_equationTable[EquationTableSize]; + UINT_32 m_numMacroBits[EquationTableSize]; + UINT_32 m_blockWidth[EquationTableSize]; + UINT_32 m_blockHeight[EquationTableSize]; + UINT_32 m_blockSlices[EquationTableSize]; + // Number of equation entries in the table + UINT_32 m_numEquations; + // Equation lookup table according to bpp and tile index + UINT_32 m_equationLookupTable[MaxNumElementBytes][TileTableSize]; + + UINT_32 m_uncompressDepthEqIndex; + + SiChipSettings m_settings; + +private: + + VOID ReadGbTileMode(UINT_32 regValue, TileConfig* pCfg) const; + BOOL_32 InitTileSettingTable(const UINT_32 *pSetting, UINT_32 noOfEntries); +}; + +} // V1 +} // Addr + +#endif + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/util/macros.h b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/util/macros.h new file mode 100644 index 0000000000..6bd2cdec2c --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/util/macros.h @@ -0,0 +1,328 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef UTIL_MACROS_H +#define UTIL_MACROS_H + +#include + +/* Compute the size of an array */ +#ifndef ARRAY_SIZE +# define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#endif + +/* For compatibility with Clang's __has_builtin() */ +#ifndef __has_builtin +# define __has_builtin(x) 0 +#endif + +/** + * __builtin_expect macros + */ +#if !defined(HAVE___BUILTIN_EXPECT) +# define __builtin_expect(x, y) (x) +#endif + +#ifndef likely +# ifdef HAVE___BUILTIN_EXPECT +# define likely(x) __builtin_expect(!!(x), 1) +# define unlikely(x) __builtin_expect(!!(x), 0) +# else +# define likely(x) (x) +# define unlikely(x) (x) +# endif +#endif + + +/** + * Static (compile-time) assertion. + */ +#define STATIC_ASSERT(COND) do { \ + static_assert(COND, "Addrlib legacy static_assert failure."); \ +} while(false) + +/** + * Unreachable macro. Useful for suppressing "control reaches end of non-void + * function" warnings. + */ +#if defined(HAVE___BUILTIN_UNREACHABLE) || __has_builtin(__builtin_unreachable) +#define unreachable(str) \ +do { \ + assert(!str); \ + __builtin_unreachable(); \ +} while (0) +#elif defined (_MSC_VER) +#define unreachable(str) \ +do { \ + assert(!str); \ + __assume(0); \ +} while (0) +#else +#define unreachable(str) assert(!str) +#endif + +/** + * Assume macro. Useful for expressing our assumptions to the compiler, + * typically for purposes of silencing warnings. + */ +#if __has_builtin(__builtin_assume) +#define assume(expr) \ +do { \ + assert(expr); \ + __builtin_assume(expr); \ +} while (0) +#elif defined HAVE___BUILTIN_UNREACHABLE +#define assume(expr) ((expr) ? ((void) 0) \ + : (assert(!"assumption failed"), \ + __builtin_unreachable())) +#elif defined (_MSC_VER) +#define assume(expr) __assume(expr) +#else +#define assume(expr) assert(expr) +#endif + +/* Attribute const is used for functions that have no effects other than their + * return value, and only rely on the argument values to compute the return + * value. As a result, calls to it can be CSEed. Note that using memory + * pointed to by the arguments is not allowed for const functions. + */ +#ifdef HAVE_FUNC_ATTRIBUTE_CONST +#define ATTRIBUTE_CONST __attribute__((__const__)) +#else +#define ATTRIBUTE_CONST +#endif + +#ifdef HAVE_FUNC_ATTRIBUTE_FLATTEN +#define FLATTEN __attribute__((__flatten__)) +#else +#define FLATTEN +#endif + +#ifdef HAVE_FUNC_ATTRIBUTE_FORMAT +#define PRINTFLIKE(f, a) __attribute__ ((format(__printf__, f, a))) +#else +#define PRINTFLIKE(f, a) +#endif + +#ifdef HAVE_FUNC_ATTRIBUTE_MALLOC +#define MALLOCLIKE __attribute__((__malloc__)) +#else +#define MALLOCLIKE +#endif + +/* Forced function inlining */ +/* Note: Clang also sets __GNUC__ (see other cases below) */ +#ifndef ALWAYS_INLINE +# if defined(__GNUC__) +# define ALWAYS_INLINE inline __attribute__((always_inline)) +# elif defined(_MSC_VER) +# define ALWAYS_INLINE __forceinline +# else +# define ALWAYS_INLINE inline +# endif +#endif + +/* Used to optionally mark structures with misaligned elements or size as + * packed, to trade off performance for space. + */ +#ifdef HAVE_FUNC_ATTRIBUTE_PACKED +#define PACKED __attribute__((__packed__)) +#else +#define PACKED +#endif + +/* Attribute pure is used for functions that have no effects other than their + * return value. As a result, calls to it can be dead code eliminated. + */ +#ifdef HAVE_FUNC_ATTRIBUTE_PURE +#define ATTRIBUTE_PURE __attribute__((__pure__)) +#else +#define ATTRIBUTE_PURE +#endif + +#ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL +#define ATTRIBUTE_RETURNS_NONNULL __attribute__((__returns_nonnull__)) +#else +#define ATTRIBUTE_RETURNS_NONNULL +#endif + +#ifndef NORETURN +# ifdef _MSC_VER +# define NORETURN __declspec(noreturn) +# elif defined HAVE_FUNC_ATTRIBUTE_NORETURN +# define NORETURN __attribute__((__noreturn__)) +# else +# define NORETURN +# endif +#endif + +#ifdef __cplusplus +/** + * Macro function that evaluates to true if T is a trivially + * destructible type -- that is, if its (non-virtual) destructor + * performs no action and all member variables and base classes are + * trivially destructible themselves. + */ +# if (defined(__clang__) && defined(__has_feature)) +# if __has_feature(has_trivial_destructor) +# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T) +# endif +# elif defined(__GNUC__) +# if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3))) +# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T) +# endif +# elif defined(_MSC_VER) && !defined(__INTEL_COMPILER) +# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T) +# endif +# ifndef HAS_TRIVIAL_DESTRUCTOR + /* It's always safe (if inefficient) to assume that a + * destructor is non-trivial. + */ +# define HAS_TRIVIAL_DESTRUCTOR(T) (false) +# endif +#endif + +/** + * PUBLIC/USED macros + * + * If we build the library with gcc's -fvisibility=hidden flag, we'll + * use the PUBLIC macro to mark functions that are to be exported. + * + * We also need to define a USED attribute, so the optimizer doesn't + * inline a static function that we later use in an alias. - ajax + */ +#ifndef PUBLIC +# if defined(__GNUC__) +# define PUBLIC __attribute__((visibility("default"))) +# define USED __attribute__((used)) +# elif defined(_MSC_VER) +# define PUBLIC __declspec(dllexport) +# define USED +# else +# define PUBLIC +# define USED +# endif +#endif + +/** + * UNUSED marks variables (or sometimes functions) that have to be defined, + * but are sometimes (or always) unused beyond that. A common case is for + * a function parameter to be used in some build configurations but not others. + * Another case is fallback vfuncs that don't do anything with their params. + * + * Note that this should not be used for identifiers used in `assert()`; + * see ASSERTED below. + */ +#ifdef HAVE_FUNC_ATTRIBUTE_UNUSED +#define UNUSED __attribute__((unused)) +#else +#define UNUSED +#endif + +/** + * Use ASSERTED to indicate that an identifier is unused outside of an `assert()`, + * so that assert-free builds don't get "unused variable" warnings. + */ +#ifdef NDEBUG +#define ASSERTED UNUSED +#else +#define ASSERTED +#endif + +#ifdef HAVE_FUNC_ATTRIBUTE_WARN_UNUSED_RESULT +#define MUST_CHECK __attribute__((warn_unused_result)) +#else +#define MUST_CHECK +#endif + +#if defined(__GNUC__) +#define ATTRIBUTE_NOINLINE __attribute__((noinline)) +#else +#define ATTRIBUTE_NOINLINE +#endif + + +/** + * Check that STRUCT::FIELD can hold MAXVAL. We use a lot of bitfields + * in Mesa/gallium. We have to be sure they're of sufficient size to + * hold the largest expected value. + * Note that with MSVC, enums are signed and enum bitfields need one extra + * high bit (always zero) to ensure the max value is handled correctly. + * This macro will detect that with MSVC, but not GCC. + */ +#define ASSERT_BITFIELD_SIZE(STRUCT, FIELD, MAXVAL) \ + do { \ + ASSERTED STRUCT s; \ + s.FIELD = (MAXVAL); \ + assert((int) s.FIELD == (MAXVAL) && "Insufficient bitfield size!"); \ + } while (0) + + +/** Compute ceiling of integer quotient of A divided by B. */ +#define DIV_ROUND_UP( A, B ) ( ((A) + (B) - 1) / (B) ) + +/** Clamp X to [MIN,MAX]. Turn NaN into MIN, arbitrarily. */ +#define CLAMP( X, MIN, MAX ) ( (X)>(MIN) ? ((X)>(MAX) ? (MAX) : (X)) : (MIN) ) + +/** Minimum of two values: */ +#define MIN2( A, B ) ( (A)<(B) ? (A) : (B) ) + +/** Maximum of two values: */ +#define MAX2( A, B ) ( (A)>(B) ? (A) : (B) ) + +/** Minimum and maximum of three values: */ +#define MIN3( A, B, C ) ((A) < (B) ? MIN2(A, C) : MIN2(B, C)) +#define MAX3( A, B, C ) ((A) > (B) ? MAX2(A, C) : MAX2(B, C)) + +/** Align a value to a power of two */ +#define ALIGN_POT(x, pot_align) (((x) + (pot_align) - 1) & ~((pot_align) - 1)) + +/** + * Macro for declaring an explicit conversion operator. Defaults to an + * implicit conversion if C++11 is not supported. + */ +#if __cplusplus >= 201103L +#define EXPLICIT_CONVERSION explicit +#elif defined(__cplusplus) +#define EXPLICIT_CONVERSION +#endif + +/** Set a single bit */ +#define BITFIELD_BIT(b) (1u << (b)) +/** Set all bits up to excluding bit b */ +#define BITFIELD_MASK(b) \ + ((b) == 32 ? (~0u) : BITFIELD_BIT((b) % 32) - 1) +/** Set count bits starting from bit b */ +#define BITFIELD_RANGE(b, count) \ + (BITFIELD_MASK((b) + (count)) & ~BITFIELD_MASK(b)) + +/** Set a single bit */ +#define BITFIELD64_BIT(b) (1ull << (b)) +/** Set all bits up to excluding bit b */ +#define BITFIELD64_MASK(b) \ + ((b) == 64 ? (~0ull) : BITFIELD64_BIT(b) - 1) +/** Set count bits starting from bit b */ +#define BITFIELD64_RANGE(b, count) \ + (BITFIELD64_MASK((b) + (count)) & ~BITFIELD64_MASK(b)) + +#endif /* UTIL_MACROS_H */ diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/amd_ext.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/amd_ext.cpp new file mode 100644 index 0000000000..a9836248b0 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/amd_ext.cpp @@ -0,0 +1,29 @@ +#include "inc/hsa.h" +#include "inc/hsa_api_trace.h" +#include "core/inc/hsa_table_interface.h" + +#ifdef __cplusplus +extern "C" { +#endif + +void HSA_API_EXPORT Load(const ::HsaApiTable* table); +void HSA_API_EXPORT Unload(); + +// Per library unload callback function. Set by the finalizer or image library +// when needed. +void (*UnloadCallback)() = NULL; + +void Load(const ::HsaApiTable* table) { + // Setup to bypass the runtime intercept layer. + hsa_table_interface_init(table); +} + +void Unload() { + if (UnloadCallback != NULL) { + UnloadCallback(); + } +} + +#ifdef __cplusplus +} +#endif diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp new file mode 100644 index 0000000000..333e2aa57d --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp @@ -0,0 +1,975 @@ +#include "blit_kernel.h" + +#if (defined(WIN32) || defined(_WIN32)) +#define NOMINMAX +#endif + +#include +#include +#include +#include + +#include "image_manager.h" +#include "image_runtime.h" +#include "util.h" + +#undef HSA_ARGUMENT_ALIGN_BYTES +#define HSA_ARGUMENT_ALIGN_BYTES 16 + +#include "core/inc/hsa_table_interface.h" + +extern uint8_t blit_object_gfx7xx[14608]; +extern uint8_t blit_object_gfx8xx[15424]; +extern uint8_t blit_object_gfx9xx[15432]; + +extern uint8_t ocl_blit_object_gfx700[]; +extern uint8_t ocl_blit_object_gfx701[]; +extern uint8_t ocl_blit_object_gfx702[]; +extern uint8_t ocl_blit_object_gfx801[]; +extern uint8_t ocl_blit_object_gfx802[]; +extern uint8_t ocl_blit_object_gfx803[]; +extern uint8_t ocl_blit_object_gfx900[]; +extern uint8_t ocl_blit_object_gfx902[]; +extern uint8_t ocl_blit_object_gfx904[]; +extern uint8_t ocl_blit_object_gfx906[]; +extern uint8_t ocl_blit_object_gfx908[]; +extern uint8_t ocl_blit_object_gfx1010[]; +extern uint8_t ocl_blit_object_gfx1011[]; +extern uint8_t ocl_blit_object_gfx1012[]; + +namespace amd { + +// Arguments inserted by OCL compiler, all zero here. +struct OCLHiddenArgs { + uint64_t offset_x; + uint64_t offset_y; + uint64_t offset_z; + void* printf_buffer; + void* enqueue; + void* enqueue2; + void* multi_grid; +}; + +static void* Allocate(hsa_agent_t agent, size_t size) { + //use the host accessible kernarg pool + hsa_amd_memory_pool_t pool = ext_image::ImageRuntime::instance()->kernarg_pool(); + + void* ptr = NULL; + + hsa_status_t status = hsa_amd_memory_pool_allocate(pool, size, 0, &ptr); + assert(status == HSA_STATUS_SUCCESS); + + if (status != HSA_STATUS_SUCCESS) return NULL; + + status = hsa_amd_agents_allow_access(1, &agent, NULL, ptr); + assert(status == HSA_STATUS_SUCCESS); + + if (status != HSA_STATUS_SUCCESS) { + hsa_amd_memory_pool_free(ptr); + return NULL; + } + return ptr; +} + +BlitKernel::BlitKernel() { +} + +BlitKernel::~BlitKernel() {} + +hsa_status_t BlitKernel::Initialize() { return HSA_STATUS_SUCCESS; } + +hsa_status_t BlitKernel::Cleanup() { + + for (std::pair pair : + code_executable_map_) { + hsa_executable_destroy(pair.second); + } + + code_executable_map_.clear(); + + code_object_map_.clear(); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t BlitKernel::BuildBlitCode( + hsa_agent_t agent, std::vector& blit_code_catalog) { + // Find existing kernels in the list that have compatible ISA. + hsa_isa_t agent_isa = {0}; + hsa_status_t status = + hsa_agent_get_info(agent, HSA_AGENT_INFO_ISA, &agent_isa); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + std::lock_guard lock(lock_); + + for (std::pair pair : code_executable_map_) { + bool isa_compatible = false; + hsa_isa_t code_isa = {pair.first}; + + status = hsa_isa_compatible(code_isa, agent_isa, &isa_compatible); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + if (isa_compatible) { + return PopulateKernelCode(agent, pair.second, blit_code_catalog); + } + } + + // No existing compatible kernels. Build new kernels. + hsa_code_object_t code_object = {0}; + + // Get the target name + char agent_name[64] = {0}; + status = hsa_agent_get_info(agent, HSA_AGENT_INFO_NAME, &agent_name); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + // Get the patched code object + uint8_t* patched_code_object; + status = BlitKernel::GetPatchedBlitObject(agent_name, &patched_code_object); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + // Pass the patched code object + code_object.handle = reinterpret_cast(patched_code_object); + + code_object_map_[agent_isa.handle] = code_object; + + // Create executable. + hsa_executable_t executable = {0}; + status = hsa_executable_create( + HSA_PROFILE_FULL, HSA_EXECUTABLE_STATE_UNFROZEN, "", &executable); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + code_executable_map_[agent_isa.handle] = executable; + + // Load code object. + status = hsa_executable_load_code_object(executable, agent, code_object, ""); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + // Freeze executable. + status = hsa_executable_freeze(executable, ""); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + return PopulateKernelCode(agent, executable, blit_code_catalog); +} + +hsa_status_t BlitKernel::CopyBufferToImage( + BlitQueue& blit_queue, const std::vector& blit_code_catalog, + const void* src_memory, size_t src_row_pitch, size_t src_slice_pitch, + const Image& dst_image, const hsa_ext_image_region_t& image_region) { + if (dst_image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + ImageManager* manager = + ext_image::ImageRuntime::instance()->image_manager(dst_image.component); + + const uint32_t element_size = + manager->GetImageProperty(dst_image.component, dst_image.desc.format, + dst_image.desc.geometry).element_size; + + const size_t dst_origin = image_region.offset.x * element_size; + char* dst_memory = reinterpret_cast(dst_image.data) + dst_origin; + const size_t size = image_region.range.x * element_size; + + return hsa_memory_copy(dst_memory, src_memory, size); + } + + const Image* dst_image_view = NULL; + + hsa_status_t status = ConvertImage(dst_image, &dst_image_view); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + assert(dst_image_view != NULL); + + hsa_kernel_dispatch_packet_t packet = {0}; + + const BlitCodeInfo& blit_code = + blit_code_catalog.at(KERNEL_OP_COPY_BUFFER_TO_IMAGE); + packet.kernel_object = blit_code.code_handle_; + packet.group_segment_size = blit_code.group_segment_size_; + packet.private_segment_size = blit_code.private_segment_size_; + + // Setup kernel argument. + /* + buffer is start of output pixel in destination buffer + format.x is element count + format.y is element size + format.z is max(dword per pixel, 1) + format.w is texture type. + pixelOrigin is start pixel address. + */ + struct KernelArgs { + const void* buffer; + uint64_t image[5]; + int32_t pixelOrigin[4]; + uint32_t format[4]; + uint64_t pitch; + uint64_t slice_pitch; + OCLHiddenArgs ocl; + }; + + KernelArgs* args = (KernelArgs*)Allocate(dst_image_view->component, sizeof(KernelArgs)); + assert(args != NULL); + memset(args, 0, sizeof(KernelArgs)); + args->buffer = src_memory; + for(auto& img : args->image) + img = dst_image_view->Convert(); + args->pixelOrigin[0] = image_region.offset.x; + args->pixelOrigin[1] = image_region.offset.y; + args->pixelOrigin[2] = image_region.offset.z; + + ImageManager* manager = ext_image::ImageRuntime::instance()->image_manager( + dst_image_view->component); + + const uint32_t element_size = + manager->GetImageProperty(dst_image_view->component, + dst_image_view->desc.format, + dst_image_view->desc.geometry).element_size; + + // Try to minimize the read operation to buffer by reading the buffer + // up to one DWORD at a time. + uint32_t buffer_read_count = element_size / sizeof(uint32_t); + buffer_read_count = (buffer_read_count == 0) ? 1 : buffer_read_count; + + const uint32_t num_channel = GetNumChannel(*dst_image_view); + const uint32_t size_per_channel = element_size / num_channel; + + args->format[0] = num_channel; + args->format[1] = size_per_channel; + args->format[2] = buffer_read_count; + args->format[3] = dst_image_view->desc.geometry; + + unsigned long buffer_pitch[2] = {0, 0}; + CalcBufferRowSlicePitchesInPixel(dst_image_view->desc.geometry, element_size, + image_region.range, src_row_pitch, + src_slice_pitch, buffer_pitch); + + args->pitch = buffer_pitch[0]; + args->slice_pitch = buffer_pitch[1]; + + packet.kernarg_address = args; + + // Setup packet dimension and working size. + CalcWorkingSize(*dst_image_view, image_region.range, packet); + + status = LaunchKernel(blit_queue, packet); + + if (&dst_image != dst_image_view) { + Image::Destroy(dst_image_view); + } + hsa_amd_memory_pool_free(args); + + return status; +} + +hsa_status_t BlitKernel::CopyImageToBuffer( + BlitQueue& blit_queue, const std::vector& blit_code_catalog, + const Image& src_image, void* dst_memory, size_t dst_row_pitch, + size_t dst_slice_pitch, const hsa_ext_image_region_t& image_region) { + if (src_image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + ImageManager* manager = + ext_image::ImageRuntime::instance()->image_manager(src_image.component); + + const uint32_t element_size = + manager->GetImageProperty(src_image.component, src_image.desc.format, + src_image.desc.geometry).element_size; + + const size_t src_origin = image_region.offset.x * element_size; + const char* src_memory = + reinterpret_cast(src_image.data) + src_origin; + const size_t size = image_region.range.x * element_size; + + return hsa_memory_copy(dst_memory, src_memory, size); + } + + const Image* src_image_view = NULL; + + hsa_status_t status = ConvertImage(src_image, &src_image_view); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + assert(src_image_view != NULL); + + hsa_kernel_dispatch_packet_t packet = {0}; + + const BlitCodeInfo& blit_code = + blit_code_catalog.at(KERNEL_OP_COPY_IMAGE_TO_BUFFER); + packet.kernel_object = blit_code.code_handle_; + packet.group_segment_size = blit_code.group_segment_size_; + packet.private_segment_size = blit_code.private_segment_size_; + + // Setup kernel argument. + /* + buffer is start of output pixel in destination buffer + format.x is element count + format.y is element size + format.z is max(dword per pixel, 1) + format.w is texture type. + pixelOrigin is start pixel address. + */ + struct KernelArgs { + uint64_t image[5]; + void* buffer; + int32_t pixelOrigin[4]; + uint32_t format[4]; + uint64_t pitch; + uint64_t slice_pitch; + OCLHiddenArgs ocl; + }; + + KernelArgs* args = (KernelArgs*)Allocate(src_image_view->component, sizeof(KernelArgs)); + assert(args != NULL); + memset(args, 0, sizeof(KernelArgs)); + for(auto &img : args->image) + img = src_image_view->Convert(); + args->buffer = dst_memory; + args->pixelOrigin[0] = image_region.offset.x; + args->pixelOrigin[1] = image_region.offset.y; + args->pixelOrigin[2] = image_region.offset.z; + + ImageManager* manager = ext_image::ImageRuntime::instance()->image_manager( + src_image_view->component); + + const uint32_t element_size = + manager->GetImageProperty(src_image_view->component, + src_image_view->desc.format, + src_image_view->desc.geometry).element_size; + + // Try to minimize the write operation to buffer by reading the buffer + // up to one DWORD at a time. + uint32_t buffer_write_count = element_size / sizeof(uint32_t); + buffer_write_count = (buffer_write_count == 0) ? 1 : buffer_write_count; + + const uint32_t num_channel = GetNumChannel(*src_image_view); + const uint32_t size_per_channel = element_size / num_channel; + + args->format[0] = num_channel; + args->format[1] = size_per_channel; + args->format[2] = buffer_write_count; + args->format[3] = src_image_view->desc.geometry; + + unsigned long buffer_pitch[2] = {0, 0}; + CalcBufferRowSlicePitchesInPixel(src_image_view->desc.geometry, element_size, + image_region.range, dst_row_pitch, + dst_slice_pitch, buffer_pitch); + + args->pitch = buffer_pitch[0]; + args->slice_pitch = buffer_pitch[1]; + + packet.kernarg_address = args; + + // Setup packet dimension and working size. + CalcWorkingSize(*src_image_view, image_region.range, packet); + + status = LaunchKernel(blit_queue, packet); + + if (&src_image != src_image_view) { + Image::Destroy(src_image_view); + } + hsa_amd_memory_pool_free(args); + + return status; +} + +hsa_status_t BlitKernel::CopyImage( + BlitQueue& blit_queue, const std::vector& blit_code_catalog, + const Image& dst_image, const Image& src_image, + const hsa_dim3_t& dst_origin, const hsa_dim3_t& src_origin, + const hsa_dim3_t size, KernelOp copy_type) { + assert(src_image.component.handle == dst_image.component.handle); + + const Image* src_image_view = &src_image; + const Image* dst_image_view = &dst_image; + const BlitCodeInfo* blit_code = NULL; + + if (copy_type == KERNEL_OP_COPY_IMAGE_DEFAULT) { + // Linear to linear image copy. + + hsa_status_t status = ConvertImage(src_image, &src_image_view); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + assert(src_image_view != NULL); + + status = ConvertImage(dst_image, &dst_image_view); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + + assert(dst_image_view != NULL); + + const hsa_ext_image_geometry_t src_geometry = src_image_view->desc.geometry; + const hsa_ext_image_geometry_t dst_geometry = dst_image_view->desc.geometry; + + if (src_geometry != HSA_EXT_IMAGE_GEOMETRY_1DB && + dst_geometry != HSA_EXT_IMAGE_GEOMETRY_1DB) { + blit_code = &blit_code_catalog.at(KERNEL_OP_COPY_IMAGE_DEFAULT); + } else if (src_geometry == HSA_EXT_IMAGE_GEOMETRY_1DB && + dst_geometry != HSA_EXT_IMAGE_GEOMETRY_1DB) { + blit_code = &blit_code_catalog.at(KERNEL_OP_COPY_IMAGE_1DB_TO_REG); + } else if (src_geometry != HSA_EXT_IMAGE_GEOMETRY_1DB && + dst_geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + blit_code = &blit_code_catalog.at(KERNEL_OP_COPY_IMAGE_REG_TO_1DB); + } else { + blit_code = &blit_code_catalog.at(KERNEL_OP_COPY_IMAGE_1DB); + } + } else { + blit_code = &blit_code_catalog.at(copy_type); + } + + hsa_kernel_dispatch_packet_t packet = {0}; + + packet.kernel_object = blit_code->code_handle_; + packet.group_segment_size = blit_code->group_segment_size_; + packet.private_segment_size = blit_code->private_segment_size_; + + // Setup kernel argument. + struct KernelArgs { + uint64_t src[5]; + uint64_t dst[5]; + int32_t srcOrigin[4]; + int32_t dstOrigin[4]; + int32_t srcFormat; + int32_t dstFormat; + OCLHiddenArgs ocl; + }; + + KernelArgs* args = (KernelArgs*)Allocate(dst_image_view->component, sizeof(KernelArgs)); + assert(args != NULL); + memset(args, 0, sizeof(KernelArgs)); + + for(auto& img : args->src) + img = src_image_view->Convert(); + args->srcFormat = src_image_view->desc.geometry; + args->srcOrigin[0] = src_origin.x; + args->srcOrigin[1] = src_origin.y; + args->srcOrigin[2] = src_origin.z; + + for(auto& img : args->dst) + img = dst_image_view->Convert(); + args->dstFormat = dst_image_view->desc.geometry; + args->dstOrigin[0] = dst_origin.x; + args->dstOrigin[1] = dst_origin.y; + args->dstOrigin[2] = dst_origin.z; + + packet.kernarg_address = args; + + // Setup packet dimension and working size. + CalcWorkingSize(*src_image_view, *dst_image_view, size, packet); + + hsa_status_t status = LaunchKernel(blit_queue, packet); + + if (&src_image != src_image_view) { + Image::Destroy(src_image_view); + } + + if (&dst_image != dst_image_view) { + Image::Destroy(dst_image_view); + } + + hsa_amd_memory_pool_free(args); + + return status; +} + +hsa_status_t BlitKernel::FillImage( + BlitQueue& blit_queue, const std::vector& blit_code_catalog, + const Image& image, const void* pattern, + const hsa_ext_image_region_t& region) { + hsa_kernel_dispatch_packet_t packet = {0}; + + const BlitCodeInfo& blit_code = + (image.desc.geometry != HSA_EXT_IMAGE_GEOMETRY_1DB) + ? blit_code_catalog.at(KERNEL_OP_CLEAR_IMAGE) + : blit_code_catalog.at(KERNEL_OP_CLEAR_IMAGE_1DB); + packet.kernel_object = blit_code.code_handle_; + packet.group_segment_size = blit_code.group_segment_size_; + packet.private_segment_size = blit_code.private_segment_size_; + + // Setup kernel argument. + struct KernelArgs { + uint64_t image[5]; + int32_t format; + uint32_t type; + uint32_t data[4]; + int32_t origin[4]; + OCLHiddenArgs ocl; + }; + + KernelArgs* args = (KernelArgs*)Allocate(image.component, sizeof(KernelArgs)); + assert(args != NULL); + memset(args, 0, sizeof(KernelArgs)); + + for(auto &img : args->image) + img = image.Convert(); + args->format = image.desc.geometry; + for(int i=0; i<4; i++) + args->data[i] = ((const uint32_t*)pattern)[i]; + args->origin[0] = region.offset.x; + args->origin[1] = region.offset.y; + args->origin[2] = region.offset.z; + args->type = GetImageAccessType(image); + + packet.kernarg_address = args; + + // Setup packet dimension and working size. + CalcWorkingSize(image, region.range, packet); + + hsa_status_t status = LaunchKernel(blit_queue, packet); + + hsa_amd_memory_pool_free(args); + + return status; +} + +const char *BlitKernel::kernel_name_[KERNEL_OP_COUNT] = { + "&__copy_image_to_buffer_kernel", + "&__copy_buffer_to_image_kernel", + "&__copy_image_default_kernel", + "&__copy_image_linear_to_standard_kernel", + "&__copy_image_standard_to_linear_kernel", + "&__copy_image_1db_kernel", + "&__copy_image_1db_to_reg_kernel", + "&__copy_image_reg_to_1db_kernel", + "&__clear_image_kernel", + "&__clear_image_1db_kernel"}; + +const char *BlitKernel::ocl_kernel_name_[KERNEL_OP_COUNT] = { + "copy_image_to_buffer.kd", + "copy_buffer_to_image.kd", + "copy_image_default.kd", + "copy_image_linear_to_standard.kd", + "copy_image_standard_to_linear.kd", + "copy_image_1db.kd", + "copy_image_1db_to_reg.kd", + "copy_image_reg_to_1db.kd", + "clear_image.kd", + "clear_image_1db.kd"}; + +hsa_status_t BlitKernel::PopulateKernelCode( + hsa_agent_t agent, hsa_executable_t executable, + std::vector& blit_code_catalog) { + blit_code_catalog.clear(); + + for (int i = 0; i < KERNEL_OP_COUNT; ++i) { + // Get symbol handle. + hsa_executable_symbol_t kernel_symbol = {0}; + + hsa_status_t status = hsa_executable_get_symbol_by_name(executable, ocl_kernel_name_[i], &agent, &kernel_symbol); + if (HSA_STATUS_SUCCESS != status) { + blit_code_catalog.clear(); + return status; + } + + // Get code handle. + BlitCodeInfo blit_code = {0}; + status = hsa_executable_symbol_get_info( + kernel_symbol, HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_OBJECT, + &blit_code.code_handle_); + if (HSA_STATUS_SUCCESS != status) { + blit_code_catalog.clear(); + return status; + } + + status = hsa_executable_symbol_get_info( + kernel_symbol, HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_GROUP_SEGMENT_SIZE, + &blit_code.group_segment_size_); + if (HSA_STATUS_SUCCESS != status) { + blit_code_catalog.clear(); + return status; + } + + status = hsa_executable_symbol_get_info( + kernel_symbol, HSA_EXECUTABLE_SYMBOL_INFO_KERNEL_PRIVATE_SEGMENT_SIZE, + &blit_code.private_segment_size_); + if (HSA_STATUS_SUCCESS != status) { + blit_code_catalog.clear(); + return status; + } + + blit_code_catalog.push_back(blit_code); + } + + assert(blit_code_catalog.size() == KERNEL_OP_COUNT); + return HSA_STATUS_SUCCESS; +} + +void BlitKernel::CalcBufferRowSlicePitchesInPixel( + hsa_ext_image_geometry_t geometry, uint32_t element_size, + const hsa_dim3_t& copy_size, size_t in_row_pitch_byte, + size_t in_slice_pitch_byte, unsigned long* out_pitch_pixel) { + const bool is_1d_array = + (geometry == HSA_EXT_IMAGE_GEOMETRY_1DA) ? true : false; + + out_pitch_pixel[0] = + std::max(static_cast(copy_size.x), + static_cast(in_row_pitch_byte / element_size)); + + out_pitch_pixel[1] = + (is_1d_array) + ? out_pitch_pixel[0] + : (std::max( + static_cast(out_pitch_pixel[0] * copy_size.y), + static_cast(in_slice_pitch_byte / + element_size))); + + assert((out_pitch_pixel[0] <= out_pitch_pixel[1])); +} + +uint32_t BlitKernel::GetDimSize(const Image& image) { + static const uint32_t kDimSizeTable[] = { + 1, // HSA_EXT_IMAGE_GEOMETRY_1D + 2, // HSA_EXT_IMAGE_GEOMETRY_2D + 3, // HSA_EXT_IMAGE_GEOMETRY_3D + 2, // HSA_EXT_IMAGE_GEOMETRY_1DA + 3, // HSA_EXT_IMAGE_GEOMETRY_2DA + 1, // HSA_EXT_IMAGE_GEOMETRY_1DB + 2, // HSA_EXT_IMAGE_GEOMETRY_2DDEPTH + 3, // HSA_EXT_IMAGE_GEOMETRY_2DADEPTH + }; + + return kDimSizeTable[image.desc.geometry]; +} + +uint32_t BlitKernel::GetNumChannel(const Image& image) { + static const uint32_t kNumChannelTable[] = { + 1, // HSA_EXT_IMAGE_CHANNEL_ORDER_A, + 1, // HSA_EXT_IMAGE_CHANNEL_ORDER_R, + 1, // HSA_EXT_IMAGE_CHANNEL_ORDER_RX, + 2, // HSA_EXT_IMAGE_CHANNEL_ORDER_RG, + 2, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGX, + 2, // HSA_EXT_IMAGE_CHANNEL_ORDER_RA, + 3, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGB, + 3, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX, + 4, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA, + 4, // HSA_EXT_IMAGE_CHANNEL_ORDER_BGRA, + 4, // HSA_EXT_IMAGE_CHANNEL_ORDER_ARGB, + 4, // HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR, + 3, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB, + 3, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX, + 4, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA, + 4, // HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA, + 1, // HSA_EXT_IMAGE_CHANNEL_ORDER_INTENSITY, + 1, // HSA_EXT_IMAGE_CHANNEL_ORDER_LUMINANCE, + 1, // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH, + 1, // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL + }; + + return kNumChannelTable[image.desc.format.channel_order]; +} + +uint32_t BlitKernel::GetImageAccessType(const Image& image) { + enum AccessType { + ACCESS_TYPE_F = 0, + ACCESS_TYPE_I = 1, + ACCESS_TYPE_UI = 2, + }; + + static const uint32_t kAccessType[] = { + ACCESS_TYPE_F, // HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT8 + ACCESS_TYPE_F, // HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT16 + ACCESS_TYPE_F, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT8 + ACCESS_TYPE_F, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT16 + ACCESS_TYPE_F, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT24 + ACCESS_TYPE_F, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555 + ACCESS_TYPE_F, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565 + ACCESS_TYPE_F, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_101010 + ACCESS_TYPE_I, // HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT8 + ACCESS_TYPE_I, // HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT16 + ACCESS_TYPE_I, // HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT32 + ACCESS_TYPE_UI, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8 + ACCESS_TYPE_UI, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16 + ACCESS_TYPE_UI, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32 + ACCESS_TYPE_F, // HSA_EXT_IMAGE_CHANNEL_TYPE_HALF_FLOAT + ACCESS_TYPE_F // HSA_EXT_IMAGE_CHANNEL_TYPE_FLOAT + }; + + return kAccessType[image.desc.format.channel_type]; +} + +void BlitKernel::CalcWorkingSize(const Image& image, const hsa_dim3_t& range, + hsa_kernel_dispatch_packet_t& packet) { + switch (image.desc.geometry) { + case HSA_EXT_IMAGE_GEOMETRY_1D: + case HSA_EXT_IMAGE_GEOMETRY_1DB: + case HSA_EXT_IMAGE_GEOMETRY_1DA: + packet.setup = 2; + packet.grid_size_x = range.x; + packet.grid_size_y = range.y; + packet.grid_size_z = 1; + packet.workgroup_size_x = 64; + packet.workgroup_size_y = packet.workgroup_size_z = 1; + break; + case HSA_EXT_IMAGE_GEOMETRY_2D: + case HSA_EXT_IMAGE_GEOMETRY_2DDEPTH: + case HSA_EXT_IMAGE_GEOMETRY_2DADEPTH: + case HSA_EXT_IMAGE_GEOMETRY_2DA: + packet.setup = 3; + packet.grid_size_x = range.x; + packet.grid_size_y = range.y; + packet.grid_size_z = range.z; + packet.workgroup_size_x = packet.workgroup_size_y = 8; + packet.workgroup_size_z = 1; + break; + case HSA_EXT_IMAGE_GEOMETRY_3D: + packet.setup = 3; + packet.grid_size_x = range.x; + packet.grid_size_y = range.y; + packet.grid_size_z = range.z; + packet.workgroup_size_x = packet.workgroup_size_y = 4; + packet.workgroup_size_z = 4; + break; + } +} + +void BlitKernel::CalcWorkingSize(const Image& src_image, const Image& dst_image, + const hsa_dim3_t& range, + hsa_kernel_dispatch_packet_t& packet) { + if (GetDimSize(src_image) < GetDimSize(dst_image)) { + CalcWorkingSize(src_image, range, packet); + } else { + CalcWorkingSize(dst_image, range, packet); + } +} + +hsa_status_t BlitKernel::ConvertImage(const Image& original_image, + const Image** new_image) { + // To simplify the kernel, some particular image channel types are converted + // to a new channel type, while preserving the actual per pixel size. + // E.g.: a UNORM SIGNED INT8 is converted into UNSIGNED INT8. This way the + // kernel can just use read_imageui on all images. + + static const uint32_t kTypeConvertTable[] = { + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8, // HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT8 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16, // HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT16 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT8 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT16 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT24, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT24 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_101010 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8, // HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT8 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16, // HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT16 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32, // HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT32 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32, // HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32 + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16, // HSA_EXT_IMAGE_CHANNEL_TYPE_HALF_FLOAT + HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32 // HSA_EXT_IMAGE_CHANNEL_TYPE_FLOAT + }; + + // To simplify the kernel, some particular image channel orders are converted + // to a new channel order, while preserving the actual per pixel size. + // E.g.: a CHANNEL ORDER A is converted into CHANNEL ORDER R. This way the + // kernel can just read the first components of vector4 on all images. + static const uint32_t kOrderConvertTable[] = { + HSA_EXT_IMAGE_CHANNEL_ORDER_R, // HSA_EXT_IMAGE_CHANNEL_ORDER_A + HSA_EXT_IMAGE_CHANNEL_ORDER_R, // HSA_EXT_IMAGE_CHANNEL_ORDER_R + HSA_EXT_IMAGE_CHANNEL_ORDER_R, // HSA_EXT_IMAGE_CHANNEL_ORDER_RX + HSA_EXT_IMAGE_CHANNEL_ORDER_RG, // HSA_EXT_IMAGE_CHANNEL_ORDER_RG + HSA_EXT_IMAGE_CHANNEL_ORDER_RG, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGX + HSA_EXT_IMAGE_CHANNEL_ORDER_RG, // HSA_EXT_IMAGE_CHANNEL_ORDER_RA + HSA_EXT_IMAGE_CHANNEL_ORDER_RGB, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGB + HSA_EXT_IMAGE_CHANNEL_ORDER_RGB, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX + HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA + HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA, // HSA_EXT_IMAGE_CHANNEL_ORDER_BGRA + HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA, // HSA_EXT_IMAGE_CHANNEL_ORDER_ARGB + HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA, // HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR + HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB + HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX + HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA + HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA, // HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA + HSA_EXT_IMAGE_CHANNEL_ORDER_R, // HSA_EXT_IMAGE_CHANNEL_ORDER_INTENSITY + HSA_EXT_IMAGE_CHANNEL_ORDER_R, // HSA_EXT_IMAGE_CHANNEL_ORDER_LUMINANCE + HSA_EXT_IMAGE_CHANNEL_ORDER_R, // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH + HSA_EXT_IMAGE_CHANNEL_ORDER_RG // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL + }; + + const uint32_t current_type = original_image.desc.format.channel_type; + uint32_t converted_type = kTypeConvertTable[current_type]; + const uint32_t current_order = original_image.desc.format.channel_order; + uint32_t converted_order = kOrderConvertTable[current_order]; + + if ((current_type == converted_type) && (current_order == converted_order)) { + *new_image = &original_image; + return HSA_STATUS_SUCCESS; + } + + // Handle formats that drop channels on conversion, only usable with RGB(X) + if((current_type == HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555) || + (current_type == HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565) || + (current_type == HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_101010)) { + converted_order = HSA_EXT_IMAGE_CHANNEL_ORDER_R; + } + + // For internal book keeping, depth isn't a HW type. + const hsa_ext_image_geometry_t current_geometry = + original_image.desc.geometry; + hsa_ext_image_geometry_t converted_geometry = current_geometry; + if (converted_geometry == HSA_EXT_IMAGE_GEOMETRY_2DDEPTH) { + converted_geometry = HSA_EXT_IMAGE_GEOMETRY_2D; + } else if (converted_geometry == HSA_EXT_IMAGE_GEOMETRY_2DADEPTH) { + converted_geometry = HSA_EXT_IMAGE_GEOMETRY_2DA; + } + + hsa_ext_image_format_t new_format = { + static_cast(converted_type), + static_cast(converted_order)}; + + amd::Image* new_image_handle = amd::Image::Create(original_image.component); + *new_image_handle=original_image; + new_image_handle->desc.geometry = converted_geometry; + + hsa_status_t status = ext_image::ImageRuntime::instance() + ->image_manager(new_image_handle->component) + ->ModifyImageSrd(*new_image_handle, new_format); + if (status != HSA_STATUS_SUCCESS) { + return status; + } + + *new_image = new_image_handle; + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t BlitKernel::LaunchKernel(BlitQueue& blit_queue, + hsa_kernel_dispatch_packet_t& packet) { + static const uint16_t kInvalidPacketHeader = HSA_PACKET_TYPE_INVALID; + + static const uint16_t kDispatchPacketHeader = + (HSA_PACKET_TYPE_KERNEL_DISPATCH << HSA_PACKET_HEADER_TYPE) | + (0 << HSA_PACKET_HEADER_BARRIER) | + (HSA_FENCE_SCOPE_SYSTEM << HSA_PACKET_HEADER_SCACQUIRE_FENCE_SCOPE) | + (HSA_FENCE_SCOPE_SYSTEM << HSA_PACKET_HEADER_SCRELEASE_FENCE_SCOPE); + + // Copying the packet content to the queue buffer is not atomic, so it is + // possible that the packet has a valid packet type but invalid content. + // To make sure packet processor does not read invalid packet, we first + // initialized the packet type to invalid. + packet.header = kInvalidPacketHeader; + + // Setup completion signal. + hsa_signal_t kernel_signal = {0}; + hsa_status_t status = hsa_signal_create(1, 0, NULL, &kernel_signal); + if (HSA_STATUS_SUCCESS != status) { + return status; + } + packet.completion_signal = kernel_signal; + + // Populate the queue. + hsa_queue_t* queue = blit_queue.queue_; + const uint32_t bitmask = queue->size - 1; + + // Reserve write index. + uint64_t write_index = hsa_queue_add_write_index_acq_rel(queue, 1); + + while (true) { + // Wait until we have room in the queue; + const uint64_t read_index = hsa_queue_load_read_index_relaxed(queue); + if ((write_index - read_index) < queue->size) { + break; + } + } + + // Populate queue buffer with AQL packet. + hsa_kernel_dispatch_packet_t* queue_buffer = + reinterpret_cast(queue->base_address); + queue_buffer[write_index & bitmask] = packet; + + std::atomic_thread_fence(std::memory_order_release); + + // Enable packet. + queue_buffer[write_index & bitmask].header = kDispatchPacketHeader; + + // Update doorbel register. + hsa_signal_store_release(queue->doorbell_signal, write_index); + + // Wait for the packet to finish. + if (hsa_signal_wait_acquire(kernel_signal, HSA_SIGNAL_CONDITION_LT, 1, + uint64_t(-1), HSA_WAIT_STATE_ACTIVE) != 0) { + status = hsa_signal_destroy(kernel_signal); + assert(status == HSA_STATUS_SUCCESS); + // Signal wait returned unexpected value. + return HSA_STATUS_ERROR; + } + + // Cleanup + status = hsa_signal_destroy(kernel_signal); + assert(status == HSA_STATUS_SUCCESS); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name, + uint8_t** blit_code_object) { + if (strncmp(agent_name, "gfx", 3) != 0) { + return HSA_STATUS_ERROR_INVALID_ISA_NAME; + } + + uint64_t target_name = atoi(&agent_name[3]); + + switch (target_name) { + case 700: + *blit_code_object = ocl_blit_object_gfx700; + break; + case 701: + *blit_code_object = ocl_blit_object_gfx701; + break; + case 702: + *blit_code_object = ocl_blit_object_gfx702; + break; + case 801: + *blit_code_object = ocl_blit_object_gfx801; + break; + case 802: + *blit_code_object = ocl_blit_object_gfx802; + break; + case 803: + *blit_code_object = ocl_blit_object_gfx803; + break; + case 900: + *blit_code_object = ocl_blit_object_gfx900; + break; + case 902: + *blit_code_object = ocl_blit_object_gfx902; + break; + case 904: + *blit_code_object = ocl_blit_object_gfx904; + break; + case 906: + *blit_code_object = ocl_blit_object_gfx906; + break; + case 908: + *blit_code_object = ocl_blit_object_gfx908; + break; + case 1010: + *blit_code_object = ocl_blit_object_gfx1010; + break; + case 1011: + *blit_code_object = ocl_blit_object_gfx1011; + break; + case 1012: + *blit_code_object = ocl_blit_object_gfx1012; + break; + default: + return HSA_STATUS_ERROR_INVALID_ISA_NAME; + } + + return HSA_STATUS_SUCCESS; +} +} // namespace amd +#undef HSA_ARGUMENT_ALIGN_BYTES diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.h b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.h new file mode 100644 index 0000000000..364cc47dae --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.h @@ -0,0 +1,123 @@ +#ifndef HSA_RUNTIME_EXT_IMAGE_BLIT_KERNEL_H +#define HSA_RUNTIME_EXT_IMAGE_BLIT_KERNEL_H +#include +#include +#include +#include +#include + +#include "inc/hsa.h" +#include "resource.h" + +namespace amd { +typedef struct BlitQueue { + hsa_queue_t* queue_; + volatile std::atomic cached_index_; +} BlitQueue; + +typedef struct BlitCodeInfo { + uint64_t code_handle_; + uint32_t group_segment_size_; + uint32_t private_segment_size_; +} BlitCodeInfo; + +class BlitKernel { + public: + typedef enum KernelOp { + KERNEL_OP_COPY_IMAGE_TO_BUFFER = 0, + KERNEL_OP_COPY_BUFFER_TO_IMAGE = 1, + KERNEL_OP_COPY_IMAGE_DEFAULT = 2, + KERNEL_OP_COPY_IMAGE_LINEAR_TO_STANDARD = 3, + KERNEL_OP_COPY_IMAGE_STANDARD_TO_LINEAR = 4, + KERNEL_OP_COPY_IMAGE_1DB = 5, + KERNEL_OP_COPY_IMAGE_1DB_TO_REG = 6, + KERNEL_OP_COPY_IMAGE_REG_TO_1DB = 7, + KERNEL_OP_CLEAR_IMAGE = 8, + KERNEL_OP_CLEAR_IMAGE_1DB = 9, + KERNEL_OP_COUNT = 10 + } KernelOp; + + explicit BlitKernel(); + ~BlitKernel(); + + hsa_status_t Initialize(); + + hsa_status_t Cleanup(); + + hsa_status_t BuildBlitCode(hsa_agent_t agent, + std::vector& blit_code_catalog); + + hsa_status_t CopyBufferToImage( + BlitQueue& blit_queue, + const std::vector& blit_code_catalog, + const void* src_memory, size_t src_row_pitch, size_t src_slice_pitch, + const Image& dst_image, const hsa_ext_image_region_t& image_region); + + hsa_status_t CopyImageToBuffer( + BlitQueue& blit_queue, + const std::vector& blit_code_catalog, + const Image& src_image, void* dst_memory, size_t dst_row_pitch, + size_t dst_slice_pitch, const hsa_ext_image_region_t& image_region); + + hsa_status_t CopyImage(BlitQueue& blit_queue, + const std::vector& blit_code_catalog, + const Image& dst_image, const Image& src_image, + const hsa_dim3_t& dst_origin, + const hsa_dim3_t& src_origin, const hsa_dim3_t size, + KernelOp copy_type); + + hsa_status_t FillImage(BlitQueue& blit_queue, + const std::vector& blit_code_catalog, + const Image& image, const void* pattern, + const hsa_ext_image_region_t& region); + + private: + + hsa_status_t PopulateKernelCode( + hsa_agent_t agent, hsa_executable_t executable, + std::vector& blit_code_catalog); + + inline void CalcBufferRowSlicePitchesInPixel( + hsa_ext_image_geometry_t geometry, uint32_t element_size, + const hsa_dim3_t& copy_size, size_t in_row_pitch_byte, + size_t in_slice_pitch_byte, unsigned long* out_pitch_pixel); + + inline uint32_t GetDimSize(const Image& image); + + inline uint32_t GetNumChannel(const Image& image); + + inline uint32_t GetImageAccessType(const Image& image); + + void CalcWorkingSize(const Image& image, const hsa_dim3_t& range, + hsa_kernel_dispatch_packet_t& packet); + + void CalcWorkingSize(const Image& src_image, const Image& dst_image, + const hsa_dim3_t& range, + hsa_kernel_dispatch_packet_t& packet); + + hsa_status_t ConvertImage(const Image& original_image, + const Image** new_image); + + hsa_status_t LaunchKernel(BlitQueue& queue, + hsa_kernel_dispatch_packet_t& packet); + + // The kernels' name. + static const char* kernel_name_[KERNEL_OP_COUNT]; + static const char* ocl_kernel_name_[KERNEL_OP_COUNT]; + + // Mapping of ISA and kernel object. + std::unordered_map code_object_map_; + + // Mapping of ISA and kernel executable. + std::unordered_map code_executable_map_; + + std::mutex lock_; + + DISALLOW_COPY_AND_ASSIGN(BlitKernel); + + // Get the patched code object + hsa_status_t GetPatchedBlitObject(const char* agent_name, uint8_t** code_object_handle); +}; +} // namespace amd + +#endif // HSA_RUNTIME_EXT_IMAGE_BLIT_KERNEL_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel_cl.cl b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel_cl.cl new file mode 100644 index 0000000000..12f5a86abd --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel_cl.cl @@ -0,0 +1,448 @@ +/// Kernel code for HSA image import/export/copy/clear in OpenCL C form. + +__kernel void copy_image_to_buffer( + __read_only image2d_array_t src, + __global uint* dstUInt, + __global ushort* dstUShort, + __global uchar* dstUChar, + int4 srcOrigin, + ulong4 dstOrigin, + int4 size, + uint4 format, + ulong4 pitch) +{ + ulong idxDst; + int4 coordsSrc; + uint4 texel; + + coordsSrc.x = get_global_id(0); + coordsSrc.y = get_global_id(1); + coordsSrc.z = get_global_id(2); + coordsSrc.w = 0; + + if ((coordsSrc.x >= size.x) || + (coordsSrc.y >= size.y) || + (coordsSrc.z >= size.z)) { + return; + } + + idxDst = (coordsSrc.z * pitch.y + coordsSrc.y * pitch.x + + coordsSrc.x) * format.z + dstOrigin.x; + + coordsSrc.x += srcOrigin.x; + coordsSrc.y += srcOrigin.y; + coordsSrc.z += srcOrigin.z; + + texel = read_imageui(src, coordsSrc); + + // Check components + switch (format.x) { + case 1: + // Check size + switch (format.y) { + case 1: + dstUChar[idxDst] = (uchar)texel.x; + break; + case 2: + dstUShort[idxDst] = (ushort)texel.x; + break; + case 4: + dstUInt[idxDst] = texel.x; + break; + } + break; + case 2: + // Check size + switch (format.y) { + case 1: + dstUShort[idxDst] = (ushort)texel.x | + ((ushort)texel.y << 8); + break; + case 2: + dstUInt[idxDst] = texel.x | (texel.y << 16); + break; + case 4: + dstUInt[idxDst++] = texel.x; + dstUInt[idxDst] = texel.y; + break; + } + break; + case 4: + // Check size + switch (format.y) { + case 1: + dstUInt[idxDst] = (uint)texel.x | + (texel.y << 8) | + (texel.z << 16) | + (texel.w << 24); + break; + case 2: + dstUInt[idxDst++] = texel.x | (texel.y << 16); + dstUInt[idxDst] = texel.z | (texel.w << 16); + break; + case 4: + dstUInt[idxDst++] = texel.x; + dstUInt[idxDst++] = texel.y; + dstUInt[idxDst++] = texel.z; + dstUInt[idxDst] = texel.w; + break; + } + break; + } +} + +__kernel void copy_buffer_to_image( + __global uint* src, + __write_only image2d_array_t dst, + ulong4 srcOrigin, + int4 dstOrigin, + int4 size, + uint4 format, + ulong4 pitch) +{ + ulong idxSrc; + int4 coordsDst; + uint4 pixel; + __global uint* srcUInt = src; + __global ushort* srcUShort = (__global ushort*)src; + __global uchar* srcUChar = (__global uchar*)src; + ushort tmpUShort; + uint tmpUInt; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + if ((coordsDst.x >= size.x) || + (coordsDst.y >= size.y) || + (coordsDst.z >= size.z)) { + return; + } + + idxSrc = (coordsDst.z * pitch.y + + coordsDst.y * pitch.x + coordsDst.x) * + format.z + srcOrigin.x; + + coordsDst.x += dstOrigin.x; + coordsDst.y += dstOrigin.y; + coordsDst.z += dstOrigin.z; + + // Check components + switch (format.x) { + case 1: + // Check size + if (format.y == 1) { + pixel.x = (uint)srcUChar[idxSrc]; + } + else if (format.y == 2) { + pixel.x = (uint)srcUShort[idxSrc]; + } + else { + pixel.x = srcUInt[idxSrc]; + } + break; + case 2: + // Check size + if (format.y == 1) { + tmpUShort = srcUShort[idxSrc]; + pixel.x = (uint)(tmpUShort & 0xff); + pixel.y = (uint)(tmpUShort >> 8); + } + else if (format.y == 2) { + tmpUInt = srcUInt[idxSrc]; + pixel.x = (tmpUInt & 0xffff); + pixel.y = (tmpUInt >> 16); + } + else { + pixel.x = srcUInt[idxSrc++]; + pixel.y = srcUInt[idxSrc]; + } + break; + case 4: + // Check size + if (format.y == 1) { + tmpUInt = srcUInt[idxSrc]; + pixel.x = tmpUInt & 0xff; + pixel.y = (tmpUInt >> 8) & 0xff; + pixel.z = (tmpUInt >> 16) & 0xff; + pixel.w = (tmpUInt >> 24) & 0xff; + } + else if (format.y == 2) { + tmpUInt = srcUInt[idxSrc++]; + pixel.x = tmpUInt & 0xffff; + pixel.y = (tmpUInt >> 16); + tmpUInt = srcUInt[idxSrc]; + pixel.z = tmpUInt & 0xffff; + pixel.w = (tmpUInt >> 16); + } + else { + pixel.x = srcUInt[idxSrc++]; + pixel.y = srcUInt[idxSrc++]; + pixel.z = srcUInt[idxSrc++]; + pixel.w = srcUInt[idxSrc]; + } + break; + } + // Write the final pixel + write_imageui(dst, coordsDst, pixel); +} + +__kernel void copy_image_default( + __read_only image2d_array_t src, + __write_only image2d_array_t dst, + int4 srcOrigin, + int4 dstOrigin, + int4 size) +{ + int4 coordsDst; + int4 coordsSrc; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + if ((coordsDst.x >= size.x) || + (coordsDst.y >= size.y) || + (coordsDst.z >= size.z)) { + return; + } + + coordsSrc = srcOrigin + coordsDst; + coordsDst += dstOrigin; + + uint4 texel; + texel = read_imageui(src, coordsSrc); + write_imageui(dst, coordsDst, texel); +} + +float linear_to_standard_rgba(float l_val) { + float s_val = l_val; + + if (isnan(s_val)) s_val = 0.0f; + + if (s_val > 1.0f) { + s_val = 1.0f; + } else if (s_val < 0.0f) { + s_val = 0.0f; + } else if (s_val < 0.0031308f) { + s_val = 12.92f * s_val; + } else { + s_val = (1.055f * pow(s_val, 5.0f / 12.0f)) - 0.055f; + } + + return s_val; +} + +__kernel void copy_image_linear_to_standard( + __read_only image2d_array_t src, + __write_only image2d_array_t dst, + int4 srcOrigin, + int4 dstOrigin, + int4 size, + int copyType) +{ + int4 coordsDst; + int4 coordsSrc; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + if ((coordsDst.x >= size.x) || + (coordsDst.y >= size.y) || + (coordsDst.z >= size.z)) { + return; + } + + coordsSrc = srcOrigin + coordsDst; + coordsDst += dstOrigin; + + float4 texel; + texel = read_imagef(src, coordsSrc); + + texel.x = linear_to_standard_rgba(texel.x); + texel.y = linear_to_standard_rgba(texel.y); + texel.z = linear_to_standard_rgba(texel.z); + + write_imagef(dst, coordsDst, texel); +} + +__kernel void copy_image_standard_to_linear( + __read_only image2d_array_t src, + __write_only image2d_array_t dst, + int4 srcOrigin, + int4 dstOrigin, + int4 size, + int copyType) +{ + int4 coordsDst; + int4 coordsSrc; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + if ((coordsDst.x >= size.x) || + (coordsDst.y >= size.y) || + (coordsDst.z >= size.z)) { + return; + } + + coordsSrc = srcOrigin + coordsDst; + coordsDst += dstOrigin; + + float4 texel; + texel = read_imagef(src, coordsSrc); + write_imagef(dst, coordsDst, texel); +} + +__kernel void copy_image_1db( + __read_only image1d_buffer_t src, + __write_only image1d_buffer_t dst, + int4 srcOrigin, + int4 dstOrigin, + int4 size) +{ + int coordDst; + int coordSrc; + + coordDst = get_global_id(0); + + if (coordDst >= size.x) { + return; + } + + coordSrc = srcOrigin.x + coordDst; + coordDst += dstOrigin.x; + + uint4 texel; + texel = read_imageui(src, coordSrc); + write_imageui(dst, coordDst, texel); +} + +__kernel void copy_image_1db_to_reg( + __read_only image1d_buffer_t src, + __write_only image2d_array_t dst, + int4 srcOrigin, + int4 dstOrigin, + int4 size) +{ + int4 coordsDst; + int coordSrc; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + if (coordsDst.x >= size.x) { + return; + } + + coordSrc = srcOrigin.x + coordsDst.x; + coordsDst += dstOrigin; + + uint4 texel; + texel = read_imageui(src, coordSrc); + write_imageui(dst, coordsDst, texel); +} + +__kernel void copy_image_reg_to_1db( + __read_only image2d_array_t src, + __write_only image1d_buffer_t dst, + int4 srcOrigin, + int4 dstOrigin, + int4 size) +{ + int coordDst; + int4 coordsSrc; + + coordsSrc.x = get_global_id(0); + coordsSrc.y = get_global_id(1); + coordsSrc.z = get_global_id(2); + coordsSrc.w = 0; + + if (coordsSrc.x >= size.x) { + return; + } + + coordDst = dstOrigin.x + coordsSrc.x; + coordsSrc += srcOrigin; + + uint4 texel; + texel = read_imageui(src, coordsSrc); + write_imageui(dst, coordDst, texel); +} + +__kernel void clear_image( + __write_only image2d_array_t image, + float4 patternFLOAT4, + int4 patternINT4, + uint4 patternUINT4, + int4 origin, + int4 size, + uint type) +{ + int4 coords; + + coords.x = get_global_id(0); + coords.y = get_global_id(1); + coords.z = get_global_id(2); + coords.w = 0; + + if ((coords.x >= size.x) || + (coords.y >= size.y) || + (coords.z >= size.z)) { + return; + } + + coords += origin; + + // Check components + switch (type) { + case 0: + write_imagef(image, coords, patternFLOAT4); + break; + case 1: + write_imagei(image, coords, patternINT4); + break; + case 2: + write_imageui(image, coords, patternUINT4); + break; + } +} + +__kernel void clear_image_1db( + __write_only image1d_buffer_t image, + float4 patternFLOAT4, + int4 patternINT4, + uint4 patternUINT4, + int4 origin, + int4 size, + uint type) +{ + int coord = get_global_id(0); + + if (coord >= size.x) { + return; + } + + coord += origin.x; + + // Check components + switch (type) { + case 0: + write_imagef(image, coord, patternFLOAT4); + break; + case 1: + write_imagei(image, coord, patternINT4); + break; + case 2: + write_imageui(image, coord, patternUINT4); + break; + } +} \ No newline at end of file diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_object_gfx7xx.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_object_gfx7xx.cpp new file mode 100644 index 0000000000..c1e00a9b60 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_object_gfx7xx.cpp @@ -0,0 +1,2 @@ +#include +uint8_t blit_object_gfx7xx[] = {127, 69, 76, 70, 2, 1, 1, 64, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 224, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 16, 55, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 56, 0, 2, 0, 64, 0, 8, 0, 1, 0, 2, 0, 0, 96, 6, 0, 0, 0, 184, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 24, 10, 0, 0, 0, 0, 0, 0, 24, 10, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 96, 5, 0, 0, 0, 0, 14, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 220, 37, 0, 0, 0, 0, 0, 0, 220, 37, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 46, 115, 104, 115, 116, 114, 116, 97, 98, 0, 46, 115, 116, 114, 116, 97, 98, 0, 46, 110, 111, 116, 101, 0, 46, 104, 115, 97, 100, 97, 116, 97, 95, 114, 101, 97, 100, 111, 110, 108, 121, 95, 97, 103, 101, 110, 116, 0, 46, 104, 115, 97, 116, 101, 120, 116, 0, 46, 115, 121, 109, 116, 97, 98, 0, 46, 115, 121, 109, 116, 97, 98, 0, 46, 114, 101, 108, 97, 46, 104, 115, 97, 116, 101, 120, 116, 0, 0, 0, 38, 104, 115, 97, 95, 101, 120, 116, 95, 105, 109, 97, 103, 101, 58, 58, 38, 95, 95, 111, 99, 109, 108, 116, 98, 108, 95, 77, 51, 50, 95, 69, 88, 80, 95, 69, 80, 0, 38, 104, 115, 97, 95, 101, 120, 116, 95, 105, 109, 97, 103, 101, 58, 58, 38, 95, 95, 111, 99, 109, 108, 116, 98, 108, 95, 77, 51, 50, 95, 76, 79, 71, 69, 0, 38, 104, 115, 97, 95, 101, 120, 116, 95, 105, 109, 97, 103, 101, 58, 58, 38, 95, 95, 111, 99, 109, 108, 116, 98, 108, 95, 77, 51, 50, 95, 76, 79, 71, 95, 73, 78, 86, 95, 69, 80, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 116, 111, 95, 98, 117, 102, 102, 101, 114, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 98, 117, 102, 102, 101, 114, 95, 116, 111, 95, 105, 109, 97, 103, 101, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 100, 101, 102, 97, 117, 108, 116, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 108, 105, 110, 101, 97, 114, 95, 116, 111, 95, 115, 116, 97, 110, 100, 97, 114, 100, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 115, 116, 97, 110, 100, 97, 114, 100, 95, 116, 111, 95, 108, 105, 110, 101, 97, 114, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 49, 100, 98, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 49, 100, 98, 95, 116, 111, 95, 114, 101, 103, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 114, 101, 103, 95, 116, 111, 95, 49, 100, 98, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 108, 101, 97, 114, 95, 105, 109, 97, 103, 101, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 108, 101, 97, 114, 95, 105, 109, 97, 103, 101, 95, 49, 100, 98, 95, 107, 101, 114, 110, 101, 108, 0, 95, 95, 104, 115, 97, 95, 115, 101, 99, 116, 105, 111, 110, 46, 104, 115, 97, 100, 97, 116, 97, 95, 114, 101, 97, 100, 111, 110, 108, 121, 95, 97, 103, 101, 110, 116, 0, 95, 95, 104, 115, 97, 95, 115, 101, 99, 116, 105, 111, 110, 46, 104, 115, 97, 116, 101, 120, 116, 0, 0, 0, 0, 4, 0, 0, 0, 8, 0, 0, 0, 1, 0, 0, 0, 65, 77, 68, 0, 1, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 12, 0, 0, 0, 2, 0, 0, 0, 65, 77, 68, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 0, 4, 0, 0, 0, 26, 0, 0, 0, 3, 0, 0, 0, 65, 77, 68, 0, 4, 0, 7, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 65, 77, 68, 0, 65, 77, 68, 71, 80, 85, 0, 0, 4, 0, 0, 0, 41, 0, 0, 0, 4, 0, 0, 0, 65, 77, 68, 0, 25, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 65, 77, 68, 32, 72, 83, 65, 32, 82, 117, 110, 116, 105, 109, 101, 32, 70, 105, 110, 97, 108, 105, 122, 101, 114, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 26, 0, 0, 0, 5, 0, 0, 0, 65, 77, 68, 0, 22, 0, 45, 104, 115, 97, 95, 99, 97, 108, 108, 95, 99, 111, 110, 118, 101, 110, 116, 105, 111, 110, 61, 48, 0, 37, 0, 0, 0, 0, 128, 63, 0, 0, 0, 0, 0, 96, 129, 63, 119, 62, 26, 57, 0, 192, 130, 63, 138, 105, 216, 57, 0, 32, 132, 63, 29, 70, 81, 58, 0, 160, 133, 63, 124, 54, 172, 57, 0, 0, 135, 63, 180, 12, 123, 58, 0, 128, 136, 63, 4, 116, 64, 58, 0, 0, 138, 63, 170, 171, 38, 58, 0, 128, 139, 63, 31, 15, 46, 58, 0, 0, 141, 63, 219, 250, 86, 58, 0, 160, 142, 63, 104, 49, 7, 57, 0, 32, 144, 63, 24, 226, 14, 58, 0, 192, 145, 63, 234, 220, 244, 56, 0, 64, 147, 63, 120, 89, 81, 58, 0, 224, 148, 63, 71, 125, 39, 58, 0, 128, 150, 63, 185, 105, 33, 58, 0, 32, 152, 63, 140, 130, 63, 58, 0, 224, 153, 63, 65, 38, 11, 55, 0, 128, 155, 63, 157, 155, 211, 57, 0, 32, 157, 63, 57, 205, 118, 58, 0, 224, 158, 63, 4, 147, 41, 58, 0, 160, 160, 63, 125, 136, 2, 58, 0, 96, 162, 63, 24, 24, 2, 58, 0, 32, 164, 63, 112, 173, 40, 58, 0, 224, 165, 63, 77, 181, 118, 58, 0, 192, 167, 63, 78, 59, 217, 57, 0, 160, 169, 63, 117, 90, 45, 56, 0, 96, 171, 63, 173, 205, 81, 58, 0, 64, 173, 63, 82, 247, 65, 58, 0, 32, 175, 63, 107, 197, 91, 58, 0, 32, 177, 63, 116, 96, 253, 56, 0, 0, 179, 63, 149, 32, 14, 58, 0, 0, 181, 63, 127, 102, 30, 57, 0, 224, 182, 63, 25, 143, 108, 58, 0, 224, 184, 63, 59, 122, 93, 58, 0, 224, 186, 63, 144, 213, 122, 58, 0, 0, 189, 63, 245, 57, 138, 57, 0, 0, 191, 63, 179, 205, 60, 58, 0, 32, 193, 63, 166, 204, 196, 57, 0, 64, 195, 63, 68, 155, 89, 57, 0, 96, 197, 63, 42, 66, 101, 57, 0, 128, 199, 63, 138, 76, 215, 57, 0, 160, 201, 63, 51, 236, 77, 58, 0, 224, 203, 63, 239, 79, 193, 57, 0, 32, 206, 63, 163, 130, 17, 57, 0, 96, 208, 63, 187, 246, 204, 56, 0, 160, 210, 63, 31, 217, 129, 57, 0, 224, 212, 63, 94, 213, 26, 58, 0, 64, 215, 63, 90, 153, 31, 57, 0, 128, 217, 63, 19, 174, 104, 58, 0, 224, 219, 63, 190, 188, 93, 58, 0, 96, 222, 63, 94, 130, 244, 55, 0, 192, 224, 63, 194, 238, 205, 57, 0, 32, 227, 63, 149, 75, 124, 58, 0, 160, 229, 63, 59, 55, 72, 58, 0, 32, 232, 63, 129, 82, 75, 58, 0, 192, 234, 63, 221, 231, 198, 55, 0, 64, 237, 63, 237, 1, 243, 57, 0, 224, 239, 63, 123, 51, 23, 57, 0, 128, 242, 63, 44, 158, 59, 56, 0, 32, 245, 63, 164, 162, 47, 57, 0, 192, 247, 63, 152, 251, 6, 58, 0, 128, 250, 63, 220, 182, 236, 56, 0, 32, 253, 63, 103, 96, 112, 58, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 255, 59, 65, 172, 41, 52, 0, 0, 126, 60, 252, 176, 168, 53, 0, 192, 189, 60, 234, 131, 141, 54, 0, 16, 252, 60, 120, 14, 27, 54, 0, 240, 28, 61, 254, 185, 135, 54, 0, 160, 59, 61, 101, 236, 49, 54, 0, 16, 90, 61, 25, 113, 221, 54, 0, 80, 120, 61, 69, 0, 195, 53, 0, 32, 139, 61, 81, 119, 155, 55, 0, 0, 154, 61, 13, 203, 235, 55, 0, 208, 168, 61, 131, 159, 131, 55, 0, 128, 183, 61, 229, 138, 82, 55, 0, 16, 198, 61, 24, 235, 162, 55, 0, 144, 212, 61, 149, 116, 218, 54, 0, 240, 226, 61, 183, 30, 169, 54, 0, 48, 241, 61, 21, 183, 131, 55, 0, 96, 255, 61, 219, 49, 17, 55, 0, 176, 6, 62, 104, 62, 63, 56, 0, 176, 13, 62, 151, 106, 21, 56, 0, 160, 20, 62, 15, 124, 41, 56, 0, 128, 27, 62, 15, 16, 126, 56, 0, 96, 34, 62, 101, 182, 21, 56, 0, 48, 41, 62, 161, 227, 229, 55, 0, 240, 47, 62, 83, 56, 24, 56, 0, 176, 54, 62, 157, 113, 254, 53, 0, 80, 61, 62, 8, 129, 68, 56, 0, 240, 67, 62, 144, 50, 80, 56, 0, 144, 74, 62, 232, 57, 53, 55, 0, 16, 81, 62, 241, 15, 94, 56, 0, 144, 87, 62, 64, 167, 100, 56, 0, 16, 94, 62, 45, 116, 134, 55, 0, 112, 100, 62, 205, 227, 123, 56, 0, 224, 106, 62, 62, 173, 133, 54, 0, 48, 113, 62, 21, 183, 3, 56, 0, 128, 119, 62, 220, 203, 173, 55, 0, 192, 125, 62, 175, 54, 12, 56, 0, 0, 130, 62, 211, 82, 22, 55, 0, 16, 133, 62, 57, 113, 146, 56, 0, 32, 136, 62, 215, 252, 197, 56, 0, 48, 139, 62, 213, 85, 174, 56, 0, 64, 142, 62, 105, 193, 24, 56, 0, 64, 145, 62, 231, 253, 160, 56, 0, 64, 148, 62, 239, 9, 173, 56, 0, 64, 151, 62, 225, 186, 98, 56, 0, 48, 154, 62, 76, 205, 238, 56, 0, 48, 157, 62, 210, 170, 152, 55, 0, 32, 160, 62, 26, 26, 66, 55, 0, 0, 163, 62, 14, 225, 197, 56, 0, 240, 165, 62, 238, 42, 191, 55, 0, 208, 168, 62, 45, 135, 45, 56, 0, 176, 171, 62, 138, 46, 238, 55, 0, 128, 174, 62, 172, 223, 222, 56, 0, 96, 177, 62, 185, 242, 2, 56, 0, 48, 180, 62, 155, 30, 72, 56, 0, 0, 183, 62, 43, 170, 14, 56, 0, 192, 185, 62, 93, 251, 235, 56, 0, 144, 188, 62, 221, 95, 37, 56, 0, 80, 191, 62, 130, 59, 120, 56, 0, 16, 194, 62, 30, 218, 81, 56, 0, 208, 196, 62, 5, 27, 78, 55, 0, 128, 199, 62, 155, 67, 143, 56, 0, 48, 202, 62, 16, 14, 202, 56, 0, 224, 204, 62, 139, 192, 202, 56, 0, 144, 207, 62, 95, 246, 145, 56, 0, 64, 210, 62, 203, 33, 129, 55, 0, 224, 212, 62, 154, 154, 108, 56, 0, 128, 215, 62, 35, 153, 148, 56, 0, 32, 218, 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0, 0, 0, 0, 0, 0, 0, 0, 0, 66, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 55, 0, 0, 0, 0, 0, 0, 128, 1, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 24, 0, 0, 0, 0, 0, 0, 0, 74, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 144, 56, 0, 0, 0, 0, 0, 0, 176, 1, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 5, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 24, 0, 0, 0, 0, 0, 0, 0}; diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_object_gfx9xx.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_object_gfx9xx.cpp new file mode 100644 index 0000000000..1c7683a4ec --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_object_gfx9xx.cpp @@ -0,0 +1,2 @@ +#include +uint8_t blit_object_gfx9xx[] = {127, 69, 76, 70, 2, 1, 1, 64, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 224, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 72, 58, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 56, 0, 2, 0, 64, 0, 8, 0, 1, 0, 2, 0, 0, 96, 6, 0, 0, 0, 184, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 24, 10, 0, 0, 0, 0, 0, 0, 24, 10, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 96, 5, 0, 0, 0, 0, 14, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 24, 41, 0, 0, 0, 0, 0, 0, 24, 41, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 46, 115, 104, 115, 116, 114, 116, 97, 98, 0, 46, 115, 116, 114, 116, 97, 98, 0, 46, 110, 111, 116, 101, 0, 46, 104, 115, 97, 100, 97, 116, 97, 95, 114, 101, 97, 100, 111, 110, 108, 121, 95, 97, 103, 101, 110, 116, 0, 46, 104, 115, 97, 116, 101, 120, 116, 0, 46, 115, 121, 109, 116, 97, 98, 0, 46, 115, 121, 109, 116, 97, 98, 0, 46, 114, 101, 108, 97, 46, 104, 115, 97, 116, 101, 120, 116, 0, 0, 0, 38, 104, 115, 97, 95, 101, 120, 116, 95, 105, 109, 97, 103, 101, 58, 58, 38, 95, 95, 111, 99, 109, 108, 116, 98, 108, 95, 77, 51, 50, 95, 69, 88, 80, 95, 69, 80, 0, 38, 104, 115, 97, 95, 101, 120, 116, 95, 105, 109, 97, 103, 101, 58, 58, 38, 95, 95, 111, 99, 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107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 49, 100, 98, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 49, 100, 98, 95, 116, 111, 95, 114, 101, 103, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 111, 112, 121, 95, 105, 109, 97, 103, 101, 95, 114, 101, 103, 95, 116, 111, 95, 49, 100, 98, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 108, 101, 97, 114, 95, 105, 109, 97, 103, 101, 95, 107, 101, 114, 110, 101, 108, 0, 38, 95, 95, 99, 108, 101, 97, 114, 95, 105, 109, 97, 103, 101, 95, 49, 100, 98, 95, 107, 101, 114, 110, 101, 108, 0, 95, 95, 104, 115, 97, 95, 115, 101, 99, 116, 105, 111, 110, 46, 104, 115, 97, 100, 97, 116, 97, 95, 114, 101, 97, 100, 111, 110, 108, 121, 95, 97, 103, 101, 110, 116, 0, 95, 95, 104, 115, 97, 95, 115, 101, 99, 116, 105, 111, 110, 46, 104, 115, 97, 116, 101, 120, 116, 0, 0, 0, 0, 4, 0, 0, 0, 8, 0, 0, 0, 1, 0, 0, 0, 65, 77, 68, 0, 1, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 12, 0, 0, 0, 2, 0, 0, 0, 65, 77, 68, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 0, 4, 0, 0, 0, 26, 0, 0, 0, 3, 0, 0, 0, 65, 77, 68, 0, 4, 0, 7, 0, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 65, 77, 68, 0, 65, 77, 68, 71, 80, 85, 0, 0, 4, 0, 0, 0, 41, 0, 0, 0, 4, 0, 0, 0, 65, 77, 68, 0, 25, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 65, 77, 68, 32, 72, 83, 65, 32, 82, 117, 110, 116, 105, 109, 101, 32, 70, 105, 110, 97, 108, 105, 122, 101, 114, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 26, 0, 0, 0, 5, 0, 0, 0, 65, 77, 68, 0, 22, 0, 45, 104, 115, 97, 95, 99, 97, 108, 108, 95, 99, 111, 110, 118, 101, 110, 116, 105, 111, 110, 61, 48, 0, 5, 0, 0, 0, 0, 128, 63, 0, 0, 0, 0, 0, 96, 129, 63, 119, 62, 26, 57, 0, 192, 130, 63, 138, 105, 216, 57, 0, 32, 132, 63, 29, 70, 81, 58, 0, 160, 133, 63, 124, 54, 172, 57, 0, 0, 135, 63, 180, 12, 123, 58, 0, 128, 136, 63, 4, 116, 64, 58, 0, 0, 138, 63, 170, 171, 38, 58, 0, 128, 139, 63, 31, 15, 46, 58, 0, 0, 141, 63, 219, 250, 86, 58, 0, 160, 142, 63, 104, 49, 7, 57, 0, 32, 144, 63, 24, 226, 14, 58, 0, 192, 145, 63, 234, 220, 244, 56, 0, 64, 147, 63, 120, 89, 81, 58, 0, 224, 148, 63, 71, 125, 39, 58, 0, 128, 150, 63, 185, 105, 33, 58, 0, 32, 152, 63, 140, 130, 63, 58, 0, 224, 153, 63, 65, 38, 11, 55, 0, 128, 155, 63, 157, 155, 211, 57, 0, 32, 157, 63, 57, 205, 118, 58, 0, 224, 158, 63, 4, 147, 41, 58, 0, 160, 160, 63, 125, 136, 2, 58, 0, 96, 162, 63, 24, 24, 2, 58, 0, 32, 164, 63, 112, 173, 40, 58, 0, 224, 165, 63, 77, 181, 118, 58, 0, 192, 167, 63, 78, 59, 217, 57, 0, 160, 169, 63, 117, 90, 45, 56, 0, 96, 171, 63, 173, 205, 81, 58, 0, 64, 173, 63, 82, 247, 65, 58, 0, 32, 175, 63, 107, 197, 91, 58, 0, 32, 177, 63, 116, 96, 253, 56, 0, 0, 179, 63, 149, 32, 14, 58, 0, 0, 181, 63, 127, 102, 30, 57, 0, 224, 182, 63, 25, 143, 108, 58, 0, 224, 184, 63, 59, 122, 93, 58, 0, 224, 186, 63, 144, 213, 122, 58, 0, 0, 189, 63, 245, 57, 138, 57, 0, 0, 191, 63, 179, 205, 60, 58, 0, 32, 193, 63, 166, 204, 196, 57, 0, 64, 195, 63, 68, 155, 89, 57, 0, 96, 197, 63, 42, 66, 101, 57, 0, 128, 199, 63, 138, 76, 215, 57, 0, 160, 201, 63, 51, 236, 77, 58, 0, 224, 203, 63, 239, 79, 193, 57, 0, 32, 206, 63, 163, 130, 17, 57, 0, 96, 208, 63, 187, 246, 204, 56, 0, 160, 210, 63, 31, 217, 129, 57, 0, 224, 212, 63, 94, 213, 26, 58, 0, 64, 215, 63, 90, 153, 31, 57, 0, 128, 217, 63, 19, 174, 104, 58, 0, 224, 219, 63, 190, 188, 93, 58, 0, 96, 222, 63, 94, 130, 244, 55, 0, 192, 224, 63, 194, 238, 205, 57, 0, 32, 227, 63, 149, 75, 124, 58, 0, 160, 229, 63, 59, 55, 72, 58, 0, 32, 232, 63, 129, 82, 75, 58, 0, 192, 234, 63, 221, 231, 198, 55, 0, 64, 237, 63, 237, 1, 243, 57, 0, 224, 239, 63, 123, 51, 23, 57, 0, 128, 242, 63, 44, 158, 59, 56, 0, 32, 245, 63, 164, 162, 47, 57, 0, 192, 247, 63, 152, 251, 6, 58, 0, 128, 250, 63, 220, 182, 236, 56, 0, 32, 253, 63, 103, 96, 112, 58, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 255, 59, 65, 172, 41, 52, 0, 0, 126, 60, 252, 176, 168, 53, 0, 192, 189, 60, 234, 131, 141, 54, 0, 16, 252, 60, 120, 14, 27, 54, 0, 240, 28, 61, 254, 185, 135, 54, 0, 160, 59, 61, 101, 236, 49, 54, 0, 16, 90, 61, 25, 113, 221, 54, 0, 80, 120, 61, 69, 0, 195, 53, 0, 32, 139, 61, 81, 119, 155, 55, 0, 0, 154, 61, 13, 203, 235, 55, 0, 208, 168, 61, 131, 159, 131, 55, 0, 128, 183, 61, 229, 138, 82, 55, 0, 16, 198, 61, 24, 235, 162, 55, 0, 144, 212, 61, 149, 116, 218, 54, 0, 240, 226, 61, 183, 30, 169, 54, 0, 48, 241, 61, 21, 183, 131, 55, 0, 96, 255, 61, 219, 49, 17, 55, 0, 176, 6, 62, 104, 62, 63, 56, 0, 176, 13, 62, 151, 106, 21, 56, 0, 160, 20, 62, 15, 124, 41, 56, 0, 128, 27, 62, 15, 16, 126, 56, 0, 96, 34, 62, 101, 182, 21, 56, 0, 48, 41, 62, 161, 227, 229, 55, 0, 240, 47, 62, 83, 56, 24, 56, 0, 176, 54, 62, 157, 113, 254, 53, 0, 80, 61, 62, 8, 129, 68, 56, 0, 240, 67, 62, 144, 50, 80, 56, 0, 144, 74, 62, 232, 57, 53, 55, 0, 16, 81, 62, 241, 15, 94, 56, 0, 144, 87, 62, 64, 167, 100, 56, 0, 16, 94, 62, 45, 116, 134, 55, 0, 112, 100, 62, 205, 227, 123, 56, 0, 224, 106, 62, 62, 173, 133, 54, 0, 48, 113, 62, 21, 183, 3, 56, 0, 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+1,209 @@ +# +# Minimum version of cmake required +# +cmake_minimum_required(VERSION 3.5.0) + +# +# Required Defines on cmake command line +# +# 1) Set location of OpenCL header files +# OPENCL_DIR="Root for OpenCL install" +# If not set, the default value is "/opt/rocm/opencl" +# +# 2) Set location of CLANG/LLVM binary directory +# LLVM_DIR="Directory contains clang, llvm-link and llvm-dis +# If not set, the default value is "/lightning/bin" +# +# 3) Set BITCODE library directory +# BITCODE_DIR="Directory contains the bitcode library" +# If not set, the default value is "${OPENCL_DIR}/lib/x86_64/bitcode" +# +# 4) Set TARGET_DEVICES to indicate gpu types for kernel builds (e.g., "gfx803;gfx900; ...") +# If not set, the target devices are those have the Open Compute Library Controls (OCLC) +# bitcode file, "oclc_isa_version_*.amdgcn.bc", in the BITCODE directory +# +# Building - Should be automatic but for manual builds: +# +# 1) *** Create build folder e.g. "blit_src/build" - any name will do +# 2) Go to the build folder +# 3) Run "cmake .." +# 4) Run "make opencl_blit_objects.cpp" +# + +## Include the cmake_modules utils.cmake +list ( APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../../../opensrc/hsa-runtime/cmake_modules" ) +include ( utils ) + +# Flag to abort before executing after default initialization of cache variables +set (QUIT 0) + +# Collect possible LLVM version directories. +set (LLVM_SEARCH_PATHS "") +set (LLVM_SEARCH_ROOT "${CMAKE_INSTALL_PREFIX}/llvm/lib/clang") +listsubdirs(${LLVM_SEARCH_ROOT} FOLDERS) +foreach(ITEM IN LISTS FOLDERS) + list (APPEND LLVM_SEARCH_PATHS "${LLVM_SEARCH_ROOT}/${ITEM}/include/") +endforeach() + + +if (NOT DEFINED OPENCL_VER) + set (OPENCL_VER "2.0") +endif() +set( OPENCL_VER ${OPENCL_VER} CACHE STRING "OpenCL version" FORCE ) + +get_include_path(BITCODE_DIR "Bitcode library path" RESULT FOUND NAMES "opencl.amdgcn.bc" HINTS "${CMAKE_INSTALL_PREFIX}/lib/bitcode" "${OPENCL_DIR}/lib/x86_64/bitcode") +if (NOT ${FOUND}) + set (QUIT 1) +endif() + +set (BITCODE_LIB "${BITCODE_DIR}/opencl.amdgcn.bc") +if (NOT EXISTS ${BITCODE_LIB}) + message("ERROR: path to opencl.amdgcn.bc (${BITCODE_LIB}) is not valid. Is BITCODE_DIR correctly defined?") + set (QUIT 1) +endif() + +get_include_path(LLVM_DIR "LLVM directory" RESULT FOUND NAMES "clang" HINTS "${CMAKE_INSTALL_PREFIX}/llvm/bin") +if (NOT ${FOUND}) + set (QUIT 1) +endif() + +set (CLANG "${LLVM_DIR}/clang") +if (NOT EXISTS ${CLANG}) + message("ERROR: path to clang (${CLANG}) is not valid. Is LLVM_DIR correctly defined?") + set (QUIT 1) +endif() + +set (LLVM_LINK "${LLVM_DIR}/llvm-link") +if (NOT EXISTS ${LLVM_LINK}) + message("ERROR: path to llvm-link (${LLVM_LINK}) is not valid. Is LLVM_DIR correctly defined?") + set (QUIT 1) +endif() + +set (LLVM_DIS "${LLVM_DIR}/llvm-dis") +if (NOT EXISTS ${LLVM_DIS}) + message("ERROR: path to llvm-dis (${LLVM_DIS}) is not valid. Is LLVM_DIR correctly defined?") + set (QUIT 1) +endif() + +# Value of Images Src Dir is bound in parent environment +set (KERNELS_DIR "${IMAGE_SOURCE_DIR}/blit_src") + +# Define the target devices with xnack enable +if (NOT DEFINED XNACK_DEVS) + set (XNACK_DEVS "gfx801;gfx902") +endif() +set( XNACK_DEVS ${XNACK_DEVS} CACHE STRING "XNACK targets" FORCE ) + +# Determine the target devices if not specified +if (NOT DEFINED TARGET_DEVICES) + set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx900;gfx902;gfx904;gfx906;gfx908;gfx1010;gfx1011;gfx1012") +endif() +set( TARGET_DEVICES ${TARGET_DEVICES} CACHE STRING "Build targets" FORCE ) + +# End of default configuration and path checking. +# Quit if configuration is incomplete. +if (QUIT) + message(FATAL_ERROR "Configuration halted.") + return() +endif() + +# Determine the target triple +execute_process(COMMAND ${LLVM_DIS} ${BITCODE_LIB} -o - OUTPUT_VARIABLE LLVM_DIS_OUTPUT) +string(REGEX MATCH "(amdgcn-amd-.*)\"[\r\n]" QUOTED_TRIPLE "${LLVM_DIS_OUTPUT}") +string(REGEX REPLACE "[\"\r\n]" "" TARGET_TRIPLE "${QUOTED_TRIPLE}") + +message("") +message("Build Setting:") +message(" Target Devices: ${TARGET_DEVICES}") +message(" Proj. Src Dir: ${PROJECT_SOURCE_DIR}") +message(" Proj. Bld Dir: ${PROJECT_BINARY_DIR}") +message(" Image Source Dir: ${IMAGE_SOURCE_DIR}") +message(" LLVM Dir: ${LLVM_DIR}") +message(" Clang path: ${CLANG}") +message(" OpenCL Dir: ${OPENCL_DIR}") +message(" OpenCL version: ${OPENCL_VER}") +message(" Bitcode Dir: ${BITCODE_DIR}") +message(" Target Triple: ${TARGET_TRIPLE}") + +##========================================== +## Generate Kernel Bitcode +##========================================== +function(gen_kernel_bc TARGET_DEV XNACK_OPT FPREFIX INPUT_FILE OUTPUT_FILE) + + string (REPLACE "gfx" "" GFXIP "${TARGET_DEV}") + separate_arguments(CLANG_ARG_LIST UNIX_COMMAND + "-O2 -x cl -target ${TARGET_TRIPLE} -Xclang -finclude-default-header -mcpu=${TARGET_DEV} -m${XNACK_OPT} + -nogpulib + -Xclang -mlink-bitcode-file -Xclang ${BITCODE_DIR}/opencl.amdgcn.bc + -Xclang -mlink-bitcode-file -Xclang ${BITCODE_DIR}/ockl.amdgcn.bc + -Xclang -mlink-bitcode-file -Xclang ${BITCODE_DIR}/ocml.amdgcn.bc + -Xclang -mlink-bitcode-file -Xclang ${BITCODE_DIR}/oclc_daz_opt_on.amdgcn.bc + -Xclang -mlink-bitcode-file -Xclang ${BITCODE_DIR}/oclc_isa_version_${GFXIP}.amdgcn.bc + -Xclang -mlink-bitcode-file -Xclang ${BITCODE_DIR}/oclc_unsafe_math_off.amdgcn.bc + -Xclang -mlink-bitcode-file -Xclang ${BITCODE_DIR}/oclc_finite_only_off.amdgcn.bc + -cl-std=CL${OPENCL_VER} -o ${OUTPUT_FILE} ${INPUT_FILE}") + + add_custom_target("${FPREFIX}" ${CLANG} ${CLANG_ARG_LIST} + COMMENT "BUILDING bitcode for ${FPREFIX}..." + VERBATIM) + + message(" Kernel Source: " ${INPUT_FILE}) + message(" Kernel Bitcode: " ${OUTPUT_FILE}) + +endfunction(gen_kernel_bc) + +##========================================== +## Build the kernel for a device +##========================================== +function(build_kernel BLIT_NAME TARG_DEV) + + list (FIND XNACK_DEVS ${TARG_DEV} XNACK_IDX) + if (${XNACK_IDX} GREATER -1) + set (XNACK_OPT "xnack") + else() + set (XNACK_OPT "no-xnack") + endif() + + set (FILE_PREFIX "${BLIT_NAME}_${TARG_DEV}") + set (HSACO_TARG_LIST ${HSACO_TARG_LIST} "${FILE_PREFIX}" CACHE INTERNAL HSACO_TARG_LIST) + + ## generate kernel bitcodes + ## + set (CL_FILE "${KERNELS_DIR}/imageblit_kernels.cl") + set (KERNEL_BC_FILE "${FILE_PREFIX}") + gen_kernel_bc(${TARG_DEV} ${XNACK_OPT} ${FILE_PREFIX} ${CL_FILE} ${KERNEL_BC_FILE}) + +endfunction(build_kernel) + + +##========================================== +## Build the kernel for a list of devices +##========================================== +function(build_kernel_for_devices BLIT_NAME) + + set(HSACO_TARG_LIST PARENT_SCOPE) + + foreach(dev ${TARGET_DEVICES}) + message("\n Working on: ${dev} ...") + build_kernel(${BLIT_NAME} ${dev}) + endforeach(dev) + +endfunction(build_kernel_for_devices) + +##========================================== +## Create BLIT Code Object blobs file +##========================================== +function(generate_blit_file BFILE) + + file(REMOVE ${IMAGE_SOURCE_DIR}/${BFILE}) + + add_custom_command(OUTPUT ${IMAGE_SOURCE_DIR}/${BFILE} + COMMAND ${KERNELS_DIR}/create_hsaco_ascii_file.sh ${IMAGE_SOURCE_DIR}/${BFILE}) + + message("\n Will create ASCII bitcodes in ${BFILE} for ${TARGET_DEVICES} ... \n") + add_custom_target(${BFILE} DEPENDS ${HSACO_TARG_LIST} ${IMAGE_SOURCE_DIR}/${BFILE}) + +endfunction(generate_blit_file) + +build_kernel_for_devices("ocl_blit_object") +generate_blit_file("opencl_blit_objects.cpp") diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/README.md b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/README.md new file mode 100644 index 0000000000..b97e7c35b6 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/README.md @@ -0,0 +1,61 @@ +## OVERVIEW + +This directory contains the CMakeLists.txt for automatically generating +the ASCII code object file, "opencl_blit_objects.cpp", which contains the +blobs of the code object of the Image BLIT kernels for the devices supported +on ROCm. The blobs are loaded by the image library and required to update +whenever a new device is introduced. + + +## ADD NEW DEVICE + +To add a new supported device, the following steps are required: + + 1. Declare an extern variable of the device XXX, by adding the line of + "extern uint32_t ocl_blit_object_gfxNNN[];" in "blit_kernel.cpp" + 2. Update the BlitKernel::GetPatchedBlitObject() function to support the + device by assigning "blit_code_object" to "ocl_blit_object_gfxNNN[]" + 3. Add the gfxNNN to the TARGET_DEVICES list in CMakeLists.txt + 4. If the new device requires XNACK, add it to the XNACK_DEVS list in CMakeLists.txt + 5. Rebuild the image library + + +## REQUIREMENT + +In order to create the code object file, the bitcodes of the kernels are +generated by the compiler and the following bitcode libraries are required, + + opencl.amdgcn.bc + ocml.amdgcn.bc + irif.amdgcn.bc + oclc_correctly_rounded_sqrt_off.amdgcn.bc + oclc_daz_opt_on.amdgcn.bc + oclc_finite_only_off.amdgcn.bc + oclc_isa_version_.amdgcn.bc + oclc_unsafe_math_off.amdgcn.bc + +where is the gfxip number of the GPU. The directory contains the +bitcode libraries is specified in a CMake varaible. + +There are several variables are required for CMake to build the code +object file. All of them have default values, and defined as following: + + OPENCL_DIR - the location of installed OpenCL + (Default: /opt/rocm/opencl) + BITCODE_DIR - the directory contains the bitcode library + (Default: ${OPENCL_DIR}/lib/x86_64/bitcode) + LLVM_DIR - the directory contains the clang, llvm-link and llvm-dis + executables + (Default: ${PROJECT_BUILD_DIR}/../lightning/bin) + TARGET_DEVICES - list of gpu types for kernel builds (eg. "gfx900;gfx902") + (Default: "gfx900;gfx902;gfx904") + + +## STEPS TO BUILD + + $ make build + $ cd build + $ cmake -D${OPENCL_DIR} -D${BITCODE_DIR} -D${LLVM_DIR} -D${TARGET_DEVICES} .. + $ make opencl_blit_objects.cpp + + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/create_hsaco_ascii_file.sh b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/create_hsaco_ascii_file.sh new file mode 100755 index 0000000000..d594b56093 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/create_hsaco_ascii_file.sh @@ -0,0 +1,32 @@ +#!/bin/bash -e + +opencl_blit_file="$1" + +if ! command -v xxd >/dev/null +then + echo "xxd not found!" + exit 1 +fi + +# Create the file in a temporary location and then move it in atomically +rm -rf "$opencl_blit_file.tmp" +{ +cat < "$opencl_blit_file.tmp" + +# Move the file atomically into place, so make doesn't get half a file +# but only if it has changed. cmp -s is happy for one file not to exist +cmp -s "$opencl_blit_file.tmp" "$opencl_blit_file" || + mv -f "$opencl_blit_file.tmp" "$opencl_blit_file" diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/imageblit_kernels.cl b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/imageblit_kernels.cl new file mode 100644 index 0000000000..64c0b72927 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/imageblit_kernels.cl @@ -0,0 +1,615 @@ +/// Kernel code for HSA image import/export/copy/clear in OpenCL C form. + +uint4 read_image(__read_only image1d_t src1d, + __read_only image2d_t src2d, + __read_only image3d_t src3d, + __read_only image1d_array_t src1da, + __read_only image2d_array_t src2da, + uint format, + int4 coords) { + switch (format) { + case 0: // 1D + return read_imageui(src1d, coords.x); + break; + case 1: // 2D + return read_imageui(src2d, coords.xy); + break; + case 2: // 3D + return read_imageui(src3d, coords); + break; + case 3: // 1DA + return read_imageui(src1da, coords.xy); + break; + case 4: // 2DA + return read_imageui(src2da, coords); + break; + // case 5: //1DB + // return read_imageui(src1db, coords.x); + // break; + default: // Critical failure. + return 0; + } +} + +void write_image(__write_only image1d_t src1d, + __write_only image2d_t src2d, + __write_only image3d_t src3d, + __write_only image1d_array_t src1da, + __write_only image2d_array_t src2da, + uint format, + int4 coords, + uint4 texel) { + switch (format) { + case 0: // 1D + write_imageui(src1d, coords.x, texel); + break; + case 1: // 2D + write_imageui(src2d, coords.xy, texel); + break; + case 2: // 3D + write_imageui(src3d, coords, texel); + break; + case 3: // 1DA + write_imageui(src1da, coords.xy, texel); + break; + case 4: // 2DA + write_imageui(src2da, coords, texel); + break; + // case 5: //1DB + // write_imageui(src1db, coords.x, texel); + // break; + default: // Critical failure. + return; + } +} + +float4 read_image_float(__read_only image1d_t src1d, + __read_only image2d_t src2d, + __read_only image3d_t src3d, + __read_only image1d_array_t src1da, + __read_only image2d_array_t src2da, + uint format, + int4 coords) { + switch (format) { + case 0: // 1D + return read_imagef(src1d, coords.x); + break; + case 1: // 2D + return read_imagef(src2d, coords.xy); + break; + case 2: // 3D + return read_imagef(src3d, coords); + break; + case 3: // 1DA + return read_imagef(src1da, coords.xy); + break; + case 4: // 2DA + return read_imagef(src2da, coords); + break; + default: // Critical failure. + return 0; + } +} + +void write_image_float(__write_only image1d_t src1d, + __write_only image2d_t src2d, + __write_only image3d_t src3d, + __write_only image1d_array_t src1da, + __write_only image2d_array_t src2da, + uint format, + int4 coords, + float4 texel) { + switch (format) { + case 0: // 1D + write_imagef(src1d, coords.x, texel); + break; + case 1: // 2D + write_imagef(src2d, coords.xy, texel); + break; + case 2: // 3D + write_imagef(src3d, coords, texel); + break; + case 3: // 1DA + write_imagef(src1da, coords.xy, texel); + break; + case 4: // 2DA + write_imagef(src2da, coords, texel); + break; + default: // Critical failure. + return; + } +} + +void write_image_int(__write_only image1d_t src1d, + __write_only image2d_t src2d, + __write_only image3d_t src3d, + __write_only image1d_array_t src1da, + __write_only image2d_array_t src2da, + uint format, + int4 coords, + int4 texel) { + switch (format) { + case 0: // 1D + write_imagei(src1d, coords.x, texel); + break; + case 1: // 2D + write_imagei(src2d, coords.xy, texel); + break; + case 2: // 3D + write_imagei(src3d, coords, texel); + break; + case 3: // 1DA + write_imagei(src1da, coords.xy, texel); + break; + case 4: // 2DA + write_imagei(src2da, coords, texel); + break; + default: // Critical failure. + return; + } +} + +//image handle is repeated since OCL doesn't allow pointers to or casting of images. +//dst is start of output pixel in destination buffer +//format.x is element count +//format.y is element size +//format.z is max(dword per pixel, 1) +//format.w is texture type. +//srcOrigin is start pixel address. +//No export for 64, 96, 128 bit formats +__kernel void copy_image_to_buffer( + __read_only image1d_t src1d, + __read_only image2d_t src2d, + __read_only image3d_t src3d, + __read_only image1d_array_t src1da, + __read_only image2d_array_t src2da, + __global void* const dst, + int4 srcOrigin, + uint4 format, + ulong pitch, + ulong slice_pitch) +{ + ulong idxDst; + int4 coordsSrc; + uint4 texel; + + __global uchar* const dstUChar = (__global uchar* const)dst; + __global ushort* const dstUShort = (__global ushort* const)dst; + __global uint* const dstUInt = (__global uint* const)dst; + + coordsSrc.x = get_global_id(0); + coordsSrc.y = get_global_id(1); + coordsSrc.z = get_global_id(2); + coordsSrc.w = 0; + + idxDst = (coordsSrc.z * slice_pitch + coordsSrc.y * pitch + + coordsSrc.x) * format.z; + + coordsSrc.x += srcOrigin.x; + coordsSrc.y += srcOrigin.y; + coordsSrc.z += srcOrigin.z; + + texel = read_image(src1d, src2d, src3d, src1da, src2da, format.w, coordsSrc); + + // Check components + switch (format.x) { + case 1: + // Check size + switch (format.y) { + case 1: + dstUChar[idxDst] = texel.x; + break; + case 2: + dstUShort[idxDst] = texel.x; + break; + case 4: + dstUInt[idxDst] = texel.x; + break; + } + break; + case 2: + // Check size + switch (format.y) { + case 1: + dstUShort[idxDst] = texel.x | + (texel.y << 8); + break; + case 2: + dstUInt[idxDst] = texel.x | (texel.y << 16); + break; + case 4: + dstUInt[idxDst++] = texel.x; + dstUInt[idxDst] = texel.y; + break; + } + break; + case 4: + // Check size + switch (format.y) { + case 1: + dstUInt[idxDst] = texel.x | + (texel.y << 8) | + (texel.z << 16) | + (texel.w << 24); + break; + case 2: + dstUInt[idxDst++] = texel.x | (texel.y << 16); + dstUInt[idxDst] = texel.z | (texel.w << 16); + break; + case 4: + dstUInt[idxDst++] = texel.x; + dstUInt[idxDst++] = texel.y; + dstUInt[idxDst++] = texel.z; + dstUInt[idxDst] = texel.w; + break; + } + break; + } +} + +__kernel void copy_buffer_to_image(__global uint* src, + __write_only image1d_t dst1d, + __write_only image2d_t dst2d, + __write_only image3d_t dst3d, + __write_only image1d_array_t dst1da, + __write_only image2d_array_t dst2da, + int4 dstOrigin, + uint4 format, + ulong pitch, + ulong slice_pitch) { + ulong idxSrc; + int4 coordsDst; + uint4 texel; + + __global uint* srcUInt = src; + __global ushort* srcUShort = (__global ushort*)src; + __global uchar* srcUChar = (__global uchar*)src; + + ushort tmpUShort; + uint tmpUInt; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + idxSrc = (coordsDst.z * slice_pitch + coordsDst.y * pitch + coordsDst.x) * format.z; + + coordsDst.x += dstOrigin.x; + coordsDst.y += dstOrigin.y; + coordsDst.z += dstOrigin.z; + + // Check components + switch (format.x) { + case 1: + // Check size + switch (format.y) { + case 1: + texel.x = (uint)srcUChar[idxSrc]; + break; + case 2: + texel.x = (uint)srcUShort[idxSrc]; + break; + case 4: + texel.x = srcUInt[idxSrc]; + break; + } + break; + case 2: + // Check size + switch (format.y) { + case 1: + tmpUShort = srcUShort[idxSrc]; + texel.x = (uint)(tmpUShort & 0xff); + texel.y = (uint)(tmpUShort >> 8); + break; + case 2: + tmpUInt = srcUInt[idxSrc]; + texel.x = (tmpUInt & 0xffff); + texel.y = (tmpUInt >> 16); + break; + case 4: + texel.x = srcUInt[idxSrc++]; + texel.y = srcUInt[idxSrc]; + break; + } + break; + case 4: + // Check size + switch (format.y) { + case 1: + tmpUInt = srcUInt[idxSrc]; + texel.x = tmpUInt & 0xff; + texel.y = (tmpUInt >> 8) & 0xff; + texel.z = (tmpUInt >> 16) & 0xff; + texel.w = (tmpUInt >> 24) & 0xff; + break; + case 2: + tmpUInt = srcUInt[idxSrc++]; + texel.x = tmpUInt & 0xffff; + texel.y = (tmpUInt >> 16); + tmpUInt = srcUInt[idxSrc]; + texel.z = tmpUInt & 0xffff; + texel.w = (tmpUInt >> 16); + break; + case 4: + texel.x = srcUInt[idxSrc++]; + texel.y = srcUInt[idxSrc++]; + texel.z = srcUInt[idxSrc++]; + texel.w = srcUInt[idxSrc]; + break; + } + break; + } + // Write the final pixel + write_image(dst1d, dst2d, dst3d, dst1da, dst2da, format.w, coordsDst, texel); +} + +__kernel void copy_image_default(__read_only image1d_t src1d, + __read_only image2d_t src2d, + __read_only image3d_t src3d, + __read_only image1d_array_t src1da, + __read_only image2d_array_t src2da, + __write_only image1d_t dst1d, + __write_only image2d_t dst2d, + __write_only image3d_t dst3d, + __write_only image1d_array_t dst1da, + __write_only image2d_array_t dst2da, + int4 srcOrigin, + int4 dstOrigin, + int srcFormat, + int dstFormat) { + int4 coordsDst; + int4 coordsSrc; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + coordsSrc = srcOrigin + coordsDst; + coordsDst += dstOrigin; + + uint4 texel; + texel = read_image(src1d, src2d, src3d, src1da, src2da, srcFormat, coordsSrc); + write_image(dst1d, dst2d, dst3d, dst1da, dst2da, dstFormat, coordsDst, texel); +} + +float linear_to_standard_rgba(float l_val) { + float s_val = l_val; + + if (isnan(s_val)) s_val = 0.0f; + + if (s_val > 1.0f) { + s_val = 1.0f; + } else if (s_val < 0.0f) { + s_val = 0.0f; + } else if (s_val < 0.0031308f) { + s_val = 12.92f * s_val; + } else { + s_val = (1.055f * pow(s_val, 5.0f / 12.0f)) - 0.055f; + } + + return s_val; +} + +__kernel void copy_image_linear_to_standard( + __read_only image1d_t src1d, + __read_only image2d_t src2d, + __read_only image3d_t src3d, + __read_only image1d_array_t src1da, + __read_only image2d_array_t src2da, + int srcFormat, + __write_only image1d_t dst1d, + __write_only image2d_t dst2d, + __write_only image3d_t dst3d, + __write_only image1d_array_t dst1da, + __write_only image2d_array_t dst2da, + int dstFormat, + int4 srcOrigin, + int4 dstOrigin) { + int4 coordsDst; + int4 coordsSrc; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + coordsSrc = srcOrigin + coordsDst; + coordsDst += dstOrigin; + + float4 texel; + texel = read_image_float(src1d, src2d, src3d, src1da, src2da, srcFormat, coordsSrc); + + texel.x = linear_to_standard_rgba(texel.x); + texel.y = linear_to_standard_rgba(texel.y); + texel.z = linear_to_standard_rgba(texel.z); + + write_image_float(dst1d, dst2d, dst3d, dst1da, dst2da, dstFormat, coordsDst, texel); +} + +__kernel void copy_image_standard_to_linear( + __read_only image1d_t src1d, + __read_only image2d_t src2d, + __read_only image3d_t src3d, + __read_only image1d_array_t src1da, + __read_only image2d_array_t src2da, + int srcFormat, + __write_only image1d_t dst1d, + __write_only image2d_t dst2d, + __write_only image3d_t dst3d, + __write_only image1d_array_t dst1da, + __write_only image2d_array_t dst2da, + int dstFormat, + int4 srcOrigin, + int4 dstOrigin) { + int4 coordsDst; + int4 coordsSrc; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + coordsSrc = srcOrigin + coordsDst; + coordsDst += dstOrigin; + + float4 texel; + texel = read_image_float(src1d, src2d, src3d, src1da, src2da, srcFormat, coordsSrc); + write_image_float(dst1d, dst2d, dst3d, dst1da, dst2da, dstFormat, coordsDst, texel); +} + +__kernel void copy_image_1db( + __read_only image1d_buffer_t src1d, + __read_only image2d_t src2d, + __read_only image3d_t src3d, + __read_only image1d_array_t src1da, + __read_only image2d_array_t src2da, + int srcFormat, + __write_only image1d_t dst1d, + __write_only image2d_t dst2d, + __write_only image3d_t dst3d, + __write_only image1d_array_t dst1da, + __write_only image2d_array_t dst2da, + int dstFormat, + int4 srcOrigin, + int4 dstOrigin) +{ + int coordDst; + int coordSrc; + + coordDst = get_global_id(0); + + coordSrc = srcOrigin.x + coordDst; + coordDst += dstOrigin.x; + + uint4 texel; + texel = read_imageui(src1d, coordSrc); + write_imageui(dst1d, coordDst, texel); +} + +__kernel void copy_image_1db_to_reg( + __read_only image1d_buffer_t src1d, + __read_only image2d_t src2d, + __read_only image3d_t src3d, + __read_only image1d_array_t src1da, + __read_only image2d_array_t src2da, + int srcFormat, + __write_only image1d_t dst1d, + __write_only image2d_t dst2d, + __write_only image3d_t dst3d, + __write_only image1d_array_t dst1da, + __write_only image2d_array_t dst2da, + int dstFormat, + int4 srcOrigin, + int4 dstOrigin) +{ + int4 coordsDst; + int coordSrc; + + coordsDst.x = get_global_id(0); + coordsDst.y = get_global_id(1); + coordsDst.z = get_global_id(2); + coordsDst.w = 0; + + coordSrc = srcOrigin.x + coordsDst.x; + coordsDst += dstOrigin; + + uint4 texel; + texel = read_imageui(src1d, coordSrc); + write_imageui(dst1d, coordsDst.x, texel); +} + +__kernel void copy_image_reg_to_1db( + __read_only image1d_t src1d, + __read_only image2d_t src2d, + __read_only image3d_t src3d, + __read_only image1d_array_t src1da, + __read_only image2d_array_t src2da, + int srcFormat, + __write_only image1d_buffer_t dst1d, + __write_only image2d_t dst2d, + __write_only image3d_t dst3d, + __write_only image1d_array_t dst1da, + __write_only image2d_array_t dst2da, + int dstFormat, + int4 srcOrigin, + int4 dstOrigin) +{ + int coordDst; + int4 coordsSrc; + + coordsSrc.x = get_global_id(0); + coordsSrc.y = get_global_id(1); + coordsSrc.z = get_global_id(2); + coordsSrc.w = 0; + + coordDst = dstOrigin.x + coordsSrc.x; + coordsSrc += srcOrigin; + + uint4 texel; + texel = read_imageui(src1d, coordsSrc.x); + write_imageui(dst1d, coordDst, texel); +} + +__kernel void clear_image(__write_only image1d_t dst1d, + __write_only image2d_t dst2d, + __write_only image3d_t dst3d, + __write_only image1d_array_t dst1da, + __write_only image2d_array_t dst2da, + int dstFormat, + uint type, + uint4 fill_data, + int4 origin) { + int4 coords; + + coords.x = get_global_id(0); + coords.y = get_global_id(1); + coords.z = get_global_id(2); + coords.w = 0; + + coords += origin; + + // Check components + switch (type) { + case 0: + write_image_float(dst1d, dst2d, dst3d, dst1da, dst2da, dstFormat, coords, *(float4*)&fill_data); + break; + case 1: + write_image_int(dst1d, dst2d, dst3d, dst1da, dst2da, dstFormat, coords, *(int4*)&fill_data); + break; + case 2: + write_image(dst1d, dst2d, dst3d, dst1da, dst2da, dstFormat, coords, fill_data); + break; + } +} + +__kernel void clear_image_1db(__write_only image1d_buffer_t dst1d, + __write_only image2d_t dst2d, + __write_only image3d_t dst3d, + __write_only image1d_array_t dst1da, + __write_only image2d_array_t dst2da, + int dstFormat, + uint4 fill_data, + int4 origin, + uint type) { + int4 coords; + + coords.x = get_global_id(0); + + coords += origin; + + // Check components + switch (type) { + case 0: + write_imagef(dst1d, coords.x, *(float4*)&fill_data); + break; + case 1: + write_imagei(dst1d, coords.x, *(int4*)&fill_data); + break; + case 2: + write_imageui(dst1d, coords.x, fill_data); + break; + } +} diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.cpp new file mode 100755 index 0000000000..1f886a5df2 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.cpp @@ -0,0 +1,181 @@ +// These lines should be changed later after we get formal Copyright. +//------------------------------------------------------------------------------ +// +// File: device_info.cpp +// Project: HSA +// +// Description: Implementation file for Api to query HSA System - Number of +// compute nodes, devices, queue properties, etc. +// +// HsaGetQueueProperties() +// The public Api provided for users to query the properties +// of a Queue object. +// +// Copyright (c) 2013-2013 Advanced Micro Devices, Inc. (unpublished) +// +// All rights reserved. This notice is intended as a precaution against +// inadvertent publication and does not imply publication or any waiver +// of confidentiality. The year included in the foregoing notice is the +// year of creation of the work. + +#include + +#include + +#include "inc/hsa.h" +#include "device_info.h" +#include "addrlib/src/amdgpu_asic_addr.h" + +uint32_t MajorVerFromDevID(uint32_t dev_id) { + return dev_id/100; +} + +uint32_t MinorVerFromDevID(uint32_t dev_id) { + return (dev_id % 100)/10; +} + +uint32_t StepFromDevID(uint32_t dev_id) { + return (dev_id%100)%10; +} + +hsa_status_t GetGPUAsicID(hsa_agent_t agent, uint32_t *chip_id) { + char asic_name[64]; + assert(chip_id != nullptr); + + hsa_status_t status = hsa_agent_get_info( + agent, static_cast(HSA_AGENT_INFO_NAME), + &asic_name); + assert(status == HSA_STATUS_SUCCESS); + + if (status != HSA_STATUS_SUCCESS) { + return status; + } + std::string a_str(asic_name); + + assert(a_str.compare(0, 3, "gfx", 3) == 0); + + a_str.erase(0,3); + *chip_id = std::stoi(a_str); + return HSA_STATUS_SUCCESS; +} + +uint32_t DevIDToAddrLibFamily(uint32_t dev_id) { + uint32_t major_ver = MajorVerFromDevID(dev_id); + uint32_t minor_ver = MinorVerFromDevID(dev_id); + uint32_t step = StepFromDevID(dev_id); + + // FAMILY_UNKNOWN 0xFF + // FAMILY_SI - Southern Islands: Tahiti (P), Pitcairn (PM), Cape Verde (M), Bali (V) + // FAMILY_TN - Fusion Trinity: Devastator - DVST (M), Scrapper (V) + // FAMILY_CI - Sea Islands: Hawaii (P), Maui (P), Bonaire (M) + // FAMILY_KV - Fusion Kaveri: Spectre, Spooky; Fusion Kabini: Kalindi + // FAMILY_VI - Volcanic Islands: Iceland (V), Tonga (M) + // FAMILY_CZ - Carrizo, Nolan, Amur + // FAMILY_PI - Pirate Islands + // FAMILY_AI - Arctic Islands + // FAMILY_RV - Raven + // FAMILY_NV - Navi + switch (major_ver) { + case 6: + switch (minor_ver) { + case 0: + switch (step) { + case 0: + case 1: + return FAMILY_SI; + + default: + return FAMILY_UNKNOWN; + } + default: + return FAMILY_UNKNOWN; + } + + case 7: + switch (minor_ver) { + case 0: + switch (step) { + case 0: + case 1: + case 2: + return FAMILY_CI; + + case 3: + return FAMILY_KV; + + default: + return FAMILY_UNKNOWN; + } + + default: + return FAMILY_UNKNOWN; + } + + case 8: + switch (minor_ver) { + case 0: + switch (step) { + case 0: + case 2: + case 3: + case 4: + return FAMILY_VI; + + case 1: + return FAMILY_CZ; + + default: + return FAMILY_UNKNOWN; + } + default: + return FAMILY_UNKNOWN; + } + + case 9: + switch (minor_ver) { + case 0: + switch (step) { + case 0: + case 1: + case 4: // Vega12 + case 6: // Vega20 + case 8: // Arcturus + return FAMILY_AI; + + case 2: + case 3: + return FAMILY_RV; + + default: + return FAMILY_UNKNOWN; + } + + default: + return FAMILY_UNKNOWN; + } + + case 10: + switch (minor_ver) { + case 0: // Ariel + case 1: // Navi + switch (step) { + case 0: + case 1: + case 2: + case 3: + return FAMILY_NV; + + default: + return FAMILY_UNKNOWN; + } + + default: + return FAMILY_UNKNOWN; + } + + default: + return FAMILY_UNKNOWN; + } + + assert(0); // We should have already returned +} diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.h b/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.h new file mode 100755 index 0000000000..be40122699 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.h @@ -0,0 +1,39 @@ +// File: device_info.h +// Project: HSA +// +// Description: Interface file for Api to query HSA System - Number of +// compute nodes, devices, etc. +// +// HsaGetAsicFamilyType() +// The private Api is provided to query the Id of Asic +// family of the device. +// +// Copyright (c) 2013-2013 Advanced Micro Devices, Inc. (unpublished) +// +// All rights reserved. This notice is intended as a precaution against +// inadvertent publication and does not imply publication or any waiver +// of confidentiality. The year included in the foregoing notice is the +// year of creation of the work. +// + +#ifndef HSA_RUNTIME_CORE_INC_DEVICE_INFO_H_ +#define HSA_RUNTIME_CORE_INC_DEVICE_INFO_H_ + +#include "stdint.h" +#include "inc/hsa.h" + +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + +uint32_t MajorVerFromDevID(uint32_t dev_id); +uint32_t MinorVerFromDevID(uint32_t dev_id); +uint32_t StepFromDevID(uint32_t dev_id); +uint32_t DevIDToAddrLibFamily(uint32_t dev_id); + +hsa_status_t GetGPUAsicID(hsa_agent_t agent, uint32_t *chip_id); +#ifdef __cplusplus +} +#endif // __cplusplus + +#endif // HSA_RUNTIME_CORE_INC_DEVICE_INFO_H_ diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/hsa_ext_image.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/hsa_ext_image.cpp new file mode 100644 index 0000000000..a3a04b668e --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/hsa_ext_image.cpp @@ -0,0 +1,310 @@ +#include "inc/hsa.h" +#include "inc/hsa_ext_amd.h" +#include "inc/hsa_ext_image.h" +#include "image_runtime.h" + +#undef HSA_API +#define HSA_API HSA_API_EXPORT + +//---------------------------------------------------------------------------// +// Utilty routines +//---------------------------------------------------------------------------// +static void enforceDefaultPitch(hsa_agent_t agent, const hsa_ext_image_descriptor_t* image_descriptor, size_t& image_data_row_pitch, size_t& image_data_slice_pitch) { + // Set default pitch + if (image_data_row_pitch == 0) { + auto manager = ext_image::ImageRuntime::instance()->image_manager(agent); + assert((manager != nullptr) && "Image manager should already exit."); + image_data_row_pitch = image_descriptor->width * + manager->GetImageProperty(agent, image_descriptor->format, image_descriptor->geometry) + .element_size; + } + + // Set default slice pitch + if ((image_data_slice_pitch == 0) && + ((image_descriptor->depth != 0) || (image_descriptor->array_size != 0))) { + switch (image_descriptor->geometry) { + case HSA_EXT_IMAGE_GEOMETRY_3D: + case HSA_EXT_IMAGE_GEOMETRY_2DA: + case HSA_EXT_IMAGE_GEOMETRY_2DADEPTH: { + image_data_slice_pitch = image_data_row_pitch * image_descriptor->height; + break; + } + case HSA_EXT_IMAGE_GEOMETRY_1DA: { + image_data_slice_pitch = image_data_row_pitch; + break; + } + default: + fprintf(stderr, "Depth set on single layer image geometry.\n"); + //assert(false && "Depth set on single layer image geometry."); + } + } +} + +//---------------------------------------------------------------------------// +// Image APIs +//---------------------------------------------------------------------------// +extern "C" { + +hsa_status_t HSA_API hsa_amd_image_get_info_max_dim_impl(hsa_agent_t agent, + hsa_agent_info_t attribute, + void* value) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if (value == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->GetImageInfoMaxDimension( + agent, attribute, value); +} + +hsa_status_t HSA_API + hsa_ext_image_get_capability_impl(hsa_agent_t agent, + hsa_ext_image_geometry_t image_geometry, + const hsa_ext_image_format_t* image_format, + uint32_t* capability_mask) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if ((image_format == NULL) || (capability_mask == NULL) || + (image_geometry < HSA_EXT_IMAGE_GEOMETRY_1D) || + (image_geometry > HSA_EXT_IMAGE_GEOMETRY_2DADEPTH)) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->GetImageCapability( + agent, *image_format, image_geometry, *capability_mask); +} + +hsa_status_t HSA_API hsa_ext_image_data_get_info_impl( + hsa_agent_t agent, const hsa_ext_image_descriptor_t* image_descriptor, + hsa_access_permission_t access_permission, + hsa_ext_image_data_info_t* image_data_info) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if ((image_descriptor == NULL) || (image_data_info == NULL) || + (access_permission < HSA_ACCESS_PERMISSION_RO) || + (access_permission > HSA_ACCESS_PERMISSION_RW)) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->GetImageSizeAndAlignment( + agent, *image_descriptor, HSA_EXT_IMAGE_DATA_LAYOUT_OPAQUE, 0, 0, *image_data_info); +} + +hsa_status_t HSA_API + hsa_ext_image_create_impl(hsa_agent_t agent, + const hsa_ext_image_descriptor_t* image_descriptor, + const void* image_data, + hsa_access_permission_t access_permission, + hsa_ext_image_t* image) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if (image_descriptor == NULL || image_data == NULL || image == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->CreateImageHandle( + agent, *image_descriptor, image_data, access_permission, + HSA_EXT_IMAGE_DATA_LAYOUT_OPAQUE, 0, 0, *image); +} + +hsa_status_t HSA_API + hsa_ext_image_destroy_impl(hsa_agent_t agent, hsa_ext_image_t image) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + return ext_image::ImageRuntime::instance()->DestroyImageHandle(image); +} + +hsa_status_t HSA_API + hsa_ext_image_copy_impl(hsa_agent_t agent, hsa_ext_image_t src_image, + const hsa_dim3_t* src_offset, hsa_ext_image_t dst_image, + const hsa_dim3_t* dst_offset, const hsa_dim3_t* range) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if (src_image.handle == 0 || dst_image.handle == 0 || src_offset == NULL || + dst_offset == NULL || range == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->CopyImage( + src_image, dst_image, *src_offset, *dst_offset, *range); +} + +hsa_status_t HSA_API + hsa_ext_image_import_impl(hsa_agent_t agent, const void* src_memory, + size_t src_row_pitch, size_t src_slice_pitch, + hsa_ext_image_t dst_image, + const hsa_ext_image_region_t* image_region) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if (src_memory == NULL || dst_image.handle == 0 || image_region == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->CopyBufferToImage( + src_memory, src_row_pitch, src_slice_pitch, dst_image, *image_region); +} + +hsa_status_t HSA_API + hsa_ext_image_export_impl(hsa_agent_t agent, hsa_ext_image_t src_image, + void* dst_memory, size_t dst_row_pitch, + size_t dst_slice_pitch, + const hsa_ext_image_region_t* image_region) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if (dst_memory == NULL || src_image.handle == 0 || image_region == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->CopyImageToBuffer( + src_image, dst_memory, dst_row_pitch, dst_slice_pitch, *image_region); +} + +hsa_status_t HSA_API + hsa_ext_image_clear_impl(hsa_agent_t agent, hsa_ext_image_t image, + const void* data, + const hsa_ext_image_region_t* image_region) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if (image.handle == 0 || image_region == NULL || data == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->FillImage(image, data, + *image_region); +}; + +hsa_status_t HSA_API hsa_ext_sampler_create_impl( + hsa_agent_t agent, const hsa_ext_sampler_descriptor_t* sampler_descriptor, + hsa_ext_sampler_t* sampler) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if (sampler_descriptor == NULL || sampler == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->CreateSamplerHandle( + agent, *sampler_descriptor, *sampler); +} + +hsa_status_t HSA_API + hsa_ext_sampler_destroy_impl(hsa_agent_t agent, hsa_ext_sampler_t sampler) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + return ext_image::ImageRuntime::instance()->DestroySamplerHandle(sampler); +} + +hsa_status_t HSA_API + hsa_ext_image_get_capability_with_layout_impl(hsa_agent_t agent, + hsa_ext_image_geometry_t image_geometry, + const hsa_ext_image_format_t* image_format, + hsa_ext_image_data_layout_t image_data_layout, + uint32_t* capability_mask) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if ((image_format == NULL) || (capability_mask == NULL) || + (image_geometry < HSA_EXT_IMAGE_GEOMETRY_1D) || + (image_geometry > HSA_EXT_IMAGE_GEOMETRY_2DADEPTH) || + (image_data_layout != HSA_EXT_IMAGE_DATA_LAYOUT_LINEAR)) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->GetImageCapability( + agent, *image_format, image_geometry, *capability_mask); +} + +hsa_status_t HSA_API hsa_ext_image_data_get_info_with_layout_impl( + hsa_agent_t agent, const hsa_ext_image_descriptor_t* image_descriptor, + hsa_access_permission_t access_permission, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + hsa_ext_image_data_info_t* image_data_info) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if ((image_descriptor == NULL) || (image_data_info == NULL) || + (access_permission < HSA_ACCESS_PERMISSION_RO) || + (access_permission > HSA_ACCESS_PERMISSION_RW) || + (image_data_layout != HSA_EXT_IMAGE_DATA_LAYOUT_LINEAR)) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + enforceDefaultPitch(agent, image_descriptor, image_data_row_pitch, image_data_slice_pitch); + + return ext_image::ImageRuntime::instance()->GetImageSizeAndAlignment( + agent, *image_descriptor, image_data_layout, image_data_row_pitch, + image_data_slice_pitch, *image_data_info); +} + +hsa_status_t HSA_API + hsa_ext_image_create_with_layout_impl(hsa_agent_t agent, + const hsa_ext_image_descriptor_t* image_descriptor, + const void* image_data, + hsa_access_permission_t access_permission, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + hsa_ext_image_t* image) { + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if (image_descriptor == NULL || image_data == NULL || image == NULL || + image_data_layout != HSA_EXT_IMAGE_DATA_LAYOUT_LINEAR) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + enforceDefaultPitch(agent, image_descriptor, image_data_row_pitch, image_data_slice_pitch); + + return ext_image::ImageRuntime::instance()->CreateImageHandle( + agent, *image_descriptor, image_data, access_permission, image_data_layout, + image_data_row_pitch, image_data_slice_pitch, *image); +} + +hsa_status_t HSA_API hsa_amd_image_create_impl( + hsa_agent_t agent, + const hsa_ext_image_descriptor_t *image_descriptor, + const hsa_amd_image_descriptor_t *image_layout, + const void *image_data, + hsa_access_permission_t access_permission, + hsa_ext_image_t *image) +{ + if (agent.handle == 0) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + if (image_descriptor == NULL || image_data == NULL || image == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + return ext_image::ImageRuntime::instance()->CreateImageHandleWithLayout( + agent, *image_descriptor, image_layout, image_data, access_permission, *image); +} + +} diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image.so.def b/projects/rocr-runtime/runtime/hsa-runtime/image/image.so.def new file mode 100644 index 0000000000..d95d698d39 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image.so.def @@ -0,0 +1,22 @@ +{ +global: + hsa_ext_image_get_capability_impl; + hsa_ext_image_data_get_info_impl; + hsa_ext_image_create_impl; + hsa_ext_image_import_impl; + hsa_ext_image_export_impl; + hsa_ext_image_copy_impl; + hsa_ext_image_clear_impl; + hsa_ext_image_destroy_impl; + hsa_ext_sampler_create_impl; + hsa_ext_sampler_destroy_impl; + hsa_ext_image_get_capability_with_layout_impl; + hsa_ext_image_data_get_info_with_layout_impl; + hsa_ext_image_create_with_layout_impl; + hsa_amd_image_get_info_max_dim_impl; + hsa_amd_image_create_impl; + Load; + Unload; +local: + *; +}; diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_lut.h b/projects/rocr-runtime/runtime/hsa-runtime/image/image_lut.h new file mode 100644 index 0000000000..d1868a2499 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_lut.h @@ -0,0 +1,37 @@ +#ifndef AMD_HSA_EXT_IMAGE_IMAGE_LUT_H +#define AMD_HSA_EXT_IMAGE_IMAGE_LUT_H + +#include + +#include "inc/hsa_ext_image.h" +#include "resource.h" +#include "util.h" + +namespace amd { +class ImageLut { + public: + ImageLut() {} + + virtual ~ImageLut() {} + + virtual uint32_t MapGeometry(hsa_ext_image_geometry_t geometry) const = 0; + + virtual ImageProperty MapFormat(const hsa_ext_image_format_t& format, + hsa_ext_image_geometry_t geometry) const = 0; + + virtual Swizzle MapSwizzle(hsa_ext_image_channel_order32_t order) const = 0; + + virtual uint32_t GetMaxWidth(hsa_ext_image_geometry_t geometry) const = 0; + + virtual uint32_t GetMaxHeight(hsa_ext_image_geometry_t geometry) const = 0; + + virtual uint32_t GetMaxDepth(hsa_ext_image_geometry_t geometry) const = 0; + + virtual uint32_t GetMaxArraySize(hsa_ext_image_geometry_t geometry) const = 0; + + private: + DISALLOW_COPY_AND_ASSIGN(ImageLut); +}; + +} // namespace +#endif // AMD_HSA_EXT_IMAGE_IMAGE_LUT_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_lut_kv.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/image_lut_kv.cpp new file mode 100644 index 0000000000..e358c0a047 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_lut_kv.cpp @@ -0,0 +1,396 @@ +#include "image_lut_kv.h" +#include "resource_kv.h" + +namespace amd { +const uint32_t ImageLutKv::kGeometryLut_[GEOMETRY_COUNT] = { + SQ_RSRC_IMG_1D, // HSA_EXT_IMAGE_GEOMETRY_1D + SQ_RSRC_IMG_2D, // HSA_EXT_IMAGE_GEOMETRY_2D + SQ_RSRC_IMG_3D, // HSA_EXT_IMAGE_GEOMETRY_3D + SQ_RSRC_IMG_1D_ARRAY, // HSA_EXT_IMAGE_GEOMETRY_1DA + SQ_RSRC_IMG_2D_ARRAY, // HSA_EXT_IMAGE_GEOMETRY_2DA + 0, // HSA_EXT_IMAGE_GEOMETRY_1DB + SQ_RSRC_IMG_2D, // HSA_EXT_IMAGE_GEOMETRY_2DDEPTH + SQ_RSRC_IMG_2D_ARRAY // HSA_EXT_IMAGE_GEOMETRY_2DADEPTH +}; + +const ImageProperty ImageLutKv::kPropLut_[ORDER_COUNT][TYPE_COUNT] = { + {// HSA_EXT_IMAGE_CHANNEL_ORDER_A + {RW, 1, FMT_8, TYPE_SNORM}, + {RW, 2, FMT_16, TYPE_SNORM}, + {RW, 1, FMT_8, TYPE_UNORM}, + {RW, 2, FMT_16, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 1, FMT_8, TYPE_SINT}, + {RW, 2, FMT_16, TYPE_SINT}, + {RW, 4, FMT_32, TYPE_SINT}, + {RW, 1, FMT_8, TYPE_UINT}, + {RW, 2, FMT_16, TYPE_UINT}, + {RW, 4, FMT_32, TYPE_UINT}, + {RW, 2, FMT_16, TYPE_FLOAT}, + {RW, 4, FMT_32, TYPE_FLOAT}}, + {// HSA_EXT_IMAGE_CHANNEL_ORDER_R + {RW, 1, FMT_8, TYPE_SNORM}, + {RW, 2, FMT_16, TYPE_SNORM}, + {RW, 1, FMT_8, TYPE_UNORM}, + {RW, 2, FMT_16, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 1, FMT_8, TYPE_SINT}, + {RW, 2, FMT_16, TYPE_SINT}, + {RW, 4, FMT_32, TYPE_SINT}, + {RW, 1, FMT_8, TYPE_UINT}, + {RW, 2, FMT_16, TYPE_UINT}, + {RW, 4, FMT_32, TYPE_UINT}, + {RW, 2, FMT_16, TYPE_FLOAT}, + {RW, 4, FMT_32, TYPE_FLOAT}}, + {0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RX + { // HSA_EXT_IMAGE_CHANNEL_ORDER_RG + {RW, 2, FMT_8_8, TYPE_SNORM}, + {RW, 4, FMT_16_16, TYPE_SNORM}, + {RW, 2, FMT_8_8, TYPE_UNORM}, + {RW, 4, FMT_16_16, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 2, FMT_8_8, TYPE_SINT}, + {RW, 4, FMT_16_16, TYPE_SINT}, + {RW, 8, FMT_32_32, TYPE_SINT}, + {RW, 2, FMT_8_8, TYPE_UINT}, + {RW, 4, FMT_16_16, TYPE_UINT}, + {RW, 8, FMT_32_32, TYPE_UINT}, + {RW, 4, FMT_16_16, TYPE_FLOAT}, + {RW, 8, FMT_32_32, TYPE_FLOAT}}, + {0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGX + { // HSA_EXT_IMAGE_CHANNEL_ORDER_RA + {RW, 2, FMT_8_8, TYPE_SNORM}, + {RW, 4, FMT_16_16, TYPE_SNORM}, + {RW, 2, FMT_8_8, TYPE_UNORM}, + {RW, 4, FMT_16_16, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 2, FMT_8_8, TYPE_SINT}, + {RW, 4, FMT_16_16, TYPE_SINT}, + {RW, 8, FMT_32_32, TYPE_SINT}, + {RW, 2, FMT_8_8, TYPE_UINT}, + {RW, 4, FMT_16_16, TYPE_UINT}, + {RW, 8, FMT_32_32, TYPE_UINT}, + {RW, 4, FMT_16_16, TYPE_FLOAT}, + {RW, 8, FMT_32_32, TYPE_FLOAT}}, + {// HSA_EXT_IMAGE_CHANNEL_ORDER_RGB + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 2, FMT_1_5_5_5, TYPE_UNORM}, + {RW, 2, FMT_5_6_5, TYPE_UNORM}, + {RW, 4, FMT_2_10_10_10, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}}, + {0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX + { // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA + {RW, 4, FMT_8_8_8_8, TYPE_SNORM}, + {RW, 8, FMT_16_16_16_16, TYPE_SNORM}, + {RW, 4, FMT_8_8_8_8, TYPE_UNORM}, + {RW, 8, FMT_16_16_16_16, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 4, FMT_8_8_8_8, TYPE_SINT}, + {RW, 8, FMT_16_16_16_16, TYPE_SINT}, + {RW, 16, FMT_32_32_32_32, TYPE_SINT}, + {RW, 4, FMT_8_8_8_8, TYPE_UINT}, + {RW, 8, FMT_16_16_16_16, TYPE_UINT}, + {RW, 16, FMT_32_32_32_32, TYPE_UINT}, + {RW, 8, FMT_16_16_16_16, TYPE_FLOAT}, + {RW, 16, FMT_32_32_32_32, TYPE_FLOAT}}, + {// HSA_EXT_IMAGE_CHANNEL_ORDER_BGRA + {RW, 4, FMT_8_8_8_8, TYPE_SNORM}, + {0, 0, 0, 0}, + {RW, 4, FMT_8_8_8_8, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 4, FMT_8_8_8_8, TYPE_SINT}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 4, FMT_8_8_8_8, TYPE_UINT}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}}, + {// HSA_EXT_IMAGE_CHANNEL_ORDER_ARGB + {RW, 4, FMT_8_8_8_8, TYPE_SNORM}, + {0, 0, 0, 0}, + {RW, 4, FMT_8_8_8_8, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 4, FMT_8_8_8_8, TYPE_SINT}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 4, FMT_8_8_8_8, TYPE_UINT}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}}, + {0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR + {0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB + {0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX + { // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RO, 4, FMT_8_8_8_8, TYPE_SRGB}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}}, + {0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA + { // HSA_EXT_IMAGE_CHANNEL_ORDER_INTENSITY + {RW, 1, FMT_8, TYPE_SNORM}, + {RW, 2, FMT_16, TYPE_SNORM}, + {RW, 1, FMT_8, TYPE_UNORM}, + {RW, 2, FMT_16, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 2, FMT_16, TYPE_FLOAT}, + {RW, 4, FMT_32, TYPE_FLOAT}}, + {// HSA_EXT_IMAGE_CHANNEL_ORDER_LUMINANCE + {RW, 1, FMT_8, TYPE_SNORM}, + {RW, 2, FMT_16, TYPE_SNORM}, + {RW, 1, FMT_8, TYPE_UNORM}, + {RW, 2, FMT_16, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {RW, 2, FMT_16, TYPE_FLOAT}, + {RW, 4, FMT_32, TYPE_FLOAT}}, + {// HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {ROWO, 2, FMT_16, TYPE_UNORM}, + // TODO: 24 bit + {0, 3, FMT_32, TYPE_UNORM}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {0, 0, 0, 0}, + {ROWO, 4, FMT_32, TYPE_FLOAT}}, + {0} // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL +}; + +const Swizzle ImageLutKv::kSwizzleLut_[ORDER_COUNT] = { + {SEL_0, SEL_0, SEL_0, SEL_X}, // HSA_EXT_IMAGE_CHANNEL_ORDER_A + {SEL_X, SEL_0, SEL_0, SEL_1}, // HSA_EXT_IMAGE_CHANNEL_ORDER_R + {SEL_X, SEL_0, SEL_0, SEL_1}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RX + {SEL_X, SEL_Y, SEL_0, SEL_1}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RG + {SEL_X, SEL_Y, SEL_0, SEL_1}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGX + {SEL_X, SEL_0, SEL_0, SEL_Y}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RA + {SEL_Z, SEL_Y, SEL_X, SEL_1}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGB + {SEL_Z, SEL_Y, SEL_X, SEL_1}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX + {SEL_X, SEL_Y, SEL_Z, SEL_W}, // HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA + {SEL_Z, SEL_Y, SEL_X, SEL_W}, // HSA_EXT_IMAGE_CHANNEL_ORDER_BGRA + {SEL_Y, SEL_Z, SEL_W, SEL_X}, // HSA_EXT_IMAGE_CHANNEL_ORDER_ARGB + {SEL_Y, SEL_X, SEL_W, SEL_Z}, // HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR + {SEL_X, SEL_Y, SEL_Z, SEL_1}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB + {SEL_X, SEL_Y, SEL_Z, SEL_1}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX + {SEL_X, SEL_Y, SEL_Z, SEL_W}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA + {SEL_Z, SEL_Y, SEL_X, SEL_W}, // HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA + {SEL_X, SEL_X, SEL_X, SEL_X}, // HSA_EXT_IMAGE_CHANNEL_ORDER_INTENSITY + {SEL_X, SEL_X, SEL_X, SEL_1}, // HSA_EXT_IMAGE_CHANNEL_ORDER_LUMINANCE + {SEL_X, SEL_0, SEL_0, SEL_0}, // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH + {SEL_Y, SEL_0, SEL_0, SEL_0} // HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL +}; + +const uint32_t ImageLutKv::kMaxDimensionLut_[GEOMETRY_COUNT][4] = { + {16384, 1, 1, 1}, // HSA_EXT_IMAGE_GEOMETRY_1D + {16384, 16384, 1, 1}, // HSA_EXT_IMAGE_GEOMETRY_2D + {2048, 2048, 2048, 1}, // HSA_EXT_IMAGE_GEOMETRY_3D + {16384, 1, 1, 2048}, // HSA_EXT_IMAGE_GEOMETRY_1DA + {16384, 16384, 1, 2048}, // HSA_EXT_IMAGE_GEOMETRY_2DA + {65536, 1, 1, 1}, // HSA_EXT_IMAGE_GEOMETRY_1DB + {16384, 16384, 1, 1}, // HSA_EXT_IMAGE_GEOMETRY_2DDEPTH + {16384, 16384, 1, 2048} // HSA_EXT_IMAGE_GEOMETRY_2DADEPTH +}; + +uint32_t ImageLutKv::MapGeometry(hsa_ext_image_geometry_t geometry) const { + switch (geometry) { + case HSA_EXT_IMAGE_GEOMETRY_1D: + case HSA_EXT_IMAGE_GEOMETRY_2D: + case HSA_EXT_IMAGE_GEOMETRY_3D: + case HSA_EXT_IMAGE_GEOMETRY_1DA: + case HSA_EXT_IMAGE_GEOMETRY_2DA: + case HSA_EXT_IMAGE_GEOMETRY_1DB: + case HSA_EXT_IMAGE_GEOMETRY_2DDEPTH: + case HSA_EXT_IMAGE_GEOMETRY_2DADEPTH: + return kGeometryLut_[geometry]; + default: + assert(false && "Should not reach here"); + return static_cast(-1); + }; +} + +ImageProperty ImageLutKv::MapFormat(const hsa_ext_image_format_t& format, + hsa_ext_image_geometry_t geometry) const { + switch (geometry) { + case HSA_EXT_IMAGE_GEOMETRY_1D: + case HSA_EXT_IMAGE_GEOMETRY_2D: + case HSA_EXT_IMAGE_GEOMETRY_3D: + case HSA_EXT_IMAGE_GEOMETRY_1DA: + case HSA_EXT_IMAGE_GEOMETRY_2DA: + return kPropLut_[format.channel_order][format.channel_type]; + case HSA_EXT_IMAGE_GEOMETRY_1DB: + switch (format.channel_order) { + // Hardware does not support buffer access to srgb image. + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA: + break; + default: + switch (format.channel_type) { + // Hardware does not support buffer access to 555/565 packed image. + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555: + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565: + break; + default: + return kPropLut_[format.channel_order][format.channel_type]; + } + } + break; + case HSA_EXT_IMAGE_GEOMETRY_2DDEPTH: + case HSA_EXT_IMAGE_GEOMETRY_2DADEPTH: + switch (format.channel_order) { + case HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH: + case HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL: + return kPropLut_[format.channel_order][format.channel_type]; + default: + break; + } + break; + default: + assert(false && "Should not reach here"); + break; + } + + ImageProperty prop = {0}; + return prop; +} + +Swizzle ImageLutKv::MapSwizzle(hsa_ext_image_channel_order32_t order) const { + const Swizzle invalid_swizzle = {0xff, 0xff, 0xff, 0xff}; + switch (order) { + case HSA_EXT_IMAGE_CHANNEL_ORDER_A: + case HSA_EXT_IMAGE_CHANNEL_ORDER_R: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RX: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RG: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RGX: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RGB: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_BGRA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_ARGB: + case HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_INTENSITY: + case HSA_EXT_IMAGE_CHANNEL_ORDER_LUMINANCE: + case HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH: + case HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL: + return kSwizzleLut_[order]; + default: + assert(false && "Should not reach here"); + return invalid_swizzle; + }; +} + +uint32_t ImageLutKv::GetMaxWidth(hsa_ext_image_geometry_t geometry) const { + return kMaxDimensionLut_[geometry][0]; +} + +uint32_t ImageLutKv::GetMaxHeight(hsa_ext_image_geometry_t geometry) const { + return kMaxDimensionLut_[geometry][1]; +} + +uint32_t ImageLutKv::GetMaxDepth(hsa_ext_image_geometry_t geometry) const { + return kMaxDimensionLut_[geometry][2]; +} + +uint32_t ImageLutKv::GetMaxArraySize(hsa_ext_image_geometry_t geometry) const { + return kMaxDimensionLut_[geometry][3]; +} + +uint32_t ImageLutKv::GetPixelSize(uint8_t data_format, uint8_t data_type) const { + //Currently only supports formats that ROCr can create. + switch(data_format) { + case FMT_1_5_5_5: return 2; + case FMT_16: return 2; + case FMT_16_16: return 4; + case FMT_16_16_16_16: return 8; + case FMT_2_10_10_10: return 4; + //SPK: Where is unorm returning 3? Was this a Hawaii specific thing? + case FMT_32: return (data_type==TYPE_UNORM) ? 3 : 4; + case FMT_32_32: return 8; + case FMT_32_32_32_32: return 16; + case FMT_5_6_5: return 2; + case FMT_8: return 1; + case FMT_8_8: return 2; + case FMT_8_8_8_8: return 4; + default: return 0; + } +} + +} // namespace amd diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_lut_kv.h b/projects/rocr-runtime/runtime/hsa-runtime/image/image_lut_kv.h new file mode 100644 index 0000000000..8ae8ce86ba --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_lut_kv.h @@ -0,0 +1,50 @@ +#ifndef AMD_HSA_EXT_IMAGE_IMAGE_LUT_KV_H +#define AMD_HSA_EXT_IMAGE_IMAGE_LUT_KV_H + +#include "image_lut.h" + +namespace amd { +class ImageLutKv : public ImageLut { + public: + ImageLutKv() {} + + virtual ~ImageLutKv() {} + + virtual uint32_t MapGeometry(hsa_ext_image_geometry_t geometry) const; + + virtual ImageProperty MapFormat(const hsa_ext_image_format_t& format, + hsa_ext_image_geometry_t geometry) const; + + virtual Swizzle MapSwizzle(hsa_ext_image_channel_order32_t order) const; + + virtual uint32_t GetMaxWidth(hsa_ext_image_geometry_t geometry) const; + + virtual uint32_t GetMaxHeight(hsa_ext_image_geometry_t geometry) const; + + virtual uint32_t GetMaxDepth(hsa_ext_image_geometry_t geometry) const; + + virtual uint32_t GetMaxArraySize(hsa_ext_image_geometry_t geometry) const; + + uint32_t GetPixelSize(uint8_t data_format, uint8_t data_type) const; + + private: + // Lookup table of image geometry to device geometry enum. + static const uint32_t kGeometryLut_[GEOMETRY_COUNT]; + + // Lookup table of channel format property. Based on HSA Programmer's + // Reference Manual 1.0P Table 9-4 Channel Order, Channel type and Image + // Geometry Combinations. + static const ImageProperty kPropLut_[ORDER_COUNT][TYPE_COUNT]; + + // Lookup table of channel order swizzle. + static const Swizzle kSwizzleLut_[ORDER_COUNT]; + + // Lookup table of image geometry to max dimension. + // Each record contains four values: widht, height, depth, array_size. + static const uint32_t kMaxDimensionLut_[GEOMETRY_COUNT][4]; + + DISALLOW_COPY_AND_ASSIGN(ImageLutKv); +}; + +} // namespace +#endif // AMD_HSA_EXT_IMAGE_IMAGE_LUT_KV_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager.cpp new file mode 100644 index 0000000000..901c3d276f --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager.cpp @@ -0,0 +1,688 @@ +#include "inc/hsa_ext_amd.h" +#include "inc/hsa_ext_image.h" +#include "image_manager.h" +#include "image_runtime.h" + +#include + +#include +#include +#include + +#if (defined(WIN32) || defined(_WIN32)) +#define NOMINMAX +__inline long int lrintf(float f) { return _mm_cvtss_si32(_mm_load_ss(&f)); } +#endif + +namespace amd { + +Image* Image::Create(hsa_agent_t agent) { + hsa_amd_memory_pool_t pool = ext_image::ImageRuntime::instance()->kernarg_pool(); + + Image* image = NULL; + + hsa_status_t status = + hsa_amd_memory_pool_allocate(pool, sizeof(Image), 0, reinterpret_cast(&image)); + assert(status == HSA_STATUS_SUCCESS); + + if (status != HSA_STATUS_SUCCESS) return NULL; + + new (image) Image(); + + status = hsa_amd_agents_allow_access(1, &agent, NULL, image); + + if (status != HSA_STATUS_SUCCESS) { + Image::Destroy(image); + return NULL; + } + + return image; +} + +void Image::Destroy(const Image* image) { + assert(image != NULL); + image->~Image(); + + hsa_status_t status = hsa_amd_memory_pool_free(const_cast(image)); + + assert(status == HSA_STATUS_SUCCESS); +} + +Sampler* Sampler::Create(hsa_agent_t agent) { + hsa_amd_memory_pool_t pool = ext_image::ImageRuntime::instance()->kernarg_pool(); + + Sampler* sampler = NULL; + + hsa_status_t status = + hsa_amd_memory_pool_allocate(pool, sizeof(Sampler), 0, reinterpret_cast(&sampler)); + + if (status != HSA_STATUS_SUCCESS) return NULL; + + new (sampler) Sampler(); + + status = hsa_amd_agents_allow_access(1, &agent, NULL, sampler); + + if (status != HSA_STATUS_SUCCESS) { + Sampler::Destroy(sampler); + return NULL; + } + + return sampler; +} + +void Sampler::Destroy(const Sampler* sampler) { + assert(sampler != NULL); + sampler->~Sampler(); + + hsa_status_t status = hsa_amd_memory_pool_free(const_cast(sampler)); + + assert(status == HSA_STATUS_SUCCESS); +} + +ImageManager::ImageManager() {} + +ImageManager::~ImageManager() {} + +hsa_status_t ImageManager::CopyBufferToImage( + const void* src_memory, size_t src_row_pitch, size_t src_slice_pitch, + const Image& dst_image, const hsa_ext_image_region_t& image_region) { + Image* src_image = Image::Create(dst_image.component); + + src_image->component = dst_image.component; + src_image->desc = dst_image.desc; + src_image->data = const_cast(src_memory); + src_image->permission = HSA_ACCESS_PERMISSION_RO; + src_image->row_pitch = src_row_pitch; + src_image->slice_pitch = src_slice_pitch; + + const hsa_dim3_t dst_origin = image_region.offset; + const hsa_dim3_t src_origin = {0}; + const hsa_dim3_t copy_size = image_region.range; + + hsa_status_t status = ImageManager::CopyImage( + dst_image, *src_image, dst_origin, src_origin, copy_size); + + Image::Destroy(src_image); + + return status; +} + +hsa_status_t ImageManager::CopyImageToBuffer( + const Image& src_image, void* dst_memory, size_t dst_row_pitch, + size_t dst_slice_pitch, const hsa_ext_image_region_t& image_region) { + // Treat buffer as image since we don't tile our image anyway. + amd::Image* dst_image = Image::Create(src_image.component); + + dst_image->component = src_image.component; + dst_image->desc = src_image.desc; // the width, height, depth is ignored. + dst_image->data = dst_memory; + dst_image->permission = HSA_ACCESS_PERMISSION_WO; + dst_image->row_pitch = dst_row_pitch; + dst_image->slice_pitch = dst_slice_pitch; + + const hsa_dim3_t dst_origin = {0}; + const hsa_dim3_t src_origin = image_region.offset; + const hsa_dim3_t copy_size = image_region.range; + + hsa_status_t status = ImageManager::CopyImage( + *dst_image, src_image, dst_origin, src_origin, copy_size); + + Image::Destroy(dst_image); + + return status; +} + +hsa_status_t ImageManager::CopyImage(const Image& dst_image, + const Image& src_image, + const hsa_dim3_t& dst_origin, + const hsa_dim3_t& src_origin, + const hsa_dim3_t size) { + ImageProperty dst_image_prop = GetImageProperty( + dst_image.component, dst_image.desc.format, dst_image.desc.geometry); + assert(dst_image_prop.cap != HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED); + + const size_t dst_element_size = dst_image_prop.element_size; + assert(dst_element_size != 0); + + ImageProperty src_image_prop = GetImageProperty( + src_image.component, src_image.desc.format, src_image.desc.geometry); + assert(src_image_prop.cap != HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED); + + const size_t src_element_size = src_image_prop.element_size; + assert(src_element_size != 0); + + const hsa_ext_image_format_t src_format = src_image.desc.format; + const hsa_ext_image_channel_order32_t src_order = src_format.channel_order; + const hsa_ext_image_channel_type32_t src_type = src_format.channel_type; + + const hsa_ext_image_format_t dst_format = dst_image.desc.format; + const hsa_ext_image_channel_order32_t dst_order = dst_format.channel_order; + const hsa_ext_image_channel_type32_t dst_type = dst_format.channel_type; + + bool linear_to_standard_rgb = false; + bool standard_to_linear_rgb = false; + + if ((src_order != dst_order) || (src_type != dst_type)) { + // Source and destination format must be the same, except for + // SRGBA <--> RGBA images. + if ((src_type == HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT8) && + (dst_type == HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT8)) { + if ((src_order == HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA) && + (dst_order == HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA)) { + standard_to_linear_rgb = true; + } else if ((src_order == HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA) && + (dst_order == HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA)) { + linear_to_standard_rgb = true; + } else { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + } else { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + } + + // Source and destination format should be the same so the element size + // should be same too. + const size_t element_size = src_element_size; + + // row_pitch and slice_pitch in bytes. + const size_t dst_row_pitch = + std::max(dst_image.row_pitch, size.x * element_size); + const size_t dst_slice_pitch = std::max( + dst_image.slice_pitch, + dst_row_pitch * + (dst_image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DA ? 1 : size.y)); + + const size_t src_row_pitch = + std::max(src_image.row_pitch, size.x * element_size); + const size_t src_slice_pitch = std::max( + src_image.slice_pitch, + src_row_pitch * + (src_image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DA ? 1 : size.y)); + + size_t src_offset = src_origin.x; + size_t dst_offset = dst_origin.x; + size_t copy_size = size.x; + + // Calculate source the offset in bytes. + src_offset *= element_size; + src_offset += src_row_pitch * src_origin.y; + src_offset += src_slice_pitch * src_origin.z; + + // Calculate destination the offset in bytes. + dst_offset *= element_size; + dst_offset += dst_row_pitch * dst_origin.y; + dst_offset += dst_slice_pitch * dst_origin.z; + + copy_size *= element_size; + + // Get destination and source memory. + unsigned char* dst = static_cast(dst_image.data); + const unsigned char* src = static_cast(src_image.data); + + if (!linear_to_standard_rgb && !standard_to_linear_rgb) { + // Copy the memory by row. + for (size_t slice = 0; slice < size.z; ++slice) { + size_t src_offset_temp = src_offset + slice * src_slice_pitch; + size_t dst_offset_temp = dst_offset + slice * dst_slice_pitch; + + for (size_t rows = 0; rows < size.y; ++rows) { + std::memcpy((dst + dst_offset_temp), (src + src_offset_temp), + copy_size); + src_offset_temp += src_row_pitch; + dst_offset_temp += dst_row_pitch; + } + } + } else { + // Copy per pixel between RGBA-SRGBA images. + for (size_t slice = 0; slice < size.z; ++slice) { + size_t src_offset_temp = src_offset + slice * src_slice_pitch; + size_t dst_offset_temp = dst_offset + slice * dst_slice_pitch; + + for (size_t rows = 0; rows < size.y; ++rows) { + const uint8_t* src_pixel = src + src_offset_temp; + uint8_t* dst_pixel = dst + dst_offset_temp; + + if (linear_to_standard_rgb) { + for (size_t cols = 0; cols < size.x; ++cols) { + dst_pixel[0] = + Denormalize(LinearToStandardRGB(Normalize(src_pixel[0]))); // R + dst_pixel[1] = + Denormalize(LinearToStandardRGB(Normalize(src_pixel[1]))); // G + dst_pixel[2] = + Denormalize(LinearToStandardRGB(Normalize(src_pixel[2]))); // B + dst_pixel[3] = src_pixel[3]; // A + + src_pixel += element_size; + dst_pixel += element_size; + } + } else { + assert(standard_to_linear_rgb); + for (size_t cols = 0; cols < size.x; ++cols) { + dst_pixel[0] = + Denormalize(StandardToLinearRGB(Normalize(src_pixel[0]))); // R + dst_pixel[1] = + Denormalize(StandardToLinearRGB(Normalize(src_pixel[1]))); // G + dst_pixel[2] = + Denormalize(StandardToLinearRGB(Normalize(src_pixel[2]))); // B + dst_pixel[3] = src_pixel[3]; // A + + src_pixel += element_size; + dst_pixel += element_size; + } + } + + src_offset_temp += src_row_pitch; + dst_offset_temp += dst_row_pitch; + } + } + } + + return HSA_STATUS_SUCCESS; +} + +uint16_t ImageManager::FloatToHalf(float in) { + volatile union { + float f; + uint32_t u; + } fu; + + fu.f = in; + + const uint16_t sign_bit_16 = (fu.u >> 16) & 0x8000; + + const uint32_t exp_32 = (fu.u >> 23) & 0xff; + + const uint32_t mantissa_32 = (fu.u) & 0x7fffff; + + if (exp_32 == 0 && mantissa_32 == 0) { + // Zero. + return sign_bit_16; + } else if (exp_32 == 0xff) { + if (mantissa_32 == 0) { + // Inf. + return (sign_bit_16 | 0x7c00); + } else if ((mantissa_32 & 0x400000)) { + // Quiet NaN. + return (sign_bit_16 | 0x7e00); + } else { + // Signal NaN. + return (sign_bit_16 | 0x7c01); + } + } else { + const uint32_t kMaxExpNormal = 0x477fe000 >> 23; // 65504. + const uint32_t kMinExpNormal = 0x38800000 >> 23; // 2^-14; + const uint32_t kMinExpSubnormal = 0x33800000 >> 23; // 2^-24. + if (exp_32 > kMaxExpNormal) { + // Half overflow. + // TODO: clamp it to max half float or +Inf. + return (sign_bit_16 | 0x7bff); + } else if (exp_32 < kMinExpSubnormal) { + // Half underflow. + return (sign_bit_16); + } else if (exp_32 < kMinExpNormal) { + // Half subnormal. + return (sign_bit_16 | + ((0x0400 | (mantissa_32 >> 13)) >> (127 - exp_32 - 14))); + } else { + // Half normal. + return (sign_bit_16 | + (((exp_32 - 127 + 15) << 10) | (mantissa_32 >> 13))); + } + } +} + +float ImageManager::Normalize(uint8_t u_val) { + if (u_val == 0) { + return 0.0f; + } else if (u_val == UINT8_MAX) { + return 1.0f; + } else { + return std::min( + std::max(static_cast(u_val) / static_cast(UINT8_MAX), + 0.0f), + 1.0f); + } +} + +uint8_t ImageManager::Denormalize(float f_val) { + const unsigned long kScale = UINT8_MAX; + return std::min( + static_cast(std::max(lrintf(kScale * f_val), 0l)), kScale); +} + +float ImageManager::StandardToLinearRGB(float s_val) { + // Map SRGB value to RGB color space based on HSA Programmers Reference + // Manual version 1.0 Provisional, chapter 7.1.4.1.2 Standard RGB (s-Form). + double l_val = (double)s_val; + + l_val = (l_val <= 0.04045f) ? (l_val / 12.92f) + : pow(((l_val + 0.055f) / 1.055f), 2.4f); + + return l_val; +} + +float ImageManager::LinearToStandardRGB(float l_val) { + // Map RGB value to SRGB color space based on HSA Programmers Reference + // Manual version 1.0 Provisional, chapter 7.1.4.1.2 Standard RGB (s-Form). + double s_val = (double)l_val; + +#if (defined(WIN32) || defined(_WIN32)) + if (_isnan(s_val)) s_val = 0.0; +#else + if (std::isnan(s_val)) s_val = 0.0; +#endif + + if (s_val > 1.0) { + s_val = 1.0; + } else if (s_val < 0.0) { + s_val = 0.0; + } else if (s_val < 0.0031308) { + s_val = 12.92 * s_val; + } else { + s_val = (1.055 * pow(s_val, 5.0 / 12.0)) - 0.055; + } + + return s_val; +} + +void ImageManager::FormatPattern(const hsa_ext_image_format_t& format, + const void* pattern_in, void* pattern_out) { + const int kR = 0; + const int kG = 1; + const int kB = 2; + const int kA = 3; + + int index[4] = {0}; + int num_channel = 0; + + switch (format.channel_order) { + case HSA_EXT_IMAGE_CHANNEL_ORDER_A: + index[0] = kA; + num_channel = 1; + break; + case HSA_EXT_IMAGE_CHANNEL_ORDER_R: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RX: + index[0] = kR; + num_channel = 1; + break; + case HSA_EXT_IMAGE_CHANNEL_ORDER_RG: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RGX: + index[0] = kR; + index[1] = kG; + num_channel = 2; + break; + case HSA_EXT_IMAGE_CHANNEL_ORDER_RA: + index[0] = kR; + index[1] = kA; + num_channel = 2; + break; + case HSA_EXT_IMAGE_CHANNEL_ORDER_RGB: + case HSA_EXT_IMAGE_CHANNEL_ORDER_RGBX: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX: + index[0] = kR; + index[1] = kG; + index[2] = kB; + num_channel = 3; + break; + case HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA: + index[0] = kR; + index[1] = kG; + index[2] = kB; + index[3] = kA; + num_channel = 4; + break; + case HSA_EXT_IMAGE_CHANNEL_ORDER_BGRA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA: + index[0] = kB; + index[1] = kG; + index[2] = kR; + index[3] = kA; + num_channel = 4; + break; + case HSA_EXT_IMAGE_CHANNEL_ORDER_ARGB: + index[0] = kA; + index[1] = kR; + index[2] = kG; + index[3] = kB; + num_channel = 4; + break; + case HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR: + index[0] = kA; + index[1] = kB; + index[2] = kG; + index[3] = kR; + num_channel = 4; + break; + case HSA_EXT_IMAGE_CHANNEL_ORDER_INTENSITY: + case HSA_EXT_IMAGE_CHANNEL_ORDER_LUMINANCE: + case HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH: + case HSA_EXT_IMAGE_CHANNEL_ORDER_DEPTH_STENCIL: + index[0] = kR; + num_channel = 1; + break; + default: + assert(false && "Should not reach here."); + break; + } + + const float* pattern_in_f = NULL; + const int32_t* pattern_in_i32 = NULL; + const uint32_t* pattern_in_ui32 = NULL; + + float new_pattern_in_f[4] = { 0 }; + if ((format.channel_order == HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB) || + (format.channel_order == HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX) || + (format.channel_order == HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA) || + (format.channel_order == HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA)) { + pattern_in_f = reinterpret_cast(pattern_in); + + new_pattern_in_f[0] = LinearToStandardRGB(pattern_in_f[0]); + new_pattern_in_f[1] = LinearToStandardRGB(pattern_in_f[1]); + new_pattern_in_f[2] = LinearToStandardRGB(pattern_in_f[2]); + new_pattern_in_f[3] = pattern_in_f[3]; + + pattern_in_f = reinterpret_cast(new_pattern_in_f); + } else { + pattern_in_f = reinterpret_cast(pattern_in); + pattern_in_i32 = reinterpret_cast(pattern_in); + pattern_in_ui32 = reinterpret_cast(pattern_in); + } + + for (int c = 0; c < num_channel; ++c) { + switch (format.channel_type) { + case HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT8: { + int8_t* pattern_out_i8 = reinterpret_cast(pattern_out); + const long kScale = INT8_MAX; + const long conv = lrintf(kScale * pattern_in_f[index[c]]); + pattern_out_i8[c] = std::min(std::max(conv, -kScale - 1l), kScale); + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT16: { + int16_t* pattern_out_i16 = reinterpret_cast(pattern_out); + const long kScale = INT16_MAX; + const long conv = lrintf(kScale * pattern_in_f[index[c]]); + pattern_out_i16[c] = std::min(std::max(conv, -kScale - 1l), kScale); + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT8: { + uint8_t* pattern_out_ui8 = reinterpret_cast(pattern_out); + const unsigned long kScale = UINT8_MAX; + const long conv = lrintf(kScale * pattern_in_f[index[c]]); + pattern_out_ui8[c] = + std::min(static_cast(std::max(conv, 0l)), kScale); + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT16: { + uint16_t* pattern_out_ui16 = reinterpret_cast(pattern_out); + const unsigned long kScale = UINT16_MAX; + const long conv = lrintf(kScale * pattern_in_f[index[c]]); + pattern_out_ui16[c] = + std::min(static_cast(std::max(conv, 0l)), kScale); + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT24: { + typedef struct Order24 { uint32_t r : 24; } Order24; + + Order24* pattern_out_u24 = reinterpret_cast(pattern_out); + const unsigned long kScale = 0xffffff; + const long conv = lrintf(kScale * pattern_in_f[index[c]]); + pattern_out_u24[c].r = + std::min(static_cast(std::max(conv, 0l)), kScale); + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555: { + typedef struct Order555 { + uint32_t b : 5; + uint32_t g : 5; + uint32_t r : 5; + } Order555; + + Order555* pattern_out_u555 = reinterpret_cast(pattern_out); + const unsigned long kScale = 0x1f; + long conv = lrintf(kScale * pattern_in_f[index[0]]); + pattern_out_u555->r = + std::min(static_cast(std::max(conv, 0l)), kScale); + + conv = lrintf(kScale * pattern_in_f[index[1]]); + pattern_out_u555->g = + std::min(static_cast(std::max(conv, 0l)), kScale); + + conv = lrintf(kScale * pattern_in_f[index[2]]); + pattern_out_u555->b = + std::min(static_cast(std::max(conv, 0l)), kScale); + return; + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565: { + typedef struct Order565 { + uint32_t b : 5; + uint32_t g : 6; + uint32_t r : 5; + } Order565; + + Order565* pattern_out_u565 = reinterpret_cast(pattern_out); + unsigned long scale = 0x1f; + long conv = lrintf(scale * pattern_in_f[index[0]]); + pattern_out_u565->r = + std::min(static_cast(std::max(conv, 0l)), scale); + + scale = 0x3f; + conv = lrintf(scale * pattern_in_f[index[1]]); + pattern_out_u565->g = + std::min(static_cast(std::max(conv, 0l)), scale); + + scale = 0x1f; + conv = lrintf(scale * pattern_in_f[index[2]]); + pattern_out_u565->b = + std::min(static_cast(std::max(conv, 0l)), scale); + return; + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_101010: { + typedef struct Order101010 { + uint32_t b : 10; + uint32_t g : 10; + uint32_t r : 10; + } Order101010; + + Order101010* pattern_out_u101010 = + reinterpret_cast(pattern_out); + const unsigned long kScale = 0x3ff; + long conv = lrintf(kScale * pattern_in_f[index[0]]); + pattern_out_u101010->r = + std::min(static_cast(std::max(conv, 0l)), kScale); + + conv = lrintf(kScale * pattern_in_f[index[1]]); + pattern_out_u101010->g = + std::min(static_cast(std::max(conv, 0l)), kScale); + + conv = lrintf(kScale * pattern_in_f[index[2]]); + pattern_out_u101010->b = + std::min(static_cast(std::max(conv, 0l)), kScale); + + return; + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT8: { + int8_t* pattern_out_i8 = reinterpret_cast(pattern_out); + pattern_out_i8[c] = pattern_in_i32[index[c]]; + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT16: { + int16_t* pattern_out_i16 = reinterpret_cast(pattern_out); + pattern_out_i16[c] = pattern_in_i32[index[c]]; + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_SIGNED_INT32: { + int32_t* pattern_out_i32 = reinterpret_cast(pattern_out); + pattern_out_i32[c] = pattern_in_i32[index[c]]; + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8: { + uint8_t* pattern_out_ui8 = reinterpret_cast(pattern_out); + pattern_out_ui8[c] = pattern_in_ui32[index[c]]; + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16: { + uint16_t* pattern_out_ui16 = reinterpret_cast(pattern_out); + pattern_out_ui16[c] = pattern_in_ui32[index[c]]; + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32: { + uint32_t* pattern_out_ui32 = reinterpret_cast(pattern_out); + pattern_out_ui32[c] = pattern_in_ui32[index[c]]; + } break; + case HSA_EXT_IMAGE_CHANNEL_TYPE_HALF_FLOAT: { + // TODO: convert to f16 + uint16_t* pattern_out_ui16 = reinterpret_cast(pattern_out); + pattern_out_ui16[c] = FloatToHalf(pattern_in_f[index[c]]); + break; + } + case HSA_EXT_IMAGE_CHANNEL_TYPE_FLOAT: { + float* pattern_out_f = reinterpret_cast(pattern_out); + pattern_out_f[c] = pattern_in_f[index[c]]; + } break; + default: + assert(false && "Should not reach here."); + break; + } + } +} + +hsa_status_t ImageManager::FillImage(const Image& image, const void* pattern, + const hsa_ext_image_region_t& region) { + const hsa_dim3_t origin = region.offset; + const hsa_dim3_t size = region.range; + + ImageProperty image_prop = + GetImageProperty(image.component, image.desc.format, image.desc.geometry); + assert(image_prop.cap != HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED); + + const size_t element_size = image_prop.element_size; + assert(element_size != 0); + + const size_t row_pitch = image.row_pitch; + const size_t slice_pitch = image.slice_pitch; + + // Map memory. + unsigned char* fill_mem = static_cast(image.data); + + char fill_value[4 * sizeof(int)] = {0}; + FormatPattern(image.desc.format, pattern, fill_value); + + // Calculate offset. + size_t offset = origin.x * element_size; + offset += row_pitch * origin.y; + offset += slice_pitch * origin.z; + + // Fill the image memory with the pattern. + for (size_t slice = 0; slice < size.z; ++slice) { + size_t offset_temp = offset + slice * slice_pitch; + + for (size_t rows = 0; rows < size.y; ++rows) { + size_t pix_offset = offset_temp; + + // Copy pattern per pixel. + for (size_t column = 0; column < size.x; ++column) { + memcpy((fill_mem + pix_offset), fill_value, element_size); + pix_offset += element_size; + } + + offset_temp += row_pitch; + } + } + + return HSA_STATUS_SUCCESS; +} + +} // namespace diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager.h b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager.h new file mode 100644 index 0000000000..11210622cf --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager.h @@ -0,0 +1,98 @@ +#ifndef AMD_HSA_EXT_IMAGE_IMAGE_MANAGER_H +#define AMD_HSA_EXT_IMAGE_IMAGE_MANAGER_H + +#include +#include "inc/hsa.h" +#include "inc/hsa_ext_image.h" +#include "resource.h" +#include "util.h" + +namespace amd { +/// @brief Abstract class for creating AMD agent specific image / sampler +/// resources and data transfer. +class ImageManager { + public: + explicit ImageManager(); + virtual ~ImageManager(); + + virtual hsa_status_t Initialize(hsa_agent_t agent_handle) = 0; + + virtual void Cleanup() = 0; + + /// @brief Retrieve device specific image property of a certain format + /// and geometry. + virtual ImageProperty GetImageProperty( + hsa_agent_t component, const hsa_ext_image_format_t& format, + hsa_ext_image_geometry_t geometry) const = 0; + + /// @brief Retrieve device specific supported max width, height, depth, + /// and array size of an image geometry. + virtual void GetImageInfoMaxDimension(hsa_agent_t component, + hsa_ext_image_geometry_t geometry, + uint32_t& width, uint32_t& height, + uint32_t& depth, + uint32_t& array_size) const = 0; + + /// @brief Calculate the size and alignment of the backing storage of an + /// image. + virtual hsa_status_t CalculateImageSizeAndAlignment( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + hsa_ext_image_data_info_t& image_info) const = 0; + + /// @brief Fill image structure with device specific image object. + virtual hsa_status_t PopulateImageSrd(Image& image) const = 0; + + /// @brief Fill image structure with device specific image object using the given format. + virtual hsa_status_t PopulateImageSrd(Image& image, const metadata_amd_t* desc) const = 0; + + /// @brief Modify device specific image object according to the specified + /// new format. + virtual hsa_status_t ModifyImageSrd( + Image& image, hsa_ext_image_format_t& new_format) const = 0; + + /// @brief Fill sampler structure with device specific sampler object. + virtual hsa_status_t PopulateSamplerSrd(Sampler& sampler) const = 0; + + // @brief Copy the content of a linear memory to an image object. + virtual hsa_status_t CopyBufferToImage( + const void* src_memory, size_t src_row_pitch, size_t src_slice_pitch, + const Image& dst_image, const hsa_ext_image_region_t& image_region); + + /// @brief Copy the content of an image object to a linear memory. + virtual hsa_status_t CopyImageToBuffer( + const Image& src_image, void* dst_memory, size_t dst_row_pitch, + size_t dst_slice_pitch, const hsa_ext_image_region_t& image_region); + + /// @brief Transfer images backing storage. + virtual hsa_status_t CopyImage(const Image& dst_image, const Image& src_image, + const hsa_dim3_t& dst_origin, + const hsa_dim3_t& src_origin, + const hsa_dim3_t size); + + /// @brief Fill image backing storage using host copy. + virtual hsa_status_t FillImage(const Image& image, const void* pattern, + const hsa_ext_image_region_t& region); + + protected: + static uint16_t FloatToHalf(float in); + + static inline float Normalize(uint8_t u_val); + + static inline uint8_t Denormalize(float f_val); + + static float StandardToLinearRGB(float s_val); + + static float LinearToStandardRGB(float l_val); + + static void FormatPattern(const hsa_ext_image_format_t& format, + const void* pattern_in, void* pattern_out); + + private: + DISALLOW_COPY_AND_ASSIGN(ImageManager); +}; + +} // namespace +#endif // AMD_HSA_EXT_IMAGE_IMAGE_MANAGER_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_ai.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_ai.cpp new file mode 100755 index 0000000000..431d5476e9 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_ai.cpp @@ -0,0 +1,554 @@ +#define NOMINMAX +#include "image_manager_ai.h" + +#include + +#include +#include + +#include "hsakmt.h" +#include "inc/hsa_ext_amd.h" +#include "addrlib/src/core/addrlib.h" +#include "image_runtime.h" +#include "resource.h" +#include "resource_ai.h" +#include "util.h" +#include "device_info.h" + +namespace amd { +ImageManagerAi::ImageManagerAi() : ImageManagerKv() {} + +ImageManagerAi::~ImageManagerAi() {} + +hsa_status_t ImageManagerAi::CalculateImageSizeAndAlignment( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + hsa_ext_image_data_info_t& image_info) const { + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT out = {0}; + hsa_profile_t profile; + hsa_status_t status = hsa_agent_get_info(component, HSA_AGENT_INFO_PROFILE, &profile); + Image::TileMode tileMode = Image::TileMode::LINEAR; + if (image_data_layout == HSA_EXT_IMAGE_DATA_LAYOUT_OPAQUE) { + tileMode = (profile == HSA_PROFILE_BASE && + desc.geometry != HSA_EXT_IMAGE_GEOMETRY_1DB)? + Image::TileMode::TILED : Image::TileMode::LINEAR; + } + if (GetAddrlibSurfaceInfoAi(component, desc, tileMode, + image_data_row_pitch, image_data_slice_pitch, out) == (uint32_t)(-1)) { + return HSA_STATUS_ERROR; + } + + size_t rowPitch = (out.bpp >> 3) * out.pitch; + size_t slicePitch = rowPitch * out.height; + if (desc.geometry != HSA_EXT_IMAGE_GEOMETRY_1DB && + image_data_layout == HSA_EXT_IMAGE_DATA_LAYOUT_LINEAR && + ((image_data_row_pitch && (rowPitch != image_data_row_pitch)) || + (image_data_slice_pitch && (slicePitch != image_data_slice_pitch)))) { + return static_cast(HSA_EXT_STATUS_ERROR_IMAGE_PITCH_UNSUPPORTED); + } + + image_info.size = out.surfSize; + assert(image_info.size != 0); + image_info.alignment = out.baseAlign; + assert(image_info.alignment != 0); + + return HSA_STATUS_SUCCESS; +} + +static const uint64_t kLimitSystem = 1ULL << 48; + +bool ImageManagerAi::IsLocalMemory(const void* address) const { + return true; +} + +hsa_status_t ImageManagerAi::PopulateImageSrd(Image& image, const metadata_amd_t* descriptor) const { + metadata_amd_ai_t* desc = (metadata_amd_ai_t*)descriptor; + bool atc_access = true; + const void* image_data_addr = image.data; + + ImageProperty image_prop = image_lut_.MapFormat(image.desc.format, image.desc.geometry); + if((image_prop.cap == HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED) || + (image_prop.element_size == 0)) + return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED; + + const Swizzle swizzle = image_lut_.MapSwizzle(image.desc.format.channel_order); + + if (IsLocalMemory(image.data)) { + atc_access = false; + image_data_addr = reinterpret_cast( + reinterpret_cast(image.data) - local_memory_base_address_); + } + + image.srd[0]=desc->word0.u32All; + image.srd[1]=desc->word1.u32All; + image.srd[2]=desc->word2.u32All; + image.srd[3]=desc->word3.u32All; + image.srd[4]=desc->word4.u32All; + image.srd[5]=desc->word5.u32All; + image.srd[6]=desc->word6.u32All; + image.srd[7]=desc->word7.u32All; + + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + sq_buf_rsrc_word0_u word0; + sq_buf_rsrc_word1_u word1; + sq_buf_rsrc_word2_u word2; + sq_buf_rsrc_word3_u word3; + + word0.val = 0; + word0.f.base_address = ext_image::PtrLow32(image_data_addr); + + word1.val = image.srd[1]; + word1.f.base_address_hi = ext_image::PtrHigh32(image_data_addr); + word1.f.stride = image_prop.element_size; + + word3.val = image.srd[3]; + word3.f.dst_sel_x = swizzle.x; + word3.f.dst_sel_y = swizzle.y; + word3.f.dst_sel_z = swizzle.z; + word3.f.dst_sel_w = swizzle.w; + word3.f.num_format = image_prop.data_type; + word3.f.data_format = image_prop.data_format; + word3.f.index_stride = image_prop.element_size; + + image.srd[0] = word0.val; + image.srd[1] = word1.val; + image.srd[3] = word3.val; + } else { + uint32_t hwPixelSize = image_lut_.GetPixelSize(desc->word1.bitfields.DATA_FORMAT, desc->word1.bitfields.NUM_FORMAT); + if(image_prop.element_size!=hwPixelSize) + return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED; + + ((SQ_IMG_RSRC_WORD0*)(&image.srd[0]))->bits.BASE_ADDRESS = ext_image::PtrLow40Shift8(image_data_addr); + ((SQ_IMG_RSRC_WORD1*)(&image.srd[1]))->bits.BASE_ADDRESS_HI = ext_image::PtrHigh64Shift40(image_data_addr); + ((SQ_IMG_RSRC_WORD1*)(&image.srd[1]))->bits.DATA_FORMAT = image_prop.data_format; + ((SQ_IMG_RSRC_WORD1*)(&image.srd[1]))->bits.NUM_FORMAT = image_prop.data_type; + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.DST_SEL_X = swizzle.x; + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.DST_SEL_Y = swizzle.y; + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.DST_SEL_Z = swizzle.z; + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.DST_SEL_W = swizzle.w; + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DA || + image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1D) { + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.TYPE = image_lut_.MapGeometry(image.desc.geometry); + } + + // Imported metadata holds the offset to metadata, add the image base address. + uintptr_t meta = uintptr_t(((SQ_IMG_RSRC_WORD5*)(&image.srd[5]))->bits.META_DATA_ADDRESS_HI) << 40; + meta |= uintptr_t(((SQ_IMG_RSRC_WORD7*)(&image.srd[7]))->bits.META_DATA_ADDRESS) << 8; + meta += reinterpret_cast(image_data_addr); + + ((SQ_IMG_RSRC_WORD7*)(&image.srd[7]))->bits.META_DATA_ADDRESS = ext_image::PtrLow40Shift8((void*)meta); + ((SQ_IMG_RSRC_WORD5*)(&image.srd[5]))->bits.META_DATA_ADDRESS_HI = ext_image::PtrHigh64Shift40((void*)meta); + } + //Looks like this is only used for CPU copies. + image.row_pitch = 0;//desc->word4.bits.pitch+1*desc->word3.bits.element_size; + image.slice_pitch = 0;//desc->; + + //Used by HSAIL shader ABI + image.srd[8] = image.desc.format.channel_type; + image.srd[9] = image.desc.format.channel_order; + image.srd[10] = static_cast(image.desc.width); + + return HSA_STATUS_SUCCESS; +} + +static TEX_BC_SWIZZLE GetBcSwizzle(const Swizzle& swizzle) { + SEL r = (SEL)swizzle.x; + SEL g = (SEL)swizzle.y; + SEL b = (SEL)swizzle.z; + SEL a = (SEL)swizzle.w; + + TEX_BC_SWIZZLE bcSwizzle = TEX_BC_Swizzle_XYZW; + + if (a == SEL_X) + { + // Have to use either TEX_BC_Swizzle_WZYX or TEX_BC_Swizzle_WXYZ + // + // For the pre-defined border color values (white, opaque black, transparent black), the only thing that + // matters is that the alpha channel winds up in the correct place (because the RGB channels are all the same) + // so either of these TEX_BC_Swizzle enumerations will work. Not sure what happens with border color palettes. + if (b == SEL_Y) + { + // ABGR + bcSwizzle = TEX_BC_Swizzle_WZYX; + } + else if ((r == SEL_X) && (g == SEL_X) && (b == SEL_X)) + { + //RGBA + bcSwizzle = TEX_BC_Swizzle_XYZW; + } + else + { + // ARGB + bcSwizzle = TEX_BC_Swizzle_WXYZ; + } + } + else if (r == SEL_X) + { + // Have to use either TEX_BC_Swizzle_XYZW or TEX_BC_Swizzle_XWYZ + if (g == SEL_Y) + { + // RGBA + bcSwizzle = TEX_BC_Swizzle_XYZW; + } + else if((g == SEL_X) && (b == SEL_X) && (a == SEL_W)) + { + // RGBA + bcSwizzle = TEX_BC_Swizzle_XYZW; + } + else + { + // RAGB + bcSwizzle = TEX_BC_Swizzle_XWYZ; + } + } + else if (g == SEL_X) + { + // GRAB, have to use TEX_BC_Swizzle_YXWZ + bcSwizzle = TEX_BC_Swizzle_YXWZ; + } + else if (b == SEL_X) + { + // BGRA, have to use TEX_BC_Swizzle_ZYXW + bcSwizzle = TEX_BC_Swizzle_ZYXW; + } + + return bcSwizzle; +} + + +hsa_status_t ImageManagerAi::PopulateImageSrd(Image& image) const { + ImageProperty image_prop = + image_lut_.MapFormat(image.desc.format, image.desc.geometry); + assert(image_prop.cap != HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED); + assert(image_prop.element_size != 0); + + bool atc_access = true; + const void* image_data_addr = image.data; + + if (IsLocalMemory(image.data)) { + atc_access = false; + image_data_addr = reinterpret_cast( + reinterpret_cast(image.data) - local_memory_base_address_); + } + + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + sq_buf_rsrc_word0_u word0; + sq_buf_rsrc_word1_u word1; + sq_buf_rsrc_word2_u word2; + sq_buf_rsrc_word3_u word3; + + word0.val = 0; + word0.f.base_address = ext_image::PtrLow32(image_data_addr); + + word1.val = 0; + word1.f.base_address_hi = ext_image::PtrHigh32(image_data_addr); + word1.f.stride = image_prop.element_size; + word1.f.swizzle_enable = false; + word1.f.cache_swizzle = false; + + word2.f.num_records = image.desc.width * image_prop.element_size; + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + word3.val = 0; + word3.f.dst_sel_x = swizzle.x; + word3.f.dst_sel_y = swizzle.y; + word3.f.dst_sel_z = swizzle.z; + word3.f.dst_sel_w = swizzle.w; + word3.f.num_format = image_prop.data_type; + word3.f.data_format = image_prop.data_format; + word3.f.index_stride = image_prop.element_size; + word3.f.type = image_lut_.MapGeometry(image.desc.geometry); + + image.srd[0] = word0.val; + image.srd[1] = word1.val; + image.srd[2] = word2.val; + image.srd[3] = word3.val; + + image.row_pitch = image.desc.width * image_prop.element_size; + image.slice_pitch = image.row_pitch; + } else { + sq_img_rsrc_word0_u word0; + sq_img_rsrc_word1_u word1; + sq_img_rsrc_word2_u word2; + sq_img_rsrc_word3_u word3; + sq_img_rsrc_word4_u word4; + sq_img_rsrc_word5_u word5; + sq_img_rsrc_word6_u word6; + sq_img_rsrc_word7_u word7; + + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT out = {0}; + + uint32_t swizzleMode = GetAddrlibSurfaceInfoAi(image.component, image.desc, image.tile_mode, + image.row_pitch, image.slice_pitch, out); + if (swizzleMode == (uint32_t)(-1)) { + return HSA_STATUS_ERROR; + } + + assert((out.bpp / 8) == image_prop.element_size); + + const size_t row_pitch_size = out.pitch * image_prop.element_size; + + word0.f.base_address = ext_image::PtrLow40Shift8(image_data_addr); + + word1.val = 0; + word1.f.base_address_hi = ext_image::PtrHigh64Shift40(image_data_addr); + word1.f.min_lod = 0; + word1.f.data_format = image_prop.data_format; + word1.f.num_format = image_prop.data_type; + + word2.val = 0; + word2.f.width = image.desc.width - 1; + word2.f.height = image.desc.height - 1; + word2.f.perf_mod = 0; + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + word3.val = 0; + word3.f.dst_sel_x = swizzle.x; + word3.f.dst_sel_y = swizzle.y; + word3.f.dst_sel_z = swizzle.z; + word3.f.dst_sel_w = swizzle.w; + word3.f.sw_mode = swizzleMode; + word3.f.type = image_lut_.MapGeometry(image.desc.geometry); + + const bool image_array = + (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DA || + image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_2DA || + image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_2DADEPTH); + const bool image_3d = (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_3D); + + word4.val = 0; + word4.f.depth = + (image_array) + ? std::max(image.desc.array_size, static_cast(1)) - 1 + : (image_3d) ? image.desc.depth - 1 : 0; + word4.f.pitch = out.pitch - 1; + word4.f.bc_swizzle = GetBcSwizzle(swizzle); + + word5.val = 0; + word6.val = 0; + word7.val = 0; + + image.srd[0] = word0.val; + image.srd[1] = word1.val; + image.srd[2] = word2.val; + image.srd[3] = word3.val; + image.srd[4] = word4.val; + image.srd[5] = word5.val; + image.srd[6] = word6.val; + image.srd[7] = word7.val; + + image.row_pitch = row_pitch_size; + image.slice_pitch = out.sliceSize; + } + + image.srd[8] = image.desc.format.channel_type; + image.srd[9] = image.desc.format.channel_order; + image.srd[10] = static_cast(image.desc.width); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageManagerAi::ModifyImageSrd( + Image& image, hsa_ext_image_format_t& new_format) const { + image.desc.format = new_format; + + ImageProperty image_prop = + image_lut_.MapFormat(image.desc.format, image.desc.geometry); + assert(image_prop.cap != HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED); + assert(image_prop.element_size != 0); + + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + SQ_BUF_RSRC_WORD3* word3 = + reinterpret_cast(&image.srd[3]); + word3->bits.DST_SEL_X = swizzle.x; + word3->bits.DST_SEL_Y = swizzle.y; + word3->bits.DST_SEL_Z = swizzle.z; + word3->bits.DST_SEL_W = swizzle.w; + word3->bits.NUM_FORMAT = image_prop.data_type; + word3->bits.DATA_FORMAT = image_prop.data_format; + } else { + SQ_IMG_RSRC_WORD1* word1 = + reinterpret_cast(&image.srd[1]); + word1->bits.DATA_FORMAT = image_prop.data_format; + word1->bits.NUM_FORMAT = image_prop.data_type; + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + SQ_IMG_RSRC_WORD3* word3 = + reinterpret_cast(&image.srd[3]); + word3->bits.DST_SEL_X = swizzle.x; + word3->bits.DST_SEL_Y = swizzle.y; + word3->bits.DST_SEL_Z = swizzle.z; + word3->bits.DST_SEL_W = swizzle.w; + } + + image.srd[8] = image.desc.format.channel_type; + image.srd[9] = image.desc.format.channel_order; + image.srd[10] = static_cast(image.desc.width); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageManagerAi::PopulateSamplerSrd(amd::Sampler& sampler) const { + const hsa_ext_sampler_descriptor_t sampler_descriptor = sampler.desc; + + SQ_IMG_SAMP_WORD0 word0; + SQ_IMG_SAMP_WORD1 word1; + SQ_IMG_SAMP_WORD2 word2; + SQ_IMG_SAMP_WORD3 word3; + + word0.u32All = 0; + switch (sampler_descriptor.address_mode) { + case HSA_EXT_SAMPLER_ADDRESSING_MODE_CLAMP_TO_EDGE: + word0.bits.CLAMP_X = static_cast(SQ_TEX_CLAMP_LAST_TEXEL); + break; + case HSA_EXT_SAMPLER_ADDRESSING_MODE_CLAMP_TO_BORDER: + word0.bits.CLAMP_X = static_cast(SQ_TEX_CLAMP_BORDER); + break; + case HSA_EXT_SAMPLER_ADDRESSING_MODE_MIRRORED_REPEAT: + word0.bits.CLAMP_X = static_cast(SQ_TEX_MIRROR); + break; + case HSA_EXT_SAMPLER_ADDRESSING_MODE_UNDEFINED: + case HSA_EXT_SAMPLER_ADDRESSING_MODE_REPEAT: + word0.bits.CLAMP_X = static_cast(SQ_TEX_WRAP); + break; + default: + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + word0.bits.CLAMP_Y = word0.bits.CLAMP_X; + word0.bits.CLAMP_Z = word0.bits.CLAMP_X; + word0.bits.FORCE_UNNORMALIZED = (sampler_descriptor.coordinate_mode == + HSA_EXT_SAMPLER_COORDINATE_MODE_UNNORMALIZED); + + word1.u32All = 0; + word1.bits.MAX_LOD = 4095; + + word2.u32All = 0; + switch (sampler_descriptor.filter_mode) { + case HSA_EXT_SAMPLER_FILTER_MODE_NEAREST: + word2.bits.XY_MAG_FILTER = static_cast(SQ_TEX_XY_FILTER_POINT); + break; + case HSA_EXT_SAMPLER_FILTER_MODE_LINEAR: + word2.bits.XY_MAG_FILTER = static_cast(SQ_TEX_XY_FILTER_BILINEAR); + break; + default: + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + word2.bits.XY_MIN_FILTER = word2.bits.XY_MAG_FILTER; + word2.bits.Z_FILTER = SQ_TEX_Z_FILTER_NONE; + word2.bits.MIP_FILTER = SQ_TEX_MIP_FILTER_NONE; + + word3.u32All = 0; + + // TODO: check this bit with HSAIL spec. + word3.bits.BORDER_COLOR_TYPE = SQ_TEX_BORDER_COLOR_TRANS_BLACK; + + sampler.srd[0] = word0.u32All; + sampler.srd[1] = word1.u32All; + sampler.srd[2] = word2.u32All; + sampler.srd[3] = word3.u32All; + + return HSA_STATUS_SUCCESS; +} + +uint32_t ImageManagerAi::GetAddrlibSurfaceInfoAi( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + Image::TileMode tileMode, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT& out) const { + const ImageProperty image_prop = + GetImageProperty(component, desc.format, desc.geometry); + + const AddrFormat addrlib_format = GetAddrlibFormat(image_prop); + + const uint32_t width = static_cast(desc.width); + const uint32_t height = static_cast(desc.height); + static const size_t kMinNumSlice = 1; + const uint32_t num_slice = static_cast( + std::max(kMinNumSlice, std::max(desc.array_size, desc.depth))); + + ADDR2_COMPUTE_SURFACE_INFO_INPUT in = {0}; + in.size = sizeof(ADDR2_COMPUTE_SURFACE_INFO_INPUT); + in.format = addrlib_format; + in.bpp = static_cast(image_prop.element_size) * 8; + in.width = width; + in.height = height; + in.numSlices = num_slice; + in.pitchInElement = image_data_row_pitch / image_prop.element_size; + switch(desc.geometry) { + case HSA_EXT_IMAGE_GEOMETRY_1D: + case HSA_EXT_IMAGE_GEOMETRY_1DB: + case HSA_EXT_IMAGE_GEOMETRY_1DA: + in.resourceType = ADDR_RSRC_TEX_1D; + break; + case HSA_EXT_IMAGE_GEOMETRY_2D: + case HSA_EXT_IMAGE_GEOMETRY_2DDEPTH: + case HSA_EXT_IMAGE_GEOMETRY_2DA: + case HSA_EXT_IMAGE_GEOMETRY_2DADEPTH: + in.resourceType = ADDR_RSRC_TEX_2D; + break; + case HSA_EXT_IMAGE_GEOMETRY_3D: + in.resourceType = ADDR_RSRC_TEX_3D; + break; + } + in.swizzleMode = (tileMode == Image::TileMode::LINEAR)? ADDR_SW_LINEAR : ADDR_SW_4KB; + in.flags.texture = 1; + + ADDR2_GET_PREFERRED_SURF_SETTING_INPUT prefSettingsInput = { 0 }; + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT prefSettingsOutput = { 0 }; + + prefSettingsInput.size = sizeof(prefSettingsInput); + prefSettingsInput.flags = in.flags; + prefSettingsInput.bpp = in.bpp; + prefSettingsInput.format = in.format; + prefSettingsInput.width = in.width; + prefSettingsInput.height = in.height; + prefSettingsInput.numFrags = in.numFrags; + prefSettingsInput.numSamples = in.numSamples; + prefSettingsInput.numMipLevels = in.numMipLevels; + prefSettingsInput.numSlices = in.numSlices; + prefSettingsInput.resourceLoction = ADDR_RSRC_LOC_UNDEF; + prefSettingsInput.resourceType = in.resourceType; + + if (tileMode == Image::TileMode::LINEAR) + { + // this should force linear. + prefSettingsInput.forbiddenBlock.macroThin4KB = 1; + prefSettingsInput.forbiddenBlock.macroThick4KB = 1; + prefSettingsInput.forbiddenBlock.macroThin64KB = 1; + prefSettingsInput.forbiddenBlock.macroThick64KB = 1; + } + else + { + // this should not allow linear. + prefSettingsInput.forbiddenBlock.linear = 1; + } + + prefSettingsInput.forbiddenBlock.micro = 1; // but don't ever allow the 256b swizzle modes + prefSettingsInput.forbiddenBlock.var = 1; // and don't allow variable-size block modes + + if (ADDR_OK != Addr2GetPreferredSurfaceSetting(addr_lib_, &prefSettingsInput, &prefSettingsOutput)) { + return (uint32_t)(-1); + } + + in.swizzleMode = prefSettingsOutput.swizzleMode; + + out.size = sizeof(ADDR2_COMPUTE_SURFACE_INFO_OUTPUT); + if (ADDR_OK != Addr2ComputeSurfaceInfo(addr_lib_, &in, &out)) { + return (uint32_t)(-1); + } + if (out.surfSize == 0) { + return (uint32_t)(-1); + } + + return in.swizzleMode; +} + +} // namespace diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_ai.h b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_ai.h new file mode 100644 index 0000000000..c28bb8416b --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_ai.h @@ -0,0 +1,50 @@ +#ifndef HSA_RUNTIME_EXT_IMAGE_IMAGE_MANAGER_AI_H +#define HSA_RUNTIME_EXT_IMAGE_IMAGE_MANAGER_AI_H + +#include "addrlib/inc/addrinterface.h" +#include "image_manager_kv.h" + +namespace amd { + +class ImageManagerAi : public ImageManagerKv { + public: + explicit ImageManagerAi(); + virtual ~ImageManagerAi(); + + /// @brief Calculate the size and alignment of the backing storage of an + /// image. + virtual hsa_status_t CalculateImageSizeAndAlignment( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, size_t image_data_slice_pitch, + hsa_ext_image_data_info_t& image_info) const; + + /// @brief Fill image structure with device specific image object. + virtual hsa_status_t PopulateImageSrd(Image& image) const; + + /// @brief Fill image structure with device specific image object using the given format. + virtual hsa_status_t PopulateImageSrd(Image& image, const metadata_amd_t* desc) const; + + /// @brief Modify device specific image object according to the specified + /// new format. + virtual hsa_status_t ModifyImageSrd(Image& image, + hsa_ext_image_format_t& new_format) const; + + /// @brief Fill sampler structure with device specific sampler object. + virtual hsa_status_t PopulateSamplerSrd(Sampler& sampler) const; + + protected: + uint32_t GetAddrlibSurfaceInfoAi(hsa_agent_t component, + const hsa_ext_image_descriptor_t& desc, + Image::TileMode tileMode, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT& out) const; + + bool IsLocalMemory(const void* address) const; + + private: + DISALLOW_COPY_AND_ASSIGN(ImageManagerAi); +}; +} +#endif // HSA_RUNTIME_EXT_IMAGE_IMAGE_MANAGER_AI_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_kv.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_kv.cpp new file mode 100755 index 0000000000..5acb9e8fac --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_kv.cpp @@ -0,0 +1,966 @@ +#define NOMINMAX +#include "image_manager_kv.h" + +#include + +#include +#include + +#include "hsakmt.h" +#include "inc/hsa.h" +#include "inc/hsa_ext_amd.h" +#include "addrlib/inc/addrinterface.h" +#include "addrlib/src/core/addrlib.h" +#include "image_runtime.h" +#include "resource.h" +#include "resource_kv.h" +#include "util.h" +#include "device_info.h" + +namespace amd { +ImageManagerKv::ImageManagerKv() : ImageManager() {} + +ImageManagerKv::~ImageManagerKv() {} + +hsa_status_t ImageManagerKv::Initialize(hsa_agent_t agent_handle) { + agent_ = agent_handle; + + hsa_status_t status = GetGPUAsicID(agent_, &chip_id_); + uint32_t major_ver = MajorVerFromDevID(chip_id_); + assert(status == HSA_STATUS_SUCCESS); + + family_type_ = DevIDToAddrLibFamily(chip_id_); + + HsaGpuTileConfig tileConfig = {0}; + unsigned int tc[40]; + unsigned int mtc[40]; + tileConfig.TileConfig = &tc[0]; + tileConfig.NumTileConfigs = 40; + tileConfig.MacroTileConfig = &mtc[0]; + tileConfig.NumMacroTileConfigs = 40; + uint32_t node_id = 0; + status = hsa_agent_get_info(agent_, static_cast(HSA_AMD_AGENT_INFO_DRIVER_NODE_ID), &node_id); + assert(status == HSA_STATUS_SUCCESS); + HSAKMT_STATUS stat = hsaKmtGetTileConfig(node_id, &tileConfig); + assert(stat == HSAKMT_STATUS_SUCCESS); + + // Initialize address library. + // TODO(bwicakso) hard coded based on UGL parameters. + // Need to get this information from KMD. + addr_lib_ = NULL; + ADDR_CREATE_INPUT addr_create_input = {0}; + ADDR_CREATE_OUTPUT addr_create_output = {0}; + + if (major_ver >= 9) { + addr_create_input.chipEngine = CIASICIDGFXENGINE_ARCTICISLAND; + } else { + addr_create_input.chipEngine = CIASICIDGFXENGINE_SOUTHERNISLAND; + } + + addr_create_input.chipFamily = family_type_; + addr_create_input.chipRevision = 0; // TODO(bwicakso): find how to get this. + + ADDR_CREATE_FLAGS create_flags = {0}; + create_flags.value = 0; + create_flags.useTileIndex = 1; + addr_create_input.createFlags = create_flags; + + addr_create_input.callbacks.allocSysMem = AllocSysMem; + addr_create_input.callbacks.freeSysMem = FreeSysMem; + addr_create_input.callbacks.debugPrint = 0; + + ADDR_REGISTER_VALUE reg_val = {0}; + reg_val.gbAddrConfig = tileConfig.GbAddrConfig; + reg_val.noOfBanks = tileConfig.NumBanks; + reg_val.noOfRanks = tileConfig.NumRanks; + reg_val.pTileConfig = tileConfig.TileConfig; + reg_val.noOfEntries = tileConfig.NumTileConfigs; + reg_val.noOfMacroEntries = tileConfig.NumMacroTileConfigs; + reg_val.pMacroTileConfig = tileConfig.MacroTileConfig; + + addr_create_input.regValue = reg_val; + + addr_create_input.minPitchAlignPixels = 0; + + ADDR_E_RETURNCODE addr_ret = + AddrCreate(&addr_create_input, &addr_create_output); + + if (addr_ret == ADDR_OK) { + addr_lib_ = addr_create_output.hLib; + } else { + return HSA_STATUS_ERROR; + } + + // The ImageManagerKv::Initialize is called on the first call to + // hsa_ext_image_*, so checking the coherency mode here is fine as long as + // the change to the coherency mode happens before a call to + // hsa_ext_image_create. + hsa_amd_coherency_type_t coherency_type; + status = hsa_amd_coherency_get_type(agent_, &coherency_type); + assert(status == HSA_STATUS_SUCCESS); + mtype_ = (coherency_type == HSA_AMD_COHERENCY_TYPE_COHERENT) ? 3 : 1; + + // TODO: handle the case where the call to hsa_set_memory_type happens after + // hsa_ext_image_create. + + hsa_region_t local_region = {0}; + status = + hsa_agent_iterate_regions(agent_, GetLocalMemoryRegion, &local_region); + assert(status == HSA_STATUS_SUCCESS); + + local_memory_base_address_ = 0; + if (local_region.handle != 0) { + status = hsa_region_get_info( + local_region, static_cast(HSA_AMD_REGION_INFO_BASE), + &local_memory_base_address_); + assert(status == HSA_STATUS_SUCCESS); + } + + // Zeroed the queue object so it can be created on demand. + blit_queue_.queue_ = NULL; + blit_queue_.cached_index_ = 0; + + return HSA_STATUS_SUCCESS; +} + +void ImageManagerKv::Cleanup() { + if (blit_queue_.queue_ != NULL) { + hsa_queue_destroy(blit_queue_.queue_); + } + + if (addr_lib_ != NULL) { + AddrDestroy(addr_lib_); + } +} + +ImageProperty ImageManagerKv::GetImageProperty( + hsa_agent_t component, const hsa_ext_image_format_t& format, + hsa_ext_image_geometry_t geometry) const { + return image_lut_.MapFormat(format, geometry); +} + +void ImageManagerKv::GetImageInfoMaxDimension(hsa_agent_t component, + hsa_ext_image_geometry_t geometry, + uint32_t& width, uint32_t& height, + uint32_t& depth, + uint32_t& array_size) const { + width = image_lut_.GetMaxWidth(geometry); + height = image_lut_.GetMaxHeight(geometry); + depth = image_lut_.GetMaxDepth(geometry); + array_size = image_lut_.GetMaxArraySize(geometry); +} + +hsa_status_t ImageManagerKv::CalculateImageSizeAndAlignment( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + hsa_ext_image_data_info_t& image_info) const { + ADDR_COMPUTE_SURFACE_INFO_OUTPUT out = {0}; + hsa_profile_t profile; + hsa_status_t status = hsa_agent_get_info(component, HSA_AGENT_INFO_PROFILE, &profile); + Image::TileMode tileMode = Image::TileMode::LINEAR; + if (image_data_layout == HSA_EXT_IMAGE_DATA_LAYOUT_OPAQUE) { + tileMode = (profile == HSA_PROFILE_BASE && + desc.geometry != HSA_EXT_IMAGE_GEOMETRY_1DB)? + Image::TileMode::TILED : Image::TileMode::LINEAR; + } + if (!GetAddrlibSurfaceInfo(component, desc, tileMode, + image_data_row_pitch, image_data_slice_pitch, out)) { + return HSA_STATUS_ERROR; + } + + size_t rowPitch = (out.bpp >> 3) * out.pitch; + size_t slicePitch = rowPitch * out.height; + if (desc.geometry != HSA_EXT_IMAGE_GEOMETRY_1DB && + image_data_layout == HSA_EXT_IMAGE_DATA_LAYOUT_LINEAR && + ((image_data_row_pitch && (rowPitch != image_data_row_pitch)) || + (image_data_slice_pitch && (slicePitch != image_data_slice_pitch)))) { + return static_cast(HSA_EXT_STATUS_ERROR_IMAGE_PITCH_UNSUPPORTED); + } + + image_info.size = out.surfSize; + assert(image_info.size != 0); + image_info.alignment = out.baseAlign; + assert(image_info.alignment != 0); + + return HSA_STATUS_SUCCESS; +} + +static const uint64_t kLimitSystem = 1ULL << 48; + +bool ImageManagerKv::IsLocalMemory(const void* address) const { + uintptr_t u_address = reinterpret_cast(address); + + uint32_t major_ver = MajorVerFromDevID(chip_id_); + + if (major_ver >= 8) { + return true; + } +#ifdef HSA_LARGE_MODEL + // Fast path without querying local memory region info. + // User mode system memory addressable by CPU is 0 to 2^48. + return (u_address >= kLimitSystem); +#else + // No local memory on 32 bit. + return false; +#endif +} + +hsa_status_t ImageManagerKv::PopulateImageSrd(Image& image, const metadata_amd_t* descriptor) const { + metadata_amd_ci_vi_t* desc = (metadata_amd_ci_vi_t*)descriptor; + bool atc_access = true; + uint32_t mtype = mtype_; + const void* image_data_addr = image.data; + + ImageProperty image_prop = image_lut_.MapFormat(image.desc.format, image.desc.geometry); + if((image_prop.cap == HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED) || + (image_prop.element_size == 0)) + return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED; + + uint32_t hwPixelSize = image_lut_.GetPixelSize(desc->word1.bitfields.data_format, desc->word1.bitfields.num_format); + if(image_prop.element_size!=hwPixelSize) + return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED; + + const Swizzle swizzle = image_lut_.MapSwizzle(image.desc.format.channel_order); + + if (IsLocalMemory(image.data)) { + atc_access = false; + mtype = 1; + image_data_addr = reinterpret_cast( + reinterpret_cast(image.data) - local_memory_base_address_); + } + + image.srd[0]=desc->word0.u32_all; + image.srd[1]=desc->word1.u32_all; + image.srd[2]=desc->word2.u32_all; + image.srd[3]=desc->word3.u32_all; + image.srd[4]=desc->word4.u32_all; + image.srd[5]=desc->word5.u32_all; + image.srd[6]=desc->word6.u32_all; + image.srd[7]=desc->word7.u32_all; + + ((SQ_IMG_RSRC_WORD0*)(&image.srd[0]))->bits.base_address = ext_image::PtrLow40Shift8(image_data_addr); + ((SQ_IMG_RSRC_WORD1*)(&image.srd[1]))->bits.base_address_hi = ext_image::PtrHigh64Shift40(image_data_addr); + ((SQ_IMG_RSRC_WORD1*)(&image.srd[1]))->bits.data_format = image_prop.data_format; + ((SQ_IMG_RSRC_WORD1*)(&image.srd[1]))->bits.num_format = image_prop.data_type; + ((SQ_IMG_RSRC_WORD1*)(&image.srd[1]))->bits.mtype = mtype; + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.atc=atc_access; + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.dst_sel_x = swizzle.x; + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.dst_sel_y = swizzle.y; + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.dst_sel_z = swizzle.z; + ((SQ_IMG_RSRC_WORD3*)(&image.srd[3]))->bits.dst_sel_w = swizzle.w; + ((SQ_IMG_RSRC_WORD7*)(&image.srd[7]))->bits.meta_data_address += ext_image::PtrLow40Shift8(image_data_addr); + + //Looks like this is only used for CPU copies. + image.row_pitch = (desc->word4.bits.pitch+1)*image_prop.element_size; + image.slice_pitch = image.row_pitch * (desc->word2.bits.height+1); + + //Used by HSAIL shader ABI + image.srd[8] = image.desc.format.channel_type; + image.srd[9] = image.desc.format.channel_order; + image.srd[10] = static_cast(image.desc.width); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageManagerKv::PopulateImageSrd(Image& image) const { + ImageProperty image_prop = + image_lut_.MapFormat(image.desc.format, image.desc.geometry); + assert(image_prop.cap != HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED); + assert(image_prop.element_size != 0); + + bool atc_access = true; + uint32_t mtype = mtype_; + const void* image_data_addr = image.data; + + if (IsLocalMemory(image.data)) { + atc_access = false; + mtype = 1; + image_data_addr = reinterpret_cast( + reinterpret_cast(image.data) - local_memory_base_address_); + } + + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + SQ_BUF_RSRC_WORD0 word0; + SQ_BUF_RSRC_WORD1 word1; + SQ_BUF_RSRC_WORD2 word2; + SQ_BUF_RSRC_WORD3 word3; + + word0.u32_all = 0; + word0.bits.base_address = ext_image::PtrLow32(image_data_addr); + + word1.u32_all = 0; + word1.bits.base_address_hi = ext_image::PtrHigh32(image_data_addr); + word1.bits.stride = image_prop.element_size; + word1.bits.swizzle_enable = false; + word1.bits.cache_swizzle = false; + + uint32_t major_ver = MajorVerFromDevID(chip_id_); + word2.bits.num_records = (major_ver < 8) ? + image.desc.width : image.desc.width * image_prop.element_size; + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + word3.u32_all = 0; + word3.bits.dst_sel_x = swizzle.x; + word3.bits.dst_sel_y = swizzle.y; + word3.bits.dst_sel_z = swizzle.z; + word3.bits.dst_sel_w = swizzle.w; + word3.bits.num_format = image_prop.data_type; + word3.bits.data_format = image_prop.data_format; + word3.bits.atc = atc_access; + word3.bits.element_size = image_prop.element_size; + word3.bits.type = image_lut_.MapGeometry(image.desc.geometry); + word3.bits.mtype = mtype; + + image.srd[0] = word0.u32_all; + image.srd[1] = word1.u32_all; + image.srd[2] = word2.u32_all; + image.srd[3] = word3.u32_all; + + image.row_pitch = image.desc.width * image_prop.element_size; + image.slice_pitch = image.row_pitch; + } else { + SQ_IMG_RSRC_WORD0 word0; + SQ_IMG_RSRC_WORD1 word1; + SQ_IMG_RSRC_WORD2 word2; + SQ_IMG_RSRC_WORD3 word3; + SQ_IMG_RSRC_WORD4 word4; + SQ_IMG_RSRC_WORD5 word5; + SQ_IMG_RSRC_WORD6 word6; + SQ_IMG_RSRC_WORD7 word7; + + ADDR_COMPUTE_SURFACE_INFO_OUTPUT out = {0}; + if (!GetAddrlibSurfaceInfo(image.component, image.desc, image.tile_mode, + image.row_pitch, image.slice_pitch, out)) { + return HSA_STATUS_ERROR; + } + + assert((out.bpp / 8) == image_prop.element_size); + + const size_t row_pitch_size = out.pitch * image_prop.element_size; + + word0.bits.base_address = ext_image::PtrLow40Shift8(image_data_addr); + + word1.u32_all = 0; + word1.bits.base_address_hi = ext_image::PtrHigh64Shift40(image_data_addr); + word1.bits.min_lod = 0; + word1.bits.data_format = image_prop.data_format; + word1.bits.num_format = image_prop.data_type; + word1.bits.mtype = mtype; + + word2.u32_all = 0; + word2.bits.width = image.desc.width - 1; + word2.bits.height = image.desc.height - 1; + word2.bits.perf_mod = 0; + word2.bits.interlaced = 0; + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + word3.u32_all = 0; + word3.bits.dst_sel_x = swizzle.x; + word3.bits.dst_sel_y = swizzle.y; + word3.bits.dst_sel_z = swizzle.z; + word3.bits.dst_sel_w = swizzle.w; + word3.bits.tiling_index = out.tileIndex; + word3.bits.pow2_pad = (ext_image::IsPowerOfTwo(row_pitch_size) && + ext_image::IsPowerOfTwo(image.desc.height)) + ? 1 + : 0; + word3.bits.type = image_lut_.MapGeometry(image.desc.geometry); + word3.bits.atc = atc_access; + + const bool image_array = + (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DA || + image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_2DA || + image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_2DADEPTH); + const bool image_3d = (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_3D); + + word4.u32_all = 0; + word4.bits.depth = + (image_array) + ? std::max(image.desc.array_size, static_cast(1)) - 1 + : (image_3d) ? image.desc.depth - 1 : 0; + word4.bits.pitch = out.pitch - 1; + + word5.u32_all = 0; + word5.bits.last_array = + (image_array) + ? (std::max(image.desc.array_size, static_cast(1)) - 1) + : 0; + + word6.u32_all = 0; + word7.u32_all = 0; + + image.srd[0] = word0.u32_all; + image.srd[1] = word1.u32_all; + image.srd[2] = word2.u32_all; + image.srd[3] = word3.u32_all; + image.srd[4] = word4.u32_all; + image.srd[5] = word5.u32_all; + image.srd[6] = word6.u32_all; + image.srd[7] = word7.u32_all; + + image.row_pitch = row_pitch_size; + image.slice_pitch = out.sliceSize; + } + + image.srd[8] = image.desc.format.channel_type; + image.srd[9] = image.desc.format.channel_order; + image.srd[10] = static_cast(image.desc.width); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageManagerKv::ModifyImageSrd( + Image& image, hsa_ext_image_format_t& new_format) const { + image.desc.format = new_format; + + ImageProperty image_prop = + image_lut_.MapFormat(image.desc.format, image.desc.geometry); + assert(image_prop.cap != HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED); + assert(image_prop.element_size != 0); + + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + SQ_BUF_RSRC_WORD3* word3 = + reinterpret_cast(&image.srd[3]); + word3->bits.dst_sel_x = swizzle.x; + word3->bits.dst_sel_y = swizzle.y; + word3->bits.dst_sel_z = swizzle.z; + word3->bits.dst_sel_w = swizzle.w; + word3->bits.num_format = image_prop.data_type; + word3->bits.data_format = image_prop.data_format; + } else { + SQ_IMG_RSRC_WORD1* word1 = + reinterpret_cast(&image.srd[1]); + word1->bits.data_format = image_prop.data_format; + word1->bits.num_format = image_prop.data_type; + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + SQ_IMG_RSRC_WORD3* word3 = + reinterpret_cast(&image.srd[3]); + word3->bits.dst_sel_x = swizzle.x; + word3->bits.dst_sel_y = swizzle.y; + word3->bits.dst_sel_z = swizzle.z; + word3->bits.dst_sel_w = swizzle.w; + } + + image.srd[8] = image.desc.format.channel_type; + image.srd[9] = image.desc.format.channel_order; + image.srd[10] = static_cast(image.desc.width); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageManagerKv::PopulateSamplerSrd(amd::Sampler& sampler) const { + const hsa_ext_sampler_descriptor_t sampler_descriptor = sampler.desc; + + SQ_IMG_SAMP_WORD0 word0; + SQ_IMG_SAMP_WORD1 word1; + SQ_IMG_SAMP_WORD2 word2; + SQ_IMG_SAMP_WORD3 word3; + + word0.u32_all = 0; + switch (sampler_descriptor.address_mode) { + case HSA_EXT_SAMPLER_ADDRESSING_MODE_CLAMP_TO_EDGE: + word0.bits.clamp_x = static_cast(SQ_TEX_CLAMP_LAST_TEXEL); + break; + case HSA_EXT_SAMPLER_ADDRESSING_MODE_CLAMP_TO_BORDER: + word0.bits.clamp_x = static_cast(SQ_TEX_CLAMP_BORDER); + break; + case HSA_EXT_SAMPLER_ADDRESSING_MODE_MIRRORED_REPEAT: + word0.bits.clamp_x = static_cast(SQ_TEX_MIRROR); + break; + case HSA_EXT_SAMPLER_ADDRESSING_MODE_UNDEFINED: + case HSA_EXT_SAMPLER_ADDRESSING_MODE_REPEAT: + word0.bits.clamp_x = static_cast(SQ_TEX_WRAP); + break; + default: + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + word0.bits.clamp_y = word0.bits.clamp_x; + word0.bits.clamp_z = word0.bits.clamp_x; + word0.bits.force_unormalized = (sampler_descriptor.coordinate_mode == + HSA_EXT_SAMPLER_COORDINATE_MODE_UNNORMALIZED); + + word1.u32_all = 0; + word1.bits.max_lod = 4095; + + word2.u32_all = 0; + switch (sampler_descriptor.filter_mode) { + case HSA_EXT_SAMPLER_FILTER_MODE_NEAREST: + word2.bits.xy_mag_filter = static_cast(SQ_TEX_XY_FILTER_POINT); + break; + case HSA_EXT_SAMPLER_FILTER_MODE_LINEAR: + word2.bits.xy_mag_filter = static_cast(SQ_TEX_XY_FILTER_BILINEAR); + break; + default: + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + word2.bits.xy_min_filter = word2.bits.xy_mag_filter; + word2.bits.z_filter = SQ_TEX_Z_FILTER_NONE; + word2.bits.mip_filter = SQ_TEX_MIP_FILTER_NONE; + + word3.u32_all = 0; + + // TODO: check this bit with HSAIL spec. + word3.bits.border_color_type = SQ_TEX_BORDER_COLOR_TRANS_BLACK; + + sampler.srd[0] = word0.u32_all; + sampler.srd[1] = word1.u32_all; + sampler.srd[2] = word2.u32_all; + sampler.srd[3] = word3.u32_all; + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageManagerKv::CopyBufferToImage( + const void* src_memory, size_t src_row_pitch, size_t src_slice_pitch, + const Image& dst_image, const hsa_ext_image_region_t& image_region) { + if (BlitQueueInit().queue_ == NULL) { + return HSA_STATUS_ERROR_OUT_OF_RESOURCES; + } + + return ext_image::ImageRuntime::instance()->blit_kernel().CopyBufferToImage( + blit_queue_, blit_code_catalog_, src_memory, src_row_pitch, + src_slice_pitch, dst_image, image_region); +} + +hsa_status_t ImageManagerKv::CopyImageToBuffer( + const Image& src_image, void* dst_memory, size_t dst_row_pitch, + size_t dst_slice_pitch, const hsa_ext_image_region_t& image_region) { + if (BlitQueueInit().queue_ == NULL) { + return HSA_STATUS_ERROR_OUT_OF_RESOURCES; + } + + return ext_image::ImageRuntime::instance()->blit_kernel().CopyImageToBuffer( + blit_queue_, blit_code_catalog_, src_image, dst_memory, dst_row_pitch, + dst_slice_pitch, image_region); +} + +hsa_status_t ImageManagerKv::CopyImage(const Image& dst_image, + const Image& src_image, + const hsa_dim3_t& dst_origin, + const hsa_dim3_t& src_origin, + const hsa_dim3_t size) { + if (BlitQueueInit().queue_ == NULL) { + return HSA_STATUS_ERROR_OUT_OF_RESOURCES; + } + + const hsa_ext_image_format_t src_format = src_image.desc.format; + const hsa_ext_image_channel_order32_t src_order = src_format.channel_order; + const hsa_ext_image_channel_type32_t src_type = src_format.channel_type; + + const hsa_ext_image_format_t dst_format = dst_image.desc.format; + const hsa_ext_image_channel_order32_t dst_order = dst_format.channel_order; + const hsa_ext_image_channel_type32_t dst_type = dst_format.channel_type; + + BlitKernel::KernelOp copy_type = BlitKernel::KERNEL_OP_COPY_IMAGE_DEFAULT; + + if ((src_order == dst_order) && (src_type == dst_type)) { + return ext_image::ImageRuntime::instance()->blit_kernel().CopyImage( + blit_queue_, blit_code_catalog_, dst_image, src_image, dst_origin, + src_origin, size, copy_type); + } + + // Source and destination format must be the same, except for + // SRGBA <--> RGBA images. + if ((src_type == HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT8) && + (dst_type == HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT8)) { + if ((src_order == HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA) && + (dst_order == HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA)) { + copy_type = BlitKernel::KERNEL_OP_COPY_IMAGE_STANDARD_TO_LINEAR; + } else if ((src_order == HSA_EXT_IMAGE_CHANNEL_ORDER_RGBA) && + (dst_order == HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA)) { + copy_type = BlitKernel::KERNEL_OP_COPY_IMAGE_LINEAR_TO_STANDARD; + } + + if (copy_type != BlitKernel::KERNEL_OP_COPY_IMAGE_DEFAULT) { + // KV and CZ don't have write support for SRGBA image, so treat the + // destination image as RGBA image. + SQ_IMG_RSRC_WORD1* word1 = reinterpret_cast( + &const_cast(dst_image).srd[1]); + + // Destination can be linear or standard, preserve the original value. + uint32_t num_format_original = word1->bits.num_format; + word1->bits.num_format = TYPE_UNORM; + + hsa_status_t status = + ext_image::ImageRuntime::instance()->blit_kernel().CopyImage( + blit_queue_, blit_code_catalog_, dst_image, src_image, dst_origin, + src_origin, size, copy_type); + + // Revert to the original format after the copy operation is finished. + word1->bits.num_format = num_format_original; + + return status; + } + } + + return HSA_STATUS_ERROR_INVALID_ARGUMENT; +} + +hsa_status_t ImageManagerKv::FillImage(const Image& image, const void* pattern, + const hsa_ext_image_region_t& region) { + if (BlitQueueInit().queue_ == NULL) { + return HSA_STATUS_ERROR_OUT_OF_RESOURCES; + } + + Image* image_view = const_cast(&image); + + SQ_BUF_RSRC_WORD3* word3_buff = NULL; + SQ_IMG_RSRC_WORD3* word3_image = NULL; + uint32_t dst_sel_w_original = 0; + if (image_view->desc.format.channel_type == + HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_101010) { + // Force GPU to ignore the last two bits (alpha bits). + if (image_view->desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + word3_buff = reinterpret_cast(&image_view->srd[3]); + dst_sel_w_original = word3_buff->bits.dst_sel_w; + word3_buff->bits.dst_sel_w = SEL_0; + } else { + word3_image = reinterpret_cast(&image_view->srd[3]); + dst_sel_w_original = word3_image->bits.dst_sel_w; + word3_image->bits.dst_sel_w = SEL_0; + } + } + + SQ_IMG_RSRC_WORD1* word1 = NULL; + uint32_t num_format_original = 0; + const void* new_pattern = pattern; + float fill_value[4] = {0}; + switch (image_view->desc.format.channel_order) { + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA: { + // KV and CZ don't have write support for SRGBA image, so convert pattern + // to standard form and treat the image as RGBA image. + const float* pattern_f = reinterpret_cast(pattern); + fill_value[0] = LinearToStandardRGB(pattern_f[0]); + fill_value[1] = LinearToStandardRGB(pattern_f[1]); + fill_value[2] = LinearToStandardRGB(pattern_f[2]); + fill_value[3] = pattern_f[3]; + new_pattern = fill_value; + + word1 = reinterpret_cast(&image_view->srd[1]); + num_format_original = word1->bits.num_format; + word1->bits.num_format = TYPE_UNORM; + } break; + default: + break; + } + + hsa_status_t status = + ext_image::ImageRuntime::instance()->blit_kernel().FillImage( + blit_queue_, blit_code_catalog_, *image_view, new_pattern, region); + + // Revert back original configuration. + if (word3_buff != NULL) { + word3_buff->bits.dst_sel_w = dst_sel_w_original; + } + + if (word3_image != NULL) { + word3_image->bits.dst_sel_w = dst_sel_w_original; + } + + if (word1 != NULL) { + word1->bits.num_format = num_format_original; + } + + return status; +} + +hsa_status_t ImageManagerKv::GetLocalMemoryRegion(hsa_region_t region, + void* data) { + if (data == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + hsa_region_segment_t segment; + hsa_status_t stat = + hsa_region_get_info(region, HSA_REGION_INFO_SEGMENT, &segment); + if (stat != HSA_STATUS_SUCCESS) { + return stat; + } + + if (segment != HSA_REGION_SEGMENT_GLOBAL) { + return HSA_STATUS_SUCCESS; + } + + uint32_t base = 0; + stat = hsa_region_get_info(region, HSA_REGION_INFO_GLOBAL_FLAGS, &base); + if (stat != HSA_STATUS_SUCCESS) { + return stat; + } + + if ((base & HSA_REGION_GLOBAL_FLAG_COARSE_GRAINED) != 0) { + hsa_region_t* local_memory_region = (hsa_region_t*)data; + *local_memory_region = region; + } + + return HSA_STATUS_SUCCESS; +} + +AddrFormat ImageManagerKv::GetAddrlibFormat(const ImageProperty& image_prop) { + switch (image_prop.data_format) { + case FMT_8: + return ADDR_FMT_8; + break; + case FMT_16: + return (image_prop.data_type != TYPE_FLOAT) ? ADDR_FMT_16 + : ADDR_FMT_16_FLOAT; + break; + case FMT_8_8: + return ADDR_FMT_8_8; + break; + case FMT_32: + return (image_prop.data_type != TYPE_FLOAT) ? ADDR_FMT_32 + : ADDR_FMT_32_FLOAT; + break; + case FMT_16_16: + return (image_prop.data_type != TYPE_FLOAT) ? ADDR_FMT_16_16 + : ADDR_FMT_16_16_FLOAT; + break; + case FMT_2_10_10_10: + return ADDR_FMT_2_10_10_10; + break; + case FMT_8_8_8_8: + return ADDR_FMT_8_8_8_8; + break; + case FMT_32_32: + return (image_prop.data_type != TYPE_FLOAT) ? ADDR_FMT_32_32 + : ADDR_FMT_32_32_FLOAT; + break; + case FMT_16_16_16_16: + return (image_prop.data_type != TYPE_FLOAT) ? ADDR_FMT_16_16_16_16 + : ADDR_FMT_16_16_16_16_FLOAT; + break; + case FMT_32_32_32_32: + return (image_prop.data_type != TYPE_FLOAT) ? ADDR_FMT_32_32_32_32 + : ADDR_FMT_32_32_32_32_FLOAT; + break; + case FMT_5_6_5: + return ADDR_FMT_5_6_5; + break; + case FMT_1_5_5_5: + return ADDR_FMT_1_5_5_5; + break; + case FMT_8_24: + return ADDR_FMT_8_24; + break; + default: + assert(false && "Should not reach here"); + return ADDR_FMT_INVALID; + break; + } + + assert(false && "Should not reach here"); + return ADDR_FMT_INVALID; +} + +VOID* ADDR_API + ImageManagerKv::AllocSysMem(const ADDR_ALLOCSYSMEM_INPUT* input) { + return malloc(input->sizeInBytes); +} + +ADDR_E_RETURNCODE ADDR_API + ImageManagerKv::FreeSysMem(const ADDR_FREESYSMEM_INPUT* input) { + free(input->pVirtAddr); + + return ADDR_OK; +} + +bool ImageManagerKv::GetAddrlibSurfaceInfo( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + Image::TileMode tileMode, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT& out) const { + const ImageProperty image_prop = + GetImageProperty(component, desc.format, desc.geometry); + + const AddrFormat addrlib_format = GetAddrlibFormat(image_prop); + + const uint32_t width = static_cast(desc.width); + const uint32_t height = static_cast(desc.height); + static const size_t kMinNumSlice = 1; + const uint32_t num_slice = static_cast( + std::max(kMinNumSlice, std::max(desc.array_size, desc.depth))); + + uint32_t major_ver = MajorVerFromDevID(chip_id_); + + if (major_ver >= 9) { + ADDR2_COMPUTE_SURFACE_INFO_INPUT in = {0}; + in.size = sizeof(ADDR2_COMPUTE_SURFACE_INFO_INPUT); + in.format = addrlib_format; + in.bpp = static_cast(image_prop.element_size) * 8; + in.width = width; + in.height = height; + in.numSlices = num_slice; + in.pitchInElement = image_data_row_pitch / image_prop.element_size; + switch(desc.geometry) { + case HSA_EXT_IMAGE_GEOMETRY_1D: + case HSA_EXT_IMAGE_GEOMETRY_1DB: + in.resourceType = ADDR_RSRC_TEX_1D; + break; + case HSA_EXT_IMAGE_GEOMETRY_2D: + case HSA_EXT_IMAGE_GEOMETRY_2DDEPTH: + case HSA_EXT_IMAGE_GEOMETRY_1DA: + in.resourceType = ADDR_RSRC_TEX_2D; + break; + case HSA_EXT_IMAGE_GEOMETRY_3D: + case HSA_EXT_IMAGE_GEOMETRY_2DA: + case HSA_EXT_IMAGE_GEOMETRY_2DADEPTH: + in.resourceType = ADDR_RSRC_TEX_3D; + break; + } + in.swizzleMode = (tileMode == Image::TileMode::LINEAR)? ADDR_SW_LINEAR : ADDR_SW_4KB; + in.flags.texture = 1; + + ADDR2_GET_PREFERRED_SURF_SETTING_INPUT prefSettingsInput = { 0 }; + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT prefSettingsOutput = { 0 }; + + prefSettingsInput.size = sizeof(prefSettingsInput); + prefSettingsInput.flags = in.flags; + prefSettingsInput.bpp = in.bpp; + prefSettingsInput.format = in.format; + prefSettingsInput.width = in.width; + prefSettingsInput.height = in.height; + prefSettingsInput.numFrags = in.numFrags; + prefSettingsInput.numSamples = in.numSamples; + prefSettingsInput.numMipLevels = in.numMipLevels; + prefSettingsInput.numSlices = in.numSlices; + prefSettingsInput.resourceLoction = ADDR_RSRC_LOC_UNDEF; + prefSettingsInput.resourceType = in.resourceType; + + if (tileMode == Image::TileMode::LINEAR) + { + // this should force linear. + prefSettingsInput.forbiddenBlock.macroThin4KB = 1; + prefSettingsInput.forbiddenBlock.macroThick4KB = 1; + prefSettingsInput.forbiddenBlock.macroThin64KB = 1; + prefSettingsInput.forbiddenBlock.macroThick64KB = 1; + } + else + { + // this should not allow linear. + prefSettingsInput.forbiddenBlock.linear = 1; + } + + prefSettingsInput.forbiddenBlock.micro = 1; // but don't ever allow the 256b swizzle modes + prefSettingsInput.forbiddenBlock.var = 1; // and don't allow variable-size block modes + + if (ADDR_OK != Addr2GetPreferredSurfaceSetting(addr_lib_, &prefSettingsInput, &prefSettingsOutput)) { + return false; + } + + in.swizzleMode = prefSettingsOutput.swizzleMode; + + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT out2 = {0}; + out.size = sizeof(ADDR2_COMPUTE_SURFACE_INFO_OUTPUT); + if (ADDR_OK != Addr2ComputeSurfaceInfo(addr_lib_, &in, &out2)) { + return false; + } + out.pitch = out2.pitch; + out.height = out2.height; + out.surfSize = out2.surfSize; + out.bpp = out2.bpp; + out.baseAlign = out2.baseAlign; + out.tileIndex = in.swizzleMode; + out.sliceSize = out2.sliceSize; + return true; + } + + ADDR_COMPUTE_SURFACE_INFO_INPUT in = {0}; + in.size = sizeof(ADDR_COMPUTE_SURFACE_INFO_INPUT); + in.tileMode = (tileMode == Image::TileMode::LINEAR)? + ADDR_TM_LINEAR_ALIGNED : ADDR_TM_2D_TILED_THIN1; + in.format = addrlib_format; + in.bpp = static_cast(image_prop.element_size) * 8; + in.numSamples = 1; + in.width = width; + in.height = height; + in.numSlices = num_slice; + in.flags.texture = 1; + in.flags.noStencil = 1; + in.flags.opt4Space = 0; + in.tileType = ADDR_NON_DISPLAYABLE; + in.tileIndex = -1; + + if (image_data_row_pitch != 0) { + in.width = image_data_row_pitch / image_prop.element_size; +// in.pitchAlign = image_data_row_pitch / image_prop.element_size; +// in.heightAlign = image_data_slice_pitch / image_data_row_pitch; + } + + if (ADDR_OK != AddrComputeSurfaceInfo(addr_lib_, &in, &out)) { + return false; + } + + assert(out.tileIndex != -1); + + return (out.tileIndex != -1) ? true : false; +} + +size_t ImageManagerKv::CalWorkingSizeBytes(hsa_ext_image_geometry_t geometry, + hsa_dim3_t size_pixel, + uint32_t element_size) const { + switch (geometry) { + case HSA_EXT_IMAGE_GEOMETRY_1D: + case HSA_EXT_IMAGE_GEOMETRY_1DB: + return size_pixel.x * element_size; + case HSA_EXT_IMAGE_GEOMETRY_2D: + case HSA_EXT_IMAGE_GEOMETRY_2DDEPTH: + case HSA_EXT_IMAGE_GEOMETRY_1DA: + return size_pixel.x * size_pixel.y * element_size; + default: + return size_pixel.x * size_pixel.y * size_pixel.z * element_size; + } +} + +BlitQueue& ImageManagerKv::BlitQueueInit() { + if (blit_queue_.queue_ == NULL) { + // Queue is a precious resource, so only create it when it is needed. + std::lock_guard lock(lock_); + if (blit_queue_.queue_ == NULL) { + // Create the kernel queue. + blit_queue_.cached_index_ = 0; + + uint32_t max_queue_size = 0; + hsa_status_t status = hsa_agent_get_info( + agent_, HSA_AGENT_INFO_QUEUE_MAX_SIZE, &max_queue_size); + + status = + hsa_queue_create(agent_, max_queue_size, HSA_QUEUE_TYPE_MULTI, NULL, + NULL, UINT_MAX, UINT_MAX, &blit_queue_.queue_); + + if (HSA_STATUS_SUCCESS != status) { + blit_queue_.queue_ = NULL; + return blit_queue_; + } + + // Get the kernel handles. + status = ext_image::ImageRuntime::instance()->blit_kernel().BuildBlitCode( + agent_, blit_code_catalog_); + + if (HSA_STATUS_SUCCESS != status) { + blit_code_catalog_.clear(); + hsa_queue_destroy(blit_queue_.queue_); + blit_queue_.queue_ = NULL; + return blit_queue_; + } + } + } + + assert(blit_queue_.queue_ != NULL && + blit_code_catalog_.size() == BlitKernel::KERNEL_OP_COUNT); + + return blit_queue_; +} + +} // namespace diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_kv.h b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_kv.h new file mode 100755 index 0000000000..335e6044f5 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_kv.h @@ -0,0 +1,125 @@ +#ifndef HSA_RUNTIME_EXT_IMAGE_IMAGE_MANAGER_KV_H +#define HSA_RUNTIME_EXT_IMAGE_IMAGE_MANAGER_KV_H + +#include "addrlib/inc/addrinterface.h" +#include "blit_kernel.h" +#include "image_lut_kv.h" +#include "image_manager.h" + +namespace amd { + +class ImageManagerKv : public ImageManager { + public: + explicit ImageManagerKv(); + virtual ~ImageManagerKv(); + + virtual hsa_status_t Initialize(hsa_agent_t agent_handle); + + virtual void Cleanup(); + + /// @brief Retrieve device specific image property of a certain format + /// and geometry. + virtual ImageProperty GetImageProperty( + hsa_agent_t component, const hsa_ext_image_format_t& format, + hsa_ext_image_geometry_t geometry) const; + + /// @brief Retrieve device specific supported max width, height, depth, + /// and array size of an image geometry. + virtual void GetImageInfoMaxDimension(hsa_agent_t component, + hsa_ext_image_geometry_t geometry, + uint32_t& width, uint32_t& height, + uint32_t& depth, + uint32_t& array_size) const; + + /// @brief Calculate the size and alignment of the backing storage of an + /// image. + virtual hsa_status_t CalculateImageSizeAndAlignment( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, size_t image_data_slice_pitch, + hsa_ext_image_data_info_t& image_info) const; + + /// @brief Fill image structure with device specific image object. + virtual hsa_status_t PopulateImageSrd(Image& image) const; + + /// @brief Fill image structure with device specific image object using the given format. + virtual hsa_status_t PopulateImageSrd(Image& image, const metadata_amd_t* desc) const; + + /// @brief Modify device specific image object according to the specified + /// new format. + virtual hsa_status_t ModifyImageSrd(Image& image, + hsa_ext_image_format_t& new_format) const; + + /// @brief Fill sampler structure with device specific sampler object. + virtual hsa_status_t PopulateSamplerSrd(Sampler& sampler) const; + + // @brief Copy the content of a linear memory to an image object. + virtual hsa_status_t CopyBufferToImage( + const void* src_memory, size_t src_row_pitch, size_t src_slice_pitch, + const Image& dst_image, const hsa_ext_image_region_t& image_region); + + /// @brief Copy the content of an image object to a linear memory. + virtual hsa_status_t CopyImageToBuffer( + const Image& src_image, void* dst_memory, size_t dst_row_pitch, + size_t dst_slice_pitch, const hsa_ext_image_region_t& image_region); + + /// @brief Transfer images backing storage using agent copy. + virtual hsa_status_t CopyImage(const Image& dst_image, const Image& src_image, + const hsa_dim3_t& dst_origin, + const hsa_dim3_t& src_origin, + const hsa_dim3_t size); + + /// @brief Fill image backing storage using agent copy. + virtual hsa_status_t FillImage(const Image& image, const void* pattern, + const hsa_ext_image_region_t& region); + + protected: + static hsa_status_t GetLocalMemoryRegion(hsa_region_t region, void* data); + + static AddrFormat GetAddrlibFormat(const ImageProperty& image_prop); + + static VOID* ADDR_API AllocSysMem(const ADDR_ALLOCSYSMEM_INPUT* input); + + static ADDR_E_RETURNCODE ADDR_API + FreeSysMem(const ADDR_FREESYSMEM_INPUT* input); + + bool GetAddrlibSurfaceInfo(hsa_agent_t component, + const hsa_ext_image_descriptor_t& desc, + Image::TileMode tileMode, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT& out) const; + + size_t CalWorkingSizeBytes(hsa_ext_image_geometry_t geometry, + hsa_dim3_t size_pixel, + uint32_t element_size) const; + + virtual bool IsLocalMemory(const void* address) const; + + BlitQueue& BlitQueueInit(); + + ImageLutKv image_lut_; + + ADDR_HANDLE addr_lib_; + + hsa_agent_t agent_; + + uint32_t family_type_; + + uint32_t chip_id_; + + BlitQueue blit_queue_; + + std::vector blit_code_catalog_; + + uint32_t mtype_; + + uintptr_t local_memory_base_address_; + + std::mutex lock_; + + private: + DISALLOW_COPY_AND_ASSIGN(ImageManagerKv); +}; +} +#endif // HSA_RUNTIME_EXT_IMAGE_IMAGE_MANAGER_KV_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_nv.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_nv.cpp new file mode 100755 index 0000000000..ae2fa8812a --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_nv.cpp @@ -0,0 +1,746 @@ +#define NOMINMAX +#include "image_manager_nv.h" + +#include + +#include +#include + +#include "inc/hsa_ext_amd.h" +#include "addrlib/src/core/addrlib.h" +#include "image_runtime.h" +#include "resource.h" +#include "resource_nv.h" +#include "util.h" +#include "device_info.h" + +namespace amd { + +//----------------------------------------------------------------------------- +// Workaround switch to combined format/type codes and missing gfx10 +// specific look up table. Only covers types used in image_lut_kv.cpp. +//----------------------------------------------------------------------------- +struct formatconverstion_t { + FMT fmt; + type type; + FORMAT format; +}; + +// Format/Type to combined format code table. +// Sorted and indexed to allow fast searches. +static const formatconverstion_t FormatLUT[] = { + {FMT_1_5_5_5, TYPE_UNORM, CFMT_1_5_5_5_UNORM}, + {FMT_10_10_10_2, TYPE_UNORM, CFMT_10_10_10_2_UNORM}, + {FMT_10_10_10_2, TYPE_SNORM, CFMT_10_10_10_2_SNORM}, + {FMT_10_10_10_2, TYPE_UINT, CFMT_10_10_10_2_UINT}, + {FMT_10_10_10_2, TYPE_SINT, CFMT_10_10_10_2_SINT}, + {FMT_16, TYPE_UNORM, CFMT_16_UNORM}, + {FMT_16, TYPE_SNORM, CFMT_16_SNORM}, + {FMT_16, TYPE_UINT, CFMT_16_UINT}, + {FMT_16, TYPE_SINT, CFMT_16_SINT}, + {FMT_16, TYPE_FLOAT, CFMT_16_FLOAT}, + {FMT_16_16, TYPE_UNORM, CFMT_16_16_UNORM}, + {FMT_16_16, TYPE_SNORM, CFMT_16_16_SNORM}, + {FMT_16_16, TYPE_UINT, CFMT_16_16_UINT}, + {FMT_16_16, TYPE_SINT, CFMT_16_16_SINT}, + {FMT_16_16, TYPE_FLOAT, CFMT_16_16_FLOAT}, + {FMT_16_16_16_16, TYPE_UNORM, CFMT_16_16_16_16_UNORM}, + {FMT_16_16_16_16, TYPE_SNORM, CFMT_16_16_16_16_SNORM}, + {FMT_16_16_16_16, TYPE_UINT, CFMT_16_16_16_16_UINT}, + {FMT_16_16_16_16, TYPE_SINT, CFMT_16_16_16_16_SINT}, + {FMT_16_16_16_16, TYPE_FLOAT, CFMT_16_16_16_16_FLOAT}, + {FMT_2_10_10_10, TYPE_UNORM, CFMT_2_10_10_10_UNORM}, + {FMT_2_10_10_10, TYPE_SNORM, CFMT_2_10_10_10_SNORM}, + {FMT_2_10_10_10, TYPE_UINT, CFMT_2_10_10_10_UINT}, + {FMT_2_10_10_10, TYPE_SINT, CFMT_2_10_10_10_SINT}, + {FMT_24_8, TYPE_UNORM, CFMT_24_8_UNORM}, + {FMT_24_8, TYPE_UINT, CFMT_24_8_UINT}, + {FMT_32, TYPE_UINT, CFMT_32_UINT}, + {FMT_32, TYPE_SINT, CFMT_32_SINT}, + {FMT_32, TYPE_FLOAT, CFMT_32_FLOAT}, + {FMT_32_32, TYPE_UINT, CFMT_32_32_UINT}, + {FMT_32_32, TYPE_SINT, CFMT_32_32_SINT}, + {FMT_32_32, TYPE_FLOAT, CFMT_32_32_FLOAT}, + {FMT_32_32_32, TYPE_UINT, CFMT_32_32_32_UINT}, + {FMT_32_32_32, TYPE_SINT, CFMT_32_32_32_SINT}, + {FMT_32_32_32, TYPE_FLOAT, CFMT_32_32_32_FLOAT}, + {FMT_32_32_32_32, TYPE_UINT, CFMT_32_32_32_32_UINT}, + {FMT_32_32_32_32, TYPE_SINT, CFMT_32_32_32_32_SINT}, + {FMT_32_32_32_32, TYPE_FLOAT, CFMT_32_32_32_32_FLOAT}, + {FMT_5_5_5_1, TYPE_UNORM, CFMT_5_5_5_1_UNORM}, + {FMT_5_6_5, TYPE_UNORM, CFMT_5_6_5_UNORM}, + {FMT_8, TYPE_UNORM, CFMT_8_UNORM}, + {FMT_8, TYPE_SNORM, CFMT_8_SNORM}, + {FMT_8, TYPE_UINT, CFMT_8_UINT}, + {FMT_8, TYPE_SINT, CFMT_8_SINT}, + {FMT_8, TYPE_SRGB, CFMT_8_SRGB}, + {FMT_8_24, TYPE_UNORM, CFMT_8_24_UNORM}, + {FMT_8_24, TYPE_UINT, CFMT_8_24_UINT}, + {FMT_8_8, TYPE_UNORM, CFMT_8_8_UNORM}, + {FMT_8_8, TYPE_SNORM, CFMT_8_8_SNORM}, + {FMT_8_8, TYPE_UINT, CFMT_8_8_UINT}, + {FMT_8_8, TYPE_SINT, CFMT_8_8_SINT}, + {FMT_8_8, TYPE_SRGB, CFMT_8_8_SRGB}, + {FMT_8_8_8_8, TYPE_UNORM, CFMT_8_8_8_8_UNORM}, + {FMT_8_8_8_8, TYPE_SNORM, CFMT_8_8_8_8_SNORM}, + {FMT_8_8_8_8, TYPE_UINT, CFMT_8_8_8_8_UINT}, + {FMT_8_8_8_8, TYPE_SINT, CFMT_8_8_8_8_SINT}, + {FMT_8_8_8_8, TYPE_SRGB, CFMT_8_8_8_8_SRGB} +}; +static const int FormatLUTSize = sizeof(FormatLUT)/sizeof(formatconverstion_t); + +//Index in FormatLUT to start search, indexed by FMT enum. +static const int FormatEntryPoint[] = { + 57, + 40, + 5, + 47, + 26, + 10, + 57, + 57, + 1, + 20, + 52, + 29, + 15, + 32, + 35, + 57, + 39, + 0, + 38, + 57, + 45, + 24 +}; + +static FORMAT GetCombinedFormat(uint8_t fmt, uint8_t type) { + assert(fmt < sizeof(FormatEntryPoint)/sizeof(int) && "FMT out of range."); + int start = FormatEntryPoint[fmt]; + int stop = std::min(start + 6, FormatLUTSize); // Only 6 types are used in image_kv_lut.cpp + + for(int i=start; i> 3) * out.pitch; + size_t slicePitch = rowPitch * out.height; + if (desc.geometry != HSA_EXT_IMAGE_GEOMETRY_1DB && + image_data_layout == HSA_EXT_IMAGE_DATA_LAYOUT_LINEAR && + ((image_data_row_pitch && (rowPitch != image_data_row_pitch)) || + (image_data_slice_pitch && (slicePitch != image_data_slice_pitch)))) { + return static_cast( + HSA_EXT_STATUS_ERROR_IMAGE_PITCH_UNSUPPORTED); + } + + image_info.size = out.surfSize; + assert(image_info.size != 0); + image_info.alignment = out.baseAlign; + assert(image_info.alignment != 0); + + return HSA_STATUS_SUCCESS; +} + +bool ImageManagerNv::IsLocalMemory(const void* address) const { + return true; +} + +hsa_status_t ImageManagerNv::PopulateImageSrd(Image& image, + const metadata_amd_t* descriptor) const { + const metadata_amd_nv_t* desc = + reinterpret_cast(descriptor); + bool atc_access = true; + const void* image_data_addr = image.data; + + ImageProperty image_prop = + image_lut_.MapFormat(image.desc.format, image.desc.geometry); + if ((image_prop.cap == HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED) || + (image_prop.element_size == 0)) + return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED; + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + + if (IsLocalMemory(image.data)) { + atc_access = false; + image_data_addr = reinterpret_cast( + reinterpret_cast(image.data) - local_memory_base_address_); + } + + image.srd[0] = desc->word0.u32All; + image.srd[1] = desc->word1.u32All; + image.srd[2] = desc->word2.u32All; + image.srd[3] = desc->word3.u32All; + image.srd[4] = desc->word4.u32All; + image.srd[5] = desc->word5.u32All; + image.srd[6] = desc->word6.u32All; + image.srd[7] = desc->word7.u32All; + + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + SQ_BUF_RSRC_WORD0 word0; + SQ_BUF_RSRC_WORD1 word1; + SQ_BUF_RSRC_WORD2 word2; + SQ_BUF_RSRC_WORD3 word3; + + word0.val = 0; + word0.f.BASE_ADDRESS = ext_image::PtrLow32(image_data_addr); + + word1.val = image.srd[1]; + word1.f.BASE_ADDRESS_HI = ext_image::PtrHigh32(image_data_addr); + word1.f.STRIDE = image_prop.element_size; + + word3.val = image.srd[3]; + word3.f.DST_SEL_X = swizzle.x; + word3.f.DST_SEL_Y = swizzle.y; + word3.f.DST_SEL_Z = swizzle.z; + word3.f.DST_SEL_W = swizzle.w; + + word3.f.FORMAT = GetCombinedFormat(image_prop.data_format, image_prop.data_type); + word3.f.INDEX_STRIDE = image_prop.element_size; + + image.srd[0] = word0.val; + image.srd[1] = word1.val; + image.srd[3] = word3.val; + } else { + uint32_t hwPixelSize = image_lut_.GetPixelSize(image_prop.data_format, image_prop.data_type); + + if (image_prop.element_size != hwPixelSize) { + return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED; + } + reinterpret_cast(&image.srd[0])->bits.BASE_ADDRESS = + ext_image::PtrLow40Shift8(image_data_addr); + reinterpret_cast(&image.srd[1])->bits.BASE_ADDRESS_HI + = ext_image::PtrHigh64Shift40(image_data_addr); + reinterpret_cast(&image.srd[1])->bits.FORMAT = GetCombinedFormat(image_prop.data_format, image_prop.data_type); + reinterpret_cast(&image.srd[3])->bits.DST_SEL_X = + swizzle.x; + reinterpret_cast(&image.srd[3])->bits.DST_SEL_Y = + swizzle.y; + reinterpret_cast(&image.srd[3])->bits.DST_SEL_Z = + swizzle.z; + reinterpret_cast(&image.srd[3])->bits.DST_SEL_W = + swizzle.w; + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DA || + image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1D) { + reinterpret_cast(&image.srd[3])->bits.TYPE = + image_lut_.MapGeometry(image.desc.geometry); + } + + // Imported metadata holds the offset to metadata, add the image base address. + uintptr_t meta = uintptr_t(((SQ_IMG_RSRC_WORD7*)(&image.srd[7]))->bits.META_DATA_ADDRESS_HI) << 16; + meta |= uintptr_t(((SQ_IMG_RSRC_WORD6*)(&image.srd[6]))->bits.META_DATA_ADDRESS) << 8; + meta += reinterpret_cast(image_data_addr); + + ((SQ_IMG_RSRC_WORD6*)(&image.srd[6]))->bits.META_DATA_ADDRESS = ext_image::PtrLow16Shift8((void*)meta); + ((SQ_IMG_RSRC_WORD7*)(&image.srd[7]))->bits.META_DATA_ADDRESS_HI = ext_image::PtrHigh64Shift16((void*)meta); + } + // Looks like this is only used for CPU copies. + image.row_pitch = 0; + image.slice_pitch = 0; + + // Used by HSAIL shader ABI + image.srd[8] = image.desc.format.channel_type; + image.srd[9] = image.desc.format.channel_order; + image.srd[10] = static_cast(image.desc.width); + + return HSA_STATUS_SUCCESS; +} + +static TEX_BC_SWIZZLE GetBcSwizzle(const Swizzle& swizzle) { + SEL r = (SEL)swizzle.x; + SEL g = (SEL)swizzle.y; + SEL b = (SEL)swizzle.z; + SEL a = (SEL)swizzle.w; + + TEX_BC_SWIZZLE bcSwizzle = TEX_BC_Swizzle_XYZW; + + if (a == SEL_X) { + // Have to use either TEX_BC_Swizzle_WZYX or TEX_BC_Swizzle_WXYZ + // + // For the pre-defined border color values (white, opaque black, + // transparent black), the only thing that matters is that the alpha + // channel winds up in the correct place (because the RGB channels are + // all the same) so either of these TEX_BC_Swizzle enumerations will + // work. Not sure what happens with border color palettes. + if (b == SEL_Y) { + // ABGR + bcSwizzle = TEX_BC_Swizzle_WZYX; + } else if ((r == SEL_X) && (g == SEL_X) && (b == SEL_X)) { + // RGBA + bcSwizzle = TEX_BC_Swizzle_XYZW; + } else { + // ARGB + bcSwizzle = TEX_BC_Swizzle_WXYZ; + } + } else if (r == SEL_X) { + // Have to use either TEX_BC_Swizzle_XYZW or TEX_BC_Swizzle_XWYZ + if (g == SEL_Y) { + // RGBA + bcSwizzle = TEX_BC_Swizzle_XYZW; + } else if ((g == SEL_X) && (b == SEL_X) && (a == SEL_W)) { + // RGBA + bcSwizzle = TEX_BC_Swizzle_XYZW; + } else { + // RAGB + bcSwizzle = TEX_BC_Swizzle_XWYZ; + } + } else if (g == SEL_X) { + // GRAB, have to use TEX_BC_Swizzle_YXWZ + bcSwizzle = TEX_BC_Swizzle_YXWZ; + } else if (b == SEL_X) { + // BGRA, have to use TEX_BC_Swizzle_ZYXW + bcSwizzle = TEX_BC_Swizzle_ZYXW; + } + + return bcSwizzle; +} + + +hsa_status_t ImageManagerNv::PopulateImageSrd(Image& image) const { + ImageProperty image_prop = + image_lut_.MapFormat(image.desc.format, image.desc.geometry); + assert(image_prop.cap != HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED); + assert(image_prop.element_size != 0); + + bool atc_access = true; + const void* image_data_addr = image.data; + + if (IsLocalMemory(image.data)) { + atc_access = false; + image_data_addr = reinterpret_cast( + reinterpret_cast(image.data) - local_memory_base_address_); + } + + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + SQ_BUF_RSRC_WORD0 word0; + SQ_BUF_RSRC_WORD1 word1; + SQ_BUF_RSRC_WORD2 word2; + SQ_BUF_RSRC_WORD3 word3; + + word0.val = 0; + word0.f.BASE_ADDRESS = ext_image::PtrLow32(image_data_addr); + + word1.val = 0; + word1.f.BASE_ADDRESS_HI = ext_image::PtrHigh32(image_data_addr); + word1.f.STRIDE = image_prop.element_size; + word1.f.SWIZZLE_ENABLE = false; + word1.f.CACHE_SWIZZLE = false; + + word2.f.NUM_RECORDS = image.desc.width * image_prop.element_size; + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + word3.val = 0; + word3.f.RESOURCE_LEVEL = 1; + word3.f.DST_SEL_X = swizzle.x; + word3.f.DST_SEL_Y = swizzle.y; + word3.f.DST_SEL_Z = swizzle.z; + word3.f.DST_SEL_W = swizzle.w; + word3.f.FORMAT = GetCombinedFormat(image_prop.data_format, image_prop.data_type); + word3.f.INDEX_STRIDE = image_prop.element_size; + word3.f.TYPE = image_lut_.MapGeometry(image.desc.geometry); + + image.srd[0] = word0.val; + image.srd[1] = word1.val; + image.srd[2] = word2.val; + image.srd[3] = word3.val; + + image.row_pitch = image.desc.width * image_prop.element_size; + image.slice_pitch = image.row_pitch; + } else { + SQ_IMG_RSRC_WORD0 word0; + SQ_IMG_RSRC_WORD1 word1; + SQ_IMG_RSRC_WORD2 word2; + SQ_IMG_RSRC_WORD3 word3; + SQ_IMG_RSRC_WORD4 word4; + SQ_IMG_RSRC_WORD5 word5; + SQ_IMG_RSRC_WORD5 word6; + SQ_IMG_RSRC_WORD5 word7; + + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT out = {0}; + + uint32_t swizzleMode = GetAddrlibSurfaceInfoNv( + image.component, image.desc, image.tile_mode, + image.row_pitch, image.slice_pitch, out); + if (swizzleMode == (uint32_t)(-1)) { + return HSA_STATUS_ERROR; + } + + assert((out.bpp / 8) == image_prop.element_size); + + const size_t row_pitch_size = out.pitch * image_prop.element_size; + + word0.f.BASE_ADDRESS = ext_image::PtrLow40Shift8(image_data_addr); + + word1.val = 0; + word1.f.BASE_ADDRESS_HI = ext_image::PtrHigh64Shift40(image_data_addr); + word1.f.MIN_LOD = 0; + word1.f.FORMAT = GetCombinedFormat(image_prop.data_format, image_prop.data_type); + // Only take the lowest 2 bits of (image.desc.width - 1) + word1.f.WIDTH = ext_image::BitSelect<0, 1>(image.desc.width - 1); + + word2.val = 0; + // Take the high 12 bits of (image.desc.width - 1) + word2.f.WIDTH_HI = ext_image::BitSelect<2, 13>(image.desc.width - 1); + word2.f.HEIGHT = image.desc.height ? image.desc.height - 1 : 0; + word2.f.RESOURCE_LEVEL = 1; + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + word3.val = 0; + word3.f.DST_SEL_X = swizzle.x; + word3.f.DST_SEL_Y = swizzle.y; + word3.f.DST_SEL_Z = swizzle.z; + word3.f.DST_SEL_W = swizzle.w; + word3.f.SW_MODE = swizzleMode; + word3.f.BC_SWIZZLE = GetBcSwizzle(swizzle); + word3.f.TYPE = image_lut_.MapGeometry(image.desc.geometry); + + const bool image_array = + (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DA || + image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_2DA || + image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_2DADEPTH); + const bool image_3d = (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_3D); + + word4.val = 0; + word4.f.DEPTH = + (image_array) // Doesn't hurt but isn't array_size already >0? + ? std::max(image.desc.array_size, static_cast(1)) - 1 + : (image_3d) ? image.desc.depth - 1 : out.pitch - 1; + + word5.val = 0; + word6.val = 0; + word7.val = 0; + + image.srd[0] = word0.val; + image.srd[1] = word1.val; + image.srd[2] = word2.val; + image.srd[3] = word3.val; + image.srd[4] = word4.val; + image.srd[5] = word5.val; + image.srd[6] = word6.val; + image.srd[7] = word7.val; + + image.row_pitch = row_pitch_size; + image.slice_pitch = out.sliceSize; + } + + image.srd[8] = image.desc.format.channel_type; + image.srd[9] = image.desc.format.channel_order; + image.srd[10] = static_cast(image.desc.width); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageManagerNv::ModifyImageSrd( + Image& image, hsa_ext_image_format_t& new_format) const { + image.desc.format = new_format; + + ImageProperty image_prop = + image_lut_.MapFormat(image.desc.format, image.desc.geometry); + assert(image_prop.cap != HSA_EXT_IMAGE_CAPABILITY_NOT_SUPPORTED); + assert(image_prop.element_size != 0); + + if (image.desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + SQ_BUF_RSRC_WORD3* word3 = + reinterpret_cast(&image.srd[3]); + word3->bits.DST_SEL_X = swizzle.x; + word3->bits.DST_SEL_Y = swizzle.y; + word3->bits.DST_SEL_Z = swizzle.z; + word3->bits.DST_SEL_W = swizzle.w; + word3->bits.FORMAT = GetCombinedFormat(image_prop.data_format, image_prop.data_type); + } else { + SQ_IMG_RSRC_WORD1* word1 = + reinterpret_cast(&image.srd[1]); + word1->bits.FORMAT = GetCombinedFormat(image_prop.data_format, image_prop.data_type); + + const Swizzle swizzle = + image_lut_.MapSwizzle(image.desc.format.channel_order); + SQ_IMG_RSRC_WORD3* word3 = + reinterpret_cast(&image.srd[3]); + word3->bits.DST_SEL_X = swizzle.x; + word3->bits.DST_SEL_Y = swizzle.y; + word3->bits.DST_SEL_Z = swizzle.z; + word3->bits.DST_SEL_W = swizzle.w; + } + + image.srd[8] = image.desc.format.channel_type; + image.srd[9] = image.desc.format.channel_order; + image.srd[10] = static_cast(image.desc.width); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageManagerNv::PopulateSamplerSrd(amd::Sampler& sampler) const { + const hsa_ext_sampler_descriptor_t sampler_descriptor = sampler.desc; + + SQ_IMG_SAMP_WORD0 word0; + SQ_IMG_SAMP_WORD1 word1; + SQ_IMG_SAMP_WORD2 word2; + SQ_IMG_SAMP_WORD3 word3; + + word0.u32All = 0; + switch (sampler_descriptor.address_mode) { + case HSA_EXT_SAMPLER_ADDRESSING_MODE_CLAMP_TO_EDGE: + word0.bits.CLAMP_X = static_cast(SQ_TEX_CLAMP_LAST_TEXEL); + break; + case HSA_EXT_SAMPLER_ADDRESSING_MODE_CLAMP_TO_BORDER: + word0.bits.CLAMP_X = static_cast(SQ_TEX_CLAMP_BORDER); + break; + case HSA_EXT_SAMPLER_ADDRESSING_MODE_MIRRORED_REPEAT: + word0.bits.CLAMP_X = static_cast(SQ_TEX_MIRROR); + break; + case HSA_EXT_SAMPLER_ADDRESSING_MODE_UNDEFINED: + case HSA_EXT_SAMPLER_ADDRESSING_MODE_REPEAT: + word0.bits.CLAMP_X = static_cast(SQ_TEX_WRAP); + break; + default: + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + word0.bits.CLAMP_Y = word0.bits.CLAMP_X; + word0.bits.CLAMP_Z = word0.bits.CLAMP_X; + word0.bits.FORCE_UNNORMALIZED = (sampler_descriptor.coordinate_mode == + HSA_EXT_SAMPLER_COORDINATE_MODE_UNNORMALIZED); + + word1.u32All = 0; + word1.bits.MAX_LOD = 4095; + + word2.u32All = 0; + switch (sampler_descriptor.filter_mode) { + case HSA_EXT_SAMPLER_FILTER_MODE_NEAREST: + word2.bits.XY_MAG_FILTER = static_cast(SQ_TEX_XY_FILTER_POINT); + break; + case HSA_EXT_SAMPLER_FILTER_MODE_LINEAR: + word2.bits.XY_MAG_FILTER = static_cast(SQ_TEX_XY_FILTER_BILINEAR); + break; + default: + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + word2.bits.XY_MIN_FILTER = word2.bits.XY_MAG_FILTER; + word2.bits.Z_FILTER = SQ_TEX_Z_FILTER_NONE; + word2.bits.MIP_FILTER = SQ_TEX_MIP_FILTER_NONE; + + word3.u32All = 0; + + // TODO: check this bit with HSAIL spec. + word3.bits.BORDER_COLOR_TYPE = SQ_TEX_BORDER_COLOR_TRANS_BLACK; + + sampler.srd[0] = word0.u32All; + sampler.srd[1] = word1.u32All; + sampler.srd[2] = word2.u32All; + sampler.srd[3] = word3.u32All; + + return HSA_STATUS_SUCCESS; +} + +uint32_t ImageManagerNv::GetAddrlibSurfaceInfoNv( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + Image::TileMode tileMode, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT& out) const { + const ImageProperty image_prop = + GetImageProperty(component, desc.format, desc.geometry); + + const AddrFormat addrlib_format = GetAddrlibFormat(image_prop); + + const uint32_t width = static_cast(desc.width); + const uint32_t height = static_cast(desc.height); + static const size_t kMinNumSlice = 1; + const uint32_t num_slice = static_cast( + std::max(kMinNumSlice, std::max(desc.array_size, desc.depth))); + + ADDR2_COMPUTE_SURFACE_INFO_INPUT in = {0}; + in.size = sizeof(ADDR2_COMPUTE_SURFACE_INFO_INPUT); + in.format = addrlib_format; + in.bpp = static_cast(image_prop.element_size) * 8; + in.width = width; + in.height = height; + in.numSlices = num_slice; + switch (desc.geometry) { + case HSA_EXT_IMAGE_GEOMETRY_1D: + case HSA_EXT_IMAGE_GEOMETRY_1DB: + case HSA_EXT_IMAGE_GEOMETRY_1DA: + in.resourceType = ADDR_RSRC_TEX_1D; + break; + + case HSA_EXT_IMAGE_GEOMETRY_2D: + case HSA_EXT_IMAGE_GEOMETRY_2DDEPTH: + case HSA_EXT_IMAGE_GEOMETRY_2DA: + case HSA_EXT_IMAGE_GEOMETRY_2DADEPTH: + in.resourceType = ADDR_RSRC_TEX_2D; + break; + + case HSA_EXT_IMAGE_GEOMETRY_3D: + in.resourceType = ADDR_RSRC_TEX_3D; + break; + } + in.swizzleMode = + (tileMode == Image::TileMode::LINEAR)? ADDR_SW_LINEAR : ADDR_SW_4KB; + in.flags.texture = 1; + + ADDR2_GET_PREFERRED_SURF_SETTING_INPUT prefSettingsInput = { 0 }; + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT prefSettingsOutput = { 0 }; + + prefSettingsInput.size = sizeof(prefSettingsInput); + prefSettingsInput.flags = in.flags; + prefSettingsInput.bpp = in.bpp; + prefSettingsInput.format = in.format; + prefSettingsInput.width = in.width; + prefSettingsInput.height = in.height; + prefSettingsInput.numFrags = in.numFrags; + prefSettingsInput.numSamples = in.numSamples; + prefSettingsInput.numMipLevels = in.numMipLevels; + prefSettingsInput.numSlices = in.numSlices; + prefSettingsInput.resourceLoction = ADDR_RSRC_LOC_UNDEF; + prefSettingsInput.resourceType = in.resourceType; + + if (tileMode == Image::TileMode::LINEAR) { + // this should force linear. + prefSettingsInput.forbiddenBlock.macroThin4KB = 1; + prefSettingsInput.forbiddenBlock.macroThick4KB = 1; + prefSettingsInput.forbiddenBlock.macroThin64KB = 1; + prefSettingsInput.forbiddenBlock.macroThick64KB = 1; + prefSettingsInput.forbiddenBlock.micro = 1; + prefSettingsInput.forbiddenBlock.var = 1; + } else { + // this should not allow linear. + prefSettingsInput.forbiddenBlock.linear = 1; + // Debug setting, simplifies buffer alignment. + prefSettingsInput.forbiddenBlock.macroThin64KB = 1; + prefSettingsInput.forbiddenBlock.macroThick64KB = 1; + } + + // but don't ever allow the 256b swizzle modes + //prefSettingsInput.forbiddenBlock.micro = 1; + // and don't allow variable-size block modes + //prefSettingsInput.forbiddenBlock.var = 1; + + if (ADDR_OK != Addr2GetPreferredSurfaceSetting(addr_lib_, + &prefSettingsInput, &prefSettingsOutput)) { + return (uint32_t)(-1); + } + + in.swizzleMode = prefSettingsOutput.swizzleMode; + + out.size = sizeof(ADDR2_COMPUTE_SURFACE_INFO_OUTPUT); + if (ADDR_OK != Addr2ComputeSurfaceInfo(addr_lib_, &in, &out)) { + return (uint32_t)(-1); + } + if (out.surfSize == 0) { + return (uint32_t)(-1); + } + + return in.swizzleMode; +} + +hsa_status_t ImageManagerNv::FillImage(const Image& image, const void* pattern, + const hsa_ext_image_region_t& region) { + if (BlitQueueInit().queue_ == NULL) { + return HSA_STATUS_ERROR_OUT_OF_RESOURCES; + } + + Image* image_view = const_cast(&image); + + SQ_BUF_RSRC_WORD3* word3_buff = NULL; + SQ_IMG_RSRC_WORD3* word3_image = NULL; + uint32_t dst_sel_w_original = 0; + if (image_view->desc.format.channel_type == + HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_SHORT_101010) { + // Force GPU to ignore the last two bits (alpha bits). + if (image_view->desc.geometry == HSA_EXT_IMAGE_GEOMETRY_1DB) { + word3_buff = reinterpret_cast(&image_view->srd[3]); + dst_sel_w_original = word3_buff->bits.DST_SEL_W; + word3_buff->bits.DST_SEL_W = SEL_0; + } else { + word3_image = reinterpret_cast(&image_view->srd[3]); + dst_sel_w_original = word3_image->bits.DST_SEL_W; + word3_image->bits.DST_SEL_W = SEL_0; + } + } + + SQ_IMG_RSRC_WORD1* word1 = NULL; + uint32_t num_format_original = 0; + const void* new_pattern = pattern; + float fill_value[4] = {0}; + switch (image_view->desc.format.channel_order) { + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBA: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGB: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SRGBX: + case HSA_EXT_IMAGE_CHANNEL_ORDER_SBGRA: { + // KV and CZ don't have write support for SRGBA image, so convert pattern + // to standard form and treat the image as RGBA image. + const float* pattern_f = reinterpret_cast(pattern); + fill_value[0] = LinearToStandardRGB(pattern_f[0]); + fill_value[1] = LinearToStandardRGB(pattern_f[1]); + fill_value[2] = LinearToStandardRGB(pattern_f[2]); + fill_value[3] = pattern_f[3]; + new_pattern = fill_value; + + ImageProperty image_prop = image_lut_.MapFormat(image.desc.format, image.desc.geometry); + + word1 = reinterpret_cast(&image_view->srd[1]); + num_format_original = word1->bits.FORMAT; + word1->bits.FORMAT = GetCombinedFormat(image_prop.data_format, TYPE_UNORM); + } break; + default: + break; + } + + hsa_status_t status = + ext_image::ImageRuntime::instance()->blit_kernel().FillImage( + blit_queue_, blit_code_catalog_, *image_view, new_pattern, region); + + // Revert back original configuration. + if (word3_buff != NULL) { + word3_buff->bits.DST_SEL_W = dst_sel_w_original; + } + + if (word3_image != NULL) { + word3_image->bits.DST_SEL_W = dst_sel_w_original; + } + + if (word1 != NULL) { + word1->bits.FORMAT = num_format_original; + } + + return status; +} + +} // namespace amd diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_nv.h b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_nv.h new file mode 100755 index 0000000000..a06131ddbc --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_nv.h @@ -0,0 +1,53 @@ +#ifndef EXT_IMAGE_IMAGE_MANAGER_NV_H_ +#define EXT_IMAGE_IMAGE_MANAGER_NV_H_ + +#include "addrlib/inc/addrinterface.h" +#include "image_manager_kv.h" + +namespace amd { + +class ImageManagerNv : public ImageManagerKv { + public: + ImageManagerNv(); + virtual ~ImageManagerNv(); + + /// @brief Calculate the size and alignment of the backing storage of an + /// image. + virtual hsa_status_t CalculateImageSizeAndAlignment( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, size_t image_data_slice_pitch, + hsa_ext_image_data_info_t& image_info) const; + + /// @brief Fill image structure with device specific image object. + virtual hsa_status_t PopulateImageSrd(Image& image) const; + + /// @brief Fill image structure with device specific image object using the given format. + virtual hsa_status_t PopulateImageSrd(Image& image, const metadata_amd_t* desc) const; + + /// @brief Modify device specific image object according to the specified + /// new format. + virtual hsa_status_t ModifyImageSrd(Image& image, + hsa_ext_image_format_t& new_format) const; + + /// @brief Fill sampler structure with device specific sampler object. + virtual hsa_status_t PopulateSamplerSrd(Sampler& sampler) const; + + /// @brief Fill image backing storage using agent copy. + virtual hsa_status_t FillImage(const Image& image, const void* pattern, + const hsa_ext_image_region_t& region); + protected: + uint32_t GetAddrlibSurfaceInfoNv(hsa_agent_t component, + const hsa_ext_image_descriptor_t& desc, + Image::TileMode tileMode, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT& out) const; + + bool IsLocalMemory(const void* address) const; + + private: + DISALLOW_COPY_AND_ASSIGN(ImageManagerNv); +}; // namespace amd +} +#endif // EXT_IMAGE_IMAGE_MANAGER_NV_H_ diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_runtime.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/image_runtime.cpp new file mode 100755 index 0000000000..7c4ed4ef3a --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_runtime.cpp @@ -0,0 +1,543 @@ +#define NOMINMAX +#include "image_runtime.h" + +#include +#include +#include + +#include "resource.h" +#include "image_manager_kv.h" +#include "image_manager_ai.h" +#include "image_manager_nv.h" +#include "device_info.h" + +// Per library unload callback function. +extern "C" void (*UnloadCallback)(); + +namespace ext_image { +std::atomic ImageRuntime::instance_(NULL); +std::mutex ImageRuntime::instance_mutex_; + +hsa_status_t FindKernelArgPool(hsa_amd_memory_pool_t pool, void* data) { + if (NULL == data) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + hsa_status_t err; + hsa_amd_segment_t segment; + uint32_t flag; + + err = hsa_amd_memory_pool_get_info(pool, HSA_AMD_MEMORY_POOL_INFO_SEGMENT, + &segment); + assert(err == HSA_STATUS_SUCCESS); + + err = hsa_amd_memory_pool_get_info( + pool, HSA_AMD_MEMORY_POOL_INFO_GLOBAL_FLAGS, &flag); + + assert(err == HSA_STATUS_SUCCESS); + + if (HSA_AMD_SEGMENT_GLOBAL == segment && + (HSA_AMD_MEMORY_POOL_GLOBAL_FLAG_KERNARG_INIT & flag) == 1) { + *(reinterpret_cast(data)) = pool; + // Found the kernarg pool, stop the iteration. + return HSA_STATUS_INFO_BREAK; + } + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageRuntime::CreateImageManager(hsa_agent_t agent, void* data) { + ImageRuntime* runtime = reinterpret_cast(data); + + hsa_device_type_t hsa_device_type; + hsa_status_t hsa_error_code = + hsa_agent_get_info(agent, HSA_AGENT_INFO_DEVICE, &hsa_device_type); + if (hsa_error_code != HSA_STATUS_SUCCESS) { + return hsa_error_code; + } + + if (hsa_device_type == HSA_DEVICE_TYPE_GPU) { + + uint32_t chip_id; + hsa_error_code = GetGPUAsicID(agent, &chip_id); + uint32_t major_ver = MajorVerFromDevID(chip_id); + + amd::ImageManager* image_manager; + + if (major_ver >= 10) { + image_manager = new amd::ImageManagerNv(); + } else if (major_ver >= 9) { + image_manager = new amd::ImageManagerAi(); + } else { + image_manager = new amd::ImageManagerKv(); + } + hsa_error_code = image_manager->Initialize(agent); + + if (hsa_error_code != HSA_STATUS_SUCCESS) { + delete image_manager; + return hsa_error_code; + } + + runtime->image_managers_[agent.handle] = image_manager; + } else if (hsa_device_type == HSA_DEVICE_TYPE_CPU) { + uint32_t caches[4] = {0}; + hsa_error_code = + hsa_agent_get_info(agent, HSA_AGENT_INFO_CACHE_SIZE, caches); + + if (hsa_error_code != HSA_STATUS_SUCCESS) { + return hsa_error_code; + } + + runtime->cpu_l2_cache_size_ = caches[1]; + + hsa_error_code = hsa_amd_agent_iterate_memory_pools( + agent, FindKernelArgPool, &runtime->kernarg_pool_); + + if (hsa_error_code != HSA_STATUS_INFO_BREAK) { + return static_cast(HSA_STATUS_ERROR_INVALID_MEMORY_POOL); + } + + } + + return HSA_STATUS_SUCCESS; +} + +ImageRuntime* ImageRuntime::instance() { + ImageRuntime* instance = instance_.load(std::memory_order_acquire); + if (instance == NULL) { + // Protect the initialization from multi threaded access. + std::lock_guard lock(instance_mutex_); + + // Make sure we are not initializing it twice. + instance = instance_.load(std::memory_order_relaxed); + if (instance != NULL) { + return instance; + } + + instance = CreateSingleton(); + if (instance == NULL) { + return NULL; + } + + UnloadCallback = &ext_image::ImageRuntime::DestroySingleton; + } + + return instance; +} + +ImageRuntime* ImageRuntime::CreateSingleton() { + ImageRuntime* instance = new ImageRuntime(); + + if (HSA_STATUS_SUCCESS != instance->blit_kernel_.Initialize()) { + instance->Cleanup(); + delete instance; + return NULL; + } + + if (HSA_STATUS_SUCCESS != hsa_iterate_agents(CreateImageManager, instance)) { + instance->Cleanup(); + delete instance; + return NULL; + } + + assert(instance->image_managers_.size() != 0); + //assert(instance->cpu_l2_cache_size_ != 0); + + instance_.store(instance, std::memory_order_release); + return instance; +} + +void ImageRuntime::DestroySingleton() { + ImageRuntime* instance = instance_.load(std::memory_order_acquire); + if (instance == NULL) { + return; + } + + instance->Cleanup(); + + instance_.store(NULL, std::memory_order_release); + delete instance; +} + +hsa_status_t ImageRuntime::GetImageInfoMaxDimension(hsa_agent_t component, + hsa_agent_info_t attribute, + void* value) { + uint32_t* value_u32 = NULL; + uint32_t* value_u32_v2 = NULL; + uint32_t* value_u32_v3 = NULL; + + hsa_ext_image_geometry_t geometry; + + size_t image_attribute = static_cast(attribute); + switch (image_attribute) { + case HSA_EXT_AGENT_INFO_IMAGE_1D_MAX_ELEMENTS: + geometry = HSA_EXT_IMAGE_GEOMETRY_1D; + value_u32 = static_cast(value); + break; + case HSA_EXT_AGENT_INFO_IMAGE_1DA_MAX_ELEMENTS: + geometry = HSA_EXT_IMAGE_GEOMETRY_1DA; + value_u32 = static_cast(value); + break; + case HSA_EXT_AGENT_INFO_IMAGE_1DB_MAX_ELEMENTS: + geometry = HSA_EXT_IMAGE_GEOMETRY_1DB; + value_u32 = static_cast(value); + break; + case HSA_EXT_AGENT_INFO_IMAGE_2D_MAX_ELEMENTS: + geometry = HSA_EXT_IMAGE_GEOMETRY_2D; + value_u32_v2 = static_cast(value); + break; + case HSA_EXT_AGENT_INFO_IMAGE_2DA_MAX_ELEMENTS: + geometry = HSA_EXT_IMAGE_GEOMETRY_2DA; + value_u32_v2 = static_cast(value); + break; + case HSA_EXT_AGENT_INFO_IMAGE_2DDEPTH_MAX_ELEMENTS: + geometry = HSA_EXT_IMAGE_GEOMETRY_2DDEPTH; + value_u32_v2 = static_cast(value); + break; + case HSA_EXT_AGENT_INFO_IMAGE_2DADEPTH_MAX_ELEMENTS: + geometry = HSA_EXT_IMAGE_GEOMETRY_2DADEPTH; + value_u32_v2 = static_cast(value); + break; + case HSA_EXT_AGENT_INFO_IMAGE_3D_MAX_ELEMENTS: + geometry = HSA_EXT_IMAGE_GEOMETRY_3D; + value_u32_v3 = static_cast(value); + break; + case HSA_EXT_AGENT_INFO_IMAGE_ARRAY_MAX_LAYERS: + geometry = HSA_EXT_IMAGE_GEOMETRY_2DA; + value_u32 = static_cast(value); + break; + default: + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + uint32_t width = 0; + uint32_t height = 0; + uint32_t depth = 0; + uint32_t array_size = 0; + + hsa_device_type_t device_type; + hsa_status_t status = + hsa_agent_get_info(component, HSA_AGENT_INFO_DEVICE, &device_type); + if (status != HSA_STATUS_SUCCESS) { + return status; + } + + // Image is only supported on a GPU device. + + if (device_type == HSA_DEVICE_TYPE_GPU) { + image_manager(component)->GetImageInfoMaxDimension( + component, geometry, width, height, depth, array_size); + } + + if (value_u32_v3 != NULL) { + value_u32_v3[0] = width; + value_u32_v3[1] = height; + value_u32_v3[2] = depth; + } else if (value_u32_v2 != NULL) { + value_u32_v2[0] = width; + value_u32_v2[1] = height; + } else { + *value_u32 = (image_attribute == HSA_EXT_AGENT_INFO_IMAGE_ARRAY_MAX_LAYERS) + ? array_size + : width; + } + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageRuntime::GetImageCapability( + hsa_agent_t component, const hsa_ext_image_format_t& format, + hsa_ext_image_geometry_t geometry, uint32_t& capability) { + hsa_device_type_t device_type; + hsa_status_t status = + hsa_agent_get_info(component, HSA_AGENT_INFO_DEVICE, &device_type); + if (status != HSA_STATUS_SUCCESS) { + return status; + } + + if (device_type == HSA_DEVICE_TYPE_GPU) { + amd::ImageManager* manager = image_manager(component); + capability = manager->GetImageProperty(component, format, geometry).cap; + } else { + // Image is only supported on a GPU device. + capability = 0; + } + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageRuntime::GetImageSizeAndAlignment( + hsa_agent_t component, const hsa_ext_image_descriptor_t& desc, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + hsa_ext_image_data_info_t& image_info) { + image_info.alignment = 0; + image_info.size = 0; + + // Validate the image format and geometry. + uint32_t capability = 0; + hsa_status_t status = + GetImageCapability(component, desc.format, desc.geometry, capability); + if (status != HSA_STATUS_SUCCESS) { + return status; + } + + if (capability == 0) { + return static_cast( + HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED); + } + + const hsa_ext_image_geometry_t geometry = desc.geometry; + uint32_t max_width = 0; + uint32_t max_height = 0; + uint32_t max_depth = 0; + uint32_t max_array_size = 0; + + amd::ImageManager* manager = image_manager(component); + + // Validate the image dimension. + manager->GetImageInfoMaxDimension(component, geometry, max_width, max_height, + max_depth, max_array_size); + + if (desc.width > max_width || desc.height > max_height || + desc.depth > max_depth || desc.array_size > max_array_size) { + return static_cast( + HSA_EXT_STATUS_ERROR_IMAGE_SIZE_UNSUPPORTED); + } + + return manager->CalculateImageSizeAndAlignment(component, desc, + image_data_layout, image_data_row_pitch, image_data_slice_pitch, image_info); +} + +hsa_status_t ImageRuntime::CreateImageHandle( + hsa_agent_t component, const hsa_ext_image_descriptor_t& image_descriptor, + const void* image_data, const hsa_access_permission_t access_permission, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + hsa_ext_image_t& image_handle) { + image_handle.handle = 0; + + assert(image_data != NULL); + + // Validate image dimension. + hsa_ext_image_data_info_t image_info = {0}; + hsa_status_t status = + GetImageSizeAndAlignment(component, image_descriptor, + image_data_layout, image_data_row_pitch, image_data_slice_pitch, + image_info); + if (status != HSA_STATUS_SUCCESS) { + return status; + } + + // Validate image address alignment. + if (!IsMultipleOf(reinterpret_cast(image_data), + image_info.alignment)) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + amd::Image* image = amd::Image::Create(component); + image->component = component; + image->desc = image_descriptor; + image->permission = access_permission; + image->data = const_cast(image_data); + image->row_pitch = image_data_row_pitch; + image->slice_pitch = image_data_slice_pitch; + hsa_profile_t profile; + status = hsa_agent_get_info(component, HSA_AGENT_INFO_PROFILE, &profile); + + if (image_data_layout == HSA_EXT_IMAGE_DATA_LAYOUT_LINEAR) { + image->tile_mode = amd::Image::TileMode::LINEAR; + } else { + amd::Image::TileMode tileMode = (profile == HSA_PROFILE_BASE && + image_descriptor.geometry != HSA_EXT_IMAGE_GEOMETRY_1DB)? + amd::Image::TileMode::TILED : amd::Image::TileMode::LINEAR; + image->tile_mode = tileMode; + } + + image_manager(component)->PopulateImageSrd(*image); + + image_handle.handle = image->Convert(); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageRuntime::CreateImageHandleWithLayout( + hsa_agent_t component, const hsa_ext_image_descriptor_t& image_descriptor, + const hsa_amd_image_descriptor_t* image_layout, + const void* image_data, const hsa_access_permission_t access_permission, + hsa_ext_image_t& image_handle) +{ + if(!IsMultipleOf(image_data, 256)) + return HSA_STATUS_ERROR_INVALID_ALLOCATION; + + if(image_layout->version!=1) + return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED; + + uint32_t id; + hsa_agent_get_info(component, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_CHIP_ID, &id); + + if(image_layout->deviceID!=(0x1002<<16|id)) + return (hsa_status_t)HSA_EXT_STATUS_ERROR_IMAGE_FORMAT_UNSUPPORTED; + + const amd::metadata_amd_t* desc=reinterpret_cast(image_layout); + + amd::Image* image = amd::Image::Create(component); + image->component = component; + image->desc = image_descriptor; + image->permission = access_permission; + image->data = const_cast(image_data); + image->tile_mode=amd::Image::TILED; + hsa_status_t err=image_manager(component)->PopulateImageSrd(*image, desc); + if(err!=HSA_STATUS_SUCCESS) { + amd::Image::Destroy(image); + return err; + } + + image_handle.handle = image->Convert(); + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageRuntime::DestroyImageHandle( + const hsa_ext_image_t& image_handle) { + const amd::Image* image = amd::Image::Convert(image_handle.handle); + + if (image == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + amd::Image::Destroy(const_cast(image)); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageRuntime::CopyBufferToImage( + const void* src_memory, size_t src_row_pitch, size_t src_slice_pitch, + const hsa_ext_image_t& dst_image_handle, + const hsa_ext_image_region_t& image_region) { + const amd::Image* dst_image = amd::Image::Convert(dst_image_handle.handle); + + if (dst_image == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + amd::ImageManager* manager = image_manager(dst_image->component); + return manager->CopyBufferToImage(src_memory, src_row_pitch, src_slice_pitch, + *dst_image, image_region); +} + +hsa_status_t ImageRuntime::CopyImageToBuffer( + const hsa_ext_image_t& src_image_handle, void* dst_memory, + size_t dst_row_pitch, size_t dst_slice_pitch, + const hsa_ext_image_region_t& image_region) { + const amd::Image* src_image = amd::Image::Convert(src_image_handle.handle); + + if (src_image == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + amd::ImageManager* manager = image_manager(src_image->component); + return manager->CopyImageToBuffer(*src_image, dst_memory, dst_row_pitch, + dst_slice_pitch, image_region); +} + +hsa_status_t ImageRuntime::CopyImage(const hsa_ext_image_t& src_image_handle, + const hsa_ext_image_t& dst_image_handle, + const hsa_dim3_t& src_origin, + const hsa_dim3_t& dst_origin, + const hsa_dim3_t size) { + const amd::Image* src_image = amd::Image::Convert(src_image_handle.handle); + + if (src_image == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + const amd::Image* dst_image = amd::Image::Convert(dst_image_handle.handle); + + if (dst_image == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + if (src_image->component.handle != dst_image->component.handle) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + amd::ImageManager* manager = image_manager(src_image->component); + return manager->CopyImage(*dst_image, *src_image, dst_origin, src_origin, + size); +} + +hsa_status_t ImageRuntime::FillImage( + const hsa_ext_image_t& image_handle, const void* pattern, + const hsa_ext_image_region_t& image_region) { + const amd::Image* image = amd::Image::Convert(image_handle.handle); + + if (image == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + amd::ImageManager* manager = image_manager(image->component); + return manager->FillImage(*image, pattern, image_region); +} + +hsa_status_t ImageRuntime::CreateSamplerHandle( + hsa_agent_t component, + const hsa_ext_sampler_descriptor_t& sampler_descriptor, + hsa_ext_sampler_t& sampler_handle) { + sampler_handle.handle = 0; + + hsa_device_type_t device_type; + hsa_status_t status = + hsa_agent_get_info(component, HSA_AGENT_INFO_DEVICE, &device_type); + if (status != HSA_STATUS_SUCCESS) { + return status; + } + + // Sampler is only supported on a GPU device. + if (device_type != HSA_DEVICE_TYPE_GPU) { + return HSA_STATUS_ERROR_INVALID_AGENT; + } + + amd::Sampler* sampler = amd::Sampler::Create(component); + if (sampler == NULL) { + return HSA_STATUS_ERROR_OUT_OF_RESOURCES; + } + sampler->component = component; + sampler->desc = sampler_descriptor; + + image_manager(component)->PopulateSamplerSrd(*sampler); + + sampler_handle.handle = sampler->Convert(); + + return HSA_STATUS_SUCCESS; +} + +hsa_status_t ImageRuntime::DestroySamplerHandle( + hsa_ext_sampler_t& sampler_handle) { + const amd::Sampler* sampler = amd::Sampler::Convert(sampler_handle.handle); + + if (sampler == NULL) { + return HSA_STATUS_ERROR_INVALID_ARGUMENT; + } + + amd::Sampler::Destroy(sampler); + + return HSA_STATUS_SUCCESS; +} + +ImageRuntime::ImageRuntime() + : cpu_l2_cache_size_(0), kernarg_pool_({0}) {} + +ImageRuntime::~ImageRuntime() {} + +void ImageRuntime::Cleanup() { + std::map::iterator it; + for (it = image_managers_.begin(); it != image_managers_.end(); ++it) { + it->second->Cleanup(); + delete it->second; + } + + blit_kernel_.Cleanup(); +} + +} // namespace diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_runtime.h b/projects/rocr-runtime/runtime/hsa-runtime/image/image_runtime.h new file mode 100644 index 0000000000..a75ab6fb70 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_runtime.h @@ -0,0 +1,147 @@ +// AMD HSA image extension interface file. + +#ifndef HSA_RUNTIME_EXT_IMAGE_IMAGE_RUNTIME_H +#define HSA_RUNTIME_EXT_IMAGE_IMAGE_RUNTIME_H + +#include +#include +#include + +#include "inc/hsa.h" + +#undef HSA_API +#define HSA_API + +#include "inc/hsa_ext_image.h" +#include "inc/hsa_ext_amd.h" +#include "blit_kernel.h" +#include "image_manager.h" +#include "util.h" + +namespace ext_image { +class ImageRuntime { + public: + /// @brief Getter for the ImageRuntime singleton object. + static ImageRuntime* instance(); + + /// @brief Destroy singleton object. + static void DestroySingleton(); + + /// @brief Retrieve maximum size of width, height, depth, array size in pixels + /// for a particular geometry on a component. + hsa_status_t GetImageInfoMaxDimension(hsa_agent_t component, + hsa_agent_info_t attribute, + void* value); + + /// @brief Query image support with particular format and geometry. + hsa_status_t GetImageCapability(hsa_agent_t component, + const hsa_ext_image_format_t& format, + hsa_ext_image_geometry_t geometry, + uint32_t& capability); + + /// @brief Query the size and address alignment of the backing storage of + /// the image. + hsa_status_t GetImageSizeAndAlignment(hsa_agent_t component, + const hsa_ext_image_descriptor_t& desc, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + hsa_ext_image_data_info_t& image_info); + + /// @brief Create device image object and return its handle. + hsa_status_t CreateImageHandle( + hsa_agent_t component, const hsa_ext_image_descriptor_t& image_descriptor, + const void* image_data, const hsa_access_permission_t access_permission, + hsa_ext_image_data_layout_t image_data_layout, + size_t image_data_row_pitch, + size_t image_data_slice_pitch, + hsa_ext_image_t& image); + + /// @brief Create device image object and return its handle. + hsa_status_t CreateImageHandleWithLayout( + hsa_agent_t component, const hsa_ext_image_descriptor_t& image_descriptor, + const hsa_amd_image_descriptor_t* image_layout, + const void* image_data, const hsa_access_permission_t access_permission, + hsa_ext_image_t& image); + + /// @brief Destroy the device image object referenced by the handle. + hsa_status_t DestroyImageHandle(const hsa_ext_image_t& image); + + /// @brief Copy the content of a linear memory to an image object. + hsa_status_t CopyBufferToImage(const void* src_memory, size_t src_row_pitch, + size_t src_slice_pitch, + const hsa_ext_image_t& dst_image, + const hsa_ext_image_region_t& image_region); + + /// @brief Copy the content of an image object to a linear memory. + hsa_status_t CopyImageToBuffer(const hsa_ext_image_t& src_image, + void* dst_memory, size_t dst_row_pitch, + size_t dst_slice_pitch, + const hsa_ext_image_region_t& image_region); + + /// @brief Copy the content of an image object to another image object. + hsa_status_t CopyImage(const hsa_ext_image_t& src_image, + const hsa_ext_image_t& dst_image, + const hsa_dim3_t& src_origin, + const hsa_dim3_t& dst_origin, const hsa_dim3_t size); + + /// @brief Fill the content of an image object with a pattern. + hsa_status_t FillImage(const hsa_ext_image_t& image, const void* pattern, + const hsa_ext_image_region_t& image_region); + + /// @brief Create device sampler object and return its handle. + hsa_status_t CreateSamplerHandle( + hsa_agent_t component, + const hsa_ext_sampler_descriptor_t& sampler_descriptor, + hsa_ext_sampler_t& sampler); + + /// @brief Destroy the device sampler object referenced by the handle. + hsa_status_t DestroySamplerHandle(hsa_ext_sampler_t& sampler); + + amd::ImageManager* image_manager(hsa_agent_t agent) { + std::map::iterator it = + image_managers_.find(agent.handle); + return (it != image_managers_.end()) ? it->second : NULL; + } + + amd::BlitKernel& blit_kernel() { return blit_kernel_; } + + size_t cpu_l2_cache_size() const { return cpu_l2_cache_size_; } + + hsa_amd_memory_pool_t kernarg_pool() const { + return kernarg_pool_; + } + + private: + /// @brief Initialize singleton object, must be called once. + static ImageRuntime* CreateSingleton(); + + static hsa_status_t CreateImageManager(hsa_agent_t agent, void* data); + + ImageRuntime(); + + ~ImageRuntime(); + + void Cleanup(); + + /// Pointer to singleton object. + static std::atomic instance_; + + static std::mutex instance_mutex_; + + /// @brief Contains mapping of agent and its corresponding ::ImageManager + /// object. + std::map image_managers_; + + /// @brief Manages kernel for accessing images. + amd::BlitKernel blit_kernel_; + + size_t cpu_l2_cache_size_; + + hsa_amd_memory_pool_t kernarg_pool_; + + DISALLOW_COPY_AND_ASSIGN(ImageRuntime); +}; + +} // namespace +#endif // HSA_RUNTIME_EXT_IMAGE_IMAGE_RUNTIME_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/opencl_blit_objects.cpp_TC b/projects/rocr-runtime/runtime/hsa-runtime/image/opencl_blit_objects.cpp_TC new file mode 100644 index 0000000000..537675ea7b --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/opencl_blit_objects.cpp_TC @@ -0,0 +1,15466 @@ +//============================================================================== +// This file is automatically generated during build process, don't modify it +//============================================================================== + +#include + +uint32_t ocl_blit_object_gfx700[] = { + 0x464C457F,0x40010102,0x00000000,0x00000000,0x00E00003,0x00000001, + 0x00005000,0x00000000,0x00000040,0x00000000,0x00008D58,0x00000000, + 0x00000022,0x00380040,0x00400008,0x000B000D,0x00000006,0x00000004, + 0x00000040,0x00000000,0x00000040,0x00000000,0x00000040,0x00000000, + 0x000001C0,0x00000000,0x000001C0,0x00000000,0x00000008,0x00000000, + 0x00000001,0x00000004,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00004E80,0x00000000,0x00004E80,0x00000000, + 0x00001000,0x00000000,0x00000001,0x00000005,0x00005000,0x00000000, + 0x00005000,0x00000000,0x00005000,0x00000000,0x00002BC0,0x00000000, + 0x00002BC0,0x00000000,0x00001000,0x00000000,0x00000001,0x00000006, + 0x00008000,0x00000000,0x00008000,0x00000000,0x00008000,0x00000000, + 0x00000070,0x00000000,0x00000070,0x00000000,0x00001000,0x00000000, + 0x00000002,0x00000006,0x00008000,0x00000000,0x00008000,0x00000000, + 0x00008000,0x00000000,0x00000070,0x00000000,0x00000070,0x00000000, + 0x00000008,0x00000000,0x6474E552,0x00000004,0x00008000,0x00000000, + 0x00008000,0x00000000,0x00008000,0x00000000,0x00000070,0x00000000, + 0x00001000,0x00000000,0x00000001,0x00000000,0x6474E551,0x00000006, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 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0x00000000,0x00000000,0x00000000,0x00000000,0xC0480501,0xC0800710, + 0xBE8B03FF,0x0000FFFF,0xC086070C,0xBF8C007F,0xC0018714,0x87010B10, + 0x80048604,0x82058005,0x7E060204,0x7E080205,0xDC280000,0x03000003, + 0x93080108,0x87010B11,0x930A010A,0x4A000008,0x4A04040A,0x4A000000, + 0xBF8C007F,0x4A040403,0xD1080000,0x0002000C,0xBF8C0F70,0xD2D60003, + 0x00020609,0x4A020303,0x4A020202,0x7D08020D,0x87806A00,0x7D08040E, + 0x87806A00,0xBE822400,0xBF880012,0xC0840700,0xC0860704,0xC0880708, + 0xBF8C007F,0xC0C00900,0x4A06040E,0x4A0C0412,0x4A0A0211,0x4A04020D, + 0x4A080010,0x4A02000C,0xBF8C007F,0xF0005F00,0x00000001,0xC0C00B00, + 0xBF8C0070,0xF0205F00,0x00000004,0xBF810000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00070001,0x00000000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC0085,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x00150016, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0480501,0xC0800712,0xBE8B03FF,0x0000FFFF,0xC086070C,0xBF8C007F, + 0xC0018716,0x87010B10,0x80048604,0x82058005,0x7E060204,0x7E080205, + 0xDC280000,0x03000003,0x93080108,0x87010B11,0x930A010A,0x4A000008, + 0x4A04040A,0x4A000000,0xBF8C007F,0x4A040403,0xD1080000,0x0002000C, + 0xBF8C0F70,0xD2D60003,0x00020609,0x4A020303,0x4A020202,0x7D08020D, + 0x87806A00,0x7D08040E,0x87806A00,0xBE822400,0xBF880437,0xC0800700, + 0xC0880704,0xBF8C007F,0xC0C40100,0x4A0A0412,0x4A080211,0x4A060010, + 0xBF8C007F,0xF0005F00,0x00020303,0xBF8C0F70,0x7C0E0703,0x000E0680, + 0x7E0602F2,0x7C1C0EF2,0xBE80246A,0xBF88015A,0x7E060280,0x7C160E80, + 0xBE84246A,0xBF880155,0xBE8803FF,0x3B4D2E1C,0x7C160E08,0xBE88246A, + 0x8988087E,0xBF88014B,0xD3800103,0x00000107,0xBE8A03FF,0x3F2AAAAB, + 0x7C08060A,0xD2000008,0x01A90280,0x56061103,0x061406F2,0x7E1A550A, + 0x0816070A,0xD37E0109,0x00000107,0x0818170A,0x4C101109,0x061206F3, + 0x08061903,0x081616F2,0x0606070B,0x10161B09,0xB00CF000,0x361C160C, + 0x3620140C,0x1018170A,0x0822210A,0xD282000C,0x8432210E,0xD282000F, + 0x843A1B09,0x3E18230E,0x3E18210F,0x3E18230F,0x3E18070B,0xD2820003, + 0x0432170A,0xD282000A,0x240E170A,0x0814150C,0x08180709,0x081C1909, + 0x0806070E,0x08061503,0x0606070C,0x3E16070D,0xD2820009,0x242E1B09, + 0x7E100B08,0xD2820003,0x8426070D,0x3614160C,0x1012170B,0x0818150B, + 0xD2820009,0x8426150A,0x061A150A,0x3E12190D,0x3E12190C,0x101A070B, + 0x3E121AF4,0x361E100C,0x102210FF,0xBF317218,0xBE8A03FF,0x3F317000, + 0x3E120703,0x08201F08,0x3E221E0A,0xD282000D,0x0426170B,0x3E22200A, + 0xBE8A03FF,0x38060000,0x3E221E0A,0x36261A0C,0x10241B0B,0x3E22200A, + 0xD2820012,0x844A1513,0xD282000E,0x2436170B,0x08121D09,0x3E2210FF, + 0xB102E308,0xBE8A03FF,0x3F317218,0x0828270D,0x3E241913,0x3E241514, + 0xD282000F,0x0446100A,0x1014130B,0xD2820008,0x243C1508,0x3E241914, + 0x3E14070D,0x7E1C02FF,0x3E91F4C4,0x08101111,0xD2560011,0x00010303, + 0x0606250A,0x3E1C1AFF,0x3E76C4E1,0xD282000A,0x040E1B0B,0x421C1D0D, + 0x3ECCCDEF,0xD2560010,0x0001030B,0xD282000B,0x242A1B0B,0x08061703, + 0x36181C0C,0x10161D0D,0x0824190E,0xD282000B,0x842E1913,0x3E162513, + 0x3E161914,0x3E162514,0x3E161D09,0xD2820009,0x042E1D0D,0xD282000C, + 0x24261D0D,0x0816190B,0x061812FF,0x3F2AAAAA,0x061A18FF,0xBF2AAAAA, + 0x08121B09,0x061616FF,0x31739010,0x06121709,0x0616130C,0x0818190B, + 0x08121909,0x361A140C,0x3624160C,0x1018170A,0x0826250B,0xD282000C, + 0x8432250D,0x081C1B0A,0x3E18270D,0x3E18250E,0x10061703,0x3E18270E, + 0x3E06130A,0x06061903,0xD2820009,0x040E170A,0xD282000A,0x2426170A, + 0x08061503,0x06141310,0x0816210A,0x08121709,0x06060711,0x06060709, + 0x0612070A,0x08141509,0x08061503,0x0614130F,0x08161F0A,0x0818170A, + 0x08121709,0x0818190F,0x06160708,0x06121909,0x0818110B,0x081A190B, + 0x08101B08,0x08061903,0x06061103,0x0610130B,0x0612110A,0x08141509, + 0x08101508,0x06061103,0x06100709,0x08121308,0xBE8A03FF,0x3ED55555, + 0x08061303,0x3614100C,0x1012100A,0xBE8B03FF,0x3ED55000,0x08161508, + 0xD282000C,0x8424170A,0x3E18160B,0xBE8B03FF,0x382AA000,0x3E18140B, + 0x3E18160B,0x3E18060A,0xB00D0204,0xD2820003,0x0432100A,0xD110006A, + 0x00001B09,0xD2820008,0x240C1508,0x00061303,0x101206FF,0x3FB8AA3B, + 0x0810110C,0xD110000A,0x00001B03,0xD2000008,0x00290108,0x7E124709, + 0xBE8A03FF,0x3F317200,0xD282000A,0x240C1509,0x0816070A,0x0818170A, + 0x3E16120A,0x08181903,0x0816170C,0x06101708,0x0616110A,0x0814150B, + 0xBE8A03FF,0x35BFBC00,0x08101508,0xD282000A,0x242C1509,0x0816150B, + 0xD282000B,0x242C1509,0x06101708,0x0616110A,0x0814150B,0xBE8A03FF, + 0x2EA39EF3,0x08101508,0xD282000A,0x242C1509,0x0816150B,0xD282000B, + 0x242C1509,0x06101708,0x0616110A,0x361A160C,0x1018170B,0x0814150B, + 0x081C1B0B,0xD282000C,0x84321B0D,0x061A1B0D,0x3E181D0D,0x08101508, + 0x7E1402FF,0x3C091DE6,0x3E181D0E,0x101A110B,0x3E1416FF,0x3AB42872, + 0x3E181AF4,0x4214150B,0x3D2AADCC,0x3E181108,0x4214150B,0x3E2AAA47, + 0xD282000D,0x0432170B,0x4214150B,0x3EFFFFFC,0xD282000E,0x2436170B, + 0x08181D0C,0x361E1A0C,0x3622140C,0x101C1B0A,0x0824230A,0xD282000E, + 0x843A230F,0x08201F0D,0x3E1C250F,0x3E1C2310,0x3E1C2510,0x3E1C150C, + 0xD282000C,0x043A1B0A,0xD282000A,0x24321B0A,0x061A190B,0x0816170D, + 0x0814150E,0x0816170C,0x06101508,0x7E121109,0x0610110B,0x0610110D, + 0x061010F2,0xBE8A03FF,0x42B20000,0x56101308,0x7C1C060A,0x7E1202FF, + 0x7F800000,0xBE8A03FF,0xC2D00000,0x00101109,0x7C16060A,0xB00A03C0, + 0x00061080,0x7E1002FF,0x7FC00000,0xD110006A,0x00001507,0x00060708, + 0x7C1A0E80,0x00060680,0xD110006A,0x00001B07,0x00061303,0x360606FF, + 0x7FFFFFFF,0x7C100F07,0x00060F03,0x7C1A0EF2,0x001006F2,0x7E0602FF, + 0xBD6147AE,0x3E0610FF,0x3F870A3D,0xBE882508,0x89FE087E,0x10060EFF, + 0x414EB852,0x88FE047E,0x88FE007E,0x7C0E0904,0x000E0880,0x7E0802F2, + 0x7C1C0EF2,0xBE80246A,0xBF880159,0x7E080280,0x7C160E80,0x87FE6A7E, + 0xBF880155,0xBE8403FF,0x3B4D2E1C,0x7C160E04,0xBE84246A,0x8984047E, + 0xBF88014B,0xD3800104,0x00000107,0xBE8803FF,0x3F2AAAAB,0x7C080808, + 0xD2000008,0x01A90280,0x56081104,0x061408F2,0x7E1A550A,0x0816090A, + 0xD37E0109,0x00000107,0x0818170A,0x4C101109,0x061208F3,0x08081904, + 0x081616F2,0x0608090B,0x10161B09,0xB00AF000,0x361C160A,0x3620140A, + 0x1018170A,0x0822210A,0xD282000C,0x8432210E,0xD282000F,0x843A1B09, + 0x3E18230E,0x3E18210F,0x3E18230F,0x3E18090B,0xD2820004,0x0432170A, + 0xD282000A,0x2412170A,0x0814150C,0x08180909,0x081C1909,0x0808090E, + 0x08081504,0x0608090C,0x3E16090D,0xD2820009,0x242E1B09,0x7E100B08, + 0xD2820004,0x8426090D,0x3614160A,0x1012170B,0x0818150B,0xD2820009, + 0x8426150A,0x061A150A,0x3E12190D,0x3E12190C,0x101A090B,0x3E121AF4, + 0x361E100A,0x102210FF,0xBF317218,0xBE8803FF,0x3F317000,0x3E120904, + 0x08201F08,0x3E221E08,0xD282000D,0x0426170B,0x3E222008,0xBE8803FF, + 0x38060000,0x3E221E08,0x36261A0A,0x10241B0B,0x3E222008,0xD2820012, + 0x844A1513,0xD282000E,0x2436170B,0x08121D09,0x3E2210FF,0xB102E308, + 0xBE8803FF,0x3F317218,0x0828270D,0x3E241913,0x3E241514,0xD282000F, + 0x04461008,0x1014130B,0xD2820008,0x243C1108,0x3E241914,0x3E14090D, + 0x7E1C02FF,0x3E91F4C4,0x08101111,0xD2560011,0x00010304,0x0608250A, + 0x3E1C1AFF,0x3E76C4E1,0xD282000A,0x04121B0B,0x421C1D0D,0x3ECCCDEF, + 0xD2560010,0x0001030B,0xD282000B,0x242A1B0B,0x08081704,0x36181C0A, + 0x10161D0D,0x0824190E,0xD282000B,0x842E1913,0x3E162513,0x3E161914, + 0x3E162514,0x3E161D09,0xD2820009,0x042E1D0D,0xD282000C,0x24261D0D, + 0x0816190B,0x061812FF,0x3F2AAAAA,0x061A18FF,0xBF2AAAAA,0x08121B09, + 0x061616FF,0x31739010,0x06121709,0x0616130C,0x0818190B,0x08121909, + 0x361A140A,0x3624160A,0x1018170A,0x0826250B,0xD282000C,0x8432250D, + 0x081C1B0A,0x3E18270D,0x3E18250E,0x10081704,0x3E18270E,0x3E08130A, + 0x06081904,0xD2820009,0x0412170A,0xD282000A,0x2426170A,0x08081504, + 0x06141310,0x0816210A,0x08121709,0x06080911,0x06080909,0x0612090A, + 0x08141509,0x08081504,0x0614130F,0x08161F0A,0x0818170A,0x08121709, + 0x0818190F,0x06160908,0x06121909,0x0818110B,0x081A190B,0x08101B08, + 0x08081904,0x06081104,0x0610130B,0x0612110A,0x08141509,0x08101508, + 0x06081104,0x06100909,0x08121308,0xBE8803FF,0x3ED55555,0x08081304, + 0x3614100A,0x10121008,0xBE8903FF,0x3ED55000,0x08161508,0xD282000C, + 0x8424130A,0x3E181609,0xBE8903FF,0x382AA000,0x3E181409,0x3E181609, + 0x3E180808,0xB00B0204,0xD2820004,0x04321008,0xD110006A,0x00001709, + 0xD2820008,0x24101108,0x00081304,0x101208FF,0x3FB8AA3B,0x0810110C, + 0xD1100008,0x00001704,0xD2000008,0x00210108,0x7E124709,0xBE8803FF, + 0x3F317200,0xD282000A,0x24101109,0x0816090A,0x0818170A,0x3E161208, + 0x08181904,0x0816170C,0x06101708,0x0616110A,0x0814150B,0xBE8803FF, + 0x35BFBC00,0x08101508,0xD282000A,0x242C1109,0x0816150B,0xD282000B, + 0x242C1109,0x06101708,0x0616110A,0x0814150B,0xBE8803FF,0x2EA39EF3, + 0x08101508,0xD282000A,0x242C1109,0x0816150B,0xD282000B,0x242C1109, + 0x06101708,0x0616110A,0x361A160A,0x1018170B,0x0814150B,0x081C1B0B, + 0xD282000C,0x84321B0D,0x061A1B0D,0x3E181D0D,0x08101508,0x7E1402FF, + 0x3C091DE6,0x3E181D0E,0x101A110B,0x3E1416FF,0x3AB42872,0x3E181AF4, + 0x4214150B,0x3D2AADCC,0x3E181108,0x4214150B,0x3E2AAA47,0xD282000D, + 0x0432170B,0x4214150B,0x3EFFFFFC,0xD282000E,0x2436170B,0x08181D0C, + 0x361E1A0A,0x3622140A,0x101C1B0A,0x0824230A,0xD282000E,0x843A230F, + 0x08201F0D,0x3E1C250F,0x3E1C2310,0x3E1C2510,0x3E1C150C,0xD282000C, + 0x043A1B0A,0xD282000A,0x24321B0A,0x061A190B,0x0816170D,0x0814150E, + 0x0816170C,0x06101508,0x7E121109,0x0610110B,0x0610110D,0x061010F2, + 0xBE8803FF,0x42B20000,0x56101308,0x7C1C0808,0x7E1202FF,0x7F800000, + 0xBE8803FF,0xC2D00000,0x00101109,0x7C160808,0xB00803C0,0x00081080, + 0x7E1002FF,0x7FC00000,0xD110006A,0x00001107,0x00080908,0x7C1A0E80, + 0x00080880,0xD110006A,0x00001707,0x00081304,0x360808FF,0x7FFFFFFF, + 0x7C100F07,0x00080F04,0x7C1A0EF2,0x001008F2,0x7E0802FF,0xBD6147AE, + 0x3E0810FF,0x3F870A3D,0xBE842504,0x89FE047E,0x10080EFF,0x414EB852, + 0x88FE007E,0xC0820708,0x7C0E0B05,0x000A0A80,0x7E0E02F2,0x7C1C0AF2, + 0xBE80246A,0xBF88015A,0x7E0E0280,0x7C160A80,0x87FE6A7E,0xBF880156, + 0xBF8C007F,0xBE8703FF,0x3B4D2E1C,0x7C160A07,0xBE88246A,0x8988087E, + 0xBF88014B,0xD3800107,0x00000105,0xBE8703FF,0x3F2AAAAB,0x7C080E07, + 0xD2000008,0x01A90280,0x560E1107,0x06140EF2,0x7E1A550A,0x08160F0A, + 0xD37E0109,0x00000105,0x0818170A,0x4C101109,0x06120EF3,0x080E1907, + 0x081616F2,0x060E0F0B,0x10161B09,0xB007F000,0x361C1607,0x36201407, + 0x1018170A,0x0822210A,0xD282000C,0x8432210E,0xD282000F,0x843A1B09, + 0x3E18230E,0x3E18210F,0x3E18230F,0x3E180F0B,0xD2820007,0x0432170A, + 0xD282000A,0x241E170A,0x0814150C,0x08180F09,0x081C1909,0x080E0F0E, + 0x080E1507,0x060E0F0C,0x3E160F0D,0xD2820009,0x242E1B09,0x7E100B08, + 0xD2820007,0x84260F0D,0x36141607,0x1012170B,0x0818150B,0xD2820009, + 0x8426150A,0x061A150A,0x3E12190D,0x3E12190C,0x101A0F0B,0x3E121AF4, + 0x361E1007,0x102210FF,0xBF317218,0xBE8A03FF,0x3F317000,0x3E120F07, + 0x08201F08,0x3E221E0A,0xD282000D,0x0426170B,0x3E22200A,0xBE8A03FF, + 0x38060000,0x3E221E0A,0x36261A07,0x10241B0B,0x3E22200A,0xD2820012, + 0x844A1513,0xD282000E,0x2436170B,0x08121D09,0x3E2210FF,0xB102E308, + 0xBE8A03FF,0x3F317218,0x0828270D,0x3E241913,0x3E241514,0xD282000F, + 0x0446100A,0x1014130B,0xD2820008,0x243C1508,0x3E241914,0x3E140F0D, + 0x7E1C02FF,0x3E91F4C4,0x08101111,0xD2560011,0x00010307,0x060E250A, + 0x3E1C1AFF,0x3E76C4E1,0xD282000A,0x041E1B0B,0x421C1D0D,0x3ECCCDEF, + 0xD2560010,0x0001030B,0xD282000B,0x242A1B0B,0x080E1707,0x36181C07, + 0x10161D0D,0x0824190E,0xD282000B,0x842E1913,0x3E162513,0x3E161914, + 0x3E162514,0x3E161D09,0xD2820009,0x042E1D0D,0xD282000C,0x24261D0D, + 0x0816190B,0x061812FF,0x3F2AAAAA,0x061A18FF,0xBF2AAAAA,0x08121B09, + 0x061616FF,0x31739010,0x06121709,0x0616130C,0x0818190B,0x08121909, + 0x361A1407,0x36241607,0x1018170A,0x0826250B,0xD282000C,0x8432250D, + 0x081C1B0A,0x3E18270D,0x3E18250E,0x100E1707,0x3E18270E,0x3E0E130A, + 0x060E1907,0xD2820009,0x041E170A,0xD282000A,0x2426170A,0x080E1507, + 0x06141310,0x0816210A,0x08121709,0x060E0F11,0x060E0F09,0x06120F0A, + 0x08141509,0x080E1507,0x0614130F,0x08161F0A,0x0818170A,0x08121709, + 0x0818190F,0x06160F08,0x06121909,0x0818110B,0x081A190B,0x08101B08, + 0x080E1907,0x060E1107,0x0610130B,0x0612110A,0x08141509,0x08101508, + 0x060E1107,0x06100F09,0x08121308,0xBE8A03FF,0x3ED55555,0x080E1307, + 0x36141007,0x1012100A,0xBE8B03FF,0x3ED55000,0x08161508,0xD282000C, + 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0xBF8C007F,0xD2D60006,0x00002702,0xD2D40007,0x00002502,0xD2D60003, + 0x00002503,0xD2D60004,0x00002104,0xD2D60008,0x00002502,0x4A0C0D07, + 0x4A060706,0xD2D60006,0x00002301,0xD2D40007,0x00002101,0xBF048208, + 0x4A0C0D07,0xD2D60007,0x00002101,0x4A080906,0xC0C80708,0x4A0C0107, + 0x50080B04,0x4A0A1106,0x50060704,0xD2D40004,0x00001505,0xD2D60003, + 0x00001503,0xD2D60005,0x00001505,0xBF8C007F,0x7E0C0211,0x4A080704, + 0x4A060A10,0x50080D04,0x4A00000C,0x4A02020D,0x4A04040E,0xBF84000C, + 0xBF078108,0xBF850032,0xBF048209,0xBF840031,0xBF078109,0xBF850039, + 0x7E0A0201,0x4A060600,0x50080905,0xDC200000,0x03000003,0xBF820072, + 0xBF048408,0xBF840012,0xBF068208,0xBF840024,0xBF048209,0xBF840035, + 0xBF078109,0xBF850055,0xD2C20003,0x00010303,0x7E0A0201,0x4A060600, + 0x50080905,0xDC280000,0x04000003,0xBF8C0070,0x360608FF,0x000000FF, + 0x2C080888,0xBF82005E,0xBF068408,0xBF840012,0xD2C20003,0x00010503, + 0xBF078109,0xBF85002F,0x7E0A0201,0x4A060600,0x50080905,0xDC300000, + 0x06000003,0xBF8C0070,0x36060CFF,0x000000FF,0xD2900004,0x02211106, + 0xD2900005,0x02212106,0x2C0C0C98,0xBF82004A,0xBF820049,0xBF068209, + 0xBF840008,0xD2C20003,0x00010303,0x7E0A0201,0x4A060600,0x50080905, + 0xDC280000,0x03000003,0xBF82003F,0xD2C20003,0x00010503,0x7E0A0201, + 0x4A060600,0x50080905,0xDC300000,0x03000003,0xBF820037,0xBF068209, + 0xBF840020,0xD2C20003,0x00010503,0x7E0A0201,0x4A060600,0x50080905, + 0xDC300000,0x04000003,0xBF8C0070,0x360608FF,0x0000FFFF,0x2C080890, + 0xBF820029,0x7E0C0201,0x4A0A0600,0x500C0906,0xDC300000,0x04000005, + 0xBF078209,0xBF850015,0x4A0A0A84,0x500C0C80,0xDC300000,0x06000005, + 0xBE8003FF,0x0000FFFF,0xBF8C0171,0x36060800,0x2C080890,0xBF8C0070, + 0x360A0C00,0x2C0C0C90,0xBF820015,0xD2C20003,0x00010503,0x7E0A0201, + 0x4A060600,0x50080905,0xDC340000,0x03000003,0xBF82000D,0x4A100A84, + 0x50120C80,0x4A0A0A8C,0x500C0C80,0xDC300000,0x07000005,0xDC340000, + 0x05000008,0xBF8C0070,0x7E060304,0x7E080305,0x7E0A0306,0x7E0C0307, + 0xC0C00300,0xBF8C0070,0xF0205F00,0x00000300,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00070001,0x00010000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AC0082,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0016,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0480501,0xC0800710, + 0xBE8B03FF,0x0000FFFF,0xC086070C,0xBF8C007F,0xC0018714,0x87010B10, + 0x80048604,0x82058005,0x7E060204,0x7E080205,0xDC280000,0x03000003, + 0x93080108,0x87010B11,0x930A010A,0x4A000008,0x4A04040A,0x4A000000, + 0xBF8C007F,0x4A040403,0xD1080000,0x0002000C,0xBF8C0F70,0xD2D60003, + 0x00020609,0x4A020303,0x4A020202,0x7D08020D,0x87806A00,0x7D08040E, + 0x87806A00,0xBE822400,0xBF880012,0xC0840700,0xC0860704,0xC0880708, + 0xBF8C007F,0xC0C00900,0x4A06040E,0x4A0C0412,0x4A0A0211,0x4A04020D, + 0x4A080010,0x4A02000C,0xBF8C007F,0xF0005F00,0x00000001,0xC0C00B00, + 0xBF8C0070,0xF0205F00,0x00000004,0xBF810000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00070001,0x00010000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC0084,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x00120016, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0480501,0xC0800712,0xBE8B03FF,0x0000FFFF,0xC086070C,0xBF8C007F, + 0xC0018716,0x87010B10,0x80048604,0x82058005,0x7E060204,0x7E080205, + 0xDC280000,0x03000003,0x93080108,0x87010B11,0x930A010A,0x4A000008, + 0x4A04040A,0x4A000000,0xBF8C007F,0x4A040403,0xD1080000,0x0002000C, + 0xBF8C0F70,0xD2D60003,0x00020609,0x4A020303,0x4A020202,0x7D08020D, + 0x87806A00,0x7D08040E,0x87806A00,0xBE822400,0xBF8803A7,0xC0800700, + 0xC0880704,0xBF8C007F,0xC0C40100,0x4A0A0412,0x4A080211,0x4A060010, + 0xBF8C007F,0xF0005F00,0x00020303,0xBF8C0F70,0x7C0E0703,0x000E0680, + 0x7E0602F2,0x7C1C0EF2,0xBE80246A,0xBF88012A,0x7E060280,0x7C160E80, + 0xBE84246A,0xBF880125,0xBE8803FF,0x3B4D2E1C,0x7C160E08,0xBE88246A, + 0x8988087E,0xBF88011B,0xD3800103,0x00000107,0xBE8A03FF,0x3F2AAAAB, + 0x7C08060A,0xD2000008,0x01A90280,0x56061103,0x061406F2,0x7E1A550A, + 0x0816070A,0xD37E0109,0x00000107,0x0818170A,0x4C101109,0x061206F3, + 0x08061903,0x081616F2,0x0606070B,0x10161B09,0x1018170A,0xD296000C, + 0x8432150B,0xD2960003,0x0432070B,0xD282000C,0x040E170A,0xD282000A, + 0x2432170A,0x08061503,0x08141909,0x081C1509,0x0818190E,0x0806070C, + 0x0606070A,0x3E16070D,0xD2820009,0x242E1B09,0xD2820003,0x8426070D, + 0x1012170B,0xD2960009,0x8426170B,0x06140703,0xD2960009,0x0426150B, + 0x7E100B08,0xD2960009,0x04260703,0xD282000A,0x0426170B,0xD282000C, + 0x242A170B,0x08121909,0x101A10FF,0xBF317218,0xBE8A03FF,0x3F317218, + 0x1020150B,0xD296000D,0x04341508,0xBE8B03FF,0xB102E308,0x1022130B, + 0xD296000D,0x04341708,0xD256000F,0x00010303,0xD2960010,0x8442170A, + 0xD2960003,0x0446070A,0x7E1802FF,0x3E91F4C4,0xD282000E,0x0436100A, + 0x06060710,0xD2820008,0x24381508,0x3E1814FF,0x3E76C4E1,0xD2820010, + 0x040E150B,0x0810110D,0xD256000D,0x0001030B,0xD282000B,0x2442150B, + 0x4218190A,0x3ECCCDEF,0x08061703,0x1016190A,0xD296000B,0x842E190A, + 0xD2960009,0x042E1909,0xD282000B,0x0426190A,0xD282000A,0x242E190A, + 0x08121509,0x061416FF,0x3F2AAAAA,0x061814FF,0xBF2AAAAA,0x0816190B, + 0x061212FF,0x31739010,0x0612130B,0x0616130A,0x0814150B,0x08121509, + 0x10141710,0x10061703,0xD296000A,0x842A1710,0xD2960003,0x040E1310, + 0x0606070A,0xD2820009,0x040E1710,0xD282000A,0x24261710,0x08061503, + 0x0614130D,0x08161B0A,0x08121709,0x0606070F,0x06060709,0x0612070A, + 0x08141509,0x08061503,0x0614130E,0x08161D0A,0x0818170A,0x08121709, + 0x0818190E,0x06160708,0x06121909,0x0818110B,0x081A190B,0x08101B08, + 0x08061903,0x06061103,0x0610130B,0x0612110A,0x08141509,0x08101508, + 0x06061103,0x06100709,0x08121308,0xBE8A03FF,0x3ED55555,0x08061303, + 0x1012100A,0xD296000A,0x84241508,0xD2960003,0x04281503,0xD282000A, + 0x040E100A,0xB00C0204,0xD2820008,0x24281508,0xD110006A,0x00001909, + 0x08061103,0x0010130A,0x101210FF,0x3FB8AA3B,0xD110000A,0x00001908, + 0xD2000003,0x00290103,0x7E124709,0xBE8A03FF,0x3F317200,0xD282000A, + 0x24201509,0x0816110A,0x0818170A,0x3E16120A,0x08181908,0x0816170C, + 0x06061703,0x0616070A,0x0814150B,0xBE8A03FF,0x35BFBC00,0x08061503, + 0xD282000A,0x242C1509,0x0816150B,0xD282000B,0x242C1509,0x06061703, + 0x0616070A,0x0814150B,0xBE8A03FF,0x2EA39EF3,0x08061503,0xD282000A, + 0x242C1509,0x0816150B,0xD282000B,0x242C1509,0x06061703,0x0616070A, + 0x0814150B,0x08061503,0x1018170B,0x7E1402FF,0x3C091DE6,0xD296000C, + 0x8432170B,0x061A0703,0x3E1416FF,0x3AB42872,0xD296000C,0x04321B0B, + 0x4214150B,0x3D2AADCC,0xD296000C,0x04320703,0x4214150B,0x3E2AAA47, + 0xD282000D,0x0432170B,0xD282000E,0x2436170B,0x4214150B,0x3EFFFFFC, + 0x08181D0C,0x101C1B0A,0xD296000E,0x843A150D,0xD296000C,0x043A150C, + 0xD282000E,0x04321B0A,0xD282000A,0x243A1B0A,0x0814150C,0x06181D0B, + 0x0816170C,0x0816170E,0x06061503,0x7E121109,0x0606070B,0x0606070C, + 0x060606F2,0xBE8A03FF,0x42B20000,0x56061303,0x7C1C100A,0x7E1202FF, + 0x7F800000,0xBE8A03FF,0xC2D00000,0x00060709,0x7C16100A,0xB00A03C0, + 0x00060680,0x7E1002FF,0x7FC00000,0xD110006A,0x00001507,0x00060708, + 0x7C1A0E80,0x00060680,0xD110006A,0x00001907,0x00061303,0x360606FF, + 0x7FFFFFFF,0x7C100F07,0x00060F03,0x7C1A0EF2,0x001006F2,0x7E0602FF, + 0xBD6147AE,0x3E0610FF,0x3F870A3D,0xBE882508,0x89FE087E,0x10060EFF, + 0x414EB852,0x88FE047E,0x88FE007E,0x7C0E0904,0x000E0880,0x7E0802F2, + 0x7C1C0EF2,0xBE80246A,0xBF880129,0x7E080280,0x7C160E80,0x87FE6A7E, + 0xBF880125,0xBE8403FF,0x3B4D2E1C,0x7C160E04,0xBE84246A,0x8984047E, + 0xBF88011B,0xD3800104,0x00000107,0xBE8803FF,0x3F2AAAAB,0x7C080808, + 0xD2000008,0x01A90280,0x56081104,0x061408F2,0x7E1A550A,0x0816090A, + 0xD37E0109,0x00000107,0x0818170A,0x4C101109,0x061208F3,0x08081904, + 0x081616F2,0x0608090B,0x10161B09,0x1018170A,0xD296000C,0x8432150B, + 0xD2960004,0x0432090B,0xD282000C,0x0412170A,0xD282000A,0x2432170A, + 0x08081504,0x08141909,0x081C1509,0x0818190E,0x0808090C,0x0608090A, + 0x3E16090D,0xD2820009,0x242E1B09,0xD2820004,0x8426090D,0x1012170B, + 0xD2960009,0x8426170B,0x06140904,0xD2960009,0x0426150B,0x7E100B08, + 0xD2960009,0x04260904,0xD282000A,0x0426170B,0xD282000C,0x242A170B, + 0x08121909,0x101A10FF,0xBF317218,0xBE8803FF,0x3F317218,0x1020150B, + 0xD296000D,0x04341108,0xBE8903FF,0xB102E308,0x1022130B,0xD296000D, + 0x04341308,0xD256000F,0x00010304,0xD2960010,0x8442170A,0xD2960004, + 0x0446090A,0x7E1802FF,0x3E91F4C4,0xD282000E,0x04361008,0x06080910, + 0xD2820008,0x24381108,0x3E1814FF,0x3E76C4E1,0xD2820010,0x0412150B, + 0x0810110D,0xD256000D,0x0001030B,0xD282000B,0x2442150B,0x4218190A, + 0x3ECCCDEF,0x08081704,0x1016190A,0xD296000B,0x842E190A,0xD2960009, + 0x042E1909,0xD282000B,0x0426190A,0xD282000A,0x242E190A,0x08121509, + 0x061416FF,0x3F2AAAAA,0x061814FF,0xBF2AAAAA,0x0816190B,0x061212FF, + 0x31739010,0x0612130B,0x0616130A,0x0814150B,0x08121509,0x10141710, + 0x10081704,0xD296000A,0x842A1710,0xD2960004,0x04121310,0x0608090A, + 0xD2820009,0x04121710,0xD282000A,0x24261710,0x08081504,0x0614130D, + 0x08161B0A,0x08121709,0x0608090F,0x06080909,0x0612090A,0x08141509, + 0x08081504,0x0614130E,0x08161D0A,0x0818170A,0x08121709,0x0818190E, + 0x06160908,0x06121909,0x0818110B,0x081A190B,0x08101B08,0x08081904, + 0x06081104,0x0610130B,0x0612110A,0x08141509,0x08101508,0x06081104, + 0x06100909,0x08121308,0xBE8803FF,0x3ED55555,0x08081304,0x10121008, + 0xD296000A,0x84241108,0xD2960004,0x04281104,0xD282000A,0x04121008, + 0xB00A0204,0xD2820008,0x24281108,0xD110006A,0x00001509,0x08081104, + 0x0010130A,0x101210FF,0x3FB8AA3B,0xD1100008,0x00001508,0xD2000004, + 0x00210104,0x7E124709,0xBE8803FF,0x3F317200,0xD282000A,0x24201109, + 0x0816110A,0x0818170A,0x3E161208,0x08181908,0x0816170C,0x06081704, + 0x0616090A,0x0814150B,0xBE8803FF,0x35BFBC00,0x08081504,0xD282000A, + 0x242C1109,0x0816150B,0xD282000B,0x242C1109,0x06081704,0x0616090A, + 0x0814150B,0xBE8803FF,0x2EA39EF3,0x08081504,0xD282000A,0x242C1109, + 0x0816150B,0xD282000B,0x242C1109,0x06081704,0x0616090A,0x0814150B, + 0x08081504,0x1018170B,0x7E1402FF,0x3C091DE6,0xD296000C,0x8432170B, + 0x061A0904,0x3E1416FF,0x3AB42872,0xD296000C,0x04321B0B,0x4214150B, + 0x3D2AADCC,0xD296000C,0x04320904,0x4214150B,0x3E2AAA47,0xD282000D, + 0x0432170B,0xD282000E,0x2436170B,0x4214150B,0x3EFFFFFC,0x08181D0C, + 0x101C1B0A,0xD296000E,0x843A150D,0xD296000C,0x043A150C,0xD282000E, + 0x04321B0A,0xD282000A,0x243A1B0A,0x0814150C,0x06181D0B,0x0816170C, + 0x0816170E,0x06081504,0x7E121109,0x0608090B,0x0608090C,0x060808F2, + 0xBE8803FF,0x42B20000,0x56081304,0x7C1C1008,0x7E1202FF,0x7F800000, + 0xBE8803FF,0xC2D00000,0x00080909,0x7C161008,0xB00803C0,0x00080880, + 0x7E1002FF,0x7FC00000,0xD110006A,0x00001107,0x00080908,0x7C1A0E80, + 0x00080880,0xD110006A,0x00001507,0x00081304,0x360808FF,0x7FFFFFFF, + 0x7C100F07,0x00080F04,0x7C1A0EF2,0x001008F2,0x7E0802FF,0xBD6147AE, + 0x3E0810FF,0x3F870A3D,0xBE842504,0x89FE047E,0x10080EFF,0x414EB852, + 0x88FE007E,0xC0820708,0x7C0E0B05,0x000A0A80,0x7E0E02F2,0x7C1C0AF2, + 0xBE80246A,0xBF88012A,0x7E0E0280,0x7C160A80,0x87FE6A7E,0xBF880126, + 0xBF8C007F,0xBE8703FF,0x3B4D2E1C,0x7C160A07,0xBE88246A,0x8988087E, + 0xBF88011B,0xD3800107,0x00000105,0xBE8703FF,0x3F2AAAAB,0x7C080E07, + 0xD2000008,0x01A90280,0x560E1107,0x06140EF2,0x7E1A550A,0x08160F0A, + 0xD37E0109,0x00000105,0x0818170A,0x4C101109,0x06120EF3,0x080E1907, + 0x081616F2,0x060E0F0B,0x10161B09,0x1018170A,0xD296000C,0x8432150B, + 0xD2960007,0x04320F0B,0xD282000C,0x041E170A,0xD282000A,0x2432170A, + 0x080E1507,0x08141909,0x081C1509,0x0818190E,0x080E0F0C,0x060E0F0A, + 0x3E160F0D,0xD2820009,0x242E1B09,0xD2820007,0x84260F0D,0x1012170B, + 0xD2960009,0x8426170B,0x06140F07,0xD2960009,0x0426150B,0x7E100B08, + 0xD2960009,0x04260F07,0xD282000A,0x0426170B,0xD282000C,0x242A170B, + 0x08121909,0x101A10FF,0xBF317218,0xBE8703FF,0x3F317218,0x1020150B, + 0xD296000D,0x04340F08,0xBE8A03FF,0xB102E308,0x1022130B,0xD296000D, + 0x04341508,0xD256000F,0x00010307,0xD2960010,0x8442170A,0xD2960007, + 0x04460F0A,0x7E1802FF,0x3E91F4C4,0xD282000E,0x04361007,0x060E0F10, + 0xD2820008,0x24380F08,0x3E1814FF,0x3E76C4E1,0xD2820010,0x041E150B, + 0x0810110D,0xD256000D,0x0001030B,0xD282000B,0x2442150B,0x4218190A, + 0x3ECCCDEF,0x080E1707,0x1016190A,0xD296000B,0x842E190A,0xD2960009, + 0x042E1909,0xD282000B,0x0426190A,0xD282000A,0x242E190A,0x08121509, + 0x061416FF,0x3F2AAAAA,0x061814FF,0xBF2AAAAA,0x0816190B,0x061212FF, + 0x31739010,0x0612130B,0x0616130A,0x0814150B,0x08121509,0x10141710, + 0x100E1707,0xD296000A,0x842A1710,0xD2960007,0x041E1310,0x060E0F0A, + 0xD2820009,0x041E1710,0xD282000A,0x24261710,0x080E1507,0x0614130D, + 0x08161B0A,0x08121709,0x060E0F0F,0x060E0F09,0x06120F0A,0x08141509, + 0x080E1507,0x0614130E,0x08161D0A,0x0818170A,0x08121709,0x0818190E, + 0x06160F08,0x06121909,0x0818110B,0x081A190B,0x08101B08,0x080E1907, + 0x060E1107,0x0610130B,0x0612110A,0x08141509,0x08101508,0x060E1107, + 0x06100F09,0x08121308,0xBE8703FF,0x3ED55555,0x080E1307,0x10121007, + 0xD296000A,0x84240F08,0xD2960007,0x04280F07,0xD282000A,0x041E1007, + 0xD2820008,0x24280F08,0xB0070204,0xD110006A,0x00000F09,0x080E1107, + 0x0010130A,0x101210FF,0x3FB8AA3B,0xD110000A,0x00000F08,0xD2000007, + 0x00290107,0x7E124709,0xBE8A03FF,0x3F317200,0xD282000A,0x24201509, + 0x0816110A,0x0818170A,0x3E16120A,0x08181908,0x0816170C,0x060E1707, + 0x06160F0A,0x0814150B,0xBE8A03FF,0x35BFBC00,0x080E1507,0xD282000A, + 0x242C1509,0x0816150B,0xD282000B,0x242C1509,0x060E1707,0x06160F0A, + 0x0814150B,0xBE8A03FF,0x2EA39EF3,0x080E1507,0xD282000A,0x242C1509, + 0x0816150B,0xD282000B,0x242C1509,0x060E1707,0x06160F0A,0x0814150B, + 0x080E1507,0x1018170B,0x7E1402FF,0x3C091DE6,0xD296000C,0x8432170B, + 0x061A0F07,0x3E1416FF,0x3AB42872,0xD296000C,0x04321B0B,0x4214150B, + 0x3D2AADCC,0xD296000C,0x04320F07,0x4214150B,0x3E2AAA47,0xD282000D, + 0x0432170B,0xD282000E,0x2436170B,0x4214150B,0x3EFFFFFC,0x08181D0C, + 0x101C1B0A,0xD296000E,0x843A150D,0xD296000C,0x043A150C,0xD282000E, + 0x04321B0A,0xD282000A,0x243A1B0A,0x0814150C,0x06181D0B,0x0816170C, + 0x0816170E,0x060E1507,0x7E121109,0x060E0F0B,0x060E0F0C,0x060E0EF2, + 0xBE8A03FF,0x42B20000,0x560E1307,0x7C1C100A,0x7E1202FF,0x7F800000, + 0xBE8A03FF,0xC2D00000,0x000E0F09,0x7C16100A,0xB00A03C0,0x000E0E80, + 0x7E1002FF,0x7FC00000,0xD110006A,0x00001505,0x000E0F08,0x7C1A0A80, + 0x000E0E80,0xD110006A,0x00000F05,0x000E1307,0x360E0EFF,0x7FFFFFFF, + 0x7C100B05,0x000E0B07,0x7C1A0AF2,0x00100EF2,0x7E0E02FF,0xBD6147AE, + 0x3E0E10FF,0x3F870A3D,0xBE882508,0x89FE087E,0x100E0AFF,0x414EB852, + 0x88FE007E,0xBF8C007F,0x4A040406,0x4A020205,0x4A000004,0xC0C00300, + 0x7E0A0307,0xBF8C007F,0xF0205F00,0x00000300,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0x00000001,0x00000002, + 0x00070001,0x00010000,0x00000100,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00AC0083,0x00001390, + 0x000A000B,0x00000000,0x00000000,0x00000000,0x00000078,0x00000000, + 0x00000000,0x000D0016,0x00000000,0x00000000,0x00000000,0x06040404, + 0xFFFFFFFF,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0xC0480501,0xC0800712,0xBE8B03FF,0x0000FFFF, + 0xC086070C,0xBF8C007F,0xC0018716,0x87010B10,0x80048604,0x82058005, + 0x7E060204,0x7E080205,0xDC280000,0x03000003,0x93080108,0x87010B11, + 0x930A010A,0x4A000008,0x4A04040A,0x4A000000,0xBF8C007F,0x4A040403, + 0xD1080000,0x0002000C,0xBF8C0F70,0xD2D60003,0x00020609,0x4A020303, + 0x4A020202,0x7D08020D,0x87806A00,0x7D08040E,0x87806A00,0xBE822400, + 0xBF880012,0xC0840700,0xC0860704,0xC0880708,0xBF8C007F,0xC0C00900, + 0x4A06040E,0x4A0C0412,0x4A0A0211,0x4A04020D,0x4A080010,0x4A02000C, + 0xBF8C007F,0xF0005F00,0x00000001,0xC0C00B00,0xBF8C0070,0xF0205F00, + 0x00000004,0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00070001,0x00010000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AC0082,0x00000090,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0012,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0020501,0xC080070C, + 0xBF8C007F,0xC0008710,0x8702FF04,0x0000FFFF,0x93080208,0x4A000008, + 0xBF8C007F,0x4A000001,0x7D080000,0xBE80246A,0xC0840700,0xC0C00704, + 0xBF8C007F,0xC0860900,0xC0840B00,0x4A020000,0x4A080004,0xBF8C007F, + 0xE00C2000,0x80030001,0xBF8C0F70,0xE01C2000,0x80020004,0xBF810000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00070001,0x00010000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC0102,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000070,0x00000000,0x00000000,0x000C0022, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0008501,0xC005870C,0xC0060710,0xBE8003FF,0x0000FFFF,0xBF8C007F, + 0x87010001,0x93080108,0x4A000008,0x8002C006,0x4A00000C,0x82038007, + 0x7D08000B,0xBE8C246A,0xBF880021,0xC0040704,0xC08A0708,0xC08C0302, + 0xC0008502,0xC0860700,0xBF8C007F,0xC08E0D00,0xC0C60F00,0x87020001, + 0x80008604,0x82018005,0x7E080201,0x7E060200,0xDC280000,0x07000003, + 0x4A060008,0xBF8C007F,0xE00C2000,0x80070303,0x930A020A,0x4A04041A, + 0x4A020218,0x4A04040A,0x4A040416,0x4A000014,0xBF8C0F71,0xD2D60007, + 0x00020E09,0x4A020F01,0x4A020215,0xBF8C0F70,0xF0205F00,0x00030300, + 0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0x00000001,0x00000002, + 0x00070001,0x00010000,0x00000100,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00AC0102,0x00001390, + 0x000A000B,0x00000000,0x00000000,0x00000000,0x00000070,0x00000000, + 0x00000000,0x000C0022,0x00000000,0x00000000,0x00000000,0x06040404, + 0xFFFFFFFF,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0xC0008501,0xC0C60708,0xC0058710,0xBE8003FF, + 0x0000FFFF,0xBF8C007F,0x87010001,0x93080108,0x4A000008,0x8002C006, + 0x4A00000B,0x82038007,0x7D080010,0xBE8E246A,0xBF88001F,0xC08A0704, + 0xC08C0302,0xC0008502,0xC08E0700,0x4A0A000C,0xBF8C007F,0x4A000014, + 0x4A020218,0x87020001,0x80008604,0x82018005,0x7E080201,0x7E060200, + 0xDC280000,0x03000003,0xC0C61D00,0x930A020A,0x4A04041A,0x4A04040A, + 0x4A040416,0xC0801F00,0xBF8C0070,0xD2D60003,0x00020609,0x4A020701, + 0x4A020215,0xF0005F00,0x00030000,0xBF8C0F70,0xE01C2000,0x80000005, + 0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 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0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000001,0x00000002,0x00070001,0x00020000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC0106,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x000000D0,0x00000000,0x00000000,0x001C0022, + 0x00000000,0x00000000,0x00000000,0x06040405,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC04A0501,0xC0C60718,0xBE8B03FF,0x0000FFFF,0xC0800728,0xC04B072C, + 0xBF8C007F,0x870F0B14,0x80048604,0x82058005,0x7E060204,0x7E080205, + 0xDC280000,0x03000003,0x93080F08,0x4A000008,0x87040B15,0x930A040A, + 0x7E080201,0x4A000000,0x50080880,0x4A04040A,0x7E0C0217,0x4A040416, + 0x50080C80,0x7E0A0203,0xD1080000,0x0002000C,0xBF8C0070,0xD2D60003, + 0x00020609,0x4A020303,0x4A020202,0x50060A80,0x7D08020D,0x87806A00, + 0x7D08040E,0x87806A00,0xBE822400,0xBF8800B0,0xC0CA0720,0x3006049F, + 0x300E029F,0xC0C40700,0xC08E0708,0xBF8C007F,0xD2D60004,0x00002F02, + 0xD2D40005,0x00002D02,0xD2D60003,0x00002D03,0xD2D60008,0x00002B01, + 0xD2D40009,0x00002901,0xD2D60007,0x00002907,0xD2D6000A,0x00002901, + 0x4A080905,0x4A060704,0x4A081109,0xD2D60006,0x00002D02,0x4A080F04, + 0x300A009F,0x4A0E010A,0x50080B04,0x4A0A0D07,0x50060704,0xD2D40004, + 0x00002505,0xD2D60003,0x00002503,0xC0C00710,0xD2D60005,0x00002505, + 0xBF048210,0x4A060704,0xBF8C007F,0x7E0C0201,0x4A080A00,0xC0C00900, + 0x500A0D03,0x4A00001C,0x4A02021D,0x4A04041E,0xBF8C007F,0xF0005F00, + 0x00000000,0xBF84000D,0xBF078110,0xBF85007A,0xBF048211,0xBF84002A, + 0xBF078111,0xBF850076,0xBF8C0F70,0x7E04020F,0x4A02080E,0x50040B02, + 0xDC600000,0x00000001,0xBF810000,0xBF048410,0xBF840011,0xBF068210, + 0xBF84006B,0xBF048211,0xBF840028,0xBF078111,0xBF850067,0xBF8C0F70, + 0x34020288,0x38040101,0xD2C20000,0x00010304,0x7E06020D,0x4A00000C, + 0x50020303,0xDC680000,0x00000200,0xBF810000,0xBF068410,0xBF84005A, + 0xBF048211,0xBF840026,0xBF078111,0xBF850056,0xBF8C0F70,0x34020288, + 0x38000101,0x34020490,0x38000300,0x34020698,0x38040300,0xBF820014, + 0xBF048411,0xBF84002B,0xBF068211,0xBF84004A,0xBF8C0F70,0xD2C20001, + 0x00010304,0x7E06020D,0x4A02020C,0x50040503,0xDC680000,0x00000001, + 0xBF810000,0xBF048411,0xBF840029,0xBF068211,0xBF84003D,0xBF8C0F70, + 0x34020290,0x38040101,0xD2C20000,0x00010504,0x7E06020B,0x4A00000A, + 0x50020303,0xDC700000,0x00000200,0xBF810000,0xBF048411,0xBF840025, + 0xBF068211,0xBF84002E,0xD2C20004,0x00010504,0xBF8C0F70,0x34020290, + 0x38000101,0x7E02020B,0x4A08080A,0x500A0B01,0x34020690,0x38020501, + 0xDC740000,0x00000004,0xBF820021,0xBF068411,0xBF84001F,0xBF8C0F70, + 0xD2C20001,0x00010504,0x7E06020B,0x4A02020A,0x50040503,0xDC700000, + 0x00000001,0xBF810000,0xBF068411,0xBF840014,0xBF8C0F70,0xD2C20002, + 0x00010504,0x7E08020B,0x4A04040A,0x50060704,0xDC740000,0x00000002, + 0xBF810000,0xBF068411,0xBF840009,0xD2C20004,0x00010504,0x7E0C020B, + 0x4A08080A,0x500A0B06,0xBF8C0F70,0xDC780000,0x00000004,0xBF810000, + 0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0x00000001,0x00000002, + 0x00070001,0x00020000,0x00000100,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00AC00C6,0x00001390, + 0x000A000B,0x00000000,0x00000000,0x00000000,0x000000D0,0x00000000, + 0x00000000,0x001C001A,0x00000000,0x00000000,0x00000000,0x06040405, + 0xFFFFFFFF,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0xC04A0501,0xC0C60710,0xBE8B03FF,0x0000FFFF, + 0xC0800728,0xC04B072C,0xBF8C007F,0x870F0B14,0x80048604,0x82058005, + 0x7E060204,0x7E080205,0xDC280000,0x03000003,0x93080F08,0x4A000008, + 0x87040B15,0x930A040A,0x7E080201,0x4A000000,0x50080880,0x4A04040A, + 0x7E0C0217,0x4A040416,0x50080C80,0x7E0A0203,0xD1080000,0x00020010, + 0xBF8C0070,0xD2D60003,0x00020609,0x4A020303,0x4A020202,0x50060A80, + 0x7D080211,0x87806A00,0x7D080412,0x87806A00,0xBE822400,0xBF8800B2, + 0xC0840718,0xC0C80720,0xC0800700,0x3006049F,0x3008029F,0x300A009F, + 0xBF8C007F,0xD2D60006,0x00002702,0xD2D40007,0x00002502,0xD2D60003, + 0x00002503,0xD2D60004,0x00002104,0xD2D60008,0x00002502,0x4A0C0D07, + 0x4A060706,0xD2D60006,0x00002301,0xD2D40007,0x00002101,0xBF048208, + 0x4A0C0D07,0xD2D60007,0x00002101,0x4A080906,0xC0C80708,0x4A0C0107, + 0x50080B04,0x4A0A1106,0x50060704,0xD2D40004,0x00001505,0xD2D60003, + 0x00001503,0xD2D60005,0x00001505,0xBF8C007F,0x7E0C0211,0x4A080704, + 0x4A060A10,0x50080D04,0x4A00000C,0x4A02020D,0x4A04040E,0xBF84000C, + 0xBF078108,0xBF850032,0xBF048209,0xBF840031,0xBF078109,0xBF850039, + 0x7E0A0201,0x4A060600,0x50080905,0xDC200000,0x03000003,0xBF820072, + 0xBF048408,0xBF840012,0xBF068208,0xBF840024,0xBF048209,0xBF840035, + 0xBF078109,0xBF850055,0xD2C20003,0x00010303,0x7E0A0201,0x4A060600, + 0x50080905,0xDC280000,0x04000003,0xBF8C0070,0x360608FF,0x000000FF, + 0x2C080888,0xBF82005E,0xBF068408,0xBF840012,0xD2C20003,0x00010503, + 0xBF078109,0xBF85002F,0x7E0A0201,0x4A060600,0x50080905,0xDC300000, + 0x06000003,0xBF8C0070,0x36060CFF,0x000000FF,0xD2900004,0x02211106, + 0xD2900005,0x02212106,0x2C0C0C98,0xBF82004A,0xBF820049,0xBF068209, + 0xBF840008,0xD2C20003,0x00010303,0x7E0A0201,0x4A060600,0x50080905, + 0xDC280000,0x03000003,0xBF82003F,0xD2C20003,0x00010503,0x7E0A0201, + 0x4A060600,0x50080905,0xDC300000,0x03000003,0xBF820037,0xBF068209, + 0xBF840020,0xD2C20003,0x00010503,0x7E0A0201,0x4A060600,0x50080905, + 0xDC300000,0x04000003,0xBF8C0070,0x360608FF,0x0000FFFF,0x2C080890, + 0xBF820029,0x7E0C0201,0x4A0A0600,0x500C0906,0xDC300000,0x04000005, + 0xBF078209,0xBF850015,0x4A0A0A84,0x500C0C80,0xDC300000,0x06000005, + 0xBE8003FF,0x0000FFFF,0xBF8C0171,0x36060800,0x2C080890,0xBF8C0070, + 0x360A0C00,0x2C0C0C90,0xBF820015,0xD2C20003,0x00010503,0x7E0A0201, + 0x4A060600,0x50080905,0xDC340000,0x03000003,0xBF82000D,0x4A100A84, + 0x50120C80,0x4A0A0A8C,0x500C0C80,0xDC300000,0x07000005,0xDC340000, + 0x05000008,0xBF8C0070,0x7E060304,0x7E080305,0x7E0A0306,0x7E0C0307, + 0xC0C00300,0xBF8C0070,0xF0205F00,0x00000300,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00070001,0x00020000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AC0082,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0016,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0480501,0xC0800710, + 0xBE8B03FF,0x0000FFFF,0xC086070C,0xBF8C007F,0xC0018714,0x87010B10, + 0x80048604,0x82058005,0x7E060204,0x7E080205,0xDC280000,0x03000003, + 0x93080108,0x87010B11,0x930A010A,0x4A000008,0x4A04040A,0x4A000000, + 0xBF8C007F,0x4A040403,0xD1080000,0x0002000C,0xBF8C0F70,0xD2D60003, + 0x00020609,0x4A020303,0x4A020202,0x7D08020D,0x87806A00,0x7D08040E, + 0x87806A00,0xBE822400,0xBF880012,0xC0840700,0xC0860704,0xC0880708, + 0xBF8C007F,0xC0C00900,0x4A06040E,0x4A0C0412,0x4A0A0211,0x4A04020D, + 0x4A080010,0x4A02000C,0xBF8C007F,0xF0005F00,0x00000001,0xC0C00B00, + 0xBF8C0070,0xF0205F00,0x00000004,0xBF810000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00070001,0x00020000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC0085,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x00150016, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0480501,0xC0800712,0xBE8B03FF,0x0000FFFF,0xC086070C,0xBF8C007F, + 0xC0018716,0x87010B10,0x80048604,0x82058005,0x7E060204,0x7E080205, + 0xDC280000,0x03000003,0x93080108,0x87010B11,0x930A010A,0x4A000008, + 0x4A04040A,0x4A000000,0xBF8C007F,0x4A040403,0xD1080000,0x0002000C, + 0xBF8C0F70,0xD2D60003,0x00020609,0x4A020303,0x4A020202,0x7D08020D, + 0x87806A00,0x7D08040E,0x87806A00,0xBE822400,0xBF880437,0xC0800700, + 0xC0880704,0xBF8C007F,0xC0C40100,0x4A0A0412,0x4A080211,0x4A060010, + 0xBF8C007F,0xF0005F00,0x00020303,0xBF8C0F70,0x7C0E0703,0x000E0680, + 0x7E0602F2,0x7C1C0EF2,0xBE80246A,0xBF88015A,0x7E060280,0x7C160E80, + 0xBE84246A,0xBF880155,0xBE8803FF,0x3B4D2E1C,0x7C160E08,0xBE88246A, + 0x8988087E,0xBF88014B,0xD3800103,0x00000107,0xBE8A03FF,0x3F2AAAAB, + 0x7C08060A,0xD2000008,0x01A90280,0x56061103,0x061406F2,0x7E1A550A, + 0x0816070A,0xD37E0109,0x00000107,0x0818170A,0x4C101109,0x061206F3, + 0x08061903,0x081616F2,0x0606070B,0x10161B09,0xB00CF000,0x361C160C, + 0x3620140C,0x1018170A,0x0822210A,0xD282000C,0x8432210E,0xD282000F, + 0x843A1B09,0x3E18230E,0x3E18210F,0x3E18230F,0x3E18070B,0xD2820003, + 0x0432170A,0xD282000A,0x240E170A,0x0814150C,0x08180709,0x081C1909, + 0x0806070E,0x08061503,0x0606070C,0x3E16070D,0xD2820009,0x242E1B09, + 0x7E100B08,0xD2820003,0x8426070D,0x3614160C,0x1012170B,0x0818150B, + 0xD2820009,0x8426150A,0x061A150A,0x3E12190D,0x3E12190C,0x101A070B, + 0x3E121AF4,0x361E100C,0x102210FF,0xBF317218,0xBE8A03FF,0x3F317000, + 0x3E120703,0x08201F08,0x3E221E0A,0xD282000D,0x0426170B,0x3E22200A, + 0xBE8A03FF,0x38060000,0x3E221E0A,0x36261A0C,0x10241B0B,0x3E22200A, + 0xD2820012,0x844A1513,0xD282000E,0x2436170B,0x08121D09,0x3E2210FF, + 0xB102E308,0xBE8A03FF,0x3F317218,0x0828270D,0x3E241913,0x3E241514, + 0xD282000F,0x0446100A,0x1014130B,0xD2820008,0x243C1508,0x3E241914, + 0x3E14070D,0x7E1C02FF,0x3E91F4C4,0x08101111,0xD2560011,0x00010303, + 0x0606250A,0x3E1C1AFF,0x3E76C4E1,0xD282000A,0x040E1B0B,0x421C1D0D, + 0x3ECCCDEF,0xD2560010,0x0001030B,0xD282000B,0x242A1B0B,0x08061703, + 0x36181C0C,0x10161D0D,0x0824190E,0xD282000B,0x842E1913,0x3E162513, + 0x3E161914,0x3E162514,0x3E161D09,0xD2820009,0x042E1D0D,0xD282000C, + 0x24261D0D,0x0816190B,0x061812FF,0x3F2AAAAA,0x061A18FF,0xBF2AAAAA, + 0x08121B09,0x061616FF,0x31739010,0x06121709,0x0616130C,0x0818190B, + 0x08121909,0x361A140C,0x3624160C,0x1018170A,0x0826250B,0xD282000C, + 0x8432250D,0x081C1B0A,0x3E18270D,0x3E18250E,0x10061703,0x3E18270E, + 0x3E06130A,0x06061903,0xD2820009,0x040E170A,0xD282000A,0x2426170A, + 0x08061503,0x06141310,0x0816210A,0x08121709,0x06060711,0x06060709, + 0x0612070A,0x08141509,0x08061503,0x0614130F,0x08161F0A,0x0818170A, + 0x08121709,0x0818190F,0x06160708,0x06121909,0x0818110B,0x081A190B, + 0x08101B08,0x08061903,0x06061103,0x0610130B,0x0612110A,0x08141509, + 0x08101508,0x06061103,0x06100709,0x08121308,0xBE8A03FF,0x3ED55555, + 0x08061303,0x3614100C,0x1012100A,0xBE8B03FF,0x3ED55000,0x08161508, + 0xD282000C,0x8424170A,0x3E18160B,0xBE8B03FF,0x382AA000,0x3E18140B, + 0x3E18160B,0x3E18060A,0xB00D0204,0xD2820003,0x0432100A,0xD110006A, + 0x00001B09,0xD2820008,0x240C1508,0x00061303,0x101206FF,0x3FB8AA3B, + 0x0810110C,0xD110000A,0x00001B03,0xD2000008,0x00290108,0x7E124709, + 0xBE8A03FF,0x3F317200,0xD282000A,0x240C1509,0x0816070A,0x0818170A, + 0x3E16120A,0x08181903,0x0816170C,0x06101708,0x0616110A,0x0814150B, + 0xBE8A03FF,0x35BFBC00,0x08101508,0xD282000A,0x242C1509,0x0816150B, + 0xD282000B,0x242C1509,0x06101708,0x0616110A,0x0814150B,0xBE8A03FF, + 0x2EA39EF3,0x08101508,0xD282000A,0x242C1509,0x0816150B,0xD282000B, + 0x242C1509,0x06101708,0x0616110A,0x361A160C,0x1018170B,0x0814150B, + 0x081C1B0B,0xD282000C,0x84321B0D,0x061A1B0D,0x3E181D0D,0x08101508, + 0x7E1402FF,0x3C091DE6,0x3E181D0E,0x101A110B,0x3E1416FF,0x3AB42872, + 0x3E181AF4,0x4214150B,0x3D2AADCC,0x3E181108,0x4214150B,0x3E2AAA47, + 0xD282000D,0x0432170B,0x4214150B,0x3EFFFFFC,0xD282000E,0x2436170B, + 0x08181D0C,0x361E1A0C,0x3622140C,0x101C1B0A,0x0824230A,0xD282000E, + 0x843A230F,0x08201F0D,0x3E1C250F,0x3E1C2310,0x3E1C2510,0x3E1C150C, + 0xD282000C,0x043A1B0A,0xD282000A,0x24321B0A,0x061A190B,0x0816170D, + 0x0814150E,0x0816170C,0x06101508,0x7E121109,0x0610110B,0x0610110D, + 0x061010F2,0xBE8A03FF,0x42B20000,0x56101308,0x7C1C060A,0x7E1202FF, + 0x7F800000,0xBE8A03FF,0xC2D00000,0x00101109,0x7C16060A,0xB00A03C0, + 0x00061080,0x7E1002FF,0x7FC00000,0xD110006A,0x00001507,0x00060708, + 0x7C1A0E80,0x00060680,0xD110006A,0x00001B07,0x00061303,0x360606FF, + 0x7FFFFFFF,0x7C100F07,0x00060F03,0x7C1A0EF2,0x001006F2,0x7E0602FF, + 0xBD6147AE,0x3E0610FF,0x3F870A3D,0xBE882508,0x89FE087E,0x10060EFF, + 0x414EB852,0x88FE047E,0x88FE007E,0x7C0E0904,0x000E0880,0x7E0802F2, + 0x7C1C0EF2,0xBE80246A,0xBF880159,0x7E080280,0x7C160E80,0x87FE6A7E, + 0xBF880155,0xBE8403FF,0x3B4D2E1C,0x7C160E04,0xBE84246A,0x8984047E, + 0xBF88014B,0xD3800104,0x00000107,0xBE8803FF,0x3F2AAAAB,0x7C080808, + 0xD2000008,0x01A90280,0x56081104,0x061408F2,0x7E1A550A,0x0816090A, + 0xD37E0109,0x00000107,0x0818170A,0x4C101109,0x061208F3,0x08081904, + 0x081616F2,0x0608090B,0x10161B09,0xB00AF000,0x361C160A,0x3620140A, + 0x1018170A,0x0822210A,0xD282000C,0x8432210E,0xD282000F,0x843A1B09, + 0x3E18230E,0x3E18210F,0x3E18230F,0x3E18090B,0xD2820004,0x0432170A, + 0xD282000A,0x2412170A,0x0814150C,0x08180909,0x081C1909,0x0808090E, + 0x08081504,0x0608090C,0x3E16090D,0xD2820009,0x242E1B09,0x7E100B08, + 0xD2820004,0x8426090D,0x3614160A,0x1012170B,0x0818150B,0xD2820009, + 0x8426150A,0x061A150A,0x3E12190D,0x3E12190C,0x101A090B,0x3E121AF4, + 0x361E100A,0x102210FF,0xBF317218,0xBE8803FF,0x3F317000,0x3E120904, + 0x08201F08,0x3E221E08,0xD282000D,0x0426170B,0x3E222008,0xBE8803FF, + 0x38060000,0x3E221E08,0x36261A0A,0x10241B0B,0x3E222008,0xD2820012, + 0x844A1513,0xD282000E,0x2436170B,0x08121D09,0x3E2210FF,0xB102E308, + 0xBE8803FF,0x3F317218,0x0828270D,0x3E241913,0x3E241514,0xD282000F, + 0x04461008,0x1014130B,0xD2820008,0x243C1108,0x3E241914,0x3E14090D, + 0x7E1C02FF,0x3E91F4C4,0x08101111,0xD2560011,0x00010304,0x0608250A, + 0x3E1C1AFF,0x3E76C4E1,0xD282000A,0x04121B0B,0x421C1D0D,0x3ECCCDEF, + 0xD2560010,0x0001030B,0xD282000B,0x242A1B0B,0x08081704,0x36181C0A, + 0x10161D0D,0x0824190E,0xD282000B,0x842E1913,0x3E162513,0x3E161914, + 0x3E162514,0x3E161D09,0xD2820009,0x042E1D0D,0xD282000C,0x24261D0D, + 0x0816190B,0x061812FF,0x3F2AAAAA,0x061A18FF,0xBF2AAAAA,0x08121B09, + 0x061616FF,0x31739010,0x06121709,0x0616130C,0x0818190B,0x08121909, + 0x361A140A,0x3624160A,0x1018170A,0x0826250B,0xD282000C,0x8432250D, + 0x081C1B0A,0x3E18270D,0x3E18250E,0x10081704,0x3E18270E,0x3E08130A, + 0x06081904,0xD2820009,0x0412170A,0xD282000A,0x2426170A,0x08081504, + 0x06141310,0x0816210A,0x08121709,0x06080911,0x06080909,0x0612090A, + 0x08141509,0x08081504,0x0614130F,0x08161F0A,0x0818170A,0x08121709, + 0x0818190F,0x06160908,0x06121909,0x0818110B,0x081A190B,0x08101B08, + 0x08081904,0x06081104,0x0610130B,0x0612110A,0x08141509,0x08101508, + 0x06081104,0x06100909,0x08121308,0xBE8803FF,0x3ED55555,0x08081304, + 0x3614100A,0x10121008,0xBE8903FF,0x3ED55000,0x08161508,0xD282000C, + 0x8424130A,0x3E181609,0xBE8903FF,0x382AA000,0x3E181409,0x3E181609, + 0x3E180808,0xB00B0204,0xD2820004,0x04321008,0xD110006A,0x00001709, + 0xD2820008,0x24101108,0x00081304,0x101208FF,0x3FB8AA3B,0x0810110C, + 0xD1100008,0x00001704,0xD2000008,0x00210108,0x7E124709,0xBE8803FF, + 0x3F317200,0xD282000A,0x24101109,0x0816090A,0x0818170A,0x3E161208, + 0x08181904,0x0816170C,0x06101708,0x0616110A,0x0814150B,0xBE8803FF, + 0x35BFBC00,0x08101508,0xD282000A,0x242C1109,0x0816150B,0xD282000B, + 0x242C1109,0x06101708,0x0616110A,0x0814150B,0xBE8803FF,0x2EA39EF3, + 0x08101508,0xD282000A,0x242C1109,0x0816150B,0xD282000B,0x242C1109, + 0x06101708,0x0616110A,0x361A160A,0x1018170B,0x0814150B,0x081C1B0B, + 0xD282000C,0x84321B0D,0x061A1B0D,0x3E181D0D,0x08101508,0x7E1402FF, + 0x3C091DE6,0x3E181D0E,0x101A110B,0x3E1416FF,0x3AB42872,0x3E181AF4, + 0x4214150B,0x3D2AADCC,0x3E181108,0x4214150B,0x3E2AAA47,0xD282000D, + 0x0432170B,0x4214150B,0x3EFFFFFC,0xD282000E,0x2436170B,0x08181D0C, + 0x361E1A0A,0x3622140A,0x101C1B0A,0x0824230A,0xD282000E,0x843A230F, + 0x08201F0D,0x3E1C250F,0x3E1C2310,0x3E1C2510,0x3E1C150C,0xD282000C, + 0x043A1B0A,0xD282000A,0x24321B0A,0x061A190B,0x0816170D,0x0814150E, + 0x0816170C,0x06101508,0x7E121109,0x0610110B,0x0610110D,0x061010F2, + 0xBE8803FF,0x42B20000,0x56101308,0x7C1C0808,0x7E1202FF,0x7F800000, + 0xBE8803FF,0xC2D00000,0x00101109,0x7C160808,0xB00803C0,0x00081080, + 0x7E1002FF,0x7FC00000,0xD110006A,0x00001107,0x00080908,0x7C1A0E80, + 0x00080880,0xD110006A,0x00001707,0x00081304,0x360808FF,0x7FFFFFFF, + 0x7C100F07,0x00080F04,0x7C1A0EF2,0x001008F2,0x7E0802FF,0xBD6147AE, + 0x3E0810FF,0x3F870A3D,0xBE842504,0x89FE047E,0x10080EFF,0x414EB852, + 0x88FE007E,0xC0820708,0x7C0E0B05,0x000A0A80,0x7E0E02F2,0x7C1C0AF2, + 0xBE80246A,0xBF88015A,0x7E0E0280,0x7C160A80,0x87FE6A7E,0xBF880156, + 0xBF8C007F,0xBE8703FF,0x3B4D2E1C,0x7C160A07,0xBE88246A,0x8988087E, + 0xBF88014B,0xD3800107,0x00000105,0xBE8703FF,0x3F2AAAAB,0x7C080E07, + 0xD2000008,0x01A90280,0x560E1107,0x06140EF2,0x7E1A550A,0x08160F0A, + 0xD37E0109,0x00000105,0x0818170A,0x4C101109,0x06120EF3,0x080E1907, + 0x081616F2,0x060E0F0B,0x10161B09,0xB007F000,0x361C1607,0x36201407, + 0x1018170A,0x0822210A,0xD282000C,0x8432210E,0xD282000F,0x843A1B09, + 0x3E18230E,0x3E18210F,0x3E18230F,0x3E180F0B,0xD2820007,0x0432170A, + 0xD282000A,0x241E170A,0x0814150C,0x08180F09,0x081C1909,0x080E0F0E, + 0x080E1507,0x060E0F0C,0x3E160F0D,0xD2820009,0x242E1B09,0x7E100B08, + 0xD2820007,0x84260F0D,0x36141607,0x1012170B,0x0818150B,0xD2820009, + 0x8426150A,0x061A150A,0x3E12190D,0x3E12190C,0x101A0F0B,0x3E121AF4, + 0x361E1007,0x102210FF,0xBF317218,0xBE8A03FF,0x3F317000,0x3E120F07, + 0x08201F08,0x3E221E0A,0xD282000D,0x0426170B,0x3E22200A,0xBE8A03FF, + 0x38060000,0x3E221E0A,0x36261A07,0x10241B0B,0x3E22200A,0xD2820012, + 0x844A1513,0xD282000E,0x2436170B,0x08121D09,0x3E2210FF,0xB102E308, + 0xBE8A03FF,0x3F317218,0x0828270D,0x3E241913,0x3E241514,0xD282000F, + 0x0446100A,0x1014130B,0xD2820008,0x243C1508,0x3E241914,0x3E140F0D, + 0x7E1C02FF,0x3E91F4C4,0x08101111,0xD2560011,0x00010307,0x060E250A, + 0x3E1C1AFF,0x3E76C4E1,0xD282000A,0x041E1B0B,0x421C1D0D,0x3ECCCDEF, + 0xD2560010,0x0001030B,0xD282000B,0x242A1B0B,0x080E1707,0x36181C07, + 0x10161D0D,0x0824190E,0xD282000B,0x842E1913,0x3E162513,0x3E161914, + 0x3E162514,0x3E161D09,0xD2820009,0x042E1D0D,0xD282000C,0x24261D0D, + 0x0816190B,0x061812FF,0x3F2AAAAA,0x061A18FF,0xBF2AAAAA,0x08121B09, + 0x061616FF,0x31739010,0x06121709,0x0616130C,0x0818190B,0x08121909, + 0x361A1407,0x36241607,0x1018170A,0x0826250B,0xD282000C,0x8432250D, + 0x081C1B0A,0x3E18270D,0x3E18250E,0x100E1707,0x3E18270E,0x3E0E130A, + 0x060E1907,0xD2820009,0x041E170A,0xD282000A,0x2426170A,0x080E1507, + 0x06141310,0x0816210A,0x08121709,0x060E0F11,0x060E0F09,0x06120F0A, + 0x08141509,0x080E1507,0x0614130F,0x08161F0A,0x0818170A,0x08121709, + 0x0818190F,0x06160F08,0x06121909,0x0818110B,0x081A190B,0x08101B08, + 0x080E1907,0x060E1107,0x0610130B,0x0612110A,0x08141509,0x08101508, + 0x060E1107,0x06100F09,0x08121308,0xBE8A03FF,0x3ED55555,0x080E1307, + 0x36141007,0x1012100A,0xBE8B03FF,0x3ED55000,0x08161508,0xD282000C, + 0x8424170A,0x3E18160B,0xBE8B03FF,0x382AA000,0x3E18140B,0x3E18160B, + 0x3E180E0A,0xB00C0204,0xD2820007,0x0432100A,0xD110006A,0x00001909, + 0xD2820008,0x241C1508,0x000E1307,0x10120EFF,0x3FB8AA3B,0x0810110C, + 0xD110000A,0x00001907,0xD2000008,0x00290108,0x7E124709,0xBE8A03FF, + 0x3F317200,0xD282000A,0x241C1509,0x08160F0A,0x0818170A,0x3E16120A, + 0x08181907,0x0816170C,0x06101708,0x0616110A,0x0814150B,0xBE8A03FF, + 0x35BFBC00,0x08101508,0xD282000A,0x242C1509,0x0816150B,0xD282000B, + 0x242C1509,0x06101708,0x0616110A,0x0814150B,0xBE8A03FF,0x2EA39EF3, + 0x08101508,0xD282000A,0x242C1509,0x0816150B,0xD282000B,0x242C1509, + 0x06101708,0x0616110A,0x361A1607,0x1018170B,0x0814150B,0x081C1B0B, + 0xD282000C,0x84321B0D,0x061A1B0D,0x3E181D0D,0x08101508,0x7E1402FF, + 0x3C091DE6,0x3E181D0E,0x101A110B,0x3E1416FF,0x3AB42872,0x3E181AF4, + 0x4214150B,0x3D2AADCC,0x3E181108,0x4214150B,0x3E2AAA47,0xD282000D, + 0x0432170B,0x4214150B,0x3EFFFFFC,0xD282000E,0x2436170B,0x08181D0C, + 0x361E1A07,0x36221407,0x101C1B0A,0x0824230A,0xD282000E,0x843A230F, + 0x08201F0D,0x3E1C250F,0x3E1C2310,0x3E1C2510,0x3E1C150C,0xD282000C, + 0x043A1B0A,0xD282000A,0x24321B0A,0x061A190B,0x0816170D,0x0814150E, + 0x0816170C,0x06101508,0x7E121109,0x0610110B,0x0610110D,0x061010F2, + 0xBE8703FF,0x42B20000,0x56101308,0x7C1C0E07,0x7E1202FF,0x7F800000, + 0xBE8703FF,0xC2D00000,0x00101109,0x7C160E07,0xB00703C0,0x000E1080, + 0x7E1002FF,0x7FC00000,0xD110006A,0x00000F05,0x000E0F08,0x7C1A0A80, + 0x000E0E80,0xD110006A,0x00001905,0x000E1307,0x360E0EFF,0x7FFFFFFF, + 0x7C100B05,0x000E0B07,0x7C1A0AF2,0x00100EF2,0x7E0E02FF,0xBD6147AE, + 0x3E0E10FF,0x3F870A3D,0xBE882508,0x89FE087E,0x100E0AFF,0x414EB852, + 0x88FE007E,0xBF8C007F,0x4A040406,0x4A020205,0x4A000004,0xC0C00300, + 0x7E0A0307,0xBF8C007F,0xF0205F00,0x00000300,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00070001,0x00020000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AC0083,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000078,0x00000000,0x00000000,0x000D0016,0x00000000,0x00000000, + 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0x3202020D,0x3204040E,0xBF84000E,0xBF078108,0xBF850038,0xBF048209, + 0xBF840037,0xBF078109,0xBF850041,0x7E0A0201,0x32060600,0x38080905, + 0xBF800000,0xBF800000,0xDC400000,0x03000003,0xBF820084,0xBF048408, + 0xBF840014,0xBF068208,0xBF840028,0xBF048209,0xBF84003D,0xBF078109, + 0xBF850063,0xD28F0003,0x00020681,0x7E0A0201,0x32060600,0x38080905, + 0xBF800000,0xBF800000,0xDC480000,0x04000003,0xBF8C0070,0x260608FF, + 0x000000FF,0x20080888,0xBF82006E,0xBF068408,0xBF840014,0xD28F0003, + 0x00020682,0xBF078109,0xBF850037,0x7E0A0201,0x32060600,0x38080905, + 0xBF800000,0xBF800000,0xDC500000,0x06000003,0xBF8C0070,0x26060CFF, + 0x000000FF,0xD1C80004,0x02211106,0xD1C80005,0x02212106,0x200C0C98, + 0xBF820058,0xBF820057,0xBF068209,0xBF84000A,0xD28F0003,0x00020681, + 0x7E0A0201,0x32060600,0x38080905,0xBF800000,0xBF800000,0xDC480000, + 0x03000003,0xBF82004B,0xD28F0003,0x00020682,0x7E0A0201,0x32060600, + 0x38080905,0xBF800000,0xBF800000,0xDC500000,0x03000003,0xBF820041, + 0xBF068209,0xBF840026,0xD28F0003,0x00020682,0x7E0A0201,0x32060600, + 0x38080905,0xBF800000,0xBF800000,0xDC500000,0x04000003,0xBF8C0070, + 0x260608FF,0x0000FFFF,0x20080890,0xBF820031,0x7E0C0201,0x320A0600, + 0x380C0906,0xBF078209,0xBF800000,0xBF800000,0xDC500000,0x04000005, + 0xBF850019,0x320A0A84,0x380C0C80,0xBE8000FF,0x0000FFFF,0xBF8C0070, + 0x26060800,0x20080890,0xBF800000,0xBF800000,0xDC500000,0x06000005, + 0xBF8C0070,0x260A0C00,0x200C0C90,0xBF820019,0xD28F0003,0x00020682, + 0x7E0A0201,0x32060600,0x38080905,0xBF800000,0xBF800000,0xDC540000, + 0x03000003,0xBF82000F,0x32100A84,0x38120C80,0x32140A8C,0x38160C80, + 0xBF800000,0xBF800000,0xDC500000,0x0700000A,0xDC540000,0x05000008, + 0xBF8C0070,0x7E060304,0x7E080305,0x7E0A0306,0x7E0C0307,0xC00E0001, + 0x00000000,0xBF8C0070,0xF0205F00,0x00000300,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00080001,0x00010000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AF0082,0x00001390,0x004A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0018,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0060402,0x00000004, + 0xC00A0303,0x00000030,0xC00A0003,0x00000040,0xBE8B00FF,0x0000FFFF, + 0xBF8C007F,0xC00203C3,0x00000050,0x86010B10,0x80048604,0x82058005, + 0x7E060204,0x7E080205,0x92080108,0x86010B11,0x920A010A,0x32000008, + 0x3204040A,0x32000000,0xBF8C007F,0x3204040F,0xD0C40000,0x0002000C, + 0xBF800000,0xBF800000,0xDC480000,0x03000003,0xBF8C0070,0xD2850003, + 0x00020609,0x32020303,0x32020202,0x7D88020D,0x86806A00,0x7D88040E, + 0x86806A00,0xBE822000,0xBF88001A,0xC00A0203,0x00000000,0xC00A0303, + 0x00000010,0xC00A0403,0x00000020,0xBF800000,0xBF8C007F,0xC00E0004, + 0x00000000,0x3206040E,0x320C0412,0x320A0211,0x3204020D,0x32080010, + 0x3202000C,0xBF800000,0xBF8C007F,0xBF800000,0xF0005F00,0x00000001, + 0xC00E0005,0x00000000,0xBF8C0070,0xF0205F00,0x00000004,0xBF810000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00080001,0x00010000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AF0084,0x00001390,0x004A000B,0x00000000,0x00000000,0x00000000, + 0x00000078,0x00000000,0x00000000,0x00120018,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0060402,0x00000004, + 0xC00A0303,0x00000030,0xC00A0003,0x00000048,0xBE8B00FF,0x0000FFFF, + 0xBF8C007F,0xC00203C3,0x00000058,0x86010B10,0x80048604,0x82058005, + 0x7E060204,0x7E080205,0x92080108,0x86010B11,0x920A010A,0x32000008, + 0x3204040A,0x32000000,0xBF8C007F,0x3204040F,0xD0C40000,0x0002000C, + 0xBF800000,0xBF800000,0xDC480000,0x03000003,0xBF8C0070,0xD2850003, + 0x00020609,0x32020303,0x32020202,0x7D88020D,0x86806A00,0x7D88040E, + 0x86806A00,0xBE822000,0xBF880396,0xC00A0003,0x00000000,0xC00A0403, + 0x00000010,0xBF800000,0xBF8C007F,0xC00E0200,0x00000000,0x320A0412, + 0x32080211,0x32060010,0xBF800000,0xBF8C007F,0xBF800000,0xF0005F00, + 0x00020303,0xBF8C0F70,0x7C8E0703,0x000E0680,0x7E0602F2,0x7C9C0EF2, + 0xBE80206A,0xBF880121,0x7E060280,0x7C960E80,0xBE84206A,0xBF88011C, + 0xBE8800FF,0x3B4D2E1C,0x7C960E08,0xBE88206A,0x8888087E,0xBF880112, + 0xD1740103,0x00000107,0xBE8A00FF,0x3F2AAAAB,0x7C88060A,0xD1000008, + 0x01A90280,0xD2880003,0x00021103,0x021406F2,0x7E1A450A,0x0416070A, + 0xD1730109,0x00000107,0x0418170A,0x34101109,0x021206F3,0x04061903, + 0x041616F2,0x0206070B,0x0A161B09,0x0A18170A,0xD1CB000A,0x8432150B, + 0xD1CB0003,0x042A070B,0x0214070C,0x0418190A,0x04061903,0x04181509, + 0x04121909,0x04121509,0x04060709,0x0206070C,0x0A06070D,0x0212070B, + 0x04141709,0x04061503,0x0A141309,0xD1CB000B,0x842A1309,0x02180703, + 0xD1CB000B,0x042E1909,0xD1CB000B,0x042E0703,0x0218170A,0x0414150C, + 0x7E100B08,0x0414150B,0xBE8A00FF,0x3E76C4E1,0x7E1602FF,0x3E91F4C4, + 0xD1CB000B,0x042C150C,0xBE8A00FF,0x3ECCCDEF,0xD1CB000B,0x002A170C, + 0xBE8A00FF,0x3F317218,0x0A1A100A,0xD1CB000E,0x84341508,0xBE8A00FF, + 0xB102E308,0xD1CB0008,0x04381508,0x021C110D,0x041A1B0E,0x0A201909, + 0x04101B08,0xD288000D,0x00010309,0xD1CB0011,0x8442130C,0x0A121509, + 0xD288000F,0x00010303,0xD1CB0003,0x0426070C,0x02060711,0x02120710, + 0x04202109,0x04062103,0x0A20170C,0xD1CB000C,0x8442170C,0xD1CB000A, + 0x0432170A,0x02161510,0x0418210B,0x0414190A,0x021816FF,0x3F2AAAAA, + 0x022018FF,0xBF2AAAAA,0x0416210B,0x021414FF,0x31739010,0x0214150B, + 0x0216150C,0x0418190B,0x0414190A,0x0A061703,0x0A181709,0xD1CB0010, + 0x84321709,0xD1CB0003,0x040E1509,0x02060710,0x0212070C,0x04141909, + 0x04061503,0x0214130D,0x04161B0A,0x04121709,0x0206070F,0x02060709, + 0x0212070A,0x04141509,0x04061503,0x0214130E,0x04161D0A,0x0418170A, + 0x04121709,0x0418190E,0x02160708,0x02121909,0x0418110B,0x041A190B, + 0x04101B08,0x04061903,0x02061103,0x0210130B,0x0212110A,0x04141509, + 0x04101508,0x02061103,0x02100709,0x04121308,0xBE8A00FF,0x3ED55555, + 0x04061303,0x0A12100A,0xD1CB0008,0x84241508,0xD1CB0003,0x04201503, + 0xB00C0204,0x02100709,0xD010006A,0x00001909,0x04141308,0x00101308, + 0x0A1210FF,0x3FB8AA3B,0x7E123D09,0x04061503,0x0A1412FF,0x3F317200, + 0x04161508,0x0418110B,0x041A190B,0xD010000A,0x00001908,0x041A1B08, + 0x0214190A,0xD1000003,0x00290103,0x0414150D,0x02061503,0x0214070B, + 0x0416170A,0x04061703,0x0A1612FF,0x35BFBC00,0x0418170A,0x0414190A, + 0x0414170A,0x02061503,0x0214070C,0x0416190A,0x04061703,0x0A1612FF, + 0x2EA39EF3,0x0418170A,0x0414190A,0x0414170A,0x02061503,0x0214070C, + 0x0416190A,0x04061703,0x0A18150A,0xBE8A00FF,0x3AB42872,0x7E1602FF, + 0x3C091DE6,0xD1CB000D,0x8432150A,0x021C0703,0xD1CB000D,0x04361D0A, + 0xD1CB000B,0x042C150A,0xBE8A00FF,0x3D2AADCC,0xD1CB000B,0x002A170A, + 0xBE8A00FF,0x3E2AAA47,0xD1CB000D,0x04360703,0x021C1B0C,0xD1CB000B, + 0x002A170A,0xBE8A00FF,0x3EFFFFFC,0x0418190E,0xD1CB000B,0x002A170A, + 0x0418190D,0x0A1A1D0B,0xD1CB000E,0x8436170E,0xD1CB000B,0x043A170C, + 0x0218170D,0x041A1B0C,0x04161B0B,0x021A190A,0x0414150D,0x0414150C, + 0x02061703,0x7E121109,0x0206070A,0x0206070D,0x020606F2,0xBE8A00FF, + 0x42B20000,0xD2880003,0x00021303,0x7C9C100A,0x7E1202FF,0x7F800000, + 0xBE8A00FF,0xC2D00000,0x00060709,0x7C96100A,0xB00A03C0,0x00060680, + 0xD010006A,0x00001507,0x7E1002FF,0x7FC00000,0x00060708,0x7C9A0E80, + 0x00060680,0xD010006A,0x00001907,0x00061303,0x260606FF,0x7FFFFFFF, + 0x7C900F07,0x00060F03,0x7C9A0EF2,0x000606F2,0xBE8A00FF,0x3F870A3D, + 0x7E1002FF,0xBD6147AE,0xD1CB0003,0x04201503,0xBE882108,0x88FE087E, + 0x0A060EFF,0x414EB852,0x87FE047E,0x87FE007E,0x7C8E0904,0x000E0880, + 0x7E0802F2,0x7C9C0EF2,0xBE80206A,0xBF880120,0x7E080280,0x7C960E80, + 0x86FE6A7E,0xBF88011C,0xBE8400FF,0x3B4D2E1C,0x7C960E04,0xBE84206A, + 0x8884047E,0xBF880112,0xD1740104,0x00000107,0xBE8800FF,0x3F2AAAAB, + 0x7C880808,0xD1000008,0x01A90280,0xD2880004,0x00021104,0x021408F2, + 0x7E1A450A,0x0416090A,0xD1730109,0x00000107,0x0418170A,0x34101109, + 0x021208F3,0x04081904,0x041616F2,0x0208090B,0x0A161B09,0x0A18170A, + 0xD1CB000A,0x8432150B,0xD1CB0004,0x042A090B,0x0214090C,0x0418190A, + 0x04081904,0x04181509,0x04121909,0x04121509,0x04080909,0x0208090C, + 0x0A08090D,0x0212090B,0x04141709,0x04081504,0x0A141309,0xD1CB000B, + 0x842A1309,0x02180904,0xD1CB000B,0x042E1909,0xD1CB000B,0x042E0904, + 0x0218170A,0x0414150C,0x7E100B08,0x0414150B,0xBE8800FF,0x3E76C4E1, + 0x7E1602FF,0x3E91F4C4,0xD1CB000B,0x042C110C,0xBE8800FF,0x3ECCCDEF, + 0xD1CB000B,0x0022170C,0xBE8800FF,0x3F317218,0x0A1A1008,0xD1CB000E, + 0x84341108,0xBE8800FF,0xB102E308,0xD1CB0008,0x04381108,0x021C110D, + 0x041A1B0E,0x0A201909,0x04101B08,0xD288000D,0x00010309,0xD1CB0011, + 0x8442130C,0x0A121509,0xD288000F,0x00010304,0xD1CB0004,0x0426090C, + 0x02080911,0x02120910,0x04202109,0x04082104,0x0A20170C,0xD1CB000C, + 0x8442170C,0xD1CB000A,0x0432170A,0x02161510,0x0418210B,0x0414190A, + 0x021816FF,0x3F2AAAAA,0x022018FF,0xBF2AAAAA,0x0416210B,0x021414FF, + 0x31739010,0x0214150B,0x0216150C,0x0418190B,0x0414190A,0x0A081704, + 0x0A181709,0xD1CB0010,0x84321709,0xD1CB0004,0x04121509,0x02080910, + 0x0212090C,0x04141909,0x04081504,0x0214130D,0x04161B0A,0x04121709, + 0x0208090F,0x02080909,0x0212090A,0x04141509,0x04081504,0x0214130E, + 0x04161D0A,0x0418170A,0x04121709,0x0418190E,0x02160908,0x02121909, + 0x0418110B,0x041A190B,0x04101B08,0x04081904,0x02081104,0x0210130B, + 0x0212110A,0x04141509,0x04101508,0x02081104,0x02100909,0x04121308, + 0xBE8800FF,0x3ED55555,0x04081304,0x0A121008,0xD1CB0008,0x84241108, + 0xD1CB0004,0x04201104,0xB00A0204,0x02100909,0xD010006A,0x00001509, + 0x04141308,0x00101308,0x0A1210FF,0x3FB8AA3B,0x7E123D09,0x04081504, + 0x0A1412FF,0x3F317200,0x04161508,0x0418110B,0x041A190B,0xD0100008, + 0x00001508,0x041A1B08,0x0214190A,0xD1000004,0x00210104,0x0414150D, + 0x02081504,0x0214090B,0x0416170A,0x04081704,0x0A1612FF,0x35BFBC00, + 0x0418170A,0x0414190A,0x0414170A,0x02081504,0x0214090C,0x0416190A, + 0x04081704,0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A,0x0414170A, + 0x02081504,0x0214090C,0x0416190A,0x04081704,0x0A18150A,0xBE8800FF, + 0x3AB42872,0x7E1602FF,0x3C091DE6,0xD1CB000D,0x8432150A,0x021C0904, + 0xD1CB000D,0x04361D0A,0xD1CB000B,0x042C110A,0xBE8800FF,0x3D2AADCC, + 0xD1CB000B,0x0022170A,0xBE8800FF,0x3E2AAA47,0xD1CB000D,0x04360904, + 0x021C1B0C,0xD1CB000B,0x0022170A,0xBE8800FF,0x3EFFFFFC,0x0418190E, + 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0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000001,0x00000002,0x00080001,0x00020000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC02C6,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x000000D0,0x00000000,0x00000000,0x001C0060, + 0x00000000,0x00000000,0x00000000,0x06040405,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0060502,0x00000004,0xC00E0303,0x00000060,0xBE8B00FF,0x0000FFFF, + 0xC00A0003,0x000000A0,0xC0060583,0x000000B0,0xBF8C007F,0x860F0B14, + 0x80048604,0x82058005,0x7E060204,0x7E080205,0xDC480000,0x03000003, + 0x92080F08,0x32000008,0x86040B15,0x7E0A0201,0x32080000,0x920A040A, + 0x38000A80,0x3200040A,0x7E0C0217,0x320A0016,0x38000C80,0x7E0E0203, + 0xD0C40000,0x0002080C,0xBF8C0070,0xD2850002,0x00020609,0x32000302, + 0x320C0002,0x38000E80,0x7D880C0D,0x86806A00,0x7D880A0E,0x86806A00, + 0xBE822000,0xBF8800B4,0xC00E0203,0x00000000,0xC00A0803,0x00000020, + 0xC00E0503,0x00000040,0xC00E0003,0x00000080,0x220E0A9F,0xBF8C007F, + 0xC00E0604,0x00000000,0x32000820,0x32020C21,0x32040A22,0x22100C9F, + 0xBF8C007F,0xF0005F00,0x00060000,0xD2850009,0x00000306,0xD286000A, + 0x00000106,0xD285000B,0x00000705,0xD286000C,0x00000505,0xD2850008, + 0x00000108,0xD2850007,0x00000507,0xD2850006,0x00000106,0x3212130A, + 0x3214170C,0xD2850005,0x00000505,0x32101109,0x320E0F0A,0x2212089F, + 0x32080906,0x380C1308,0x32080B04,0x380A0F06,0xD2860006,0x00002504, + 0xD2850005,0x00002505,0xD2850004,0x00002504,0xBF048210,0x320A0B06, + 0x7E0C0215,0x32080814,0x380A0D05,0xBF84000D,0xBF078110,0xBF85007A, + 0xBF048211,0xBF84002A,0xBF078111,0xBF850076,0xBF8C0F70,0x7E04020F, + 0x3202080E,0x38040B02,0xDC600000,0x00000001,0xBF810000,0xBF048410, + 0xBF840011,0xBF068210,0xBF84006B,0xBF048211,0xBF840028,0xBF078111, + 0xBF850067,0xBF8C0F70,0x24020288,0x28040101,0xD28F0000,0x00020881, + 0x7E06020D,0x3200000C,0x38020303,0xDC680000,0x00000200,0xBF810000, + 0xBF068410,0xBF84005A,0xBF048211,0xBF840026,0xBF078111,0xBF850056, + 0xBF8C0F70,0x24020288,0x28000101,0x24020490,0x28000300,0x24020698, + 0x28040300,0xBF820014,0xBF048411,0xBF84002B,0xBF068211,0xBF84004A, + 0xBF8C0F70,0xD28F0001,0x00020881,0x7E06020D,0x3202020C,0x38040503, + 0xDC680000,0x00000001,0xBF810000,0xBF048411,0xBF840029,0xBF068211, + 0xBF84003D,0xBF8C0F70,0x24020290,0x28040101,0xD28F0000,0x00020882, + 0x7E06020B,0x3200000A,0x38020303,0xDC700000,0x00000200,0xBF810000, + 0xBF048411,0xBF840025,0xBF068211,0xBF84002E,0xD28F0004,0x00020882, + 0xBF8C0F70,0x24020290,0x28000101,0x7E02020B,0x3208080A,0x380A0B01, + 0x24020690,0x28020501,0xDC740000,0x00000004,0xBF820021,0xBF068411, + 0xBF84001F,0xBF8C0F70,0xD28F0001,0x00020882,0x7E06020B,0x3202020A, + 0x38040503,0xDC700000,0x00000001,0xBF810000,0xBF068411,0xBF840014, + 0xBF8C0F70,0xD28F0002,0x00020882,0x7E08020B,0x3204040A,0x38060704, + 0xDC740000,0x00000002,0xBF810000,0xBF068411,0xBF840009,0xD28F0004, + 0x00020882,0x7E0C020B,0x3208080A,0x380A0B06,0xBF8C0F70,0xDC7C0000, + 0x00000004,0xBF810000,0xBF810000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0x00000001,0x00000002, + 0x00080001,0x00020000,0x00000100,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00AC02C6,0x00001390, + 0x000A000B,0x00000000,0x00000000,0x00000000,0x000000D0,0x00000000, + 0x00000000,0x001C0060,0x00000000,0x00000000,0x00000000,0x06040405, + 0xFFFFFFFF,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0xC0060502,0x00000004,0xC00E0303,0x00000040, + 0xBE8B00FF,0x0000FFFF,0xC00A0003,0x000000A0,0xC0060583,0x000000B0, + 0xBF8C007F,0x860F0B14,0x80048604,0x82058005,0x7E060204,0x7E080205, + 0xDC480000,0x03000003,0x92080F08,0x32000008,0x86040B15,0x920A040A, + 0x7E080201,0x32000000,0x38080880,0x3204040A,0x7E0C0217,0x32040416, + 0x38080C80,0x7E0A0203,0xD0C40000,0x00020010,0xBF8C0070,0xD2850003, + 0x00020609,0x32020303,0x32020202,0x38060A80,0x7D880211,0x86806A00, + 0x7D880412,0x86806A00,0xBE822000,0xBF8800B7,0xC00A0203,0x00000060, + 0xC00E0403,0x00000080,0xC00A0003,0x00000000,0xBF8C007F,0xC00E0503, + 0x00000020,0x2206049F,0x2208029F,0xD2850005,0x00002702,0xD2860006, + 0x00002502,0xD2850003,0x00002503,0xD2850008,0x00002301,0xD2850004, + 0x00002104,0x320A0B06,0xD2860006,0x00002101,0x32060705,0xD2850007, + 0x00002502,0xBF048208,0x320A1106,0xD2850006,0x00002101,0x32080905, + 0x220A009F,0x320C0106,0x38080B04,0x320A0F06,0x38060704,0xD2860004, + 0x00001505,0xD2850003,0x00001503,0xD2850005,0x00001505,0xBF8C007F, + 0x7E0C0215,0x32080704,0x32060A14,0x38080D04,0x3200000C,0x3202020D, + 0x3204040E,0xBF84000C,0xBF078108,0xBF850032,0xBF048209,0xBF840031, + 0xBF078109,0xBF850039,0x7E0A0201,0x32060600,0x38080905,0xDC400000, + 0x03000003,0xBF820072,0xBF048408,0xBF840012,0xBF068208,0xBF840024, + 0xBF048209,0xBF840035,0xBF078109,0xBF850055,0xD28F0003,0x00020681, + 0x7E0A0201,0x32060600,0x38080905,0xDC480000,0x04000003,0xBF8C0070, + 0x260608FF,0x000000FF,0x20080888,0xBF82005E,0xBF068408,0xBF840012, + 0xD28F0003,0x00020682,0xBF078109,0xBF85002F,0x7E0A0201,0x32060600, + 0x38080905,0xDC500000,0x06000003,0xBF8C0070,0x26060CFF,0x000000FF, + 0xD1C80004,0x02211106,0xD1C80005,0x02212106,0x200C0C98,0xBF82004A, + 0xBF820049,0xBF068209,0xBF840008,0xD28F0003,0x00020681,0x7E0A0201, + 0x32060600,0x38080905,0xDC480000,0x03000003,0xBF82003F,0xD28F0003, + 0x00020682,0x7E0A0201,0x32060600,0x38080905,0xDC500000,0x03000003, + 0xBF820037,0xBF068209,0xBF840020,0xD28F0003,0x00020682,0x7E0A0201, + 0x32060600,0x38080905,0xDC500000,0x04000003,0xBF8C0070,0x260608FF, + 0x0000FFFF,0x20080890,0xBF820029,0x7E0C0201,0x320A0600,0x380C0906, + 0xDC500000,0x04000005,0xBF078209,0xBF850015,0x320A0A84,0x380C0C80, + 0xDC500000,0x06000005,0xBE8000FF,0x0000FFFF,0xBF8C0171,0x26060800, + 0x20080890,0xBF8C0070,0x260A0C00,0x200C0C90,0xBF820015,0xD28F0003, + 0x00020682,0x7E0A0201,0x32060600,0x38080905,0xDC540000,0x03000003, + 0xBF82000D,0x32100A84,0x38120C80,0x320A0A8C,0x380C0C80,0xDC500000, + 0x07000005,0xDC540000,0x05000008,0xBF8C0070,0x7E060304,0x7E080305, + 0x7E0A0306,0x7E0C0307,0xC00E0001,0x00000000,0xBF8C0070,0xF0205F00, + 0x00000300,0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00080001,0x00020000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AC02C2,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0060,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0060402,0x00000004, + 0xC00A0003,0x00000040,0xBE8B00FF,0x0000FFFF,0xC00A0303,0x00000030, + 0xBF8C007F,0xC00200C3,0x00000050,0x86010B10,0x80048604,0x82058005, + 0x7E060204,0x7E080205,0xDC480000,0x03000003,0x92080108,0x86010B11, + 0x920A010A,0x32000008,0x3204040A,0x32000000,0xBF8C007F,0x32040403, + 0xD0C40000,0x0002000C,0xBF8C0F70,0xD2850003,0x00020609,0x32020303, + 0x32020202,0x7D88020D,0x86806A00,0x7D88040E,0x86806A00,0xBE822000, + 0xBF880017,0xC00A0203,0x00000000,0xC00A0303,0x00000010,0xC00A0403, + 0x00000020,0xBF8C007F,0xC00E0004,0x00000000,0x3206040E,0x320C0412, + 0x320A0211,0x3204020D,0x32080010,0x3202000C,0xBF8C007F,0xF0005F00, + 0x00000001,0xC00E0005,0x00000000,0xBF8C0070,0xF0205F00,0x00000004, + 0xBF810000,0xBF800000,0x00000001,0x00000002,0x00080001,0x00020000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC02C5,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x00150060, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0060402,0x00000004,0xC00A0003,0x00000048,0xBE8B00FF,0x0000FFFF, + 0xC00A0303,0x00000030,0xBF8C007F,0xC00200C3,0x00000058,0x86010B10, + 0x80048604,0x82058005,0x7E060204,0x7E080205,0xDC480000,0x03000003, + 0x92080108,0x86010B11,0x920A010A,0x32000008,0x3204040A,0x32000000, + 0xBF8C007F,0x32040403,0xD0C40000,0x0002000C,0xBF8C0F70,0xD2850003, + 0x00020609,0x32020303,0x32020202,0x7D88020D,0x86806A00,0x7D88040E, + 0x86806A00,0xBE822000,0xBF880442,0xC00A0003,0x00000000,0xC00A0403, + 0x00000010,0xBF8C007F,0xC00E0200,0x00000000,0x320A0412,0x32080211, + 0x32060010,0xBF8C007F,0xF0005F00,0x00020303,0xBF8C0F70,0x7C8E0703, + 0x000E0680,0x7E0602F2,0x7C9C0EF2,0xBE80206A,0xBF88015C,0x7E060280, + 0x7C960E80,0xBE84206A,0xBF880157,0xBE8800FF,0x3B4D2E1C,0x7C960E08, + 0xBE88206A,0x8888087E,0xBF88014D,0xD1740103,0x00000107,0xBE8A00FF, + 0x3F2AAAAB,0x7C88060A,0xD1000008,0x01A90280,0xD2880003,0x00021103, + 0x021406F2,0x7E1A450A,0x0416070A,0xD1730109,0x00000107,0x0418170A, + 0x34101109,0x021206F3,0x04061903,0x041616F2,0x0206070B,0x0A161B09, + 0xB00CF000,0x261C160C,0x2620140C,0x0A18170A,0x0422210A,0xD1C1000C, + 0x8432210E,0xD1C1000F,0x843A1B09,0x2C18230E,0x2C18210F,0x2C18230F, + 0x2C18070B,0xD1C10003,0x0432170A,0xD1C1000A,0x240E170A,0x0414150C, + 0x04180709,0x041C1909,0x0406070E,0x04061503,0x0206070C,0x2C16070D, + 0xD1C10009,0x242E1B09,0x7E100B08,0xD1C10003,0x8426070D,0x2614160C, + 0x0A12170B,0x0418150B,0xD1C10009,0x8426150A,0x021A150A,0x2C12190D, + 0x2C12190C,0x0A1A070B,0x2C121AF4,0x261E100C,0x0A2210FF,0xBF317218, + 0xBE8A00FF,0x3F317000,0x2C120703,0x04201F08,0x2C221E0A,0xD1C1000D, + 0x0426170B,0x2C22200A,0xBE8A00FF,0x38060000,0x2C221E0A,0x26261A0C, + 0x0A241B0B,0x2C22200A,0xD1C10012,0x844A1513,0xD1C1000E,0x2436170B, + 0x04121D09,0x2C2210FF,0xB102E308,0xBE8A00FF,0x3F317218,0x0428270D, + 0x2C241913,0x2C241514,0xD1C1000F,0x0446100A,0x0A14130B,0xD1C10008, + 0x243C1508,0x2C241914,0x2C14070D,0x7E1C02FF,0x3E91F4C4,0x04101111, + 0xD2880011,0x00010303,0x0206250A,0x2C1C1AFF,0x3E76C4E1,0xD1C1000A, + 0x040E1B0B,0x301C1D0D,0x3ECCCDEF,0xD2880010,0x0001030B,0xD1C1000B, + 0x242A1B0B,0x04061703,0x26181C0C,0x0A161D0D,0x0424190E,0xD1C1000B, + 0x842E1913,0x2C162513,0x2C161914,0x2C162514,0x2C161D09,0xD1C10009, + 0x042E1D0D,0xD1C1000C,0x24261D0D,0x0416190B,0x021812FF,0x3F2AAAAA, + 0x021A18FF,0xBF2AAAAA,0x04121B09,0x021616FF,0x31739010,0x02121709, + 0x0216130C,0x0418190B,0x04121909,0x261A140C,0x2624160C,0x0A18170A, + 0x0426250B,0xD1C1000C,0x8432250D,0x041C1B0A,0x2C18270D,0x2C18250E, + 0x0A061703,0x2C18270E,0x2C06130A,0x02061903,0xD1C10009,0x040E170A, + 0xD1C1000A,0x2426170A,0x04061503,0x02141310,0x0416210A,0x04121709, + 0x02060711,0x02060709,0x0212070A,0x04141509,0x04061503,0x0214130F, + 0x04161F0A,0x0418170A,0x04121709,0x0418190F,0x02160708,0x02121909, + 0x0418110B,0x041A190B,0x04101B08,0x04061903,0x02061103,0x0210130B, + 0x0212110A,0x04141509,0x04101508,0x02061103,0x02100709,0x04121308, + 0xBE8A00FF,0x3ED55555,0x04061303,0x2614100C,0x0A12100A,0xBE8B00FF, + 0x3ED55000,0x04161508,0xD1C1000C,0x8424170A,0x2C18160B,0xBE8B00FF, + 0x382AA000,0x2C18140B,0x2C18160B,0x2C18060A,0xB00D0204,0xD1C10003, + 0x0432100A,0xD010006A,0x00001B09,0xD1C10008,0x240C1508,0x00061303, + 0x0A1206FF,0x3FB8AA3B,0x0410110C,0xD010000A,0x00001B03,0xD1000008, + 0x00290108,0x7E123D09,0xBE8A00FF,0x3F317200,0xD1C1000A,0x240C1509, + 0x0416070A,0x0418170A,0x2C16120A,0x04181903,0x0416170C,0x02101708, + 0x0216110A,0x0414150B,0xBE8A00FF,0x35BFBC00,0x04101508,0xD1C1000A, + 0x242C1509,0x0416150B,0xD1C1000B,0x242C1509,0x02101708,0x0216110A, + 0x0414150B,0xBE8A00FF,0x2EA39EF3,0x04101508,0xD1C1000A,0x242C1509, + 0x0416150B,0xD1C1000B,0x242C1509,0x02101708,0x0216110A,0x261A160C, + 0x0A18170B,0x0414150B,0x041C1B0B,0xD1C1000C,0x84321B0D,0x021A1B0D, + 0x2C181D0D,0x04101508,0x7E1402FF,0x3C091DE6,0x2C181D0E,0x0A1A110B, + 0x2C1416FF,0x3AB42872,0x2C181AF4,0x3014150B,0x3D2AADCC,0x2C181108, + 0x3014150B,0x3E2AAA47,0xD1C1000D,0x0432170B,0x3014150B,0x3EFFFFFC, + 0xD1C1000E,0x2436170B,0x04181D0C,0x261E1A0C,0x2622140C,0x0A1C1B0A, + 0x0424230A,0xD1C1000E,0x843A230F,0x04201F0D,0x2C1C250F,0x2C1C2310, + 0x2C1C2510,0x2C1C150C,0xD1C1000C,0x043A1B0A,0xD1C1000A,0x24321B0A, + 0x021A190B,0x0416170D,0x0414150E,0x0416170C,0x02101508,0x7E121109, + 0x0210110B,0x0210110D,0x021010F2,0xBE8A00FF,0x42B20000,0xD2880008, + 0x00021308,0x7C9C060A,0x7E1202FF,0x7F800000,0xBE8A00FF,0xC2D00000, + 0x00101109,0x7C96060A,0xB00A03C0,0x00061080,0x7E1002FF,0x7FC00000, + 0xD010006A,0x00001507,0x00060708,0x7C9A0E80,0x00060680,0xD010006A, + 0x00001B07,0x00061303,0x260606FF,0x7FFFFFFF,0x7C900F07,0x00060F03, + 0x7C9A0EF2,0x001006F2,0x7E0602FF,0xBD6147AE,0x2C0610FF,0x3F870A3D, + 0xBE882108,0x88FE087E,0x0A060EFF,0x414EB852,0x87FE047E,0x87FE007E, + 0x7C8E0904,0x000E0880,0x7E0802F2,0x7C9C0EF2,0xBE80206A,0xBF88015B, + 0x7E080280,0x7C960E80,0x86FE6A7E,0xBF880157,0xBE8400FF,0x3B4D2E1C, + 0x7C960E04,0xBE84206A,0x8884047E,0xBF88014D,0xD1740104,0x00000107, + 0xBE8800FF,0x3F2AAAAB,0x7C880808,0xD1000008,0x01A90280,0xD2880004, + 0x00021104,0x021408F2,0x7E1A450A,0x0416090A,0xD1730109,0x00000107, + 0x0418170A,0x34101109,0x021208F3,0x04081904,0x041616F2,0x0208090B, + 0x0A161B09,0xB00AF000,0x261C160A,0x2620140A,0x0A18170A,0x0422210A, + 0xD1C1000C,0x8432210E,0xD1C1000F,0x843A1B09,0x2C18230E,0x2C18210F, + 0x2C18230F,0x2C18090B,0xD1C10004,0x0432170A,0xD1C1000A,0x2412170A, + 0x0414150C,0x04180909,0x041C1909,0x0408090E,0x04081504,0x0208090C, + 0x2C16090D,0xD1C10009,0x242E1B09,0x7E100B08,0xD1C10004,0x8426090D, + 0x2614160A,0x0A12170B,0x0418150B,0xD1C10009,0x8426150A,0x021A150A, + 0x2C12190D,0x2C12190C,0x0A1A090B,0x2C121AF4,0x261E100A,0x0A2210FF, + 0xBF317218,0xBE8800FF,0x3F317000,0x2C120904,0x04201F08,0x2C221E08, + 0xD1C1000D,0x0426170B,0x2C222008,0xBE8800FF,0x38060000,0x2C221E08, + 0x26261A0A,0x0A241B0B,0x2C222008,0xD1C10012,0x844A1513,0xD1C1000E, + 0x2436170B,0x04121D09,0x2C2210FF,0xB102E308,0xBE8800FF,0x3F317218, + 0x0428270D,0x2C241913,0x2C241514,0xD1C1000F,0x04461008,0x0A14130B, + 0xD1C10008,0x243C1108,0x2C241914,0x2C14090D,0x7E1C02FF,0x3E91F4C4, + 0x04101111,0xD2880011,0x00010304,0x0208250A,0x2C1C1AFF,0x3E76C4E1, + 0xD1C1000A,0x04121B0B,0x301C1D0D,0x3ECCCDEF,0xD2880010,0x0001030B, + 0xD1C1000B,0x242A1B0B,0x04081704,0x26181C0A,0x0A161D0D,0x0424190E, + 0xD1C1000B,0x842E1913,0x2C162513,0x2C161914,0x2C162514,0x2C161D09, + 0xD1C10009,0x042E1D0D,0xD1C1000C,0x24261D0D,0x0416190B,0x021812FF, + 0x3F2AAAAA,0x021A18FF,0xBF2AAAAA,0x04121B09,0x021616FF,0x31739010, + 0x02121709,0x0216130C,0x0418190B,0x04121909,0x261A140A,0x2624160A, + 0x0A18170A,0x0426250B,0xD1C1000C,0x8432250D,0x041C1B0A,0x2C18270D, + 0x2C18250E,0x0A081704,0x2C18270E,0x2C08130A,0x02081904,0xD1C10009, + 0x0412170A,0xD1C1000A,0x2426170A,0x04081504,0x02141310,0x0416210A, + 0x04121709,0x02080911,0x02080909,0x0212090A,0x04141509,0x04081504, + 0x0214130F,0x04161F0A,0x0418170A,0x04121709,0x0418190F,0x02160908, + 0x02121909,0x0418110B,0x041A190B,0x04101B08,0x04081904,0x02081104, + 0x0210130B,0x0212110A,0x04141509,0x04101508,0x02081104,0x02100909, + 0x04121308,0xBE8800FF,0x3ED55555,0x04081304,0x2614100A,0x0A121008, + 0xBE8900FF,0x3ED55000,0x04161508,0xD1C1000C,0x8424130A,0x2C181609, + 0xBE8900FF,0x382AA000,0x2C181409,0x2C181609,0x2C180808,0xB00B0204, + 0xD1C10004,0x04321008,0xD010006A,0x00001709,0xD1C10008,0x24101108, + 0x00081304,0x0A1208FF,0x3FB8AA3B,0x0410110C,0xD0100008,0x00001704, + 0xD1000008,0x00210108,0x7E123D09,0xBE8800FF,0x3F317200,0xD1C1000A, + 0x24101109,0x0416090A,0x0418170A,0x2C161208,0x04181904,0x0416170C, + 0x02101708,0x0216110A,0x0414150B,0xBE8800FF,0x35BFBC00,0x04101508, + 0xD1C1000A,0x242C1109,0x0416150B,0xD1C1000B,0x242C1109,0x02101708, + 0x0216110A,0x0414150B,0xBE8800FF,0x2EA39EF3,0x04101508,0xD1C1000A, + 0x242C1109,0x0416150B,0xD1C1000B,0x242C1109,0x02101708,0x0216110A, + 0x261A160A,0x0A18170B,0x0414150B,0x041C1B0B,0xD1C1000C,0x84321B0D, + 0x021A1B0D,0x2C181D0D,0x04101508,0x7E1402FF,0x3C091DE6,0x2C181D0E, + 0x0A1A110B,0x2C1416FF,0x3AB42872,0x2C181AF4,0x3014150B,0x3D2AADCC, + 0x2C181108,0x3014150B,0x3E2AAA47,0xD1C1000D,0x0432170B,0x3014150B, + 0x3EFFFFFC,0xD1C1000E,0x2436170B,0x04181D0C,0x261E1A0A,0x2622140A, + 0x0A1C1B0A,0x0424230A,0xD1C1000E,0x843A230F,0x04201F0D,0x2C1C250F, + 0x2C1C2310,0x2C1C2510,0x2C1C150C,0xD1C1000C,0x043A1B0A,0xD1C1000A, + 0x24321B0A,0x021A190B,0x0416170D,0x0414150E,0x0416170C,0x02101508, + 0x7E121109,0x0210110B,0x0210110D,0x021010F2,0xBE8800FF,0x42B20000, + 0xD2880008,0x00021308,0x7C9C0808,0x7E1202FF,0x7F800000,0xBE8800FF, + 0xC2D00000,0x00101109,0x7C960808,0xB00803C0,0x00081080,0x7E1002FF, + 0x7FC00000,0xD010006A,0x00001107,0x00080908,0x7C9A0E80,0x00080880, + 0xD010006A,0x00001707,0x00081304,0x260808FF,0x7FFFFFFF,0x7C900F07, + 0x00080F04,0x7C9A0EF2,0x001008F2,0x7E0802FF,0xBD6147AE,0x2C0810FF, + 0x3F870A3D,0xBE842104,0x88FE047E,0x0A080EFF,0x414EB852,0x87FE007E, + 0xC00A0103,0x00000020,0x7C8E0B05,0x000A0A80,0x7E0E02F2,0x7C9C0AF2, + 0xBE80206A,0xBF88015C,0x7E0E0280,0x7C960A80,0x86FE6A7E,0xBF880158, + 0xBF8C007F,0xBE8700FF,0x3B4D2E1C,0x7C960A07,0xBE88206A,0x8888087E, + 0xBF88014D,0xD1740107,0x00000105,0xBE8700FF,0x3F2AAAAB,0x7C880E07, + 0xD1000008,0x01A90280,0xD2880007,0x00021107,0x02140EF2,0x7E1A450A, + 0x04160F0A,0xD1730109,0x00000105,0x0418170A,0x34101109,0x02120EF3, + 0x040E1907,0x041616F2,0x020E0F0B,0x0A161B09,0xB007F000,0x261C1607, + 0x26201407,0x0A18170A,0x0422210A,0xD1C1000C,0x8432210E,0xD1C1000F, + 0x843A1B09,0x2C18230E,0x2C18210F,0x2C18230F,0x2C180F0B,0xD1C10007, + 0x0432170A,0xD1C1000A,0x241E170A,0x0414150C,0x04180F09,0x041C1909, + 0x040E0F0E,0x040E1507,0x020E0F0C,0x2C160F0D,0xD1C10009,0x242E1B09, + 0x7E100B08,0xD1C10007,0x84260F0D,0x26141607,0x0A12170B,0x0418150B, + 0xD1C10009,0x8426150A,0x021A150A,0x2C12190D,0x2C12190C,0x0A1A0F0B, + 0x2C121AF4,0x261E1007,0x0A2210FF,0xBF317218,0xBE8A00FF,0x3F317000, + 0x2C120F07,0x04201F08,0x2C221E0A,0xD1C1000D,0x0426170B,0x2C22200A, + 0xBE8A00FF,0x38060000,0x2C221E0A,0x26261A07,0x0A241B0B,0x2C22200A, + 0xD1C10012,0x844A1513,0xD1C1000E,0x2436170B,0x04121D09,0x2C2210FF, + 0xB102E308,0xBE8A00FF,0x3F317218,0x0428270D,0x2C241913,0x2C241514, + 0xD1C1000F,0x0446100A,0x0A14130B,0xD1C10008,0x243C1508,0x2C241914, + 0x2C140F0D,0x7E1C02FF,0x3E91F4C4,0x04101111,0xD2880011,0x00010307, + 0x020E250A,0x2C1C1AFF,0x3E76C4E1,0xD1C1000A,0x041E1B0B,0x301C1D0D, + 0x3ECCCDEF,0xD2880010,0x0001030B,0xD1C1000B,0x242A1B0B,0x040E1707, + 0x26181C07,0x0A161D0D,0x0424190E,0xD1C1000B,0x842E1913,0x2C162513, + 0x2C161914,0x2C162514,0x2C161D09,0xD1C10009,0x042E1D0D,0xD1C1000C, + 0x24261D0D,0x0416190B,0x021812FF,0x3F2AAAAA,0x021A18FF,0xBF2AAAAA, + 0x04121B09,0x021616FF,0x31739010,0x02121709,0x0216130C,0x0418190B, + 0x04121909,0x261A1407,0x26241607,0x0A18170A,0x0426250B,0xD1C1000C, + 0x8432250D,0x041C1B0A,0x2C18270D,0x2C18250E,0x0A0E1707,0x2C18270E, + 0x2C0E130A,0x020E1907,0xD1C10009,0x041E170A,0xD1C1000A,0x2426170A, + 0x040E1507,0x02141310,0x0416210A,0x04121709,0x020E0F11,0x020E0F09, + 0x02120F0A,0x04141509,0x040E1507,0x0214130F,0x04161F0A,0x0418170A, + 0x04121709,0x0418190F,0x02160F08,0x02121909,0x0418110B,0x041A190B, + 0x04101B08,0x040E1907,0x020E1107,0x0210130B,0x0212110A,0x04141509, + 0x04101508,0x020E1107,0x02100F09,0x04121308,0xBE8A00FF,0x3ED55555, + 0x040E1307,0x26141007,0x0A12100A,0xBE8B00FF,0x3ED55000,0x04161508, + 0xD1C1000C,0x8424170A,0x2C18160B,0xBE8B00FF,0x382AA000,0x2C18140B, + 0x2C18160B,0x2C180E0A,0xB00C0204,0xD1C10007,0x0432100A,0xD010006A, + 0x00001909,0xD1C10008,0x241C1508,0x000E1307,0x0A120EFF,0x3FB8AA3B, + 0x0410110C,0xD010000A,0x00001907,0xD1000008,0x00290108,0x7E123D09, + 0xBE8A00FF,0x3F317200,0xD1C1000A,0x241C1509,0x04160F0A,0x0418170A, + 0x2C16120A,0x04181907,0x0416170C,0x02101708,0x0216110A,0x0414150B, + 0xBE8A00FF,0x35BFBC00,0x04101508,0xD1C1000A,0x242C1509,0x0416150B, + 0xD1C1000B,0x242C1509,0x02101708,0x0216110A,0x0414150B,0xBE8A00FF, + 0x2EA39EF3,0x04101508,0xD1C1000A,0x242C1509,0x0416150B,0xD1C1000B, + 0x242C1509,0x02101708,0x0216110A,0x261A1607,0x0A18170B,0x0414150B, + 0x041C1B0B,0xD1C1000C,0x84321B0D,0x021A1B0D,0x2C181D0D,0x04101508, + 0x7E1402FF,0x3C091DE6,0x2C181D0E,0x0A1A110B,0x2C1416FF,0x3AB42872, + 0x2C181AF4,0x3014150B,0x3D2AADCC,0x2C181108,0x3014150B,0x3E2AAA47, + 0xD1C1000D,0x0432170B,0x3014150B,0x3EFFFFFC,0xD1C1000E,0x2436170B, + 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0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0060402,0x00000004, + 0xC00A0003,0x00000040,0xBE8B00FF,0x0000FFFF,0xC00A0303,0x00000030, + 0xBF8C007F,0xC00200C3,0x00000050,0x86010B10,0x80048604,0x82058005, + 0x7E060204,0x7E080205,0xDC480000,0x03000003,0x92080108,0x86010B11, + 0x920A010A,0x32000008,0x3204040A,0x32000000,0xBF8C007F,0x32040403, + 0xD0C40000,0x0002000C,0xBF8C0F70,0xD2850003,0x00020609,0x32020303, + 0x32020202,0x7D88020D,0x86806A00,0x7D88040E,0x86806A00,0xBE822000, + 0xBF880017,0xC00A0203,0x00000000,0xC00A0303,0x00000010,0xC00A0403, + 0x00000020,0xBF8C007F,0xC00E0004,0x00000000,0x3206040E,0x320C0412, + 0x320A0211,0x3204020D,0x32080010,0x3202000C,0xBF8C007F,0xF0005F00, + 0x00000001,0xC00E0005,0x00000000,0xBF8C0070,0xF0205F00,0x00000004, + 0xBF810000,0xBF800000,0x00000001,0x00000002,0x00080001,0x00030000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC0085,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x00150016, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0060402,0x00000004,0xC00A0003,0x00000048,0xBE8B00FF,0x0000FFFF, + 0xC00A0303,0x00000030,0xBF8C007F,0xC00200C3,0x00000058,0x86010B10, + 0x80048604,0x82058005,0x7E060204,0x7E080205,0xDC480000,0x03000003, + 0x92080108,0x86010B11,0x920A010A,0x32000008,0x3204040A,0x32000000, + 0xBF8C007F,0x32040403,0xD0C40000,0x0002000C,0xBF8C0F70,0xD2850003, + 0x00020609,0x32020303,0x32020202,0x7D88020D,0x86806A00,0x7D88040E, + 0x86806A00,0xBE822000,0xBF880442,0xC00A0003,0x00000000,0xC00A0403, + 0x00000010,0xBF8C007F,0xC00E0200,0x00000000,0x320A0412,0x32080211, + 0x32060010,0xBF8C007F,0xF0005F00,0x00020303,0xBF8C0F70,0x7C8E0703, + 0x000E0680,0x7E0602F2,0x7C9C0EF2,0xBE80206A,0xBF88015C,0x7E060280, + 0x7C960E80,0xBE84206A,0xBF880157,0xBE8800FF,0x3B4D2E1C,0x7C960E08, + 0xBE88206A,0x8888087E,0xBF88014D,0xD1740103,0x00000107,0xBE8A00FF, + 0x3F2AAAAB,0x7C88060A,0xD1000008,0x01A90280,0xD2880003,0x00021103, + 0x021406F2,0x7E1A450A,0x0416070A,0xD1730109,0x00000107,0x0418170A, + 0x34101109,0x021206F3,0x04061903,0x041616F2,0x0206070B,0x0A161B09, + 0xB00CF000,0x261C160C,0x2620140C,0x0A18170A,0x0422210A,0xD1C1000C, + 0x8432210E,0xD1C1000F,0x843A1B09,0x2C18230E,0x2C18210F,0x2C18230F, + 0x2C18070B,0xD1C10003,0x0432170A,0xD1C1000A,0x240E170A,0x0414150C, + 0x04180709,0x041C1909,0x0406070E,0x04061503,0x0206070C,0x2C16070D, + 0xD1C10009,0x242E1B09,0x7E100B08,0xD1C10003,0x8426070D,0x2614160C, + 0x0A12170B,0x0418150B,0xD1C10009,0x8426150A,0x021A150A,0x2C12190D, + 0x2C12190C,0x0A1A070B,0x2C121AF4,0x261E100C,0x0A2210FF,0xBF317218, + 0xBE8A00FF,0x3F317000,0x2C120703,0x04201F08,0x2C221E0A,0xD1C1000D, + 0x0426170B,0x2C22200A,0xBE8A00FF,0x38060000,0x2C221E0A,0x26261A0C, + 0x0A241B0B,0x2C22200A,0xD1C10012,0x844A1513,0xD1C1000E,0x2436170B, + 0x04121D09,0x2C2210FF,0xB102E308,0xBE8A00FF,0x3F317218,0x0428270D, + 0x2C241913,0x2C241514,0xD1C1000F,0x0446100A,0x0A14130B,0xD1C10008, + 0x243C1508,0x2C241914,0x2C14070D,0x7E1C02FF,0x3E91F4C4,0x04101111, + 0xD2880011,0x00010303,0x0206250A,0x2C1C1AFF,0x3E76C4E1,0xD1C1000A, + 0x040E1B0B,0x301C1D0D,0x3ECCCDEF,0xD2880010,0x0001030B,0xD1C1000B, + 0x242A1B0B,0x04061703,0x26181C0C,0x0A161D0D,0x0424190E,0xD1C1000B, + 0x842E1913,0x2C162513,0x2C161914,0x2C162514,0x2C161D09,0xD1C10009, + 0x042E1D0D,0xD1C1000C,0x24261D0D,0x0416190B,0x021812FF,0x3F2AAAAA, + 0x021A18FF,0xBF2AAAAA,0x04121B09,0x021616FF,0x31739010,0x02121709, + 0x0216130C,0x0418190B,0x04121909,0x261A140C,0x2624160C,0x0A18170A, + 0x0426250B,0xD1C1000C,0x8432250D,0x041C1B0A,0x2C18270D,0x2C18250E, + 0x0A061703,0x2C18270E,0x2C06130A,0x02061903,0xD1C10009,0x040E170A, + 0xD1C1000A,0x2426170A,0x04061503,0x02141310,0x0416210A,0x04121709, + 0x02060711,0x02060709,0x0212070A,0x04141509,0x04061503,0x0214130F, + 0x04161F0A,0x0418170A,0x04121709,0x0418190F,0x02160708,0x02121909, + 0x0418110B,0x041A190B,0x04101B08,0x04061903,0x02061103,0x0210130B, + 0x0212110A,0x04141509,0x04101508,0x02061103,0x02100709,0x04121308, + 0xBE8A00FF,0x3ED55555,0x04061303,0x2614100C,0x0A12100A,0xBE8B00FF, + 0x3ED55000,0x04161508,0xD1C1000C,0x8424170A,0x2C18160B,0xBE8B00FF, + 0x382AA000,0x2C18140B,0x2C18160B,0x2C18060A,0xB00D0204,0xD1C10003, + 0x0432100A,0xD010006A,0x00001B09,0xD1C10008,0x240C1508,0x00061303, + 0x0A1206FF,0x3FB8AA3B,0x0410110C,0xD010000A,0x00001B03,0xD1000008, + 0x00290108,0x7E123D09,0xBE8A00FF,0x3F317200,0xD1C1000A,0x240C1509, + 0x0416070A,0x0418170A,0x2C16120A,0x04181903,0x0416170C,0x02101708, + 0x0216110A,0x0414150B,0xBE8A00FF,0x35BFBC00,0x04101508,0xD1C1000A, + 0x242C1509,0x0416150B,0xD1C1000B,0x242C1509,0x02101708,0x0216110A, + 0x0414150B,0xBE8A00FF,0x2EA39EF3,0x04101508,0xD1C1000A,0x242C1509, + 0x0416150B,0xD1C1000B,0x242C1509,0x02101708,0x0216110A,0x261A160C, + 0x0A18170B,0x0414150B,0x041C1B0B,0xD1C1000C,0x84321B0D,0x021A1B0D, + 0x2C181D0D,0x04101508,0x7E1402FF,0x3C091DE6,0x2C181D0E,0x0A1A110B, + 0x2C1416FF,0x3AB42872,0x2C181AF4,0x3014150B,0x3D2AADCC,0x2C181108, + 0x3014150B,0x3E2AAA47,0xD1C1000D,0x0432170B,0x3014150B,0x3EFFFFFC, + 0xD1C1000E,0x2436170B,0x04181D0C,0x261E1A0C,0x2622140C,0x0A1C1B0A, + 0x0424230A,0xD1C1000E,0x843A230F,0x04201F0D,0x2C1C250F,0x2C1C2310, + 0x2C1C2510,0x2C1C150C,0xD1C1000C,0x043A1B0A,0xD1C1000A,0x24321B0A, + 0x021A190B,0x0416170D,0x0414150E,0x0416170C,0x02101508,0x7E121109, + 0x0210110B,0x0210110D,0x021010F2,0xBE8A00FF,0x42B20000,0xD2880008, + 0x00021308,0x7C9C060A,0x7E1202FF,0x7F800000,0xBE8A00FF,0xC2D00000, + 0x00101109,0x7C96060A,0xB00A03C0,0x00061080,0x7E1002FF,0x7FC00000, + 0xD010006A,0x00001507,0x00060708,0x7C9A0E80,0x00060680,0xD010006A, + 0x00001B07,0x00061303,0x260606FF,0x7FFFFFFF,0x7C900F07,0x00060F03, + 0x7C9A0EF2,0x001006F2,0x7E0602FF,0xBD6147AE,0x2C0610FF,0x3F870A3D, + 0xBE882108,0x88FE087E,0x0A060EFF,0x414EB852,0x87FE047E,0x87FE007E, + 0x7C8E0904,0x000E0880,0x7E0802F2,0x7C9C0EF2,0xBE80206A,0xBF88015B, + 0x7E080280,0x7C960E80,0x86FE6A7E,0xBF880157,0xBE8400FF,0x3B4D2E1C, + 0x7C960E04,0xBE84206A,0x8884047E,0xBF88014D,0xD1740104,0x00000107, + 0xBE8800FF,0x3F2AAAAB,0x7C880808,0xD1000008,0x01A90280,0xD2880004, + 0x00021104,0x021408F2,0x7E1A450A,0x0416090A,0xD1730109,0x00000107, + 0x0418170A,0x34101109,0x021208F3,0x04081904,0x041616F2,0x0208090B, + 0x0A161B09,0xB00AF000,0x261C160A,0x2620140A,0x0A18170A,0x0422210A, + 0xD1C1000C,0x8432210E,0xD1C1000F,0x843A1B09,0x2C18230E,0x2C18210F, + 0x2C18230F,0x2C18090B,0xD1C10004,0x0432170A,0xD1C1000A,0x2412170A, + 0x0414150C,0x04180909,0x041C1909,0x0408090E,0x04081504,0x0208090C, + 0x2C16090D,0xD1C10009,0x242E1B09,0x7E100B08,0xD1C10004,0x8426090D, + 0x2614160A,0x0A12170B,0x0418150B,0xD1C10009,0x8426150A,0x021A150A, + 0x2C12190D,0x2C12190C,0x0A1A090B,0x2C121AF4,0x261E100A,0x0A2210FF, + 0xBF317218,0xBE8800FF,0x3F317000,0x2C120904,0x04201F08,0x2C221E08, + 0xD1C1000D,0x0426170B,0x2C222008,0xBE8800FF,0x38060000,0x2C221E08, + 0x26261A0A,0x0A241B0B,0x2C222008,0xD1C10012,0x844A1513,0xD1C1000E, + 0x2436170B,0x04121D09,0x2C2210FF,0xB102E308,0xBE8800FF,0x3F317218, + 0x0428270D,0x2C241913,0x2C241514,0xD1C1000F,0x04461008,0x0A14130B, + 0xD1C10008,0x243C1108,0x2C241914,0x2C14090D,0x7E1C02FF,0x3E91F4C4, + 0x04101111,0xD2880011,0x00010304,0x0208250A,0x2C1C1AFF,0x3E76C4E1, + 0xD1C1000A,0x04121B0B,0x301C1D0D,0x3ECCCDEF,0xD2880010,0x0001030B, + 0xD1C1000B,0x242A1B0B,0x04081704,0x26181C0A,0x0A161D0D,0x0424190E, + 0xD1C1000B,0x842E1913,0x2C162513,0x2C161914,0x2C162514,0x2C161D09, + 0xD1C10009,0x042E1D0D,0xD1C1000C,0x24261D0D,0x0416190B,0x021812FF, + 0x3F2AAAAA,0x021A18FF,0xBF2AAAAA,0x04121B09,0x021616FF,0x31739010, + 0x02121709,0x0216130C,0x0418190B,0x04121909,0x261A140A,0x2624160A, + 0x0A18170A,0x0426250B,0xD1C1000C,0x8432250D,0x041C1B0A,0x2C18270D, + 0x2C18250E,0x0A081704,0x2C18270E,0x2C08130A,0x02081904,0xD1C10009, + 0x0412170A,0xD1C1000A,0x2426170A,0x04081504,0x02141310,0x0416210A, + 0x04121709,0x02080911,0x02080909,0x0212090A,0x04141509,0x04081504, + 0x0214130F,0x04161F0A,0x0418170A,0x04121709,0x0418190F,0x02160908, + 0x02121909,0x0418110B,0x041A190B,0x04101B08,0x04081904,0x02081104, + 0x0210130B,0x0212110A,0x04141509,0x04101508,0x02081104,0x02100909, + 0x04121308,0xBE8800FF,0x3ED55555,0x04081304,0x2614100A,0x0A121008, + 0xBE8900FF,0x3ED55000,0x04161508,0xD1C1000C,0x8424130A,0x2C181609, + 0xBE8900FF,0x382AA000,0x2C181409,0x2C181609,0x2C180808,0xB00B0204, + 0xD1C10004,0x04321008,0xD010006A,0x00001709,0xD1C10008,0x24101108, + 0x00081304,0x0A1208FF,0x3FB8AA3B,0x0410110C,0xD0100008,0x00001704, + 0xD1000008,0x00210108,0x7E123D09,0xBE8800FF,0x3F317200,0xD1C1000A, + 0x24101109,0x0416090A,0x0418170A,0x2C161208,0x04181904,0x0416170C, + 0x02101708,0x0216110A,0x0414150B,0xBE8800FF,0x35BFBC00,0x04101508, + 0xD1C1000A,0x242C1109,0x0416150B,0xD1C1000B,0x242C1109,0x02101708, + 0x0216110A,0x0414150B,0xBE8800FF,0x2EA39EF3,0x04101508,0xD1C1000A, + 0x242C1109,0x0416150B,0xD1C1000B,0x242C1109,0x02101708,0x0216110A, + 0x261A160A,0x0A18170B,0x0414150B,0x041C1B0B,0xD1C1000C,0x84321B0D, + 0x021A1B0D,0x2C181D0D,0x04101508,0x7E1402FF,0x3C091DE6,0x2C181D0E, + 0x0A1A110B,0x2C1416FF,0x3AB42872,0x2C181AF4,0x3014150B,0x3D2AADCC, + 0x2C181108,0x3014150B,0x3E2AAA47,0xD1C1000D,0x0432170B,0x3014150B, + 0x3EFFFFFC,0xD1C1000E,0x2436170B,0x04181D0C,0x261E1A0A,0x2622140A, + 0x0A1C1B0A,0x0424230A,0xD1C1000E,0x843A230F,0x04201F0D,0x2C1C250F, + 0x2C1C2310,0x2C1C2510,0x2C1C150C,0xD1C1000C,0x043A1B0A,0xD1C1000A, + 0x24321B0A,0x021A190B,0x0416170D,0x0414150E,0x0416170C,0x02101508, + 0x7E121109,0x0210110B,0x0210110D,0x021010F2,0xBE8800FF,0x42B20000, + 0xD2880008,0x00021308,0x7C9C0808,0x7E1202FF,0x7F800000,0xBE8800FF, + 0xC2D00000,0x00101109,0x7C960808,0xB00803C0,0x00081080,0x7E1002FF, + 0x7FC00000,0xD010006A,0x00001107,0x00080908,0x7C9A0E80,0x00080880, + 0xD010006A,0x00001707,0x00081304,0x260808FF,0x7FFFFFFF,0x7C900F07, + 0x00080F04,0x7C9A0EF2,0x001008F2,0x7E0802FF,0xBD6147AE,0x2C0810FF, + 0x3F870A3D,0xBE842104,0x88FE047E,0x0A080EFF,0x414EB852,0x87FE007E, + 0xC00A0103,0x00000020,0x7C8E0B05,0x000A0A80,0x7E0E02F2,0x7C9C0AF2, + 0xBE80206A,0xBF88015C,0x7E0E0280,0x7C960A80,0x86FE6A7E,0xBF880158, + 0xBF8C007F,0xBE8700FF,0x3B4D2E1C,0x7C960A07,0xBE88206A,0x8888087E, + 0xBF88014D,0xD1740107,0x00000105,0xBE8700FF,0x3F2AAAAB,0x7C880E07, + 0xD1000008,0x01A90280,0xD2880007,0x00021107,0x02140EF2,0x7E1A450A, + 0x04160F0A,0xD1730109,0x00000105,0x0418170A,0x34101109,0x02120EF3, + 0x040E1907,0x041616F2,0x020E0F0B,0x0A161B09,0xB007F000,0x261C1607, + 0x26201407,0x0A18170A,0x0422210A,0xD1C1000C,0x8432210E,0xD1C1000F, + 0x843A1B09,0x2C18230E,0x2C18210F,0x2C18230F,0x2C180F0B,0xD1C10007, + 0x0432170A,0xD1C1000A,0x241E170A,0x0414150C,0x04180F09,0x041C1909, + 0x040E0F0E,0x040E1507,0x020E0F0C,0x2C160F0D,0xD1C10009,0x242E1B09, + 0x7E100B08,0xD1C10007,0x84260F0D,0x26141607,0x0A12170B,0x0418150B, + 0xD1C10009,0x8426150A,0x021A150A,0x2C12190D,0x2C12190C,0x0A1A0F0B, + 0x2C121AF4,0x261E1007,0x0A2210FF,0xBF317218,0xBE8A00FF,0x3F317000, + 0x2C120F07,0x04201F08,0x2C221E0A,0xD1C1000D,0x0426170B,0x2C22200A, + 0xBE8A00FF,0x38060000,0x2C221E0A,0x26261A07,0x0A241B0B,0x2C22200A, + 0xD1C10012,0x844A1513,0xD1C1000E,0x2436170B,0x04121D09,0x2C2210FF, + 0xB102E308,0xBE8A00FF,0x3F317218,0x0428270D,0x2C241913,0x2C241514, + 0xD1C1000F,0x0446100A,0x0A14130B,0xD1C10008,0x243C1508,0x2C241914, + 0x2C140F0D,0x7E1C02FF,0x3E91F4C4,0x04101111,0xD2880011,0x00010307, + 0x020E250A,0x2C1C1AFF,0x3E76C4E1,0xD1C1000A,0x041E1B0B,0x301C1D0D, + 0x3ECCCDEF,0xD2880010,0x0001030B,0xD1C1000B,0x242A1B0B,0x040E1707, + 0x26181C07,0x0A161D0D,0x0424190E,0xD1C1000B,0x842E1913,0x2C162513, + 0x2C161914,0x2C162514,0x2C161D09,0xD1C10009,0x042E1D0D,0xD1C1000C, + 0x24261D0D,0x0416190B,0x021812FF,0x3F2AAAAA,0x021A18FF,0xBF2AAAAA, + 0x04121B09,0x021616FF,0x31739010,0x02121709,0x0216130C,0x0418190B, + 0x04121909,0x261A1407,0x26241607,0x0A18170A,0x0426250B,0xD1C1000C, + 0x8432250D,0x041C1B0A,0x2C18270D,0x2C18250E,0x0A0E1707,0x2C18270E, + 0x2C0E130A,0x020E1907,0xD1C10009,0x041E170A,0xD1C1000A,0x2426170A, + 0x040E1507,0x02141310,0x0416210A,0x04121709,0x020E0F11,0x020E0F09, + 0x02120F0A,0x04141509,0x040E1507,0x0214130F,0x04161F0A,0x0418170A, + 0x04121709,0x0418190F,0x02160F08,0x02121909,0x0418110B,0x041A190B, + 0x04101B08,0x040E1907,0x020E1107,0x0210130B,0x0212110A,0x04141509, + 0x04101508,0x020E1107,0x02100F09,0x04121308,0xBE8A00FF,0x3ED55555, + 0x040E1307,0x26141007,0x0A12100A,0xBE8B00FF,0x3ED55000,0x04161508, + 0xD1C1000C,0x8424170A,0x2C18160B,0xBE8B00FF,0x382AA000,0x2C18140B, + 0x2C18160B,0x2C180E0A,0xB00C0204,0xD1C10007,0x0432100A,0xD010006A, + 0x00001909,0xD1C10008,0x241C1508,0x000E1307,0x0A120EFF,0x3FB8AA3B, + 0x0410110C,0xD010000A,0x00001907,0xD1000008,0x00290108,0x7E123D09, + 0xBE8A00FF,0x3F317200,0xD1C1000A,0x241C1509,0x04160F0A,0x0418170A, + 0x2C16120A,0x04181907,0x0416170C,0x02101708,0x0216110A,0x0414150B, + 0xBE8A00FF,0x35BFBC00,0x04101508,0xD1C1000A,0x242C1509,0x0416150B, + 0xD1C1000B,0x242C1509,0x02101708,0x0216110A,0x0414150B,0xBE8A00FF, + 0x2EA39EF3,0x04101508,0xD1C1000A,0x242C1509,0x0416150B,0xD1C1000B, + 0x242C1509,0x02101708,0x0216110A,0x261A1607,0x0A18170B,0x0414150B, + 0x041C1B0B,0xD1C1000C,0x84321B0D,0x021A1B0D,0x2C181D0D,0x04101508, + 0x7E1402FF,0x3C091DE6,0x2C181D0E,0x0A1A110B,0x2C1416FF,0x3AB42872, + 0x2C181AF4,0x3014150B,0x3D2AADCC,0x2C181108,0x3014150B,0x3E2AAA47, + 0xD1C1000D,0x0432170B,0x3014150B,0x3EFFFFFC,0xD1C1000E,0x2436170B, + 0x04181D0C,0x261E1A07,0x26221407,0x0A1C1B0A,0x0424230A,0xD1C1000E, + 0x843A230F,0x04201F0D,0x2C1C250F,0x2C1C2310,0x2C1C2510,0x2C1C150C, + 0xD1C1000C,0x043A1B0A,0xD1C1000A,0x24321B0A,0x021A190B,0x0416170D, + 0x0414150E,0x0416170C,0x02101508,0x7E121109,0x0210110B,0x0210110D, + 0x021010F2,0xBE8700FF,0x42B20000,0xD2880008,0x00021308,0x7C9C0E07, + 0x7E1202FF,0x7F800000,0xBE8700FF,0xC2D00000,0x00101109,0x7C960E07, + 0xB00703C0,0x000E1080,0x7E1002FF,0x7FC00000,0xD010006A,0x00000F05, + 0x000E0F08,0x7C9A0A80,0x000E0E80,0xD010006A,0x00001905,0x000E1307, + 0x260E0EFF,0x7FFFFFFF,0x7C900B05,0x000E0B07,0x7C9A0AF2,0x00100EF2, + 0x7E0E02FF,0xBD6147AE,0x2C0E10FF,0x3F870A3D,0xBE882108,0x88FE087E, + 0x0A0E0AFF,0x414EB852,0x87FE007E,0xBF8C007F,0x32040406,0x32020205, + 0x32000004,0xC00E0001,0x00000000,0x7E0A0307,0xBF8C007F,0xF0205F00, + 0x00000300,0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00080001,0x00030000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AC0083,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000078,0x00000000,0x00000000,0x000D0016,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0060402,0x00000004, + 0xC00A0003,0x00000048,0xBE8B00FF,0x0000FFFF,0xC00A0303,0x00000030, + 0xBF8C007F,0xC00200C3,0x00000058,0x86010B10,0x80048604,0x82058005, + 0x7E060204,0x7E080205,0xDC480000,0x03000003,0x92080108,0x86010B11, + 0x920A010A,0x32000008,0x3204040A,0x32000000,0xBF8C007F,0x32040403, + 0xD0C40000,0x0002000C,0xBF8C0F70,0xD2850003,0x00020609,0x32020303, + 0x32020202,0x7D88020D,0x86806A00,0x7D88040E,0x86806A00,0xBE822000, + 0xBF880017,0xC00A0203,0x00000000,0xC00A0303,0x00000010,0xC00A0403, + 0x00000020,0xBF8C007F,0xC00E0004,0x00000000,0x3206040E,0x320C0412, + 0x320A0211,0x3204020D,0x32080010,0x3202000C,0xBF8C007F,0xF0005F00, + 0x00000001,0xC00E0005,0x00000000,0xBF8C0070,0xF0205F00,0x00000004, + 0xBF810000,0xBF800000,0x00000001,0x00000002,0x00080001,0x00030000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC0082,0x00000090,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000070,0x00000000,0x00000000,0x000C0012, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0020102,0x00000004,0xC00A0003,0x00000030,0xBF8C007F,0xC0020043, + 0x00000040,0x8602FF04,0x0000FFFF,0x92080208,0x32000008,0xBF8C007F, + 0x32000001,0x7D880000,0xBE80206A,0xC00A0203,0x00000000,0xC00E0003, + 0x00000010,0xBF8C007F,0xC00A0304,0x00000000,0xC00A0205,0x00000000, + 0x32020000,0x32080004,0xBF8C007F,0xE00C2000,0x80030001,0xBF8C0F70, + 0xE01C2000,0x80020004,0xBF810000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0x00000001,0x00000002, + 0x00080001,0x00030000,0x00000100,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00AC0102,0x00001390, + 0x000A000B,0x00000000,0x00000000,0x00000000,0x00000070,0x00000000, + 0x00000000,0x000C0022,0x00000000,0x00000000,0x00000000,0x06040404, + 0xFFFFFFFF,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0xC0020042,0x00000004,0xC00202C3,0x00000030, + 0xC0020303,0x00000040,0xBE8000FF,0x0000FFFF,0xBF8C007F,0x86010001, + 0x92080108,0x32000008,0x8002C006,0x3200000C,0x82038007,0x7D88000B, + 0xBE8C206A,0xBF880028,0xC0020203,0x00000010,0xC00A0503,0x00000020, + 0xC00A0601,0x00000008,0xC0020042,0x00000008,0xC00A0303,0x00000000, + 0xBF8C007F,0xC00A0706,0x00000000,0xC00E0307,0x00000000,0x86020001, + 0x80008604,0x82018005,0x7E080201,0x7E060200,0xDC480000,0x07000003, + 0x32060008,0xBF8C007F,0xE00C2000,0x80070303,0x920A020A,0x3204041A, + 0x32020218,0x3204040A,0x32040416,0x32000014,0xBF8C0F71,0xD2850007, + 0x00020E09,0x32020F01,0x32020215,0xBF8C0F70,0xF0205F00,0x00030300, + 0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00080001,0x00030000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AC0102,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0026,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0020042,0x00000004, + 0xC00E0303,0x00000020,0xC00202C3,0x00000040,0xBE8000FF,0x0000FFFF, + 0xBF8C007F,0x86010001,0x92080108,0x32000008,0x8002C006,0x3200000B, + 0x82038007,0x7D880010,0xBE8E206A,0xBF880025,0xC00A0603,0x00000010, + 0xC00A0701,0x00000008,0xC0020042,0x00000008,0xC00A0803,0x00000000, + 0x320C000C,0xBF8C007F,0xC00E0410,0x00000000,0x86020001,0x80008604, + 0x82018005,0x7E080201,0x7E060200,0xDC480000,0x04000003,0x920A020A, + 0x320A021C,0x3202041E,0x3202020A,0x3206021A,0x32020018,0xC00A0011, + 0x00000000,0xBF8C0070,0xD2850000,0x00020809,0x32000105,0x32040019, + 0xF0005F00,0x00040001,0xBF8C0F70,0xE01C2000,0x80000006,0xBF810000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00080001,0x00030000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AC00C5,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000098,0x00000000,0x00000000,0x0015001A, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 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0x7E0C0215,0x320A0414,0x38040C80,0x7E0E0203,0x7D88080C,0xBF8C0F70, + 0xD2850000,0x00020609,0x68000300,0xD1190006,0x00020002,0xD11C0000, + 0x00020E80,0xD0C40000,0x00020C0D,0x8680006A,0x7D880A0E,0x86806A00, + 0xBE822000,0xBF8800B4,0xC00E0203,0x00000000,0xC00A0803,0x00000020, + 0xC00E0503,0x00000040,0xC00E0003,0x00000080,0x22100C9F,0xBF8CC07F, + 0xC00E0604,0x00000000,0x68000820,0x68020C21,0x68040A22,0xD2850008, + 0x00000108,0xBF8CC07F,0xF0005F00,0x00060000,0xD2850009,0x00000306, + 0xD286000A,0x00000106,0xD2850006,0x00000106,0x220E0A9F,0xD2850007, + 0x00000507,0xD285000B,0x00000705,0xD286000C,0x00000505,0xD2850005, + 0x00000505,0xD1FF0008,0x0422130A,0x2212089F,0x32080906,0x380C1308, + 0xD1FF0007,0x041E170C,0x32080B04,0x380A0F06,0xD2860006,0x00002504, + 0xD2850005,0x00002505,0xD2850004,0x00002504,0xBF048210,0x680A0B06, + 0x7E0C0215,0x32080814,0x380A0D05,0xBF84000D,0xBF078110,0xBF85007A, + 0xBF048211,0xBF84002A,0xBF078111,0xBF850076,0xBF8C0F70,0x7E04020F, + 0x3202080E,0x38040B02,0xDC608000,0x007F0001,0xBF810000,0xBF048410, + 0xBF840011,0xBF068210,0xBF84006B,0xBF048211,0xBF840028,0xBF078111, + 0xBF850067,0xBF8C0F70,0xD2000002,0x04011101,0xD28F0000,0x00020881, + 0x7E06020D,0x3200000C,0x38020303,0xDC688000,0x007F0200,0xBF810000, + 0xBF068410,0xBF84005A,0xBF048211,0xBF840026,0xBF078111,0xBF850056, + 0xBF8C0F70,0xD2000000,0x04011101,0x24020490,0x24040698,0xD2020002, + 0x040A0300,0xBF820014,0xBF048411,0xBF84002B,0xBF068211,0xBF84004A, + 0xBF8C0F70,0xD28F0001,0x00020881,0x7E06020D,0x3202020C,0x38040503, + 0xDC688000,0x007F0001,0xBF810000,0xBF048411,0xBF840029,0xBF068211, + 0xBF84003D,0xBF8C0F70,0xD2000002,0x04012101,0xD28F0000,0x00020882, + 0x7E06020B,0x3200000A,0x38020303,0xDC708000,0x007F0200,0xBF810000, + 0xBF048411,0xBF840025,0xBF068211,0xBF84002E,0xD28F0004,0x00020882, + 0xBF8C0F70,0xD2000000,0x04012101,0x7E02020B,0x3208080A,0x380A0B01, + 0xD2000001,0x04092103,0xDC748000,0x007F0004,0xBF820021,0xBF068411, + 0xBF84001F,0xBF8C0F70,0xD28F0001,0x00020882,0x7E06020B,0x3202020A, + 0x38040503,0xDC708000,0x007F0001,0xBF810000,0xBF068411,0xBF840014, + 0xBF8C0F70,0xD28F0002,0x00020882,0x7E08020B,0x3204040A,0x38060704, + 0xDC748000,0x007F0002,0xBF810000,0xBF068411,0xBF840009,0xD28F0004, + 0x00020882,0x7E0C020B,0x3208080A,0x380A0B06,0xBF8C0F70,0xDC7C8000, + 0x007F0004,0xBF810000,0xBF810000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0x00000001,0x00000002, + 0x00090001,0x00000000,0x00000100,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00AF00C6,0x00001390, + 0x000A000B,0x00000000,0x00000000,0x00000000,0x000000D0,0x00000000, + 0x00000000,0x001C001E,0x00000000,0x00000000,0x00000000,0x06040405, + 0xFFFFFFFF,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x7E060204,0x7E080205,0xDC488006,0x037F0003, + 0xC0060102,0x00000004,0xC00E0303,0x00000040,0xC00A0003,0x000000A0, + 0xBE8B00FF,0x0000FFFF,0xC0060503,0x000000B0,0xBF8CC07F,0x86040B04, + 0x92080408,0x68000008,0x86040B05,0x920A040A,0x7E080201,0x32000000, + 0x6804040A,0x38080880,0x7E0A0203,0x7E0C0215,0x32040414,0x38080C80, + 0x7D880010,0xBF8C0F70,0xD2850003,0x00020609,0x68020303,0xD1190001, + 0x00020202,0xD11C0003,0x00020A80,0xD0C40000,0x00020211,0x8680006A, + 0x7D880412,0x86806A00,0xBE822000,0xBF8800AB,0xC00A0203,0x00000060, + 0xC00E0403,0x00000080,0x2206049F,0xC00A0003,0x00000000,0xBF8CC07F, + 0xC00E0503,0x00000020,0x2208029F,0xD2850003,0x00002503,0xD2850005, + 0x00002702,0xD2860006,0x00002502,0xD2850004,0x00002104,0xD2850007, + 0x00002301,0xD2860008,0x00002101,0xD1FF0003,0x040E0B06,0xD2850006, + 0x00002101,0xD2850005,0x00002502,0xD1FF0004,0x04120F08,0x220E009F, + 0x320C0106,0x38080F04,0x320A0B06,0x38060704,0xD2860004,0x00001505, + 0xD2850003,0x00001503,0xD2850005,0x00001505,0xBF8CC07F,0x7E0C0215, + 0x6800000C,0x68080704,0x32060A14,0x38080D04,0x6802020D,0x6804040E, + 0xBF048208,0xBF84000C,0xBF078108,0xBF850032,0xBF048209,0xBF840031, + 0xBF078109,0xBF850039,0x7E0A0201,0x32060600,0x38080905,0xDC408000, + 0x037F0003,0xBF820066,0xBF048408,0xBF840012,0xBF068208,0xBF840024, + 0xBF048209,0xBF840035,0xBF078109,0xBF850052,0xD28F0003,0x00020681, + 0x7E0A0201,0x32060600,0x38080905,0xDC488000,0x047F0003,0xBF8C0F70, + 0x260608FF,0x000000FF,0x20080888,0xBF820052,0xBF068408,0xBF840012, + 0xD28F0003,0x00020682,0x7E0A0201,0xBF078109,0xBF85002E,0x32060600, + 0x38080905,0xDC508000,0x067F0003,0xBF8C0F70,0x26060CFF,0x000000FF, + 0xD1C80004,0x02211106,0xD1C80005,0x02212106,0x200C0C98,0xBF82003E, + 0xBF82003D,0xBF068209,0xBF840008,0xD28F0003,0x00020681,0x7E0A0201, + 0x32060600,0x38080905,0xDC488000,0x037F0003,0xBF820033,0xD28F0003, + 0x00020682,0x7E0A0201,0x32060600,0x38080905,0xDC508000,0x037F0003, + 0xBF82002B,0xBF068209,0xBF84001D,0xD28F0003,0x00020682,0x7E0A0201, + 0x32060600,0x38080905,0xDC508000,0x047F0003,0xBF8C0F70,0x260608FF, + 0x0000FFFF,0x20080890,0xBF82001D,0x320C0600,0x380E0905,0xDC508000, + 0x037F0006,0xBF078209,0xBF850013,0xDC508004,0x067F0006,0xBE8000FF, + 0x0000FFFF,0xBF8C0F71,0x20080690,0x26060600,0xBF8C0F70,0x260A0C00, + 0x200C0C90,0xBF82000C,0xD28F0003,0x00020682,0x7E0A0201,0x32060600, + 0x38080905,0xDC548000,0x037F0003,0xBF820004,0xDC548004,0x047F0006, + 0xDC50800C,0x067F0006,0xC00E0001,0x00000000,0xBF8C0070,0xF0205F00, + 0x00000300,0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00090001,0x00000000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AF0082,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0016,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x7E060204,0x7E080205, + 0xDC488006,0x037F0003,0xC0060102,0x00000004,0xC00A0003,0x00000030, + 0xC00A0303,0x00000040,0xBF8CC07F,0xC00200C3,0x00000050,0xBE8B00FF, + 0x0000FFFF,0x86040B04,0x86050B05,0x92080408,0x68000008,0x920A050A, + 0x6804040A,0x6800000C,0xBF8CC07F,0x68040403,0x7D880000,0xBF8C0F70, + 0xD2850003,0x00020609,0x68020303,0x6802020E,0xD0C40000,0x00020201, + 0x8680006A,0x7D880402,0x86806A00,0xBE822000,0xBF880017,0xC00A0203, + 0x00000000,0xC00A0303,0x00000010,0xC00A0403,0x00000020,0xBF8CC07F, + 0xC00E0004,0x00000000,0x6806040E,0x680C0412,0x680A0211,0x6804020D, + 0x68080010,0x6802000C,0xBF8CC07F,0xF0005F00,0x00000001,0xC00E0005, + 0x00000000,0xBF8C0070,0xF0205F00,0x00000004,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00090001,0x00000000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AF0084,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x00120016, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x7E060204,0x7E080205,0xDC488006,0x037F0003,0xC0060102,0x00000004, + 0xC00A0003,0x00000030,0xC00A0303,0x00000048,0xBF8CC07F,0xC00200C3, + 0x00000058,0xBE8B00FF,0x0000FFFF,0x86040B04,0x86050B05,0x92080408, + 0x68000008,0x920A050A,0x6804040A,0x6800000C,0xBF8CC07F,0x68040403, + 0x7D880000,0xBF8C0F70,0xD2850003,0x00020609,0x68020303,0x6802020E, + 0xD0C40000,0x00020201,0x8680006A,0x7D880402,0x86806A00,0xBE822000, + 0xBF880391,0xC00A0003,0x00000000,0xC00A0403,0x00000010,0xBF8CC07F, + 0xC00E0200,0x00000000,0x680A0412,0x68080211,0x68060010,0xBF8CC07F, + 0xF0005F00,0x00020303,0xBF8C0F70,0x7C8E0703,0x000E0680,0x7E0602F2, + 0x7C9C0EF2,0xBE80206A,0xBF880121,0x7E060280,0x7C960E80,0xBE84206A, + 0xBF88011C,0xBE8800FF,0x3B4D2E1C,0x7C960E08,0xBE88206A,0x8888087E, + 0xBF880112,0xD1740103,0x00000107,0xBE8A00FF,0x3F2AAAAB,0x7C88060A, + 0xD1000008,0x01A90280,0xD2880003,0x00021103,0x021406F2,0x7E1A450A, + 0x0416070A,0xD1730109,0x00000107,0x0418170A,0x6A101109,0x021206F3, + 0x04061903,0x041616F2,0x0206070B,0x0A161B09,0x0A18170A,0xD1CB000A, + 0x8432150B,0xD1CB0003,0x042A070B,0x0214070C,0x0418190A,0x04061903, + 0x04181509,0x04121909,0x04121509,0x04060709,0x0206070C,0x0A06070D, + 0x0212070B,0x04141709,0x04061503,0x0A141309,0xD1CB000B,0x842A1309, + 0x02180703,0xD1CB000B,0x042E1909,0xD1CB000B,0x042E0703,0x0218170A, + 0x0414150C,0x7E100B08,0x0414150B,0xBE8A00FF,0x3E76C4E1,0x7E1602FF, + 0x3E91F4C4,0xD1CB000B,0x042C150C,0xBE8A00FF,0x3ECCCDEF,0xD1CB000B, + 0x002A170C,0xBE8A00FF,0x3F317218,0x0A1A100A,0xD1CB000E,0x84341508, + 0xBE8A00FF,0xB102E308,0xD1CB0008,0x04381508,0x021C110D,0x041A1B0E, + 0x0A201909,0x04101B08,0xD288000D,0x00010309,0xD1CB0011,0x8442130C, + 0x0A121509,0xD288000F,0x00010303,0xD1CB0003,0x0426070C,0x02060711, + 0x02120710,0x04202109,0x04062103,0x0A20170C,0xD1CB000C,0x8442170C, + 0xD1CB000A,0x0432170A,0x02161510,0x0418210B,0x0414190A,0x021816FF, + 0x3F2AAAAA,0x022018FF,0xBF2AAAAA,0x0416210B,0x021414FF,0x31739010, + 0x0214150B,0x0216150C,0x0418190B,0x0414190A,0x0A061703,0x0A181709, + 0xD1CB0010,0x84321709,0xD1CB0003,0x040E1509,0x02060710,0x0212070C, + 0x04141909,0x04061503,0x0214130D,0x04161B0A,0x04121709,0x0206070F, + 0x02060709,0x0212070A,0x04141509,0x04061503,0x0214130E,0x04161D0A, + 0x0418170A,0x04121709,0x0418190E,0x02160708,0x02121909,0x0418110B, + 0x041A190B,0x04101B08,0x04061903,0x02061103,0x0210130B,0x0212110A, + 0x04141509,0x04101508,0x02061103,0x02100709,0x04121308,0xBE8A00FF, + 0x3ED55555,0x04061303,0x0A12100A,0xD1CB0008,0x84241508,0xD1CB0003, + 0x04201503,0xB00C0204,0x02100709,0xD010006A,0x00001909,0x04141308, + 0x00101308,0x0A1210FF,0x3FB8AA3B,0x7E123D09,0x04061503,0x0A1412FF, + 0x3F317200,0x04161508,0x0418110B,0x041A190B,0xD010000A,0x00001908, + 0x041A1B08,0x0214190A,0xD1000003,0x00290103,0x0414150D,0x02061503, + 0x0214070B,0x0416170A,0x04061703,0x0A1612FF,0x35BFBC00,0x0418170A, + 0x0414190A,0x0414170A,0x02061503,0x0214070C,0x0416190A,0x04061703, + 0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A,0x0414170A,0x02061503, + 0x0214070C,0x0416190A,0x04061703,0x0A18150A,0xBE8A00FF,0x3AB42872, + 0x7E1602FF,0x3C091DE6,0xD1CB000D,0x8432150A,0x021C0703,0xD1CB000D, + 0x04361D0A,0xD1CB000B,0x042C150A,0xBE8A00FF,0x3D2AADCC,0xD1CB000B, + 0x002A170A,0xBE8A00FF,0x3E2AAA47,0xD1CB000D,0x04360703,0x021C1B0C, + 0xD1CB000B,0x002A170A,0xBE8A00FF,0x3EFFFFFC,0x0418190E,0xD1CB000B, + 0x002A170A,0x0418190D,0x0A1A1D0B,0xD1CB000E,0x8436170E,0xD1CB000B, + 0x043A170C,0x0218170D,0x041A1B0C,0x04161B0B,0x021A190A,0x0414150D, + 0x0414150C,0x02061703,0x7E121109,0x0206070A,0x0206070D,0x020606F2, + 0xBE8A00FF,0x42B20000,0xD2880003,0x00021303,0x7C9C100A,0x7E1202FF, + 0x7F800000,0xBE8A00FF,0xC2D00000,0x00060709,0x7C96100A,0xB00A03C0, + 0x00060680,0xD010006A,0x00001507,0x7E1002FF,0x7FC00000,0x00060708, + 0x7C9A0E80,0x00060680,0xD010006A,0x00001907,0x00061303,0x260606FF, + 0x7FFFFFFF,0x7C900F07,0x00060F03,0x7C9A0EF2,0x000606F2,0xBE8A00FF, + 0x3F870A3D,0x7E1002FF,0xBD6147AE,0xD1CB0003,0x04201503,0xBE882108, + 0x88FE087E,0x0A060EFF,0x414EB852,0x87FE047E,0x87FE007E,0x7C8E0904, + 0x000E0880,0x7E0802F2,0x7C9C0EF2,0xBE80206A,0xBF880120,0x7E080280, + 0x7C960E80,0x86FE6A7E,0xBF88011C,0xBE8400FF,0x3B4D2E1C,0x7C960E04, + 0xBE84206A,0x8884047E,0xBF880112,0xD1740104,0x00000107,0xBE8800FF, + 0x3F2AAAAB,0x7C880808,0xD1000008,0x01A90280,0xD2880004,0x00021104, + 0x021408F2,0x7E1A450A,0x0416090A,0xD1730109,0x00000107,0x0418170A, + 0x6A101109,0x021208F3,0x04081904,0x041616F2,0x0208090B,0x0A161B09, + 0x0A18170A,0xD1CB000A,0x8432150B,0xD1CB0004,0x042A090B,0x0214090C, + 0x0418190A,0x04081904,0x04181509,0x04121909,0x04121509,0x04080909, + 0x0208090C,0x0A08090D,0x0212090B,0x04141709,0x04081504,0x0A141309, + 0xD1CB000B,0x842A1309,0x02180904,0xD1CB000B,0x042E1909,0xD1CB000B, + 0x042E0904,0x0218170A,0x0414150C,0x7E100B08,0x0414150B,0xBE8800FF, + 0x3E76C4E1,0x7E1602FF,0x3E91F4C4,0xD1CB000B,0x042C110C,0xBE8800FF, + 0x3ECCCDEF,0xD1CB000B,0x0022170C,0xBE8800FF,0x3F317218,0x0A1A1008, + 0xD1CB000E,0x84341108,0xBE8800FF,0xB102E308,0xD1CB0008,0x04381108, + 0x021C110D,0x041A1B0E,0x0A201909,0x04101B08,0xD288000D,0x00010309, + 0xD1CB0011,0x8442130C,0x0A121509,0xD288000F,0x00010304,0xD1CB0004, + 0x0426090C,0x02080911,0x02120910,0x04202109,0x04082104,0x0A20170C, + 0xD1CB000C,0x8442170C,0xD1CB000A,0x0432170A,0x02161510,0x0418210B, + 0x0414190A,0x021816FF,0x3F2AAAAA,0x022018FF,0xBF2AAAAA,0x0416210B, + 0x021414FF,0x31739010,0x0214150B,0x0216150C,0x0418190B,0x0414190A, + 0x0A081704,0x0A181709,0xD1CB0010,0x84321709,0xD1CB0004,0x04121509, + 0x02080910,0x0212090C,0x04141909,0x04081504,0x0214130D,0x04161B0A, + 0x04121709,0x0208090F,0x02080909,0x0212090A,0x04141509,0x04081504, + 0x0214130E,0x04161D0A,0x0418170A,0x04121709,0x0418190E,0x02160908, + 0x02121909,0x0418110B,0x041A190B,0x04101B08,0x04081904,0x02081104, + 0x0210130B,0x0212110A,0x04141509,0x04101508,0x02081104,0x02100909, + 0x04121308,0xBE8800FF,0x3ED55555,0x04081304,0x0A121008,0xD1CB0008, + 0x84241108,0xD1CB0004,0x04201104,0xB00A0204,0x02100909,0xD010006A, + 0x00001509,0x04141308,0x00101308,0x0A1210FF,0x3FB8AA3B,0x7E123D09, + 0x04081504,0x0A1412FF,0x3F317200,0x04161508,0x0418110B,0x041A190B, + 0xD0100008,0x00001508,0x041A1B08,0x0214190A,0xD1000004,0x00210104, + 0x0414150D,0x02081504,0x0214090B,0x0416170A,0x04081704,0x0A1612FF, + 0x35BFBC00,0x0418170A,0x0414190A,0x0414170A,0x02081504,0x0214090C, + 0x0416190A,0x04081704,0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A, + 0x0414170A,0x02081504,0x0214090C,0x0416190A,0x04081704,0x0A18150A, + 0xBE8800FF,0x3AB42872,0x7E1602FF,0x3C091DE6,0xD1CB000D,0x8432150A, + 0x021C0904,0xD1CB000D,0x04361D0A,0xD1CB000B,0x042C110A,0xBE8800FF, + 0x3D2AADCC,0xD1CB000B,0x0022170A,0xBE8800FF,0x3E2AAA47,0xD1CB000D, + 0x04360904,0x021C1B0C,0xD1CB000B,0x0022170A,0xBE8800FF,0x3EFFFFFC, + 0x0418190E,0xD1CB000B,0x0022170A,0x0418190D,0x0A1A1D0B,0xD1CB000E, + 0x8436170E,0xD1CB000B,0x043A170C,0x0218170D,0x041A1B0C,0x04161B0B, + 0x021A190A,0x0414150D,0x0414150C,0x02081704,0x7E121109,0x0208090A, + 0x0208090D,0x020808F2,0xBE8800FF,0x42B20000,0xD2880004,0x00021304, + 0x7C9C1008,0x7E1202FF,0x7F800000,0xBE8800FF,0xC2D00000,0x00080909, + 0x7C961008,0xB00803C0,0x00080880,0xD010006A,0x00001107,0x7E1002FF, + 0x7FC00000,0x00080908,0x7C9A0E80,0x00080880,0xD010006A,0x00001507, + 0x00081304,0x260808FF,0x7FFFFFFF,0x7C900F07,0x00080F04,0x7C9A0EF2, + 0x000808F2,0xBE8800FF,0x3F870A3D,0x7E1002FF,0xBD6147AE,0xD1CB0004, + 0x04201104,0xBE842104,0x88FE047E,0x0A080EFF,0x414EB852,0x87FE007E, + 0xC00A0103,0x00000020,0x7C8E0B05,0x000A0A80,0x7E0E02F2,0x7C9C0AF2, + 0xBE80206A,0xBF880121,0x7E0E0280,0x7C960A80,0x86FE6A7E,0xBF88011D, + 0xBF8CC07F,0xBE8700FF,0x3B4D2E1C,0x7C960A07,0xBE88206A,0x8888087E, + 0xBF880112,0xD1740107,0x00000105,0xBE8700FF,0x3F2AAAAB,0x7C880E07, + 0xD1000008,0x01A90280,0xD2880007,0x00021107,0x02140EF2,0x7E1A450A, + 0x04160F0A,0xD1730109,0x00000105,0x0418170A,0x6A101109,0x02120EF3, + 0x040E1907,0x041616F2,0x020E0F0B,0x0A161B09,0x0A18170A,0xD1CB000A, + 0x8432150B,0xD1CB0007,0x042A0F0B,0x02140F0C,0x0418190A,0x040E1907, + 0x04181509,0x04121909,0x04121509,0x040E0F09,0x020E0F0C,0x0A0E0F0D, + 0x02120F0B,0x04141709,0x040E1507,0x0A141309,0xD1CB000B,0x842A1309, + 0x02180F07,0xD1CB000B,0x042E1909,0xD1CB000B,0x042E0F07,0x0218170A, + 0x0414150C,0x7E100B08,0x0414150B,0xBE8700FF,0x3E76C4E1,0x7E1602FF, + 0x3E91F4C4,0xD1CB000B,0x042C0F0C,0xBE8700FF,0x3ECCCDEF,0xD1CB000B, + 0x001E170C,0xBE8700FF,0x3F317218,0x0A1A1007,0xD1CB000E,0x84340F08, + 0xBE8700FF,0xB102E308,0xD1CB0008,0x04380F08,0x021C110D,0x041A1B0E, + 0x0A201909,0x04101B08,0xD288000D,0x00010309,0xD1CB0011,0x8442130C, + 0x0A121509,0xD288000F,0x00010307,0xD1CB0007,0x04260F0C,0x020E0F11, + 0x02120F10,0x04202109,0x040E2107,0x0A20170C,0xD1CB000C,0x8442170C, + 0xD1CB000A,0x0432170A,0x02161510,0x0418210B,0x0414190A,0x021816FF, + 0x3F2AAAAA,0x022018FF,0xBF2AAAAA,0x0416210B,0x021414FF,0x31739010, + 0x0214150B,0x0216150C,0x0418190B,0x0414190A,0x0A0E1707,0x0A181709, + 0xD1CB0010,0x84321709,0xD1CB0007,0x041E1509,0x020E0F10,0x02120F0C, + 0x04141909,0x040E1507,0x0214130D,0x04161B0A,0x04121709,0x020E0F0F, + 0x020E0F09,0x02120F0A,0x04141509,0x040E1507,0x0214130E,0x04161D0A, + 0x0418170A,0x04121709,0x0418190E,0x02160F08,0x02121909,0x0418110B, + 0x041A190B,0x04101B08,0x040E1907,0x020E1107,0x0210130B,0x0212110A, + 0x04141509,0x04101508,0x020E1107,0x02100F09,0x04121308,0xBE8700FF, + 0x3ED55555,0x040E1307,0x0A121007,0xD1CB0008,0x84240F08,0xD1CB0007, + 0x04200F07,0xB0070204,0x02100F09,0xD010006A,0x00000F09,0x04141308, + 0x00101308,0x0A1210FF,0x3FB8AA3B,0x7E123D09,0x040E1507,0x0A1412FF, + 0x3F317200,0x04161508,0x0418110B,0x041A190B,0xD010000A,0x00000F08, + 0x041A1B08,0x0214190A,0xD1000007,0x00290107,0x0414150D,0x020E1507, + 0x02140F0B,0x0416170A,0x040E1707,0x0A1612FF,0x35BFBC00,0x0418170A, + 0x0414190A,0x0414170A,0x020E1507,0x02140F0C,0x0416190A,0x040E1707, + 0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A,0x0414170A,0x020E1507, + 0x02140F0C,0x0416190A,0x040E1707,0x0A18150A,0xBE8A00FF,0x3AB42872, + 0x7E1602FF,0x3C091DE6,0xD1CB000D,0x8432150A,0x021C0F07,0xD1CB000D, + 0x04361D0A,0xD1CB000B,0x042C150A,0xBE8A00FF,0x3D2AADCC,0xD1CB000B, + 0x002A170A,0xBE8A00FF,0x3E2AAA47,0xD1CB000D,0x04360F07,0x021C1B0C, + 0xD1CB000B,0x002A170A,0xBE8A00FF,0x3EFFFFFC,0x0418190E,0xD1CB000B, + 0x002A170A,0x0418190D,0x0A1A1D0B,0xD1CB000E,0x8436170E,0xD1CB000B, + 0x043A170C,0x0218170D,0x041A1B0C,0x04161B0B,0x021A190A,0x0414150D, + 0x0414150C,0x020E1707,0x7E121109,0x020E0F0A,0x020E0F0D,0x020E0EF2, + 0xBE8A00FF,0x42B20000,0xD2880007,0x00021307,0x7C9C100A,0x7E1202FF, + 0x7F800000,0xBE8A00FF,0xC2D00000,0x000E0F09,0x7C96100A,0xB00A03C0, + 0x000E0E80,0x7E1002FF,0x7FC00000,0xD010006A,0x00001505,0x000E0F08, + 0x7C9A0A80,0x000E0E80,0xD010006A,0x00000F05,0x000E1307,0x260E0EFF, + 0x7FFFFFFF,0x7C900B05,0x000E0B07,0x7C9A0AF2,0x000E0EF2,0xBE8700FF, + 0x3F870A3D,0x7E1002FF,0xBD6147AE,0xD1CB0007,0x04200F07,0xBE882108, + 0x88FE087E,0x0A0E0AFF,0x414EB852,0x87FE007E,0xBF8CC07F,0x68040406, + 0x68020205,0x68000004,0xC00E0001,0x00000000,0x7E0A0307,0xBF8CC07F, + 0xF0205F00,0x00000300,0xBF810000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00090001,0x00000000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AF0083,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000078,0x00000000,0x00000000,0x000D0016,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x7E060204,0x7E080205, + 0xDC488006,0x037F0003,0xC0060102,0x00000004,0xC00A0003,0x00000030, + 0xC00A0303,0x00000048,0xBF8CC07F,0xC00200C3,0x00000058,0xBE8B00FF, + 0x0000FFFF,0x86040B04,0x86050B05,0x92080408,0x68000008,0x920A050A, + 0x6804040A,0x6800000C,0xBF8CC07F,0x68040403,0x7D880000,0xBF8C0F70, + 0xD2850003,0x00020609,0x68020303,0x6802020E,0xD0C40000,0x00020201, + 0x8680006A,0x7D880402,0x86806A00,0xBE822000,0xBF880017,0xC00A0203, + 0x00000000,0xC00A0303,0x00000010,0xC00A0403,0x00000020,0xBF8CC07F, + 0xC00E0004,0x00000000,0x6806040E,0x680C0412,0x680A0211,0x6804020D, + 0x68080010,0x6802000C,0xBF8CC07F,0xF0005F00,0x00000001,0xC00E0005, + 0x00000000,0xBF8C0070,0xF0205F00,0x00000004,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00090001,0x00000000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AF0082,0x00000090,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000070,0x00000000,0x00000000,0x000C0012, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0020102,0x00000004,0xC00A0003,0x00000030,0xBF8CC07F,0xC0020043, + 0x00000040,0x8602FF04,0x0000FFFF,0x92080208,0x68000008,0xBF8CC07F, + 0x68000001,0x7D880000,0xBE80206A,0xC00A0203,0x00000000,0xC00E0003, + 0x00000010,0xBF8CC07F,0xC00A0304,0x00000000,0xC00A0205,0x00000000, + 0x68020000,0x68080004,0xBF8CC07F,0xE00C2000,0x80030001,0xBF8C0F70, + 0xE01C2000,0x80020004,0xBF810000,0xBF800000,0xBF800000,0xBF800000, + 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0xC00A0303,0x00000010,0xC00A0403,0x00000020,0xBF800000,0xBF8CC07F, + 0xC00E0004,0x00000000,0x6806040E,0x680C0412,0x680A0211,0x6804020D, + 0x68080010,0x6802000C,0xBF800000,0xBF8CC07F,0xBF800000,0xF0005F00, + 0x00000001,0xC00E0005,0x00000000,0xBF8C0070,0xF0205F00,0x00000004, + 0xBF810000,0xBF800000,0x00000001,0x00000002,0x00090001,0x00020000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AF0084,0x00001390,0x004A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x00120018, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x7E060204,0x7E080205,0xC0060402,0x00000004,0xDC488006,0x037F0003, + 0xC00A0003,0x00000030,0xC00A0303,0x00000048,0xC00202C3,0x00000058, + 0xBF8CC07F,0xBE8300FF,0x0000FFFF,0x86040310,0x86030311,0x92080408, + 0x68000008,0x920A030A,0x6804040A,0x6800000C,0x6804040B,0x7D880000, + 0xBF8C0F70,0xD2850003,0x00020609,0x68020303,0x6802020E,0xD0C40000, + 0x00020201,0x8680006A,0x7D880402,0x86806A00,0xBE822000,0xBF880396, + 0xC00A0003,0x00000000,0xC00A0403,0x00000010,0xBF800000,0xBF8CC07F, + 0xC00E0200,0x00000000,0x680A0412,0x68080211,0x68060010,0xBF800000, + 0xBF8CC07F,0xBF800000,0xF0005F00,0x00020303,0xBF8C0F70,0x7C8E0703, + 0x000E0680,0x7E0602F2,0x7C9C0EF2,0xBE80206A,0xBF880121,0x7E060280, + 0x7C960E80,0xBE84206A,0xBF88011C,0xBE8800FF,0x3B4D2E1C,0x7C960E08, + 0xBE88206A,0x8888087E,0xBF880112,0xD1740103,0x00000107,0xBE8A00FF, + 0x3F2AAAAB,0x7C88060A,0xD1000008,0x01A90280,0xD2880003,0x00021103, + 0x021406F2,0x7E1A450A,0x0416070A,0xD1730109,0x00000107,0x0418170A, + 0x6A101109,0x021206F3,0x04061903,0x041616F2,0x0206070B,0x0A161B09, + 0x0A18170A,0xD1CB000A,0x8432150B,0xD1CB0003,0x042A070B,0x0214070C, + 0x0418190A,0x04061903,0x04181509,0x04121909,0x04121509,0x04060709, + 0x0206070C,0x0A06070D,0x0212070B,0x04141709,0x04061503,0x0A141309, + 0xD1CB000B,0x842A1309,0x02180703,0xD1CB000B,0x042E1909,0xD1CB000B, + 0x042E0703,0x0218170A,0x0414150C,0x7E100B08,0x0414150B,0xBE8A00FF, + 0x3E76C4E1,0x7E1602FF,0x3E91F4C4,0xD1CB000B,0x042C150C,0xBE8A00FF, + 0x3ECCCDEF,0xD1CB000B,0x002A170C,0xBE8A00FF,0x3F317218,0x0A1A100A, + 0xD1CB000E,0x84341508,0xBE8A00FF,0xB102E308,0xD1CB0008,0x04381508, + 0x021C110D,0x041A1B0E,0x0A201909,0x04101B08,0xD288000D,0x00010309, + 0xD1CB0011,0x8442130C,0x0A121509,0xD288000F,0x00010303,0xD1CB0003, + 0x0426070C,0x02060711,0x02120710,0x04202109,0x04062103,0x0A20170C, + 0xD1CB000C,0x8442170C,0xD1CB000A,0x0432170A,0x02161510,0x0418210B, + 0x0414190A,0x021816FF,0x3F2AAAAA,0x022018FF,0xBF2AAAAA,0x0416210B, + 0x021414FF,0x31739010,0x0214150B,0x0216150C,0x0418190B,0x0414190A, + 0x0A061703,0x0A181709,0xD1CB0010,0x84321709,0xD1CB0003,0x040E1509, + 0x02060710,0x0212070C,0x04141909,0x04061503,0x0214130D,0x04161B0A, + 0x04121709,0x0206070F,0x02060709,0x0212070A,0x04141509,0x04061503, + 0x0214130E,0x04161D0A,0x0418170A,0x04121709,0x0418190E,0x02160708, + 0x02121909,0x0418110B,0x041A190B,0x04101B08,0x04061903,0x02061103, + 0x0210130B,0x0212110A,0x04141509,0x04101508,0x02061103,0x02100709, + 0x04121308,0xBE8A00FF,0x3ED55555,0x04061303,0x0A12100A,0xD1CB0008, + 0x84241508,0xD1CB0003,0x04201503,0xB00C0204,0x02100709,0xD010006A, + 0x00001909,0x04141308,0x00101308,0x0A1210FF,0x3FB8AA3B,0x7E123D09, + 0x04061503,0x0A1412FF,0x3F317200,0x04161508,0x0418110B,0x041A190B, + 0xD010000A,0x00001908,0x041A1B08,0x0214190A,0xD1000003,0x00290103, + 0x0414150D,0x02061503,0x0214070B,0x0416170A,0x04061703,0x0A1612FF, + 0x35BFBC00,0x0418170A,0x0414190A,0x0414170A,0x02061503,0x0214070C, + 0x0416190A,0x04061703,0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A, + 0x0414170A,0x02061503,0x0214070C,0x0416190A,0x04061703,0x0A18150A, + 0xBE8A00FF,0x3AB42872,0x7E1602FF,0x3C091DE6,0xD1CB000D,0x8432150A, + 0x021C0703,0xD1CB000D,0x04361D0A,0xD1CB000B,0x042C150A,0xBE8A00FF, + 0x3D2AADCC,0xD1CB000B,0x002A170A,0xBE8A00FF,0x3E2AAA47,0xD1CB000D, + 0x04360703,0x021C1B0C,0xD1CB000B,0x002A170A,0xBE8A00FF,0x3EFFFFFC, + 0x0418190E,0xD1CB000B,0x002A170A,0x0418190D,0x0A1A1D0B,0xD1CB000E, + 0x8436170E,0xD1CB000B,0x043A170C,0x0218170D,0x041A1B0C,0x04161B0B, + 0x021A190A,0x0414150D,0x0414150C,0x02061703,0x7E121109,0x0206070A, + 0x0206070D,0x020606F2,0xBE8A00FF,0x42B20000,0xD2880003,0x00021303, + 0x7C9C100A,0x7E1202FF,0x7F800000,0xBE8A00FF,0xC2D00000,0x00060709, + 0x7C96100A,0xB00A03C0,0x00060680,0xD010006A,0x00001507,0x7E1002FF, + 0x7FC00000,0x00060708,0x7C9A0E80,0x00060680,0xD010006A,0x00001907, + 0x00061303,0x260606FF,0x7FFFFFFF,0x7C900F07,0x00060F03,0x7C9A0EF2, + 0x000606F2,0xBE8A00FF,0x3F870A3D,0x7E1002FF,0xBD6147AE,0xD1CB0003, + 0x04201503,0xBE882108,0x88FE087E,0x0A060EFF,0x414EB852,0x87FE047E, + 0x87FE007E,0x7C8E0904,0x000E0880,0x7E0802F2,0x7C9C0EF2,0xBE80206A, + 0xBF880120,0x7E080280,0x7C960E80,0x86FE6A7E,0xBF88011C,0xBE8400FF, + 0x3B4D2E1C,0x7C960E04,0xBE84206A,0x8884047E,0xBF880112,0xD1740104, + 0x00000107,0xBE8800FF,0x3F2AAAAB,0x7C880808,0xD1000008,0x01A90280, + 0xD2880004,0x00021104,0x021408F2,0x7E1A450A,0x0416090A,0xD1730109, + 0x00000107,0x0418170A,0x6A101109,0x021208F3,0x04081904,0x041616F2, + 0x0208090B,0x0A161B09,0x0A18170A,0xD1CB000A,0x8432150B,0xD1CB0004, + 0x042A090B,0x0214090C,0x0418190A,0x04081904,0x04181509,0x04121909, + 0x04121509,0x04080909,0x0208090C,0x0A08090D,0x0212090B,0x04141709, + 0x04081504,0x0A141309,0xD1CB000B,0x842A1309,0x02180904,0xD1CB000B, + 0x042E1909,0xD1CB000B,0x042E0904,0x0218170A,0x0414150C,0x7E100B08, + 0x0414150B,0xBE8800FF,0x3E76C4E1,0x7E1602FF,0x3E91F4C4,0xD1CB000B, + 0x042C110C,0xBE8800FF,0x3ECCCDEF,0xD1CB000B,0x0022170C,0xBE8800FF, + 0x3F317218,0x0A1A1008,0xD1CB000E,0x84341108,0xBE8800FF,0xB102E308, + 0xD1CB0008,0x04381108,0x021C110D,0x041A1B0E,0x0A201909,0x04101B08, + 0xD288000D,0x00010309,0xD1CB0011,0x8442130C,0x0A121509,0xD288000F, + 0x00010304,0xD1CB0004,0x0426090C,0x02080911,0x02120910,0x04202109, + 0x04082104,0x0A20170C,0xD1CB000C,0x8442170C,0xD1CB000A,0x0432170A, + 0x02161510,0x0418210B,0x0414190A,0x021816FF,0x3F2AAAAA,0x022018FF, + 0xBF2AAAAA,0x0416210B,0x021414FF,0x31739010,0x0214150B,0x0216150C, + 0x0418190B,0x0414190A,0x0A081704,0x0A181709,0xD1CB0010,0x84321709, + 0xD1CB0004,0x04121509,0x02080910,0x0212090C,0x04141909,0x04081504, + 0x0214130D,0x04161B0A,0x04121709,0x0208090F,0x02080909,0x0212090A, + 0x04141509,0x04081504,0x0214130E,0x04161D0A,0x0418170A,0x04121709, + 0x0418190E,0x02160908,0x02121909,0x0418110B,0x041A190B,0x04101B08, + 0x04081904,0x02081104,0x0210130B,0x0212110A,0x04141509,0x04101508, + 0x02081104,0x02100909,0x04121308,0xBE8800FF,0x3ED55555,0x04081304, + 0x0A121008,0xD1CB0008,0x84241108,0xD1CB0004,0x04201104,0xB00A0204, + 0x02100909,0xD010006A,0x00001509,0x04141308,0x00101308,0x0A1210FF, + 0x3FB8AA3B,0x7E123D09,0x04081504,0x0A1412FF,0x3F317200,0x04161508, + 0x0418110B,0x041A190B,0xD0100008,0x00001508,0x041A1B08,0x0214190A, + 0xD1000004,0x00210104,0x0414150D,0x02081504,0x0214090B,0x0416170A, + 0x04081704,0x0A1612FF,0x35BFBC00,0x0418170A,0x0414190A,0x0414170A, + 0x02081504,0x0214090C,0x0416190A,0x04081704,0x0A1612FF,0x2EA39EF3, + 0x0418170A,0x0414190A,0x0414170A,0x02081504,0x0214090C,0x0416190A, + 0x04081704,0x0A18150A,0xBE8800FF,0x3AB42872,0x7E1602FF,0x3C091DE6, + 0xD1CB000D,0x8432150A,0x021C0904,0xD1CB000D,0x04361D0A,0xD1CB000B, + 0x042C110A,0xBE8800FF,0x3D2AADCC,0xD1CB000B,0x0022170A,0xBE8800FF, + 0x3E2AAA47,0xD1CB000D,0x04360904,0x021C1B0C,0xD1CB000B,0x0022170A, + 0xBE8800FF,0x3EFFFFFC,0x0418190E,0xD1CB000B,0x0022170A,0x0418190D, + 0x0A1A1D0B,0xD1CB000E,0x8436170E,0xD1CB000B,0x043A170C,0x0218170D, + 0x041A1B0C,0x04161B0B,0x021A190A,0x0414150D,0x0414150C,0x02081704, + 0x7E121109,0x0208090A,0x0208090D,0x020808F2,0xBE8800FF,0x42B20000, + 0xD2880004,0x00021304,0x7C9C1008,0x7E1202FF,0x7F800000,0xBE8800FF, + 0xC2D00000,0x00080909,0x7C961008,0xB00803C0,0x00080880,0xD010006A, + 0x00001107,0x7E1002FF,0x7FC00000,0x00080908,0x7C9A0E80,0x00080880, + 0xD010006A,0x00001507,0x00081304,0x260808FF,0x7FFFFFFF,0x7C900F07, + 0x00080F04,0x7C9A0EF2,0x000808F2,0xBE8800FF,0x3F870A3D,0x7E1002FF, + 0xBD6147AE,0xD1CB0004,0x04201104,0xBE842104,0x88FE047E,0x0A080EFF, + 0x414EB852,0x87FE007E,0xC00A0103,0x00000020,0x7C8E0B05,0x000A0A80, + 0x7E0E02F2,0x7C9C0AF2,0xBE80206A,0xBF880121,0x7E0E0280,0x7C960A80, + 0x86FE6A7E,0xBF88011D,0xBF8CC07F,0xBE8700FF,0x3B4D2E1C,0x7C960A07, + 0xBE88206A,0x8888087E,0xBF880112,0xD1740107,0x00000105,0xBE8700FF, + 0x3F2AAAAB,0x7C880E07,0xD1000008,0x01A90280,0xD2880007,0x00021107, + 0x02140EF2,0x7E1A450A,0x04160F0A,0xD1730109,0x00000105,0x0418170A, + 0x6A101109,0x02120EF3,0x040E1907,0x041616F2,0x020E0F0B,0x0A161B09, + 0x0A18170A,0xD1CB000A,0x8432150B,0xD1CB0007,0x042A0F0B,0x02140F0C, + 0x0418190A,0x040E1907,0x04181509,0x04121909,0x04121509,0x040E0F09, + 0x020E0F0C,0x0A0E0F0D,0x02120F0B,0x04141709,0x040E1507,0x0A141309, + 0xD1CB000B,0x842A1309,0x02180F07,0xD1CB000B,0x042E1909,0xD1CB000B, + 0x042E0F07,0x0218170A,0x0414150C,0x7E100B08,0x0414150B,0xBE8700FF, + 0x3E76C4E1,0x7E1602FF,0x3E91F4C4,0xD1CB000B,0x042C0F0C,0xBE8700FF, + 0x3ECCCDEF,0xD1CB000B,0x001E170C,0xBE8700FF,0x3F317218,0x0A1A1007, + 0xD1CB000E,0x84340F08,0xBE8700FF,0xB102E308,0xD1CB0008,0x04380F08, + 0x021C110D,0x041A1B0E,0x0A201909,0x04101B08,0xD288000D,0x00010309, + 0xD1CB0011,0x8442130C,0x0A121509,0xD288000F,0x00010307,0xD1CB0007, + 0x04260F0C,0x020E0F11,0x02120F10,0x04202109,0x040E2107,0x0A20170C, + 0xD1CB000C,0x8442170C,0xD1CB000A,0x0432170A,0x02161510,0x0418210B, + 0x0414190A,0x021816FF,0x3F2AAAAA,0x022018FF,0xBF2AAAAA,0x0416210B, + 0x021414FF,0x31739010,0x0214150B,0x0216150C,0x0418190B,0x0414190A, + 0x0A0E1707,0x0A181709,0xD1CB0010,0x84321709,0xD1CB0007,0x041E1509, + 0x020E0F10,0x02120F0C,0x04141909,0x040E1507,0x0214130D,0x04161B0A, + 0x04121709,0x020E0F0F,0x020E0F09,0x02120F0A,0x04141509,0x040E1507, + 0x0214130E,0x04161D0A,0x0418170A,0x04121709,0x0418190E,0x02160F08, + 0x02121909,0x0418110B,0x041A190B,0x04101B08,0x040E1907,0x020E1107, + 0x0210130B,0x0212110A,0x04141509,0x04101508,0x020E1107,0x02100F09, + 0x04121308,0xBE8700FF,0x3ED55555,0x040E1307,0x0A121007,0xD1CB0008, + 0x84240F08,0xD1CB0007,0x04200F07,0xB0070204,0x02100F09,0xD010006A, + 0x00000F09,0x04141308,0x00101308,0x0A1210FF,0x3FB8AA3B,0x7E123D09, + 0x040E1507,0x0A1412FF,0x3F317200,0x04161508,0x0418110B,0x041A190B, + 0xD010000A,0x00000F08,0x041A1B08,0x0214190A,0xD1000007,0x00290107, + 0x0414150D,0x020E1507,0x02140F0B,0x0416170A,0x040E1707,0x0A1612FF, + 0x35BFBC00,0x0418170A,0x0414190A,0x0414170A,0x020E1507,0x02140F0C, + 0x0416190A,0x040E1707,0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A, + 0x0414170A,0x020E1507,0x02140F0C,0x0416190A,0x040E1707,0x0A18150A, + 0xBE8A00FF,0x3AB42872,0x7E1602FF,0x3C091DE6,0xD1CB000D,0x8432150A, + 0x021C0F07,0xD1CB000D,0x04361D0A,0xD1CB000B,0x042C150A,0xBE8A00FF, + 0x3D2AADCC,0xD1CB000B,0x002A170A,0xBE8A00FF,0x3E2AAA47,0xD1CB000D, + 0x04360F07,0x021C1B0C,0xD1CB000B,0x002A170A,0xBE8A00FF,0x3EFFFFFC, + 0x0418190E,0xD1CB000B,0x002A170A,0x0418190D,0x0A1A1D0B,0xD1CB000E, + 0x8436170E,0xD1CB000B,0x043A170C,0x0218170D,0x041A1B0C,0x04161B0B, + 0x021A190A,0x0414150D,0x0414150C,0x020E1707,0x7E121109,0x020E0F0A, + 0x020E0F0D,0x020E0EF2,0xBE8A00FF,0x42B20000,0xD2880007,0x00021307, + 0x7C9C100A,0x7E1202FF,0x7F800000,0xBE8A00FF,0xC2D00000,0x000E0F09, + 0x7C96100A,0xB00A03C0,0x000E0E80,0x7E1002FF,0x7FC00000,0xD010006A, + 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0x6800000C,0x68080704,0x32060A14,0x38080D04,0x6802020D,0x6804040E, + 0xBF048208,0xBF84000C,0xBF078108,0xBF850032,0xBF048209,0xBF840031, + 0xBF078109,0xBF850039,0x7E0A0201,0x32060600,0x38080905,0xDC408000, + 0x037F0003,0xBF820066,0xBF048408,0xBF840012,0xBF068208,0xBF840024, + 0xBF048209,0xBF840035,0xBF078109,0xBF850052,0xD28F0003,0x00020681, + 0x7E0A0201,0x32060600,0x38080905,0xDC488000,0x047F0003,0xBF8C0F70, + 0x260608FF,0x000000FF,0x20080888,0xBF820052,0xBF068408,0xBF840012, + 0xD28F0003,0x00020682,0x7E0A0201,0xBF078109,0xBF85002E,0x32060600, + 0x38080905,0xDC508000,0x067F0003,0xBF8C0F70,0x26060CFF,0x000000FF, + 0xD1C80004,0x02211106,0xD1C80005,0x02212106,0x200C0C98,0xBF82003E, + 0xBF82003D,0xBF068209,0xBF840008,0xD28F0003,0x00020681,0x7E0A0201, + 0x32060600,0x38080905,0xDC488000,0x037F0003,0xBF820033,0xD28F0003, + 0x00020682,0x7E0A0201,0x32060600,0x38080905,0xDC508000,0x037F0003, + 0xBF82002B,0xBF068209,0xBF84001D,0xD28F0003,0x00020682,0x7E0A0201, + 0x32060600,0x38080905,0xDC508000,0x047F0003,0xBF8C0F70,0x260608FF, + 0x0000FFFF,0x20080890,0xBF82001D,0x320C0600,0x380E0905,0xDC508000, + 0x037F0006,0xBF078209,0xBF850013,0xDC508004,0x067F0006,0xBE8000FF, + 0x0000FFFF,0xBF8C0F71,0x20080690,0x26060600,0xBF8C0F70,0x260A0C00, + 0x200C0C90,0xBF82000C,0xD28F0003,0x00020682,0x7E0A0201,0x32060600, + 0x38080905,0xDC548000,0x037F0003,0xBF820004,0xDC548004,0x047F0006, + 0xDC50800C,0x067F0006,0xC00E0001,0x00000000,0xBF8C0070,0xF0205F00, + 0x00000300,0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00090001,0x00040000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AF0082,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0016,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x7E060204,0x7E080205, + 0xDC488006,0x037F0003,0xC0060102,0x00000004,0xC00A0003,0x00000030, + 0xC00A0303,0x00000040,0xBF8CC07F,0xC00200C3,0x00000050,0xBE8B00FF, + 0x0000FFFF,0x86040B04,0x86050B05,0x92080408,0x68000008,0x920A050A, + 0x6804040A,0x6800000C,0xBF8CC07F,0x68040403,0x7D880000,0xBF8C0F70, + 0xD2850003,0x00020609,0x68020303,0x6802020E,0xD0C40000,0x00020201, + 0x8680006A,0x7D880402,0x86806A00,0xBE822000,0xBF880017,0xC00A0203, + 0x00000000,0xC00A0303,0x00000010,0xC00A0403,0x00000020,0xBF8CC07F, + 0xC00E0004,0x00000000,0x6806040E,0x680C0412,0x680A0211,0x6804020D, + 0x68080010,0x6802000C,0xBF8CC07F,0xF0005F00,0x00000001,0xC00E0005, + 0x00000000,0xBF8C0070,0xF0205F00,0x00000004,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00090001,0x00040000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AF0084,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x00120016, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x7E060204,0x7E080205,0xDC488006,0x037F0003,0xC0060102,0x00000004, + 0xC00A0003,0x00000030,0xC00A0303,0x00000048,0xBF8CC07F,0xC00200C3, + 0x00000058,0xBE8B00FF,0x0000FFFF,0x86040B04,0x86050B05,0x92080408, + 0x68000008,0x920A050A,0x6804040A,0x6800000C,0xBF8CC07F,0x68040403, + 0x7D880000,0xBF8C0F70,0xD2850003,0x00020609,0x68020303,0x6802020E, + 0xD0C40000,0x00020201,0x8680006A,0x7D880402,0x86806A00,0xBE822000, + 0xBF880391,0xC00A0003,0x00000000,0xC00A0403,0x00000010,0xBF8CC07F, + 0xC00E0200,0x00000000,0x680A0412,0x68080211,0x68060010,0xBF8CC07F, + 0xF0005F00,0x00020303,0xBF8C0F70,0x7C8E0703,0x000E0680,0x7E0602F2, + 0x7C9C0EF2,0xBE80206A,0xBF880121,0x7E060280,0x7C960E80,0xBE84206A, + 0xBF88011C,0xBE8800FF,0x3B4D2E1C,0x7C960E08,0xBE88206A,0x8888087E, + 0xBF880112,0xD1740103,0x00000107,0xBE8A00FF,0x3F2AAAAB,0x7C88060A, + 0xD1000008,0x01A90280,0xD2880003,0x00021103,0x021406F2,0x7E1A450A, + 0x0416070A,0xD1730109,0x00000107,0x0418170A,0x6A101109,0x021206F3, + 0x04061903,0x041616F2,0x0206070B,0x0A161B09,0x0A18170A,0xD1CB000A, + 0x8432150B,0xD1CB0003,0x042A070B,0x0214070C,0x0418190A,0x04061903, + 0x04181509,0x04121909,0x04121509,0x04060709,0x0206070C,0x0A06070D, + 0x0212070B,0x04141709,0x04061503,0x0A141309,0xD1CB000B,0x842A1309, + 0x02180703,0xD1CB000B,0x042E1909,0xD1CB000B,0x042E0703,0x0218170A, + 0x0414150C,0x7E100B08,0x0414150B,0xBE8A00FF,0x3E76C4E1,0x7E1602FF, + 0x3E91F4C4,0xD1CB000B,0x042C150C,0xBE8A00FF,0x3ECCCDEF,0xD1CB000B, + 0x002A170C,0xBE8A00FF,0x3F317218,0x0A1A100A,0xD1CB000E,0x84341508, + 0xBE8A00FF,0xB102E308,0xD1CB0008,0x04381508,0x021C110D,0x041A1B0E, + 0x0A201909,0x04101B08,0xD288000D,0x00010309,0xD1CB0011,0x8442130C, + 0x0A121509,0xD288000F,0x00010303,0xD1CB0003,0x0426070C,0x02060711, + 0x02120710,0x04202109,0x04062103,0x0A20170C,0xD1CB000C,0x8442170C, + 0xD1CB000A,0x0432170A,0x02161510,0x0418210B,0x0414190A,0x021816FF, + 0x3F2AAAAA,0x022018FF,0xBF2AAAAA,0x0416210B,0x021414FF,0x31739010, + 0x0214150B,0x0216150C,0x0418190B,0x0414190A,0x0A061703,0x0A181709, + 0xD1CB0010,0x84321709,0xD1CB0003,0x040E1509,0x02060710,0x0212070C, + 0x04141909,0x04061503,0x0214130D,0x04161B0A,0x04121709,0x0206070F, + 0x02060709,0x0212070A,0x04141509,0x04061503,0x0214130E,0x04161D0A, + 0x0418170A,0x04121709,0x0418190E,0x02160708,0x02121909,0x0418110B, + 0x041A190B,0x04101B08,0x04061903,0x02061103,0x0210130B,0x0212110A, + 0x04141509,0x04101508,0x02061103,0x02100709,0x04121308,0xBE8A00FF, + 0x3ED55555,0x04061303,0x0A12100A,0xD1CB0008,0x84241508,0xD1CB0003, + 0x04201503,0xB00C0204,0x02100709,0xD010006A,0x00001909,0x04141308, + 0x00101308,0x0A1210FF,0x3FB8AA3B,0x7E123D09,0x04061503,0x0A1412FF, + 0x3F317200,0x04161508,0x0418110B,0x041A190B,0xD010000A,0x00001908, + 0x041A1B08,0x0214190A,0xD1000003,0x00290103,0x0414150D,0x02061503, + 0x0214070B,0x0416170A,0x04061703,0x0A1612FF,0x35BFBC00,0x0418170A, + 0x0414190A,0x0414170A,0x02061503,0x0214070C,0x0416190A,0x04061703, + 0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A,0x0414170A,0x02061503, + 0x0214070C,0x0416190A,0x04061703,0x0A18150A,0xBE8A00FF,0x3AB42872, + 0x7E1602FF,0x3C091DE6,0xD1CB000D,0x8432150A,0x021C0703,0xD1CB000D, + 0x04361D0A,0xD1CB000B,0x042C150A,0xBE8A00FF,0x3D2AADCC,0xD1CB000B, + 0x002A170A,0xBE8A00FF,0x3E2AAA47,0xD1CB000D,0x04360703,0x021C1B0C, + 0xD1CB000B,0x002A170A,0xBE8A00FF,0x3EFFFFFC,0x0418190E,0xD1CB000B, + 0x002A170A,0x0418190D,0x0A1A1D0B,0xD1CB000E,0x8436170E,0xD1CB000B, + 0x043A170C,0x0218170D,0x041A1B0C,0x04161B0B,0x021A190A,0x0414150D, + 0x0414150C,0x02061703,0x7E121109,0x0206070A,0x0206070D,0x020606F2, + 0xBE8A00FF,0x42B20000,0xD2880003,0x00021303,0x7C9C100A,0x7E1202FF, + 0x7F800000,0xBE8A00FF,0xC2D00000,0x00060709,0x7C96100A,0xB00A03C0, + 0x00060680,0xD010006A,0x00001507,0x7E1002FF,0x7FC00000,0x00060708, + 0x7C9A0E80,0x00060680,0xD010006A,0x00001907,0x00061303,0x260606FF, + 0x7FFFFFFF,0x7C900F07,0x00060F03,0x7C9A0EF2,0x000606F2,0xBE8A00FF, + 0x3F870A3D,0x7E1002FF,0xBD6147AE,0xD1CB0003,0x04201503,0xBE882108, + 0x88FE087E,0x0A060EFF,0x414EB852,0x87FE047E,0x87FE007E,0x7C8E0904, + 0x000E0880,0x7E0802F2,0x7C9C0EF2,0xBE80206A,0xBF880120,0x7E080280, + 0x7C960E80,0x86FE6A7E,0xBF88011C,0xBE8400FF,0x3B4D2E1C,0x7C960E04, + 0xBE84206A,0x8884047E,0xBF880112,0xD1740104,0x00000107,0xBE8800FF, + 0x3F2AAAAB,0x7C880808,0xD1000008,0x01A90280,0xD2880004,0x00021104, + 0x021408F2,0x7E1A450A,0x0416090A,0xD1730109,0x00000107,0x0418170A, + 0x6A101109,0x021208F3,0x04081904,0x041616F2,0x0208090B,0x0A161B09, + 0x0A18170A,0xD1CB000A,0x8432150B,0xD1CB0004,0x042A090B,0x0214090C, + 0x0418190A,0x04081904,0x04181509,0x04121909,0x04121509,0x04080909, + 0x0208090C,0x0A08090D,0x0212090B,0x04141709,0x04081504,0x0A141309, + 0xD1CB000B,0x842A1309,0x02180904,0xD1CB000B,0x042E1909,0xD1CB000B, + 0x042E0904,0x0218170A,0x0414150C,0x7E100B08,0x0414150B,0xBE8800FF, + 0x3E76C4E1,0x7E1602FF,0x3E91F4C4,0xD1CB000B,0x042C110C,0xBE8800FF, + 0x3ECCCDEF,0xD1CB000B,0x0022170C,0xBE8800FF,0x3F317218,0x0A1A1008, + 0xD1CB000E,0x84341108,0xBE8800FF,0xB102E308,0xD1CB0008,0x04381108, + 0x021C110D,0x041A1B0E,0x0A201909,0x04101B08,0xD288000D,0x00010309, + 0xD1CB0011,0x8442130C,0x0A121509,0xD288000F,0x00010304,0xD1CB0004, + 0x0426090C,0x02080911,0x02120910,0x04202109,0x04082104,0x0A20170C, + 0xD1CB000C,0x8442170C,0xD1CB000A,0x0432170A,0x02161510,0x0418210B, + 0x0414190A,0x021816FF,0x3F2AAAAA,0x022018FF,0xBF2AAAAA,0x0416210B, + 0x021414FF,0x31739010,0x0214150B,0x0216150C,0x0418190B,0x0414190A, + 0x0A081704,0x0A181709,0xD1CB0010,0x84321709,0xD1CB0004,0x04121509, + 0x02080910,0x0212090C,0x04141909,0x04081504,0x0214130D,0x04161B0A, + 0x04121709,0x0208090F,0x02080909,0x0212090A,0x04141509,0x04081504, + 0x0214130E,0x04161D0A,0x0418170A,0x04121709,0x0418190E,0x02160908, + 0x02121909,0x0418110B,0x041A190B,0x04101B08,0x04081904,0x02081104, + 0x0210130B,0x0212110A,0x04141509,0x04101508,0x02081104,0x02100909, + 0x04121308,0xBE8800FF,0x3ED55555,0x04081304,0x0A121008,0xD1CB0008, + 0x84241108,0xD1CB0004,0x04201104,0xB00A0204,0x02100909,0xD010006A, + 0x00001509,0x04141308,0x00101308,0x0A1210FF,0x3FB8AA3B,0x7E123D09, + 0x04081504,0x0A1412FF,0x3F317200,0x04161508,0x0418110B,0x041A190B, + 0xD0100008,0x00001508,0x041A1B08,0x0214190A,0xD1000004,0x00210104, + 0x0414150D,0x02081504,0x0214090B,0x0416170A,0x04081704,0x0A1612FF, + 0x35BFBC00,0x0418170A,0x0414190A,0x0414170A,0x02081504,0x0214090C, + 0x0416190A,0x04081704,0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A, + 0x0414170A,0x02081504,0x0214090C,0x0416190A,0x04081704,0x0A18150A, + 0xBE8800FF,0x3AB42872,0x7E1602FF,0x3C091DE6,0xD1CB000D,0x8432150A, + 0x021C0904,0xD1CB000D,0x04361D0A,0xD1CB000B,0x042C110A,0xBE8800FF, + 0x3D2AADCC,0xD1CB000B,0x0022170A,0xBE8800FF,0x3E2AAA47,0xD1CB000D, + 0x04360904,0x021C1B0C,0xD1CB000B,0x0022170A,0xBE8800FF,0x3EFFFFFC, + 0x0418190E,0xD1CB000B,0x0022170A,0x0418190D,0x0A1A1D0B,0xD1CB000E, + 0x8436170E,0xD1CB000B,0x043A170C,0x0218170D,0x041A1B0C,0x04161B0B, + 0x021A190A,0x0414150D,0x0414150C,0x02081704,0x7E121109,0x0208090A, + 0x0208090D,0x020808F2,0xBE8800FF,0x42B20000,0xD2880004,0x00021304, + 0x7C9C1008,0x7E1202FF,0x7F800000,0xBE8800FF,0xC2D00000,0x00080909, + 0x7C961008,0xB00803C0,0x00080880,0xD010006A,0x00001107,0x7E1002FF, + 0x7FC00000,0x00080908,0x7C9A0E80,0x00080880,0xD010006A,0x00001507, + 0x00081304,0x260808FF,0x7FFFFFFF,0x7C900F07,0x00080F04,0x7C9A0EF2, + 0x000808F2,0xBE8800FF,0x3F870A3D,0x7E1002FF,0xBD6147AE,0xD1CB0004, + 0x04201104,0xBE842104,0x88FE047E,0x0A080EFF,0x414EB852,0x87FE007E, + 0xC00A0103,0x00000020,0x7C8E0B05,0x000A0A80,0x7E0E02F2,0x7C9C0AF2, + 0xBE80206A,0xBF880121,0x7E0E0280,0x7C960A80,0x86FE6A7E,0xBF88011D, + 0xBF8CC07F,0xBE8700FF,0x3B4D2E1C,0x7C960A07,0xBE88206A,0x8888087E, + 0xBF880112,0xD1740107,0x00000105,0xBE8700FF,0x3F2AAAAB,0x7C880E07, + 0xD1000008,0x01A90280,0xD2880007,0x00021107,0x02140EF2,0x7E1A450A, + 0x04160F0A,0xD1730109,0x00000105,0x0418170A,0x6A101109,0x02120EF3, + 0x040E1907,0x041616F2,0x020E0F0B,0x0A161B09,0x0A18170A,0xD1CB000A, + 0x8432150B,0xD1CB0007,0x042A0F0B,0x02140F0C,0x0418190A,0x040E1907, + 0x04181509,0x04121909,0x04121509,0x040E0F09,0x020E0F0C,0x0A0E0F0D, + 0x02120F0B,0x04141709,0x040E1507,0x0A141309,0xD1CB000B,0x842A1309, + 0x02180F07,0xD1CB000B,0x042E1909,0xD1CB000B,0x042E0F07,0x0218170A, + 0x0414150C,0x7E100B08,0x0414150B,0xBE8700FF,0x3E76C4E1,0x7E1602FF, + 0x3E91F4C4,0xD1CB000B,0x042C0F0C,0xBE8700FF,0x3ECCCDEF,0xD1CB000B, + 0x001E170C,0xBE8700FF,0x3F317218,0x0A1A1007,0xD1CB000E,0x84340F08, + 0xBE8700FF,0xB102E308,0xD1CB0008,0x04380F08,0x021C110D,0x041A1B0E, + 0x0A201909,0x04101B08,0xD288000D,0x00010309,0xD1CB0011,0x8442130C, + 0x0A121509,0xD288000F,0x00010307,0xD1CB0007,0x04260F0C,0x020E0F11, + 0x02120F10,0x04202109,0x040E2107,0x0A20170C,0xD1CB000C,0x8442170C, + 0xD1CB000A,0x0432170A,0x02161510,0x0418210B,0x0414190A,0x021816FF, + 0x3F2AAAAA,0x022018FF,0xBF2AAAAA,0x0416210B,0x021414FF,0x31739010, + 0x0214150B,0x0216150C,0x0418190B,0x0414190A,0x0A0E1707,0x0A181709, + 0xD1CB0010,0x84321709,0xD1CB0007,0x041E1509,0x020E0F10,0x02120F0C, + 0x04141909,0x040E1507,0x0214130D,0x04161B0A,0x04121709,0x020E0F0F, + 0x020E0F09,0x02120F0A,0x04141509,0x040E1507,0x0214130E,0x04161D0A, + 0x0418170A,0x04121709,0x0418190E,0x02160F08,0x02121909,0x0418110B, + 0x041A190B,0x04101B08,0x040E1907,0x020E1107,0x0210130B,0x0212110A, + 0x04141509,0x04101508,0x020E1107,0x02100F09,0x04121308,0xBE8700FF, + 0x3ED55555,0x040E1307,0x0A121007,0xD1CB0008,0x84240F08,0xD1CB0007, + 0x04200F07,0xB0070204,0x02100F09,0xD010006A,0x00000F09,0x04141308, + 0x00101308,0x0A1210FF,0x3FB8AA3B,0x7E123D09,0x040E1507,0x0A1412FF, + 0x3F317200,0x04161508,0x0418110B,0x041A190B,0xD010000A,0x00000F08, + 0x041A1B08,0x0214190A,0xD1000007,0x00290107,0x0414150D,0x020E1507, + 0x02140F0B,0x0416170A,0x040E1707,0x0A1612FF,0x35BFBC00,0x0418170A, + 0x0414190A,0x0414170A,0x020E1507,0x02140F0C,0x0416190A,0x040E1707, + 0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A,0x0414170A,0x020E1507, + 0x02140F0C,0x0416190A,0x040E1707,0x0A18150A,0xBE8A00FF,0x3AB42872, + 0x7E1602FF,0x3C091DE6,0xD1CB000D,0x8432150A,0x021C0F07,0xD1CB000D, + 0x04361D0A,0xD1CB000B,0x042C150A,0xBE8A00FF,0x3D2AADCC,0xD1CB000B, + 0x002A170A,0xBE8A00FF,0x3E2AAA47,0xD1CB000D,0x04360F07,0x021C1B0C, + 0xD1CB000B,0x002A170A,0xBE8A00FF,0x3EFFFFFC,0x0418190E,0xD1CB000B, + 0x002A170A,0x0418190D,0x0A1A1D0B,0xD1CB000E,0x8436170E,0xD1CB000B, + 0x043A170C,0x0218170D,0x041A1B0C,0x04161B0B,0x021A190A,0x0414150D, + 0x0414150C,0x020E1707,0x7E121109,0x020E0F0A,0x020E0F0D,0x020E0EF2, + 0xBE8A00FF,0x42B20000,0xD2880007,0x00021307,0x7C9C100A,0x7E1202FF, + 0x7F800000,0xBE8A00FF,0xC2D00000,0x000E0F09,0x7C96100A,0xB00A03C0, + 0x000E0E80,0x7E1002FF,0x7FC00000,0xD010006A,0x00001505,0x000E0F08, + 0x7C9A0A80,0x000E0E80,0xD010006A,0x00000F05,0x000E1307,0x260E0EFF, + 0x7FFFFFFF,0x7C900B05,0x000E0B07,0x7C9A0AF2,0x000E0EF2,0xBE8700FF, + 0x3F870A3D,0x7E1002FF,0xBD6147AE,0xD1CB0007,0x04200F07,0xBE882108, + 0x88FE087E,0x0A0E0AFF,0x414EB852,0x87FE007E,0xBF8CC07F,0x68040406, + 0x68020205,0x68000004,0xC00E0001,0x00000000,0x7E0A0307,0xBF8CC07F, + 0xF0205F00,0x00000300,0xBF810000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00090001,0x00040000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AF0083,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000078,0x00000000,0x00000000,0x000D0016,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x7E060204,0x7E080205, + 0xDC488006,0x037F0003,0xC0060102,0x00000004,0xC00A0003,0x00000030, + 0xC00A0303,0x00000048,0xBF8CC07F,0xC00200C3,0x00000058,0xBE8B00FF, + 0x0000FFFF,0x86040B04,0x86050B05,0x92080408,0x68000008,0x920A050A, + 0x6804040A,0x6800000C,0xBF8CC07F,0x68040403,0x7D880000,0xBF8C0F70, + 0xD2850003,0x00020609,0x68020303,0x6802020E,0xD0C40000,0x00020201, + 0x8680006A,0x7D880402,0x86806A00,0xBE822000,0xBF880017,0xC00A0203, + 0x00000000,0xC00A0303,0x00000010,0xC00A0403,0x00000020,0xBF8CC07F, + 0xC00E0004,0x00000000,0x6806040E,0x680C0412,0x680A0211,0x6804020D, + 0x68080010,0x6802000C,0xBF8CC07F,0xF0005F00,0x00000001,0xC00E0005, + 0x00000000,0xBF8C0070,0xF0205F00,0x00000004,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00090001,0x00040000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AF0082,0x00000090,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000070,0x00000000,0x00000000,0x000C0012, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0xC0020102,0x00000004,0xC00A0003,0x00000030,0xBF8CC07F,0xC0020043, + 0x00000040,0x8602FF04,0x0000FFFF,0x92080208,0x68000008,0xBF8CC07F, + 0x68000001,0x7D880000,0xBE80206A,0xC00A0203,0x00000000,0xC00E0003, + 0x00000010,0xBF8CC07F,0xC00A0304,0x00000000,0xC00A0205,0x00000000, + 0x68020000,0x68080004,0xBF8CC07F,0xE00C2000,0x80030001,0xBF8C0F70, + 0xE01C2000,0x80020004,0xBF810000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0x00000001,0x00000002, + 0x00090001,0x00040000,0x00000100,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00AF00C2,0x00001390, + 0x000A000B,0x00000000,0x00000000,0x00000000,0x00000070,0x00000000, + 0x00000000,0x000C001E,0x00000000,0x00000000,0x00000000,0x06040404, + 0xFFFFFFFF,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0xC0020042,0x00000004,0xC00202C3,0x00000030, + 0xC0020303,0x00000040,0xBE8000FF,0x0000FFFF,0xBF8CC07F,0x86010001, + 0x92080108,0x68000008,0x8002C006,0x6800000C,0x82038007,0x7D88000B, + 0xBE8C206A,0xBF880026,0xC00A0303,0x00000000,0x7E060204,0x7E080205, + 0xDC488006,0x077F0003,0xC0020043,0x00000010,0xC00A0503,0x00000020, + 0xC0020202,0x00000008,0xC00A0601,0x00000008,0xBF8CC07F,0xC00A0106, + 0x00000000,0x68060001,0xC00E0307,0x00000000,0x86000008,0x920A000A, + 0xBF8CC07F,0xE00C2000,0x80010303,0x6804041A,0x68020218,0x6804040A, + 0x68040416,0x68000014,0xBF8C0F71,0xD2850007,0x00020E09,0x68020F01, + 0x68020215,0xBF8C0F70,0xF0205F00,0x00030300,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00090001,0x00040000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AF0102,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0022,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0xC0020042,0x00000004, + 0xC00E0303,0x00000020,0xC00202C3,0x00000040,0xBE8000FF,0x0000FFFF, + 0xBF8CC07F,0x86010001,0x92080108,0x68000008,0x8002C006,0x6800000B, + 0x82038007,0x7D880010,0xBE8E206A,0xBF880024,0x7E060204,0x7E080205, + 0xDC488006,0x047F0003,0xC00A0603,0x00000000,0xC00A0703,0x00000010, + 0xC0020042,0x00000008,0xC00A0101,0x00000008,0x680C000C,0xBF8CC07F, + 0xC00E040C,0x00000000,0x6806001C,0x86000001,0x68020204,0x68040406, + 0x920A000A,0x6804040A,0x680A041E,0xC00A060D,0x00000000,0xBF8C0F70, + 0xD2850000,0x00020809,0x68000101,0x6808001D,0xBF8CC07F,0xF0005F00, + 0x00040003,0xBF8C0F70,0xE01C2000,0x80060006,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00090001,0x00040000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AF00C5,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000098,0x00000000,0x00000000,0x0015001A, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x7E060204,0x7E080205,0xDC488006,0x037F0003,0xC0060102,0x00000004, + 0xC00A0003,0x00000050,0xC00A0303,0x00000068,0xBF8CC07F,0xC00200C3, + 0x00000078,0xBE8B00FF,0x0000FFFF,0x86040B04,0x86050B05,0x92080408, + 0x68000008,0x920A050A,0x6804040A,0x6800000C,0xBF8CC07F,0x68040403, + 0x7D880000,0xBF8C0F70,0xD2850003,0x00020609,0x68020303,0x6802020E, + 0xD0C40000,0x00020201,0x8680006A,0x7D880402,0x86806A00,0xBE822000, + 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0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x7E060204,0x7E080205,0xDC488006,0x037F0003,0xC0060102,0x00000004, + 0xC00E0303,0x00000060,0xC00A0003,0x000000A0,0xBE8B00FF,0x0000FFFF, + 0xC0060503,0x000000B0,0xBF8CC07F,0x86040B04,0x92080408,0x68000008, + 0x7E0A0201,0x32080000,0x38000A80,0x86040B05,0x920A040A,0x6804040A, + 0x7E0C0215,0x320A0414,0x38040C80,0x7E0E0203,0x7D88080C,0xBF8C0F70, + 0xD2850000,0x00020609,0x68000300,0xD1190006,0x00020002,0xD11C0000, + 0x00020E80,0xD0C40000,0x00020C0D,0x8680006A,0x7D880A0E,0x86806A00, + 0xBE822000,0xBF8800B4,0xC00E0203,0x00000000,0xC00A0803,0x00000020, + 0xC00E0503,0x00000040,0xC00E0003,0x00000080,0x22100C9F,0xBF8CC07F, + 0xC00E0604,0x00000000,0x68000820,0x68020C21,0x68040A22,0xD2850008, + 0x00000108,0xBF8CC07F,0xF0005F00,0x00060000,0xD2850009,0x00000306, + 0xD286000A,0x00000106,0xD2850006,0x00000106,0x220E0A9F,0xD2850007, + 0x00000507,0xD285000B,0x00000705,0xD286000C,0x00000505,0xD2850005, + 0x00000505,0xD1FF0008,0x0422130A,0x2212089F,0x32080906,0x380C1308, + 0xD1FF0007,0x041E170C,0x32080B04,0x380A0F06,0xD2860006,0x00002504, + 0xD2850005,0x00002505,0xD2850004,0x00002504,0xBF048210,0x680A0B06, + 0x7E0C0215,0x32080814,0x380A0D05,0xBF84000D,0xBF078110,0xBF85007A, + 0xBF048211,0xBF84002A,0xBF078111,0xBF850076,0xBF8C0F70,0x7E04020F, + 0x3202080E,0x38040B02,0xDC608000,0x007F0001,0xBF810000,0xBF048410, + 0xBF840011,0xBF068210,0xBF84006B,0xBF048211,0xBF840028,0xBF078111, + 0xBF850067,0xBF8C0F70,0xD2000002,0x04011101,0xD28F0000,0x00020881, + 0x7E06020D,0x3200000C,0x38020303,0xDC688000,0x007F0200,0xBF810000, + 0xBF068410,0xBF84005A,0xBF048211,0xBF840026,0xBF078111,0xBF850056, + 0xBF8C0F70,0xD2000000,0x04011101,0x24020490,0x24040698,0xD2020002, + 0x040A0300,0xBF820014,0xBF048411,0xBF84002B,0xBF068211,0xBF84004A, + 0xBF8C0F70,0xD28F0001,0x00020881,0x7E06020D,0x3202020C,0x38040503, + 0xDC688000,0x007F0001,0xBF810000,0xBF048411,0xBF840029,0xBF068211, + 0xBF84003D,0xBF8C0F70,0xD2000002,0x04012101,0xD28F0000,0x00020882, + 0x7E06020B,0x3200000A,0x38020303,0xDC708000,0x007F0200,0xBF810000, + 0xBF048411,0xBF840025,0xBF068211,0xBF84002E,0xD28F0004,0x00020882, + 0xBF8C0F70,0xD2000000,0x04012101,0x7E02020B,0x3208080A,0x380A0B01, + 0xD2000001,0x04092103,0xDC748000,0x007F0004,0xBF820021,0xBF068411, + 0xBF84001F,0xBF8C0F70,0xD28F0001,0x00020882,0x7E06020B,0x3202020A, + 0x38040503,0xDC708000,0x007F0001,0xBF810000,0xBF068411,0xBF840014, + 0xBF8C0F70,0xD28F0002,0x00020882,0x7E08020B,0x3204040A,0x38060704, + 0xDC748000,0x007F0002,0xBF810000,0xBF068411,0xBF840009,0xD28F0004, + 0x00020882,0x7E0C020B,0x3208080A,0x380A0B06,0xBF8C0F70,0xDC7C8000, + 0x007F0004,0xBF810000,0xBF810000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0x00000001,0x00000002, + 0x00090001,0x00060000,0x00000100,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00AF00C6,0x00001390, + 0x000A000B,0x00000000,0x00000000,0x00000000,0x000000D0,0x00000000, + 0x00000000,0x001C001E,0x00000000,0x00000000,0x00000000,0x06040405, + 0xFFFFFFFF,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x7E060204,0x7E080205,0xDC488006,0x037F0003, + 0xC0060102,0x00000004,0xC00E0303,0x00000040,0xC00A0003,0x000000A0, + 0xBE8B00FF,0x0000FFFF,0xC0060503,0x000000B0,0xBF8CC07F,0x86040B04, + 0x92080408,0x68000008,0x86040B05,0x920A040A,0x7E080201,0x32000000, + 0x6804040A,0x38080880,0x7E0A0203,0x7E0C0215,0x32040414,0x38080C80, + 0x7D880010,0xBF8C0F70,0xD2850003,0x00020609,0x68020303,0xD1190001, + 0x00020202,0xD11C0003,0x00020A80,0xD0C40000,0x00020211,0x8680006A, + 0x7D880412,0x86806A00,0xBE822000,0xBF8800AB,0xC00A0203,0x00000060, + 0xC00E0403,0x00000080,0x2206049F,0xC00A0003,0x00000000,0xBF8CC07F, + 0xC00E0503,0x00000020,0x2208029F,0xD2850003,0x00002503,0xD2850005, + 0x00002702,0xD2860006,0x00002502,0xD2850004,0x00002104,0xD2850007, + 0x00002301,0xD2860008,0x00002101,0xD1FF0003,0x040E0B06,0xD2850006, + 0x00002101,0xD2850005,0x00002502,0xD1FF0004,0x04120F08,0x220E009F, + 0x320C0106,0x38080F04,0x320A0B06,0x38060704,0xD2860004,0x00001505, + 0xD2850003,0x00001503,0xD2850005,0x00001505,0xBF8CC07F,0x7E0C0215, + 0x6800000C,0x68080704,0x32060A14,0x38080D04,0x6802020D,0x6804040E, + 0xBF048208,0xBF84000C,0xBF078108,0xBF850032,0xBF048209,0xBF840031, + 0xBF078109,0xBF850039,0x7E0A0201,0x32060600,0x38080905,0xDC408000, + 0x037F0003,0xBF820066,0xBF048408,0xBF840012,0xBF068208,0xBF840024, + 0xBF048209,0xBF840035,0xBF078109,0xBF850052,0xD28F0003,0x00020681, + 0x7E0A0201,0x32060600,0x38080905,0xDC488000,0x047F0003,0xBF8C0F70, + 0x260608FF,0x000000FF,0x20080888,0xBF820052,0xBF068408,0xBF840012, + 0xD28F0003,0x00020682,0x7E0A0201,0xBF078109,0xBF85002E,0x32060600, + 0x38080905,0xDC508000,0x067F0003,0xBF8C0F70,0x26060CFF,0x000000FF, + 0xD1C80004,0x02211106,0xD1C80005,0x02212106,0x200C0C98,0xBF82003E, + 0xBF82003D,0xBF068209,0xBF840008,0xD28F0003,0x00020681,0x7E0A0201, + 0x32060600,0x38080905,0xDC488000,0x037F0003,0xBF820033,0xD28F0003, + 0x00020682,0x7E0A0201,0x32060600,0x38080905,0xDC508000,0x037F0003, + 0xBF82002B,0xBF068209,0xBF84001D,0xD28F0003,0x00020682,0x7E0A0201, + 0x32060600,0x38080905,0xDC508000,0x047F0003,0xBF8C0F70,0x260608FF, + 0x0000FFFF,0x20080890,0xBF82001D,0x320C0600,0x380E0905,0xDC508000, + 0x037F0006,0xBF078209,0xBF850013,0xDC508004,0x067F0006,0xBE8000FF, + 0x0000FFFF,0xBF8C0F71,0x20080690,0x26060600,0xBF8C0F70,0x260A0C00, + 0x200C0C90,0xBF82000C,0xD28F0003,0x00020682,0x7E0A0201,0x32060600, + 0x38080905,0xDC548000,0x037F0003,0xBF820004,0xDC548004,0x047F0006, + 0xDC50800C,0x067F0006,0xC00E0001,0x00000000,0xBF8C0070,0xF0205F00, + 0x00000300,0xBF810000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0x00000001,0x00000002,0x00090001,0x00060000,0x00000100,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00AF0082,0x00001390,0x000A000B,0x00000000,0x00000000,0x00000000, + 0x00000070,0x00000000,0x00000000,0x000C0016,0x00000000,0x00000000, + 0x00000000,0x06040404,0xFFFFFFFF,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x7E060204,0x7E080205, + 0xDC488006,0x037F0003,0xC0060102,0x00000004,0xC00A0003,0x00000030, + 0xC00A0303,0x00000040,0xBF8CC07F,0xC00200C3,0x00000050,0xBE8B00FF, + 0x0000FFFF,0x86040B04,0x86050B05,0x92080408,0x68000008,0x920A050A, + 0x6804040A,0x6800000C,0xBF8CC07F,0x68040403,0x7D880000,0xBF8C0F70, + 0xD2850003,0x00020609,0x68020303,0x6802020E,0xD0C40000,0x00020201, + 0x8680006A,0x7D880402,0x86806A00,0xBE822000,0xBF880017,0xC00A0203, + 0x00000000,0xC00A0303,0x00000010,0xC00A0403,0x00000020,0xBF8CC07F, + 0xC00E0004,0x00000000,0x6806040E,0x680C0412,0x680A0211,0x6804020D, + 0x68080010,0x6802000C,0xBF8CC07F,0xF0005F00,0x00000001,0xC00E0005, + 0x00000000,0xBF8C0070,0xF0205F00,0x00000004,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00090001,0x00060000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AF0084,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x00120016, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x7E060204,0x7E080205,0xDC488006,0x037F0003,0xC0060102,0x00000004, + 0xC00A0003,0x00000030,0xC00A0303,0x00000048,0xBF8CC07F,0xC00200C3, + 0x00000058,0xBE8B00FF,0x0000FFFF,0x86040B04,0x86050B05,0x92080408, + 0x68000008,0x920A050A,0x6804040A,0x6800000C,0xBF8CC07F,0x68040403, + 0x7D880000,0xBF8C0F70,0xD2850003,0x00020609,0x68020303,0x6802020E, + 0xD0C40000,0x00020201,0x8680006A,0x7D880402,0x86806A00,0xBE822000, + 0xBF88034F,0xC00A0003,0x00000000,0xC00A0403,0x00000010,0xBF8CC07F, + 0xC00E0200,0x00000000,0x680A0412,0x68080211,0x68060010,0xBF8CC07F, + 0xF0005F00,0x00020303,0xBF8C0F70,0x7C8E0703,0x000E0680,0x7E0602F2, + 0x7C9C0EF2,0xBE80206A,0xBF88010B,0x7E060280,0x7C960E80,0xBE84206A, + 0xBF880106,0xBE8800FF,0x3B4D2E1C,0x7C960E08,0xBE88206A,0x8888087E, + 0xBF8800FC,0xD1740103,0x00000107,0xBE8A00FF,0x3F2AAAAB,0x7C88060A, + 0xD1000008,0x01A90280,0xD2880003,0x00021103,0x021406F2,0x7E1A450A, + 0x0416070A,0xD1730109,0x00000107,0x0418170A,0x6A101109,0x021206F3, + 0x04061903,0x041616F2,0x0206070B,0x0A161B09,0x0A18170A,0xD1CB000A, + 0x8432150B,0x7614070B,0x0206150C,0x04181903,0x0414190A,0x04180709, + 0x04121909,0x04060709,0x04061503,0x0206070C,0x0A06070D,0x0212070B, + 0x04141709,0x04061503,0x0A141309,0xD1CB000B,0x842A1309,0x02180703, + 0x76161909,0x76160703,0x0218170A,0x7E100B08,0x0414150C,0x0414150B, + 0x7E1602FF,0x3E91F4C4,0x761618FF,0x3E76C4E1,0x7E1A02FF,0x3ECCCDEF, + 0xBE8A00FF,0x3F317218,0x761A170C,0x0A16100A,0xD1CB000E,0x842C1508, + 0x761C10FF,0xB102E308,0x02101D0B,0x04161708,0x0A201909,0x0416170E, + 0xD288000E,0x00010309,0xD1CB0011,0x8442130C,0x0A121509,0x7612070C, + 0xD288000F,0x00010303,0x02061311,0x02120710,0x04202109,0x04062103, + 0x0A201B0C,0xD1CB000C,0x84421B0C,0x76181B0A,0x02141910,0x041A210A, + 0x04181B0C,0x021A14FF,0x3F2AAAAA,0x02201AFF,0xBF2AAAAA,0x0414210A, + 0x021818FF,0x31739010,0x0214190A,0x0218150D,0x041A1B0C,0x04141B0A, + 0x0A061903,0x0A1A1909,0xD1CB0010,0x84361909,0x76061509,0x02060710, + 0x0212070D,0x04141B09,0x04061503,0x0214130E,0x04181D0A,0x04121909, + 0x0206070F,0x02060709,0x0212070A,0x04141509,0x04061503,0x02141308, + 0x0418110A,0x041A190A,0x04101B08,0x04121909,0x02101109,0x0212070B, + 0x04181709,0x02101109,0x041A1909,0x0212110A,0x04141509,0x04161B0B, + 0x04061903,0x02061703,0x04101508,0x02061103,0x02100709,0x04121308, + 0xBE8A00FF,0x3ED55555,0x04061303,0x0A12100A,0xD1CB0008,0x84241508, + 0x7610060A,0xB00C0204,0x02061109,0xD010006A,0x00001909,0x04141303, + 0x00061303,0x0A1206FF,0x3FB8AA3B,0x7E123D09,0x04101508,0x0A1412FF, + 0x3F317200,0x04161503,0x0418070B,0x041A190B,0xD010000A,0x00001903, + 0x041A1B03,0x0214190A,0xD1000008,0x00290108,0x0414150D,0x02101508, + 0x0214110B,0x0416170A,0x04101708,0x0A1612FF,0x35BFBC00,0x0418170A, + 0x0414190A,0x0414170A,0x02101508,0x0214110C,0x0416190A,0x04101708, + 0x0A1612FF,0x2EA39EF3,0x0418170A,0x0414190A,0x0414170A,0x02101508, + 0x0214110C,0x0416190A,0x04101708,0x7E1602FF,0x3C091DE6,0x761614FF, + 0x3AB42872,0x7E1802FF,0x3D2AADCC,0x7618170A,0x7E1602FF,0x3E2AAA47, + 0x7616190A,0x7E1802FF,0x3EFFFFFC,0x7618170A,0x0A16150A,0xD1CB000D, + 0x842E150A,0x021C1108,0x761A1D0A,0x761A1108,0x021C1B0B,0x0416170E, + 0x0416170D,0x0A1A1D0C,0xD1CB000E,0x8436190E,0x761C190B,0x02161D0D, + 0x04181B0B,0x021A170A,0x0414150D,0x0418190E,0x0414150B,0x02101908, + 0x7E121109,0x0210110A,0x0210110D,0x021010F2,0xBE8A00FF,0x42B20000, + 0xD2880008,0x00021308,0x7C9C060A,0x7E1202FF,0x7F800000,0xBE8A00FF, + 0xC2D00000,0x00101109,0x7C96060A,0xB00A03C0,0x00061080,0x7E1002FF, + 0x7FC00000,0xD010006A,0x00001507,0x00060708,0x7C9A0E80,0x00060680, + 0xD010006A,0x00001907,0x00061303,0x260606FF,0x7FFFFFFF,0x7C900F07, + 0x00060F03,0x7C9A0EF2,0x001006F2,0x7E0602FF,0xBD6147AE,0x760610FF, + 0x3F870A3D,0xBE882108,0x88FE087E,0x0A060EFF,0x414EB852,0x87FE047E, + 0x87FE007E,0x7C8E0904,0x000E0880,0x7E0802F2,0x7C9C0EF2,0xBE80206A, + 0xBF88010A,0x7E080280,0x7C960E80,0x86FE6A7E,0xBF880106,0xBE8400FF, + 0x3B4D2E1C,0x7C960E04,0xBE84206A,0x8884047E,0xBF8800FC,0xD1740104, + 0x00000107,0xBE8800FF,0x3F2AAAAB,0x7C880808,0xD1000008,0x01A90280, + 0xD2880004,0x00021104,0x021408F2,0x7E1A450A,0x0416090A,0xD1730109, + 0x00000107,0x0418170A,0x6A101109,0x021208F3,0x04081904,0x041616F2, + 0x0208090B,0x0A161B09,0x0A18170A,0xD1CB000A,0x8432150B,0x7614090B, + 0x0208150C,0x04181904,0x0414190A,0x04180909,0x04121909,0x04080909, + 0x04081504,0x0208090C,0x0A08090D,0x0212090B,0x04141709,0x04081504, + 0x0A141309,0xD1CB000B,0x842A1309,0x02180904,0x76161909,0x76160904, + 0x0218170A,0x7E100B08,0x0414150C,0x0414150B,0x7E1602FF,0x3E91F4C4, + 0x761618FF,0x3E76C4E1,0x7E1A02FF,0x3ECCCDEF,0xBE8800FF,0x3F317218, + 0x761A170C,0x0A161008,0xD1CB000E,0x842C1108,0x761C10FF,0xB102E308, + 0x02101D0B,0x04161708,0x0A201909,0x0416170E,0xD288000E,0x00010309, + 0xD1CB0011,0x8442130C,0x0A121509,0x7612090C,0xD288000F,0x00010304, + 0x02081311,0x02120910,0x04202109,0x04082104,0x0A201B0C,0xD1CB000C, + 0x84421B0C,0x76181B0A,0x02141910,0x041A210A,0x04181B0C,0x021A14FF, + 0x3F2AAAAA,0x02201AFF,0xBF2AAAAA,0x0414210A,0x021818FF,0x31739010, + 0x0214190A,0x0218150D,0x041A1B0C,0x04141B0A,0x0A081904,0x0A1A1909, + 0xD1CB0010,0x84361909,0x76081509,0x02080910,0x0212090D,0x04141B09, + 0x04081504,0x0214130E,0x04181D0A,0x04121909,0x0208090F,0x02080909, + 0x0212090A,0x04141509,0x04081504,0x02141308,0x0418110A,0x041A190A, + 0x04101B08,0x04121909,0x02101109,0x0212090B,0x04181709,0x02101109, + 0x041A1909,0x0212110A,0x04141509,0x04161B0B,0x04081904,0x02081704, + 0x04101508,0x02081104,0x02100909,0x04121308,0xBE8800FF,0x3ED55555, + 0x04081304,0x0A121008,0xD1CB0008,0x84241108,0x76100808,0xB00A0204, + 0x02081109,0xD010006A,0x00001509,0x04141304,0x00081304,0x0A1208FF, + 0x3FB8AA3B,0x7E123D09,0x04101508,0x0A1412FF,0x3F317200,0x04161504, + 0x0418090B,0x041A190B,0xD0100008,0x00001504,0x041A1B04,0x0214190A, + 0xD1000008,0x00210108,0x0414150D,0x02101508,0x0214110B,0x0416170A, + 0x04101708,0x0A1612FF,0x35BFBC00,0x0418170A,0x0414190A,0x0414170A, + 0x02101508,0x0214110C,0x0416190A,0x04101708,0x0A1612FF,0x2EA39EF3, + 0x0418170A,0x0414190A,0x0414170A,0x02101508,0x0214110C,0x0416190A, + 0x04101708,0x7E1602FF,0x3C091DE6,0x761614FF,0x3AB42872,0x7E1802FF, + 0x3D2AADCC,0x7618170A,0x7E1602FF,0x3E2AAA47,0x7616190A,0x7E1802FF, + 0x3EFFFFFC,0x7618170A,0x0A16150A,0xD1CB000D,0x842E150A,0x021C1108, + 0x761A1D0A,0x761A1108,0x021C1B0B,0x0416170E,0x0416170D,0x0A1A1D0C, + 0xD1CB000E,0x8436190E,0x761C190B,0x02161D0D,0x04181B0B,0x021A170A, + 0x0414150D,0x0418190E,0x0414150B,0x02101908,0x7E121109,0x0210110A, + 0x0210110D,0x021010F2,0xBE8800FF,0x42B20000,0xD2880008,0x00021308, + 0x7C9C0808,0x7E1202FF,0x7F800000,0xBE8800FF,0xC2D00000,0x00101109, + 0x7C960808,0xB00803C0,0x00081080,0x7E1002FF,0x7FC00000,0xD010006A, + 0x00001107,0x00080908,0x7C9A0E80,0x00080880,0xD010006A,0x00001507, + 0x00081304,0x260808FF,0x7FFFFFFF,0x7C900F07,0x00080F04,0x7C9A0EF2, + 0x001008F2,0x7E0802FF,0xBD6147AE,0x760810FF,0x3F870A3D,0xBE842104, + 0x88FE047E,0x0A080EFF,0x414EB852,0x87FE007E,0xC00A0103,0x00000020, + 0x7C8E0B05,0x000A0A80,0x7E0E02F2,0x7C9C0AF2,0xBE80206A,0xBF88010B, + 0x7E0E0280,0x7C960A80,0x86FE6A7E,0xBF880107,0xBF8CC07F,0xBE8700FF, + 0x3B4D2E1C,0x7C960A07,0xBE88206A,0x8888087E,0xBF8800FC,0xD1740107, + 0x00000105,0xBE8700FF,0x3F2AAAAB,0x7C880E07,0xD1000008,0x01A90280, + 0xD2880007,0x00021107,0x02140EF2,0x7E1A450A,0x04160F0A,0xD1730109, + 0x00000105,0x0418170A,0x6A101109,0x02120EF3,0x040E1907,0x041616F2, + 0x020E0F0B,0x0A161B09,0x0A18170A,0xD1CB000A,0x8432150B,0x76140F0B, + 0x020E150C,0x04181907,0x0414190A,0x04180F09,0x04121909,0x040E0F09, + 0x040E1507,0x020E0F0C,0x0A0E0F0D,0x02120F0B,0x04141709,0x040E1507, + 0x0A141309,0xD1CB000B,0x842A1309,0x02180F07,0x76161909,0x76160F07, + 0x0218170A,0x7E100B08,0x0414150C,0x0414150B,0x7E1602FF,0x3E91F4C4, + 0x761618FF,0x3E76C4E1,0x7E1A02FF,0x3ECCCDEF,0xBE8700FF,0x3F317218, + 0x761A170C,0x0A161007,0xD1CB000E,0x842C0F08,0x761C10FF,0xB102E308, + 0x02101D0B,0x04161708,0x0A201909,0x0416170E,0xD288000E,0x00010309, + 0xD1CB0011,0x8442130C,0x0A121509,0x76120F0C,0xD288000F,0x00010307, + 0x020E1311,0x02120F10,0x04202109,0x040E2107,0x0A201B0C,0xD1CB000C, + 0x84421B0C,0x76181B0A,0x02141910,0x041A210A,0x04181B0C,0x021A14FF, + 0x3F2AAAAA,0x02201AFF,0xBF2AAAAA,0x0414210A,0x021818FF,0x31739010, + 0x0214190A,0x0218150D,0x041A1B0C,0x04141B0A,0x0A0E1907,0x0A1A1909, + 0xD1CB0010,0x84361909,0x760E1509,0x020E0F10,0x02120F0D,0x04141B09, + 0x040E1507,0x0214130E,0x04181D0A,0x04121909,0x020E0F0F,0x020E0F09, + 0x02120F0A,0x04141509,0x040E1507,0x02141308,0x0418110A,0x041A190A, + 0x04101B08,0x04121909,0x02101109,0x02120F0B,0x04181709,0x02101109, + 0x041A1909,0x0212110A,0x04141509,0x04161B0B,0x040E1907,0x020E1707, + 0x04101508,0x020E1107,0x02100F09,0x04121308,0xBE8700FF,0x3ED55555, + 0x040E1307,0x0A121007,0xD1CB0008,0x84240F08,0x76100E07,0xB0070204, + 0x020E1109,0xD010006A,0x00000F09,0x04141307,0x000E1307,0x0A120EFF, + 0x3FB8AA3B,0x7E123D09,0x04101508,0x0A1412FF,0x3F317200,0x04161507, + 0x04180F0B,0x041A190B,0xD010000A,0x00000F07,0x041A1B07,0x0214190A, + 0xD1000008,0x00290108,0x0414150D,0x02101508,0x0214110B,0x0416170A, + 0x04101708,0x0A1612FF,0x35BFBC00,0x0418170A,0x0414190A,0x0414170A, + 0x02101508,0x0214110C,0x0416190A,0x04101708,0x0A1612FF,0x2EA39EF3, + 0x0418170A,0x0414190A,0x0414170A,0x02101508,0x0214110C,0x0416190A, + 0x04101708,0x7E1602FF,0x3C091DE6,0x761614FF,0x3AB42872,0x7E1802FF, + 0x3D2AADCC,0x7618170A,0x7E1602FF,0x3E2AAA47,0x7616190A,0x7E1802FF, + 0x3EFFFFFC,0x7618170A,0x0A16150A,0xD1CB000D,0x842E150A,0x021C1108, + 0x761A1D0A,0x761A1108,0x021C1B0B,0x0416170E,0x0416170D,0x0A1A1D0C, + 0xD1CB000E,0x8436190E,0x761C190B,0x02161D0D,0x04181B0B,0x021A170A, + 0x0414150D,0x0418190E,0x0414150B,0x02101908,0x7E121109,0x0210110A, + 0x0210110D,0x021010F2,0xBE8A00FF,0x42B20000,0xD2880008,0x00021308, + 0x7C9C0E0A,0x7E1202FF,0x7F800000,0xBE8A00FF,0xC2D00000,0x00101109, + 0x7C960E0A,0xB00A03C0,0x000E1080,0x7E1002FF,0x7FC00000,0xD010006A, + 0x00001505,0x000E0F08,0x7C9A0A80,0x000E0E80,0xD010006A,0x00000F05, + 0x000E1307,0x260E0EFF,0x7FFFFFFF,0x7C900B05,0x000E0B07,0x7C9A0AF2, + 0x00100EF2,0x7E0E02FF,0xBD6147AE,0x760E10FF,0x3F870A3D,0xBE882108, + 0x88FE087E,0x0A0E0AFF,0x414EB852,0x87FE007E,0xBF8CC07F,0x68040406, + 0x68020205,0x68000004,0xC00E0001,0x00000000,0x7E0A0307,0xBF8CC07F, + 0xF0205F00,0x00000300,0xBF810000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0x00000001,0x00000002,0x00090001,0x00060000, + 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00AF0083,0x00001390,0x000A000B,0x00000000, + 0x00000000,0x00000000,0x00000078,0x00000000,0x00000000,0x000D0016, + 0x00000000,0x00000000,0x00000000,0x06040404,0xFFFFFFFF,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x7E060204,0x7E080205,0xDC488006,0x037F0003,0xC0060102,0x00000004, + 0xC00A0003,0x00000030,0xC00A0303,0x00000048,0xBF8CC07F,0xC00200C3, + 0x00000058,0xBE8B00FF,0x0000FFFF,0x86040B04,0x86050B05,0x92080408, + 0x68000008,0x920A050A,0x6804040A,0x6800000C,0xBF8CC07F,0x68040403, + 0x7D880000,0xBF8C0F70,0xD2850003,0x00020609,0x68020303,0x6802020E, + 0xD0C40000,0x00020201,0x8680006A,0x7D880402,0x86806A00,0xBE822000, + 0xBF880017,0xC00A0203,0x00000000,0xC00A0303,0x00000010,0xC00A0403, + 0x00000020,0xBF8CC07F,0xC00E0004,0x00000000,0x6806040E,0x680C0412, + 0x680A0211,0x6804020D,0x68080010,0x6802000C,0xBF8CC07F,0xF0005F00, + 0x00000001,0xC00E0005,0x00000000,0xBF8C0070,0xF0205F00,0x00000004, + 0xBF810000,0xBF800000,0xBF800000,0xBF800000,0x00000001,0x00000002, + 0x00090001,0x00060000,0x00000100,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00AF0082,0x00000090, + 0x000A000B,0x00000000,0x00000000,0x00000000,0x00000070,0x00000000, + 0x00000000,0x000C0012,0x00000000,0x00000000,0x00000000,0x06040404, + 0xFFFFFFFF,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00000000,0x00000000,0xC0020102,0x00000004,0xC00A0003,0x00000030, + 0xBF8CC07F,0xC0020043,0x00000040,0x8602FF04,0x0000FFFF,0x92080208, + 0x68000008,0xBF8CC07F,0x68000001,0x7D880000,0xBE80206A,0xC00A0203, + 0x00000000,0xC00E0003,0x00000010,0xBF8CC07F,0xC00A0304,0x00000000, + 0xC00A0205,0x00000000,0x68020000,0x68080004,0xBF8CC07F,0xE00C2000, + 0x80030001,0xBF8C0F70,0xE01C2000,0x80020004,0xBF810000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000,0xBF800000, + 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0x00000008,0x00000000,0x00000010,0x00000000,0x0000003E,0x00000001, + 0x00000030,0x00000000,0x00000000,0x00000000,0x00008070,0x00000000, + 0x0000010E,0x00000000,0x00000000,0x00000000,0x00000001,0x00000000, + 0x00000001,0x00000000,0x00000047,0x00000002,0x00000000,0x00000000, + 0x00000000,0x00000000,0x00008180,0x00000000,0x00000810,0x00000000, + 0x0000000C,0x0000004C,0x00000008,0x00000000,0x00000018,0x00000000, + 0x0000004F,0x00000003,0x00000000,0x00000000,0x00000000,0x00000000, + 0x00008990,0x00000000,0x00000061,0x00000000,0x00000000,0x00000000, + 0x00000001,0x00000000,0x00000000,0x00000000,0x00000059,0x00000003, + 0x00000000,0x00000000,0x00000000,0x00000000,0x000089F1,0x00000000, + 0x00000367,0x00000000,0x00000000,0x00000000,0x00000001,0x00000000, + 0x00000000,0x00000000, +}; + diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/resource.h b/projects/rocr-runtime/runtime/hsa-runtime/image/resource.h new file mode 100644 index 0000000000..a9943917c8 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/resource.h @@ -0,0 +1,155 @@ +#ifndef HSA_RUNTIME_EXT_IMAGE_RESOURCE_H +#define HSA_RUNTIME_EXT_IMAGE_RESOURCE_H + +#include + +#include + +#include "inc/hsa.h" +#include "inc/hsa_ext_image.h" + +#include "util.h" + +#define HSA_IMAGE_OBJECT_SIZE_DWORD 12 +#define HSA_IMAGE_OBJECT_ALIGNMENT 16 + +#define HSA_SAMPLER_OBJECT_SIZE_DWORD 8 +#define HSA_SAMPLER_OBJECT_ALIGNMENT 16 + +#define GEOMETRY_COUNT 8 +#define ORDER_COUNT 20 +#define TYPE_COUNT 16 +#define RO HSA_EXT_IMAGE_CAPABILITY_READ_ONLY +#define ROWO \ + (HSA_EXT_IMAGE_CAPABILITY_READ_ONLY | HSA_EXT_IMAGE_CAPABILITY_WRITE_ONLY) +#define RW \ + (HSA_EXT_IMAGE_CAPABILITY_READ_ONLY | HSA_EXT_IMAGE_CAPABILITY_WRITE_ONLY | \ + HSA_EXT_IMAGE_CAPABILITY_READ_WRITE) + + +namespace amd { + +typedef struct metadata_amd_s { + uint32_t version; // Must be 1 + uint32_t vendorID; // AMD | CZ + uint32_t words[8]; + uint32_t mip_offsets[0]; //Mip level offset bits [39:8] for each level (if any) +} metadata_amd_t; + +/// @brief Structure to represent image access component. +typedef struct Swizzle { + uint8_t x; + uint8_t y; + uint8_t z; + uint8_t w; +} Swizzle; + +/// @brief Structure to contain the property of an image with a particular +/// format and geometry. +typedef struct ImageProperty { + uint8_t cap; // hsa_ext_image_format_capability_t mask. + uint8_t element_size; // size per pixel in bytes. + uint8_t data_format; // device specific channel ordering. + uint8_t data_type; // device specific channel type. +} ImageProperty; + +/// @brief Structure to represent an HSA image object. +typedef struct Image { +private: + Image() { + component.handle = 0; + permission = HSA_ACCESS_PERMISSION_RO; + data = NULL; + std::memset(srd, 0, sizeof(srd)); + std::memset(&desc, 0, sizeof(desc)); + row_pitch = slice_pitch = 0; + tile_mode = LINEAR; + } + + ~Image() {} + +public: + typedef enum TileMode { + LINEAR, + TILED + } TileMode; + + /// @brief Create an Image. + static Image* Create(hsa_agent_t agent); + + /// @brief Destroy an Image. + static void Destroy(const Image* image); + + /// @brief Convert from vendor representation to HSA handle. + uint64_t Convert() const { return reinterpret_cast(srd); } + + /// @brief Convert from HSA handle to vendor representation. + static Image* Convert(uint64_t handle) { + return reinterpret_cast(handle - offsetof(Image, srd)); + } + + // Vendor specific image object. + __ALIGNED__( + HSA_IMAGE_OBJECT_ALIGNMENT) uint32_t srd[HSA_IMAGE_OBJECT_SIZE_DWORD]; + + // HSA component of the image object. + hsa_agent_t component; + + // HSA image descriptor of the image object. + hsa_ext_image_descriptor_t desc; + + // HSA image access permission of the image object. + hsa_access_permission_t permission; + + // Backing storage of the image object. + void* data; + + // Device specific row pitch of the image object in size. + size_t row_pitch; + + // Device specific slice pitch of the image object in size. + size_t slice_pitch; + + // Device specific tile mode + TileMode tile_mode; +} Image; + +/// @brief Structure to represent an HSA sampler object. +typedef struct Sampler { +private: + Sampler() { + component.handle = 0; + std::memset(srd, 0, sizeof(srd)); + std::memset(&desc, 0, sizeof(desc)); + } + + ~Sampler() {} + +public: + /// @brief Create a Sampler. + static Sampler* Create(hsa_agent_t agent); + + /// @brief Destroy a Sampler. + static void Destroy(const Sampler* sampler); + + /// @brief Convert from vendor representation to HSA handle. + uint64_t Convert() { return reinterpret_cast(srd); } + + /// @brief Convert from HSA handle to vendor representation. + static Sampler* Convert(uint64_t handle) { + return reinterpret_cast(handle - offsetof(Sampler, srd)); + } + + // Vendor specific sampler object. + __ALIGNED__(HSA_SAMPLER_OBJECT_ALIGNMENT) + uint32_t srd[HSA_SAMPLER_OBJECT_SIZE_DWORD]; + + // HSA component of the sampler object. + hsa_agent_t component; + + // HSA sampler descriptor of the image object. + hsa_ext_sampler_descriptor_t desc; +} Sampler; + +} // namespace +#endif // HSA_RUNTIME_EXT_IMAGE_RESOURCE_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/resource_ai.h b/projects/rocr-runtime/runtime/hsa-runtime/image/resource_ai.h new file mode 100644 index 0000000000..4d5d6c92c5 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/resource_ai.h @@ -0,0 +1,1120 @@ +#ifndef HSA_RUNTIME_EXT_IMAGE_RESOURCE_AI_H +#define HSA_RUNTIME_EXT_IMAGE_RESOURCE_AI_H + +#if defined(LITTLEENDIAN_CPU) +#elif defined(BIGENDIAN_CPU) +#else +#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" +#endif + +namespace amd { + + union SQ_BUF_RSRC_WORD0 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int BASE_ADDRESS : 32; +#elif defined(BIGENDIAN_CPU) + unsigned int BASE_ADDRESS : 32; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_BUF_RSRC_WORD1 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int BASE_ADDRESS_HI : 16; + unsigned int STRIDE : 14; + unsigned int CACHE_SWIZZLE : 1; + unsigned int SWIZZLE_ENABLE : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int SWIZZLE_ENABLE : 1; + unsigned int CACHE_SWIZZLE : 1; + unsigned int STRIDE : 14; + unsigned int BASE_ADDRESS_HI : 16; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_BUF_RSRC_WORD2 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int NUM_RECORDS : 32; +#elif defined(BIGENDIAN_CPU) + unsigned int NUM_RECORDS : 32; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_BUF_RSRC_WORD3 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int DST_SEL_X : 3; + unsigned int DST_SEL_Y : 3; + unsigned int DST_SEL_Z : 3; + unsigned int DST_SEL_W : 3; + unsigned int NUM_FORMAT : 3; + unsigned int DATA_FORMAT : 4; + unsigned int USER_VM_ENABLE : 1; + unsigned int USER_VM_MODE : 1; + unsigned int INDEX_STRIDE : 2; + unsigned int ADD_TID_ENABLE : 1; + unsigned int : 3; + unsigned int NV : 1; + unsigned int : 2; + unsigned int TYPE : 2; +#elif defined(BIGENDIAN_CPU) + unsigned int TYPE : 2; + unsigned int : 2; + unsigned int NV : 1; + unsigned int : 3; + unsigned int ADD_TID_ENABLE : 1; + unsigned int INDEX_STRIDE : 2; + unsigned int USER_VM_MODE : 1; + unsigned int USER_VM_ENABLE : 1; + unsigned int DATA_FORMAT : 4; + unsigned int NUM_FORMAT : 3; + unsigned int DST_SEL_W : 3; + unsigned int DST_SEL_Z : 3; + unsigned int DST_SEL_Y : 3; + unsigned int DST_SEL_X : 3; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_RSRC_WORD0 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int BASE_ADDRESS : 32; +#elif defined(BIGENDIAN_CPU) + unsigned int BASE_ADDRESS : 32; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_RSRC_WORD1 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int BASE_ADDRESS_HI : 8; + unsigned int MIN_LOD : 12; + unsigned int DATA_FORMAT : 6; + unsigned int NUM_FORMAT : 4; + unsigned int NV : 1; + unsigned int META_DIRECT : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int META_DIRECT : 1; + unsigned int NV : 1; + unsigned int NUM_FORMAT : 4; + unsigned int DATA_FORMAT : 6; + unsigned int MIN_LOD : 12; + unsigned int BASE_ADDRESS_HI : 8; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_RSRC_WORD2 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int WIDTH : 14; + unsigned int HEIGHT : 14; + unsigned int PERF_MOD : 3; + unsigned int : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int : 1; + unsigned int PERF_MOD : 3; + unsigned int HEIGHT : 14; + unsigned int WIDTH : 14; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_RSRC_WORD3 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int DST_SEL_X : 3; + unsigned int DST_SEL_Y : 3; + unsigned int DST_SEL_Z : 3; + unsigned int DST_SEL_W : 3; + unsigned int BASE_LEVEL : 4; + unsigned int LAST_LEVEL : 4; + unsigned int SW_MODE : 5; + unsigned int : 3; + unsigned int TYPE : 4; +#elif defined(BIGENDIAN_CPU) + unsigned int TYPE : 4; + unsigned int : 3; + unsigned int SW_MODE : 5; + unsigned int LAST_LEVEL : 4; + unsigned int BASE_LEVEL : 4; + unsigned int DST_SEL_W : 3; + unsigned int DST_SEL_Z : 3; + unsigned int DST_SEL_Y : 3; + unsigned int DST_SEL_X : 3; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_RSRC_WORD4 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int DEPTH : 13; + unsigned int PITCH : 16; + unsigned int BC_SWIZZLE : 3; +#elif defined(BIGENDIAN_CPU) + unsigned int BC_SWIZZLE : 3; + unsigned int PITCH : 16; + unsigned int DEPTH : 13; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_RSRC_WORD5 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int BASE_ARRAY : 13; + unsigned int ARRAY_PITCH : 4; + unsigned int META_DATA_ADDRESS_HI : 8; + unsigned int META_LINEAR : 1; + unsigned int META_PIPE_ALIGNED : 1; + unsigned int META_RB_ALIGNED : 1; + unsigned int MAX_MIP : 4; +#elif defined(BIGENDIAN_CPU) + unsigned int MAX_MIP : 4; + unsigned int META_RB_ALIGNED : 1; + unsigned int META_PIPE_ALIGNED : 1; + unsigned int META_LINEAR : 1; + unsigned int META_DATA_ADDRESS_HI : 8; + unsigned int ARRAY_PITCH : 4; + unsigned int BASE_ARRAY : 13; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_RSRC_WORD6 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int MIN_LOD_WARN : 12; + unsigned int COUNTER_BANK_ID : 8; + unsigned int LOD_HDW_CNT_EN : 1; + unsigned int COMPRESSION_EN : 1; + unsigned int ALPHA_IS_ON_MSB : 1; + unsigned int COLOR_TRANSFORM : 1; + unsigned int LOST_ALPHA_BITS : 4; + unsigned int LOST_COLOR_BITS : 4; +#elif defined(BIGENDIAN_CPU) + unsigned int LOST_COLOR_BITS : 4; + unsigned int LOST_ALPHA_BITS : 4; + unsigned int COLOR_TRANSFORM : 1; + unsigned int ALPHA_IS_ON_MSB : 1; + unsigned int COMPRESSION_EN : 1; + unsigned int LOD_HDW_CNT_EN : 1; + unsigned int COUNTER_BANK_ID : 8; + unsigned int MIN_LOD_WARN : 12; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_RSRC_WORD7 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int META_DATA_ADDRESS : 32; +#elif defined(BIGENDIAN_CPU) + unsigned int META_DATA_ADDRESS : 32; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_SAMP_WORD0 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int CLAMP_X : 3; + unsigned int CLAMP_Y : 3; + unsigned int CLAMP_Z : 3; + unsigned int MAX_ANISO_RATIO : 3; + unsigned int DEPTH_COMPARE_FUNC : 3; + unsigned int FORCE_UNNORMALIZED : 1; + unsigned int ANISO_THRESHOLD : 3; + unsigned int MC_COORD_TRUNC : 1; + unsigned int FORCE_DEGAMMA : 1; + unsigned int ANISO_BIAS : 6; + unsigned int TRUNC_COORD : 1; + unsigned int DISABLE_CUBE_WRAP : 1; + unsigned int FILTER_MODE : 2; + unsigned int COMPAT_MODE : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int COMPAT_MODE : 1; + unsigned int FILTER_MODE : 2; + unsigned int DISABLE_CUBE_WRAP : 1; + unsigned int TRUNC_COORD : 1; + unsigned int ANISO_BIAS : 6; + unsigned int FORCE_DEGAMMA : 1; + unsigned int MC_COORD_TRUNC : 1; + unsigned int ANISO_THRESHOLD : 3; + unsigned int FORCE_UNNORMALIZED : 1; + unsigned int DEPTH_COMPARE_FUNC : 3; + unsigned int MAX_ANISO_RATIO : 3; + unsigned int CLAMP_Z : 3; + unsigned int CLAMP_Y : 3; + unsigned int CLAMP_X : 3; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_SAMP_WORD1 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int MIN_LOD : 12; + unsigned int MAX_LOD : 12; + unsigned int PERF_MIP : 4; + unsigned int PERF_Z : 4; +#elif defined(BIGENDIAN_CPU) + unsigned int PERF_Z : 4; + unsigned int PERF_MIP : 4; + unsigned int MAX_LOD : 12; + unsigned int MIN_LOD : 12; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_SAMP_WORD2 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int LOD_BIAS : 14; + unsigned int LOD_BIAS_SEC : 6; + unsigned int XY_MAG_FILTER : 2; + unsigned int XY_MIN_FILTER : 2; + unsigned int Z_FILTER : 2; + unsigned int MIP_FILTER : 2; + unsigned int MIP_POINT_PRECLAMP : 1; + unsigned int BLEND_ZERO_PRT : 1; + unsigned int FILTER_PREC_FIX : 1; + unsigned int ANISO_OVERRIDE : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int ANISO_OVERRIDE : 1; + unsigned int FILTER_PREC_FIX : 1; + unsigned int BLEND_ZERO_PRT : 1; + unsigned int MIP_POINT_PRECLAMP : 1; + unsigned int MIP_FILTER : 2; + unsigned int Z_FILTER : 2; + unsigned int XY_MIN_FILTER : 2; + unsigned int XY_MAG_FILTER : 2; + unsigned int LOD_BIAS_SEC : 6; + unsigned int LOD_BIAS : 14; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + union SQ_IMG_SAMP_WORD3 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int BORDER_COLOR_PTR : 12; + unsigned int SKIP_DEGAMMA : 1; + unsigned int : 17; + unsigned int BORDER_COLOR_TYPE : 2; +#elif defined(BIGENDIAN_CPU) + unsigned int BORDER_COLOR_TYPE : 2; + unsigned int : 17; + unsigned int SKIP_DEGAMMA : 1; + unsigned int BORDER_COLOR_PTR : 12; +#endif + } bitfields, bits; + unsigned int u32All; + signed int i32All; + float f32All; + }; + + + +#define SQ_BUF_RSRC_WORD0_REG_SIZE 32 +#define SQ_BUF_RSRC_WORD0_BASE_ADDRESS_SIZE 32 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_buf_rsrc_word0_t { + unsigned int base_address : SQ_BUF_RSRC_WORD0_BASE_ADDRESS_SIZE; + } sq_buf_rsrc_word0_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_buf_rsrc_word0_t { + unsigned int base_address : SQ_BUF_RSRC_WORD0_BASE_ADDRESS_SIZE; + } sq_buf_rsrc_word0_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_buf_rsrc_word0_t f; +} sq_buf_rsrc_word0_u; + +#define SQ_BUF_RSRC_WORD1_REG_SIZE 32 +#define SQ_BUF_RSRC_WORD1_BASE_ADDRESS_HI_SIZE 16 +#define SQ_BUF_RSRC_WORD1_STRIDE_SIZE 14 +#define SQ_BUF_RSRC_WORD1_CACHE_SWIZZLE_SIZE 1 +#define SQ_BUF_RSRC_WORD1_SWIZZLE_ENABLE_SIZE 1 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_buf_rsrc_word1_t { + unsigned int base_address_hi : SQ_BUF_RSRC_WORD1_BASE_ADDRESS_HI_SIZE; + unsigned int stride : SQ_BUF_RSRC_WORD1_STRIDE_SIZE; + unsigned int cache_swizzle : SQ_BUF_RSRC_WORD1_CACHE_SWIZZLE_SIZE; + unsigned int swizzle_enable : SQ_BUF_RSRC_WORD1_SWIZZLE_ENABLE_SIZE; + } sq_buf_rsrc_word1_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_buf_rsrc_word1_t { + unsigned int swizzle_enable : SQ_BUF_RSRC_WORD1_SWIZZLE_ENABLE_SIZE; + unsigned int cache_swizzle : SQ_BUF_RSRC_WORD1_CACHE_SWIZZLE_SIZE; + unsigned int stride : SQ_BUF_RSRC_WORD1_STRIDE_SIZE; + unsigned int base_address_hi : SQ_BUF_RSRC_WORD1_BASE_ADDRESS_HI_SIZE; + } sq_buf_rsrc_word1_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_buf_rsrc_word1_t f; +} sq_buf_rsrc_word1_u; + +#define SQ_BUF_RSRC_WORD2_REG_SIZE 32 +#define SQ_BUF_RSRC_WORD2_NUM_RECORDS_SIZE 32 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_buf_rsrc_word2_t { + unsigned int num_records : SQ_BUF_RSRC_WORD2_NUM_RECORDS_SIZE; + } sq_buf_rsrc_word2_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_buf_rsrc_word2_t { + unsigned int num_records : SQ_BUF_RSRC_WORD2_NUM_RECORDS_SIZE; + } sq_buf_rsrc_word2_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_buf_rsrc_word2_t f; +} sq_buf_rsrc_word2_u; + +#define SQ_BUF_RSRC_WORD3_REG_SIZE 32 +#define SQ_BUF_RSRC_WORD3_DST_SEL_X_SIZE 3 +#define SQ_BUF_RSRC_WORD3_DST_SEL_Y_SIZE 3 +#define SQ_BUF_RSRC_WORD3_DST_SEL_Z_SIZE 3 +#define SQ_BUF_RSRC_WORD3_DST_SEL_W_SIZE 3 +#define SQ_BUF_RSRC_WORD3_NUM_FORMAT_SIZE 3 +#define SQ_BUF_RSRC_WORD3_DATA_FORMAT_SIZE 4 +#define SQ_BUF_RSRC_WORD3_USER_VM_ENABLE_SIZE 1 +#define SQ_BUF_RSRC_WORD3_USER_VM_MODE_SIZE 1 +#define SQ_BUF_RSRC_WORD3_INDEX_STRIDE_SIZE 2 +#define SQ_BUF_RSRC_WORD3_ADD_TID_ENABLE_SIZE 1 +#define SQ_BUF_RSRC_WORD3_NV_SIZE 1 +#define SQ_BUF_RSRC_WORD3_TYPE_SIZE 2 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_buf_rsrc_word3_t { + unsigned int dst_sel_x : SQ_BUF_RSRC_WORD3_DST_SEL_X_SIZE; + unsigned int dst_sel_y : SQ_BUF_RSRC_WORD3_DST_SEL_Y_SIZE; + unsigned int dst_sel_z : SQ_BUF_RSRC_WORD3_DST_SEL_Z_SIZE; + unsigned int dst_sel_w : SQ_BUF_RSRC_WORD3_DST_SEL_W_SIZE; + unsigned int num_format : SQ_BUF_RSRC_WORD3_NUM_FORMAT_SIZE; + unsigned int data_format : SQ_BUF_RSRC_WORD3_DATA_FORMAT_SIZE; + unsigned int user_vm_enable : SQ_BUF_RSRC_WORD3_USER_VM_ENABLE_SIZE; + unsigned int user_vm_mode : SQ_BUF_RSRC_WORD3_USER_VM_MODE_SIZE; + unsigned int index_stride : SQ_BUF_RSRC_WORD3_INDEX_STRIDE_SIZE; + unsigned int add_tid_enable : SQ_BUF_RSRC_WORD3_ADD_TID_ENABLE_SIZE; + unsigned int : 3; + unsigned int nv : SQ_BUF_RSRC_WORD3_NV_SIZE; + unsigned int : 2; + unsigned int type : SQ_BUF_RSRC_WORD3_TYPE_SIZE; + } sq_buf_rsrc_word3_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_buf_rsrc_word3_t { + unsigned int type : SQ_BUF_RSRC_WORD3_TYPE_SIZE; + unsigned int : 2; + unsigned int nv : SQ_BUF_RSRC_WORD3_NV_SIZE; + unsigned int : 3; + unsigned int add_tid_enable : SQ_BUF_RSRC_WORD3_ADD_TID_ENABLE_SIZE; + unsigned int index_stride : SQ_BUF_RSRC_WORD3_INDEX_STRIDE_SIZE; + unsigned int user_vm_mode : SQ_BUF_RSRC_WORD3_USER_VM_MODE_SIZE; + unsigned int user_vm_enable : SQ_BUF_RSRC_WORD3_USER_VM_ENABLE_SIZE; + unsigned int data_format : SQ_BUF_RSRC_WORD3_DATA_FORMAT_SIZE; + unsigned int num_format : SQ_BUF_RSRC_WORD3_NUM_FORMAT_SIZE; + unsigned int dst_sel_w : SQ_BUF_RSRC_WORD3_DST_SEL_W_SIZE; + unsigned int dst_sel_z : SQ_BUF_RSRC_WORD3_DST_SEL_Z_SIZE; + unsigned int dst_sel_y : SQ_BUF_RSRC_WORD3_DST_SEL_Y_SIZE; + unsigned int dst_sel_x : SQ_BUF_RSRC_WORD3_DST_SEL_X_SIZE; + } sq_buf_rsrc_word3_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_buf_rsrc_word3_t f; +} sq_buf_rsrc_word3_u; + + +#define SQ_IMG_RSRC_WORD0_REG_SIZE 32 +#define SQ_IMG_RSRC_WORD0_BASE_ADDRESS_SIZE 32 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_rsrc_word0_t { + unsigned int base_address : SQ_IMG_RSRC_WORD0_BASE_ADDRESS_SIZE; + } sq_img_rsrc_word0_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_rsrc_word0_t { + unsigned int base_address : SQ_IMG_RSRC_WORD0_BASE_ADDRESS_SIZE; + } sq_img_rsrc_word0_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_rsrc_word0_t f; +} sq_img_rsrc_word0_u; + +#define SQ_IMG_RSRC_WORD1_REG_SIZE 32 +#define SQ_IMG_RSRC_WORD1_BASE_ADDRESS_HI_SIZE 8 +#define SQ_IMG_RSRC_WORD1_MIN_LOD_SIZE 12 +#define SQ_IMG_RSRC_WORD1_DATA_FORMAT_SIZE 6 +#define SQ_IMG_RSRC_WORD1_NUM_FORMAT_SIZE 4 +#define SQ_IMG_RSRC_WORD1_NV_SIZE 1 +#define SQ_IMG_RSRC_WORD1_META_DIRECT_SIZE 1 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_rsrc_word1_t { + unsigned int base_address_hi : SQ_IMG_RSRC_WORD1_BASE_ADDRESS_HI_SIZE; + unsigned int min_lod : SQ_IMG_RSRC_WORD1_MIN_LOD_SIZE; + unsigned int data_format : SQ_IMG_RSRC_WORD1_DATA_FORMAT_SIZE; + unsigned int num_format : SQ_IMG_RSRC_WORD1_NUM_FORMAT_SIZE; + unsigned int nv : SQ_IMG_RSRC_WORD1_NV_SIZE; + unsigned int meta_direct : SQ_IMG_RSRC_WORD1_META_DIRECT_SIZE; + } sq_img_rsrc_word1_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_rsrc_word1_t { + unsigned int meta_direct : SQ_IMG_RSRC_WORD1_META_DIRECT_SIZE; + unsigned int nv : SQ_IMG_RSRC_WORD1_NV_SIZE; + unsigned int num_format : SQ_IMG_RSRC_WORD1_NUM_FORMAT_SIZE; + unsigned int data_format : SQ_IMG_RSRC_WORD1_DATA_FORMAT_SIZE; + unsigned int min_lod : SQ_IMG_RSRC_WORD1_MIN_LOD_SIZE; + unsigned int base_address_hi : SQ_IMG_RSRC_WORD1_BASE_ADDRESS_HI_SIZE; + } sq_img_rsrc_word1_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_rsrc_word1_t f; +} sq_img_rsrc_word1_u; + +#define SQ_IMG_RSRC_WORD2_REG_SIZE 32 +#define SQ_IMG_RSRC_WORD2_WIDTH_SIZE 14 +#define SQ_IMG_RSRC_WORD2_HEIGHT_SIZE 14 +#define SQ_IMG_RSRC_WORD2_PERF_MOD_SIZE 3 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_rsrc_word2_t { + unsigned int width : SQ_IMG_RSRC_WORD2_WIDTH_SIZE; + unsigned int height : SQ_IMG_RSRC_WORD2_HEIGHT_SIZE; + unsigned int perf_mod : SQ_IMG_RSRC_WORD2_PERF_MOD_SIZE; + unsigned int : 1; + } sq_img_rsrc_word2_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_rsrc_word2_t { + unsigned int : 1; + unsigned int perf_mod : SQ_IMG_RSRC_WORD2_PERF_MOD_SIZE; + unsigned int height : SQ_IMG_RSRC_WORD2_HEIGHT_SIZE; + unsigned int width : SQ_IMG_RSRC_WORD2_WIDTH_SIZE; + } sq_img_rsrc_word2_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_rsrc_word2_t f; +} sq_img_rsrc_word2_u; + +#define SQ_IMG_RSRC_WORD3_REG_SIZE 32 +#define SQ_IMG_RSRC_WORD3_DST_SEL_X_SIZE 3 +#define SQ_IMG_RSRC_WORD3_DST_SEL_Y_SIZE 3 +#define SQ_IMG_RSRC_WORD3_DST_SEL_Z_SIZE 3 +#define SQ_IMG_RSRC_WORD3_DST_SEL_W_SIZE 3 +#define SQ_IMG_RSRC_WORD3_BASE_LEVEL_SIZE 4 +#define SQ_IMG_RSRC_WORD3_LAST_LEVEL_SIZE 4 +#define SQ_IMG_RSRC_WORD3_SW_MODE_SIZE 5 +#define SQ_IMG_RSRC_WORD3_TYPE_SIZE 4 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_rsrc_word3_t { + unsigned int dst_sel_x : SQ_IMG_RSRC_WORD3_DST_SEL_X_SIZE; + unsigned int dst_sel_y : SQ_IMG_RSRC_WORD3_DST_SEL_Y_SIZE; + unsigned int dst_sel_z : SQ_IMG_RSRC_WORD3_DST_SEL_Z_SIZE; + unsigned int dst_sel_w : SQ_IMG_RSRC_WORD3_DST_SEL_W_SIZE; + unsigned int base_level : SQ_IMG_RSRC_WORD3_BASE_LEVEL_SIZE; + unsigned int last_level : SQ_IMG_RSRC_WORD3_LAST_LEVEL_SIZE; + unsigned int sw_mode : SQ_IMG_RSRC_WORD3_SW_MODE_SIZE; + unsigned int : 3; + unsigned int type : SQ_IMG_RSRC_WORD3_TYPE_SIZE; + } sq_img_rsrc_word3_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_rsrc_word3_t { + unsigned int type : SQ_IMG_RSRC_WORD3_TYPE_SIZE; + unsigned int : 3; + unsigned int sw_mode : SQ_IMG_RSRC_WORD3_SW_MODE_SIZE; + unsigned int last_level : SQ_IMG_RSRC_WORD3_LAST_LEVEL_SIZE; + unsigned int base_level : SQ_IMG_RSRC_WORD3_BASE_LEVEL_SIZE; + unsigned int dst_sel_w : SQ_IMG_RSRC_WORD3_DST_SEL_W_SIZE; + unsigned int dst_sel_z : SQ_IMG_RSRC_WORD3_DST_SEL_Z_SIZE; + unsigned int dst_sel_y : SQ_IMG_RSRC_WORD3_DST_SEL_Y_SIZE; + unsigned int dst_sel_x : SQ_IMG_RSRC_WORD3_DST_SEL_X_SIZE; + } sq_img_rsrc_word3_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_rsrc_word3_t f; +} sq_img_rsrc_word3_u; + +#define SQ_IMG_RSRC_WORD4_REG_SIZE 32 +#define SQ_IMG_RSRC_WORD4_DEPTH_SIZE 13 +#define SQ_IMG_RSRC_WORD4_PITCH_SIZE 16 +#define SQ_IMG_RSRC_WORD4_BC_SWIZZLE_SIZE 3 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_rsrc_word4_t { + unsigned int depth : SQ_IMG_RSRC_WORD4_DEPTH_SIZE; + unsigned int pitch : SQ_IMG_RSRC_WORD4_PITCH_SIZE; + unsigned int bc_swizzle : SQ_IMG_RSRC_WORD4_BC_SWIZZLE_SIZE; + } sq_img_rsrc_word4_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_rsrc_word4_t { + unsigned int bc_swizzle : SQ_IMG_RSRC_WORD4_BC_SWIZZLE_SIZE; + unsigned int pitch : SQ_IMG_RSRC_WORD4_PITCH_SIZE; + unsigned int depth : SQ_IMG_RSRC_WORD4_DEPTH_SIZE; + } sq_img_rsrc_word4_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_rsrc_word4_t f; +} sq_img_rsrc_word4_u; + +#define SQ_IMG_RSRC_WORD5_REG_SIZE 32 +#define SQ_IMG_RSRC_WORD5_BASE_ARRAY_SIZE 13 +#define SQ_IMG_RSRC_WORD5_ARRAY_PITCH_SIZE 4 +#define SQ_IMG_RSRC_WORD5_META_DATA_ADDRESS_SIZE 8 +#define SQ_IMG_RSRC_WORD5_META_LINEAR_SIZE 1 +#define SQ_IMG_RSRC_WORD5_META_PIPE_ALIGNED_SIZE 1 +#define SQ_IMG_RSRC_WORD5_META_RB_ALIGNED_SIZE 1 +#define SQ_IMG_RSRC_WORD5_MAX_MIP_SIZE 4 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_rsrc_word5_t { + unsigned int base_array : SQ_IMG_RSRC_WORD5_BASE_ARRAY_SIZE; + unsigned int array_pitch : SQ_IMG_RSRC_WORD5_ARRAY_PITCH_SIZE; + unsigned int meta_data_address : SQ_IMG_RSRC_WORD5_META_DATA_ADDRESS_SIZE; + unsigned int meta_linear : SQ_IMG_RSRC_WORD5_META_LINEAR_SIZE; + unsigned int meta_pipe_aligned : SQ_IMG_RSRC_WORD5_META_PIPE_ALIGNED_SIZE; + unsigned int meta_rb_aligned : SQ_IMG_RSRC_WORD5_META_RB_ALIGNED_SIZE; + unsigned int max_mip : SQ_IMG_RSRC_WORD5_MAX_MIP_SIZE; + } sq_img_rsrc_word5_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_rsrc_word5_t { + unsigned int max_mip : SQ_IMG_RSRC_WORD5_MAX_MIP_SIZE; + unsigned int meta_rb_aligned : SQ_IMG_RSRC_WORD5_META_RB_ALIGNED_SIZE; + unsigned int meta_pipe_aligned : SQ_IMG_RSRC_WORD5_META_PIPE_ALIGNED_SIZE; + unsigned int meta_linear : SQ_IMG_RSRC_WORD5_META_LINEAR_SIZE; + unsigned int meta_data_address : SQ_IMG_RSRC_WORD5_META_DATA_ADDRESS_SIZE; + unsigned int array_pitch : SQ_IMG_RSRC_WORD5_ARRAY_PITCH_SIZE; + unsigned int base_array : SQ_IMG_RSRC_WORD5_BASE_ARRAY_SIZE; + } sq_img_rsrc_word5_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_rsrc_word5_t f; +} sq_img_rsrc_word5_u; + +#define SQ_IMG_RSRC_WORD6_REG_SIZE 32 +#define SQ_IMG_RSRC_WORD6_MIN_LOD_WARN_SIZE 12 +#define SQ_IMG_RSRC_WORD6_COUNTER_BANK_ID_SIZE 8 +#define SQ_IMG_RSRC_WORD6_LOD_HDW_CNT_EN_SIZE 1 +#define SQ_IMG_RSRC_WORD6_COMPRESSION_EN_SIZE 1 +#define SQ_IMG_RSRC_WORD6_ALPHA_IS_ON_MSB_SIZE 1 +#define SQ_IMG_RSRC_WORD6_COLOR_TRANSFORM_SIZE 1 +#define SQ_IMG_RSRC_WORD6_LOST_ALPHA_BITS_SIZE 4 +#define SQ_IMG_RSRC_WORD6_LOST_COLOR_BITS_SIZE 4 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_rsrc_word6_t { + unsigned int min_lod_warn : SQ_IMG_RSRC_WORD6_MIN_LOD_WARN_SIZE; + unsigned int counter_bank_id : SQ_IMG_RSRC_WORD6_COUNTER_BANK_ID_SIZE; + unsigned int lod_hdw_cnt_en : SQ_IMG_RSRC_WORD6_LOD_HDW_CNT_EN_SIZE; + unsigned int compression_en : SQ_IMG_RSRC_WORD6_COMPRESSION_EN_SIZE; + unsigned int alpha_is_on_msb : SQ_IMG_RSRC_WORD6_ALPHA_IS_ON_MSB_SIZE; + unsigned int color_transform : SQ_IMG_RSRC_WORD6_COLOR_TRANSFORM_SIZE; + unsigned int lost_alpha_bits : SQ_IMG_RSRC_WORD6_LOST_ALPHA_BITS_SIZE; + unsigned int lost_color_bits : SQ_IMG_RSRC_WORD6_LOST_COLOR_BITS_SIZE; + } sq_img_rsrc_word6_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_rsrc_word6_t { + unsigned int lost_color_bits : SQ_IMG_RSRC_WORD6_LOST_COLOR_BITS_SIZE; + unsigned int lost_alpha_bits : SQ_IMG_RSRC_WORD6_LOST_ALPHA_BITS_SIZE; + unsigned int color_transform : SQ_IMG_RSRC_WORD6_COLOR_TRANSFORM_SIZE; + unsigned int alpha_is_on_msb : SQ_IMG_RSRC_WORD6_ALPHA_IS_ON_MSB_SIZE; + unsigned int compression_en : SQ_IMG_RSRC_WORD6_COMPRESSION_EN_SIZE; + unsigned int lod_hdw_cnt_en : SQ_IMG_RSRC_WORD6_LOD_HDW_CNT_EN_SIZE; + unsigned int counter_bank_id : SQ_IMG_RSRC_WORD6_COUNTER_BANK_ID_SIZE; + unsigned int min_lod_warn : SQ_IMG_RSRC_WORD6_MIN_LOD_WARN_SIZE; + } sq_img_rsrc_word6_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_rsrc_word6_t f; +} sq_img_rsrc_word6_u; + +#define SQ_IMG_RSRC_WORD7_REG_SIZE 32 +#define SQ_IMG_RSRC_WORD7_META_DATA_ADDRESS_SIZE 32 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_rsrc_word7_t { + unsigned int meta_data_address : SQ_IMG_RSRC_WORD7_META_DATA_ADDRESS_SIZE; + } sq_img_rsrc_word7_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_rsrc_word7_t { + unsigned int meta_data_address : SQ_IMG_RSRC_WORD7_META_DATA_ADDRESS_SIZE; + } sq_img_rsrc_word7_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_rsrc_word7_t f; +} sq_img_rsrc_word7_u; + +#define SQ_IMG_SAMP_WORD0_REG_SIZE 32 +#define SQ_IMG_SAMP_WORD0_CLAMP_X_SIZE 3 +#define SQ_IMG_SAMP_WORD0_CLAMP_Y_SIZE 3 +#define SQ_IMG_SAMP_WORD0_CLAMP_Z_SIZE 3 +#define SQ_IMG_SAMP_WORD0_MAX_ANISO_RATIO_SIZE 3 +#define SQ_IMG_SAMP_WORD0_DEPTH_COMPARE_FUNC_SIZE 3 +#define SQ_IMG_SAMP_WORD0_FORCE_UNNORMALIZED_SIZE 1 +#define SQ_IMG_SAMP_WORD0_ANISO_THRESHOLD_SIZE 3 +#define SQ_IMG_SAMP_WORD0_MC_COORD_TRUNC_SIZE 1 +#define SQ_IMG_SAMP_WORD0_FORCE_DEGAMMA_SIZE 1 +#define SQ_IMG_SAMP_WORD0_ANISO_BIAS_SIZE 6 +#define SQ_IMG_SAMP_WORD0_TRUNC_COORD_SIZE 1 +#define SQ_IMG_SAMP_WORD0_DISABLE_CUBE_WRAP_SIZE 1 +#define SQ_IMG_SAMP_WORD0_FILTER_MODE_SIZE 2 +#define SQ_IMG_SAMP_WORD0_COMPAT_MODE_SIZE 1 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_samp_word0_t { + unsigned int clamp_x : SQ_IMG_SAMP_WORD0_CLAMP_X_SIZE; + unsigned int clamp_y : SQ_IMG_SAMP_WORD0_CLAMP_Y_SIZE; + unsigned int clamp_z : SQ_IMG_SAMP_WORD0_CLAMP_Z_SIZE; + unsigned int max_aniso_ratio : SQ_IMG_SAMP_WORD0_MAX_ANISO_RATIO_SIZE; + unsigned int depth_compare_func : SQ_IMG_SAMP_WORD0_DEPTH_COMPARE_FUNC_SIZE; + unsigned int force_unnormalized : SQ_IMG_SAMP_WORD0_FORCE_UNNORMALIZED_SIZE; + unsigned int aniso_threshold : SQ_IMG_SAMP_WORD0_ANISO_THRESHOLD_SIZE; + unsigned int mc_coord_trunc : SQ_IMG_SAMP_WORD0_MC_COORD_TRUNC_SIZE; + unsigned int force_degamma : SQ_IMG_SAMP_WORD0_FORCE_DEGAMMA_SIZE; + unsigned int aniso_bias : SQ_IMG_SAMP_WORD0_ANISO_BIAS_SIZE; + unsigned int trunc_coord : SQ_IMG_SAMP_WORD0_TRUNC_COORD_SIZE; + unsigned int disable_cube_wrap : SQ_IMG_SAMP_WORD0_DISABLE_CUBE_WRAP_SIZE; + unsigned int filter_mode : SQ_IMG_SAMP_WORD0_FILTER_MODE_SIZE; + unsigned int compat_mode : SQ_IMG_SAMP_WORD0_COMPAT_MODE_SIZE; + } sq_img_samp_word0_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_samp_word0_t { + unsigned int compat_mode : SQ_IMG_SAMP_WORD0_COMPAT_MODE_SIZE; + unsigned int filter_mode : SQ_IMG_SAMP_WORD0_FILTER_MODE_SIZE; + unsigned int disable_cube_wrap : SQ_IMG_SAMP_WORD0_DISABLE_CUBE_WRAP_SIZE; + unsigned int trunc_coord : SQ_IMG_SAMP_WORD0_TRUNC_COORD_SIZE; + unsigned int aniso_bias : SQ_IMG_SAMP_WORD0_ANISO_BIAS_SIZE; + unsigned int force_degamma : SQ_IMG_SAMP_WORD0_FORCE_DEGAMMA_SIZE; + unsigned int mc_coord_trunc : SQ_IMG_SAMP_WORD0_MC_COORD_TRUNC_SIZE; + unsigned int aniso_threshold : SQ_IMG_SAMP_WORD0_ANISO_THRESHOLD_SIZE; + unsigned int force_unnormalized : SQ_IMG_SAMP_WORD0_FORCE_UNNORMALIZED_SIZE; + unsigned int depth_compare_func : SQ_IMG_SAMP_WORD0_DEPTH_COMPARE_FUNC_SIZE; + unsigned int max_aniso_ratio : SQ_IMG_SAMP_WORD0_MAX_ANISO_RATIO_SIZE; + unsigned int clamp_z : SQ_IMG_SAMP_WORD0_CLAMP_Z_SIZE; + unsigned int clamp_y : SQ_IMG_SAMP_WORD0_CLAMP_Y_SIZE; + unsigned int clamp_x : SQ_IMG_SAMP_WORD0_CLAMP_X_SIZE; + } sq_img_samp_word0_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_samp_word0_t f; +} sq_img_samp_word0_u; + +#define SQ_IMG_SAMP_WORD1_REG_SIZE 32 +#define SQ_IMG_SAMP_WORD1_MIN_LOD_SIZE 12 +#define SQ_IMG_SAMP_WORD1_MAX_LOD_SIZE 12 +#define SQ_IMG_SAMP_WORD1_PERF_MIP_SIZE 4 +#define SQ_IMG_SAMP_WORD1_PERF_Z_SIZE 4 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_samp_word1_t { + unsigned int min_lod : SQ_IMG_SAMP_WORD1_MIN_LOD_SIZE; + unsigned int max_lod : SQ_IMG_SAMP_WORD1_MAX_LOD_SIZE; + unsigned int perf_mip : SQ_IMG_SAMP_WORD1_PERF_MIP_SIZE; + unsigned int perf_z : SQ_IMG_SAMP_WORD1_PERF_Z_SIZE; + } sq_img_samp_word1_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_samp_word1_t { + unsigned int perf_z : SQ_IMG_SAMP_WORD1_PERF_Z_SIZE; + unsigned int perf_mip : SQ_IMG_SAMP_WORD1_PERF_MIP_SIZE; + unsigned int max_lod : SQ_IMG_SAMP_WORD1_MAX_LOD_SIZE; + unsigned int min_lod : SQ_IMG_SAMP_WORD1_MIN_LOD_SIZE; + } sq_img_samp_word1_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_samp_word1_t f; +} sq_img_samp_word1_u; + +#define SQ_IMG_SAMP_WORD2_REG_SIZE 32 +#define SQ_IMG_SAMP_WORD2_LOD_BIAS_SIZE 14 +#define SQ_IMG_SAMP_WORD2_LOD_BIAS_SEC_SIZE 6 +#define SQ_IMG_SAMP_WORD2_XY_MAG_FILTER_SIZE 2 +#define SQ_IMG_SAMP_WORD2_XY_MIN_FILTER_SIZE 2 +#define SQ_IMG_SAMP_WORD2_Z_FILTER_SIZE 2 +#define SQ_IMG_SAMP_WORD2_MIP_FILTER_SIZE 2 +#define SQ_IMG_SAMP_WORD2_MIP_POINT_PRECLAMP_SIZE 1 +#define SQ_IMG_SAMP_WORD2_BLEND_ZERO_PRT_SIZE 1 +#define SQ_IMG_SAMP_WORD2_FILTER_PREC_FIX_SIZE 1 +#define SQ_IMG_SAMP_WORD2_ANISO_OVERRIDE_SIZE 1 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_samp_word2_t { + unsigned int lod_bias : SQ_IMG_SAMP_WORD2_LOD_BIAS_SIZE; + unsigned int lod_bias_sec : SQ_IMG_SAMP_WORD2_LOD_BIAS_SEC_SIZE; + unsigned int xy_mag_filter : SQ_IMG_SAMP_WORD2_XY_MAG_FILTER_SIZE; + unsigned int xy_min_filter : SQ_IMG_SAMP_WORD2_XY_MIN_FILTER_SIZE; + unsigned int z_filter : SQ_IMG_SAMP_WORD2_Z_FILTER_SIZE; + unsigned int mip_filter : SQ_IMG_SAMP_WORD2_MIP_FILTER_SIZE; + unsigned int mip_point_preclamp : SQ_IMG_SAMP_WORD2_MIP_POINT_PRECLAMP_SIZE; + unsigned int blend_zero_prt : SQ_IMG_SAMP_WORD2_BLEND_ZERO_PRT_SIZE; + unsigned int filter_prec_fix : SQ_IMG_SAMP_WORD2_FILTER_PREC_FIX_SIZE; + unsigned int aniso_override : SQ_IMG_SAMP_WORD2_ANISO_OVERRIDE_SIZE; + } sq_img_samp_word2_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_samp_word2_t { + unsigned int aniso_override : SQ_IMG_SAMP_WORD2_ANISO_OVERRIDE_SIZE; + unsigned int filter_prec_fix : SQ_IMG_SAMP_WORD2_FILTER_PREC_FIX_SIZE; + unsigned int blend_zero_prt : SQ_IMG_SAMP_WORD2_BLEND_ZERO_PRT_SIZE; + unsigned int mip_point_preclamp : SQ_IMG_SAMP_WORD2_MIP_POINT_PRECLAMP_SIZE; + unsigned int mip_filter : SQ_IMG_SAMP_WORD2_MIP_FILTER_SIZE; + unsigned int z_filter : SQ_IMG_SAMP_WORD2_Z_FILTER_SIZE; + unsigned int xy_min_filter : SQ_IMG_SAMP_WORD2_XY_MIN_FILTER_SIZE; + unsigned int xy_mag_filter : SQ_IMG_SAMP_WORD2_XY_MAG_FILTER_SIZE; + unsigned int lod_bias_sec : SQ_IMG_SAMP_WORD2_LOD_BIAS_SEC_SIZE; + unsigned int lod_bias : SQ_IMG_SAMP_WORD2_LOD_BIAS_SIZE; + } sq_img_samp_word2_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_samp_word2_t f; +} sq_img_samp_word2_u; + +#define SQ_IMG_SAMP_WORD3_REG_SIZE 32 +#define SQ_IMG_SAMP_WORD3_BORDER_COLOR_PTR_SIZE 12 +#define SQ_IMG_SAMP_WORD3_SKIP_DEGAMMA_SIZE 1 +#define SQ_IMG_SAMP_WORD3_BORDER_COLOR_TYPE_SIZE 2 + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _sq_img_samp_word3_t { + unsigned int border_color_ptr : SQ_IMG_SAMP_WORD3_BORDER_COLOR_PTR_SIZE; + unsigned int skip_degamma : SQ_IMG_SAMP_WORD3_SKIP_DEGAMMA_SIZE; + unsigned int : 17; + unsigned int border_color_type : SQ_IMG_SAMP_WORD3_BORDER_COLOR_TYPE_SIZE; + } sq_img_samp_word3_t; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _sq_img_samp_word3_t { + unsigned int border_color_type : SQ_IMG_SAMP_WORD3_BORDER_COLOR_TYPE_SIZE; + unsigned int : 17; + unsigned int skip_degamma : SQ_IMG_SAMP_WORD3_SKIP_DEGAMMA_SIZE; + unsigned int border_color_ptr : SQ_IMG_SAMP_WORD3_BORDER_COLOR_PTR_SIZE; + } sq_img_samp_word3_t; + +#endif + +typedef union { + unsigned int val : 32; + sq_img_samp_word3_t f; +} sq_img_samp_word3_u; + +typedef enum FMT { +FMT_INVALID = 0x00000000, +FMT_8 = 0x00000001, +FMT_16 = 0x00000002, +FMT_8_8 = 0x00000003, +FMT_32 = 0x00000004, +FMT_16_16 = 0x00000005, +FMT_10_11_11 = 0x00000006, +FMT_11_11_10 = 0x00000007, +FMT_10_10_10_2 = 0x00000008, +FMT_2_10_10_10 = 0x00000009, +FMT_8_8_8_8 = 0x0000000a, +FMT_32_32 = 0x0000000b, +FMT_16_16_16_16 = 0x0000000c, +FMT_32_32_32 = 0x0000000d, +FMT_32_32_32_32 = 0x0000000e, +FMT_RESERVED_4 = 0x0000000f, +FMT_5_6_5 = 0x00000010, +FMT_1_5_5_5 = 0x00000011, +FMT_5_5_5_1 = 0x00000012, +FMT_4_4_4_4 = 0x00000013, +FMT_8_24 = 0x00000014, +FMT_24_8 = 0x00000015, +FMT_X24_8_32_FLOAT = 0x00000016, +FMT_RESERVED_33 = 0x00000017, +FMT_11_11_10_FLOAT = 0x00000018, +FMT_16_FLOAT = 0x00000019, +FMT_32_FLOAT = 0x0000001a, +FMT_16_16_FLOAT = 0x0000001b, +FMT_8_24_FLOAT = 0x0000001c, +FMT_24_8_FLOAT = 0x0000001d, +FMT_32_32_FLOAT = 0x0000001e, +FMT_10_11_11_FLOAT = 0x0000001f, +FMT_16_16_16_16_FLOAT = 0x00000020, +FMT_3_3_2 = 0x00000021, +FMT_6_5_5 = 0x00000022, +FMT_32_32_32_32_FLOAT = 0x00000023, +FMT_RESERVED_36 = 0x00000024, +FMT_1 = 0x00000025, +FMT_1_REVERSED = 0x00000026, +FMT_GB_GR = 0x00000027, +FMT_BG_RG = 0x00000028, +FMT_32_AS_8 = 0x00000029, +FMT_32_AS_8_8 = 0x0000002a, +FMT_5_9_9_9_SHAREDEXP = 0x0000002b, +FMT_8_8_8 = 0x0000002c, +FMT_16_16_16 = 0x0000002d, +FMT_16_16_16_FLOAT = 0x0000002e, +FMT_4_4 = 0x0000002f, +FMT_32_32_32_FLOAT = 0x00000030, +FMT_BC1 = 0x00000031, +FMT_BC2 = 0x00000032, +FMT_BC3 = 0x00000033, +FMT_BC4 = 0x00000034, +FMT_BC5 = 0x00000035, +FMT_BC6 = 0x00000036, +FMT_BC7 = 0x00000037, +FMT_32_AS_32_32_32_32 = 0x00000038, +FMT_APC3 = 0x00000039, +FMT_APC4 = 0x0000003a, +FMT_APC5 = 0x0000003b, +FMT_APC6 = 0x0000003c, +FMT_APC7 = 0x0000003d, +FMT_CTX1 = 0x0000003e, +FMT_RESERVED_63 = 0x0000003f, +} FMT; + +typedef enum type { +TYPE_UNORM = 0x00000000, +TYPE_SNORM = 0x00000001, +TYPE_USCALED = 0x00000002, +TYPE_SSCALED = 0x00000003, +TYPE_UINT = 0x00000004, +TYPE_SINT = 0x00000005, +TYPE_RESERVED_6 = 0x00000006, +TYPE_FLOAT = 0x00000007, +TYPE_RESERVED_8 = 0x00000008, +TYPE_SRGB = 0x00000009, +TYPE_UNORM_UINT = 0x0000000a, +} type; + +typedef enum SEL { + SEL_0 = 0x00000000, + SEL_1 = 0x00000001, + SEL_X = 0x00000004, + SEL_Y = 0x00000005, + SEL_Z = 0x00000006, + SEL_W = 0x00000007, +} SEL; + +typedef enum SQ_RSRC_IMG_TYPE { + SQ_RSRC_IMG_1D = 0x00000008, + SQ_RSRC_IMG_2D = 0x00000009, + SQ_RSRC_IMG_3D = 0x0000000a, + SQ_RSRC_IMG_1D_ARRAY = 0x0000000c, + SQ_RSRC_IMG_2D_ARRAY = 0x0000000d, +} SQ_RSRC_IMG_TYPE; + +typedef enum SQ_TEX_XY_FILTER { + SQ_TEX_XY_FILTER_POINT = 0x00000000, + SQ_TEX_XY_FILTER_BILINEAR = 0x00000001, + SQ_TEX_XY_FILTER_ANISO_POINT = 0x00000002, + SQ_TEX_XY_FILTER_ANISO_BILINEAR = 0x00000003, +} SQ_TEX_XY_FILTER; + +typedef enum SQ_TEX_Z_FILTER { + SQ_TEX_Z_FILTER_NONE = 0x00000000, + SQ_TEX_Z_FILTER_POINT = 0x00000001, + SQ_TEX_Z_FILTER_LINEAR = 0x00000002, +} SQ_TEX_Z_FILTER; + +typedef enum SQ_TEX_MIP_FILTER { + SQ_TEX_MIP_FILTER_NONE = 0x00000000, + SQ_TEX_MIP_FILTER_POINT = 0x00000001, + SQ_TEX_MIP_FILTER_LINEAR = 0x00000002, + SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ__VI = 0x00000003, +} SQ_TEX_MIP_FILTER; + +typedef enum SQ_TEX_CLAMP { + SQ_TEX_WRAP = 0x00000000, + SQ_TEX_MIRROR = 0x00000001, + SQ_TEX_CLAMP_LAST_TEXEL = 0x00000002, + SQ_TEX_MIRROR_ONCE_LAST_TEXEL = 0x00000003, + SQ_TEX_CLAMP_HALF_BORDER = 0x00000004, + SQ_TEX_MIRROR_ONCE_HALF_BORDER = 0x00000005, + SQ_TEX_CLAMP_BORDER = 0x00000006, + SQ_TEX_MIRROR_ONCE_BORDER = 0x00000007, +} SQ_TEX_CLAMP; + +typedef enum SQ_TEX_BORDER_COLOR { + SQ_TEX_BORDER_COLOR_TRANS_BLACK = 0x00000000, + SQ_TEX_BORDER_COLOR_OPAQUE_BLACK = 0x00000001, + SQ_TEX_BORDER_COLOR_OPAQUE_WHITE = 0x00000002, + SQ_TEX_BORDER_COLOR_REGISTER = 0x00000003, +} SQ_TEX_BORDER_COLOR; + +typedef enum TEX_BC_SWIZZLE { +TEX_BC_Swizzle_XYZW = 0x00000000, +TEX_BC_Swizzle_XWYZ = 0x00000001, +TEX_BC_Swizzle_WZYX = 0x00000002, +TEX_BC_Swizzle_WXYZ = 0x00000003, +TEX_BC_Swizzle_ZYXW = 0x00000004, +TEX_BC_Swizzle_YXWZ = 0x00000005, +} TEX_BC_SWIZZLE; + +typedef struct metadata_amd_ai_s { + uint32_t version; // Must be 1 + uint32_t vendorID; // AMD + SQ_IMG_RSRC_WORD0 word0; + SQ_IMG_RSRC_WORD1 word1; + SQ_IMG_RSRC_WORD2 word2; + SQ_IMG_RSRC_WORD3 word3; + SQ_IMG_RSRC_WORD4 word4; + SQ_IMG_RSRC_WORD5 word5; + SQ_IMG_RSRC_WORD6 word6; + SQ_IMG_RSRC_WORD7 word7; + uint32_t mip_offsets[0]; //Mip level offset bits [39:8] for each level (if any) +} metadata_amd_ai_t; + +} // namespace +#endif // HSA_RUNTIME_EXT_IMAGE_RESOURCE_AI_H diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/resource_kv.h b/projects/rocr-runtime/runtime/hsa-runtime/image/resource_kv.h new file mode 100644 index 0000000000..c1df1ffb56 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/resource_kv.h @@ -0,0 +1,463 @@ +#ifndef HSA_RUNTIME_EXT_IMAGE_RESOURCE_KV_H +#define HSA_RUNTIME_EXT_IMAGE_RESOURCE_KV_H + +#if defined(LITTLEENDIAN_CPU) +#elif defined(BIGENDIAN_CPU) +#else +#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" +#endif + +namespace amd { +union SQ_BUF_RSRC_WORD0 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int base_address : 32; +#elif defined(BIGENDIAN_CPU) + unsigned int base_address : 32; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_BUF_RSRC_WORD1 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int base_address_hi : 16; + unsigned int stride : 14; + unsigned int cache_swizzle : 1; + unsigned int swizzle_enable : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int swizzle_enable : 1; + unsigned int cache_swizzle : 1; + unsigned int stride : 14; + unsigned int base_address_hi : 16; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_BUF_RSRC_WORD2 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int num_records : 32; +#elif defined(BIGENDIAN_CPU) + unsigned int num_records : 32; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_BUF_RSRC_WORD3 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int dst_sel_x : 3; + unsigned int dst_sel_y : 3; + unsigned int dst_sel_z : 3; + unsigned int dst_sel_w : 3; + unsigned int num_format : 3; + unsigned int data_format : 4; + unsigned int element_size : 2; + unsigned int index_stride : 2; + unsigned int add_tid_enable : 1; + unsigned int atc : 1; + unsigned int hash_enable : 1; + unsigned int heap : 1; + unsigned int mtype : 3; + unsigned int type : 2; +#elif defined(BIGENDIAN_CPU) + unsigned int type : 2; + unsigned int mtype : 3; + unsigned int heap : 1; + unsigned int hash_enable : 1; + unsigned int atc : 1; + unsigned int add_tid_enable : 1; + unsigned int index_stride : 2; + unsigned int element_size : 2; + unsigned int data_format : 4; + unsigned int num_format : 3; + unsigned int dst_sel_w : 3; + unsigned int dst_sel_z : 3; + unsigned int dst_sel_y : 3; + unsigned int dst_sel_x : 3; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_RSRC_WORD0 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int base_address : 32; +#elif defined(BIGENDIAN_CPU) + unsigned int base_address : 32; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_RSRC_WORD1 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int base_address_hi : 8; + unsigned int min_lod : 12; + unsigned int data_format : 6; + unsigned int num_format : 4; + unsigned int mtype : 2; +#elif defined(BIGENDIAN_CPU) + unsigned int mtype : 2; + unsigned int num_format : 4; + unsigned int data_format : 6; + unsigned int min_lod : 12; + unsigned int base_address_hi : 8; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_RSRC_WORD2 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int width : 14; + unsigned int height : 14; + unsigned int perf_mod : 3; + unsigned int interlaced : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int interlaced : 1; + unsigned int perf_mod : 3; + unsigned int height : 14; + unsigned int width : 14; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_RSRC_WORD3 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int dst_sel_x : 3; + unsigned int dst_sel_y : 3; + unsigned int dst_sel_z : 3; + unsigned int dst_sel_w : 3; + unsigned int base_level : 4; + unsigned int last_level : 4; + unsigned int tiling_index : 5; + unsigned int pow2_pad : 1; + unsigned int mtype : 1; + unsigned int atc : 1; + unsigned int type : 4; +#elif defined(BIGENDIAN_CPU) + unsigned int type : 4; + unsigned int atc : 1; + unsigned int mtype : 1; + unsigned int pow2_pad : 1; + unsigned int tiling_index : 5; + unsigned int last_level : 4; + unsigned int base_level : 4; + unsigned int dst_sel_w : 3; + unsigned int dst_sel_z : 3; + unsigned int dst_sel_y : 3; + unsigned int dst_sel_x : 3; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_RSRC_WORD4 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int depth : 13; + unsigned int pitch : 14; + unsigned int : 5; +#elif defined(BIGENDIAN_CPU) + unsigned int : 5; + unsigned int pitch : 14; + unsigned int depth : 13; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_RSRC_WORD5 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int base_array : 13; + unsigned int last_array : 13; + unsigned int : 6; +#elif defined(BIGENDIAN_CPU) + unsigned int : 6; + unsigned int last_array : 13; + unsigned int base_array : 13; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_RSRC_WORD6 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int min_lod_warn : 12; + unsigned int counter_bank_id : 8; + unsigned int lod_hdw_cnt_en : 1; + unsigned int compression_en : 1; + unsigned int alpha_is_on_msb : 1; + unsigned int color_transform : 1; + unsigned int lost_alpha_bits : 4; + unsigned int lost_color_bits : 4; +#elif defined(BIGENDIAN_CPU) + unsigned int lost_color_bits : 4; + unsigned int lost_alpha_bits : 4; + unsigned int color_transform : 1; + unsigned int alpha_is_on_msb : 1; + unsigned int compression_en : 1; + unsigned int lod_hdw_cnt_en : 1; + unsigned int counter_bank_id : 8; + unsigned int min_lod_warn : 12; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_RSRC_WORD7 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int meta_data_address : 32; +#elif defined(BIGENDIAN_CPU) + unsigned int meta_data_address : 32; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_SAMP_WORD0 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int clamp_x : 3; + unsigned int clamp_y : 3; + unsigned int clamp_z : 3; + unsigned int max_aniso_ratio : 3; + unsigned int depth_compare_func : 3; + unsigned int force_unormalized : 1; + unsigned int aniso_threshold : 3; + unsigned int mc_coord_trunc : 1; + unsigned int force_degamma : 1; + unsigned int aniso_bias : 6; + unsigned int trunc_coord : 1; + unsigned int disable_cube_wrap : 1; + unsigned int filter_mode : 2; + unsigned int compat_mode : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int compat_mode : 1; + unsigned int filter_mode : 2; + unsigned int disable_cube_wrap : 1; + unsigned int trunc_coord : 1; + unsigned int aniso_bias : 6; + unsigned int force_degamma : 1; + unsigned int mc_coord_trunc : 1; + unsigned int aniso_threshold : 3; + unsigned int force_unormalized : 1; + unsigned int depth_compare_func : 3; + unsigned int max_aniso_ratio : 3; + unsigned int clamp_z : 3; + unsigned int clamp_y : 3; + unsigned int clamp_x : 3; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_SAMP_WORD1 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int min_lod : 12; + unsigned int max_lod : 12; + unsigned int perf_mip : 4; + unsigned int perf_z : 4; +#elif defined(BIGENDIAN_CPU) + unsigned int perf_z : 4; + unsigned int perf_mip : 4; + unsigned int max_lod : 12; + unsigned int min_lod : 12; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_SAMP_WORD2 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int lod_bias : 14; + unsigned int lod_bias_sec : 6; + unsigned int xy_mag_filter : 2; + unsigned int xy_min_filter : 2; + unsigned int z_filter : 2; + unsigned int mip_filter : 2; + unsigned int mip_point_preclamp : 1; + unsigned int disable_lsb_ceil : 1; + unsigned int filter_prec_fix : 1; + unsigned int aniso_override_vi : 1; +#elif defined(BIGENDIAN_CPU) + unsigned int aniso_override_vi : 1; + unsigned int filter_prec_fix : 1; + unsigned int disable_lsb_ceil : 1; + unsigned int mip_point_preclamp : 1; + unsigned int mip_filter : 2; + unsigned int z_filter : 2; + unsigned int xy_min_filter : 2; + unsigned int xy_mag_filter : 2; + unsigned int lod_bias_sec : 6; + unsigned int lod_bias : 14; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +union SQ_IMG_SAMP_WORD3 { + struct { +#if defined(LITTLEENDIAN_CPU) + unsigned int border_color_ptr : 12; + unsigned int : 18; + unsigned int border_color_type : 2; +#elif defined(BIGENDIAN_CPU) + unsigned int border_color_type : 2; + unsigned int : 18; + unsigned int border_color_ptr : 12; +#endif + } bitfields, bits; + unsigned int u32_all; + signed int i32_all; + float f32_all; +}; + +typedef enum FMT { + FMT_INVALID = 0x00000000, + FMT_8 = 0x00000001, + FMT_16 = 0x00000002, + FMT_8_8 = 0x00000003, + FMT_32 = 0x00000004, + FMT_16_16 = 0x00000005, + FMT_10_10_10_2 = 0x00000008, + FMT_2_10_10_10 = 0x00000009, + FMT_8_8_8_8 = 0x0000000a, + FMT_32_32 = 0x0000000b, + FMT_16_16_16_16 = 0x0000000c, + FMT_32_32_32 = 0x0000000d, + FMT_32_32_32_32 = 0x0000000e, + FMT_5_6_5 = 0x00000010, + FMT_1_5_5_5 = 0x00000011, + FMT_5_5_5_1 = 0x00000012, + FMT_8_24 = 0x00000014, + FMT_24_8 = 0x00000015, + FMT_X24_8_32 = 0x00000016, + FMT_RESERVED_24__SI__CI = 0x00000018 +} FMT; + +typedef enum type { + TYPE_UNORM = 0x00000000, + TYPE_SNORM = 0x00000001, + TYPE_UINT = 0x00000004, + TYPE_SINT = 0x00000005, + TYPE_FLOAT = 0x00000007, + TYPE_SRGB = 0x00000009 +} type; + +typedef enum SEL { + SEL_0 = 0x00000000, + SEL_1 = 0x00000001, + SEL_X = 0x00000004, + SEL_Y = 0x00000005, + SEL_Z = 0x00000006, + SEL_W = 0x00000007, +} SEL; + +typedef enum SQ_RSRC_IMG_TYPE { + SQ_RSRC_IMG_1D = 0x00000008, + SQ_RSRC_IMG_2D = 0x00000009, + SQ_RSRC_IMG_3D = 0x0000000a, + SQ_RSRC_IMG_1D_ARRAY = 0x0000000c, + SQ_RSRC_IMG_2D_ARRAY = 0x0000000d, +} SQ_RSRC_IMG_TYPE; + +typedef enum SQ_TEX_XY_FILTER { + SQ_TEX_XY_FILTER_POINT = 0x00000000, + SQ_TEX_XY_FILTER_BILINEAR = 0x00000001, + SQ_TEX_XY_FILTER_ANISO_POINT = 0x00000002, + SQ_TEX_XY_FILTER_ANISO_BILINEAR = 0x00000003, +} SQ_TEX_XY_FILTER; + +typedef enum SQ_TEX_Z_FILTER { + SQ_TEX_Z_FILTER_NONE = 0x00000000, + SQ_TEX_Z_FILTER_POINT = 0x00000001, + SQ_TEX_Z_FILTER_LINEAR = 0x00000002, +} SQ_TEX_Z_FILTER; + +typedef enum SQ_TEX_MIP_FILTER { + SQ_TEX_MIP_FILTER_NONE = 0x00000000, + SQ_TEX_MIP_FILTER_POINT = 0x00000001, + SQ_TEX_MIP_FILTER_LINEAR = 0x00000002, + SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ__VI = 0x00000003, +} SQ_TEX_MIP_FILTER; + +typedef enum SQ_TEX_CLAMP { + SQ_TEX_WRAP = 0x00000000, + SQ_TEX_MIRROR = 0x00000001, + SQ_TEX_CLAMP_LAST_TEXEL = 0x00000002, + SQ_TEX_MIRROR_ONCE_LAST_TEXEL = 0x00000003, + SQ_TEX_CLAMP_HALF_BORDER = 0x00000004, + SQ_TEX_MIRROR_ONCE_HALF_BORDER = 0x00000005, + SQ_TEX_CLAMP_BORDER = 0x00000006, + SQ_TEX_MIRROR_ONCE_BORDER = 0x00000007, +} SQ_TEX_CLAMP; + +typedef enum SQ_TEX_BORDER_COLOR { + SQ_TEX_BORDER_COLOR_TRANS_BLACK = 0x00000000, + SQ_TEX_BORDER_COLOR_OPAQUE_BLACK = 0x00000001, + SQ_TEX_BORDER_COLOR_OPAQUE_WHITE = 0x00000002, + SQ_TEX_BORDER_COLOR_REGISTER = 0x00000003, +} SQ_TEX_BORDER_COLOR; + +typedef struct metadata_amd_ci_vi_s { + uint32_t version; // Must be 1 + uint32_t vendorID; // AMD | CZ + SQ_IMG_RSRC_WORD0 word0; + SQ_IMG_RSRC_WORD1 word1; + SQ_IMG_RSRC_WORD2 word2; + SQ_IMG_RSRC_WORD3 word3; + SQ_IMG_RSRC_WORD4 word4; + SQ_IMG_RSRC_WORD5 word5; + SQ_IMG_RSRC_WORD6 word6; + SQ_IMG_RSRC_WORD7 word7; + uint32_t mip_offsets[0]; //Mip level offset bits [39:8] for each level (if any) +} metadata_amd_ci_vi_t; + +} // namespace +#endif // HSA_RUNTIME_EXT_IMAGE_RESOURCE_KV_H \ No newline at end of file diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/resource_nv.h b/projects/rocr-runtime/runtime/hsa-runtime/image/resource_nv.h new file mode 100755 index 0000000000..c9b382f517 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/resource_nv.h @@ -0,0 +1,834 @@ +#ifndef EXT_IMAGE_RESOURCE_NV_H_ +#define EXT_IMAGE_RESOURCE_NV_H_ + +#if defined(LITTLEENDIAN_CPU) +#elif defined(BIGENDIAN_CPU) +#else +#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" +#endif + +namespace amd { + +/**********************************************************/ +/**********************************************************/ +#define SQ_BUF_RSC_WRD0_REG_SZ 32 +#define SQ_BUF_RSC_WRD0_BASE_ADDRESS_SZ 32 + +struct sq_buf_rsrc_word0_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int BASE_ADDRESS : SQ_BUF_RSC_WRD0_BASE_ADDRESS_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int BASE_ADDRESS : SQ_BUF_RSC_WRD0_BASE_ADDRESS_SZ; +#endif +}; + +union SQ_BUF_RSRC_WORD0 { + sq_buf_rsrc_word0_t bitfields, bits, f; + uint32_t val : SQ_BUF_RSC_WRD0_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; + +/***********/ + +#define SQ_BUF_RSC_WRD1_REG_SZ 32 +#define SQ_BUF_RSC_WRD1_BASE_ADDRESS_HI_SZ 16 +#define SQ_BUF_RSC_WRD1_STRIDE_SZ 14 +#define SQ_BUF_RSC_WRD1_CACHE_SWIZZLE_SZ 1 +#define SQ_BUF_RSC_WRD1_SWIZZLE_ENABLE_SZ 1 +struct sq_buf_rsrc_word1_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int BASE_ADDRESS_HI : SQ_BUF_RSC_WRD1_BASE_ADDRESS_HI_SZ; + unsigned int STRIDE : SQ_BUF_RSC_WRD1_STRIDE_SZ; + unsigned int CACHE_SWIZZLE : SQ_BUF_RSC_WRD1_CACHE_SWIZZLE_SZ; + unsigned int SWIZZLE_ENABLE : SQ_BUF_RSC_WRD1_SWIZZLE_ENABLE_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int SWIZZLE_ENABLE : SQ_BUF_RSC_WRD1_SWIZZLE_ENABLE_SZ; + unsigned int CACHE_SWIZZLE : SQ_BUF_RSC_WRD1_CACHE_SWIZZLE_SZ; + unsigned int STRIDE : SQ_BUF_RSC_WRD1_STRIDE_SZ; + unsigned int BASE_ADDRESS_HI : SQ_BUF_RSC_WRD1_BASE_ADDRESS_HI_SZ; +#endif +}; + +union SQ_BUF_RSRC_WORD1 { + sq_buf_rsrc_word1_t bitfields, bits, f; + uint32_t val : SQ_BUF_RSC_WRD1_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_BUF_RSC_WRD2_REG_SZ 32 +#define SQ_BUF_RSC_WRD2_NUM_RECORDS_SZ 32 +struct sq_buf_rsrc_word2_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int NUM_RECORDS : SQ_BUF_RSC_WRD2_NUM_RECORDS_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int NUM_RECORDS : SQ_BUF_RSC_WRD2_NUM_RECORDS_SZ; +#endif +}; +union SQ_BUF_RSRC_WORD2 { + sq_buf_rsrc_word2_t bitfields, bits, f; + uint32_t val : SQ_BUF_RSC_WRD2_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_BUF_RSC_WRD3_REG_SZ 32 +#define SQ_BUF_RSC_WRD3_DST_SEL_X_SZ 3 +#define SQ_BUF_RSC_WRD3_DST_SEL_Y_SZ 3 +#define SQ_BUF_RSC_WRD3_DST_SEL_Z_SZ 3 +#define SQ_BUF_RSC_WRD3_DST_SEL_W_SZ 3 +#define SQ_BUF_RSC_WRD3_FORMAT_SZ 7 +#define SQ_BUF_RSC_WRD3_INDEX_STRIDE_SZ 2 +#define SQ_BUF_RSC_WRD3_ADD_TID_ENABLE_SZ 1 +#define SQ_BUF_RSC_WRD3_RESOURCE_LEVEL 1 +#define SQ_BUF_RSC_WRD3_LLC_NOALLOC 2 +#define SQ_BUF_RSC_WORD3_OOB_SELECT_SZ 2 +#define SQ_BUF_RSC_WRD3_TYPE_SZ 2 +struct sq_buf_rsrc_word3_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int DST_SEL_X : SQ_BUF_RSC_WRD3_DST_SEL_X_SZ; + unsigned int DST_SEL_Y : SQ_BUF_RSC_WRD3_DST_SEL_Y_SZ; + unsigned int DST_SEL_Z : SQ_BUF_RSC_WRD3_DST_SEL_Z_SZ; + unsigned int DST_SEL_W : SQ_BUF_RSC_WRD3_DST_SEL_W_SZ; + unsigned int FORMAT : SQ_BUF_RSC_WRD3_FORMAT_SZ; + unsigned int : 2; + unsigned int INDEX_STRIDE : SQ_BUF_RSC_WRD3_INDEX_STRIDE_SZ; + unsigned int ADD_TID_ENABLE : SQ_BUF_RSC_WRD3_ADD_TID_ENABLE_SZ; + unsigned int RESOURCE_LEVEL : SQ_BUF_RSC_WRD3_RESOURCE_LEVEL; + unsigned int : 1; + unsigned int LLC_NOALLOC : SQ_BUF_RSC_WRD3_LLC_NOALLOC; + unsigned int OOB_SELECT : SQ_BUF_RSC_WORD3_OOB_SELECT_SZ; + unsigned int TYPE : SQ_BUF_RSC_WRD3_TYPE_SZ; + +#elif defined(BIGENDIAN_CPU) + unsigned int TYPE : SQ_BUF_RSC_WRD3_TYPE_SZ; + unsigned int OOB_SELECT : SQ_BUF_RSC_WORD3_OOB_SELECT_SZ; + unsigned int LLC_NOALLOC : SQ_BUF_RSC_WRD3_LLC_NOALLOC; + unsigned int : 1; + unsigned int RESOURCE_LEVEL : SQ_BUF_RSC_WRD3_RESOURCE_LEVEL; + unsigned int ADD_TID_ENABLE : SQ_BUF_RSC_WRD3_ADD_TID_ENABLE_SZ; + unsigned int INDEX_STRIDE : SQ_BUF_RSC_WRD3_INDEX_STRIDE_SZ; + unsigned int : 2; + unsigned int FORMAT : SQ_BUF_RSC_WRD3_FORMAT_SZ; + unsigned int DST_SEL_W : SQ_BUF_RSC_WRD3_DST_SEL_W_SZ; + unsigned int DST_SEL_Z : SQ_BUF_RSC_WRD3_DST_SEL_Z_SZ; + unsigned int DST_SEL_Y : SQ_BUF_RSC_WRD3_DST_SEL_Y_SZ; + unsigned int DST_SEL_X : SQ_BUF_RSC_WRD3_DST_SEL_X_SZ; + +#endif +}; +union SQ_BUF_RSRC_WORD3 { + sq_buf_rsrc_word3_t bitfields, bits, f; + uint32_t val : SQ_BUF_RSC_WRD3_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +/**********************************************************/ +/**********************************************************/ +#define SQ_IMG_RSC_WRD0_REG_SZ 32 +#define SQ_IMG_RSC_WRD0_BASE_ADDRESS_SZ 32 +struct sq_img_rsrc_word0_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int BASE_ADDRESS : SQ_IMG_RSC_WRD0_BASE_ADDRESS_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int BASE_ADDRESS : SQ_IMG_RSC_WRD0_BASE_ADDRESS_SZ; +#endif +}; +union SQ_IMG_RSRC_WORD0 { + sq_img_rsrc_word0_t bitfields, bits, f; + uint32_t val : SQ_IMG_RSC_WRD0_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_RSC_WRD1_REG_SZ 32 +#define SQ_IMG_RSC_WRD1_BASE_ADDRESS_HI_SZ 8 +#define SQ_IMG_RSC_WRD1_MIN_LOD_SZ 12 +#define SQ_IMG_RSC_WRD1_FORMAT_SZ 9 +#define SQ_IMG_RSC_WRD1_WIDTH_LO 2 + +struct sq_img_rsrc_word1_t{ +#if defined(LITTLEENDIAN_CPU) + unsigned int BASE_ADDRESS_HI : SQ_IMG_RSC_WRD1_BASE_ADDRESS_HI_SZ; + unsigned int MIN_LOD : SQ_IMG_RSC_WRD1_MIN_LOD_SZ; + unsigned int FORMAT : SQ_IMG_RSC_WRD1_FORMAT_SZ; + unsigned int : 1; + unsigned int WIDTH : SQ_IMG_RSC_WRD1_WIDTH_LO; +#elif defined(BIGENDIAN_CPU) + unsigned int WIDTH : SQ_IMG_RSC_WRD1_WIDTH_LO; + unsigned int : 1; + unsigned int FORMAT : SQ_IMG_RSC_WRD1_FORMAT_SZ; + unsigned int MIN_LOD : SQ_IMG_RSC_WRD1_MIN_LOD_SZ; + unsigned int BASE_ADDRESS_HI : SQ_IMG_RSC_WRD1_BASE_ADDRESS_HI_SZ; +#endif +}; +union SQ_IMG_RSRC_WORD1 { + sq_img_rsrc_word1_t bitfields, bits, f; + uint32_t val : SQ_IMG_RSC_WRD1_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_RSC_WRD2_REG_SZ 32 +#define SQ_IMG_RSC_WRD2_WIDTH_HI_SZ 12 +#define SQ_IMG_RSC_WRD2_HEIGHT_SZ 14 +#define SQ_IMG_RSC_WRD2_RESOURCE_LEVEL_SZ 1 +struct sq_img_rsrc_word2_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int WIDTH_HI : SQ_IMG_RSC_WRD2_WIDTH_HI_SZ; + unsigned int : 2; + unsigned int HEIGHT : SQ_IMG_RSC_WRD2_HEIGHT_SZ; + unsigned int : 2; + unsigned int : 1; + unsigned int RESOURCE_LEVEL : SQ_IMG_RSC_WRD2_RESOURCE_LEVEL_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int RESOURCE_LEVEL : SQ_IMG_RSC_WRD2_RESOURCE_LEVEL_SZ; + unsigned int RESERVED : 1; + unsigned int RESERVED : 2; + unsigned int HEIGHT : SQ_IMG_RSC_WRD2_HEIGHT_SZ; + unsigned int : 2; + unsigned int WIDTH_HI : SQ_IMG_RSC_WRD2_WIDTH_SZ; +#endif +}; +union SQ_IMG_RSRC_WORD2 { + sq_img_rsrc_word2_t bitfields, bits, f; + uint32_t val : SQ_IMG_RSC_WRD2_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_RSC_WRD3_REG_SZ 32 +#define SQ_IMG_RSC_WRD3_DST_SEL_X_SZ 3 +#define SQ_IMG_RSC_WRD3_DST_SEL_Y_SZ 3 +#define SQ_IMG_RSC_WRD3_DST_SEL_Z_SZ 3 +#define SQ_IMG_RSC_WRD3_DST_SEL_W_SZ 3 +#define SQ_IMG_RSC_WRD3_BASE_LEVEL_SZ 4 +#define SQ_IMG_RSC_WRD3_LAST_LEVEL_SZ 4 +#define SQ_IMG_RSC_WRD3_SW_MODE_SZ 5 +#define SQ_IMG_RSC_WRD3_BC_SWIZZLE_SZ 3 +#define SQ_IMG_RSC_WRD3_TYPE_SZ 4 +struct sq_img_rsrc_word3_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int DST_SEL_X : SQ_IMG_RSC_WRD3_DST_SEL_X_SZ; + unsigned int DST_SEL_Y : SQ_IMG_RSC_WRD3_DST_SEL_Y_SZ; + unsigned int DST_SEL_Z : SQ_IMG_RSC_WRD3_DST_SEL_Z_SZ; + unsigned int DST_SEL_W : SQ_IMG_RSC_WRD3_DST_SEL_W_SZ; + unsigned int BASE_LEVEL : SQ_IMG_RSC_WRD3_BASE_LEVEL_SZ; + unsigned int LAST_LEVEL : SQ_IMG_RSC_WRD3_LAST_LEVEL_SZ; + unsigned int SW_MODE : SQ_IMG_RSC_WRD3_SW_MODE_SZ; + unsigned int BC_SWIZZLE : SQ_IMG_RSC_WRD3_BC_SWIZZLE_SZ; + unsigned int TYPE : SQ_IMG_RSC_WRD3_TYPE_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int TYPE : SQ_IMG_RSC_WRD3_TYPE_SZ; + unsigned int BC_SWIZZLE : SQ_IMG_RSC_WRD3_BC_SWIZZLE_SZ; + unsigned int W_MODE : SQ_IMG_RSC_WRD3_SW_MODE_SZ; + unsigned int LAST_LEVEL : SQ_IMG_RSC_WRD3_LAST_LEVEL_SZ; + unsigned int BASE_LEVEL : SQ_IMG_RSC_WRD3_BASE_LEVEL_SZ; + unsigned int DST_SEL_W : SQ_IMG_RSC_WRD3_DST_SEL_W_SZ; + unsigned int DST_SEL_Z : SQ_IMG_RSC_WRD3_DST_SEL_Z_SZ; + unsigned int DST_SEL_Y : SQ_IMG_RSC_WRD3_DST_SEL_Y_SZ; + unsigned int DST_SEL_X : SQ_IMG_RSC_WRD3_DST_SEL_X_SZ; +#endif +}; +union SQ_IMG_RSRC_WORD3 { + sq_img_rsrc_word3_t bitfields, bits, f; + uint32_t val : SQ_IMG_RSC_WRD3_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_RSC_WRD4_REG_SZ 32 +#define SQ_IMG_RSC_WRD4_DEPTH_SZ 13 +#define SQ_IMG_RSC_WRD4_BASE_ARR_SZ 13 +struct sq_img_rsrc_word4_t { +#if defined(LITTLEENDIAN_CPU) + // For arrays this is last slice in view, for 3D this is depth-1, For remaining this is pitch-1 + unsigned int DEPTH : SQ_IMG_RSC_WRD4_DEPTH_SZ; + unsigned int : 1; //Pitch[13] in gfx10.3 (NV21) + unsigned int : 2; + unsigned int BASE_ARRAY : SQ_IMG_RSC_WRD4_BASE_ARR_SZ; + unsigned int : 3; +#elif defined(BIGENDIAN_CPU) + unsigned int : 3; + unsigned int BASE_ARRAY : SQ_IMG_RSC_WRD4_BASE_ARR_SZ; + unsigned int : 2; + unsigned int : 1; //Pitch[13] in gfx10.3 (NV21) + unsigned int DEPTH : SQ_IMG_RSC_WRD4_DEPTH_SZ; //Pitch[0:12] in gfx10.3 (NV21) +#endif +}; +union SQ_IMG_RSRC_WORD4 { + sq_img_rsrc_word4_t bitfields, bits, f; + uint32_t val : SQ_IMG_RSC_WRD4_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_RSC_WRD5_REG_SZ 32 +#define SQ_IMG_RSC_WRD5_ARRAY_PITCH_SZ 4 +#define SQ_IMG_RSC_WRD5_MAX_MIP_SZ 4 +//#define SQ_IMG_RSC_WRD5_DSCAL_OR_MID_LOD_WRN_SZ 4 +//#define SQ_IMG_RSC_WRD5_HSCAL_OR_MID_LOD_WRN_SZ 4 +//#define SQ_IMG_RSC_WRD5_WSCAL_OR_MID_LOD_WRN_SZ 4 +#define SQ_IMG_RSC_WRD5_MID_LOD_WRN_SZ 12 +#define SQ_IMG_RSC_WRD5_PERF_MOD_SZ 3 +#define SQ_IMG_RSC_WRD5_CORNER_SAMPLES_SZ 1 +#define SQ_IMG_RSC_WRD5_LINKED_RESOURCE_SZ 1 +#define SQ_IMG_RSC_WRD5_LOD_HDW_CNT_EN_SZ 1 +#define SQ_IMG_RSC_WRD5_PRT_DEFAULT_SZ 1 +#define SQ_IMG_RSC_WRD5_BIG_PAGE_SZ 1 + +struct sq_img_rsrc_word5_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int ARRAY_PITCH : SQ_IMG_RSC_WRD5_ARRAY_PITCH_SZ; + unsigned int MAX_MIP : SQ_IMG_RSC_WRD5_MAX_MIP_SZ; + unsigned int MID_LOD_WRN : SQ_IMG_RSC_WRD5_MID_LOD_WRN_SZ; +// unsigned int DSCAL_OR_MID_LOD_WRN : SQ_IMG_RSC_WRD5_DSCAL_OR_MID_LOD_WRN_SZ; +// unsigned int HSCAL_OR_MID_LOD_WRN : SQ_IMG_RSC_WRD5_HSCAL_OR_MID_LOD_WRN_SZ; +// unsigned int WSCAL_OR_MID_LOD_WRN : SQ_IMG_RSC_WRD5_WSCAL_OR_MID_LOD_WRN_SZ; + unsigned int PERF_MOD : SQ_IMG_RSC_WRD5_PERF_MOD_SZ; + unsigned int CORNER_SAMPLES : SQ_IMG_RSC_WRD5_CORNER_SAMPLES_SZ; + unsigned int LINKED_RESOURCE : SQ_IMG_RSC_WRD5_LINKED_RESOURCE_SZ; + unsigned int LOD_HDW_CNT_EN : SQ_IMG_RSC_WRD5_LOD_HDW_CNT_EN_SZ; + unsigned int PRT_DEFAULT : SQ_IMG_RSC_WRD5_PRT_DEFAULT_SZ; + unsigned int : 4; + unsigned int BIG_PAGE : SQ_IMG_RSC_WRD5_BIG_PAGE_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int BIG_PAGE : SQ_IMG_RSC_WRD5_BIG_PAGE_SZ; + unsigned int : 4; + unsigned int PRT_DEFAULT : SQ_IMG_RSC_WRD5_PRT_DEFAULT_SZ; + unsigned int LOD_HDW_CNT_EN : SQ_IMG_RSC_WRD5_LOD_HDW_CNT_EN_SZ; + unsigned int LINKED_RESOURCE : SQ_IMG_RSC_WRD5_LINKED_RESOURCE_SZ; + unsigned int CORNER_SAMPLES : SQ_IMG_RSC_WRD5_CORNER_SAMPLES_SZ; + unsigned int PERF_MOD : SQ_IMG_RSC_WRD5_PERF_MOD_SZ; + unsigned int MID_LOD_WRN : SQ_IMG_RSC_WRD5_MID_LOD_WRN_SZ; +// unsigned int WSCAL_OR_MID_LOD_WRN : SQ_IMG_RSC_WRD5_WSCAL_OR_MID_LOD_WRN_SZ; +// unsigned int HSCAL_OR_MID_LOD_WRN : SQ_IMG_RSC_WRD5_HSCAL_OR_MID_LOD_WRN_SZ; +// unsigned int DSCAL_OR_MID_LOD_WRN : SQ_IMG_RSC_WRD5_DSCAL_OR_MID_LOD_WRN_SZ; + unsigned int MAX_MIP : SQ_IMG_RSC_WRD5_MAX_MIP_SZ; + unsigned int ARRAY_PITCH : SQ_IMG_RSC_WRD5_ARRAY_PITCH_SZ; +#endif +}; + +union SQ_IMG_RSRC_WORD5 { + sq_img_rsrc_word5_t bitfields, bits, f; + uint32_t val : SQ_IMG_RSC_WRD5_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_RSC_WRD6_REG_SZ 32 +#define SQ_IMG_RSC_WRD6_COUNTER_BANK_ID_SZ 8 +#define SQ_IMG_RSC_WRD6_LLC_NOALLOC_RES_SZ 2 +#define SQ_IMG_RSC_WRD6_ITERATE_256_SZ 1 +#define SQ_IMG_RSC_WRD6_MAX_UNCOMP_BLK_SZ_SZ 2 +#define SQ_IMG_RSC_WRD6_MAX_COMP_BLK_SZ_SZ 2 +#define SQ_IMG_RSC_WRD6_META_PIPE_ALIGNED_SZ 1 +#define SQ_IMG_RSC_WRD6_WRITE_COMPRESS_EN_SZ 1 +#define SQ_IMG_RSC_WRD6_COMPRESSION_ENABLE_SZ 1 +#define SQ_IMG_RSC_WRD6_ALPHA_IS_ON_MSB_SZ 1 +#define SQ_IMG_RSC_WRD6_COLOR_TRANSFORM_SZ 1 +#define SQ_IMG_RSC_WRD6_META_DATA_ADDR_SZ 8 +struct sq_img_rsrc_word6_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int COUNTER_BANK_ID : SQ_IMG_RSC_WRD6_COUNTER_BANK_ID_SZ; + unsigned int LLC_NOALLOC_RES : SQ_IMG_RSC_WRD6_LLC_NOALLOC_RES_SZ; //gfx10.3 (NV21) + unsigned int ITERATE_256 : SQ_IMG_RSC_WRD6_ITERATE_256_SZ; + unsigned int : 4; + unsigned int MAX_UNCOMP_BLK_SZ : SQ_IMG_RSC_WRD6_MAX_UNCOMP_BLK_SZ_SZ; + unsigned int MAX_COMP_BLK_SZ : SQ_IMG_RSC_WRD6_MAX_COMP_BLK_SZ_SZ; + unsigned int META_PIPE_ALIGNED : SQ_IMG_RSC_WRD6_META_PIPE_ALIGNED_SZ; + unsigned int WRITE_COMPRESS_ENABLE : SQ_IMG_RSC_WRD6_WRITE_COMPRESS_EN_SZ; + unsigned int COMPRESSION_ENABLE : SQ_IMG_RSC_WRD6_COMPRESSION_ENABLE_SZ; + unsigned int ALPHA_IS_ON_MSB : SQ_IMG_RSC_WRD6_ALPHA_IS_ON_MSB_SZ; + unsigned int COLOR_TRANSFORM : SQ_IMG_RSC_WRD6_COLOR_TRANSFORM_SZ; + unsigned int META_DATA_ADDRESS : SQ_IMG_RSC_WRD6_META_DATA_ADDR_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int META_DATA_ADDRESS : SQ_IMG_RSC_WRD6_META_DATA_ADDR_SZ; + unsigned int COLOR_TRANSFORM : SQ_IMG_RSC_WRD6_COLOR_TRANSFORM_SZ; + unsigned int ALPHA_IS_ON_MSB : SQ_IMG_RSC_WRD6_ALPHA_IS_ON_MSB_SZ; + unsigned int COMPRESSION_ENABLE : SQ_IMG_RSC_WRD6_COMPRESSION_ENABLE_SZ; + unsigned int WRITE_COMPRESS_ENABLE : SQ_IMG_RSC_WRD6_WRITE_COMPRESS_EN_SZ; + unsigned int META_PIPE_ALIGNED : SQ_IMG_RSC_WRD6_META_PIPE_ALIGNED_SZ; + unsigned int MAX_COMP_BLK_SZ : SQ_IMG_RSC_WRD6_MAX_COMP_BLK_SZ_SZ; + unsigned int MAX_UNCOMP_BLK_SZ : SQ_IMG_RSC_WRD6_MAX_UNCOMP_BLK_SZ_SZ; + unsigned int : 4; + unsigned int ITERATE_256 : SQ_IMG_RSC_WRD6_ITERATE_256_SZ; + unsigned int LLC_NOALLOC_RES : SQ_IMG_RSC_WRD6_LLC_NOALLOC_RES_SZ; + unsigned int COUNTER_BANK_ID : SQ_IMG_RSC_WRD6_COUNTER_BANK_ID_SZ; +#endif +}; +union SQ_IMG_RSRC_WORD6 { + sq_img_rsrc_word6_t bitfields, bits, f; + uint32_t val : SQ_IMG_RSC_WRD6_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_RSC_WRD7_REG_SZ 32 +#define SQ_IMG_RSC_WRD7_META_DATA_ADDRESS_HI_SZ 32 +struct sq_img_rsrc_word7_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int META_DATA_ADDRESS_HI : SQ_IMG_RSC_WRD7_META_DATA_ADDRESS_HI_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int META_DATA_ADDRESS_HI : SQ_IMG_RSC_WRD7_META_DATA_ADDRESS_HI_SZ; +#endif +}; +union SQ_IMG_RSRC_WORD7 { + sq_img_rsrc_word7_t bitfields, bits, f; + uint32_t val : SQ_IMG_RSC_WRD7_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ +/**********************************************************/ +/**********************************************************/ + +#define SQ_IMG_SAMP_WORD0_REG_SZ 32 +#define SQ_IMG_SAMP_WORD0_CLAMP_X_SZ 3 +#define SQ_IMG_SAMP_WORD0_CLAMP_Y_SZ 3 +#define SQ_IMG_SAMP_WORD0_CLAMP_Z_SZ 3 +#define SQ_IMG_SAMP_WORD0_MAX_ANISO_RATIO_SZ 3 +#define SQ_IMG_SAMP_WORD0_DEPTH_COMPARE_FUNC_SZ 3 +#define SQ_IMG_SAMP_WORD0_FORCE_UNNORMALIZED_SZ 1 +#define SQ_IMG_SAMP_WORD0_ANISO_THRESHOLD_SZ 3 +#define SQ_IMG_SAMP_WORD0_MC_COORD_TRUNC_SZ 1 +#define SQ_IMG_SAMP_WORD0_FORCE_DEGAMMA_SZ 1 +#define SQ_IMG_SAMP_WORD0_ANISO_BIAS_SZ 6 +#define SQ_IMG_SAMP_WORD0_TRUNC_COORD_SZ 1 +#define SQ_IMG_SAMP_WORD0_DISABLE_CUBE_WRAP_SZ 1 +#define SQ_IMG_SAMP_WORD0_FILTER_MODE_SZ 2 +#define SQ_IMG_SAMP_WORD0_SKIP_DEGAMMA_SZ 1 +struct sq_img_samp_word0_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int CLAMP_X : SQ_IMG_SAMP_WORD0_CLAMP_X_SZ; + unsigned int CLAMP_Y : SQ_IMG_SAMP_WORD0_CLAMP_Y_SZ; + unsigned int CLAMP_Z : SQ_IMG_SAMP_WORD0_CLAMP_Z_SZ; + unsigned int MAX_ANISO_RATIO : SQ_IMG_SAMP_WORD0_MAX_ANISO_RATIO_SZ; + unsigned int DEPTH_COMPARE_FUNC : SQ_IMG_SAMP_WORD0_DEPTH_COMPARE_FUNC_SZ; + unsigned int FORCE_UNNORMALIZED : SQ_IMG_SAMP_WORD0_FORCE_UNNORMALIZED_SZ; + unsigned int ANISO_THRESHOLD : SQ_IMG_SAMP_WORD0_ANISO_THRESHOLD_SZ; + unsigned int MC_COORD_TRUNC : SQ_IMG_SAMP_WORD0_MC_COORD_TRUNC_SZ; + unsigned int FORCE_DEGAMMA : SQ_IMG_SAMP_WORD0_FORCE_DEGAMMA_SZ; + unsigned int ANISO_BIAS : SQ_IMG_SAMP_WORD0_ANISO_BIAS_SZ; + unsigned int TRUNC_COORD : SQ_IMG_SAMP_WORD0_TRUNC_COORD_SZ; + unsigned int DISABLE_CUBE_WRAP : SQ_IMG_SAMP_WORD0_DISABLE_CUBE_WRAP_SZ; + unsigned int FILTER_MODE : SQ_IMG_SAMP_WORD0_FILTER_MODE_SZ; + unsigned int SKIP_DEGAMMA : SQ_IMG_SAMP_WORD0_SKIP_DEGAMMA_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int SKIP_DEGAMMA : SQ_IMG_SAMP_WORD0_SKIP_DEGAMMA_SZ; + unsigned int FILTER_MODE : SQ_IMG_SAMP_WORD0_FILTER_MODE_SZ; + unsigned int DISABLE_CUBE_WRAP : SQ_IMG_SAMP_WORD0_DISABLE_CUBE_WRAP_SZ; + unsigned int TRUNC_COORD : SQ_IMG_SAMP_WORD0_TRUNC_COORD_SZ; + unsigned int ANISO_BIAS : SQ_IMG_SAMP_WORD0_ANISO_BIAS_SZ; + unsigned int FORCE_DEGAMMA : SQ_IMG_SAMP_WORD0_FORCE_DEGAMMA_SZ; + unsigned int MC_COORD_TRUNC : SQ_IMG_SAMP_WORD0_MC_COORD_TRUNC_SZ; + unsigned int ANISO_THRESHOLD : SQ_IMG_SAMP_WORD0_ANISO_THRESHOLD_SZ; + unsigned int FORCE_UNNORMALIZED : SQ_IMG_SAMP_WORD0_FORCE_UNNORMALIZED_SZ; + unsigned int DEPTH_COMPARE_FUNC : SQ_IMG_SAMP_WORD0_DEPTH_COMPARE_FUNC_SZ; + unsigned int MAX_ANISO_RATIO : SQ_IMG_SAMP_WORD0_MAX_ANISO_RATIO_SZ; + unsigned int CLAMP_Z : SQ_IMG_SAMP_WORD0_CLAMP_Z_SZ; + unsigned int CLAMP_Y : SQ_IMG_SAMP_WORD0_CLAMP_Y_SZ; + unsigned int CLAMP_X : SQ_IMG_SAMP_WORD0_CLAMP_X_SZ; +#endif +}; + +union SQ_IMG_SAMP_WORD0 { + sq_img_samp_word0_t bitfields, bits, f; + uint32_t val : SQ_IMG_SAMP_WORD0_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_SAMP_WORD1_REG_SZ 32 +#define SQ_IMG_SAMP_WORD1_MIN_LOD_SZ 12 +#define SQ_IMG_SAMP_WORD1_MAX_LOD_SZ 12 +#define SQ_IMG_SAMP_WORD1_PERF_MIP_SZ 4 +#define SQ_IMG_SAMP_WORD1_PERF_Z_SZ 4 +struct sq_img_samp_word1_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int MIN_LOD : SQ_IMG_SAMP_WORD1_MIN_LOD_SZ; + unsigned int MAX_LOD : SQ_IMG_SAMP_WORD1_MAX_LOD_SZ; + unsigned int PERF_MIP : SQ_IMG_SAMP_WORD1_PERF_MIP_SZ; + unsigned int PERF_Z : SQ_IMG_SAMP_WORD1_PERF_Z_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int PERF_Z : SQ_IMG_SAMP_WORD1_PERF_Z_SZ; + unsigned int PERF_MIP : SQ_IMG_SAMP_WORD1_PERF_MIP_SZ; + unsigned int MAX_LOD : SQ_IMG_SAMP_WORD1_MAX_LOD_SZ; + unsigned int MIN_LOD : SQ_IMG_SAMP_WORD1_MIN_LOD_SZ; +#endif +}; + +union SQ_IMG_SAMP_WORD1 { + sq_img_samp_word1_t bitfields, bits, f; + uint32_t val : SQ_IMG_SAMP_WORD1_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_SAMP_WORD2_REG_SZ 32 +#define SQ_IMG_SAMP_WORD2_BC_LRS_LB_SZ 12 +#define SQ_IMG_SAMP_WORD2_BC_OR_BCT_SZ 2 +#define SQ_IMG_SAMP_WORD2_LOD_BIAS_SEC_SZ 6 +#define SQ_IMG_SAMP_WORD2_XY_MAG_FILTER_SZ 2 +#define SQ_IMG_SAMP_WORD2_XY_MIN_FILTER_SZ 2 +#define SQ_IMG_SAMP_WORD2_Z_FILTER_SZ 2 +#define SQ_IMG_SAMP_WORD2_MIP_FILTER_SZ 2 +#define SQ_IMG_SAMP_WORD2_MIP_POINT_PRECLAMP_SZ 1 +#define SQ_IMG_SAMP_WORD2_ANISO_OVERRIDE_SZ 1 +#define SQ_IMG_SAMP_WORD2_BLEND_ZERO_PRT_SZ 1 +#define SQ_IMG_SAMP_WORD2_DERIV_ADJUST_ENABLE_SZ 1 +struct sq_img_samp_word2_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int BC_LRS_LB : SQ_IMG_SAMP_WORD2_BC_LRS_LB_SZ; + unsigned int BC_OR_BCT : SQ_IMG_SAMP_WORD2_BC_OR_BCT_SZ; + unsigned int LOD_BIAS_SEC : SQ_IMG_SAMP_WORD2_LOD_BIAS_SEC_SZ; + unsigned int XY_MAG_FILTER : SQ_IMG_SAMP_WORD2_XY_MAG_FILTER_SZ; + unsigned int XY_MIN_FILTER : SQ_IMG_SAMP_WORD2_XY_MIN_FILTER_SZ; + unsigned int Z_FILTER : SQ_IMG_SAMP_WORD2_Z_FILTER_SZ; + unsigned int MIP_FILTER : SQ_IMG_SAMP_WORD2_MIP_FILTER_SZ; + unsigned int MIP_POINT_PRECLAMP : SQ_IMG_SAMP_WORD2_MIP_POINT_PRECLAMP_SZ; + unsigned int ANISO_OVERRIDE : SQ_IMG_SAMP_WORD2_ANISO_OVERRIDE_SZ; + unsigned int BLEND_ZERO_PRT : SQ_IMG_SAMP_WORD2_BLEND_ZERO_PRT_SZ; + unsigned int DERIV_ADJUST_EN : SQ_IMG_SAMP_WORD2_DERIV_ADJUST_ENABLE_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int DERIV_ADJUST_EN : SQ_IMG_SAMP_WORD2_DERIV_ADJUST_ENABLE_SZ; + unsigned int BLEND_ZERO_PRT : SQ_IMG_SAMP_WORD2_BLEND_ZERO_PRT_SZ; + unsigned int ANISO_OVERRIDE : SQ_IMG_SAMP_WORD2_ANISO_OVERRIDE_SZ; + unsigned int MIP_POINT_PRECLAMP : SQ_IMG_SAMP_WORD2_MIP_POINT_PRECLAMP_SZ; + unsigned int MIP_FILTER : SQ_IMG_SAMP_WORD2_MIP_FILTER_SZ; + unsigned int Z_FILTER : SQ_IMG_SAMP_WORD2_Z_FILTER_SZ; + unsigned int XY_MIN_FILTER : SQ_IMG_SAMP_WORD2_XY_MIN_FILTER_SZ; + unsigned int XY_MAG_FILTER : SQ_IMG_SAMP_WORD2_XY_MAG_FILTER_SZ; + unsigned int LOD_BIAS_SEC : SQ_IMG_SAMP_WORD2_LOD_BIAS_SEC_SZ; + unsigned int BC_OR_BCT : SQ_IMG_SAMP_WORD2_BC_OR_BCT_SZ; + unsigned int LOD_BIAS : SQ_IMG_SAMP_WORD2_BC_LRS_LB_SZ; +#endif +}; + +union SQ_IMG_SAMP_WORD2 { + sq_img_samp_word2_t bitfields, bits, f; + uint32_t val : SQ_IMG_SAMP_WORD2_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +#define SQ_IMG_SAMP_WORD3_REG_SZ 32 +#define SQ_IMG_SAMP_WORD3_BCP_LRS_DAV_SZ 12 +#define SQ_IMG_SAMP_WORD3_GRAD_ADJ_OR_DAV_SZ 16 +#define SQ_IMG_SAMP_WORD3_RES_OR_DAV_SZ 2 +#define SQ_IMG_SAMP_WORD3_BORD_COLOR_TYPE_SZ 2 + +struct sq_img_samp_word3_t { +#if defined(LITTLEENDIAN_CPU) + unsigned int BCP_LRS_DAV : SQ_IMG_SAMP_WORD3_BCP_LRS_DAV_SZ; + unsigned int GRAD_ADJ_OR_DAV : SQ_IMG_SAMP_WORD3_GRAD_ADJ_OR_DAV_SZ; + unsigned int RES_OR_DAV : SQ_IMG_SAMP_WORD3_RES_OR_DAV_SZ; + unsigned int BORDER_COLOR_TYPE : SQ_IMG_SAMP_WORD3_BORD_COLOR_TYPE_SZ; +#elif defined(BIGENDIAN_CPU) + unsigned int BORDER_COLOR_TYPE : SQ_IMG_SAMP_WORD3_BORD_COLOR_TYPE_SZ; + unsigned int RES_OR_DAV : SQ_IMG_SAMP_WORD3_RES_OR_DAV_SZ; + unsigned int GRAD_ADJ_OR_DAV : SQ_IMG_SAMP_WORD3_GRAD_ADJ_OR_DAV_SZ; + unsigned int BCP_LRS_DAV : SQ_IMG_SAMP_WORD3_BCP_LRS_DAV_SZ; +#endif +}; + +union SQ_IMG_SAMP_WORD3 { + sq_img_samp_word3_t bitfields, bits, f; + uint32_t val : SQ_IMG_SAMP_WORD3_REG_SZ; + uint32_t u32All; + int32_t i32All; + float f32All; +}; +/***********/ + +/**************************************************************/ +/**************************************************************/ +/**************************************************************/ + +typedef enum FMT { +FMT_INVALID = 0x00000000, +FMT_8 = 0x00000001, +FMT_16 = 0x00000002, +FMT_8_8 = 0x00000003, +FMT_32 = 0x00000004, +FMT_16_16 = 0x00000005, +FMT_10_11_11 = 0x00000006, +FMT_11_11_10 = 0x00000007, +FMT_10_10_10_2 = 0x00000008, +FMT_2_10_10_10 = 0x00000009, +FMT_8_8_8_8 = 0x0000000a, +FMT_32_32 = 0x0000000b, +FMT_16_16_16_16 = 0x0000000c, +FMT_32_32_32 = 0x0000000d, +FMT_32_32_32_32 = 0x0000000e, +FMT_RESERVED_78 = 0x0000000f, +FMT_5_6_5 = 0x00000010, +FMT_1_5_5_5 = 0x00000011, +FMT_5_5_5_1 = 0x00000012, +FMT_4_4_4_4 = 0x00000013, +FMT_8_24 = 0x00000014, +FMT_24_8 = 0x00000015, +FMT_X24_8_32 = 0x00000016, +FMT_RESERVED_155 = 0x00000017, +FMT_1 = 0x00000018, +FMT_1_REVERSED = 0x00000019, +FMT_GB_GR = 0x0000001a, +FMT_BG_RG = 0x0000001b, +FMT_4_4 = 0x0000001c, +FMT_BC1 = 0x0000001d, +FMT_BC2 = 0x0000001e, +FMT_BC3 = 0x0000001f, +FMT_BC4 = 0x00000020, +FMT_BC5 = 0x00000021, +FMT_BC6 = 0x00000022, +FMT_BC7 = 0x00000023, +FMT_6E4 = 0x00000024, +FMT_5_9_9_9 = 0x00000025, +FMT_FMASK8_S2 = 0x00000026, +FMT_FMASK8_S4 = 0x00000027, +FMT_FMASK8_S8 = 0x00000028, +FMT_FMASK16_S16 = 0x00000029, +FMT_FMASK16_S8 = 0x0000002a, +FMT_FMASK32_S16 = 0x0000002b, +FMT_FMASK32_S8 = 0x0000002c, +FMT_FMASK64_S16 = 0x0000002d, +FMT_ETC2_RGB = 0x0000002e, +FMT_ETC2_RGBA = 0x0000002f, +FMT_ETC2_R = 0x00000030, +FMT_ETC2_RG = 0x00000031, +FMT_ETC2_RGBA1 = 0x00000032, +FMT_ASTC_2D_LDR = 0x00000033, +FMT_ASTC_2D_HDR = 0x00000034, +FMT_ASTC_2D_LDR_SRGB = 0x00000035, +FMT_ASTC_3D_LDR = 0x00000036, +FMT_ASTC_3D_HDR = 0x00000037, +FMT_ASTC_3D_LDR_SRGB = 0x00000038, +FMT_MM_8 = 0x00000039, +FMT_MM_8_8 = 0x0000003a, +FMT_MM_8_8_8_8 = 0x0000003b, +FMT_MM_VYUY8 = 0x0000003c, +FMT_MM_10_11_11 = 0x0000003d, +FMT_MM_2_10_10_10 = 0x0000003e, +FMT_MM_16_16_16_16 = 0x0000003f, +FMT_10_IN_16 = 0x00000040, +FMT_10_IN_16_16 = 0x00000041, +FMT_10_IN_16_16_16_16 = 0x00000042, +FMT_7E3 = 0x00000043, +FMT_YCBCR = 0x00000044, +} FMT; + +typedef enum type { +TYPE_UNORM = 0x00000000, +TYPE_SNORM = 0x00000001, +TYPE_USCALED = 0x00000002, +TYPE_SSCALED = 0x00000003, +TYPE_UINT = 0x00000004, +TYPE_SINT = 0x00000005, +TYPE_RESERVED_6 = 0x00000006, +TYPE_FLOAT = 0x00000007, +TYPE_RESERVED_8 = 0x00000008, +TYPE_SRGB = 0x00000009, +TYPE_UNORM_UINT = 0x0000000a, +TYPE_REVERSED_UNORM = 0x0000000b, +TYPE_FLOAT_CLAMP = 0x0000000c, +TYPE_F1 = 0x0000000d, +TYPE_F2 = 0x0000000e, +TYPE_F4 = 0x0000000f, +TYPE_F8 = 0x00000010, +TYPE_4X4 = 0x00000011, +TYPE_5X4 = 0x00000012, +TYPE_5X5 = 0x00000013, +TYPE_6X5 = 0x00000014, +TYPE_6X6 = 0x00000015, +TYPE_8X5 = 0x00000016, +TYPE_8X6 = 0x00000017, +TYPE_8X8 = 0x00000018, +TYPE_10X5 = 0x00000019, +TYPE_10X6 = 0x0000001a, +TYPE_10X8 = 0x0000001b, +TYPE_10X10 = 0x0000001c, +TYPE_12X10 = 0x0000001d, +TYPE_12X12 = 0x0000001e, +TYPE_3X3X3 = 0x0000001f, +TYPE_4X4X3 = 0x00000020, +TYPE_4X4X4 = 0x00000021, +TYPE_5X4X4 = 0x00000022, +TYPE_5X5X4 = 0x00000023, +TYPE_6X5X5 = 0x00000024, +TYPE_6X6X6 = 0x00000025 +} type; + +enum FORMAT { +CFMT_INVALID = 0, +CFMT_8_UNORM = 1, +CFMT_8_SNORM = 2, +CFMT_8_UINT = 5, +CFMT_8_SINT = 6, +CFMT_16_UNORM = 7, +CFMT_16_SNORM = 8, +CFMT_16_UINT = 11, +CFMT_16_SINT = 12, +CFMT_16_FLOAT = 13, +CFMT_8_8_UNORM = 14, +CFMT_8_8_SNORM = 15, +CFMT_8_8_UINT = 18, +CFMT_8_8_SINT = 19, +CFMT_32_UINT = 20, +CFMT_32_SINT = 21, +CFMT_32_FLOAT = 22, +CFMT_16_16_UNORM = 23, +CFMT_16_16_SNORM = 24, +CFMT_16_16_UINT = 27, +CFMT_16_16_SINT = 28, +CFMT_16_16_FLOAT = 29, +CFMT_10_10_10_2_UNORM = 44, +CFMT_10_10_10_2_SNORM = 45, +CFMT_10_10_10_2_UINT = 48, +CFMT_10_10_10_2_SINT = 49, +CFMT_2_10_10_10_UNORM = 50, +CFMT_2_10_10_10_SNORM = 51, +CFMT_2_10_10_10_UINT = 54, +CFMT_2_10_10_10_SINT = 55, +CFMT_8_8_8_8_UNORM = 56, +CFMT_8_8_8_8_SNORM = 57, +CFMT_8_8_8_8_UINT = 60, +CFMT_8_8_8_8_SINT = 61, +CFMT_32_32_UINT = 62, +CFMT_32_32_SINT = 63, +CFMT_32_32_FLOAT = 64, +CFMT_16_16_16_16_UNORM = 65, +CFMT_16_16_16_16_SNORM = 66, +CFMT_16_16_16_16_UINT = 69, +CFMT_16_16_16_16_SINT = 70, +CFMT_16_16_16_16_FLOAT = 71, +CFMT_32_32_32_UINT = 72, +CFMT_32_32_32_SINT = 73, +CFMT_32_32_32_FLOAT = 74, +CFMT_32_32_32_32_UINT = 75, +CFMT_32_32_32_32_SINT = 76, +CFMT_32_32_32_32_FLOAT = 77, +CFMT_8_SRGB = 128, +CFMT_8_8_SRGB = 129, +CFMT_8_8_8_8_SRGB = 130, +CFMT_5_6_5_UNORM = 133, +CFMT_1_5_5_5_UNORM = 134, +CFMT_5_5_5_1_UNORM = 135, +CFMT_8_24_UNORM = 141, +CFMT_8_24_UINT = 142, +CFMT_24_8_UNORM = 143, +CFMT_24_8_UINT = 144 +}; + +typedef enum SEL { + SEL_0 = 0x00000000, + SEL_1 = 0x00000001, + SEL_X = 0x00000004, + SEL_Y = 0x00000005, + SEL_Z = 0x00000006, + SEL_W = 0x00000007, +} SEL; + +typedef enum SQ_RSRC_IMG_TYPE { + SQ_RSRC_IMG_1D = 0x00000008, + SQ_RSRC_IMG_2D = 0x00000009, + SQ_RSRC_IMG_3D = 0x0000000a, + SQ_RSRC_IMG_CUBE_ARRAY = 0x0000000b, + SQ_RSRC_IMG_1D_ARRAY = 0x0000000c, + SQ_RSRC_IMG_2D_ARRAY = 0x0000000d, + SQ_RSRC_IMG_2D_MSAA = 0x0000000e, + SQ_RSRC_IMG_2D_MSAA_ARRAY = 0x0000000f, +} SQ_RSRC_IMG_TYPE; + +typedef enum SQ_TEX_XY_FILTER { + SQ_TEX_XY_FILTER_POINT = 0x00000000, + SQ_TEX_XY_FILTER_BILINEAR = 0x00000001, + SQ_TEX_XY_FILTER_ANISO_POINT = 0x00000002, + SQ_TEX_XY_FILTER_ANISO_BILINEAR = 0x00000003, +} SQ_TEX_XY_FILTER; + +typedef enum SQ_TEX_Z_FILTER { + SQ_TEX_Z_FILTER_NONE = 0x00000000, + SQ_TEX_Z_FILTER_POINT = 0x00000001, + SQ_TEX_Z_FILTER_LINEAR = 0x00000002, +} SQ_TEX_Z_FILTER; + +typedef enum SQ_TEX_MIP_FILTER { + SQ_TEX_MIP_FILTER_NONE = 0x00000000, + SQ_TEX_MIP_FILTER_POINT = 0x00000001, + SQ_TEX_MIP_FILTER_LINEAR = 0x00000002, + SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ__VI = 0x00000003, +} SQ_TEX_MIP_FILTER; + +typedef enum SQ_TEX_CLAMP { + SQ_TEX_WRAP = 0x00000000, + SQ_TEX_MIRROR = 0x00000001, + SQ_TEX_CLAMP_LAST_TEXEL = 0x00000002, + SQ_TEX_MIRROR_ONCE_LAST_TEXEL = 0x00000003, + SQ_TEX_CLAMP_HALF_BORDER = 0x00000004, + SQ_TEX_MIRROR_ONCE_HALF_BORDER = 0x00000005, + SQ_TEX_CLAMP_BORDER = 0x00000006, + SQ_TEX_MIRROR_ONCE_BORDER = 0x00000007, +} SQ_TEX_CLAMP; + +typedef enum SQ_TEX_BORDER_COLOR { + SQ_TEX_BORDER_COLOR_TRANS_BLACK = 0x00000000, + SQ_TEX_BORDER_COLOR_OPAQUE_BLACK = 0x00000001, + SQ_TEX_BORDER_COLOR_OPAQUE_WHITE = 0x00000002, + SQ_TEX_BORDER_COLOR_REGISTER = 0x00000003, +} SQ_TEX_BORDER_COLOR; + +typedef enum TEX_BC_SWIZZLE { +TEX_BC_Swizzle_XYZW = 0x00000000, +TEX_BC_Swizzle_XWYZ = 0x00000001, +TEX_BC_Swizzle_WZYX = 0x00000002, +TEX_BC_Swizzle_WXYZ = 0x00000003, +TEX_BC_Swizzle_ZYXW = 0x00000004, +TEX_BC_Swizzle_YXWZ = 0x00000005, +} TEX_BC_SWIZZLE; + +typedef struct metadata_amd_nv_s { + uint32_t version; // Must be 1 + uint32_t vendorID; // AMD + SQ_IMG_RSRC_WORD0 word0; + SQ_IMG_RSRC_WORD1 word1; + SQ_IMG_RSRC_WORD2 word2; + SQ_IMG_RSRC_WORD3 word3; + SQ_IMG_RSRC_WORD4 word4; + SQ_IMG_RSRC_WORD5 word5; + SQ_IMG_RSRC_WORD6 word6; + SQ_IMG_RSRC_WORD7 word7; + uint32_t mip_offsets[0]; +} metadata_amd_nv_t; + +} // namespace amd +#endif // EXT_IMAGE_RESOURCE_NV_H_ diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/util.h b/projects/rocr-runtime/runtime/hsa-runtime/image/util.h new file mode 100644 index 0000000000..6d82138472 --- /dev/null +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/util.h @@ -0,0 +1,213 @@ +#ifndef HSA_RUNTIME_EXT_IMAGE_UTIL_H +#define HSA_RUNTIME_EXT_IMAGE_UTIL_H + +#include +#include + +#include "inc/hsa.h" + +// A macro to disallow the copy and move constructor and operator= functions +// This should be used in the private: declarations for a class +#define DISALLOW_COPY_AND_ASSIGN(TypeName) \ + TypeName(const TypeName&); \ + TypeName(TypeName&&); \ + void operator=(const TypeName&); \ + void operator=(TypeName&&); + +#if defined(_MSC_VER) +#define ALIGNED_(x) __declspec(align(x)) +#else +#if defined(__GNUC__) +#define ALIGNED_(x) __attribute__ ((aligned(x))) +#endif // __GNUC__ +#endif // _MSC_VER + +#define MULTILINE(...) # __VA_ARGS__ + +#if defined(__GNUC__) +#include "mm_malloc.h" +#if defined(__i386__) || defined(__x86_64__) +#include +#else +#error \ + "Processor not identified. " \ + "Need to provide a lightweight approximate clock interface (aka __rdtsc())." +#endif + +namespace ext_image { +#define __forceinline __inline__ __attribute__((always_inline)) +static __forceinline void __debugbreak() { __builtin_trap(); } +#define __declspec(x) __attribute__((x)) +#undef __stdcall +#define __stdcall // __attribute__((__stdcall__)) +#define __ALIGNED__(x) __attribute__((aligned(x))) + +static __forceinline void* _aligned_malloc(size_t size, size_t alignment) { + return _mm_malloc(size, alignment); +} +static __forceinline void _aligned_free(void* ptr) { return _mm_free(ptr); } +#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) +#include "intrin.h" +#define __ALIGNED__(x) __declspec(align(x)) +namespace ext_image { +#else +#error "Compiler and/or processor not identified." +#endif + +/// @brief: Checks if a value is power of two, if it is, return true. Be careful +/// when passing 0. +/// @param: val(Input), the data to be checked. +/// @return: bool. +template +static __forceinline bool IsPowerOfTwo(T val) { + return (val & (val - 1)) == 0; +} + +/// @brief: Calculates the floor value aligned based on parameter of alignment. +/// If value is at the boundary of alignment, it is unchanged. +/// @param: value(Input), value to be calculated. +/// @param: alignment(Input), alignment value. +/// @return: T. +template +static __forceinline T AlignDown(T value, size_t alignment) { + assert(IsPowerOfTwo(alignment)); + return (T)(value & ~(alignment - 1)); +} + +/// @brief: Same as previous one, but first parameter becomes pointer, for more +/// info, see the previous desciption. +/// @param: value(Input), pointer to type T. +/// @param: alignment(Input), alignment value. +/// @return: T*, pointer to type T. +template +static __forceinline T* AlignDown(T* value, size_t alignment) { + return (T*)AlignDown((intptr_t)value, alignment); +} + +/// @brief: Calculates the ceiling value aligned based on parameter of +/// alignment. +/// If value is at the boundary of alignment, it is unchanged. +/// @param: value(Input), value to be calculated. +/// @param: alignment(Input), alignment value. +/// @param: T. +template +static __forceinline T AlignUp(T value, size_t alignment) { + return AlignDown((T)(value + alignment - 1), alignment); +} + +/// @brief: Same as previous one, but first parameter becomes pointer, for more +/// info, see the previous desciption. +/// @param: value(Input), pointer to type T. +/// @param: alignment(Input), alignment value. +/// @return: T*, pointer to type T. +template +static __forceinline T* AlignUp(T* value, size_t alignment) { + return (T*)AlignDown((intptr_t)((uint8_t*)value + alignment - 1), alignment); +} + +/// @brief: Checks if the input value is at the boundary of alignment, if it is, +/// @return true. +/// @param: value(Input), value to be checked. +/// @param: alignment(Input), alignment value. +/// @return: bool. +template +static __forceinline bool IsMultipleOf(T value, size_t alignment) { + return (AlignUp(value, alignment) == value); +} + +/// @brief: Same as previous one, but first parameter becomes pointer, for more +/// info, see the previous desciption. +/// @param: value(Input), pointer to type T. +/// @param: alignment(Input), alignment value. +/// @return: bool. +template +static __forceinline bool IsMultipleOf(T* value, size_t alignment) { + return (AlignUp(value, alignment) == value); +} + +static __forceinline uint32_t NextPow2(uint32_t value) { + if (value == 0) return 1; + uint32_t v = value - 1; + v |= v >> 1; + v |= v >> 2; + v |= v >> 4; + v |= v >> 8; + v |= v >> 16; + return v + 1; +} + +static __forceinline uint64_t NextPow2(uint64_t value) { + if (value == 0) return 1; + uint64_t v = value - 1; + v |= v >> 1; + v |= v >> 2; + v |= v >> 4; + v |= v >> 8; + v |= v >> 16; + v |= v >> 32; + return v + 1; +} + +template +static __forceinline uint32_t BitSelect(T p) { + static_assert(sizeof(T) <= sizeof(uintptr_t), "Type out of range."); + static_assert(highBit < sizeof(uintptr_t)*8, "Bit index out of range."); + + uintptr_t ptr = p; + if(highBit != (sizeof(uintptr_t)*8-1)) + return (uint32_t)((ptr & ((1ull<<(highBit+1))-1)) >> lowBit); + else + return (uint32_t)(ptr >> lowBit); +} + +inline uint32_t PtrLow16Shift8(const void* p) { + uintptr_t ptr = reinterpret_cast(p); + return (uint32_t)((ptr & 0xFFFFULL) >> 8); +} + +inline uint32_t PtrHigh64Shift16(const void* p) { + uintptr_t ptr = reinterpret_cast(p); + return (uint32_t)((ptr & 0xFFFFFFFFFFFF0000ULL) >> 16); +} + +inline uint32_t PtrLow40Shift8(const void* p) { + uintptr_t ptr = reinterpret_cast(p); + return (uint32_t)((ptr & 0xFFFFFFFFFFULL) >> 8); +} + +inline uint32_t PtrHigh64Shift40(const void* p) { + uintptr_t ptr = reinterpret_cast(p); + return (uint32_t)((ptr & 0xFFFFFF0000000000ULL) >> 40); +} + +inline uint32_t PtrLow32(const void* p) { + return static_cast(reinterpret_cast(p)); +} + +inline uint32_t PtrHigh32(const void* p) { + uint32_t ptr = 0; +#ifdef HSA_LARGE_MODEL + ptr = static_cast(reinterpret_cast(p) >> 32); +#endif + return ptr; +} + +/** +* Generic functor compatible with the STL algorithms that enables proper +* destruction of a container of pointers. If (for instance), \c v is a vector +* of pointers to objects of type T, then the destructors of the elements in +* \c v are invoked when calling +* \code{std::for_each(v.begin(), v.end(), DeleteObject())} +* +* The original code and further information about this function object can be +* found in "Effective STL", 1st edition, item 7. +*/ +struct DeleteObject { + template + void operator()(const T *ptr) const { + delete ptr; + } +}; +} // namespace ext_image + +#endif // HSA_RUNTIME_EXT_IMAGE_UTIL_H