2.9.6-1
Add support for CUDA graphs.
Fuse BCM Gen4 switches to avoid suboptimal performance on some platforms. Issue #439.
Fix bootstrap issue caused by connection reordering.
Fix CPU locking block.
Improve CollNet algorithm.
Improve performance on DGX A100 for communicators with only one GPU per node.
[ROCm/rccl commit: a46ea10583]
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@@ -1,5 +1,5 @@
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/*************************************************************************
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* See LICENSE.txt for license information
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************************************************************************/
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@@ -280,8 +280,7 @@ ncclResult_t ncclTopoCheckP2p(struct ncclTopoSystem* system, int64_t id1, int64_
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NCCLCHECK(ncclTopoCpuType(system, &arch, &vendor, &model));
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if (arch == NCCL_TOPO_CPU_ARCH_ARM) p2pLevel = PATH_PXB;
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if (arch == NCCL_TOPO_CPU_ARCH_X86 && vendor == NCCL_TOPO_CPU_VENDOR_INTEL) {
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if (model == NCCL_TOPO_CPU_TYPE_BDW) p2pLevel = PATH_PXB;
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else p2pLevel = PATH_PHB;
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p2pLevel = PATH_PXB;
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}
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if (arch == NCCL_TOPO_CPU_ARCH_X86 && vendor == NCCL_TOPO_CPU_VENDOR_ZHAOXIN) {
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p2pLevel = PATH_PXB;
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