From 25922d08c3c84996fb147c4324cc18ce185e4130 Mon Sep 17 00:00:00 2001 From: MachineTom Date: Sun, 21 Sep 2025 19:25:28 -0400 Subject: [PATCH] SWDEV-539145 - Return error when ext_fine_grain_pool unavailable (#877) Return error when ext_fine_grain_pool is unavailable for hipHostMallocUncached, hipHostAllocUncached and hipExtHostRegisterUncached. Disable related tests on Navi4x where ext_fine_grain_pool is unavailable --- projects/clr/rocclr/device/rocm/rocdevice.cpp | 6 +---- .../catch/include/hip_test_common.hh | 22 +++++++++++++++++++ .../catch/unit/memory/hipHostAlloc.cc | 4 +++- .../catch/unit/memory/hipHostMalloc.cc | 4 +++- .../catch/unit/memory/hipHostRegister.cc | 19 ++++++++++------ projects/hip/include/hip/hip_runtime_api.h | 4 ++-- 6 files changed, 43 insertions(+), 16 deletions(-) diff --git a/projects/clr/rocclr/device/rocm/rocdevice.cpp b/projects/clr/rocclr/device/rocm/rocdevice.cpp index e7d1818f9e..a89ca721f6 100644 --- a/projects/clr/rocclr/device/rocm/rocdevice.cpp +++ b/projects/clr/rocclr/device/rocm/rocdevice.cpp @@ -1980,12 +1980,8 @@ hsa_amd_memory_pool_t Device::getHostMemoryPool(MemorySegment mem_seg, ClPrint(amd::LOG_DETAIL_DEBUG, amd::LOG_MEM, "Using extended fine grained access system memory pool"); segment = agentInfo->ext_fine_grain_pool; - } else { - ClPrint(amd::LOG_DETAIL_DEBUG, amd::LOG_MEM, - "Falling through on fine grained access system memory pool"); - segment = agentInfo->fine_grain_pool; + break; } - break; default: guarantee(false, "Invalid Memory Segment"); break; diff --git a/projects/hip-tests/catch/include/hip_test_common.hh b/projects/hip-tests/catch/include/hip_test_common.hh index 133cfe3cef..78fb6ec732 100644 --- a/projects/hip-tests/catch/include/hip_test_common.hh +++ b/projects/hip-tests/catch/include/hip_test_common.hh @@ -268,6 +268,28 @@ static inline bool IsGfx11() { #endif } +static inline bool IsNavi4X() { +#if HT_NVIDIA + return false; +#elif HT_AMD + int device = -1; + hipDeviceProp_t props{}; + HIP_CHECK(hipGetDevice(&device)); + HIP_CHECK(hipGetDeviceProperties(&props, device)); + std::string arch = std::string(props.gcnArchName); + if (arch.find("gfx1200") != std::string::npos || + arch.find("gfx1201") != std::string::npos) { + // gfx1200 = Navi44, gfx1201 = Navi48 + return true; + } else { + return false; + } +#else + std::cout << "Have to be either Nvidia or AMD platform, asserting" << std::endl; + assert(false); +#endif +} + // Utility Functions namespace HipTest { static inline int getDeviceCount() { diff --git a/projects/hip-tests/catch/unit/memory/hipHostAlloc.cc b/projects/hip-tests/catch/unit/memory/hipHostAlloc.cc index 81215d3322..893444db19 100644 --- a/projects/hip-tests/catch/unit/memory/hipHostAlloc.cc +++ b/projects/hip-tests/catch/unit/memory/hipHostAlloc.cc @@ -198,7 +198,9 @@ TEST_CASE("Unit_hipHostAlloc_Basic") { SECTION("hipHostAllocDefault") { flag = hipHostAllocDefault; } #if (HT_AMD == 1) && (HT_LINUX == 1) - SECTION("hipHostAllocUncached") { flag = hipHostAllocUncached; } + if (!IsNavi4X()) { + SECTION("hipHostAllocUncached") { flag = hipHostAllocUncached; } + } #endif HIP_CHECK(hipHostAlloc(reinterpret_cast(&B_h), SIZE, flag)); diff --git a/projects/hip-tests/catch/unit/memory/hipHostMalloc.cc b/projects/hip-tests/catch/unit/memory/hipHostMalloc.cc index c50ca67aa8..386e97e535 100644 --- a/projects/hip-tests/catch/unit/memory/hipHostMalloc.cc +++ b/projects/hip-tests/catch/unit/memory/hipHostMalloc.cc @@ -127,7 +127,9 @@ TEST_CASE("Unit_hipHostMalloc_Basic") { hipHostMallocWriteCombined | hipHostMallocMapped)); SECTION("hipHostMallocDefault") { flag = hipHostMallocDefault; } #if (HT_AMD == 1) && (HT_LINUX == 1) - SECTION("hipHostMallocUncached") { flag = hipHostMallocUncached; } + if (!IsNavi4X()) { + SECTION("hipHostMallocUncached") { flag = hipHostMallocUncached; } + } SECTION("hipHostMallocCoherent") { flag = hipHostMallocCoherent; } SECTION("hipHostMallocNonCoherent") { flag = hipHostMallocNonCoherent; } #endif diff --git a/projects/hip-tests/catch/unit/memory/hipHostRegister.cc b/projects/hip-tests/catch/unit/memory/hipHostRegister.cc index aa6dd03a52..33ef4a24ca 100644 --- a/projects/hip-tests/catch/unit/memory/hipHostRegister.cc +++ b/projects/hip-tests/catch/unit/memory/hipHostRegister.cc @@ -118,13 +118,15 @@ TEMPLATE_TEST_CASE("Unit_hipHostRegister_ReferenceFromKernelandhipMemset", "", i HIP_CHECK(hipHostRegister(A, sizeBytes, hipHostRegisterDefault)); } #if (HT_AMD == 1) && (HT_LINUX == 1) - SECTION("hipExtHostRegisterUncached") { - HIP_CHECK(hipHostRegister(A, sizeBytes, hipExtHostRegisterUncached)); - } - SECTION("hipHostRegisterPortable | hipHostRegisterMapped | hipExtHostRegisterUncached") { - HIP_CHECK(hipHostRegister( - A, sizeBytes, - hipHostRegisterPortable | hipHostRegisterMapped | hipExtHostRegisterUncached)); + if (!IsNavi4X()) { + SECTION("hipExtHostRegisterUncached") { + HIP_CHECK(hipHostRegister(A, sizeBytes, hipExtHostRegisterUncached)); + } + SECTION("hipHostRegisterPortable | hipHostRegisterMapped | hipExtHostRegisterUncached") { + HIP_CHECK(hipHostRegister( + A, sizeBytes, + hipHostRegisterPortable | hipHostRegisterMapped | hipExtHostRegisterUncached)); + } } #endif for (int i = 0; i < LEN; i++) { @@ -928,6 +930,9 @@ TEMPLATE_TEST_CASE("Unit_hipHostRegister_Flags", "", int, float, double) { #endif FlagType{0xF0, false}, FlagType{0xFFF2, false}, FlagType{0xFFFFFFFF, false}); + if (IsNavi4X() && (flags.value & hipExtHostRegisterUncached)) { + return; + } INFO("Testing hipHostRegister flag: " << flags.value); if (flags.valid) { HIP_CHECK(hipHostRegister(hostPtr, sizeBytes, flags.value)); diff --git a/projects/hip/include/hip/hip_runtime_api.h b/projects/hip/include/hip/hip_runtime_api.h index cb2fb3978a..d6ac3fc6d3 100644 --- a/projects/hip/include/hip/hip_runtime_api.h +++ b/projects/hip/include/hip/hip_runtime_api.h @@ -848,7 +848,7 @@ enum hipLimit_t { /** * Host memory will be forcedly allocated on extended fine grained system memory * pool which is with MTYPE_UC. - * @note This allocation flag is applicable on AMD devices in Linux only. + * @note This allocation flag is applicable on AMD devices, except for Navi4X, in Linux only. */ #define hipHostMallocUncached 0x10000000 #define hipHostAllocUncached hipHostMallocUncached @@ -909,7 +909,7 @@ enum hipLimit_t { #define hipExtHostRegisterCoarseGrained 0x8 /** Map host memory onto extended fine grained access host memory pool when enabled. - * It is applicable on AMD devices in Linux only + * It is applicable on AMD devices, except for Navi4X, in Linux only. */ #define hipExtHostRegisterUncached 0x80000000