Unified API
amdsmi_get_link_metrics() and amdsmi_get_pcie_info()
Change-Id: Iea060e449813b842236243b772e8809497ce98fe
[ROCm/amdsmi commit: 0b67c2ccc4]
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Maisam Arif
ebeveyn
a8b48ff1e5
işleme
25ffbb0304
@@ -919,6 +919,29 @@ amdsmi_status_t
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return amd::smi::rsmi_to_amdsmi_status(rstatus);
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}
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amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle,
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amdsmi_link_metrics_t *link_metrics) {
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AMDSMI_CHECK_INIT();
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if (link_metrics == nullptr) return AMDSMI_STATUS_INVAL;
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amdsmi_gpu_metrics_t metric_info = {};
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amdsmi_status_t status = amdsmi_get_gpu_metrics_info(
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processor_handle, &metric_info);
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if (status != AMDSMI_STATUS_SUCCESS)
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return status;
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link_metrics->num_links = AMDSMI_MAX_NUM_XGMI_LINKS;
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for (unsigned int i = 0; i < link_metrics->num_links; i++) {
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link_metrics->links[i].read = metric_info.xgmi_read_data_acc[i];
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link_metrics->links[i].write = metric_info.xgmi_write_data_acc[i];
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link_metrics->links[i].bit_rate = metric_info.xgmi_link_speed;
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link_metrics->links[i].max_bandwidth = metric_info.xgmi_link_width;
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link_metrics->links[i].link_type = AMDSMI_LINK_TYPE_XGMI;
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}
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return AMDSMI_STATUS_SUCCESS;
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}
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amdsmi_status_t
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amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst,
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uint64_t *hops, amdsmi_io_link_type_t *type) {
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@@ -1939,65 +1962,7 @@ amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned in
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return status;
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}
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amdsmi_status_t
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amdsmi_get_pcie_link_status(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info){
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AMDSMI_CHECK_INIT();
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if (info == nullptr) {
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return AMDSMI_STATUS_INVAL;
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}
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amdsmi_status_t status = AMDSMI_STATUS_SUCCESS;
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amdsmi_gpu_metrics_t metric_info = {};
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status = amdsmi_get_gpu_metrics_info(
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processor_handle, &metric_info);
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if (status != AMDSMI_STATUS_SUCCESS)
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return status;
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info->pcie_lanes = metric_info.pcie_link_width;
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// gpu metrics is inconsistent with pcie_speed values, if 0-6 then it needs to be translated
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if (metric_info.pcie_link_speed <= 6) {
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status = smi_amdgpu_get_pcie_speed_from_pcie_type(metric_info.pcie_link_speed, &info->pcie_speed); // mapping to MT/s
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} else {
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// gpu metrics returns pcie link speed in .1 GT/s ex. 160 vs 16
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info->pcie_speed = metric_info.pcie_link_speed * 100;
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}
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switch (info->pcie_speed) {
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case 2500:
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info->pcie_interface_version = 1;
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break;
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case 5000:
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info->pcie_interface_version = 2;
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break;
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case 8000:
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info->pcie_interface_version = 3;
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break;
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case 16000:
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info->pcie_interface_version = 4;
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break;
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case 32000:
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info->pcie_interface_version = 5;
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break;
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case 64000:
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info->pcie_interface_version = 6;
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break;
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default:
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info->pcie_interface_version = 0;
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}
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// default to PCIe
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info->pcie_slot_type = AMDSMI_SLOT_TYPE__PCIE;
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rsmi_pcie_slot_type_t slot_type;
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status = rsmi_wrapper(rsmi_dev_pcie_slot_type_get,
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processor_handle, &slot_type);
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if (status == AMDSMI_STATUS_SUCCESS) {
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info->pcie_slot_type = static_cast<amdsmi_pcie_slot_type_t>(slot_type);
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}
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return AMDSMI_STATUS_SUCCESS;
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}
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amdsmi_status_t amdsmi_get_pcie_link_caps(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info) {
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amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info) {
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AMDSMI_CHECK_INIT();
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if (info == nullptr) {
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@@ -2029,7 +1994,7 @@ amdsmi_status_t amdsmi_get_pcie_link_caps(amdsmi_processor_handle processor_hand
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printf("Failed to open file: %s \n", path_max_link_width.c_str());
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return AMDSMI_STATUS_API_FAILED;
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}
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info->pcie_lanes = (uint16_t)pcie_width;
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info->pcie_static.max_pcie_lanes = (uint16_t)pcie_width;
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std::string path_max_link_speed = "/sys/class/drm/" +
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gpu_device->get_gpu_path() + "/device/max_link_speed";
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@@ -2043,38 +2008,63 @@ amdsmi_status_t amdsmi_get_pcie_link_caps(amdsmi_processor_handle processor_hand
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}
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// pcie speed in sysfs returns in GT/s
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info->pcie_speed = pcie_speed * 1000;
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info->pcie_static.max_pcie_speed = pcie_speed * 1000;
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switch (info->pcie_speed) {
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switch (info->pcie_static.max_pcie_speed) {
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case 2500:
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info->pcie_interface_version = 1;
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info->pcie_static.pcie_interface_version = 1;
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break;
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case 5000:
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info->pcie_interface_version = 2;
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info->pcie_static.pcie_interface_version = 2;
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break;
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case 8000:
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info->pcie_interface_version = 3;
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info->pcie_static.pcie_interface_version = 3;
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break;
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case 16000:
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info->pcie_interface_version = 4;
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info->pcie_static.pcie_interface_version = 4;
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break;
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case 32000:
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info->pcie_interface_version = 5;
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info->pcie_static.pcie_interface_version = 5;
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break;
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case 64000:
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info->pcie_interface_version = 6;
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info->pcie_static.pcie_interface_version = 6;
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break;
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default:
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info->pcie_interface_version = 0;
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info->pcie_static.pcie_interface_version = 0;
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}
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// default to PCIe
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info->pcie_slot_type = AMDSMI_SLOT_TYPE__PCIE;
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info->pcie_static.slot_type = AMDSMI_CARD_FORM_FACTOR_PCIE;
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rsmi_pcie_slot_type_t slot_type;
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status = rsmi_wrapper(rsmi_dev_pcie_slot_type_get,
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processor_handle, &slot_type);
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if (status == AMDSMI_STATUS_SUCCESS) {
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info->pcie_slot_type = static_cast<amdsmi_pcie_slot_type_t>(slot_type);
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switch (slot_type) {
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case RSMI_PCIE_SLOT_OAM:
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info->pcie_static.slot_type = AMDSMI_CARD_FORM_FACTOR_OAM;
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break;
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case RSMI_PCIE_SLOT_PCIE:
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info->pcie_static.slot_type = AMDSMI_CARD_FORM_FACTOR_PCIE;
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break;
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default:
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info->pcie_static.slot_type = AMDSMI_CARD_FORM_FACTOR_UNKNOWN;
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}
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}
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// metrics
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amdsmi_gpu_metrics_t metric_info = {};
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status = amdsmi_get_gpu_metrics_info(
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processor_handle, &metric_info);
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if (status != AMDSMI_STATUS_SUCCESS)
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return status;
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info->pcie_metric.pcie_lanes = metric_info.pcie_link_width;
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// gpu metrics is inconsistent with pcie_speed values, if 0-6 then it needs to be translated
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if (metric_info.pcie_link_speed <= 6) {
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status = smi_amdgpu_get_pcie_speed_from_pcie_type(metric_info.pcie_link_speed, &info->pcie_metric.pcie_speed); // mapping to MT/s
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} else {
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// gpu metrics returns pcie link speed in .1 GT/s ex. 160 vs 16
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info->pcie_metric.pcie_speed = metric_info.pcie_link_speed * 100;
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}
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return AMDSMI_STATUS_SUCCESS;
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