Sync staging with mainline (#524)
* External CI: rename pipeline to rocprofiler-compute (#463) Signed-off-by: Daniel Su <danielsu@amd.com> * Update webui branding (#459) * Update name and icon for browser tab to rocprofiler-compute. Signed-off-by: xuchen-amd <xuchen@amd.com> * Update name and icon for browser tab to rocprofiler-compute. Signed-off-by: xuchen-amd <xuchen@amd.com> --------- Signed-off-by: xuchen-amd <xuchen@amd.com> * Update branding in documentation (#442) * find/replace Omniperf to ROCm Compute Profiler Signed-off-by: Peter Park <peter.park@amd.com> * update name in Sphinx conf Signed-off-by: Peter Park <peter.park@amd.com> * mv what-is-omniperf.rst -> what-is-rocprof-compute.rst Signed-off-by: Peter Park <peter.park@amd.com> * update Tutorials section Signed-off-by: Peter Park <peter.park@amd.com> * add Omniperf as keyword to Conceptual section for internal search Signed-off-by: Peter Park <peter.park@amd.com> * update Reference section Signed-off-by: Peter Park <peter.park@amd.com> * black fmt conf.py Signed-off-by: Peter Park <peter.park@amd.com> * update profile mode and basic usage subsections Signed-off-by: Peter Park <peter.park@amd.com> * update how to use analyze mode subsection Signed-off-by: Peter Park <peter.park@amd.com> * update install section Signed-off-by: Peter Park <peter.park@amd.com> * fix sphinx warnings Signed-off-by: Peter Park <peter.park@amd.com> * fix cmd line examples in profile/mode.rst Signed-off-by: Peter Park <peter.park@amd.com> * update install decision tree image Signed-off-by: Peter Park <peter.park@amd.com> * fix TOC and index Signed-off-by: Peter Park <peter.park@amd.com> fix weird wording * fix cli text: deriving rocprofiler-compute metrics... Signed-off-by: Peter Park <peter.park@amd.com> * update standalone-gui.rst Signed-off-by: Peter Park <peter.park@amd.com> * restore removed doc updates from #428 Signed-off-by: Peter Park <peter.park@amd.com> * update ref to Omniperf in index.rst Signed-off-by: Peter Park <peter.park@amd.com> * fix grafana connection name to match image Signed-off-by: Peter Park <peter.park@amd.com> * update cmds in tutorials Signed-off-by: Peter Park <peter.park@amd.com> --------- Signed-off-by: Peter Park <peter.park@amd.com> * MI300 roofline enablement in rocprofiler-compute (#470) * MI300 roofline enablement in rocprofiler-compute requirements.txt - running some modules complained about numpy version too new, adding extra requirement that numpy be 1.x pmc_roof_perf.txt - adding TCC_BUBBLE_sum counter to profile soc_gfx940.py soc_gfx941.py soc_gfx942.py - remove console logs reading that roofline is temporarily disabled, uncommenting blocks that check for roofline csv and run roofline post-processing roofline_calc.py - add mi300 to supported soc - add new calculation for hbm_data for MI300 using tcc_bubble_sum, checks if counter > 0 to use - add to a few comments roofline-ubuntu-20_04-mi300-rocm6 - binary for the ubuntu systems to enable mi300 roofline calculations from rocm-amdgpu-bench Note- other distros will get roofline bins to enable mi300, but need to be further tested before putting into branch. Signed-off-by: Carrie Fallows <carrie.fallows@amd.com> * Reformatting roofline_calc.py Signed-off-by: Carrie Fallows <carrie.fallows@amd.com> --------- Signed-off-by: Carrie Fallows <carrie.fallows@amd.com> * Update Python format checker (#471) * Add pre commit hook for Python formatting Signed-off-by: coleramos425 <colramos@amd.com> * Update formatting workflow to run on latest Python and add isort formatter Signed-off-by: coleramos425 <colramos@amd.com> * Fix caught yaml formatting issues * Update pyproject file * Add pre-commit hook instruction to CONTRIBUTING guide * Remove target-version from black pyproject.toml * Fixed formatting errors found with black and isort Signed-off-by: David Galiffi <David.Galiffi@amd.com> * Run hook: Whitespaces, fix end of file spaces --------- Signed-off-by: coleramos425 <colramos@amd.com> Signed-off-by: David Galiffi <David.Galiffi@amd.com> Co-authored-by: David Galiffi <David.Galiffi@amd.com> * Bump cryptography from 43.0.0 to 43.0.1 in /docs/sphinx (#473) Bumps [cryptography](https://github.com/pyca/cryptography) from 43.0.0 to 43.0.1. - [Changelog](https://github.com/pyca/cryptography/blob/main/CHANGELOG.rst) - [Commits](https://github.com/pyca/cryptography/compare/43.0.0...43.0.1) --- updated-dependencies: - dependency-name: cryptography dependency-type: indirect ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> * Fix file permission on MI300 roofline binary (#477) Signed-off-by: David Galiffi <David.Galiffi@amd.com> * Removing numpy requirements of <2 (#478) Checks are failing if version too high and no need for lower version Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> * Fix crash when loading web UI roofline for gfx942 (#479) * Fix crash when loading web UI roofline for gfx942 * Fix formatting Signed-off-by: benrichard-amd <ben.richard@amd.com> * Make same changs for gfx940, gfx942. Signed-off-by: benrichard-amd <ben.richard@amd.com> * Fix formatting in soc_gfx940 and soc_gfx941. Signed-off-by: benrichard-amd <ben.richard@amd.com> --------- Signed-off-by: benrichard-amd <ben.richard@amd.com> * Rebranding name change patch (#469) * Patch in missed name change for rebranding. Signed-off-by: xuchen-amd <xuchen@amd.com> * Patch in missed name change for rebranding. Signed-off-by: xuchen-amd <xuchen@amd.com> --------- Signed-off-by: xuchen-amd <xuchen@amd.com> * Move dependabot.yml to .github/ and bump rocm-docs-core (#481) * Move dependabot.yml to .github/ * Bump rocm-docs-core to 1.8.5 * Bump rocm-docs-core to 1.9.0 * Fix packaging for upgrading (#486) Specify that "rocprofiler-compute" replaces / obsoletes the "omniperf" package. * Renamed extension path from omniperf to rocprofiler_compute (#487) Signed-off-by: Tim Gu <Tim.Gu@amd.com> * MI300 rhel and sles roofline binaries (#480) * Roofline bins for MI300 on rhel and sles distributions Built from rocm-amdgpu-bench, tested on respective distro systems with MI300 hardware. Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> * Minor modifications removing hardcoded variables in roofline files. Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> --------- Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> * Modify test_profile_general.py ctest to include MI300 enablement (#498) Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> * part 1 to support rocprofv3 (#492) * rocprofv3 support initial commit -Can run rocprofv3 but ultimately fails. rocprofv3 says the counter capacity is exceeded and the output CSV file format is different from v1/v2. * Add rocprofv3 detection so v2 can still be used It's hacky but it'll do for now. * Add code path to convert rocprofv3 JSON output into CSV * Grab correct value for Queue ID * Use _sum suffix to sum TCC counters Previously we were specifying each channel for TCC counters. rocprofv3 does not support specifing each TCC channel, and instead will auto sum given the TCC counter name. The counter name with the _sum suffix is also supported and is also supported in v1 and v2. So we will use the TCC counter name with the _sum suffix. * Fix incorrect counter outputs when using rocprofv3 In the JSON output some counters appear multime times and must be summed to get the correct value. These summed values match the rocprofv3 output in CSV mode and also match the rocprofv2 output. * Remove duplicate Correlation_ID and Wave_Size in output * Handle json output that does not contain any dispatches Omniperf was assuming each JSON output from rocprofv3 would always contain dispatches. This is not the case. For example, in a multi-process workload where one of the processes does not dispatch any kernels. A JSON file will still be output for this process but it will not contain any dispatches. * Code cleanup * Update search path for rocprofv3 results Rocprofv3 was updated to include the hostname in the path where it outputs results. * Handle accumulate counters In v1/v2 rocprof uses the SQ_ACCUM_PREV_HIRES counter for the accumualte counters. v3 does not have this. So we need to define our own counters in counter_defs.yaml. For this we use the counter name + _ACCUM, for example SQ_INSTR_LEVEL_SMEM_ACCUM. To use rocprofv3 you will need to update counter_defs.yaml to include these new counter definitions. * Use correct GPU ID When converting JSON -> CSV we were assigning node_id to GPU_ID. Since the JSON contains non-GPU devices, the node_id for GPUs might not start at 0 as expected. This commit maps the agent ID to the appropriate GPU ID. * Parse scratch memory per work item from JSON * Support rocprofv3 CSV parsing JSON decoding is very slow for large files. Include support for parsing rocprofv3 CSV output and make that the default. CSV/JSON can be toggled via the ROCPROF_OUTPUT_FORMAT environment variable e.g. ROCPROF_OUTPUT_FORMAT=csv or ROCPROF_OUTPUT_FORMAT=json * black format after merge * format isort * change return of rocprof_cmd to try to resolve test's error * hack to pick last part of rocminfo's name * debug log of hacks * Modify test_profile_general.py ctest to include MI300 enablement. Currently failing because of explicitly excluded roofline files for the soc and autofailed asserts for roof-only tests- originally in place because roofline was not enabled on mi300 yet. Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> * black and isort formated * corrected line of copyright --------- Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> Co-authored-by: benrichard-amd <ben.richard@amd.com> Co-authored-by: YANG WANG <ywang@ywang-ubuntu.amd.com> Co-authored-by: Carrie Fallows <Carrie.Fallows@amd.com> * fix for crash of timestamp of part 1 for rocprofv3 (#499) * fix the error caused by ignoring the lack of counter csv file from rocprofv3 for timestamp * isort and black formated * quick fix for gfx906 roofline (#505) * Multi node support (#503) * [CTest] Pipeline failures for MI300 (#483) * Propagate new chip_id logic to testing workflow Signed-off-by: coleramos425 <colramos@amd.com> * Add a debug line to tests Signed-off-by: coleramos425 <colramos@amd.com> * Trying to set rocprofv2 generally in CTest module Signed-off-by: coleramos425 <colramos@amd.com> * Remove temp debugging lines from CI Signed-off-by: coleramos425 <colramos@amd.com> * Add roofline entry for MI300 expected files in CI tests Signed-off-by: coleramos425 <colramos@amd.com> * Make num_devices modifier global in scope Signed-off-by: coleramos425 <colramos@amd.com> * Change kernel name in PyTest to confirm rocprofv2 bug Related to https://ontrack-internal.amd.com/browse/SWDEV-503453 Signed-off-by: coleramos425 <colramos@amd.com> --------- Signed-off-by: coleramos425 <colramos@amd.com> * Spatial-multiplexing: part 1 profiling stage (#465) * rocprofv3 support initial commit -Can run rocprofv3 but ultimately fails. rocprofv3 says the counter capacity is exceeded and the output CSV file format is different from v1/v2. * Add rocprofv3 detection so v2 can still be used It's hacky but it'll do for now. * Add code path to convert rocprofv3 JSON output into CSV * Grab correct value for Queue ID * Use _sum suffix to sum TCC counters Previously we were specifying each channel for TCC counters. rocprofv3 does not support specifing each TCC channel, and instead will auto sum given the TCC counter name. The counter name with the _sum suffix is also supported and is also supported in v1 and v2. So we will use the TCC counter name with the _sum suffix. * Fix incorrect counter outputs when using rocprofv3 In the JSON output some counters appear multime times and must be summed to get the correct value. These summed values match the rocprofv3 output in CSV mode and also match the rocprofv2 output. * Remove duplicate Correlation_ID and Wave_Size in output * Handle json output that does not contain any dispatches Omniperf was assuming each JSON output from rocprofv3 would always contain dispatches. This is not the case. For example, in a multi-process workload where one of the processes does not dispatch any kernels. A JSON file will still be output for this process but it will not contain any dispatches. * Code cleanup * Update search path for rocprofv3 results Rocprofv3 was updated to include the hostname in the path where it outputs results. * Handle accumulate counters In v1/v2 rocprof uses the SQ_ACCUM_PREV_HIRES counter for the accumualte counters. v3 does not have this. So we need to define our own counters in counter_defs.yaml. For this we use the counter name + _ACCUM, for example SQ_INSTR_LEVEL_SMEM_ACCUM. To use rocprofv3 you will need to update counter_defs.yaml to include these new counter definitions. * debug code * add logic code for multiplexing * minor fix * more fixes * rocprofv3 support initial commit -Can run rocprofv3 but ultimately fails. rocprofv3 says the counter capacity is exceeded and the output CSV file format is different from v1/v2. * Add rocprofv3 detection so v2 can still be used It's hacky but it'll do for now. * Add code path to convert rocprofv3 JSON output into CSV * Grab correct value for Queue ID * Use _sum suffix to sum TCC counters Previously we were specifying each channel for TCC counters. rocprofv3 does not support specifing each TCC channel, and instead will auto sum given the TCC counter name. The counter name with the _sum suffix is also supported and is also supported in v1 and v2. So we will use the TCC counter name with the _sum suffix. * Fix incorrect counter outputs when using rocprofv3 In the JSON output some counters appear multime times and must be summed to get the correct value. These summed values match the rocprofv3 output in CSV mode and also match the rocprofv2 output. * Remove duplicate Correlation_ID and Wave_Size in output * Handle json output that does not contain any dispatches Omniperf was assuming each JSON output from rocprofv3 would always contain dispatches. This is not the case. For example, in a multi-process workload where one of the processes does not dispatch any kernels. A JSON file will still be output for this process but it will not contain any dispatches. * Code cleanup * Update search path for rocprofv3 results Rocprofv3 was updated to include the hostname in the path where it outputs results. * Handle accumulate counters In v1/v2 rocprof uses the SQ_ACCUM_PREV_HIRES counter for the accumualte counters. v3 does not have this. So we need to define our own counters in counter_defs.yaml. For this we use the counter name + _ACCUM, for example SQ_INSTR_LEVEL_SMEM_ACCUM. To use rocprofv3 you will need to update counter_defs.yaml to include these new counter definitions. * count accu files as well * Use correct GPU ID When converting JSON -> CSV we were assigning node_id to GPU_ID. Since the JSON contains non-GPU devices, the node_id for GPUs might not start at 0 as expected. This commit maps the agent ID to the appropriate GPU ID. * fix error with csv file parse from json and merge during post-processing * implemented parsing of csv files from v3 output for optimization * Parse scratch memory per work item from JSON * Support rocprofv3 CSV parsing JSON decoding is very slow for large files. Include support for parsing rocprofv3 CSV output and make that the default. CSV/JSON can be toggled via the ROCPROF_OUTPUT_FORMAT environment variable e.g. ROCPROF_OUTPUT_FORMAT=csv or ROCPROF_OUTPUT_FORMAT=json * black format after merge * format isort * change return of rocprof_cmd to try to resolve test's error * hack to pick last part of rocminfo's name * debug log of hacks * Modify test_profile_general.py ctest to include MI300 enablement. Currently failing because of explicitly excluded roofline files for the soc and autofailed asserts for roof-only tests- originally in place because roofline was not enabled on mi300 yet. Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> * black and isort formated * formated by isort and black * change default rocprof's output to csv * repaired crash caused by missing csv counter file when running for timestamp * change name to spatial-multiplexing from multiplexing * make necessary modification for review * set the value of spatial_multiplexing in argument defautly to None * repair the part that blocks regular pmc files' generation --------- Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> Co-authored-by: benrichard-amd <ben.richard@amd.com> Co-authored-by: fei.zheng <fei.zheng@amd.com> Co-authored-by: YANG WANG <ywang@ywang-ubuntu.amd.com> Co-authored-by: Carrie Fallows <Carrie.Fallows@amd.com> * Simple fix for gpu model value. (#508) Signed-off-by: xuchen-amd <xuchen@amd.com> * Add FP64 to plot adhering to pdf name (#507) * Replacing FP32-only plot with an FP32&FP64 combo plot. Results will likely be negligible but the plot name indicates both should be graphed. Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> * Remove duplicate AI plot to clean up fp32 fp64 graph Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> --------- Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> * Add gpu series for roofline (#510) * Add gpu_series for roofline. * Use gpu_series in path names for roofline. * Fix TCC on MI200 when introduce rocprofv3 (#509) * quick fix for v2 * one more fix * revert a bit --------- Co-authored-by: ywang103-amd <ywang103@amd.com> * Bump rocm-docs-core from 1.9.0 to 1.12.0 in /docs/sphinx (#511) Bumps [rocm-docs-core](https://github.com/ROCm/rocm-docs-core) from 1.9.0 to 1.12.0. - [Release notes](https://github.com/ROCm/rocm-docs-core/releases) - [Changelog](https://github.com/ROCm/rocm-docs-core/blob/develop/CHANGELOG.md) - [Commits](https://github.com/ROCm/rocm-docs-core/compare/v1.9.0...v1.12.0) --- updated-dependencies: - dependency-name: rocm-docs-core dependency-type: direct:production update-type: version-update:semver-minor ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> * Update sample roofline plot img (#516) * Modify path to use gpu_model instead of gpu_series to match other workload directory path creation/search points. Affects manual testing, does not seem to affect ctests. (#513) Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> * Improve formatting when displaying rocprof command. (#476) * Improve formatting when displaying rocprof command. Signed-off-by: xuchen-amd <xuchen@amd.com> * Fix python formatting. Signed-off-by: xuchen-amd <xuchen@amd.com> * Strip unwanted characters (rocprofv1 specific) from rocprof commands. Signed-off-by: xuchen-amd <xuchen@amd.com> * Strip unwanted characters (rocprofv1 specific) from rocprof commands. Signed-off-by: xuchen-amd <xuchen@amd.com> * Save the unmodified arguments for rocprof for debug message display. Signed-off-by: xuchen-amd <xuchen@amd.com> --------- Signed-off-by: xuchen-amd <xuchen@amd.com> * quick fix for mpi_support (#518) * Pass accumulate counters to rocprofv3 using -E option (#522) rocprofv3 has a new -E option where extra counters can be passed (see accum_counters.yaml) instead of defining them in counter_defs.yaml. * Unify all file handling with pathlib (#512) * Replace occurences of os.path functions with equivalent functions from pathlib library * Remove unwanted imports of os.path and os * Add coding guidelines for using pathlib instead of os.path * Auto sync staging and mainline on a weekly cadence (#517) Signed-off-by: coleramos425 <colramos@amd.com> --------- Signed-off-by: Daniel Su <danielsu@amd.com> Signed-off-by: xuchen-amd <xuchen@amd.com> Signed-off-by: Peter Park <peter.park@amd.com> Signed-off-by: Carrie Fallows <carrie.fallows@amd.com> Signed-off-by: coleramos425 <colramos@amd.com> Signed-off-by: David Galiffi <David.Galiffi@amd.com> Signed-off-by: dependabot[bot] <support@github.com> Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com> Signed-off-by: benrichard-amd <ben.richard@amd.com> Signed-off-by: Tim Gu <Tim.Gu@amd.com> Co-authored-by: Daniel Su <danielsu@amd.com> Co-authored-by: xuchen-amd <xuchen@amd.com> Co-authored-by: Peter Park <peter.park@amd.com> Co-authored-by: cfallows-amd <Carrie.Fallows@amd.com> Co-authored-by: David Galiffi <David.Galiffi@amd.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> Co-authored-by: Ben Richard <143630488+benrichard-amd@users.noreply.github.com> Co-authored-by: Tim Gu <Tim.Gu@amd.com> Co-authored-by: ywang103-amd <ywang103@amd.com> Co-authored-by: benrichard-amd <ben.richard@amd.com> Co-authored-by: YANG WANG <ywang@ywang-ubuntu.amd.com> Co-authored-by: Fei Zheng <44449748+feizheng10@users.noreply.github.com> Co-authored-by: fei.zheng <fei.zheng@amd.com> Co-authored-by: vedithal-amd <Vignesh.Edithal@amd.com>
This commit is contained in:
Cole Ramos
GitHub
+21
-21
@@ -67,13 +67,13 @@ Panel Config:
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unit: CUs
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peak: $cu_per_gpu
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pop: ((100 * $numActiveCUs) / $cu_per_gpu)
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tips:
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tips:
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SALU Utilization:
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value: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
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unit: pct
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peak: 100
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pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
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tips:
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tips:
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VALU Utilization:
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value: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
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unit: pct
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@@ -91,26 +91,26 @@ Panel Config:
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unit: pct
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peak: 100
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pop: None # No HW module
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tips:
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tips:
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Branch Utilization:
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value: None # No HW module
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unit: pct
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peak: 100
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pop: None # No HW module
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tips:
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tips:
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VALU Active Threads:
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value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
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!= 0) else None))
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unit: Threads
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peak: $wave_size
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pop: (100 * AVG((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU / $wave_size) if (SQ_ACTIVE_INST_VALU != 0) else None))
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tips:
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tips:
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IPC:
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value: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))
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unit: Instr/cycle
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peak: 5
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pop: ((100 * AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))) / 5)
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tips:
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tips:
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Wavefront Occupancy:
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value: AVG((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
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unit: Wavefronts
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@@ -118,7 +118,7 @@ Panel Config:
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pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD) / ($max_waves_per_cu
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* $cu_per_gpu))))
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coll_level: SQ_LEVEL_WAVES
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tips:
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tips:
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Theoretical LDS Bandwidth:
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value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
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/ (End_Timestamp - Start_Timestamp)))
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@@ -126,7 +126,7 @@ Panel Config:
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peak: (($max_sclk * $cu_per_gpu) * 0.128)
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pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
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/ (End_Timestamp - Start_Timestamp)) / (($max_sclk * $cu_per_gpu) * 0.00128)))
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tips:
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tips:
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LDS Bank Conflicts/Access:
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value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
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if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
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@@ -134,7 +134,7 @@ Panel Config:
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peak: 32
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pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
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if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32)
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tips:
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tips:
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vL1D Cache Hit Rate:
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value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum)
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+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
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@@ -146,14 +146,14 @@ Panel Config:
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TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) /
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TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
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None))
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tips:
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tips:
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vL1D Cache BW:
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value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (End_Timestamp - Start_Timestamp)))
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unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $cu_per_gpu)
|
||||
pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 64) * $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
@@ -161,14 +161,14 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache BW:
|
||||
value: AVG(((TCC_REQ_sum * 64) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * TO_INT($total_l2_chan))
|
||||
pop: ((100 * AVG(((TCC_REQ_sum * 64) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 64) * TO_INT($total_l2_chan)))
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read BW:
|
||||
value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -176,7 +176,7 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write BW:
|
||||
value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -184,21 +184,21 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read Latency:
|
||||
value: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write Latency:
|
||||
value: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache Hit Rate:
|
||||
value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
@@ -206,27 +206,27 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache BW:
|
||||
value: AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Hit Rate:
|
||||
value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
tips:
|
||||
tips:
|
||||
L1I BW:
|
||||
value: AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 32))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 32))) / ((($max_sclk
|
||||
/ 1000) * 32) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Fetch Latency:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
unit: Cycles
|
||||
|
||||
@@ -311,4 +311,4 @@ Panel Config:
|
||||
tips:
|
||||
|
||||
comparable: false # for now
|
||||
cli_style: mem_chart
|
||||
cli_style: mem_chart
|
||||
|
||||
@@ -27,7 +27,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE))
|
||||
if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF Stall:
|
||||
avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -36,7 +36,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Utilization:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
@@ -45,7 +45,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Stall:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
@@ -54,7 +54,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPF_CMP_UTCL1_STALL_ON_TRANSLATION) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -84,7 +84,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE))
|
||||
if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Stall Rate:
|
||||
avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -93,19 +93,19 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Packet Decoding Utilization:
|
||||
avg: AVG((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-Workgroup Manager Utilization:
|
||||
avg: AVG((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-L2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
@@ -114,7 +114,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -123,7 +123,7 @@ Panel Config:
|
||||
max: MAX(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
@@ -132,4 +132,4 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+19
-19
@@ -24,43 +24,43 @@ Panel Config:
|
||||
min: MIN(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
max: MAX(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Utilization:
|
||||
avg: AVG(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
min: MIN(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
max: MAX(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup Manager Utilization:
|
||||
avg: AVG(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
min: MIN(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
max: MAX(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Shader Engine Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
SIMD Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Workgroups:
|
||||
avg: AVG(SPI_CSN_NUM_THREADGROUPS)
|
||||
min: MIN(SPI_CSN_NUM_THREADGROUPS)
|
||||
max: MAX(SPI_CSN_NUM_THREADGROUPS)
|
||||
unit: Workgroups
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Wavefronts:
|
||||
avg: AVG(SPI_CSN_WAVE)
|
||||
min: MIN(SPI_CSN_WAVE)
|
||||
max: MAX(SPI_CSN_WAVE)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
VGPR Writes:
|
||||
avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -69,7 +69,7 @@ Panel Config:
|
||||
max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
unit: Cycles/wave
|
||||
tips:
|
||||
tips:
|
||||
SGPR Writes:
|
||||
avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -98,7 +98,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Not-scheduled Rate (Scheduler-Pipe):
|
||||
avg: AVG((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
@@ -107,7 +107,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Stall Rate:
|
||||
avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
@@ -116,52 +116,52 @@ Panel Config:
|
||||
max: MAX((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scratch Stall Rate:
|
||||
avg: AVG((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
min: MIN((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
max: MAX((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD Waveslots:
|
||||
avg: AVG(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD VGPRs:
|
||||
avg: AVG(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD SGPRs:
|
||||
avg: AVG(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU LDS:
|
||||
avg: AVG(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU Barriers:
|
||||
avg: AVG(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Workgroup Limit:
|
||||
avg: AVG(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Wavefront Limit:
|
||||
avg: AVG(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -24,55 +24,55 @@ Panel Config:
|
||||
min: MIN(Grid_Size)
|
||||
max: MAX(Grid_Size)
|
||||
unit: Work Items
|
||||
tips:
|
||||
tips:
|
||||
Workgroup Size:
|
||||
avg: AVG(Workgroup_Size)
|
||||
min: MIN(Workgroup_Size)
|
||||
max: MAX(Workgroup_Size)
|
||||
unit: Work Items
|
||||
tips:
|
||||
tips:
|
||||
Total Wavefronts:
|
||||
avg: AVG(SPI_CSN_WAVE)
|
||||
min: MIN(SPI_CSN_WAVE)
|
||||
max: MAX(SPI_CSN_WAVE)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
Saved Wavefronts:
|
||||
avg: AVG(SQ_WAVES_SAVED)
|
||||
min: MIN(SQ_WAVES_SAVED)
|
||||
max: MAX(SQ_WAVES_SAVED)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
Restored Wavefronts:
|
||||
avg: AVG(SQ_WAVES_RESTORED)
|
||||
min: MIN(SQ_WAVES_RESTORED)
|
||||
max: MAX(SQ_WAVES_RESTORED)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
VGPRs:
|
||||
avg: AVG(Arch_VGPR)
|
||||
min: MIN(Arch_VGPR)
|
||||
max: MAX(Arch_VGPR)
|
||||
unit: Registers
|
||||
tips:
|
||||
tips:
|
||||
AGPRs:
|
||||
avg: AVG(Accum_VGPR)
|
||||
min: MIN(Accum_VGPR)
|
||||
max: MAX(Accum_VGPR)
|
||||
unit: Registers
|
||||
tips:
|
||||
tips:
|
||||
SGPRs:
|
||||
avg: AVG(SGPR)
|
||||
min: MIN(SGPR)
|
||||
max: MAX(SGPR)
|
||||
unit: Registers
|
||||
tips:
|
||||
tips:
|
||||
LDS Allocation:
|
||||
avg: AVG(LDS_Per_Workgroup)
|
||||
min: MIN(LDS_Per_Workgroup)
|
||||
max: MAX(LDS_Per_Workgroup)
|
||||
unit: Bytes
|
||||
tips:
|
||||
tips:
|
||||
Scratch Allocation:
|
||||
avg: AVG(Scratch_Per_Workitem)
|
||||
min: MIN(Scratch_Per_Workitem)
|
||||
@@ -96,47 +96,47 @@ Panel Config:
|
||||
min: MIN((End_Timestamp - Start_Timestamp))
|
||||
max: MAX((End_Timestamp - Start_Timestamp))
|
||||
unit: ns
|
||||
tips:
|
||||
tips:
|
||||
Kernel Time (Cycles):
|
||||
avg: AVG($GRBM_GUI_ACTIVE_PER_XCD)
|
||||
min: MIN($GRBM_GUI_ACTIVE_PER_XCD)
|
||||
max: MAX($GRBM_GUI_ACTIVE_PER_XCD)
|
||||
unit: Cycle
|
||||
tips:
|
||||
tips:
|
||||
Instructions per wavefront:
|
||||
avg: AVG((SQ_INSTS / SQ_WAVES))
|
||||
min: MIN((SQ_INSTS / SQ_WAVES))
|
||||
max: MAX((SQ_INSTS / SQ_WAVES))
|
||||
unit: Instr/wavefront
|
||||
tips:
|
||||
tips:
|
||||
Wave Cycles:
|
||||
avg: AVG(((4 * SQ_WAVE_CYCLES) / $denom))
|
||||
min: MIN(((4 * SQ_WAVE_CYCLES) / $denom))
|
||||
max: MAX(((4 * SQ_WAVE_CYCLES) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Dependency Wait Cycles:
|
||||
avg: AVG(((4 * SQ_WAIT_ANY) / $denom))
|
||||
min: MIN(((4 * SQ_WAIT_ANY) / $denom))
|
||||
max: MAX(((4 * SQ_WAIT_ANY) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Issue Wait Cycles:
|
||||
avg: AVG(((4 * SQ_WAIT_INST_ANY) / $denom))
|
||||
min: MIN(((4 * SQ_WAIT_INST_ANY) / $denom))
|
||||
max: MAX(((4 * SQ_WAIT_INST_ANY) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Active Cycles:
|
||||
avg: AVG(((4 * SQ_ACTIVE_INST_ANY) / $denom))
|
||||
min: MIN(((4 * SQ_ACTIVE_INST_ANY) / $denom))
|
||||
max: MAX(((4 * SQ_ACTIVE_INST_ANY) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Wavefront Occupancy:
|
||||
avg: AVG((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
min: MIN((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
max: MAX((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
unit: Wavefronts
|
||||
coll_level: SQ_LEVEL_WAVES
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+11
-11
@@ -24,43 +24,43 @@ Panel Config:
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
VMEM:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
LDS:
|
||||
avg: AVG((SQ_INSTS_LDS / $denom))
|
||||
min: MIN((SQ_INSTS_LDS / $denom))
|
||||
max: MAX((SQ_INSTS_LDS / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SALU:
|
||||
avg: AVG((SQ_INSTS_SALU / $denom))
|
||||
min: MIN((SQ_INSTS_SALU / $denom))
|
||||
max: MAX((SQ_INSTS_SALU / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SMEM:
|
||||
avg: AVG((SQ_INSTS_SMEM / $denom))
|
||||
min: MIN((SQ_INSTS_SMEM / $denom))
|
||||
max: MAX((SQ_INSTS_SMEM / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Branch:
|
||||
avg: AVG((SQ_INSTS_BRANCH / $denom))
|
||||
min: MIN((SQ_INSTS_BRANCH / $denom))
|
||||
max: MAX((SQ_INSTS_BRANCH / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1002
|
||||
@@ -240,19 +240,19 @@ Panel Config:
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F16:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-BF16:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F32:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
@@ -264,4 +264,4 @@ Panel Config:
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+10
-10
@@ -78,43 +78,43 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
IPC (Issued):
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
@@ -123,7 +123,7 @@ Panel Config:
|
||||
max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
|
||||
@@ -20,21 +20,21 @@ Panel Config:
|
||||
Utilization:
|
||||
value: AVG(((100 * SQ_LDS_IDX_ACTIVE) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Access Rate:
|
||||
value: AVG(((200 * SQ_ACTIVE_INST_LDS) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Theoretical Bandwidth (% of Peak):
|
||||
value: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)) / (($max_sclk * $cu_per_gpu) * 0.00128)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflict Rate:
|
||||
value: AVG((((SQ_LDS_BANK_CONFLICT * 3.125) / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
comparable: false # for now
|
||||
cli_style: simple_bar
|
||||
|
||||
@@ -54,7 +54,7 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_LDS / $denom))
|
||||
max: MAX((SQ_INSTS_LDS / $denom))
|
||||
unit: (Instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Theoretical Bandwidth:
|
||||
avg: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ $denom))
|
||||
@@ -63,14 +63,14 @@ Panel Config:
|
||||
max: MAX(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ $denom))
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
LDS Latency:
|
||||
avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
min: MIN(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
unit: Cycles
|
||||
coll_level: SQ_INST_LEVEL_LDS
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflicts/Access:
|
||||
avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
@@ -79,40 +79,40 @@ Panel Config:
|
||||
max: MAX(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
unit: Conflicts/Access
|
||||
tips:
|
||||
tips:
|
||||
Index Accesses:
|
||||
avg: AVG((SQ_LDS_IDX_ACTIVE / $denom))
|
||||
min: MIN((SQ_LDS_IDX_ACTIVE / $denom))
|
||||
max: MAX((SQ_LDS_IDX_ACTIVE / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Return Cycles:
|
||||
avg: AVG((SQ_LDS_ATOMIC_RETURN / $denom))
|
||||
min: MIN((SQ_LDS_ATOMIC_RETURN / $denom))
|
||||
max: MAX((SQ_LDS_ATOMIC_RETURN / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflict:
|
||||
avg: AVG((SQ_LDS_BANK_CONFLICT / $denom))
|
||||
min: MIN((SQ_LDS_BANK_CONFLICT / $denom))
|
||||
max: MAX((SQ_LDS_BANK_CONFLICT / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Addr Conflict:
|
||||
avg: AVG((SQ_LDS_ADDR_CONFLICT / $denom))
|
||||
min: MIN((SQ_LDS_ADDR_CONFLICT / $denom))
|
||||
max: MAX((SQ_LDS_ADDR_CONFLICT / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Unaligned Stall:
|
||||
avg: AVG((SQ_LDS_UNALIGNED_STALL / $denom))
|
||||
min: MIN((SQ_LDS_UNALIGNED_STALL / $denom))
|
||||
max: MAX((SQ_LDS_UNALIGNED_STALL / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Mem Violations:
|
||||
avg: AVG((SQ_LDS_MEM_VIOLATIONS / $denom))
|
||||
min: MIN((SQ_LDS_MEM_VIOLATIONS / $denom))
|
||||
max: MAX((SQ_LDS_MEM_VIOLATIONS / $denom))
|
||||
unit: (Accesses + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -21,14 +21,14 @@ Panel Config:
|
||||
value: AVG(((SQC_ICACHE_REQ * 100000) / (($max_sclk * $sqc_per_gpu)
|
||||
* (End_Timestamp - Start_Timestamp))))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Cache Hit Rate:
|
||||
value: AVG(((SQC_ICACHE_HITS * 100) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES)
|
||||
+ SQC_ICACHE_MISSES_DUPLICATE)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
L1I-L2 Bandwidth:
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
* (End_Timestamp - Start_Timestamp))))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
@@ -51,25 +51,25 @@ Panel Config:
|
||||
min: MIN((SQC_ICACHE_REQ / $denom))
|
||||
max: MAX((SQC_ICACHE_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Hits:
|
||||
avg: AVG((SQC_ICACHE_HITS / $denom))
|
||||
min: MIN((SQC_ICACHE_HITS / $denom))
|
||||
max: MAX((SQC_ICACHE_HITS / $denom))
|
||||
unit: (Hits + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses - Non Duplicated:
|
||||
avg: AVG((SQC_ICACHE_MISSES / $denom))
|
||||
min: MIN((SQC_ICACHE_MISSES / $denom))
|
||||
max: MAX((SQC_ICACHE_MISSES / $denom))
|
||||
unit: (Misses + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses - Duplicated:
|
||||
avg: AVG((SQC_ICACHE_MISSES_DUPLICATE / $denom))
|
||||
min: MIN((SQC_ICACHE_MISSES_DUPLICATE / $denom))
|
||||
max: MAX((SQC_ICACHE_MISSES_DUPLICATE / $denom))
|
||||
unit: (Misses + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache Hit Rate:
|
||||
avg: AVG(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES)
|
||||
+ SQC_ICACHE_MISSES_DUPLICATE)))
|
||||
@@ -78,7 +78,7 @@ Panel Config:
|
||||
max: MAX(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES)
|
||||
+ SQC_ICACHE_MISSES_DUPLICATE)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Instruction Fetch Latency:
|
||||
avg: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
min: MIN((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
@@ -102,4 +102,4 @@ Panel Config:
|
||||
min: MIN(((SQC_TC_INST_REQ * 64) / $denom))
|
||||
max: MAX(((SQC_TC_INST_REQ * 64) / $denom))
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -51,25 +51,25 @@ Panel Config:
|
||||
min: MIN((SQC_DCACHE_REQ / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Hits:
|
||||
avg: AVG((SQC_DCACHE_HITS / $denom))
|
||||
min: MIN((SQC_DCACHE_HITS / $denom))
|
||||
max: MAX((SQC_DCACHE_HITS / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses - Non Duplicated:
|
||||
avg: AVG((SQC_DCACHE_MISSES / $denom))
|
||||
min: MIN((SQC_DCACHE_MISSES / $denom))
|
||||
max: MAX((SQC_DCACHE_MISSES / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses- Duplicated:
|
||||
avg: AVG((SQC_DCACHE_MISSES_DUPLICATE / $denom))
|
||||
min: MIN((SQC_DCACHE_MISSES_DUPLICATE / $denom))
|
||||
max: MAX((SQC_DCACHE_MISSES_DUPLICATE / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache Hit Rate:
|
||||
avg: AVG((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES)
|
||||
+ SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES)
|
||||
@@ -81,7 +81,7 @@ Panel Config:
|
||||
+ SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES)
|
||||
+ SQC_DCACHE_MISSES_DUPLICATE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Read Req (Total):
|
||||
avg: AVG((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4)
|
||||
+ SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom))
|
||||
@@ -90,37 +90,37 @@ Panel Config:
|
||||
max: MAX((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4)
|
||||
+ SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Req:
|
||||
avg: AVG((SQC_DCACHE_ATOMIC / $denom))
|
||||
min: MIN((SQC_DCACHE_ATOMIC / $denom))
|
||||
max: MAX((SQC_DCACHE_ATOMIC / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (1 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_1 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_1 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_1 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (2 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_2 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_2 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_2 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (4 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_4 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_4 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_4 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (8 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_8 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_8 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_8 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (16 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_16 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_16 / $denom))
|
||||
@@ -150,22 +150,22 @@ Panel Config:
|
||||
min: MIN((SQC_TC_DATA_READ_REQ / $denom))
|
||||
max: MAX((SQC_TC_DATA_READ_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Req:
|
||||
avg: AVG((SQC_TC_DATA_WRITE_REQ / $denom))
|
||||
min: MIN((SQC_TC_DATA_WRITE_REQ / $denom))
|
||||
max: MAX((SQC_TC_DATA_WRITE_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Req:
|
||||
avg: AVG((SQC_TC_DATA_ATOMIC_REQ / $denom))
|
||||
min: MIN((SQC_TC_DATA_ATOMIC_REQ / $denom))
|
||||
max: MAX((SQC_TC_DATA_ATOMIC_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Stall Cycles:
|
||||
avg: AVG((SQC_TC_STALL / $denom))
|
||||
min: MIN((SQC_TC_STALL / $denom))
|
||||
max: MAX((SQC_TC_STALL / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -24,91 +24,91 @@ Panel Config:
|
||||
min: MIN(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data Stall:
|
||||
avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data-Processor → Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Total Instructions:
|
||||
avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Instructions:
|
||||
avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Read Instructions:
|
||||
avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Write Instructions:
|
||||
avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Atomic Instructions:
|
||||
avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Instructions:
|
||||
avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Read Instructions:
|
||||
avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Write Instructions:
|
||||
avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Atomic Instructions:
|
||||
avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Total Cycles:
|
||||
avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Read:
|
||||
avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Write:
|
||||
avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
@@ -132,13 +132,13 @@ Panel Config:
|
||||
min: MIN(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache RAM → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup manager → Data-Return Stall:
|
||||
avg: # No perf counter
|
||||
min: # No perf counter
|
||||
@@ -150,7 +150,7 @@ Panel Config:
|
||||
min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Instructions:
|
||||
avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
@@ -159,16 +159,16 @@ Panel Config:
|
||||
max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Instructions:
|
||||
avg: AVG((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Instructions:
|
||||
avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -23,22 +23,22 @@ Panel Config:
|
||||
/ TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Bandwidth:
|
||||
value: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 64) * $cu_per_gpu))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Utilization:
|
||||
value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum
|
||||
!= 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Coalescing:
|
||||
value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum
|
||||
* 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
comparable: false # for now
|
||||
cli_style: simple_bar
|
||||
|
||||
@@ -93,19 +93,19 @@ Panel Config:
|
||||
min: MIN((TCP_TOTAL_ACCESSES_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_ACCESSES_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req:
|
||||
avg: AVG((TCP_TOTAL_READ_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_READ_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_READ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Req:
|
||||
avg: AVG((TCP_TOTAL_WRITE_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_WRITE_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_WRITE_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Req:
|
||||
avg: AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum)
|
||||
/ $denom))
|
||||
@@ -114,7 +114,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum)
|
||||
/ $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache BW:
|
||||
avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / $denom))
|
||||
min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / $denom))
|
||||
@@ -135,13 +135,13 @@ Panel Config:
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache Accesses:
|
||||
avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache Hits:
|
||||
avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
@@ -153,13 +153,13 @@ Panel Config:
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
/ $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Invalidations:
|
||||
avg: AVG((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 BW:
|
||||
avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
@@ -174,13 +174,13 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Write:
|
||||
avg: AVG((TCP_TCC_WRITE_REQ_sum / $denom))
|
||||
min: MIN((TCP_TCC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Atomic:
|
||||
avg: AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)
|
||||
/ $denom))
|
||||
@@ -189,7 +189,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)
|
||||
/ $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1 Access Latency:
|
||||
avg: AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum
|
||||
!= 0) else None))
|
||||
@@ -198,7 +198,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Read Latency:
|
||||
avg: AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum))
|
||||
if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None))
|
||||
@@ -207,7 +207,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum))
|
||||
if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None))
|
||||
unit: Cycles
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Write Latency:
|
||||
avg: AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else
|
||||
@@ -219,7 +219,7 @@ Panel Config:
|
||||
if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else
|
||||
None))
|
||||
unit: Cycles
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1604
|
||||
@@ -289,7 +289,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_UC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_UC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
CC - Write:
|
||||
xfer: Write
|
||||
coherency: CC
|
||||
@@ -297,7 +297,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_CC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_CC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
NC - Atomic:
|
||||
xfer: Atomic
|
||||
coherency: NC
|
||||
@@ -347,7 +347,7 @@ Panel Config:
|
||||
min: MIN((TCP_UTCL1_REQUEST_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_REQUEST_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Hit Ratio:
|
||||
avg: AVG((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if
|
||||
(TCP_UTCL1_REQUEST_sum != 0) else None))
|
||||
@@ -356,22 +356,22 @@ Panel Config:
|
||||
max: MAX((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if
|
||||
(TCP_UTCL1_REQUEST_sum != 0) else None))
|
||||
units: pct
|
||||
tips:
|
||||
tips:
|
||||
Hits:
|
||||
avg: AVG((TCP_UTCL1_TRANSLATION_HIT_sum / $denom))
|
||||
min: MIN((TCP_UTCL1_TRANSLATION_HIT_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_TRANSLATION_HIT_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Translation Misses:
|
||||
avg: AVG((TCP_UTCL1_TRANSLATION_MISS_sum / $denom))
|
||||
min: MIN((TCP_UTCL1_TRANSLATION_MISS_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_TRANSLATION_MISS_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Permission Misses:
|
||||
avg: AVG((TCP_UTCL1_PERMISSION_MISS_sum / $denom))
|
||||
min: MIN((TCP_UTCL1_PERMISSION_MISS_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_PERMISSION_MISS_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -24,7 +24,7 @@ Panel Config:
|
||||
Bandwidth:
|
||||
value: ((100 * AVG(((TCC_REQ_sum * 64) / (End_Timestamp - Start_Timestamp)))) / ((($max_sclk / 1000) * 64) * TO_INT($total_l2_chan)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else 0))
|
||||
@@ -168,7 +168,7 @@ Panel Config:
|
||||
min: MIN((TCC_REQ_sum * 64) / $denom)
|
||||
max: MAX((TCC_REQ_sum * 64) / $denom)
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Req:
|
||||
avg: AVG((TCC_REQ_sum / $denom))
|
||||
min: MIN((TCC_REQ_sum / $denom))
|
||||
@@ -429,4 +429,4 @@ Panel Config:
|
||||
min: MIN((TCC_EA_ATOMIC_sum / $denom))
|
||||
max: MAX((TCC_EA_ATOMIC_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -166,7 +166,7 @@ Panel Config:
|
||||
+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
|
||||
+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
# FIXME: other arggr metrics!!
|
||||
|
||||
- metric_table:
|
||||
@@ -183,7 +183,7 @@ Panel Config:
|
||||
placeholder_range:
|
||||
"::_1": 32
|
||||
cli_style: simple_box
|
||||
|
||||
|
||||
- metric_table:
|
||||
id: 1803
|
||||
title: L2 Requests (Requests)
|
||||
@@ -332,4 +332,4 @@ Panel Config:
|
||||
ea write stall - starve: None # No perf counter
|
||||
placeholder_range:
|
||||
"::_1": 32
|
||||
cli_style: simple_multiple_bar
|
||||
cli_style: simple_multiple_bar
|
||||
|
||||
+20
-20
@@ -67,13 +67,13 @@ Panel Config:
|
||||
unit: CUs
|
||||
peak: $cu_per_gpu
|
||||
pop: ((100 * $numActiveCUs) / $cu_per_gpu)
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
@@ -91,26 +91,26 @@ Panel Config:
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: None # No HW module
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
value: None # No HW module
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: None # No HW module
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
peak: $wave_size
|
||||
pop: (100 * AVG((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU / $wave_size) if (SQ_ACTIVE_INST_VALU != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
IPC:
|
||||
value: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
peak: 5
|
||||
pop: ((100 * AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))) / 5)
|
||||
tips:
|
||||
tips:
|
||||
Wavefront Occupancy:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
unit: Wavefronts
|
||||
@@ -118,7 +118,7 @@ Panel Config:
|
||||
pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD) / ($max_waves_per_cu
|
||||
* $cu_per_gpu))))
|
||||
coll_level: SQ_LEVEL_WAVES
|
||||
tips:
|
||||
tips:
|
||||
Theoretical LDS Bandwidth:
|
||||
value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)))
|
||||
@@ -126,7 +126,7 @@ Panel Config:
|
||||
peak: (($max_sclk * $cu_per_gpu) * 0.128)
|
||||
pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)) / (($max_sclk * $cu_per_gpu) * 0.00128)))
|
||||
tips:
|
||||
tips:
|
||||
LDS Bank Conflicts/Access:
|
||||
value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
@@ -134,7 +134,7 @@ Panel Config:
|
||||
peak: 32
|
||||
pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32)
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache Hit Rate:
|
||||
value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
@@ -146,14 +146,14 @@ Panel Config:
|
||||
TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) /
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache BW:
|
||||
value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $cu_per_gpu)
|
||||
pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 64) * $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
@@ -161,14 +161,14 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache BW:
|
||||
value: AVG(((TCC_REQ_sum * 64) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * TO_INT($total_l2_chan))
|
||||
pop: ((100 * AVG(((TCC_REQ_sum * 64) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 64) * TO_INT($total_l2_chan)))
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read BW:
|
||||
value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -176,7 +176,7 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write BW:
|
||||
value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -184,21 +184,21 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read Latency:
|
||||
value: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write Latency:
|
||||
value: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache Hit Rate:
|
||||
value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
@@ -206,20 +206,20 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache BW:
|
||||
value: AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Hit Rate:
|
||||
value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
tips:
|
||||
tips:
|
||||
L1I BW:
|
||||
value: AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
|
||||
@@ -311,4 +311,4 @@ Panel Config:
|
||||
tips:
|
||||
|
||||
comparable: false # for now
|
||||
cli_style: mem_chart
|
||||
cli_style: mem_chart
|
||||
|
||||
@@ -27,7 +27,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE))
|
||||
if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF Stall:
|
||||
avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -36,7 +36,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Utilization:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
@@ -45,7 +45,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Stall:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
@@ -54,7 +54,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPF_CMP_UTCL1_STALL_ON_TRANSLATION) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -84,7 +84,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE))
|
||||
if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Stall Rate:
|
||||
avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -93,19 +93,19 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Packet Decoding Utilization:
|
||||
avg: AVG((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-Workgroup Manager Utilization:
|
||||
avg: AVG((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-L2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
@@ -114,7 +114,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -123,7 +123,7 @@ Panel Config:
|
||||
max: MAX(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
@@ -132,4 +132,4 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+19
-19
@@ -24,43 +24,43 @@ Panel Config:
|
||||
min: MIN(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
max: MAX(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Utilization:
|
||||
avg: AVG(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
min: MIN(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
max: MAX(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup Manager Utilization:
|
||||
avg: AVG(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
min: MIN(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
max: MAX(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Shader Engine Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
SIMD Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Workgroups:
|
||||
avg: AVG(SPI_CSN_NUM_THREADGROUPS)
|
||||
min: MIN(SPI_CSN_NUM_THREADGROUPS)
|
||||
max: MAX(SPI_CSN_NUM_THREADGROUPS)
|
||||
unit: Workgroups
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Wavefronts:
|
||||
avg: AVG(SPI_CSN_WAVE)
|
||||
min: MIN(SPI_CSN_WAVE)
|
||||
max: MAX(SPI_CSN_WAVE)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
VGPR Writes:
|
||||
avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -69,7 +69,7 @@ Panel Config:
|
||||
max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
unit: Cycles/wave
|
||||
tips:
|
||||
tips:
|
||||
SGPR Writes:
|
||||
avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -98,7 +98,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Not-scheduled Rate (Scheduler-Pipe):
|
||||
avg: AVG((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
@@ -107,7 +107,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Stall Rate:
|
||||
avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
@@ -116,52 +116,52 @@ Panel Config:
|
||||
max: MAX((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scratch Stall Rate:
|
||||
avg: AVG((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
min: MIN((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
max: MAX((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD Waveslots:
|
||||
avg: AVG(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD VGPRs:
|
||||
avg: AVG(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD SGPRs:
|
||||
avg: AVG(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU LDS:
|
||||
avg: AVG(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU Barriers:
|
||||
avg: AVG(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Workgroup Limit:
|
||||
avg: AVG(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Wavefront Limit:
|
||||
avg: AVG(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -24,55 +24,55 @@ Panel Config:
|
||||
min: MIN(Grid_Size)
|
||||
max: MAX(Grid_Size)
|
||||
unit: Work Items
|
||||
tips:
|
||||
tips:
|
||||
Workgroup Size:
|
||||
avg: AVG(Workgroup_Size)
|
||||
min: MIN(Workgroup_Size)
|
||||
max: MAX(Workgroup_Size)
|
||||
unit: Work Items
|
||||
tips:
|
||||
tips:
|
||||
Total Wavefronts:
|
||||
avg: AVG(SPI_CSN_WAVE)
|
||||
min: MIN(SPI_CSN_WAVE)
|
||||
max: MAX(SPI_CSN_WAVE)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
Saved Wavefronts:
|
||||
avg: AVG(SQ_WAVES_SAVED)
|
||||
min: MIN(SQ_WAVES_SAVED)
|
||||
max: MAX(SQ_WAVES_SAVED)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
Restored Wavefronts:
|
||||
avg: AVG(SQ_WAVES_RESTORED)
|
||||
min: MIN(SQ_WAVES_RESTORED)
|
||||
max: MAX(SQ_WAVES_RESTORED)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
VGPRs:
|
||||
avg: AVG(Arch_VGPR)
|
||||
min: MIN(Arch_VGPR)
|
||||
max: MAX(Arch_VGPR)
|
||||
unit: Registers
|
||||
tips:
|
||||
tips:
|
||||
AGPRs:
|
||||
avg: AVG(Accum_VGPR)
|
||||
min: MIN(Accum_VGPR)
|
||||
max: MAX(Accum_VGPR)
|
||||
unit: Registers
|
||||
tips:
|
||||
tips:
|
||||
SGPRs:
|
||||
avg: AVG(SGPR)
|
||||
min: MIN(SGPR)
|
||||
max: MAX(SGPR)
|
||||
unit: Registers
|
||||
tips:
|
||||
tips:
|
||||
LDS Allocation:
|
||||
avg: AVG(LDS_Per_Workgroup)
|
||||
min: MIN(LDS_Per_Workgroup)
|
||||
max: MAX(LDS_Per_Workgroup)
|
||||
unit: Bytes
|
||||
tips:
|
||||
tips:
|
||||
Scratch Allocation:
|
||||
avg: AVG(Scratch_Per_Workitem)
|
||||
min: MIN(Scratch_Per_Workitem)
|
||||
@@ -96,47 +96,47 @@ Panel Config:
|
||||
min: MIN((End_Timestamp - Start_Timestamp))
|
||||
max: MAX((End_Timestamp - Start_Timestamp))
|
||||
unit: ns
|
||||
tips:
|
||||
tips:
|
||||
Kernel Time (Cycles):
|
||||
avg: AVG($GRBM_GUI_ACTIVE_PER_XCD)
|
||||
min: MIN($GRBM_GUI_ACTIVE_PER_XCD)
|
||||
max: MAX($GRBM_GUI_ACTIVE_PER_XCD)
|
||||
unit: Cycle
|
||||
tips:
|
||||
tips:
|
||||
Instructions per wavefront:
|
||||
avg: AVG((SQ_INSTS / SQ_WAVES))
|
||||
min: MIN((SQ_INSTS / SQ_WAVES))
|
||||
max: MAX((SQ_INSTS / SQ_WAVES))
|
||||
unit: Instr/wavefront
|
||||
tips:
|
||||
tips:
|
||||
Wave Cycles:
|
||||
avg: AVG(((4 * SQ_WAVE_CYCLES) / $denom))
|
||||
min: MIN(((4 * SQ_WAVE_CYCLES) / $denom))
|
||||
max: MAX(((4 * SQ_WAVE_CYCLES) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Dependency Wait Cycles:
|
||||
avg: AVG(((4 * SQ_WAIT_ANY) / $denom))
|
||||
min: MIN(((4 * SQ_WAIT_ANY) / $denom))
|
||||
max: MAX(((4 * SQ_WAIT_ANY) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Issue Wait Cycles:
|
||||
avg: AVG(((4 * SQ_WAIT_INST_ANY) / $denom))
|
||||
min: MIN(((4 * SQ_WAIT_INST_ANY) / $denom))
|
||||
max: MAX(((4 * SQ_WAIT_INST_ANY) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Active Cycles:
|
||||
avg: AVG(((4 * SQ_ACTIVE_INST_ANY) / $denom))
|
||||
min: MIN(((4 * SQ_ACTIVE_INST_ANY) / $denom))
|
||||
max: MAX(((4 * SQ_ACTIVE_INST_ANY) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Wavefront Occupancy:
|
||||
avg: AVG((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
min: MIN((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
max: MAX((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
unit: Wavefronts
|
||||
coll_level: SQ_LEVEL_WAVES
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+10
-10
@@ -24,43 +24,43 @@ Panel Config:
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
VMEM:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
LDS:
|
||||
avg: AVG((SQ_INSTS_LDS / $denom))
|
||||
min: MIN((SQ_INSTS_LDS / $denom))
|
||||
max: MAX((SQ_INSTS_LDS / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SALU:
|
||||
avg: AVG((SQ_INSTS_SALU / $denom))
|
||||
min: MIN((SQ_INSTS_SALU / $denom))
|
||||
max: MAX((SQ_INSTS_SALU / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SMEM:
|
||||
avg: AVG((SQ_INSTS_SMEM / $denom))
|
||||
min: MIN((SQ_INSTS_SMEM / $denom))
|
||||
max: MAX((SQ_INSTS_SMEM / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Branch:
|
||||
avg: AVG((SQ_INSTS_BRANCH / $denom))
|
||||
min: MIN((SQ_INSTS_BRANCH / $denom))
|
||||
max: MAX((SQ_INSTS_BRANCH / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1002
|
||||
@@ -240,19 +240,19 @@ Panel Config:
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F16:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-BF16:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F32:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
|
||||
+10
-12
@@ -78,43 +78,43 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
IPC (Issued):
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
max: None # No HW module
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
@@ -123,7 +123,7 @@ Panel Config:
|
||||
max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
avg: None # No HW module
|
||||
min: None # No HW module
|
||||
@@ -204,5 +204,3 @@ Panel Config:
|
||||
max: None # No perf counter
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
|
||||
|
||||
|
||||
@@ -20,12 +20,11 @@ Panel Config:
|
||||
Utilization:
|
||||
value: AVG(((100 * SQ_LDS_IDX_ACTIVE) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Access Rate:
|
||||
value: AVG(((200 * SQ_ACTIVE_INST_LDS) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
unit: pct
|
||||
tips:
|
||||
Theoretical Bandwidth:
|
||||
value: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)) / (($max_sclk * $cu_per_gpu) * 0.00128)))
|
||||
@@ -55,7 +54,7 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_LDS / $denom))
|
||||
max: MAX((SQ_INSTS_LDS / $denom))
|
||||
unit: (Instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Theoretical Bandwidth:
|
||||
avg: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ $denom))
|
||||
@@ -64,14 +63,14 @@ Panel Config:
|
||||
max: MAX(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ $denom))
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
LDS Latency:
|
||||
avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
min: MIN(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
unit: Cycles
|
||||
coll_level: SQ_INST_LEVEL_LDS
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflicts/Access:
|
||||
avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
@@ -80,40 +79,40 @@ Panel Config:
|
||||
max: MAX(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
unit: Conflicts/Access
|
||||
tips:
|
||||
tips:
|
||||
Index Accesses:
|
||||
avg: AVG((SQ_LDS_IDX_ACTIVE / $denom))
|
||||
min: MIN((SQ_LDS_IDX_ACTIVE / $denom))
|
||||
max: MAX((SQ_LDS_IDX_ACTIVE / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Return Cycles:
|
||||
avg: AVG((SQ_LDS_ATOMIC_RETURN / $denom))
|
||||
min: MIN((SQ_LDS_ATOMIC_RETURN / $denom))
|
||||
max: MAX((SQ_LDS_ATOMIC_RETURN / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflict:
|
||||
avg: AVG((SQ_LDS_BANK_CONFLICT / $denom))
|
||||
min: MIN((SQ_LDS_BANK_CONFLICT / $denom))
|
||||
max: MAX((SQ_LDS_BANK_CONFLICT / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Addr Conflict:
|
||||
avg: AVG((SQ_LDS_ADDR_CONFLICT / $denom))
|
||||
min: MIN((SQ_LDS_ADDR_CONFLICT / $denom))
|
||||
max: MAX((SQ_LDS_ADDR_CONFLICT / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Unaligned Stall:
|
||||
avg: AVG((SQ_LDS_UNALIGNED_STALL / $denom))
|
||||
min: MIN((SQ_LDS_UNALIGNED_STALL / $denom))
|
||||
max: MAX((SQ_LDS_UNALIGNED_STALL / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Mem Violations:
|
||||
avg: AVG((SQ_LDS_MEM_VIOLATIONS / $denom))
|
||||
min: MIN((SQ_LDS_MEM_VIOLATIONS / $denom))
|
||||
max: MAX((SQ_LDS_MEM_VIOLATIONS / $denom))
|
||||
unit: (Accesses + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -21,14 +21,14 @@ Panel Config:
|
||||
value: AVG(((SQC_ICACHE_REQ * 100000) / (($max_sclk * $sqc_per_gpu)
|
||||
* (End_Timestamp - Start_Timestamp))))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Cache Hit Rate:
|
||||
value: AVG(((SQC_ICACHE_HITS * 100) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES)
|
||||
+ SQC_ICACHE_MISSES_DUPLICATE)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
L1I-L2 Bandwidth:
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
* (End_Timestamp - Start_Timestamp))))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
@@ -51,25 +51,25 @@ Panel Config:
|
||||
min: MIN((SQC_ICACHE_REQ / $denom))
|
||||
max: MAX((SQC_ICACHE_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Hits:
|
||||
avg: AVG((SQC_ICACHE_HITS / $denom))
|
||||
min: MIN((SQC_ICACHE_HITS / $denom))
|
||||
max: MAX((SQC_ICACHE_HITS / $denom))
|
||||
unit: (Hits + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses - Non Duplicated:
|
||||
avg: AVG((SQC_ICACHE_MISSES / $denom))
|
||||
min: MIN((SQC_ICACHE_MISSES / $denom))
|
||||
max: MAX((SQC_ICACHE_MISSES / $denom))
|
||||
unit: (Misses + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses - Duplicated:
|
||||
avg: AVG((SQC_ICACHE_MISSES_DUPLICATE / $denom))
|
||||
min: MIN((SQC_ICACHE_MISSES_DUPLICATE / $denom))
|
||||
max: MAX((SQC_ICACHE_MISSES_DUPLICATE / $denom))
|
||||
unit: (Misses + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache Hit Rate:
|
||||
avg: AVG(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES)
|
||||
+ SQC_ICACHE_MISSES_DUPLICATE)))
|
||||
@@ -78,7 +78,7 @@ Panel Config:
|
||||
max: MAX(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES)
|
||||
+ SQC_ICACHE_MISSES_DUPLICATE)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Instruction Fetch Latency:
|
||||
avg: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
min: MIN((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
@@ -102,4 +102,4 @@ Panel Config:
|
||||
min: MIN(((SQC_TC_INST_REQ * 64) / $denom))
|
||||
max: MAX(((SQC_TC_INST_REQ * 64) / $denom))
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -51,25 +51,25 @@ Panel Config:
|
||||
min: MIN((SQC_DCACHE_REQ / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Hits:
|
||||
avg: AVG((SQC_DCACHE_HITS / $denom))
|
||||
min: MIN((SQC_DCACHE_HITS / $denom))
|
||||
max: MAX((SQC_DCACHE_HITS / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses - Non Duplicated:
|
||||
avg: AVG((SQC_DCACHE_MISSES / $denom))
|
||||
min: MIN((SQC_DCACHE_MISSES / $denom))
|
||||
max: MAX((SQC_DCACHE_MISSES / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses- Duplicated:
|
||||
avg: AVG((SQC_DCACHE_MISSES_DUPLICATE / $denom))
|
||||
min: MIN((SQC_DCACHE_MISSES_DUPLICATE / $denom))
|
||||
max: MAX((SQC_DCACHE_MISSES_DUPLICATE / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache Hit Rate:
|
||||
avg: AVG((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES)
|
||||
+ SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES)
|
||||
@@ -81,7 +81,7 @@ Panel Config:
|
||||
+ SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES)
|
||||
+ SQC_DCACHE_MISSES_DUPLICATE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Read Req (Total):
|
||||
avg: AVG((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4)
|
||||
+ SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom))
|
||||
@@ -90,37 +90,37 @@ Panel Config:
|
||||
max: MAX((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4)
|
||||
+ SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Req:
|
||||
avg: AVG((SQC_DCACHE_ATOMIC / $denom))
|
||||
min: MIN((SQC_DCACHE_ATOMIC / $denom))
|
||||
max: MAX((SQC_DCACHE_ATOMIC / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (1 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_1 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_1 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_1 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (2 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_2 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_2 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_2 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (4 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_4 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_4 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_4 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (8 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_8 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_8 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_8 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (16 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_16 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_16 / $denom))
|
||||
@@ -150,22 +150,22 @@ Panel Config:
|
||||
min: MIN((SQC_TC_DATA_READ_REQ / $denom))
|
||||
max: MAX((SQC_TC_DATA_READ_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Req:
|
||||
avg: AVG((SQC_TC_DATA_WRITE_REQ / $denom))
|
||||
min: MIN((SQC_TC_DATA_WRITE_REQ / $denom))
|
||||
max: MAX((SQC_TC_DATA_WRITE_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Req:
|
||||
avg: AVG((SQC_TC_DATA_ATOMIC_REQ / $denom))
|
||||
min: MIN((SQC_TC_DATA_ATOMIC_REQ / $denom))
|
||||
max: MAX((SQC_TC_DATA_ATOMIC_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Stall Cycles:
|
||||
avg: AVG((SQC_TC_STALL / $denom))
|
||||
min: MIN((SQC_TC_STALL / $denom))
|
||||
max: MAX((SQC_TC_STALL / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -24,91 +24,91 @@ Panel Config:
|
||||
min: MIN(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data Stall:
|
||||
avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data-Processor → Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Total Instructions:
|
||||
avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Instructions:
|
||||
avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Read Instructions:
|
||||
avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Write Instructions:
|
||||
avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Atomic Instructions:
|
||||
avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Instructions:
|
||||
avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Read Instructions:
|
||||
avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Write Instructions:
|
||||
avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Atomic Instructions:
|
||||
avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Total Cycles:
|
||||
avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Read:
|
||||
avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Write:
|
||||
avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
@@ -132,13 +132,13 @@ Panel Config:
|
||||
min: MIN(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache RAM → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup manager → Data-Return Stall:
|
||||
avg: # No perf counter
|
||||
min: # No perf counter
|
||||
@@ -150,7 +150,7 @@ Panel Config:
|
||||
min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Instructions:
|
||||
avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
@@ -159,16 +159,16 @@ Panel Config:
|
||||
max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Instructions:
|
||||
avg: AVG((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Instructions:
|
||||
avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -23,22 +23,22 @@ Panel Config:
|
||||
/ TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Bandwidth:
|
||||
value: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 64) * $cu_per_gpu))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Utilization:
|
||||
value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum
|
||||
!= 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Coalescing:
|
||||
value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum
|
||||
* 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
comparable: false # for now
|
||||
cli_style: simple_bar
|
||||
|
||||
@@ -93,19 +93,19 @@ Panel Config:
|
||||
min: MIN((TCP_TOTAL_ACCESSES_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_ACCESSES_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req:
|
||||
avg: AVG((TCP_TOTAL_READ_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_READ_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_READ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Req:
|
||||
avg: AVG((TCP_TOTAL_WRITE_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_WRITE_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_WRITE_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Req:
|
||||
avg: AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum)
|
||||
/ $denom))
|
||||
@@ -135,13 +135,13 @@ Panel Config:
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache Accesses:
|
||||
avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache Hits:
|
||||
avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
@@ -153,13 +153,13 @@ Panel Config:
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
/ $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Invalidations:
|
||||
avg: AVG((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 BW:
|
||||
avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
@@ -174,13 +174,13 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Write:
|
||||
avg: AVG((TCP_TCC_WRITE_REQ_sum / $denom))
|
||||
min: MIN((TCP_TCC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Atomic:
|
||||
avg: AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)
|
||||
/ $denom))
|
||||
@@ -189,7 +189,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)
|
||||
/ $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1 Access Latency:
|
||||
avg: AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum
|
||||
!= 0) else None))
|
||||
@@ -198,7 +198,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Read Latency:
|
||||
avg: AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum))
|
||||
if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None))
|
||||
@@ -207,7 +207,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum))
|
||||
if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None))
|
||||
unit: Cycles
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Write Latency:
|
||||
avg: AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else
|
||||
@@ -219,7 +219,7 @@ Panel Config:
|
||||
if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else
|
||||
None))
|
||||
unit: Cycles
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1604
|
||||
@@ -241,7 +241,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_NC_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_NC_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
UC - Read:
|
||||
xfer: Read
|
||||
coherency: UC
|
||||
@@ -249,7 +249,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_UC_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_UC_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
CC - Read:
|
||||
xfer: Read
|
||||
coherency: CC
|
||||
@@ -257,7 +257,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_CC_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_CC_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
RW - Read:
|
||||
xfer: Read
|
||||
coherency: RW
|
||||
@@ -265,7 +265,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_RW_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_RW_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
RW - Write:
|
||||
xfer: Write
|
||||
coherency: RW
|
||||
@@ -273,7 +273,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_RW_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_RW_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
NC - Write:
|
||||
xfer: Write
|
||||
coherency: NC
|
||||
@@ -281,7 +281,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_NC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_NC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
UC - Write:
|
||||
xfer: Write
|
||||
coherency: UC
|
||||
@@ -289,7 +289,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_UC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_UC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
CC - Write:
|
||||
xfer: Write
|
||||
coherency: CC
|
||||
@@ -297,7 +297,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_CC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_CC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
NC - Atomic:
|
||||
xfer: Atomic
|
||||
coherency: NC
|
||||
@@ -305,7 +305,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_NC_ATOMIC_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_NC_ATOMIC_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
UC - Atomic:
|
||||
xfer: Atomic
|
||||
coherency: UC
|
||||
@@ -313,7 +313,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_UC_ATOMIC_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_UC_ATOMIC_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
CC - Atomic:
|
||||
xfer: Atomic
|
||||
coherency: CC
|
||||
@@ -321,7 +321,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_CC_ATOMIC_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_CC_ATOMIC_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
RW - Atomic:
|
||||
xfer: Atomic
|
||||
coherency: RW
|
||||
@@ -329,7 +329,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_RW_ATOMIC_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_RW_ATOMIC_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1605
|
||||
@@ -347,7 +347,7 @@ Panel Config:
|
||||
min: MIN((TCP_UTCL1_REQUEST_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_REQUEST_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Hit Ratio:
|
||||
avg: AVG((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if
|
||||
(TCP_UTCL1_REQUEST_sum != 0) else None))
|
||||
@@ -356,22 +356,22 @@ Panel Config:
|
||||
max: MAX((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if
|
||||
(TCP_UTCL1_REQUEST_sum != 0) else None))
|
||||
units: pct
|
||||
tips:
|
||||
tips:
|
||||
Hits:
|
||||
avg: AVG((TCP_UTCL1_TRANSLATION_HIT_sum / $denom))
|
||||
min: MIN((TCP_UTCL1_TRANSLATION_HIT_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_TRANSLATION_HIT_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Translation Misses:
|
||||
avg: AVG((TCP_UTCL1_TRANSLATION_MISS_sum / $denom))
|
||||
min: MIN((TCP_UTCL1_TRANSLATION_MISS_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_TRANSLATION_MISS_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Permission Misses:
|
||||
avg: AVG((TCP_UTCL1_PERMISSION_MISS_sum / $denom))
|
||||
min: MIN((TCP_UTCL1_PERMISSION_MISS_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_PERMISSION_MISS_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -24,7 +24,7 @@ Panel Config:
|
||||
Bandwidth:
|
||||
value: ((100 * AVG(((TCC_REQ_sum * 64) / (End_Timestamp - Start_Timestamp)))) / ((($max_sclk / 1000) * 64) * TO_INT($total_l2_chan)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else 0))
|
||||
@@ -168,7 +168,7 @@ Panel Config:
|
||||
min: MIN((TCC_REQ_sum * 64) / $denom)
|
||||
max: MAX((TCC_REQ_sum * 64) / $denom)
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Req:
|
||||
avg: AVG((TCC_REQ_sum / $denom))
|
||||
min: MIN((TCC_REQ_sum / $denom))
|
||||
@@ -429,4 +429,4 @@ Panel Config:
|
||||
min: MIN((TCC_EA_ATOMIC_sum / $denom))
|
||||
max: MAX((TCC_EA_ATOMIC_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -166,7 +166,7 @@ Panel Config:
|
||||
+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
|
||||
+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
# FIXME: other arggr metrics!!
|
||||
|
||||
- metric_table:
|
||||
@@ -183,7 +183,7 @@ Panel Config:
|
||||
placeholder_range:
|
||||
"::_1": $total_l2_chan
|
||||
cli_style: simple_box
|
||||
|
||||
|
||||
- metric_table:
|
||||
id: 1803
|
||||
title: L2 Requests (per normUnit)
|
||||
@@ -332,4 +332,4 @@ Panel Config:
|
||||
ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[::_1]) / $denom))
|
||||
placeholder_range:
|
||||
"::_1": $total_l2_chan
|
||||
cli_style: simple_multiple_bar
|
||||
cli_style: simple_multiple_bar
|
||||
|
||||
+30
-30
@@ -34,67 +34,67 @@ Panel Config:
|
||||
+ (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F64)))) / (End_Timestamp - Start_Timestamp)))) / (((($max_sclk
|
||||
* $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
VALU IOPs:
|
||||
value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp
|
||||
- Start_Timestamp)))) / (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 1024) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 1024) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 1024) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 1024) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA IOPs (Int8):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 1024) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 1024) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
Active CUs:
|
||||
value: $numActiveCUs
|
||||
unit: CUs
|
||||
peak: $cu_per_gpu
|
||||
pop: ((100 * $numActiveCUs) / $cu_per_gpu)
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
value: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / (($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)
|
||||
* 4)))
|
||||
@@ -102,19 +102,19 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / (($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)
|
||||
* 4)))
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
value: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
value: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
@@ -122,13 +122,13 @@ Panel Config:
|
||||
peak: 64
|
||||
pop: (AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None)) * 1.5625)
|
||||
tips:
|
||||
tips:
|
||||
IPC:
|
||||
value: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
peak: 5
|
||||
pop: ((100 * AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))) / 5)
|
||||
tips:
|
||||
tips:
|
||||
Wavefront Occupancy:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
unit: Wavefronts
|
||||
@@ -136,7 +136,7 @@ Panel Config:
|
||||
pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD) / ($max_waves_per_cu
|
||||
* $cu_per_gpu))))
|
||||
coll_level: SQ_LEVEL_WAVES
|
||||
tips:
|
||||
tips:
|
||||
Theoretical LDS Bandwidth:
|
||||
value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)))
|
||||
@@ -144,7 +144,7 @@ Panel Config:
|
||||
peak: (($max_sclk * $cu_per_gpu) * 0.128)
|
||||
pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)) / (($max_sclk * $cu_per_gpu) * 0.00128)))
|
||||
tips:
|
||||
tips:
|
||||
LDS Bank Conflicts/Access:
|
||||
value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
@@ -152,7 +152,7 @@ Panel Config:
|
||||
peak: 32
|
||||
pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32)
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache Hit Rate:
|
||||
value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
@@ -164,14 +164,14 @@ Panel Config:
|
||||
TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) /
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache BW:
|
||||
value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $cu_per_gpu)
|
||||
pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 64) * $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
@@ -179,14 +179,14 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache BW:
|
||||
value: AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * TO_INT($total_l2_chan))
|
||||
pop: ((100 * AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 64) * TO_INT($total_l2_chan)))
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read BW:
|
||||
value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -194,7 +194,7 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write BW:
|
||||
value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -202,21 +202,21 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read Latency:
|
||||
value: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write Latency:
|
||||
value: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache Hit Rate:
|
||||
value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
@@ -224,27 +224,27 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache BW:
|
||||
value: AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Hit Rate:
|
||||
value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
tips:
|
||||
tips:
|
||||
L1I BW:
|
||||
value: AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Fetch Latency:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
unit: Cycles
|
||||
|
||||
@@ -312,4 +312,4 @@ Panel Config:
|
||||
tips:
|
||||
|
||||
comparable: false # for now
|
||||
cli_style: mem_chart
|
||||
cli_style: mem_chart
|
||||
|
||||
@@ -8,4 +8,4 @@ Panel Config:
|
||||
source: roofline.csv
|
||||
comparable: false # for now
|
||||
cli_style: roofline_chart
|
||||
# TODO: refactoring the data structure to have metrics here!
|
||||
# TODO: refactoring the data structure to have metrics here!
|
||||
|
||||
@@ -27,7 +27,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE))
|
||||
if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF Stall:
|
||||
avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -36,7 +36,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Utilization:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
@@ -45,7 +45,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Stall:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
@@ -54,7 +54,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPF_CMP_UTCL1_STALL_ON_TRANSLATION) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -84,7 +84,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE))
|
||||
if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Stall Rate:
|
||||
avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -93,19 +93,19 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Packet Decoding Utilization:
|
||||
avg: AVG((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-Workgroup Manager Utilization:
|
||||
avg: AVG((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-L2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
@@ -114,7 +114,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -123,7 +123,7 @@ Panel Config:
|
||||
max: MAX(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
@@ -132,4 +132,4 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+19
-19
@@ -24,43 +24,43 @@ Panel Config:
|
||||
min: MIN(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
max: MAX(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Utilization:
|
||||
avg: AVG(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
min: MIN(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
max: MAX(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup Manager Utilization:
|
||||
avg: AVG(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
min: MIN(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
max: MAX(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Shader Engine Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
SIMD Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Workgroups:
|
||||
avg: AVG(SPI_CSN_NUM_THREADGROUPS)
|
||||
min: MIN(SPI_CSN_NUM_THREADGROUPS)
|
||||
max: MAX(SPI_CSN_NUM_THREADGROUPS)
|
||||
unit: Workgroups
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Wavefronts:
|
||||
avg: AVG(SPI_CSN_WAVE)
|
||||
min: MIN(SPI_CSN_WAVE)
|
||||
max: MAX(SPI_CSN_WAVE)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
VGPR Writes:
|
||||
avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -69,7 +69,7 @@ Panel Config:
|
||||
max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
unit: Cycles/wave
|
||||
tips:
|
||||
tips:
|
||||
SGPR Writes:
|
||||
avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -98,7 +98,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Not-scheduled Rate (Scheduler-Pipe):
|
||||
avg: AVG((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
@@ -107,7 +107,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Stall Rate:
|
||||
avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
@@ -116,52 +116,52 @@ Panel Config:
|
||||
max: MAX((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scratch Stall Rate:
|
||||
avg: AVG((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
min: MIN((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
max: MAX((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD Waveslots:
|
||||
avg: AVG(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD VGPRs:
|
||||
avg: AVG(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD SGPRs:
|
||||
avg: AVG(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU LDS:
|
||||
avg: AVG(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU Barriers:
|
||||
avg: AVG(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Workgroup Limit:
|
||||
avg: AVG(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Wavefront Limit:
|
||||
avg: AVG(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -24,61 +24,61 @@ Panel Config:
|
||||
min: MIN(Grid_Size)
|
||||
max: MAX(Grid_Size)
|
||||
unit: Work Items
|
||||
tips:
|
||||
tips:
|
||||
Workgroup Size:
|
||||
avg: AVG(Workgroup_Size)
|
||||
min: MIN(Workgroup_Size)
|
||||
max: MAX(Workgroup_Size)
|
||||
unit: Work Items
|
||||
tips:
|
||||
tips:
|
||||
Total Wavefronts:
|
||||
avg: AVG(SPI_CSN_WAVE)
|
||||
min: MIN(SPI_CSN_WAVE)
|
||||
max: MAX(SPI_CSN_WAVE)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
Saved Wavefronts:
|
||||
avg: AVG(SQ_WAVES_SAVED)
|
||||
min: MIN(SQ_WAVES_SAVED)
|
||||
max: MAX(SQ_WAVES_SAVED)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
Restored Wavefronts:
|
||||
avg: AVG(SQ_WAVES_RESTORED)
|
||||
min: MIN(SQ_WAVES_RESTORED)
|
||||
max: MAX(SQ_WAVES_RESTORED)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
VGPRs:
|
||||
avg: AVG(Arch_VGPR)
|
||||
min: MIN(Arch_VGPR)
|
||||
max: MAX(Arch_VGPR)
|
||||
unit: Registers
|
||||
tips:
|
||||
tips:
|
||||
AGPRs:
|
||||
avg: AVG(Accum_VGPR)
|
||||
min: MIN(Accum_VGPR)
|
||||
max: MAX(Accum_VGPR)
|
||||
unit: Registers
|
||||
tips:
|
||||
tips:
|
||||
SGPRs:
|
||||
avg: AVG(SGPR)
|
||||
min: MIN(SGPR)
|
||||
max: MAX(SGPR)
|
||||
unit: Registers
|
||||
tips:
|
||||
tips:
|
||||
LDS Allocation:
|
||||
avg: AVG(LDS_Per_Workgroup)
|
||||
min: MIN(LDS_Per_Workgroup)
|
||||
max: MAX(LDS_Per_Workgroup)
|
||||
unit: Bytes
|
||||
tips:
|
||||
tips:
|
||||
Scratch Allocation:
|
||||
avg: AVG(Scratch_Per_Workitem)
|
||||
min: MIN(Scratch_Per_Workitem)
|
||||
max: MAX(Scratch_Per_Workitem)
|
||||
unit: Bytes/Workitem
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 702
|
||||
@@ -96,47 +96,47 @@ Panel Config:
|
||||
min: MIN((End_Timestamp - Start_Timestamp))
|
||||
max: MAX((End_Timestamp - Start_Timestamp))
|
||||
unit: ns
|
||||
tips:
|
||||
tips:
|
||||
Kernel Time (Cycles):
|
||||
avg: AVG($GRBM_GUI_ACTIVE_PER_XCD)
|
||||
min: MIN($GRBM_GUI_ACTIVE_PER_XCD)
|
||||
max: MAX($GRBM_GUI_ACTIVE_PER_XCD)
|
||||
unit: Cycle
|
||||
tips:
|
||||
tips:
|
||||
Instructions per wavefront:
|
||||
avg: AVG((SQ_INSTS / SQ_WAVES))
|
||||
min: MIN((SQ_INSTS / SQ_WAVES))
|
||||
max: MAX((SQ_INSTS / SQ_WAVES))
|
||||
unit: Instr/wavefront
|
||||
tips:
|
||||
tips:
|
||||
Wave Cycles:
|
||||
avg: AVG(((4 * SQ_WAVE_CYCLES) / $denom))
|
||||
min: MIN(((4 * SQ_WAVE_CYCLES) / $denom))
|
||||
max: MAX(((4 * SQ_WAVE_CYCLES) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Dependency Wait Cycles:
|
||||
avg: AVG(((4 * SQ_WAIT_ANY) / $denom))
|
||||
min: MIN(((4 * SQ_WAIT_ANY) / $denom))
|
||||
max: MAX(((4 * SQ_WAIT_ANY) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Issue Wait Cycles:
|
||||
avg: AVG(((4 * SQ_WAIT_INST_ANY) / $denom))
|
||||
min: MIN(((4 * SQ_WAIT_INST_ANY) / $denom))
|
||||
max: MAX(((4 * SQ_WAIT_INST_ANY) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Active Cycles:
|
||||
avg: AVG(((4 * SQ_ACTIVE_INST_ANY) / $denom))
|
||||
min: MIN(((4 * SQ_ACTIVE_INST_ANY) / $denom))
|
||||
max: MAX(((4 * SQ_ACTIVE_INST_ANY) / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Wavefront Occupancy:
|
||||
avg: AVG((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
min: MIN((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
max: MAX((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
unit: Wavefronts
|
||||
coll_level: SQ_LEVEL_WAVES
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+25
-25
@@ -24,43 +24,43 @@ Panel Config:
|
||||
min: MIN(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom))
|
||||
max: MAX(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
VMEM:
|
||||
avg: AVG(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom))
|
||||
min: MIN(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom))
|
||||
max: MAX(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
LDS:
|
||||
avg: AVG((SQ_INSTS_LDS / $denom))
|
||||
min: MIN((SQ_INSTS_LDS / $denom))
|
||||
max: MAX((SQ_INSTS_LDS / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA:
|
||||
avg: AVG((SQ_INSTS_MFMA / $denom))
|
||||
min: MIN((SQ_INSTS_MFMA / $denom))
|
||||
max: MAX((SQ_INSTS_MFMA / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SALU:
|
||||
avg: AVG((SQ_INSTS_SALU / $denom))
|
||||
min: MIN((SQ_INSTS_SALU / $denom))
|
||||
max: MAX((SQ_INSTS_SALU / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SMEM:
|
||||
avg: AVG((SQ_INSTS_SMEM / $denom))
|
||||
min: MIN((SQ_INSTS_SMEM / $denom))
|
||||
max: MAX((SQ_INSTS_SMEM / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Branch:
|
||||
avg: AVG((SQ_INSTS_BRANCH / $denom))
|
||||
min: MIN((SQ_INSTS_BRANCH / $denom))
|
||||
max: MAX((SQ_INSTS_BRANCH / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1002
|
||||
@@ -78,91 +78,91 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_VALU_INT32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_INT32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
INT64:
|
||||
avg: AVG((SQ_INSTS_VALU_INT64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_INT64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_INT64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Conversion:
|
||||
avg: AVG((SQ_INSTS_VALU_CVT / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_CVT / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_CVT / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1003
|
||||
@@ -240,19 +240,19 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_I8 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_I8 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F16:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-BF16:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F32:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
|
||||
+26
-26
@@ -33,49 +33,49 @@ Panel Config:
|
||||
+ (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F64)))) / (End_Timestamp - Start_Timestamp)))) / (((($max_sclk
|
||||
* $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
VALU IOPs:
|
||||
value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp
|
||||
- Start_Timestamp)))) / (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 1024) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 1024) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 1024) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 1024) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA IOPs (INT8):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 1024) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 1024) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1102
|
||||
@@ -93,43 +93,43 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
IPC (Issued):
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
avg: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
@@ -138,13 +138,13 @@ Panel Config:
|
||||
max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
avg: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
min: MIN(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
max: MAX(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
MFMA Instr Cycles:
|
||||
avg: AVG(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0)
|
||||
else None))
|
||||
@@ -153,7 +153,7 @@ Panel Config:
|
||||
max: MAX(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0)
|
||||
else None))
|
||||
unit: cycles/instr
|
||||
tips:
|
||||
tips:
|
||||
VMEM Latency:
|
||||
avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_VMEM) if (SQ_INSTS_VMEM != 0)
|
||||
else None))
|
||||
@@ -209,13 +209,13 @@ Panel Config:
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) /
|
||||
$denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
IOPs (Total):
|
||||
avg: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
min: MIN(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
max: MAX(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16 OPs:
|
||||
avg: AVG(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) +
|
||||
(64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 *
|
||||
@@ -227,13 +227,13 @@ Panel Config:
|
||||
(64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 *
|
||||
SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
BF16 OPs:
|
||||
avg: AVG(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
min: MIN(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
max: MAX(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32 OPs:
|
||||
avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom))
|
||||
@@ -242,7 +242,7 @@ Panel Config:
|
||||
max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64 OPs:
|
||||
avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom))
|
||||
@@ -251,10 +251,10 @@ Panel Config:
|
||||
max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
INT8 OPs:
|
||||
avg: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
min: MIN(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
max: MAX(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -20,16 +20,16 @@ Panel Config:
|
||||
Utilization:
|
||||
value: AVG(((100 * SQ_LDS_IDX_ACTIVE) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Access Rate:
|
||||
value: AVG(((200 * SQ_ACTIVE_INST_LDS) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Theoretical Bandwidth:
|
||||
value: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)) / (($max_sclk * $cu_per_gpu) * 0.00128)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflict Rate:
|
||||
value: AVG((((SQ_LDS_BANK_CONFLICT * 3.125) / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
@@ -54,7 +54,7 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_LDS / $denom))
|
||||
max: MAX((SQ_INSTS_LDS / $denom))
|
||||
unit: (Instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Theoretical Bandwidth:
|
||||
avg: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ $denom))
|
||||
@@ -63,14 +63,14 @@ Panel Config:
|
||||
max: MAX(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ $denom))
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
LDS Latency:
|
||||
avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
min: MIN(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
unit: Cycles
|
||||
coll_level: SQ_INST_LEVEL_LDS
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflicts/Access:
|
||||
avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
@@ -79,40 +79,40 @@ Panel Config:
|
||||
max: MAX(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
unit: Conflicts/Access
|
||||
tips:
|
||||
tips:
|
||||
Index Accesses:
|
||||
avg: AVG((SQ_LDS_IDX_ACTIVE / $denom))
|
||||
min: MIN((SQ_LDS_IDX_ACTIVE / $denom))
|
||||
max: MAX((SQ_LDS_IDX_ACTIVE / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Return Cycles:
|
||||
avg: AVG((SQ_LDS_ATOMIC_RETURN / $denom))
|
||||
min: MIN((SQ_LDS_ATOMIC_RETURN / $denom))
|
||||
max: MAX((SQ_LDS_ATOMIC_RETURN / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflict:
|
||||
avg: AVG((SQ_LDS_BANK_CONFLICT / $denom))
|
||||
min: MIN((SQ_LDS_BANK_CONFLICT / $denom))
|
||||
max: MAX((SQ_LDS_BANK_CONFLICT / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Addr Conflict:
|
||||
avg: AVG((SQ_LDS_ADDR_CONFLICT / $denom))
|
||||
min: MIN((SQ_LDS_ADDR_CONFLICT / $denom))
|
||||
max: MAX((SQ_LDS_ADDR_CONFLICT / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Unaligned Stall:
|
||||
avg: AVG((SQ_LDS_UNALIGNED_STALL / $denom))
|
||||
min: MIN((SQ_LDS_UNALIGNED_STALL / $denom))
|
||||
max: MAX((SQ_LDS_UNALIGNED_STALL / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Mem Violations:
|
||||
avg: AVG((SQ_LDS_MEM_VIOLATIONS / $denom))
|
||||
min: MIN((SQ_LDS_MEM_VIOLATIONS / $denom))
|
||||
max: MAX((SQ_LDS_MEM_VIOLATIONS / $denom))
|
||||
unit: (Accesses + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -21,14 +21,14 @@ Panel Config:
|
||||
value: AVG(((SQC_ICACHE_REQ * 100000) / (($max_sclk * $sqc_per_gpu)
|
||||
* (End_Timestamp - Start_Timestamp))))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Cache Hit Rate:
|
||||
value: AVG(((SQC_ICACHE_HITS * 100) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES)
|
||||
+ SQC_ICACHE_MISSES_DUPLICATE)))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
L1I-L2 Bandwidth:
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
* (End_Timestamp - Start_Timestamp))))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
@@ -51,25 +51,25 @@ Panel Config:
|
||||
min: MIN((SQC_ICACHE_REQ / $denom))
|
||||
max: MAX((SQC_ICACHE_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Hits:
|
||||
avg: AVG((SQC_ICACHE_HITS / $denom))
|
||||
min: MIN((SQC_ICACHE_HITS / $denom))
|
||||
max: MAX((SQC_ICACHE_HITS / $denom))
|
||||
unit: (Hits + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses - Non Duplicated:
|
||||
avg: AVG((SQC_ICACHE_MISSES / $denom))
|
||||
min: MIN((SQC_ICACHE_MISSES / $denom))
|
||||
max: MAX((SQC_ICACHE_MISSES / $denom))
|
||||
unit: (Misses + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses - Duplicated:
|
||||
avg: AVG((SQC_ICACHE_MISSES_DUPLICATE / $denom))
|
||||
min: MIN((SQC_ICACHE_MISSES_DUPLICATE / $denom))
|
||||
max: MAX((SQC_ICACHE_MISSES_DUPLICATE / $denom))
|
||||
unit: (Misses + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache Hit Rate:
|
||||
avg: AVG(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES)
|
||||
+ SQC_ICACHE_MISSES_DUPLICATE)))
|
||||
@@ -78,7 +78,7 @@ Panel Config:
|
||||
max: MAX(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES)
|
||||
+ SQC_ICACHE_MISSES_DUPLICATE)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Instruction Fetch Latency:
|
||||
avg: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
min: MIN((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
@@ -102,4 +102,4 @@ Panel Config:
|
||||
min: MIN(((SQC_TC_INST_REQ * 64) / $denom))
|
||||
max: MAX(((SQC_TC_INST_REQ * 64) / $denom))
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -51,25 +51,25 @@ Panel Config:
|
||||
min: MIN((SQC_DCACHE_REQ / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Hits:
|
||||
avg: AVG((SQC_DCACHE_HITS / $denom))
|
||||
min: MIN((SQC_DCACHE_HITS / $denom))
|
||||
max: MAX((SQC_DCACHE_HITS / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses - Non Duplicated:
|
||||
avg: AVG((SQC_DCACHE_MISSES / $denom))
|
||||
min: MIN((SQC_DCACHE_MISSES / $denom))
|
||||
max: MAX((SQC_DCACHE_MISSES / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Misses- Duplicated:
|
||||
avg: AVG((SQC_DCACHE_MISSES_DUPLICATE / $denom))
|
||||
min: MIN((SQC_DCACHE_MISSES_DUPLICATE / $denom))
|
||||
max: MAX((SQC_DCACHE_MISSES_DUPLICATE / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache Hit Rate:
|
||||
avg: AVG((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES)
|
||||
+ SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES)
|
||||
@@ -81,7 +81,7 @@ Panel Config:
|
||||
+ SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES)
|
||||
+ SQC_DCACHE_MISSES_DUPLICATE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Read Req (Total):
|
||||
avg: AVG((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4)
|
||||
+ SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom))
|
||||
@@ -90,37 +90,37 @@ Panel Config:
|
||||
max: MAX((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4)
|
||||
+ SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Req:
|
||||
avg: AVG((SQC_DCACHE_ATOMIC / $denom))
|
||||
min: MIN((SQC_DCACHE_ATOMIC / $denom))
|
||||
max: MAX((SQC_DCACHE_ATOMIC / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (1 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_1 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_1 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_1 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (2 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_2 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_2 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_2 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (4 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_4 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_4 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_4 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (8 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_8 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_8 / $denom))
|
||||
max: MAX((SQC_DCACHE_REQ_READ_8 / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req (16 DWord):
|
||||
avg: AVG((SQC_DCACHE_REQ_READ_16 / $denom))
|
||||
min: MIN((SQC_DCACHE_REQ_READ_16 / $denom))
|
||||
@@ -150,22 +150,22 @@ Panel Config:
|
||||
min: MIN((SQC_TC_DATA_READ_REQ / $denom))
|
||||
max: MAX((SQC_TC_DATA_READ_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Req:
|
||||
avg: AVG((SQC_TC_DATA_WRITE_REQ / $denom))
|
||||
min: MIN((SQC_TC_DATA_WRITE_REQ / $denom))
|
||||
max: MAX((SQC_TC_DATA_WRITE_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Req:
|
||||
avg: AVG((SQC_TC_DATA_ATOMIC_REQ / $denom))
|
||||
min: MIN((SQC_TC_DATA_ATOMIC_REQ / $denom))
|
||||
max: MAX((SQC_TC_DATA_ATOMIC_REQ / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Stall Cycles:
|
||||
avg: AVG((SQC_TC_STALL / $denom))
|
||||
min: MIN((SQC_TC_STALL / $denom))
|
||||
max: MAX((SQC_TC_STALL / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -24,91 +24,91 @@ Panel Config:
|
||||
min: MIN(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data Stall:
|
||||
avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data-Processor → Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Total Instructions:
|
||||
avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Instructions:
|
||||
avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Read Instructions:
|
||||
avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Write Instructions:
|
||||
avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Atomic Instructions:
|
||||
avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Instructions:
|
||||
avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Read Instructions:
|
||||
avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Write Instructions:
|
||||
avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Atomic Instructions:
|
||||
avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Total Cycles:
|
||||
avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Read:
|
||||
avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Write:
|
||||
avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
@@ -132,25 +132,25 @@ Panel Config:
|
||||
min: MIN(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache RAM → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup manager → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Coalescable Instructions:
|
||||
avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Instructions:
|
||||
avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
@@ -159,16 +159,16 @@ Panel Config:
|
||||
max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Instructions:
|
||||
avg: AVG((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Instructions:
|
||||
avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -23,17 +23,17 @@ Panel Config:
|
||||
/ TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Bandwidth:
|
||||
value: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 64) * $cu_per_gpu))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Utilization:
|
||||
value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum
|
||||
!= 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Coalescing:
|
||||
value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum
|
||||
* 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None))
|
||||
@@ -93,19 +93,19 @@ Panel Config:
|
||||
min: MIN((TCP_TOTAL_ACCESSES_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_ACCESSES_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Req:
|
||||
avg: AVG((TCP_TOTAL_READ_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_READ_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_READ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Req:
|
||||
avg: AVG((TCP_TOTAL_WRITE_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_WRITE_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_WRITE_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Req:
|
||||
avg: AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum)
|
||||
/ $denom))
|
||||
@@ -135,13 +135,13 @@ Panel Config:
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache Accesses:
|
||||
avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Cache Hits:
|
||||
avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
@@ -153,13 +153,13 @@ Panel Config:
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
/ $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Invalidations:
|
||||
avg: AVG((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom))
|
||||
max: MAX((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 BW:
|
||||
avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom))
|
||||
@@ -174,13 +174,13 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Write:
|
||||
avg: AVG((TCP_TCC_WRITE_REQ_sum / $denom))
|
||||
min: MIN((TCP_TCC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Atomic:
|
||||
avg: AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)
|
||||
/ $denom))
|
||||
@@ -189,7 +189,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)
|
||||
/ $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
L1 Access Latency:
|
||||
avg: AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum
|
||||
!= 0) else None))
|
||||
@@ -198,7 +198,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Read Latency:
|
||||
avg: AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum))
|
||||
if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None))
|
||||
@@ -207,7 +207,7 @@ Panel Config:
|
||||
max: MAX(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum))
|
||||
if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None))
|
||||
unit: Cycles
|
||||
tips:
|
||||
tips:
|
||||
L1-L2 Write Latency:
|
||||
avg: AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else
|
||||
@@ -219,7 +219,7 @@ Panel Config:
|
||||
if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else
|
||||
None))
|
||||
unit: Cycles
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1604
|
||||
@@ -241,7 +241,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_NC_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_NC_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
UC - Read:
|
||||
xfer: Read
|
||||
coherency: UC
|
||||
@@ -249,7 +249,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_UC_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_UC_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
CC - Read:
|
||||
xfer: Read
|
||||
coherency: CC
|
||||
@@ -257,7 +257,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_CC_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_CC_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
RW - Read:
|
||||
xfer: Read
|
||||
coherency: RW
|
||||
@@ -265,7 +265,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_RW_READ_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_RW_READ_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
RW - Write:
|
||||
xfer: Write
|
||||
coherency: RW
|
||||
@@ -273,7 +273,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_RW_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_RW_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
NC - Write:
|
||||
xfer: Write
|
||||
coherency: NC
|
||||
@@ -281,7 +281,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_NC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_NC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
UC - Write:
|
||||
xfer: Write
|
||||
coherency: UC
|
||||
@@ -289,7 +289,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_UC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_UC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
CC - Write:
|
||||
xfer: Write
|
||||
coherency: CC
|
||||
@@ -297,7 +297,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_CC_WRITE_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_CC_WRITE_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
NC - Atomic:
|
||||
xfer: Atomic
|
||||
coherency: NC
|
||||
@@ -305,7 +305,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_NC_ATOMIC_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_NC_ATOMIC_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
UC - Atomic:
|
||||
xfer: Atomic
|
||||
coherency: UC
|
||||
@@ -313,7 +313,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_UC_ATOMIC_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_UC_ATOMIC_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
CC - Atomic:
|
||||
xfer: Atomic
|
||||
coherency: CC
|
||||
@@ -321,7 +321,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_CC_ATOMIC_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_CC_ATOMIC_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
RW - Atomic:
|
||||
xfer: Atomic
|
||||
coherency: RW
|
||||
@@ -329,7 +329,7 @@ Panel Config:
|
||||
min: MIN((TCP_TCC_RW_ATOMIC_REQ_sum / $denom))
|
||||
max: MAX((TCP_TCC_RW_ATOMIC_REQ_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1605
|
||||
@@ -347,7 +347,7 @@ Panel Config:
|
||||
min: MIN((TCP_UTCL1_REQUEST_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_REQUEST_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Hit Ratio:
|
||||
avg: AVG((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if
|
||||
(TCP_UTCL1_REQUEST_sum != 0) else None))
|
||||
@@ -356,22 +356,22 @@ Panel Config:
|
||||
max: MAX((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if
|
||||
(TCP_UTCL1_REQUEST_sum != 0) else None))
|
||||
units: pct
|
||||
tips:
|
||||
tips:
|
||||
Hits:
|
||||
avg: AVG((TCP_UTCL1_TRANSLATION_HIT_sum / $denom))
|
||||
min: MIN((TCP_UTCL1_TRANSLATION_HIT_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_TRANSLATION_HIT_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Translation Misses:
|
||||
avg: AVG((TCP_UTCL1_TRANSLATION_MISS_sum / $denom))
|
||||
min: MIN((TCP_UTCL1_TRANSLATION_MISS_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_TRANSLATION_MISS_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Permission Misses:
|
||||
avg: AVG((TCP_UTCL1_PERMISSION_MISS_sum / $denom))
|
||||
min: MIN((TCP_UTCL1_PERMISSION_MISS_sum / $denom))
|
||||
max: MAX((TCP_UTCL1_PERMISSION_MISS_sum / $denom))
|
||||
units: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -24,7 +24,7 @@ Panel Config:
|
||||
Bandwidth:
|
||||
value: ((100 * AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp)))) / ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else 0))
|
||||
@@ -168,7 +168,7 @@ Panel Config:
|
||||
min: MIN((TCC_REQ_sum * 128) / $denom)
|
||||
max: MAX((TCC_REQ_sum * 128) / $denom)
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Req:
|
||||
avg: AVG((TCC_REQ_sum / $denom))
|
||||
min: MIN((TCC_REQ_sum / $denom))
|
||||
@@ -429,4 +429,4 @@ Panel Config:
|
||||
min: MIN((TCC_EA_ATOMIC_sum / $denom))
|
||||
max: MAX((TCC_EA_ATOMIC_sum / $denom))
|
||||
unit: (Req + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -166,7 +166,7 @@ Panel Config:
|
||||
+ (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30]
|
||||
+ TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
# FIXME: other arggr metrics!!
|
||||
|
||||
- metric_table:
|
||||
@@ -332,4 +332,4 @@ Panel Config:
|
||||
ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[::_1]) / $denom))
|
||||
placeholder_range:
|
||||
"::_1": $total_l2_chan
|
||||
cli_style: simple_multiple_bar
|
||||
cli_style: simple_multiple_bar
|
||||
|
||||
+30
-30
@@ -34,67 +34,67 @@ Panel Config:
|
||||
+ (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F64)))) / (End_Timestamp - Start_Timestamp)))) / (((($max_sclk
|
||||
* $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
VALU IOPs:
|
||||
value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp
|
||||
- Start_Timestamp)))) / (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA IOPs (Int8):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 8192) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 8192) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
Active CUs:
|
||||
value: $numActiveCUs
|
||||
unit: CUs
|
||||
peak: $cu_per_gpu
|
||||
pop: ((100 * $numActiveCUs) / $cu_per_gpu)
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
value: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / (($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)
|
||||
* 4)))
|
||||
@@ -102,32 +102,32 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / (($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)
|
||||
* 4)))
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
value: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
value: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
peak: $wave_size
|
||||
pop: (100 * AVG((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU / $wave_size) if (SQ_ACTIVE_INST_VALU != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
IPC:
|
||||
value: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
peak: 5
|
||||
pop: ((100 * AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))) / 5)
|
||||
tips:
|
||||
tips:
|
||||
Wavefront Occupancy:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
unit: Wavefronts
|
||||
@@ -135,7 +135,7 @@ Panel Config:
|
||||
pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD) / ($max_waves_per_cu
|
||||
* $cu_per_gpu))))
|
||||
coll_level: SQ_LEVEL_WAVES
|
||||
tips:
|
||||
tips:
|
||||
Theoretical LDS Bandwidth:
|
||||
value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)))
|
||||
@@ -143,7 +143,7 @@ Panel Config:
|
||||
peak: (($max_sclk * $cu_per_gpu) * 0.128)
|
||||
pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)) / (($max_sclk * $cu_per_gpu) * 0.00128)))
|
||||
tips:
|
||||
tips:
|
||||
LDS Bank Conflicts/Access:
|
||||
value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
@@ -151,7 +151,7 @@ Panel Config:
|
||||
peak: 32
|
||||
pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32)
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache Hit Rate:
|
||||
value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
@@ -163,14 +163,14 @@ Panel Config:
|
||||
TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) /
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache BW:
|
||||
value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 128) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 128) * $cu_per_gpu)
|
||||
pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 128) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 128) * $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
@@ -178,14 +178,14 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache BW:
|
||||
value: AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan))
|
||||
pop: ((100 * AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan)))
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read BW:
|
||||
value: AVG((((TCC_EA0_RDREQ_32B_sum * 32) + ((TCC_EA0_RDREQ_sum - TCC_EA0_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -193,7 +193,7 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA0_RDREQ_32B_sum * 32) + ((TCC_EA0_RDREQ_sum - TCC_EA0_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write BW:
|
||||
value: AVG((((TCC_EA0_WRREQ_64B_sum * 64) + ((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -201,21 +201,21 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA0_WRREQ_64B_sum * 64) + ((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read Latency:
|
||||
value: AVG(((TCC_EA0_RDREQ_LEVEL_sum / TCC_EA0_RDREQ_sum) if (TCC_EA0_RDREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write Latency:
|
||||
value: AVG(((TCC_EA0_WRREQ_LEVEL_sum / TCC_EA0_WRREQ_sum) if (TCC_EA0_WRREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache Hit Rate:
|
||||
value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
@@ -223,27 +223,27 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache BW:
|
||||
value: AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Hit Rate:
|
||||
value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
tips:
|
||||
tips:
|
||||
L1I BW:
|
||||
value: AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Fetch Latency:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
unit: Cycles
|
||||
|
||||
@@ -27,7 +27,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE))
|
||||
if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF Stall:
|
||||
avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -36,7 +36,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Utilization:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
@@ -45,7 +45,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Stall:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
@@ -54,7 +54,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPF_CMP_UTCL1_STALL_ON_TRANSLATION) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -84,7 +84,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE))
|
||||
if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Stall Rate:
|
||||
avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -93,19 +93,19 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Packet Decoding Utilization:
|
||||
avg: AVG((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-Workgroup Manager Utilization:
|
||||
avg: AVG((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-L2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
@@ -114,7 +114,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -123,7 +123,7 @@ Panel Config:
|
||||
max: MAX(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
@@ -132,4 +132,4 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+19
-19
@@ -24,43 +24,43 @@ Panel Config:
|
||||
min: MIN(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
max: MAX(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Utilization:
|
||||
avg: AVG(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
min: MIN(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
max: MAX(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup Manager Utilization:
|
||||
avg: AVG(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
min: MIN(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
max: MAX(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Shader Engine Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
SIMD Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Workgroups:
|
||||
avg: AVG(SPI_CSN_NUM_THREADGROUPS)
|
||||
min: MIN(SPI_CSN_NUM_THREADGROUPS)
|
||||
max: MAX(SPI_CSN_NUM_THREADGROUPS)
|
||||
unit: Workgroups
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Wavefronts:
|
||||
avg: AVG(SPI_CSN_WAVE)
|
||||
min: MIN(SPI_CSN_WAVE)
|
||||
max: MAX(SPI_CSN_WAVE)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
VGPR Writes:
|
||||
avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -69,7 +69,7 @@ Panel Config:
|
||||
max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
unit: Cycles/wave
|
||||
tips:
|
||||
tips:
|
||||
SGPR Writes:
|
||||
avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -98,7 +98,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Not-scheduled Rate (Scheduler-Pipe):
|
||||
avg: AVG((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
@@ -107,7 +107,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Stall Rate:
|
||||
avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
@@ -116,52 +116,52 @@ Panel Config:
|
||||
max: MAX((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scratch Stall Rate:
|
||||
avg: AVG((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
min: MIN((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
max: MAX((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD Waveslots:
|
||||
avg: AVG(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD VGPRs:
|
||||
avg: AVG(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD SGPRs:
|
||||
avg: AVG(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU LDS:
|
||||
avg: AVG(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU Barriers:
|
||||
avg: AVG(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Workgroup Limit:
|
||||
avg: AVG(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Wavefront Limit:
|
||||
avg: AVG(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+27
-27
@@ -24,7 +24,7 @@ Panel Config:
|
||||
min: MIN(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom))
|
||||
max: MAX(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
VMEM:
|
||||
# TODO: need to fix this when the new FLAT/LDS counts
|
||||
# are present in ROCm
|
||||
@@ -32,7 +32,7 @@ Panel Config:
|
||||
min: MIN(((SQ_INSTS_VMEM) / $denom))
|
||||
max: MAX(((SQ_INSTS_VMEM) / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
LDS:
|
||||
# TODO: need to fix this when the new FLAT/LDS counts
|
||||
# are present in ROCm
|
||||
@@ -40,31 +40,31 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_LDS / $denom))
|
||||
max: MAX((SQ_INSTS_LDS / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA:
|
||||
avg: AVG((SQ_INSTS_MFMA / $denom))
|
||||
min: MIN((SQ_INSTS_MFMA / $denom))
|
||||
max: MAX((SQ_INSTS_MFMA / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SALU:
|
||||
avg: AVG((SQ_INSTS_SALU / $denom))
|
||||
min: MIN((SQ_INSTS_SALU / $denom))
|
||||
max: MAX((SQ_INSTS_SALU / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SMEM:
|
||||
avg: AVG((SQ_INSTS_SMEM / $denom))
|
||||
min: MIN((SQ_INSTS_SMEM / $denom))
|
||||
max: MAX((SQ_INSTS_SMEM / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Branch:
|
||||
avg: AVG((SQ_INSTS_BRANCH / $denom))
|
||||
min: MIN((SQ_INSTS_BRANCH / $denom))
|
||||
max: MAX((SQ_INSTS_BRANCH / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1002
|
||||
@@ -82,91 +82,91 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_VALU_INT32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_INT32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
INT64:
|
||||
avg: AVG((SQ_INSTS_VALU_INT64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_INT64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_INT64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Conversion:
|
||||
avg: AVG((SQ_INSTS_VALU_CVT / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_CVT / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_CVT / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1003
|
||||
@@ -244,28 +244,28 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_I8 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_I8 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F16:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-BF16:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F32:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F64:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+26
-26
@@ -33,49 +33,49 @@ Panel Config:
|
||||
+ (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F64)))) / (End_Timestamp - Start_Timestamp)))) / (((($max_sclk
|
||||
* $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
VALU IOPs:
|
||||
value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp
|
||||
- Start_Timestamp)))) / (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA IOPs (INT8):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 8192) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 8192) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1102
|
||||
@@ -93,43 +93,43 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
IPC (Issued):
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
avg: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
@@ -138,13 +138,13 @@ Panel Config:
|
||||
max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
avg: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
min: MIN(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
max: MAX(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
MFMA Instr Cycles:
|
||||
avg: AVG(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0)
|
||||
else None))
|
||||
@@ -153,7 +153,7 @@ Panel Config:
|
||||
max: MAX(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0)
|
||||
else None))
|
||||
unit: cycles/instr
|
||||
tips:
|
||||
tips:
|
||||
VMEM Latency:
|
||||
avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_VMEM) if (SQ_INSTS_VMEM != 0)
|
||||
else None))
|
||||
@@ -209,13 +209,13 @@ Panel Config:
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) /
|
||||
$denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
IOPs (Total):
|
||||
avg: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
min: MIN(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
max: MAX(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16 OPs:
|
||||
avg: AVG(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) +
|
||||
(64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 *
|
||||
@@ -227,13 +227,13 @@ Panel Config:
|
||||
(64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 *
|
||||
SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
BF16 OPs:
|
||||
avg: AVG(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
min: MIN(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
max: MAX(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32 OPs:
|
||||
avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom))
|
||||
@@ -242,7 +242,7 @@ Panel Config:
|
||||
max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64 OPs:
|
||||
avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom))
|
||||
@@ -251,10 +251,10 @@ Panel Config:
|
||||
max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
INT8 OPs:
|
||||
avg: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
min: MIN(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
max: MAX(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -70,7 +70,7 @@ Panel Config:
|
||||
max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
unit: Cycles
|
||||
coll_level: SQ_INST_LEVEL_LDS
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflicts/Access:
|
||||
avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
|
||||
@@ -28,7 +28,7 @@ Panel Config:
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
L1I-L2 Bandwidth:
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
* (End_Timestamp - Start_Timestamp))))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
|
||||
@@ -24,91 +24,91 @@ Panel Config:
|
||||
min: MIN(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data Stall:
|
||||
avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data-Processor → Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Total Instructions:
|
||||
avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Instructions:
|
||||
avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Read Instructions:
|
||||
avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Write Instructions:
|
||||
avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Atomic Instructions:
|
||||
avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Instructions:
|
||||
avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Read Instructions:
|
||||
avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Write Instructions:
|
||||
avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Atomic Instructions:
|
||||
avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Total Cycles:
|
||||
avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Read:
|
||||
avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Write:
|
||||
avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
@@ -132,25 +132,25 @@ Panel Config:
|
||||
min: MIN(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache RAM → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup manager → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Coalescable Instructions:
|
||||
avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Instructions:
|
||||
avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
@@ -159,16 +159,16 @@ Panel Config:
|
||||
max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Instructions:
|
||||
avg: AVG((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Instructions:
|
||||
avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -33,12 +33,12 @@ Panel Config:
|
||||
value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum
|
||||
!= 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Coalescing:
|
||||
value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum
|
||||
* 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
comparable: false # for now
|
||||
cli_style: simple_bar
|
||||
|
||||
@@ -135,7 +135,7 @@ Panel Config:
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache Accesses:
|
||||
avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
|
||||
@@ -24,7 +24,7 @@ Panel Config:
|
||||
Bandwidth:
|
||||
value: ((100 * AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp)))) / ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else 0))
|
||||
@@ -171,7 +171,7 @@ Panel Config:
|
||||
min: MIN((TCC_REQ_sum * 128) / $denom)
|
||||
max: MAX((TCC_REQ_sum * 128) / $denom)
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Req:
|
||||
avg: AVG((TCC_REQ_sum / $denom))
|
||||
min: MIN((TCC_REQ_sum / $denom))
|
||||
|
||||
+30
-30
@@ -34,67 +34,67 @@ Panel Config:
|
||||
+ (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F64)))) / (End_Timestamp - Start_Timestamp)))) / (((($max_sclk
|
||||
* $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
VALU IOPs:
|
||||
value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp
|
||||
- Start_Timestamp)))) / (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA IOPs (Int8):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 8192) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 8192) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
Active CUs:
|
||||
value: $numActiveCUs
|
||||
unit: CUs
|
||||
peak: $cu_per_gpu
|
||||
pop: ((100 * $numActiveCUs) / $cu_per_gpu)
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
value: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / (($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)
|
||||
* 4)))
|
||||
@@ -102,32 +102,32 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / (($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)
|
||||
* 4)))
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
value: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
value: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
peak: $wave_size
|
||||
pop: (100 * AVG((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU / $wave_size) if (SQ_ACTIVE_INST_VALU != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
IPC:
|
||||
value: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
peak: 5
|
||||
pop: ((100 * AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))) / 5)
|
||||
tips:
|
||||
tips:
|
||||
Wavefront Occupancy:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
unit: Wavefronts
|
||||
@@ -135,7 +135,7 @@ Panel Config:
|
||||
pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD) / ($max_waves_per_cu
|
||||
* $cu_per_gpu))))
|
||||
coll_level: SQ_LEVEL_WAVES
|
||||
tips:
|
||||
tips:
|
||||
Theoretical LDS Bandwidth:
|
||||
value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)))
|
||||
@@ -143,7 +143,7 @@ Panel Config:
|
||||
peak: (($max_sclk * $cu_per_gpu) * 0.128)
|
||||
pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)) / (($max_sclk * $cu_per_gpu) * 0.00128)))
|
||||
tips:
|
||||
tips:
|
||||
LDS Bank Conflicts/Access:
|
||||
value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
@@ -151,7 +151,7 @@ Panel Config:
|
||||
peak: 32
|
||||
pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32)
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache Hit Rate:
|
||||
value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
@@ -163,14 +163,14 @@ Panel Config:
|
||||
TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) /
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache BW:
|
||||
value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 128) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 128) * $cu_per_gpu)
|
||||
pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 128) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 128) * $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
@@ -178,14 +178,14 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache BW:
|
||||
value: AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan))
|
||||
pop: ((100 * AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan)))
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read BW:
|
||||
value: AVG((((TCC_EA0_RDREQ_32B_sum * 32) + ((TCC_EA0_RDREQ_sum - TCC_EA0_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -193,7 +193,7 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA0_RDREQ_32B_sum * 32) + ((TCC_EA0_RDREQ_sum - TCC_EA0_RDREQ_32B_sum)
|
||||
* 64)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write BW:
|
||||
value: AVG((((TCC_EA0_WRREQ_64B_sum * 64) + ((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -201,21 +201,21 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA0_WRREQ_64B_sum * 64) + ((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read Latency:
|
||||
value: AVG(((TCC_EA0_RDREQ_LEVEL_sum / TCC_EA0_RDREQ_sum) if (TCC_EA0_RDREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write Latency:
|
||||
value: AVG(((TCC_EA0_WRREQ_LEVEL_sum / TCC_EA0_WRREQ_sum) if (TCC_EA0_WRREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache Hit Rate:
|
||||
value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
@@ -223,27 +223,27 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache BW:
|
||||
value: AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Hit Rate:
|
||||
value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
tips:
|
||||
tips:
|
||||
L1I BW:
|
||||
value: AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Fetch Latency:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
unit: Cycles
|
||||
|
||||
@@ -27,7 +27,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE))
|
||||
if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF Stall:
|
||||
avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -36,7 +36,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Utilization:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
@@ -45,7 +45,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Stall:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
@@ -54,7 +54,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPF_CMP_UTCL1_STALL_ON_TRANSLATION) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -84,7 +84,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE))
|
||||
if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Stall Rate:
|
||||
avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -93,19 +93,19 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Packet Decoding Utilization:
|
||||
avg: AVG((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-Workgroup Manager Utilization:
|
||||
avg: AVG((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-L2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
@@ -114,7 +114,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -123,7 +123,7 @@ Panel Config:
|
||||
max: MAX(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
@@ -132,4 +132,4 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+19
-19
@@ -24,43 +24,43 @@ Panel Config:
|
||||
min: MIN(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
max: MAX(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Utilization:
|
||||
avg: AVG(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
min: MIN(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
max: MAX(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup Manager Utilization:
|
||||
avg: AVG(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
min: MIN(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
max: MAX(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Shader Engine Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
SIMD Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Workgroups:
|
||||
avg: AVG(SPI_CSN_NUM_THREADGROUPS)
|
||||
min: MIN(SPI_CSN_NUM_THREADGROUPS)
|
||||
max: MAX(SPI_CSN_NUM_THREADGROUPS)
|
||||
unit: Workgroups
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Wavefronts:
|
||||
avg: AVG(SPI_CSN_WAVE)
|
||||
min: MIN(SPI_CSN_WAVE)
|
||||
max: MAX(SPI_CSN_WAVE)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
VGPR Writes:
|
||||
avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -69,7 +69,7 @@ Panel Config:
|
||||
max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
unit: Cycles/wave
|
||||
tips:
|
||||
tips:
|
||||
SGPR Writes:
|
||||
avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -98,7 +98,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Not-scheduled Rate (Scheduler-Pipe):
|
||||
avg: AVG((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
@@ -107,7 +107,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Stall Rate:
|
||||
avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
@@ -116,52 +116,52 @@ Panel Config:
|
||||
max: MAX((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scratch Stall Rate:
|
||||
avg: AVG((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
min: MIN((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
max: MAX((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD Waveslots:
|
||||
avg: AVG(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD VGPRs:
|
||||
avg: AVG(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD SGPRs:
|
||||
avg: AVG(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU LDS:
|
||||
avg: AVG(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU Barriers:
|
||||
avg: AVG(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Workgroup Limit:
|
||||
avg: AVG(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Wavefront Limit:
|
||||
avg: AVG(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+27
-27
@@ -24,7 +24,7 @@ Panel Config:
|
||||
min: MIN(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom))
|
||||
max: MAX(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
VMEM:
|
||||
# TODO: need to fix this when the new FLAT/LDS counts
|
||||
# are present in ROCm
|
||||
@@ -32,7 +32,7 @@ Panel Config:
|
||||
min: MIN(((SQ_INSTS_VMEM) / $denom))
|
||||
max: MAX(((SQ_INSTS_VMEM) / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
LDS:
|
||||
# TODO: need to fix this when the new FLAT/LDS counts
|
||||
# are present in ROCm
|
||||
@@ -40,31 +40,31 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_LDS / $denom))
|
||||
max: MAX((SQ_INSTS_LDS / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA:
|
||||
avg: AVG((SQ_INSTS_MFMA / $denom))
|
||||
min: MIN((SQ_INSTS_MFMA / $denom))
|
||||
max: MAX((SQ_INSTS_MFMA / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SALU:
|
||||
avg: AVG((SQ_INSTS_SALU / $denom))
|
||||
min: MIN((SQ_INSTS_SALU / $denom))
|
||||
max: MAX((SQ_INSTS_SALU / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SMEM:
|
||||
avg: AVG((SQ_INSTS_SMEM / $denom))
|
||||
min: MIN((SQ_INSTS_SMEM / $denom))
|
||||
max: MAX((SQ_INSTS_SMEM / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Branch:
|
||||
avg: AVG((SQ_INSTS_BRANCH / $denom))
|
||||
min: MIN((SQ_INSTS_BRANCH / $denom))
|
||||
max: MAX((SQ_INSTS_BRANCH / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1002
|
||||
@@ -82,91 +82,91 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_VALU_INT32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_INT32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
INT64:
|
||||
avg: AVG((SQ_INSTS_VALU_INT64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_INT64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_INT64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Conversion:
|
||||
avg: AVG((SQ_INSTS_VALU_CVT / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_CVT / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_CVT / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1003
|
||||
@@ -244,28 +244,28 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_I8 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_I8 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F16:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-BF16:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F32:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F64:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+26
-26
@@ -33,49 +33,49 @@ Panel Config:
|
||||
+ (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F64)))) / (End_Timestamp - Start_Timestamp)))) / (((($max_sclk
|
||||
* $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
VALU IOPs:
|
||||
value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp
|
||||
- Start_Timestamp)))) / (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA IOPs (INT8):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 8192) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 8192) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1102
|
||||
@@ -93,43 +93,43 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
IPC (Issued):
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
avg: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
@@ -138,13 +138,13 @@ Panel Config:
|
||||
max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
avg: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
min: MIN(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
max: MAX(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
MFMA Instr Cycles:
|
||||
avg: AVG(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0)
|
||||
else None))
|
||||
@@ -153,7 +153,7 @@ Panel Config:
|
||||
max: MAX(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0)
|
||||
else None))
|
||||
unit: cycles/instr
|
||||
tips:
|
||||
tips:
|
||||
VMEM Latency:
|
||||
avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_VMEM) if (SQ_INSTS_VMEM != 0)
|
||||
else None))
|
||||
@@ -209,13 +209,13 @@ Panel Config:
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) /
|
||||
$denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
IOPs (Total):
|
||||
avg: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
min: MIN(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
max: MAX(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16 OPs:
|
||||
avg: AVG(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) +
|
||||
(64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 *
|
||||
@@ -227,13 +227,13 @@ Panel Config:
|
||||
(64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 *
|
||||
SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
BF16 OPs:
|
||||
avg: AVG(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
min: MIN(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
max: MAX(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32 OPs:
|
||||
avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom))
|
||||
@@ -242,7 +242,7 @@ Panel Config:
|
||||
max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64 OPs:
|
||||
avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom))
|
||||
@@ -251,10 +251,10 @@ Panel Config:
|
||||
max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
INT8 OPs:
|
||||
avg: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
min: MIN(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
max: MAX(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -70,7 +70,7 @@ Panel Config:
|
||||
max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
unit: Cycles
|
||||
coll_level: SQ_INST_LEVEL_LDS
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflicts/Access:
|
||||
avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
|
||||
@@ -28,7 +28,7 @@ Panel Config:
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
L1I-L2 Bandwidth:
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
* (End_Timestamp - Start_Timestamp))))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
|
||||
@@ -24,91 +24,91 @@ Panel Config:
|
||||
min: MIN(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data Stall:
|
||||
avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data-Processor → Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Total Instructions:
|
||||
avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Instructions:
|
||||
avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Read Instructions:
|
||||
avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Write Instructions:
|
||||
avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Atomic Instructions:
|
||||
avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Instructions:
|
||||
avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Read Instructions:
|
||||
avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Write Instructions:
|
||||
avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Atomic Instructions:
|
||||
avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Total Cycles:
|
||||
avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Read:
|
||||
avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Write:
|
||||
avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
@@ -132,25 +132,25 @@ Panel Config:
|
||||
min: MIN(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache RAM → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup manager → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Coalescable Instructions:
|
||||
avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Instructions:
|
||||
avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
@@ -159,16 +159,16 @@ Panel Config:
|
||||
max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Instructions:
|
||||
avg: AVG((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Instructions:
|
||||
avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -33,12 +33,12 @@ Panel Config:
|
||||
value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum
|
||||
!= 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Coalescing:
|
||||
value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum
|
||||
* 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
comparable: false # for now
|
||||
cli_style: simple_bar
|
||||
|
||||
@@ -135,7 +135,7 @@ Panel Config:
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache Accesses:
|
||||
avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
|
||||
@@ -24,7 +24,7 @@ Panel Config:
|
||||
Bandwidth:
|
||||
value: ((100 * AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp)))) / ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else 0))
|
||||
@@ -171,7 +171,7 @@ Panel Config:
|
||||
min: MIN((TCC_REQ_sum * 128) / $denom)
|
||||
max: MAX((TCC_REQ_sum * 128) / $denom)
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Req:
|
||||
avg: AVG((TCC_REQ_sum / $denom))
|
||||
min: MIN((TCC_REQ_sum / $denom))
|
||||
|
||||
+32
-32
@@ -34,67 +34,67 @@ Panel Config:
|
||||
+ (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F64)))) / (End_Timestamp - Start_Timestamp)))) / (((($max_sclk
|
||||
* $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
VALU IOPs:
|
||||
value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp
|
||||
- Start_Timestamp)))) / (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA IOPs (Int8):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 8192) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 8192) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
Active CUs:
|
||||
value: $numActiveCUs
|
||||
unit: CUs
|
||||
peak: $cu_per_gpu
|
||||
pop: ((100 * $numActiveCUs) / $cu_per_gpu)
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
value: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
value: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / (($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)
|
||||
* 4)))
|
||||
@@ -102,32 +102,32 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / (($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)
|
||||
* 4)))
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
value: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
value: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
peak: $wave_size
|
||||
pop: (100 * AVG((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU / $wave_size) if (SQ_ACTIVE_INST_VALU != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
IPC:
|
||||
value: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
peak: 5
|
||||
pop: ((100 * AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES))) / 5)
|
||||
tips:
|
||||
tips:
|
||||
Wavefront Occupancy:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD))
|
||||
unit: Wavefronts
|
||||
@@ -135,7 +135,7 @@ Panel Config:
|
||||
pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / $GRBM_GUI_ACTIVE_PER_XCD) / ($max_waves_per_cu
|
||||
* $cu_per_gpu))))
|
||||
coll_level: SQ_LEVEL_WAVES
|
||||
tips:
|
||||
tips:
|
||||
Theoretical LDS Bandwidth:
|
||||
value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)))
|
||||
@@ -143,7 +143,7 @@ Panel Config:
|
||||
peak: (($max_sclk * $cu_per_gpu) * 0.128)
|
||||
pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($lds_banks_per_cu))
|
||||
/ (End_Timestamp - Start_Timestamp)) / (($max_sclk * $cu_per_gpu) * 0.00128)))
|
||||
tips:
|
||||
tips:
|
||||
LDS Bank Conflicts/Access:
|
||||
value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
@@ -151,7 +151,7 @@ Panel Config:
|
||||
peak: 32
|
||||
pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32)
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache Hit Rate:
|
||||
value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum)
|
||||
+ TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum))
|
||||
@@ -163,14 +163,14 @@ Panel Config:
|
||||
TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) /
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
tips:
|
||||
tips:
|
||||
vL1D Cache BW:
|
||||
value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 128) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 128) * $cu_per_gpu)
|
||||
pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 128) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 128) * $cu_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
@@ -178,24 +178,24 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
L2 Cache BW:
|
||||
value: AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan))
|
||||
pop: ((100 * AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan)))
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read BW:
|
||||
value: AVG((128 * TCC_BUBBLE_sum +
|
||||
64 * (TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) +
|
||||
64 * (TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) +
|
||||
32 * TCC_EA0_RDREQ_32B_sum) / (End_Timestamp - Start_Timestamp))
|
||||
unit: GB/s
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * (AVG((128 * TCC_BUBBLE_sum +
|
||||
64 * (TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) +
|
||||
64 * (TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) +
|
||||
32 * TCC_EA0_RDREQ_32B_sum) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write BW:
|
||||
value: AVG((((TCC_EA0_WRREQ_64B_sum * 64) + ((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))
|
||||
@@ -203,21 +203,21 @@ Panel Config:
|
||||
peak: $hbm_bw
|
||||
pop: ((100 * AVG((((TCC_EA0_WRREQ_64B_sum * 64) + ((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum)
|
||||
* 32)) / (End_Timestamp - Start_Timestamp)))) / $hbm_bw)
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Read Latency:
|
||||
value: AVG(((TCC_EA0_RDREQ_LEVEL_sum / TCC_EA0_RDREQ_sum) if (TCC_EA0_RDREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
L2-Fabric Write Latency:
|
||||
value: AVG(((TCC_EA0_WRREQ_LEVEL_sum / TCC_EA0_WRREQ_sum) if (TCC_EA0_WRREQ_sum
|
||||
!= 0) else None))
|
||||
unit: Cycles
|
||||
peak: None
|
||||
pop: None
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache Hit Rate:
|
||||
value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
@@ -225,27 +225,27 @@ Panel Config:
|
||||
peak: 100
|
||||
pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES))
|
||||
if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None))
|
||||
tips:
|
||||
tips:
|
||||
sL1D Cache BW:
|
||||
value: AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_DCACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Hit Rate:
|
||||
value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
unit: pct
|
||||
peak: 100
|
||||
pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES)))
|
||||
tips:
|
||||
tips:
|
||||
L1I BW:
|
||||
value: AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))
|
||||
unit: GB/s
|
||||
peak: ((($max_sclk / 1000) * 64) * $sqc_per_gpu)
|
||||
pop: ((100 * AVG(((SQC_ICACHE_REQ / (End_Timestamp - Start_Timestamp)) * 64))) / ((($max_sclk
|
||||
/ 1000) * 64) * $sqc_per_gpu))
|
||||
tips:
|
||||
tips:
|
||||
L1I Fetch Latency:
|
||||
value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH))
|
||||
unit: Cycles
|
||||
|
||||
@@ -27,7 +27,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE))
|
||||
if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF Stall:
|
||||
avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -36,7 +36,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Utilization:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
@@ -45,7 +45,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE))
|
||||
if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-L2 Stall:
|
||||
avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
@@ -54,7 +54,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPF-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPF_CMP_UTCL1_STALL_ON_TRANSLATION) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -84,7 +84,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE))
|
||||
if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Stall Rate:
|
||||
avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
@@ -93,19 +93,19 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC Packet Decoding Utilization:
|
||||
avg: AVG((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_BUSY_FOR_PACKET_DECODE) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-Workgroup Manager Utilization:
|
||||
avg: AVG((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
min: MIN((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
max: MAX((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY if (CPC_CPC_STAT_BUSY != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-L2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
@@ -114,7 +114,7 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE))
|
||||
if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL1 Stall:
|
||||
avg: AVG(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
@@ -123,7 +123,7 @@ Panel Config:
|
||||
max: MAX(((100 * CPC_UTCL1_STALL_ON_TRANSLATION) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY
|
||||
!= 0) else None)
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
CPC-UTCL2 Utilization:
|
||||
avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
@@ -132,4 +132,4 @@ Panel Config:
|
||||
max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE))
|
||||
if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+19
-19
@@ -24,43 +24,43 @@ Panel Config:
|
||||
min: MIN(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
max: MAX(100 * $GRBM_GUI_ACTIVE_PER_XCD / $GRBM_COUNT_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Utilization:
|
||||
avg: AVG(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
min: MIN(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
max: MAX(100 * SPI_CSN_BUSY / ($GRBM_GUI_ACTIVE_PER_XCD * $pipes_per_gpu * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup Manager Utilization:
|
||||
avg: AVG(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
min: MIN(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
max: MAX(100 * $GRBM_SPI_BUSY_PER_XCD / $GRBM_GUI_ACTIVE_PER_XCD)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Shader Engine Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $se_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
SIMD Utilization:
|
||||
avg: AVG(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SQ_BUSY_CU_CYCLES / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Workgroups:
|
||||
avg: AVG(SPI_CSN_NUM_THREADGROUPS)
|
||||
min: MIN(SPI_CSN_NUM_THREADGROUPS)
|
||||
max: MAX(SPI_CSN_NUM_THREADGROUPS)
|
||||
unit: Workgroups
|
||||
tips:
|
||||
tips:
|
||||
Dispatched Wavefronts:
|
||||
avg: AVG(SPI_CSN_WAVE)
|
||||
min: MIN(SPI_CSN_WAVE)
|
||||
max: MAX(SPI_CSN_WAVE)
|
||||
unit: Wavefronts
|
||||
tips:
|
||||
tips:
|
||||
VGPR Writes:
|
||||
avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -69,7 +69,7 @@ Panel Config:
|
||||
max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
unit: Cycles/wave
|
||||
tips:
|
||||
tips:
|
||||
SGPR Writes:
|
||||
avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else
|
||||
None))
|
||||
@@ -98,7 +98,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Not-scheduled Rate (Scheduler-Pipe):
|
||||
avg: AVG((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
@@ -107,7 +107,7 @@ Panel Config:
|
||||
max: MAX((100 * SPI_RA_REQ_NO_ALLOC / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scheduler-Pipe Stall Rate:
|
||||
avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
@@ -116,52 +116,52 @@ Panel Config:
|
||||
max: MAX((((100 * SPI_RA_RES_STALL_CSN) / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD !=
|
||||
0) else None))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Scratch Stall Rate:
|
||||
avg: AVG((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
min: MIN((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
max: MAX((100 * SPI_RA_TMP_STALL_CSN / ($GRBM_SPI_BUSY_PER_XCD * $se_per_gpu)) if ($GRBM_SPI_BUSY_PER_XCD != 0) else None)
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD Waveslots:
|
||||
avg: AVG(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_WAVE_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD VGPRs:
|
||||
avg: AVG(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_VGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient SIMD SGPRs:
|
||||
avg: AVG(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(100 * SPI_RA_SGPR_SIMD_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU LDS:
|
||||
avg: AVG(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_LDS_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Insufficient CU Barriers:
|
||||
avg: AVG(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_BAR_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Workgroup Limit:
|
||||
avg: AVG(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_TGLIM_CU_FULL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
Reached CU Wavefront Limit:
|
||||
avg: AVG(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
min: MIN(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
max: MAX(400 * SPI_RA_WVLIM_STALL_CSN / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu))
|
||||
unit: Pct
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+27
-27
@@ -24,7 +24,7 @@ Panel Config:
|
||||
min: MIN(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom))
|
||||
max: MAX(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
VMEM:
|
||||
# TODO: need to fix this when the new FLAT/LDS counts
|
||||
# are present in ROCm
|
||||
@@ -32,7 +32,7 @@ Panel Config:
|
||||
min: MIN(((SQ_INSTS_VMEM) / $denom))
|
||||
max: MAX(((SQ_INSTS_VMEM) / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
LDS:
|
||||
# TODO: need to fix this when the new FLAT/LDS counts
|
||||
# are present in ROCm
|
||||
@@ -40,31 +40,31 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_LDS / $denom))
|
||||
max: MAX((SQ_INSTS_LDS / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA:
|
||||
avg: AVG((SQ_INSTS_MFMA / $denom))
|
||||
min: MIN((SQ_INSTS_MFMA / $denom))
|
||||
max: MAX((SQ_INSTS_MFMA / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SALU:
|
||||
avg: AVG((SQ_INSTS_SALU / $denom))
|
||||
min: MIN((SQ_INSTS_SALU / $denom))
|
||||
max: MAX((SQ_INSTS_SALU / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
SMEM:
|
||||
avg: AVG((SQ_INSTS_SMEM / $denom))
|
||||
min: MIN((SQ_INSTS_SMEM / $denom))
|
||||
max: MAX((SQ_INSTS_SMEM / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Branch:
|
||||
avg: AVG((SQ_INSTS_BRANCH / $denom))
|
||||
min: MIN((SQ_INSTS_BRANCH / $denom))
|
||||
max: MAX((SQ_INSTS_BRANCH / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1002
|
||||
@@ -82,91 +82,91 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_VALU_INT32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_INT32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
INT64:
|
||||
avg: AVG((SQ_INSTS_VALU_INT64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_INT64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_INT64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-ADD:
|
||||
avg: AVG((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_ADD_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-MUL:
|
||||
avg: AVG((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MUL_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-FMA:
|
||||
avg: AVG((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_FMA_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64-Trans:
|
||||
avg: AVG((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_TRANS_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Conversion:
|
||||
avg: AVG((SQ_INSTS_VALU_CVT / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_CVT / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_CVT / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1003
|
||||
@@ -244,28 +244,28 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_I8 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_I8 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F16:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-BF16:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_BF16 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F32:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F32 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
MFMA-F64:
|
||||
avg: AVG((SQ_INSTS_VALU_MFMA_F64 / $denom))
|
||||
min: MIN((SQ_INSTS_VALU_MFMA_F64 / $denom))
|
||||
max: MAX((SQ_INSTS_VALU_MFMA_F64 / $denom))
|
||||
unit: (instr + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
+26
-26
@@ -33,49 +33,49 @@ Panel Config:
|
||||
+ (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F64)))) / (End_Timestamp - Start_Timestamp)))) / (((($max_sclk
|
||||
* $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
VALU IOPs:
|
||||
value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (End_Timestamp
|
||||
- Start_Timestamp)))) / (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 4096) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 4096) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GFLOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 256) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 256) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
MFMA IOPs (INT8):
|
||||
value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp)))
|
||||
unit: GIOP
|
||||
peak: ((($max_sclk * $cu_per_gpu) * 8192) / 1000)
|
||||
pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (End_Timestamp - Start_Timestamp))))
|
||||
/ ((($max_sclk * $cu_per_gpu) * 8192) / 1000))
|
||||
tips:
|
||||
tips:
|
||||
|
||||
- metric_table:
|
||||
id: 1102
|
||||
@@ -93,43 +93,43 @@ Panel Config:
|
||||
min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
IPC (Issued):
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM))
|
||||
+ SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED + SQ_INSTS_LDS)
|
||||
/ SQ_ACTIVE_INST_ANY))
|
||||
unit: Instr/cycle
|
||||
tips:
|
||||
tips:
|
||||
SALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_SCA) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_VALU) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VMEM Utilization:
|
||||
avg: AVG((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * (SQ_ACTIVE_INST_FLAT+SQ_ACTIVE_INST_VMEM)) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Branch Utilization:
|
||||
avg: AVG((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
min: MIN((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
max: MAX((((100 * SQ_ACTIVE_INST_MISC) / $GRBM_GUI_ACTIVE_PER_XCD) / $cu_per_gpu))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
VALU Active Threads:
|
||||
avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
@@ -138,13 +138,13 @@ Panel Config:
|
||||
max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU
|
||||
!= 0) else None))
|
||||
unit: Threads
|
||||
tips:
|
||||
tips:
|
||||
MFMA Utilization:
|
||||
avg: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
min: MIN(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
max: MAX(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $cu_per_gpu) * $GRBM_GUI_ACTIVE_PER_XCD)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
MFMA Instr Cycles:
|
||||
avg: AVG(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0)
|
||||
else None))
|
||||
@@ -153,7 +153,7 @@ Panel Config:
|
||||
max: MAX(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0)
|
||||
else None))
|
||||
unit: cycles/instr
|
||||
tips:
|
||||
tips:
|
||||
VMEM Latency:
|
||||
avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_VMEM) if (SQ_INSTS_VMEM != 0)
|
||||
else None))
|
||||
@@ -209,13 +209,13 @@ Panel Config:
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) /
|
||||
$denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
IOPs (Total):
|
||||
avg: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
min: MIN(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
max: MAX(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) + (SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / $denom)
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F16 OPs:
|
||||
avg: AVG(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) +
|
||||
(64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 *
|
||||
@@ -227,13 +227,13 @@ Panel Config:
|
||||
(64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 *
|
||||
SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
BF16 OPs:
|
||||
avg: AVG(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
min: MIN(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
max: MAX(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F32 OPs:
|
||||
avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom))
|
||||
@@ -242,7 +242,7 @@ Panel Config:
|
||||
max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
F64 OPs:
|
||||
avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom))
|
||||
@@ -251,10 +251,10 @@ Panel Config:
|
||||
max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
+ (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
INT8 OPs:
|
||||
avg: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
min: MIN(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
max: MAX(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom))
|
||||
unit: (OPs + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -70,7 +70,7 @@ Panel Config:
|
||||
max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None))
|
||||
unit: Cycles
|
||||
coll_level: SQ_INST_LEVEL_LDS
|
||||
tips:
|
||||
tips:
|
||||
Bank Conflicts/Access:
|
||||
avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT))
|
||||
if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))
|
||||
|
||||
@@ -28,7 +28,7 @@ Panel Config:
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
L1I-L2 Bandwidth:
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
value: AVG(((SQC_TC_INST_REQ * 100000) / (2 * ($max_sclk * $sqc_per_gpu)
|
||||
* (End_Timestamp - Start_Timestamp))))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
|
||||
@@ -24,91 +24,91 @@ Panel Config:
|
||||
min: MIN(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_TA_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data Stall:
|
||||
avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Data-Processor → Address Stall:
|
||||
avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Total Instructions:
|
||||
avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Instructions:
|
||||
avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Read Instructions:
|
||||
avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Write Instructions:
|
||||
avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Global/Generic Atomic Instructions:
|
||||
avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Instructions:
|
||||
avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Read Instructions:
|
||||
avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Write Instructions:
|
||||
avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Atomic Instructions:
|
||||
avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Total Cycles:
|
||||
avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Read:
|
||||
avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom))
|
||||
unit: (Cycles + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Spill/Stack Coalesced Write:
|
||||
avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom))
|
||||
@@ -132,25 +132,25 @@ Panel Config:
|
||||
min: MIN(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TD_BUSY_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache RAM → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_TC_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Workgroup manager → Data-Return Stall:
|
||||
avg: AVG(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
min: MIN(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
max: MAX(((100 * TD_SPI_STALL_sum) / ($GRBM_GUI_ACTIVE_PER_XCD * $cu_per_gpu)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Coalescable Instructions:
|
||||
avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Read Instructions:
|
||||
avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
@@ -159,16 +159,16 @@ Panel Config:
|
||||
max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum)
|
||||
/ $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Write Instructions:
|
||||
avg: AVG((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_STORE_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Atomic Instructions:
|
||||
avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom))
|
||||
unit: (Instructions + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
|
||||
@@ -33,12 +33,12 @@ Panel Config:
|
||||
value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum
|
||||
!= 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
Coalescing:
|
||||
value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum
|
||||
* 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None))
|
||||
unit: Pct of Peak
|
||||
tips:
|
||||
tips:
|
||||
comparable: false # for now
|
||||
cli_style: simple_bar
|
||||
|
||||
@@ -135,7 +135,7 @@ Panel Config:
|
||||
TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else
|
||||
None))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Cache Accesses:
|
||||
avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom))
|
||||
|
||||
@@ -24,7 +24,7 @@ Panel Config:
|
||||
Bandwidth:
|
||||
value: ((100 * AVG(((TCC_REQ_sum * 128) / (End_Timestamp - Start_Timestamp)))) / ((($max_sclk / 1000) * 128) * TO_INT($total_l2_chan)))
|
||||
unit: pct
|
||||
tips:
|
||||
tips:
|
||||
Hit Rate:
|
||||
value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum
|
||||
+ TCC_MISS_sum) != 0) else 0))
|
||||
@@ -175,7 +175,7 @@ Panel Config:
|
||||
min: MIN((TCC_REQ_sum * 128) / $denom)
|
||||
max: MAX((TCC_REQ_sum * 128) / $denom)
|
||||
unit: (Bytes + $normUnit)
|
||||
tips:
|
||||
tips:
|
||||
Req:
|
||||
avg: AVG((TCC_REQ_sum / $denom))
|
||||
min: MIN((TCC_REQ_sum / $denom))
|
||||
|
||||
@@ -0,0 +1,25 @@
|
||||
SQ_IFETCH_LEVEL_ACCUM:
|
||||
architectures:
|
||||
gfx942/gfx941/gfx940/gfx90a:
|
||||
expression: accumulate(SQ_IFETCH_LEVEL, HIGH_RES)
|
||||
description: 'SQ_IFETCH_LEVEL accumulation'
|
||||
SQ_INST_LEVEL_LDS_ACCUM:
|
||||
architectures:
|
||||
gfx942/gfx941/gfx940/gfx90a:
|
||||
expression: accumulate(SQ_INST_LEVEL_LDS, HIGH_RES)
|
||||
description: 'SQ_INST_LEVEL_LDS accumulation'
|
||||
SQ_INST_LEVEL_SMEM_ACCUM:
|
||||
architectures:
|
||||
gfx942/gfx941/gfx940/gfx90a:
|
||||
expression: accumulate(SQ_INST_LEVEL_SMEM, HIGH_RES)
|
||||
description: 'SQ_INST_LEVEL_SMEM accumulation'
|
||||
SQ_INST_LEVEL_VMEM_ACCUM:
|
||||
architectures:
|
||||
gfx942/gfx941/gfx940/gfx90a:
|
||||
expression: accumulate(SQ_INST_LEVEL_VMEM, HIGH_RES)
|
||||
description: 'SQ_INST_LEVEL_VMEM accumulation'
|
||||
SQ_LEVEL_WAVES_ACCUM:
|
||||
architectures:
|
||||
gfx942/gfx941/gfx940/gfx90a:
|
||||
expression: accumulate(SQ_LEVEL_WAVES, HIGH_RES)
|
||||
description: 'SQ_LEVEL_WAVES accumulation'
|
||||
@@ -1,15 +1,13 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
|
||||
pmc: CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE
|
||||
pmc: CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE
|
||||
pmc: CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
|
||||
pmc: CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
|
||||
pmc: CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
|
||||
pmc: CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
|
||||
pmc: CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
|
||||
pmc: CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
|
||||
pmc: CPC_ME1_DC0_SPI_BUSY
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,13 +1,11 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
|
||||
pmc: CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL
|
||||
pmc: CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL
|
||||
pmc: CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE
|
||||
pmc: CPF_CMP_UTCL1_STALL_ON_TRANSLATION
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
pmc: CPF_CMP_UTCL1_STALL_ON_TRANSLATION
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,12 +1,10 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_SPI_BUSY
|
||||
|
||||
pmc: SPI_CSN_WINDOW_VALID SPI_CSN_BUSY SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN
|
||||
pmc: SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN
|
||||
pmc: SPI_CSN_WINDOW_VALID SPI_CSN_BUSY SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN
|
||||
pmc: SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN
|
||||
pmc: SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,31 +1,27 @@
|
||||
#SQ
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED
|
||||
pmc: SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_INSTS
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED
|
||||
pmc: SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_INSTS
|
||||
pmc: SQ_WAVE_CYCLES SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_INSTS_VALU
|
||||
pmc: SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR
|
||||
pmc: SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL
|
||||
pmc: SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_INSTS_VSKIPPED
|
||||
pmc: SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED SQ_INSTS_SMEM_NORM
|
||||
pmc: SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_INSTS_VSKIPPED
|
||||
pmc: SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED SQ_INSTS_SMEM_NORM
|
||||
|
||||
|
||||
#SQ:MI200
|
||||
#pmc: SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
|
||||
#pmc: SQ_INSTS_FLAT_LDS_ONLY SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64
|
||||
#pmc: SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
|
||||
#pmc: SQ_INSTS_FLAT_LDS_ONLY SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64
|
||||
|
||||
#SQC
|
||||
pmc: SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16
|
||||
pmc: SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8
|
||||
pmc: SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1 SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
pmc: SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16
|
||||
pmc: SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8
|
||||
pmc: SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1 SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
|
||||
|
||||
|
||||
########################################
|
||||
# Filtering
|
||||
########################################
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
@@ -4,9 +4,7 @@
|
||||
pmc: SQ_INSTS_VMEM SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -4,10 +4,8 @@
|
||||
pmc: SQ_INSTS_SMEM SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
|
||||
kernel:
|
||||
range:
|
||||
gpu:
|
||||
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -3,9 +3,6 @@
|
||||
#################################################
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL SQ_ACCUM_PREV_HIRES
|
||||
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
@@ -3,13 +3,7 @@
|
||||
#################################################
|
||||
pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS SQ_ACCUM_PREV_HIRES
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES SQ_ACCUM_PREV_HIRES
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range:
|
||||
|
||||
kernel:
|
||||
gpu:
|
||||
range:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,12 +1,11 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES
|
||||
|
||||
|
||||
pmc: SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16
|
||||
pmc: SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8
|
||||
pmc: SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1 SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
pmc: SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16
|
||||
pmc: SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8
|
||||
pmc: SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1 SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,10 +1,10 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES
|
||||
|
||||
pmc: TA_TA_BUSY_sum TA_SH_FIFO_BUSY_sum
|
||||
pmc: TA_SH_FIFO_CMD_BUSY_sum TA_SH_FIFO_ADDR_BUSY_sum
|
||||
pmc: TA_SH_FIFO_DATA_BUSY_sum TA_SH_FIFO_DATA_SFIFO_BUSY_sum
|
||||
pmc: TA_SH_FIFO_DATA_TFIFO_BUSY_sum TA_SQ_TA_CMD_CYCLES_sum
|
||||
pmc: TA_SP_TA_ADDR_CYCLES_sum TA_SP_TA_DATA_CYCLES_sum
|
||||
pmc: TA_TA_BUSY_sum TA_SH_FIFO_BUSY_sum
|
||||
pmc: TA_SH_FIFO_CMD_BUSY_sum TA_SH_FIFO_ADDR_BUSY_sum
|
||||
pmc: TA_SH_FIFO_DATA_BUSY_sum TA_SH_FIFO_DATA_SFIFO_BUSY_sum
|
||||
pmc: TA_SH_FIFO_DATA_TFIFO_BUSY_sum TA_SQ_TA_CMD_CYCLES_sum
|
||||
pmc: TA_SP_TA_ADDR_CYCLES_sum TA_SP_TA_DATA_CYCLES_sum
|
||||
|
||||
|
||||
# Starvation
|
||||
@@ -22,16 +22,16 @@ pmc: TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES
|
||||
|
||||
# stalls
|
||||
pmc: TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum
|
||||
pmc: TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum
|
||||
pmc: TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum
|
||||
|
||||
# flat accesses
|
||||
pmc: TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum
|
||||
pmc: TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum
|
||||
pmc: TA_FLAT_COALESCEABLE_WAVEFRONTS_sum
|
||||
pmc: TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum
|
||||
pmc: TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum
|
||||
pmc: TA_FLAT_COALESCEABLE_WAVEFRONTS_sum
|
||||
|
||||
|
||||
range:
|
||||
range:
|
||||
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
kernel:
|
||||
|
||||
@@ -1,26 +1,25 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
|
||||
# MI50: no TCC_RW_REQ
|
||||
pmc: TCC_CYCLE[0] TCC_HIT[0] TCC_MISS[0] TCC_CYCLE[1] TCC_HIT[1] TCC_MISS[1] TCC_CYCLE[2] TCC_HIT[2] TCC_MISS[2] TCC_CYCLE[3] TCC_HIT[3] TCC_MISS[3] TCC_CYCLE[4] TCC_HIT[4] TCC_MISS[4] TCC_CYCLE[5] TCC_HIT[5] TCC_MISS[5] TCC_CYCLE[6] TCC_HIT[6] TCC_MISS[6] TCC_CYCLE[7] TCC_HIT[7] TCC_MISS[7] TCC_CYCLE[8] TCC_HIT[8] TCC_MISS[8] TCC_CYCLE[9] TCC_HIT[9] TCC_MISS[9] TCC_CYCLE[10] TCC_HIT[10] TCC_MISS[10] TCC_CYCLE[11] TCC_HIT[11] TCC_MISS[11] TCC_CYCLE[12] TCC_HIT[12] TCC_MISS[12] TCC_CYCLE[13] TCC_HIT[13] TCC_MISS[13] TCC_CYCLE[14] TCC_HIT[14] TCC_MISS[14] TCC_CYCLE[15] TCC_HIT[15] TCC_MISS[15]
|
||||
pmc: TCC_CYCLE[0] TCC_HIT[0] TCC_MISS[0] TCC_CYCLE[1] TCC_HIT[1] TCC_MISS[1] TCC_CYCLE[2] TCC_HIT[2] TCC_MISS[2] TCC_CYCLE[3] TCC_HIT[3] TCC_MISS[3] TCC_CYCLE[4] TCC_HIT[4] TCC_MISS[4] TCC_CYCLE[5] TCC_HIT[5] TCC_MISS[5] TCC_CYCLE[6] TCC_HIT[6] TCC_MISS[6] TCC_CYCLE[7] TCC_HIT[7] TCC_MISS[7] TCC_CYCLE[8] TCC_HIT[8] TCC_MISS[8] TCC_CYCLE[9] TCC_HIT[9] TCC_MISS[9] TCC_CYCLE[10] TCC_HIT[10] TCC_MISS[10] TCC_CYCLE[11] TCC_HIT[11] TCC_MISS[11] TCC_CYCLE[12] TCC_HIT[12] TCC_MISS[12] TCC_CYCLE[13] TCC_HIT[13] TCC_MISS[13] TCC_CYCLE[14] TCC_HIT[14] TCC_MISS[14] TCC_CYCLE[15] TCC_HIT[15] TCC_MISS[15]
|
||||
|
||||
|
||||
|
||||
pmc: TCC_REQ[0] TCC_READ[0] TCC_WRITE[0] TCC_ATOMIC[0] TCC_REQ[1] TCC_READ[1] TCC_WRITE[1] TCC_ATOMIC[1] TCC_REQ[2] TCC_READ[2] TCC_WRITE[2] TCC_ATOMIC[2] TCC_REQ[3] TCC_READ[3] TCC_WRITE[3] TCC_ATOMIC[3] TCC_REQ[4] TCC_READ[4] TCC_WRITE[4] TCC_ATOMIC[4] TCC_REQ[5] TCC_READ[5] TCC_WRITE[5] TCC_ATOMIC[5] TCC_REQ[6] TCC_READ[6] TCC_WRITE[6] TCC_ATOMIC[6] TCC_REQ[7] TCC_READ[7] TCC_WRITE[7] TCC_ATOMIC[7] TCC_REQ[8] TCC_READ[8] TCC_WRITE[8] TCC_ATOMIC[8] TCC_REQ[9] TCC_READ[9] TCC_WRITE[9] TCC_ATOMIC[9] TCC_REQ[10] TCC_READ[10] TCC_WRITE[10] TCC_ATOMIC[10] TCC_REQ[11] TCC_READ[11] TCC_WRITE[11] TCC_ATOMIC[11] TCC_REQ[12] TCC_READ[12] TCC_WRITE[12] TCC_ATOMIC[12] TCC_REQ[13] TCC_READ[13] TCC_WRITE[13] TCC_ATOMIC[13] TCC_REQ[14] TCC_READ[14] TCC_WRITE[14] TCC_ATOMIC[14] TCC_REQ[15] TCC_READ[15] TCC_WRITE[15] TCC_ATOMIC[15]
|
||||
pmc: TCC_REQ[0] TCC_READ[0] TCC_WRITE[0] TCC_ATOMIC[0] TCC_REQ[1] TCC_READ[1] TCC_WRITE[1] TCC_ATOMIC[1] TCC_REQ[2] TCC_READ[2] TCC_WRITE[2] TCC_ATOMIC[2] TCC_REQ[3] TCC_READ[3] TCC_WRITE[3] TCC_ATOMIC[3] TCC_REQ[4] TCC_READ[4] TCC_WRITE[4] TCC_ATOMIC[4] TCC_REQ[5] TCC_READ[5] TCC_WRITE[5] TCC_ATOMIC[5] TCC_REQ[6] TCC_READ[6] TCC_WRITE[6] TCC_ATOMIC[6] TCC_REQ[7] TCC_READ[7] TCC_WRITE[7] TCC_ATOMIC[7] TCC_REQ[8] TCC_READ[8] TCC_WRITE[8] TCC_ATOMIC[8] TCC_REQ[9] TCC_READ[9] TCC_WRITE[9] TCC_ATOMIC[9] TCC_REQ[10] TCC_READ[10] TCC_WRITE[10] TCC_ATOMIC[10] TCC_REQ[11] TCC_READ[11] TCC_WRITE[11] TCC_ATOMIC[11] TCC_REQ[12] TCC_READ[12] TCC_WRITE[12] TCC_ATOMIC[12] TCC_REQ[13] TCC_READ[13] TCC_WRITE[13] TCC_ATOMIC[13] TCC_REQ[14] TCC_READ[14] TCC_WRITE[14] TCC_ATOMIC[14] TCC_REQ[15] TCC_READ[15] TCC_WRITE[15] TCC_ATOMIC[15]
|
||||
|
||||
|
||||
|
||||
pmc: TCC_EA_RDREQ[0] TCC_EA_RDREQ_32B[0] TCC_EA_WRREQ[0] TCC_EA_WRREQ_64B[0] TCC_EA_RDREQ[1] TCC_EA_RDREQ_32B[1] TCC_EA_WRREQ[1] TCC_EA_WRREQ_64B[1] TCC_EA_RDREQ[2] TCC_EA_RDREQ_32B[2] TCC_EA_WRREQ[2] TCC_EA_WRREQ_64B[2] TCC_EA_RDREQ[3] TCC_EA_RDREQ_32B[3] TCC_EA_WRREQ[3] TCC_EA_WRREQ_64B[3] TCC_EA_RDREQ[4] TCC_EA_RDREQ_32B[4] TCC_EA_WRREQ[4] TCC_EA_WRREQ_64B[4] TCC_EA_RDREQ[5] TCC_EA_RDREQ_32B[5] TCC_EA_WRREQ[5] TCC_EA_WRREQ_64B[5] TCC_EA_RDREQ[6] TCC_EA_RDREQ_32B[6] TCC_EA_WRREQ[6] TCC_EA_WRREQ_64B[6] TCC_EA_RDREQ[7] TCC_EA_RDREQ_32B[7] TCC_EA_WRREQ[7] TCC_EA_WRREQ_64B[7] TCC_EA_RDREQ[8] TCC_EA_RDREQ_32B[8] TCC_EA_WRREQ[8] TCC_EA_WRREQ_64B[8] TCC_EA_RDREQ[9] TCC_EA_RDREQ_32B[9] TCC_EA_WRREQ[9] TCC_EA_WRREQ_64B[9] TCC_EA_RDREQ[10] TCC_EA_RDREQ_32B[10] TCC_EA_WRREQ[10] TCC_EA_WRREQ_64B[10] TCC_EA_RDREQ[11] TCC_EA_RDREQ_32B[11] TCC_EA_WRREQ[11] TCC_EA_WRREQ_64B[11] TCC_EA_RDREQ[12] TCC_EA_RDREQ_32B[12] TCC_EA_WRREQ[12] TCC_EA_WRREQ_64B[12] TCC_EA_RDREQ[13] TCC_EA_RDREQ_32B[13] TCC_EA_WRREQ[13] TCC_EA_WRREQ_64B[13] TCC_EA_RDREQ[14] TCC_EA_RDREQ_32B[14] TCC_EA_WRREQ[14] TCC_EA_WRREQ_64B[14] TCC_EA_RDREQ[15] TCC_EA_RDREQ_32B[15] TCC_EA_WRREQ[15] TCC_EA_WRREQ_64B[15]
|
||||
pmc: TCC_EA_RDREQ[0] TCC_EA_RDREQ_32B[0] TCC_EA_WRREQ[0] TCC_EA_WRREQ_64B[0] TCC_EA_RDREQ[1] TCC_EA_RDREQ_32B[1] TCC_EA_WRREQ[1] TCC_EA_WRREQ_64B[1] TCC_EA_RDREQ[2] TCC_EA_RDREQ_32B[2] TCC_EA_WRREQ[2] TCC_EA_WRREQ_64B[2] TCC_EA_RDREQ[3] TCC_EA_RDREQ_32B[3] TCC_EA_WRREQ[3] TCC_EA_WRREQ_64B[3] TCC_EA_RDREQ[4] TCC_EA_RDREQ_32B[4] TCC_EA_WRREQ[4] TCC_EA_WRREQ_64B[4] TCC_EA_RDREQ[5] TCC_EA_RDREQ_32B[5] TCC_EA_WRREQ[5] TCC_EA_WRREQ_64B[5] TCC_EA_RDREQ[6] TCC_EA_RDREQ_32B[6] TCC_EA_WRREQ[6] TCC_EA_WRREQ_64B[6] TCC_EA_RDREQ[7] TCC_EA_RDREQ_32B[7] TCC_EA_WRREQ[7] TCC_EA_WRREQ_64B[7] TCC_EA_RDREQ[8] TCC_EA_RDREQ_32B[8] TCC_EA_WRREQ[8] TCC_EA_WRREQ_64B[8] TCC_EA_RDREQ[9] TCC_EA_RDREQ_32B[9] TCC_EA_WRREQ[9] TCC_EA_WRREQ_64B[9] TCC_EA_RDREQ[10] TCC_EA_RDREQ_32B[10] TCC_EA_WRREQ[10] TCC_EA_WRREQ_64B[10] TCC_EA_RDREQ[11] TCC_EA_RDREQ_32B[11] TCC_EA_WRREQ[11] TCC_EA_WRREQ_64B[11] TCC_EA_RDREQ[12] TCC_EA_RDREQ_32B[12] TCC_EA_WRREQ[12] TCC_EA_WRREQ_64B[12] TCC_EA_RDREQ[13] TCC_EA_RDREQ_32B[13] TCC_EA_WRREQ[13] TCC_EA_WRREQ_64B[13] TCC_EA_RDREQ[14] TCC_EA_RDREQ_32B[14] TCC_EA_WRREQ[14] TCC_EA_WRREQ_64B[14] TCC_EA_RDREQ[15] TCC_EA_RDREQ_32B[15] TCC_EA_WRREQ[15] TCC_EA_WRREQ_64B[15]
|
||||
|
||||
|
||||
pmc: TCC_EA_ATOMIC[0] TCC_EA_RDREQ_LEVEL[0] TCC_EA_WRREQ_LEVEL[0] TCC_EA_ATOMIC_LEVEL[0] TCC_EA_ATOMIC[1] TCC_EA_RDREQ_LEVEL[1] TCC_EA_WRREQ_LEVEL[1] TCC_EA_ATOMIC_LEVEL[1] TCC_EA_ATOMIC[2] TCC_EA_RDREQ_LEVEL[2] TCC_EA_WRREQ_LEVEL[2] TCC_EA_ATOMIC_LEVEL[2] TCC_EA_ATOMIC[3] TCC_EA_RDREQ_LEVEL[3] TCC_EA_WRREQ_LEVEL[3] TCC_EA_ATOMIC_LEVEL[3] TCC_EA_ATOMIC[4] TCC_EA_RDREQ_LEVEL[4] TCC_EA_WRREQ_LEVEL[4] TCC_EA_ATOMIC_LEVEL[4] TCC_EA_ATOMIC[5] TCC_EA_RDREQ_LEVEL[5] TCC_EA_WRREQ_LEVEL[5] TCC_EA_ATOMIC_LEVEL[5] TCC_EA_ATOMIC[6] TCC_EA_RDREQ_LEVEL[6] TCC_EA_WRREQ_LEVEL[6] TCC_EA_ATOMIC_LEVEL[6] TCC_EA_ATOMIC[7] TCC_EA_RDREQ_LEVEL[7] TCC_EA_WRREQ_LEVEL[7] TCC_EA_ATOMIC_LEVEL[7] TCC_EA_ATOMIC[8] TCC_EA_RDREQ_LEVEL[8] TCC_EA_WRREQ_LEVEL[8] TCC_EA_ATOMIC_LEVEL[8] TCC_EA_ATOMIC[9] TCC_EA_RDREQ_LEVEL[9] TCC_EA_WRREQ_LEVEL[9] TCC_EA_ATOMIC_LEVEL[9] TCC_EA_ATOMIC[10] TCC_EA_RDREQ_LEVEL[10] TCC_EA_WRREQ_LEVEL[10] TCC_EA_ATOMIC_LEVEL[10] TCC_EA_ATOMIC[11] TCC_EA_RDREQ_LEVEL[11] TCC_EA_WRREQ_LEVEL[11] TCC_EA_ATOMIC_LEVEL[11] TCC_EA_ATOMIC[12] TCC_EA_RDREQ_LEVEL[12] TCC_EA_WRREQ_LEVEL[12] TCC_EA_ATOMIC_LEVEL[12] TCC_EA_ATOMIC[13] TCC_EA_RDREQ_LEVEL[13] TCC_EA_WRREQ_LEVEL[13] TCC_EA_ATOMIC_LEVEL[13] TCC_EA_ATOMIC[14] TCC_EA_RDREQ_LEVEL[14] TCC_EA_WRREQ_LEVEL[14] TCC_EA_ATOMIC_LEVEL[14] TCC_EA_ATOMIC[15] TCC_EA_RDREQ_LEVEL[15] TCC_EA_WRREQ_LEVEL[15] TCC_EA_ATOMIC_LEVEL[15]
|
||||
pmc: TCC_EA_ATOMIC[0] TCC_EA_RDREQ_LEVEL[0] TCC_EA_WRREQ_LEVEL[0] TCC_EA_ATOMIC_LEVEL[0] TCC_EA_ATOMIC[1] TCC_EA_RDREQ_LEVEL[1] TCC_EA_WRREQ_LEVEL[1] TCC_EA_ATOMIC_LEVEL[1] TCC_EA_ATOMIC[2] TCC_EA_RDREQ_LEVEL[2] TCC_EA_WRREQ_LEVEL[2] TCC_EA_ATOMIC_LEVEL[2] TCC_EA_ATOMIC[3] TCC_EA_RDREQ_LEVEL[3] TCC_EA_WRREQ_LEVEL[3] TCC_EA_ATOMIC_LEVEL[3] TCC_EA_ATOMIC[4] TCC_EA_RDREQ_LEVEL[4] TCC_EA_WRREQ_LEVEL[4] TCC_EA_ATOMIC_LEVEL[4] TCC_EA_ATOMIC[5] TCC_EA_RDREQ_LEVEL[5] TCC_EA_WRREQ_LEVEL[5] TCC_EA_ATOMIC_LEVEL[5] TCC_EA_ATOMIC[6] TCC_EA_RDREQ_LEVEL[6] TCC_EA_WRREQ_LEVEL[6] TCC_EA_ATOMIC_LEVEL[6] TCC_EA_ATOMIC[7] TCC_EA_RDREQ_LEVEL[7] TCC_EA_WRREQ_LEVEL[7] TCC_EA_ATOMIC_LEVEL[7] TCC_EA_ATOMIC[8] TCC_EA_RDREQ_LEVEL[8] TCC_EA_WRREQ_LEVEL[8] TCC_EA_ATOMIC_LEVEL[8] TCC_EA_ATOMIC[9] TCC_EA_RDREQ_LEVEL[9] TCC_EA_WRREQ_LEVEL[9] TCC_EA_ATOMIC_LEVEL[9] TCC_EA_ATOMIC[10] TCC_EA_RDREQ_LEVEL[10] TCC_EA_WRREQ_LEVEL[10] TCC_EA_ATOMIC_LEVEL[10] TCC_EA_ATOMIC[11] TCC_EA_RDREQ_LEVEL[11] TCC_EA_WRREQ_LEVEL[11] TCC_EA_ATOMIC_LEVEL[11] TCC_EA_ATOMIC[12] TCC_EA_RDREQ_LEVEL[12] TCC_EA_WRREQ_LEVEL[12] TCC_EA_ATOMIC_LEVEL[12] TCC_EA_ATOMIC[13] TCC_EA_RDREQ_LEVEL[13] TCC_EA_WRREQ_LEVEL[13] TCC_EA_ATOMIC_LEVEL[13] TCC_EA_ATOMIC[14] TCC_EA_RDREQ_LEVEL[14] TCC_EA_WRREQ_LEVEL[14] TCC_EA_ATOMIC_LEVEL[14] TCC_EA_ATOMIC[15] TCC_EA_RDREQ_LEVEL[15] TCC_EA_WRREQ_LEVEL[15] TCC_EA_ATOMIC_LEVEL[15]
|
||||
|
||||
|
||||
pmc: TCC_EA_RDREQ_IO_CREDIT_STALL[0] TCC_EA_RDREQ_GMI_CREDIT_STALL[0] TCC_EA_RDREQ_DRAM_CREDIT_STALL[0] TCC_EA_RDREQ_IO_CREDIT_STALL[1] TCC_EA_RDREQ_GMI_CREDIT_STALL[1] TCC_EA_RDREQ_DRAM_CREDIT_STALL[1] TCC_EA_RDREQ_IO_CREDIT_STALL[2] TCC_EA_RDREQ_GMI_CREDIT_STALL[2] TCC_EA_RDREQ_DRAM_CREDIT_STALL[2] TCC_EA_RDREQ_IO_CREDIT_STALL[3] TCC_EA_RDREQ_GMI_CREDIT_STALL[3] TCC_EA_RDREQ_DRAM_CREDIT_STALL[3] TCC_EA_RDREQ_IO_CREDIT_STALL[4] TCC_EA_RDREQ_GMI_CREDIT_STALL[4] TCC_EA_RDREQ_DRAM_CREDIT_STALL[4] TCC_EA_RDREQ_IO_CREDIT_STALL[5] TCC_EA_RDREQ_GMI_CREDIT_STALL[5] TCC_EA_RDREQ_DRAM_CREDIT_STALL[5] TCC_EA_RDREQ_IO_CREDIT_STALL[6] TCC_EA_RDREQ_GMI_CREDIT_STALL[6] TCC_EA_RDREQ_DRAM_CREDIT_STALL[6] TCC_EA_RDREQ_IO_CREDIT_STALL[7] TCC_EA_RDREQ_GMI_CREDIT_STALL[7] TCC_EA_RDREQ_DRAM_CREDIT_STALL[7] TCC_EA_RDREQ_IO_CREDIT_STALL[8] TCC_EA_RDREQ_GMI_CREDIT_STALL[8] TCC_EA_RDREQ_DRAM_CREDIT_STALL[8] TCC_EA_RDREQ_IO_CREDIT_STALL[9] TCC_EA_RDREQ_GMI_CREDIT_STALL[9] TCC_EA_RDREQ_DRAM_CREDIT_STALL[9] TCC_EA_RDREQ_IO_CREDIT_STALL[10] TCC_EA_RDREQ_GMI_CREDIT_STALL[10] TCC_EA_RDREQ_DRAM_CREDIT_STALL[10] TCC_EA_RDREQ_IO_CREDIT_STALL[11] TCC_EA_RDREQ_GMI_CREDIT_STALL[11] TCC_EA_RDREQ_DRAM_CREDIT_STALL[11] TCC_EA_RDREQ_IO_CREDIT_STALL[12] TCC_EA_RDREQ_GMI_CREDIT_STALL[12] TCC_EA_RDREQ_DRAM_CREDIT_STALL[12] TCC_EA_RDREQ_IO_CREDIT_STALL[13] TCC_EA_RDREQ_GMI_CREDIT_STALL[13] TCC_EA_RDREQ_DRAM_CREDIT_STALL[13] TCC_EA_RDREQ_IO_CREDIT_STALL[14] TCC_EA_RDREQ_GMI_CREDIT_STALL[14] TCC_EA_RDREQ_DRAM_CREDIT_STALL[14] TCC_EA_RDREQ_IO_CREDIT_STALL[15] TCC_EA_RDREQ_GMI_CREDIT_STALL[15] TCC_EA_RDREQ_DRAM_CREDIT_STALL[15]
|
||||
pmc: TCC_EA_RDREQ_IO_CREDIT_STALL[0] TCC_EA_RDREQ_GMI_CREDIT_STALL[0] TCC_EA_RDREQ_DRAM_CREDIT_STALL[0] TCC_EA_RDREQ_IO_CREDIT_STALL[1] TCC_EA_RDREQ_GMI_CREDIT_STALL[1] TCC_EA_RDREQ_DRAM_CREDIT_STALL[1] TCC_EA_RDREQ_IO_CREDIT_STALL[2] TCC_EA_RDREQ_GMI_CREDIT_STALL[2] TCC_EA_RDREQ_DRAM_CREDIT_STALL[2] TCC_EA_RDREQ_IO_CREDIT_STALL[3] TCC_EA_RDREQ_GMI_CREDIT_STALL[3] TCC_EA_RDREQ_DRAM_CREDIT_STALL[3] TCC_EA_RDREQ_IO_CREDIT_STALL[4] TCC_EA_RDREQ_GMI_CREDIT_STALL[4] TCC_EA_RDREQ_DRAM_CREDIT_STALL[4] TCC_EA_RDREQ_IO_CREDIT_STALL[5] TCC_EA_RDREQ_GMI_CREDIT_STALL[5] TCC_EA_RDREQ_DRAM_CREDIT_STALL[5] TCC_EA_RDREQ_IO_CREDIT_STALL[6] TCC_EA_RDREQ_GMI_CREDIT_STALL[6] TCC_EA_RDREQ_DRAM_CREDIT_STALL[6] TCC_EA_RDREQ_IO_CREDIT_STALL[7] TCC_EA_RDREQ_GMI_CREDIT_STALL[7] TCC_EA_RDREQ_DRAM_CREDIT_STALL[7] TCC_EA_RDREQ_IO_CREDIT_STALL[8] TCC_EA_RDREQ_GMI_CREDIT_STALL[8] TCC_EA_RDREQ_DRAM_CREDIT_STALL[8] TCC_EA_RDREQ_IO_CREDIT_STALL[9] TCC_EA_RDREQ_GMI_CREDIT_STALL[9] TCC_EA_RDREQ_DRAM_CREDIT_STALL[9] TCC_EA_RDREQ_IO_CREDIT_STALL[10] TCC_EA_RDREQ_GMI_CREDIT_STALL[10] TCC_EA_RDREQ_DRAM_CREDIT_STALL[10] TCC_EA_RDREQ_IO_CREDIT_STALL[11] TCC_EA_RDREQ_GMI_CREDIT_STALL[11] TCC_EA_RDREQ_DRAM_CREDIT_STALL[11] TCC_EA_RDREQ_IO_CREDIT_STALL[12] TCC_EA_RDREQ_GMI_CREDIT_STALL[12] TCC_EA_RDREQ_DRAM_CREDIT_STALL[12] TCC_EA_RDREQ_IO_CREDIT_STALL[13] TCC_EA_RDREQ_GMI_CREDIT_STALL[13] TCC_EA_RDREQ_DRAM_CREDIT_STALL[13] TCC_EA_RDREQ_IO_CREDIT_STALL[14] TCC_EA_RDREQ_GMI_CREDIT_STALL[14] TCC_EA_RDREQ_DRAM_CREDIT_STALL[14] TCC_EA_RDREQ_IO_CREDIT_STALL[15] TCC_EA_RDREQ_GMI_CREDIT_STALL[15] TCC_EA_RDREQ_DRAM_CREDIT_STALL[15]
|
||||
|
||||
|
||||
pmc: TCC_EA_WRREQ_IO_CREDIT_STALL[0] TCC_EA_WRREQ_GMI_CREDIT_STALL[0] TCC_EA_WRREQ_DRAM_CREDIT_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_EA_WRREQ_IO_CREDIT_STALL[1] TCC_EA_WRREQ_GMI_CREDIT_STALL[1] TCC_EA_WRREQ_DRAM_CREDIT_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_EA_WRREQ_IO_CREDIT_STALL[2] TCC_EA_WRREQ_GMI_CREDIT_STALL[2] TCC_EA_WRREQ_DRAM_CREDIT_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_EA_WRREQ_IO_CREDIT_STALL[3] TCC_EA_WRREQ_GMI_CREDIT_STALL[3] TCC_EA_WRREQ_DRAM_CREDIT_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_EA_WRREQ_IO_CREDIT_STALL[4] TCC_EA_WRREQ_GMI_CREDIT_STALL[4] TCC_EA_WRREQ_DRAM_CREDIT_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_EA_WRREQ_IO_CREDIT_STALL[5] TCC_EA_WRREQ_GMI_CREDIT_STALL[5] TCC_EA_WRREQ_DRAM_CREDIT_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_EA_WRREQ_IO_CREDIT_STALL[6] TCC_EA_WRREQ_GMI_CREDIT_STALL[6] TCC_EA_WRREQ_DRAM_CREDIT_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_EA_WRREQ_IO_CREDIT_STALL[7] TCC_EA_WRREQ_GMI_CREDIT_STALL[7] TCC_EA_WRREQ_DRAM_CREDIT_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_EA_WRREQ_IO_CREDIT_STALL[8] TCC_EA_WRREQ_GMI_CREDIT_STALL[8] TCC_EA_WRREQ_DRAM_CREDIT_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_EA_WRREQ_IO_CREDIT_STALL[9] TCC_EA_WRREQ_GMI_CREDIT_STALL[9] TCC_EA_WRREQ_DRAM_CREDIT_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_EA_WRREQ_IO_CREDIT_STALL[10] TCC_EA_WRREQ_GMI_CREDIT_STALL[10] TCC_EA_WRREQ_DRAM_CREDIT_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_EA_WRREQ_IO_CREDIT_STALL[11] TCC_EA_WRREQ_GMI_CREDIT_STALL[11] TCC_EA_WRREQ_DRAM_CREDIT_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_EA_WRREQ_IO_CREDIT_STALL[12] TCC_EA_WRREQ_GMI_CREDIT_STALL[12] TCC_EA_WRREQ_DRAM_CREDIT_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_EA_WRREQ_IO_CREDIT_STALL[13] TCC_EA_WRREQ_GMI_CREDIT_STALL[13] TCC_EA_WRREQ_DRAM_CREDIT_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_EA_WRREQ_IO_CREDIT_STALL[14] TCC_EA_WRREQ_GMI_CREDIT_STALL[14] TCC_EA_WRREQ_DRAM_CREDIT_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_EA_WRREQ_IO_CREDIT_STALL[15] TCC_EA_WRREQ_GMI_CREDIT_STALL[15] TCC_EA_WRREQ_DRAM_CREDIT_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15]
|
||||
|
||||
gpu:
|
||||
kernel:
|
||||
range:
|
||||
pmc: TCC_EA_WRREQ_IO_CREDIT_STALL[0] TCC_EA_WRREQ_GMI_CREDIT_STALL[0] TCC_EA_WRREQ_DRAM_CREDIT_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_EA_WRREQ_IO_CREDIT_STALL[1] TCC_EA_WRREQ_GMI_CREDIT_STALL[1] TCC_EA_WRREQ_DRAM_CREDIT_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_EA_WRREQ_IO_CREDIT_STALL[2] TCC_EA_WRREQ_GMI_CREDIT_STALL[2] TCC_EA_WRREQ_DRAM_CREDIT_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_EA_WRREQ_IO_CREDIT_STALL[3] TCC_EA_WRREQ_GMI_CREDIT_STALL[3] TCC_EA_WRREQ_DRAM_CREDIT_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_EA_WRREQ_IO_CREDIT_STALL[4] TCC_EA_WRREQ_GMI_CREDIT_STALL[4] TCC_EA_WRREQ_DRAM_CREDIT_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_EA_WRREQ_IO_CREDIT_STALL[5] TCC_EA_WRREQ_GMI_CREDIT_STALL[5] TCC_EA_WRREQ_DRAM_CREDIT_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_EA_WRREQ_IO_CREDIT_STALL[6] TCC_EA_WRREQ_GMI_CREDIT_STALL[6] TCC_EA_WRREQ_DRAM_CREDIT_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_EA_WRREQ_IO_CREDIT_STALL[7] TCC_EA_WRREQ_GMI_CREDIT_STALL[7] TCC_EA_WRREQ_DRAM_CREDIT_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_EA_WRREQ_IO_CREDIT_STALL[8] TCC_EA_WRREQ_GMI_CREDIT_STALL[8] TCC_EA_WRREQ_DRAM_CREDIT_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_EA_WRREQ_IO_CREDIT_STALL[9] TCC_EA_WRREQ_GMI_CREDIT_STALL[9] TCC_EA_WRREQ_DRAM_CREDIT_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_EA_WRREQ_IO_CREDIT_STALL[10] TCC_EA_WRREQ_GMI_CREDIT_STALL[10] TCC_EA_WRREQ_DRAM_CREDIT_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_EA_WRREQ_IO_CREDIT_STALL[11] TCC_EA_WRREQ_GMI_CREDIT_STALL[11] TCC_EA_WRREQ_DRAM_CREDIT_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_EA_WRREQ_IO_CREDIT_STALL[12] TCC_EA_WRREQ_GMI_CREDIT_STALL[12] TCC_EA_WRREQ_DRAM_CREDIT_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_EA_WRREQ_IO_CREDIT_STALL[13] TCC_EA_WRREQ_GMI_CREDIT_STALL[13] TCC_EA_WRREQ_DRAM_CREDIT_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_EA_WRREQ_IO_CREDIT_STALL[14] TCC_EA_WRREQ_GMI_CREDIT_STALL[14] TCC_EA_WRREQ_DRAM_CREDIT_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_EA_WRREQ_IO_CREDIT_STALL[15] TCC_EA_WRREQ_GMI_CREDIT_STALL[15] TCC_EA_WRREQ_DRAM_CREDIT_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15]
|
||||
|
||||
gpu:
|
||||
kernel:
|
||||
range:
|
||||
|
||||
@@ -1,19 +1,18 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
|
||||
pmc: TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
|
||||
pmc: TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum
|
||||
pmc: TCC_CYCLE_sum TCC_BUSY_sum TCC_PROBE_sum TCC_PROBE_ALL_sum
|
||||
pmc: TCC_NC_REQ_sum TCC_UC_REQ_sum TCC_CC_REQ_sum
|
||||
pmc: TCC_REQ_sum TCC_STREAMING_REQ_sum TCC_HIT_sum TCC_MISS_sum
|
||||
pmc: TCC_READ_sum TCC_WRITE_sum TCC_ATOMIC_sum TCC_WRITEBACK_sum
|
||||
pmc: TCC_EA_WRREQ_sum TCC_EA_WRREQ_64B_sum TCC_EA_WR_UNCACHED_32B_sum
|
||||
pmc: TCC_EA_WRREQ_sum TCC_EA_WRREQ_64B_sum TCC_EA_WR_UNCACHED_32B_sum
|
||||
pmc: TCC_EA_WRREQ_STALL_sum TCC_EA_WRREQ_IO_CREDIT_STALL_sum TCC_EA_WRREQ_GMI_CREDIT_STALL_sum TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum
|
||||
pmc: TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_EA_ATOMIC_sum TCC_EA_RDREQ_sum TCC_EA_RDREQ_32B_sum
|
||||
pmc: TCC_EA_RD_UNCACHED_32B_sum TCC_EA_RDREQ_IO_CREDIT_STALL_sum TCC_EA_RDREQ_GMI_CREDIT_STALL_sum TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum
|
||||
pmc: TCC_NORMAL_WRITEBACK_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum TCC_NORMAL_EVICT_sum
|
||||
pmc: TCC_ALL_TC_OP_INV_EVICT_sum TCC_EA_RDREQ_DRAM_sum TCC_EA_WRREQ_DRAM_sum
|
||||
pmc: TCC_ALL_TC_OP_INV_EVICT_sum TCC_EA_RDREQ_DRAM_sum TCC_EA_WRREQ_DRAM_sum
|
||||
pmc: TCC_EA_RDREQ_LEVEL_sum TCC_EA_WRREQ_LEVEL_sum TCC_EA_ATOMIC_LEVEL_sum
|
||||
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
range:
|
||||
|
||||
@@ -13,6 +13,6 @@ pmc: TCP_PENDING_STALL_CYCLES_sum
|
||||
|
||||
#pmc: TCA_CYCLE_sum TCA_BUSY_sum
|
||||
|
||||
gpu:
|
||||
kernel:
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
range:
|
||||
|
||||
@@ -7,6 +7,5 @@ pmc: TD_ATOMIC_WAVEFRONT_sum TD_STORE_WAVEFRONT_sum
|
||||
|
||||
|
||||
gpu:
|
||||
range:
|
||||
kernel:
|
||||
|
||||
range:
|
||||
kernel:
|
||||
|
||||
@@ -1,15 +1,13 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
|
||||
pmc: CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE
|
||||
pmc: CPC_CPC_TCIU_BUSY CPC_CPC_TCIU_IDLE
|
||||
pmc: CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
|
||||
pmc: CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
|
||||
pmc: CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
|
||||
pmc: CPC_CPC_STAT_STALL CPC_UTCL1_STALL_ON_TRANSLATION
|
||||
pmc: CPC_CPC_UTCL2IU_BUSY CPC_CPC_UTCL2IU_IDLE
|
||||
pmc: CPC_CPC_UTCL2IU_STALL CPC_ME1_BUSY_FOR_PACKET_DECODE
|
||||
pmc: CPC_ME1_DC0_SPI_BUSY
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,13 +1,11 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES
|
||||
|
||||
pmc: CPF_CPF_STAT_BUSY CPF_CPF_STAT_STALL
|
||||
pmc: CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_STALL
|
||||
pmc: CPF_CPF_STAT_IDLE CPF_CPF_TCIU_IDLE
|
||||
pmc: CPF_CMP_UTCL1_STALL_ON_TRANSLATION
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
pmc: CPF_CMP_UTCL1_STALL_ON_TRANSLATION
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,12 +1,10 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES GRBM_SPI_BUSY
|
||||
|
||||
pmc: SPI_CSN_WINDOW_VALID SPI_CSN_BUSY SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN
|
||||
pmc: SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN
|
||||
pmc: SPI_CSN_WINDOW_VALID SPI_CSN_BUSY SPI_CSN_NUM_THREADGROUPS SPI_CSN_WAVE SPI_RA_REQ_NO_ALLOC SPI_RA_REQ_NO_ALLOC_CSN
|
||||
pmc: SPI_RA_RES_STALL_CSN SPI_RA_TMP_STALL_CSN SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_VGPR_SIMD_FULL_CSN SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_LDS_CU_FULL_CSN
|
||||
pmc: SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR SPI_VWC_CSC_WR SPI_RA_BULKY_CU_FULL_CSN
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,31 +1,27 @@
|
||||
#SQ
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED
|
||||
pmc: SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_INSTS
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_INSTS_VMEM_WR SQ_INSTS_VMEM_RD SQ_INSTS_VMEM SQ_INSTS_SALU SQ_INSTS_VSKIPPED
|
||||
pmc: SQ_INSTS_SMEM SQ_INSTS_FLAT SQ_INSTS_LDS SQ_INSTS_GDS SQ_INSTS_EXP_GDS SQ_INSTS_BRANCH SQ_INSTS_SENDMSG SQ_INSTS
|
||||
pmc: SQ_WAVE_CYCLES SQ_WAIT_ANY SQ_WAIT_INST_ANY SQ_ACTIVE_INST_ANY SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_INSTS_VALU
|
||||
pmc: SQ_ACTIVE_INST_VMEM SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_VALU SQ_ACTIVE_INST_SCA SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_FLAT SQ_INST_CYCLES_VMEM_WR
|
||||
pmc: SQ_INST_CYCLES_VMEM_RD SQ_INST_CYCLES_SMEM SQ_INST_CYCLES_SALU SQ_THREAD_CYCLES_VALU SQ_IFETCH SQ_LDS_BANK_CONFLICT SQ_LDS_ADDR_CONFLICT SQ_LDS_UNALIGNED_STALL
|
||||
pmc: SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_INSTS_VSKIPPED
|
||||
pmc: SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED SQ_INSTS_SMEM_NORM
|
||||
pmc: SQ_WAVES SQ_WAVES_EQ_64 SQ_WAVES_LT_64 SQ_WAVES_LT_48 SQ_WAVES_LT_32 SQ_WAVES_LT_16 SQ_ITEMS SQ_INSTS_VSKIPPED
|
||||
pmc: SQ_LDS_MEM_VIOLATIONS SQ_LDS_ATOMIC_RETURN SQ_LDS_IDX_ACTIVE SQ_WAVES_RESTORED SQ_WAVES_SAVED SQ_INSTS_SMEM_NORM
|
||||
|
||||
|
||||
#SQ:MI200
|
||||
#pmc: SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
|
||||
#pmc: SQ_INSTS_FLAT_LDS_ONLY SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64
|
||||
#pmc: SQ_INSTS_MFMA SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 SQ_VALU_MFMA_BUSY_CYCLES
|
||||
#pmc: SQ_INSTS_FLAT_LDS_ONLY SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64
|
||||
|
||||
#SQC
|
||||
pmc: SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16
|
||||
pmc: SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8
|
||||
pmc: SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1 SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
pmc: SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16
|
||||
pmc: SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8
|
||||
pmc: SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1 SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
|
||||
|
||||
|
||||
########################################
|
||||
# Filtering
|
||||
########################################
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
@@ -4,9 +4,7 @@
|
||||
pmc: SQ_INSTS_VMEM SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -4,10 +4,8 @@
|
||||
pmc: SQ_INSTS_SMEM SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
|
||||
kernel:
|
||||
range:
|
||||
gpu:
|
||||
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -3,9 +3,6 @@
|
||||
#################################################
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL SQ_ACCUM_PREV_HIRES
|
||||
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
kernel:
|
||||
|
||||
@@ -3,13 +3,7 @@
|
||||
#################################################
|
||||
pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS SQ_ACCUM_PREV_HIRES
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES SQ_ACCUM_PREV_HIRES
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES SQ_ACCUM_PREV_HIRES
|
||||
|
||||
gpu:
|
||||
range:
|
||||
|
||||
kernel:
|
||||
gpu:
|
||||
range:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,12 +1,11 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES
|
||||
|
||||
|
||||
pmc: SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16
|
||||
pmc: SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8
|
||||
pmc: SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1 SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
pmc: SQC_TC_INST_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ SQC_TC_DATA_ATOMIC_REQ SQC_TC_STALL SQC_TC_REQ SQC_DCACHE_REQ_READ_16
|
||||
pmc: SQC_ICACHE_REQ SQC_ICACHE_HITS SQC_ICACHE_MISSES SQC_ICACHE_MISSES_DUPLICATE SQC_DCACHE_INPUT_VALID_READYB SQC_DCACHE_ATOMIC SQC_DCACHE_REQ_READ_8
|
||||
pmc: SQC_DCACHE_REQ SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ_READ_1 SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4
|
||||
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
range:
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
|
||||
@@ -1,25 +1,25 @@
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES
|
||||
pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES
|
||||
|
||||
pmc: TA_TA_BUSY_sum
|
||||
pmc: TA_TA_BUSY_sum
|
||||
|
||||
# buffer access
|
||||
pmc: TA_BUFFER_WAVEFRONTS_sum TA_BUFFER_READ_WAVEFRONTS_sum
|
||||
pmc: TA_BUFFER_WRITE_WAVEFRONTS_sum TA_BUFFER_ATOMIC_WAVEFRONTS_sum
|
||||
pmc: TA_BUFFER_TOTAL_CYCLES_sum
|
||||
pmc: TA_BUFFER_TOTAL_CYCLES_sum
|
||||
pmc: TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum
|
||||
|
||||
|
||||
# stalls
|
||||
pmc: TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_TOTAL_WAVEFRONTS_sum
|
||||
pmc: TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum
|
||||
pmc: TA_ADDR_STALLED_BY_TD_CYCLES_sum TA_DATA_STALLED_BY_TC_CYCLES_sum
|
||||
|
||||
# flat accesses
|
||||
pmc: TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum
|
||||
pmc: TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum
|
||||
pmc: TA_FLAT_WAVEFRONTS_sum TA_FLAT_READ_WAVEFRONTS_sum
|
||||
pmc: TA_FLAT_WRITE_WAVEFRONTS_sum TA_FLAT_ATOMIC_WAVEFRONTS_sum
|
||||
|
||||
|
||||
range:
|
||||
range:
|
||||
|
||||
gpu:
|
||||
|
||||
kernel:
|
||||
kernel:
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user