libhsakmt: gfx950: Add option to enable HIGH_PRECISION
Environment variable HSA_HIGH_PRECISION_MODE can be used to control MFMA precision Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Change-Id: Ib78dd9dd8867025e090a3cca96ab6db4f65dea12
This commit is contained in:
committed by
Yat Sin, David
parent
3be9c49b63
commit
2a64fa5e06
@@ -163,7 +163,7 @@ struct kfd_ioctl_set_memory_policy_args {
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__u32 gpu_id; /* to KFD */
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__u32 gpu_id; /* to KFD */
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__u32 default_policy; /* to KFD */
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__u32 default_policy; /* to KFD */
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__u32 alternate_policy; /* to KFD */
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__u32 alternate_policy; /* to KFD */
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__u32 pad;
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__u32 misc_process_flag; /* to KFD */
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};
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};
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/*
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/*
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@@ -363,6 +363,9 @@ enum kfd_dbg_trap_exception_code {
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#define KFD_DBG_EC_TYPE_IS_PROCESS(ecode) \
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#define KFD_DBG_EC_TYPE_IS_PROCESS(ecode) \
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(!!(KFD_EC_MASK(ecode) & KFD_EC_MASK_PROCESS))
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(!!(KFD_EC_MASK(ecode) & KFD_EC_MASK_PROCESS))
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/* Misc. per process flags */
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#define ENABLE_MFMA_HIGH_PRECISION (1 << 0)
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enum kfd_dbg_runtime_state {
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enum kfd_dbg_runtime_state {
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DEBUG_RUNTIME_STATE_DISABLED = 0,
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DEBUG_RUNTIME_STATE_DISABLED = 0,
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DEBUG_RUNTIME_STATE_ENABLED = 1,
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DEBUG_RUNTIME_STATE_ENABLED = 1,
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+11
-4
@@ -2004,7 +2004,8 @@ HSAKMT_STATUS hsakmt_fmm_release(void *address)
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}
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}
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static int fmm_set_memory_policy(uint32_t gpu_id, int default_policy, int alt_policy,
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static int fmm_set_memory_policy(uint32_t gpu_id, int default_policy, int alt_policy,
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uintptr_t alt_base, uint64_t alt_size)
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uintptr_t alt_base, uint64_t alt_size,
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uint32_t misc_process_flags)
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{
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{
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struct kfd_ioctl_set_memory_policy_args args = {0};
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struct kfd_ioctl_set_memory_policy_args args = {0};
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@@ -2013,6 +2014,7 @@ static int fmm_set_memory_policy(uint32_t gpu_id, int default_policy, int alt_po
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args.alternate_policy = alt_policy;
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args.alternate_policy = alt_policy;
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args.alternate_aperture_base = alt_base;
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args.alternate_aperture_base = alt_base;
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args.alternate_aperture_size = alt_size;
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args.alternate_aperture_size = alt_size;
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args.misc_process_flag = misc_process_flags;
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return hsakmt_ioctl(hsakmt_kfd_fd, AMDKFD_IOC_SET_MEMORY_POLICY, &args);
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return hsakmt_ioctl(hsakmt_kfd_fd, AMDKFD_IOC_SET_MEMORY_POLICY, &args);
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}
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}
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@@ -2517,10 +2519,10 @@ HSAKMT_STATUS hsakmt_fmm_init_process_apertures(unsigned int NumNodes)
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uint32_t num_of_sysfs_nodes;
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uint32_t num_of_sysfs_nodes;
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HSAKMT_STATUS ret = HSAKMT_STATUS_SUCCESS;
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HSAKMT_STATUS ret = HSAKMT_STATUS_SUCCESS;
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char *disableCache, *pagedUserptr, *checkUserptr, *guardPagesStr, *reserveSvm;
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char *disableCache, *pagedUserptr, *checkUserptr, *guardPagesStr, *reserveSvm;
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char *maxVaAlignStr;
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char *maxVaAlignStr, *mfmaHighPrecisionModeStr;
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unsigned int guardPages = 1;
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unsigned int guardPages = 1;
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uint64_t svm_base = 0, svm_limit = 0;
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uint64_t svm_base = 0, svm_limit = 0;
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uint32_t svm_alignment = 0;
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uint32_t svm_alignment = 0, mfma_high_precision_mode = 0;
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/* If HSA_DISABLE_CACHE is set to a non-0 value, disable caching */
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/* If HSA_DISABLE_CACHE is set to a non-0 value, disable caching */
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disableCache = getenv("HSA_DISABLE_CACHE");
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disableCache = getenv("HSA_DISABLE_CACHE");
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@@ -2549,6 +2551,9 @@ HSAKMT_STATUS hsakmt_fmm_init_process_apertures(unsigned int NumNodes)
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if (!guardPagesStr || sscanf(guardPagesStr, "%u", &guardPages) != 1)
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if (!guardPagesStr || sscanf(guardPagesStr, "%u", &guardPages) != 1)
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guardPages = 1;
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guardPages = 1;
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mfmaHighPrecisionModeStr = getenv("HSA_HIGH_PRECISION_MODE");
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mfma_high_precision_mode = (mfmaHighPrecisionModeStr &&
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strcmp(mfmaHighPrecisionModeStr, "0"));
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/* Sets the max VA alignment order size during mapping. By default the order
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/* Sets the max VA alignment order size during mapping. By default the order
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* size is set to 18(1G) for GFX950 to reduce TLB hits. If any non-gfx950
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* size is set to 18(1G) for GFX950 to reduce TLB hits. If any non-gfx950
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* ASIC is found in the system, set back to 9(2MB).
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* ASIC is found in the system, set back to 9(2MB).
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@@ -2800,7 +2805,9 @@ HSAKMT_STATUS hsakmt_fmm_init_process_apertures(unsigned int NumNodes)
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KFD_IOC_CACHE_POLICY_COHERENT :
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KFD_IOC_CACHE_POLICY_COHERENT :
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KFD_IOC_CACHE_POLICY_NONCOHERENT,
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KFD_IOC_CACHE_POLICY_NONCOHERENT,
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KFD_IOC_CACHE_POLICY_COHERENT,
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KFD_IOC_CACHE_POLICY_COHERENT,
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alt_base, alt_size);
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alt_base, alt_size,
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hsakmt_get_gfxv_by_node_id(i) == GFX_VERSION_GFX950 ?
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mfma_high_precision_mode : 0);
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if (err) {
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if (err) {
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pr_err("Failed to set mem policy for GPU [0x%x]\n",
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pr_err("Failed to set mem policy for GPU [0x%x]\n",
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process_apertures[i].gpu_id);
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process_apertures[i].gpu_id);
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