diff --git a/hipamd/include/hip/amd_detail/hip_runtime_api.h b/hipamd/include/hip/amd_detail/hip_runtime_api.h index 0a3f542642..5c5eb97b63 100644 --- a/hipamd/include/hip/amd_detail/hip_runtime_api.h +++ b/hipamd/include/hip/amd_detail/hip_runtime_api.h @@ -237,8 +237,14 @@ typedef enum hipMemoryAdvise { hipMemAdviseUnsetPreferredLocation = 4, ///< Clear the preferred location for the data hipMemAdviseSetAccessedBy = 5, ///< Data will be accessed by the specified device, ///< so prevent page faults as much as possible - hipMemAdviseUnsetAccessedBy = 6 ///< Let HIP to decide on the page faulting policy + hipMemAdviseUnsetAccessedBy = 6, ///< Let HIP to decide on the page faulting policy ///< for the specified device + hipMemAdviseSetCoarseGrain = 100, ///< The default memory model is fine-grain. That allows + ///< coherent operations between host and device, while + ///< executing kernels. The coarse-grain can be used + ///< for data that only needs to be coherent at dispatch + ///< boundaries for better performance. + hipMemAdviseUnsetCoarseGrain = 101 ///< Restores cache coherency policy back to fine-grain } hipMemoryAdvise; /* diff --git a/hipamd/rocclr/hip_hmm.cpp b/hipamd/rocclr/hip_hmm.cpp index 4278115b25..531b1efc19 100644 --- a/hipamd/rocclr/hip_hmm.cpp +++ b/hipamd/rocclr/hip_hmm.cpp @@ -45,6 +45,10 @@ static_assert(static_cast(hipMemAdviseSetAccessedBy) == amd::MemoryAdvice::SetAccessedBy, "Enum mismatch with ROCclr!"); static_assert(static_cast(hipMemAdviseUnsetAccessedBy) == amd::MemoryAdvice::UnsetAccessedBy, "Enum mismatch with ROCclr!"); +static_assert(static_cast(hipMemAdviseSetCoarseGrain) == + amd::MemoryAdvice::SetCoarseGrain, "Enum mismatch with ROCclr!"); +static_assert(static_cast(hipMemAdviseUnsetCoarseGrain) == + amd::MemoryAdvice::UnsetCoarseGrain, "Enum mismatch with ROCclr!"); static_assert(static_cast(hipMemRangeAttributeReadMostly) == amd::MemRangeAttribute::ReadMostly, "Enum mismatch with ROCclr!");