[SWDEV-523349/SWDEV-527257] Fix Rdci Config (#161)
Change-Id: Iae21ea8061205f186086a3ed59c6259ddeb1dbe7 Signed-off-by: adapryor <Adam.pryor@amd.com>
This commit is contained in:
+2
-2
@@ -64,7 +64,7 @@ extern "C" {
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typedef enum {
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typedef enum {
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RDC_ST_OK = 0, //!< Success
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RDC_ST_OK = 0, //!< Success
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RDC_ST_NOT_SUPPORTED, //!< Not supported feature
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RDC_ST_NOT_SUPPORTED, //!< Not supported feature
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RDC_ST_MSI_ERROR, //!< The MSI library error
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RDC_ST_SMI_ERROR, //!< The SMI library error
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RDC_ST_FAIL_LOAD_MODULE, //!< Fail to load the library
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RDC_ST_FAIL_LOAD_MODULE, //!< Fail to load the library
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RDC_ST_INVALID_HANDLER, //!< Invalid handler
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RDC_ST_INVALID_HANDLER, //!< Invalid handler
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RDC_ST_BAD_PARAMETER, //!< A parameter is invalid
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RDC_ST_BAD_PARAMETER, //!< A parameter is invalid
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@@ -593,7 +593,7 @@ typedef enum {
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* @brief Type of Components
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* @brief Type of Components
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*/
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*/
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typedef enum {
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typedef enum {
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RDC_AMDMSI_COMPONENT
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RDC_AMDSMI_COMPONENT
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// If needed later, add them one by one
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// If needed later, add them one by one
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} rdc_component_t;
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} rdc_component_t;
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@@ -42,7 +42,7 @@ class rdc_status_t(Enum):
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return int(obj)
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return int(obj)
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RDC_ST_OK = 0
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RDC_ST_OK = 0
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RDC_ST_NOT_SUPPORTED = 1
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RDC_ST_NOT_SUPPORTED = 1
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RDC_ST_MSI_ERROR = 2
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RDC_ST_SMI_ERROR = 2
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RDC_ST_FAIL_LOAD_MODULE = 3
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RDC_ST_FAIL_LOAD_MODULE = 3
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RDC_ST_INVALID_HANDLER = 4
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RDC_ST_INVALID_HANDLER = 4
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RDC_ST_BAD_PARAMETER = 5
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RDC_ST_BAD_PARAMETER = 5
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@@ -21,8 +21,8 @@ THE SOFTWARE.
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*/
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*/
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#include <dlfcn.h>
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#include <dlfcn.h>
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#include <string.h>
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#include <string.h>
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#include <fstream>
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#include <fstream>
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#include <map>
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#include <map>
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#include "common/rdc_fields_supported.h"
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#include "common/rdc_fields_supported.h"
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@@ -352,7 +352,7 @@ const char* rdc_status_string(rdc_status_t result) {
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return "Cannot find the value";
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return "Cannot find the value";
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case RDC_ST_BAD_PARAMETER:
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case RDC_ST_BAD_PARAMETER:
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return "Invalid parameters";
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return "Invalid parameters";
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case RDC_ST_MSI_ERROR:
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case RDC_ST_SMI_ERROR:
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return "SMI error";
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return "SMI error";
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case RDC_ST_MAX_LIMIT:
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case RDC_ST_MAX_LIMIT:
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return "The max limit reached";
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return "The max limit reached";
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@@ -477,7 +477,6 @@ char* strncpy_with_null(char* dest, const char* src, size_t n) {
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return dest;
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return dest;
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}
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}
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rdc_status_t rdc_policy_set(rdc_handle_t p_rdc_handle, rdc_gpu_group_t group_id,
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rdc_status_t rdc_policy_set(rdc_handle_t p_rdc_handle, rdc_gpu_group_t group_id,
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rdc_policy_t policy) {
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rdc_policy_t policy) {
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if (!p_rdc_handle) {
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if (!p_rdc_handle) {
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@@ -541,20 +540,20 @@ rdc_status_t rdc_get_num_partition(rdc_handle_t p_rdc_handle, uint32_t index,
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return RDC_ST_INVALID_HANDLER;
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return RDC_ST_INVALID_HANDLER;
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}
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}
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return static_cast<amd::rdc::RdcHandler*>(p_rdc_handle)
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return static_cast<amd::rdc::RdcHandler*>(p_rdc_handle)
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->rdc_get_num_partition(index, num_partition);
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->rdc_get_num_partition(index, num_partition);
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}
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}
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rdc_status_t rdc_instance_profile_get(rdc_handle_t p_rdc_handle, uint32_t entity_index,
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rdc_status_t rdc_instance_profile_get(rdc_handle_t p_rdc_handle, uint32_t entity_index,
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rdc_instance_resource_type_t resource_type,
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rdc_instance_resource_type_t resource_type,
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rdc_resource_profile_t* profile) {
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rdc_resource_profile_t* profile) {
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if (!p_rdc_handle || !profile) {
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if (!p_rdc_handle || !profile) {
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return RDC_ST_INVALID_HANDLER;
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return RDC_ST_INVALID_HANDLER;
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}
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}
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return static_cast<amd::rdc::RdcHandler*>(p_rdc_handle)
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return static_cast<amd::rdc::RdcHandler*>(p_rdc_handle)
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->rdc_instance_profile_get(entity_index, resource_type, profile);
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->rdc_instance_profile_get(entity_index, resource_type, profile);
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}
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}
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const char * get_rocm_path(const char * search_string) {
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const char* get_rocm_path(const char* search_string) {
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// set default rocm path in case lookup fails
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// set default rocm path in case lookup fails
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static std::string rocm_path("/opt/rocm");
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static std::string rocm_path("/opt/rocm");
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const char* rocm_path_env = getenv("ROCM_PATH");
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const char* rocm_path_env = getenv("ROCM_PATH");
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@@ -44,8 +44,7 @@ void RdcConfigSettingsImpl::monitorSettings() {
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rdc_status_t rdc_status;
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rdc_status_t rdc_status;
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rdc_group_info_t rdc_group_info = {};
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rdc_group_info_t rdc_group_info = {};
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amdsmi_power_cap_info_t cap_info = {};
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amdsmi_power_cap_info_t cap_info = {};
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amdsmi_dev_perf_level_t perf_info = {};
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amdsmi_frequencies_t freqs = {};
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uint32_t od;
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uint64_t cached_value;
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uint64_t cached_value;
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while (true) {
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while (true) {
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@@ -103,19 +102,18 @@ void RdcConfigSettingsImpl::monitorSettings() {
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}
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}
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// Mem clock
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// Mem clock
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status = amdsmi_get_gpu_overdrive_level(processor_handle, &od);
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status = amdsmi_get_clk_freq(processor_handle, AMDSMI_CLK_TYPE_MEM, &freqs);
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if (status != AMDSMI_STATUS_SUCCESS) {
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if (status != AMDSMI_STATUS_SUCCESS) {
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RDC_LOG(
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RDC_LOG(
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RDC_ERROR,
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RDC_ERROR,
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"RdcConfigSettingsImpl::monitorSettings(); amdsmi_get_gpu_overdrive_level failed: "
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"RdcConfigSettingsImpl::monitorSettings(); amdsmi_get_clk_freq failed: " << status);
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<< status);
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continue;
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continue;
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}
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}
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auto mem_clk_it = cached_settings.find(RDC_CFG_MEMORY_CLOCK_LIMIT);
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auto mem_clk_it = cached_settings.find(RDC_CFG_MEMORY_CLOCK_LIMIT);
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if (mem_clk_it != cached_settings.end()) {
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if (mem_clk_it != cached_settings.end()) {
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cached_value = mem_clk_it->second.target_value;
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cached_value = mem_clk_it->second.target_value;
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if (od == cached_value) {
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if (freqs.frequency[freqs.current] == cached_value) {
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status = amdsmi_set_gpu_clk_limit(processor_handle, AMDSMI_CLK_TYPE_MEM,
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status = amdsmi_set_gpu_clk_limit(processor_handle, AMDSMI_CLK_TYPE_MEM,
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CLK_LIMIT_MAX, cached_value);
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CLK_LIMIT_MAX, cached_value);
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if (status != AMDSMI_STATUS_SUCCESS) {
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if (status != AMDSMI_STATUS_SUCCESS) {
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@@ -129,18 +127,18 @@ void RdcConfigSettingsImpl::monitorSettings() {
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}
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}
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// GFX clock
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// GFX clock
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status = amdsmi_get_gpu_perf_level(processor_handle, &perf_info);
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status = amdsmi_get_clk_freq(processor_handle, AMDSMI_CLK_TYPE_GFX, &freqs);
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if (status != AMDSMI_STATUS_SUCCESS) {
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if (status != AMDSMI_STATUS_SUCCESS) {
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RDC_LOG(RDC_ERROR,
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RDC_LOG(
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"RdcConfigSettingsImpl::monitorSettings(); amdsmi_get_gpu_perf_level failed: "
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RDC_ERROR,
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<< status);
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"RdcConfigSettingsImpl::monitorSettings(); amdsmi_get_clk_freq failed: " << status);
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continue;
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continue;
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}
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}
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auto gfx_clk_it = cached_settings.find(RDC_CFG_GFX_CLOCK_LIMIT);
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auto gfx_clk_it = cached_settings.find(RDC_CFG_GFX_CLOCK_LIMIT);
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if (gfx_clk_it != cached_settings.end()) {
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if (gfx_clk_it != cached_settings.end()) {
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cached_value = gfx_clk_it->second.target_value;
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cached_value = gfx_clk_it->second.target_value;
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if (od == cached_value) {
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if (freqs.frequency[freqs.current] == cached_value) {
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status = amdsmi_set_gpu_clk_limit(processor_handle, AMDSMI_CLK_TYPE_GFX,
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status = amdsmi_set_gpu_clk_limit(processor_handle, AMDSMI_CLK_TYPE_GFX,
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CLK_LIMIT_MAX, cached_value);
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CLK_LIMIT_MAX, cached_value);
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if (status != AMDSMI_STATUS_SUCCESS) {
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if (status != AMDSMI_STATUS_SUCCESS) {
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@@ -313,31 +311,40 @@ rdc_status_t RdcConfigSettingsImpl::rdc_config_clear(rdc_gpu_group_t group_id) {
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// Reset GFX clock limit if it was set
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// Reset GFX clock limit if it was set
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if (group_iter->second.find(RDC_CFG_GFX_CLOCK_LIMIT) != group_iter->second.end()) {
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if (group_iter->second.find(RDC_CFG_GFX_CLOCK_LIMIT) != group_iter->second.end()) {
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amdsmi_dev_perf_level_t perf_info = {};
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amdsmi_frequencies_t freqs = {};
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amd_ret = amdsmi_get_gpu_perf_level(processor_handle, &perf_info);
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amd_ret = amdsmi_get_clk_freq(processor_handle, AMDSMI_CLK_TYPE_GFX, &freqs);
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if (amd_ret == AMDSMI_STATUS_SUCCESS && perf_info != AMDSMI_DEV_PERF_LEVEL_AUTO) {
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if (amd_ret == AMDSMI_STATUS_SUCCESS) {
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amd_ret = amdsmi_set_gpu_clk_limit(processor_handle, AMDSMI_CLK_TYPE_GFX, CLK_LIMIT_MAX,
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uint64_t curr = freqs.frequency[freqs.current];
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AMDSMI_DEV_PERF_LEVEL_AUTO);
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uint64_t maxf = freqs.frequency[freqs.num_supported - 1];
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if (amd_ret != AMDSMI_STATUS_SUCCESS) {
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if (curr != maxf) {
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RDC_LOG(RDC_ERROR,
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amd_ret = amdsmi_set_gpu_clk_limit(processor_handle, AMDSMI_CLK_TYPE_GFX, CLK_LIMIT_MAX,
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"RdcConfigSettingsImpl::rdc_config_clear: Failed to reset GFX clock limit : "
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AMDSMI_DEV_PERF_LEVEL_AUTO);
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<< amd_ret);
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if (amd_ret != AMDSMI_STATUS_SUCCESS) {
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break;
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RDC_LOG(RDC_ERROR,
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"RdcConfigSettingsImpl::rdc_config_clear: Failed to reset GFX clock limit : "
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<< amd_ret);
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break;
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}
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}
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}
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}
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}
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}
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}
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// Reset memory clock limit if it was set
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// Reset memory clock limit if it was set
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if (group_iter->second.find(RDC_CFG_MEMORY_CLOCK_LIMIT) != group_iter->second.end()) {
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if (group_iter->second.find(RDC_CFG_MEMORY_CLOCK_LIMIT) != group_iter->second.end()) {
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uint32_t od = 0;
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amdsmi_frequencies_t freqs = {};
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amd_ret = amdsmi_get_gpu_overdrive_level(processor_handle, &od);
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amd_ret = amdsmi_get_clk_freq(processor_handle, AMDSMI_CLK_TYPE_MEM, &freqs);
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if (amd_ret == AMDSMI_STATUS_SUCCESS && od != 0) {
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if (amd_ret == AMDSMI_STATUS_SUCCESS) {
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amd_ret = amdsmi_set_gpu_clk_limit(processor_handle, AMDSMI_CLK_TYPE_MEM, CLK_LIMIT_MAX, 0);
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uint64_t curr = freqs.frequency[freqs.current];
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if (amd_ret != AMDSMI_STATUS_SUCCESS) {
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uint64_t maxf = freqs.frequency[freqs.num_supported - 1];
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RDC_LOG(RDC_ERROR,
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if (curr != maxf) {
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"RdcConfigSettingsImpl::rdc_config_clear: Failed to reset memory clock limit:"
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amd_ret =
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<< amd_ret);
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amdsmi_set_gpu_clk_limit(processor_handle, AMDSMI_CLK_TYPE_MEM, CLK_LIMIT_MAX, 0);
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break;
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if (amd_ret != AMDSMI_STATUS_SUCCESS) {
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RDC_LOG(RDC_ERROR,
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"RdcConfigSettingsImpl::rdc_config_clear: Failed to reset memory clock limit:"
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<< amd_ret);
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break;
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}
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}
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}
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}
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}
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}
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}
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@@ -210,7 +210,7 @@ rdc_status_t RdcEmbeddedHandler::rdc_device_get_component_version(
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return RDC_ST_BAD_PARAMETER;
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return RDC_ST_BAD_PARAMETER;
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}
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}
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if (component == RDC_AMDMSI_COMPONENT) {
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if (component == RDC_AMDSMI_COMPONENT) {
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amdsmi_status_t ret;
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amdsmi_status_t ret;
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amdsmi_version_t ver = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, nullptr};
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amdsmi_version_t ver = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, nullptr};
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@@ -219,7 +219,7 @@ rdc_status_t RdcEmbeddedHandler::rdc_device_get_component_version(
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if (ret != AMDSMI_STATUS_SUCCESS) {
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if (ret != AMDSMI_STATUS_SUCCESS) {
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RDC_LOG(RDC_ERROR, "Failed to obtain the version of the server's amd-smi library. reason: "
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RDC_LOG(RDC_ERROR, "Failed to obtain the version of the server's amd-smi library. reason: "
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<< (ret == AMDSMI_STATUS_INVAL ? "Invalid parameters" : "unknown"));
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<< (ret == AMDSMI_STATUS_INVAL ? "Invalid parameters" : "unknown"));
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return RDC_ST_MSI_ERROR;
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return RDC_ST_SMI_ERROR;
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}
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}
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strncpy_with_null(p_rdc_compv->version, ver.build, RDC_MAX_VERSION_STR_LENGTH);
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strncpy_with_null(p_rdc_compv->version, ver.build, RDC_MAX_VERSION_STR_LENGTH);
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@@ -1125,7 +1125,7 @@ rdc_status_t RdcMetricFetcherImpl::fetch_smi_field(uint32_t gpu_index, rdc_field
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<< value->value.str << ", latency " << latency);
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<< value->value.str << ", latency " << latency);
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}
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}
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return value->status == AMDSMI_STATUS_SUCCESS ? RDC_ST_OK : RDC_ST_MSI_ERROR;
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return value->status == AMDSMI_STATUS_SUCCESS ? RDC_ST_OK : RDC_ST_SMI_ERROR;
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}
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}
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std::shared_ptr<FieldSMIData> RdcMetricFetcherImpl::get_smi_data(RdcFieldKey key) {
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std::shared_ptr<FieldSMIData> RdcMetricFetcherImpl::get_smi_data(RdcFieldKey key) {
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@@ -82,7 +82,7 @@ rdc_status_t RdcPolicyImpl::rdc_policy_set(rdc_gpu_group_t group_id, rdc_policy_
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gpu_index = group_info.entity_ids[i];
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gpu_index = group_info.entity_ids[i];
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status = metric_fetcher_->fetch_smi_field(gpu_index, RDC_FI_GPU_PAGE_RETRIED, &value);
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status = metric_fetcher_->fetch_smi_field(gpu_index, RDC_FI_GPU_PAGE_RETRIED, &value);
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if (status == RDC_ST_MSI_ERROR) return RDC_ST_NOT_SUPPORTED;
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if (status == RDC_ST_SMI_ERROR) return RDC_ST_NOT_SUPPORTED;
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}
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}
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}
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}
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@@ -212,7 +212,7 @@ rdc_status_t RdcSmiDiagnosticImpl::check_smi_topo_info(uint32_t gpu_index[RDC_MA
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err_info += " fail";
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err_info += " fail";
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strncpy_with_null(result->details.msg, err_info.c_str(), MAX_DIAG_MSG_LENGTH);
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strncpy_with_null(result->details.msg, err_info.c_str(), MAX_DIAG_MSG_LENGTH);
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strncpy_with_null(result->info, err_info.c_str(), MAX_DIAG_MSG_LENGTH);
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strncpy_with_null(result->info, err_info.c_str(), MAX_DIAG_MSG_LENGTH);
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return RDC_ST_MSI_ERROR;
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return RDC_ST_SMI_ERROR;
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}
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}
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info += std::to_string(i) + "=>";
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info += std::to_string(i) + "=>";
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@@ -228,7 +228,7 @@ void RdciConfigSubSystem::process() {
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if (is_json_output()) {
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if (is_json_output()) {
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json_ss << "\"group_id\": \"" << group_id_ << "\", \"status\": \"ok\"";
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json_ss << "\"group_id\": \"" << group_id_ << "\", \"status\": \"ok\"";
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} else {
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} else {
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std::cout << "Successfully cleared all configurationbelongs for group: " << group_id_
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std::cout << "Successfully cleared all configuration for group: " << group_id_
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<< std::endl;
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<< std::endl;
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}
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}
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std::cout << json_ss.str() << std::endl;
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std::cout << json_ss.str() << std::endl;
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@@ -292,11 +292,13 @@ void RdciConfigSubSystem::display_config_settings(rdc_config_setting_list_t& rdc
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json_ss << "\"N/A\"";
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json_ss << "\"N/A\"";
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} else {
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} else {
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if (value.type == INTEGER) {
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if (value.type == INTEGER) {
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ss << value.value.l_int;
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double mhz = static_cast<double>(value.value.l_int) / 1'000'000.0;
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json_ss << value.value.l_int;
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ss << std::fixed << std::setprecision(0) << mhz;
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json_ss << mhz;
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} else if (value.type == DOUBLE) {
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} else if (value.type == DOUBLE) {
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ss << std::fixed << std::setprecision(3) << value.value.dbl;
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double mhz = value.value.dbl / 1'000'000.0;
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json_ss << value.value.dbl;
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ss << std::fixed << std::setprecision(0) << mhz;
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json_ss << mhz;
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} else {
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} else {
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ss << value.value.str;
|
ss << value.value.str;
|
||||||
json_ss << value.value.str;
|
json_ss << value.value.str;
|
||||||
@@ -320,11 +322,13 @@ void RdciConfigSubSystem::display_config_settings(rdc_config_setting_list_t& rdc
|
|||||||
json_ss << "\"N/A\"";
|
json_ss << "\"N/A\"";
|
||||||
} else {
|
} else {
|
||||||
if (value.type == INTEGER) {
|
if (value.type == INTEGER) {
|
||||||
ss << value.value.l_int;
|
double mhz = static_cast<double>(value.value.l_int) / 1'000'000.0;
|
||||||
json_ss << value.value.l_int;
|
ss << std::fixed << std::setprecision(0) << mhz;
|
||||||
|
json_ss << mhz;
|
||||||
} else if (value.type == DOUBLE) {
|
} else if (value.type == DOUBLE) {
|
||||||
ss << std::fixed << std::setprecision(3) << value.value.dbl;
|
double mhz = value.value.dbl / 1'000'000.0;
|
||||||
json_ss << value.value.dbl;
|
ss << std::fixed << std::setprecision(0) << mhz;
|
||||||
|
json_ss << mhz;
|
||||||
} else {
|
} else {
|
||||||
ss << value.value.str;
|
ss << value.value.str;
|
||||||
json_ss << value.value.str;
|
json_ss << value.value.str;
|
||||||
|
|||||||
@@ -297,7 +297,7 @@ void RdciDiscoverySubSystem::show_attributes_with_partitions() {
|
|||||||
|
|
||||||
void RdciDiscoverySubSystem::show_version() {
|
void RdciDiscoverySubSystem::show_version() {
|
||||||
rdc_component_version_t smiv;
|
rdc_component_version_t smiv;
|
||||||
rdc_status_t result = rdc_device_get_component_version(rdc_handle_, RDC_AMDMSI_COMPONENT, &smiv);
|
rdc_status_t result = rdc_device_get_component_version(rdc_handle_, RDC_AMDSMI_COMPONENT, &smiv);
|
||||||
if (result != RDC_ST_OK) {
|
if (result != RDC_ST_OK) {
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user