diff --git a/projects/clr/rocclr/runtime/device/gpu/gpucompiler.cpp b/projects/clr/rocclr/runtime/device/gpu/gpucompiler.cpp
index f51cad05cc..a541dbbb5c 100644
--- a/projects/clr/rocclr/runtime/device/gpu/gpucompiler.cpp
+++ b/projects/clr/rocclr/runtime/device/gpu/gpucompiler.cpp
@@ -349,7 +349,7 @@ HSAILProgram::compileImpl(
         arch += "64";
     }
     target = aclGetTargetInfo(arch.c_str(),
-        dev().info().name_, &errorCode);
+        dev().hwInfo()->targetName_, &errorCode);
 
     // end if asic info is ready
     // We dump the source code for each program (param: headers)
diff --git a/projects/clr/rocclr/runtime/device/gpu/gpudevice.cpp b/projects/clr/rocclr/runtime/device/gpu/gpudevice.cpp
index 2a6daa1dcf..aeef022c3e 100644
--- a/projects/clr/rocclr/runtime/device/gpu/gpudevice.cpp
+++ b/projects/clr/rocclr/runtime/device/gpu/gpudevice.cpp
@@ -17,6 +17,7 @@
 #include "device/gpu/gpubinary.hpp"
 #include "device/gpu/gpusettings.hpp"
 #include "device/gpu/gpublit.hpp"
+#include "cz_id.h"
 
 #include "acl.h"
 
@@ -455,7 +456,14 @@ NullDevice::fillDeviceInfo(
 
     info_.platform_ = AMD_PLATFORM;
 
-    ::strcpy(info_.name_, hwInfo()->targetName_);
+    if ((calTarget() == CAL_TARGET_CARRIZO) &&
+        ASICREV_IS_CARRIZO_BRISTOL(calAttr.asicRevision)) {
+        const static char* bristol = "Bristol Ridge";
+        ::strcpy(info_.name_, bristol);
+    }
+    else {
+        ::strcpy(info_.name_, hwInfo()->targetName_);
+    }
     ::strcpy(info_.vendor_, "Advanced Micro Devices, Inc.");
     ::snprintf(info_.driverVersion_, sizeof(info_.driverVersion_) - 1,
          AMD_BUILD_STRING "%s", " (VM)");
diff --git a/projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp b/projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp
index f4617d10ea..40c6d1a4a7 100644
--- a/projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp
+++ b/projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp
@@ -120,6 +120,7 @@ CALGSLDevice::getAttribs_int(gsl::gsCtx* cs)
     m_attribs.isSVMFineGrainSystem = m_adp->pAsicInfo->svmFineGrainSystem;
     m_attribs.isWDDM2Enabled = m_adp->pAsicInfo->vaAvailable && m_adp->pAsicInfo->bNoVATranslation;
     m_attribs.maxRTCUs = cs->getMaxRTCUs();
+    m_attribs.asicRevision = cs->getChipRev();
 }
 
 bool
diff --git a/projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/backend.h b/projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/backend.h
index f94332bcf8..84c9cfe3ca 100644
--- a/projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/backend.h
+++ b/projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/backend.h
@@ -85,6 +85,7 @@ typedef struct CALdeviceattribsRec {
     bool       isSVMFineGrainSystem;                /**< check if SVM finegrainsystem */
     bool       isWDDM2Enabled;                      /**< check if WDDM2 is enabled */
     CALuint    maxRTCUs;                            /**< The maximum number of RT CUs for RT queues */
+    CALuint    asicRevision;                        /**< The ASIC revision ID */
 } CALdeviceattribs;
 
 
diff --git a/projects/clr/rocclr/runtime/device/pal/palcompiler.cpp b/projects/clr/rocclr/runtime/device/pal/palcompiler.cpp
index c7320ed45e..24b1b27750 100644
--- a/projects/clr/rocclr/runtime/device/pal/palcompiler.cpp
+++ b/projects/clr/rocclr/runtime/device/pal/palcompiler.cpp
@@ -34,7 +34,7 @@ HSAILProgram::compileImpl(
         arch += "64";
     }
     target = aclGetTargetInfo(arch.c_str(),
-        dev().info().name_, &errorCode);
+        dev().hwInfo()->targetName_, &errorCode);
 
     // end if asic info is ready
     // We dump the source code for each program (param: headers)