diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp
index d6eea8c122..19d5cc622d 100644
--- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp
+++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp
@@ -970,7 +970,7 @@ bool AqlQueue::ExceptionHandler(hsa_signal_value_t error_code, void* arg) {
       // EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION
       4, (hsa_status_t)HSA_STATUS_ERROR_ILLEGAL_INSTRUCTION,
       // EC_QUEUE_WAVE_MEMORY_VIOLATION
-      5, HSA_STATUS_ERROR,
+      5, (hsa_status_t)HSA_STATUS_ERROR_MEMORY_FAULT,
       // EC_QUEUE_WAVE_APERTURE_VIOLATION
       6, (hsa_status_t)HSA_STATUS_ERROR_MEMORY_APERTURE_VIOLATION,
       // EC_QUEUE_PACKET_DISPATCH_DIM_INVALID
diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/hsa.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/hsa.cpp
index f496f2ca9d..b2d1f6537c 100644
--- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/hsa.cpp
+++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/hsa.cpp
@@ -2758,6 +2758,10 @@ hsa_status_t hsa_status_string(
       *status_string =
           "HSA_EXT_STATUS_ERROR_DIRECTIVE_MISMATCH: Directive mismatch";
       break;
+    case HSA_STATUS_ERROR_MEMORY_FAULT:
+      *status_string =
+          "HSA_STATUS_ERROR_MEMORY_FAULT: Agent attempted to access an inaccessible address.";
+      break;
     default:
       return HSA_STATUS_ERROR_INVALID_ARGUMENT;
   }
diff --git a/projects/rocr-runtime/runtime/hsa-runtime/inc/hsa_ext_amd.h b/projects/rocr-runtime/runtime/hsa-runtime/inc/hsa_ext_amd.h
index df48de94ec..b1ba20f631 100644
--- a/projects/rocr-runtime/runtime/hsa-runtime/inc/hsa_ext_amd.h
+++ b/projects/rocr-runtime/runtime/hsa-runtime/inc/hsa_ext_amd.h
@@ -184,6 +184,13 @@ enum {
    * Agent executed an invalid shader instruction.
    */
   HSA_STATUS_ERROR_ILLEGAL_INSTRUCTION = 42,
+
+  /**
+   * Agent attempted to access an inaccessible address.
+   * See hsa_amd_register_system_event_handler and
+   * HSA_AMD_GPU_MEMORY_FAULT_EVENT for more information on illegal accesses.
+   */
+  HSA_STATUS_ERROR_MEMORY_FAULT = 43,
 };
 
 /**