diff --git a/source/docs/how-to/using-rocprofv3.rst b/source/docs/how-to/using-rocprofv3.rst index 692e39f157..4bee62cf04 100644 --- a/source/docs/how-to/using-rocprofv3.rst +++ b/source/docs/how-to/using-rocprofv3.rst @@ -85,7 +85,7 @@ The following table lists the commonly used ``rocprofv3`` command-line options c | ``--hsa-trace`` [BOOL] |br| |br| |br| |br| |br| |br| |br| |br| | ``--rccl-trace`` [BOOL] |br| |br| |br| |br| | ``--kokkos-trace`` [BOOL] |br| |br| |br| |br| - | ``--rocdecode-trace`` [BOOL] + | ``--rocdecode-trace`` [BOOL] - | Combination of ``--hip-runtime-trace`` and ``--hip-compiler-trace``. This option only enables the HIP API tracing. Unlike previous iterations of ``rocprof``, this option doesn't enable kernel tracing, memory copy tracing, and so on. |br| |br| | Collects marker (ROCTx) traces. Similar to ``--roctx-trace`` option in earlier ``rocprof`` versions, but with improved ``ROCTx`` library with more features. |br| |br| | Collects kernel dispatch traces. |br| |br| @@ -170,7 +170,7 @@ The following table lists the commonly used ``rocprofv3`` command-line options c * - Other - | ``--preload`` PRELOAD |br| |br| | ``--minimum-output-data`` |br| |br| - | ``--disable-signal-handlers`` + | ``--disable-signal-handlers`` - | Specifies libraries to prepend to ``LD_PRELOAD``. It is useful for sanitizer libraries. |br| |br| | Output files are generated only if output data size is greater than minimum output data size. It can be used for controlling the generation of output files so that user don't recieve empty files. The input is in KB units. |br| |br| | Disables the signal handlers in the rocprofv3 tool. It disables the prioritizing of rocprofv3 signal handler over application installed signal handler. When --disable-signal-handlers is set to true, and application has its signal handler on SIGSEGV or similar installed, then its signal handler will be used not the rocprofv3 signal handler. Note: glog still installs signal handlers which provide backtraces. @@ -894,17 +894,47 @@ While the basic counters and derived metrics are available for collection by def You can define the extra counters in a YAML file as shown: -.. code-block:: shell +.. code-block:: yaml - $ cat extra_counters.yaml + rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: GRBM_GUI_ACTIVE_SUM + description: "Unit: cycles" + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx906 + - gfx908 + - gfx90a + - gfx942 + expression: reduce(GRBM_GUI_ACTIVE,max)*CU_NUM + - name: CPC_CPC_STAT_BUSY + description: CPC Busy. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + block: CPC + event: 25 - GRBM_GUI_ACTIVE_SUM: - architectures: - gfx942/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9: - expression: reduce(GRBM_GUI_ACTIVE,max)*CU_NUM - description: 'Unit: cycles' +Please note, the above sample uses the ``CPC_CPC_STAT_BUSY`` counter definition for the ``gfx940`` +and ``gfx941`` architectures to demonstrate the YAML schema when counters have different +architecture-specific definitions. -To collect the extra counters defined in the `extra_counters.yaml` file , use: +If this YAML is placed in a ``extra_counters.yaml`` file, to collect the extra counters defined +in the ``extra_counters.yaml`` file, use the ``-E`` / ``--extra-counters`` option: .. code-block:: shell @@ -1021,7 +1051,7 @@ The generated Perfetto trace file can be opened in the `Perfetto UI .. image:: /data/perfetto_counters.png diff --git a/source/lib/rocprofiler-sdk/counters/metrics.cpp b/source/lib/rocprofiler-sdk/counters/metrics.cpp index fe30358657..073ae22fc6 100644 --- a/source/lib/rocprofiler-sdk/counters/metrics.cpp +++ b/source/lib/rocprofiler-sdk/counters/metrics.cpp @@ -107,6 +107,7 @@ loadYAML(const std::string& filename, std::optional add_metric) { // Stores metrics that are added via the API static MetricMap added_metrics; + YAML::Node append_yaml; MetricMap ret; auto override = getCustomCounterDefinition().wlock([&](auto& data) { @@ -121,62 +122,53 @@ loadYAML(const std::string& filename, std::optional add_metric) std::ifstream file(filename); counter_data << file.rdbuf(); } - - if(!override.data.empty()) + else { ROCP_INFO << "Adding Override Config Data: " << override.data; counter_data << override.data; } auto yaml = YAML::Load(counter_data.str()); + auto header = yaml["rocprofiler-sdk"]["counters"]; uint64_t current_id = 0; - - for(auto it = yaml.begin(); it != yaml.end(); ++it) + if(!override.data.empty() && override.append) { - auto counter_name = it->first.as(); - if(counter_name == "schema-version") continue; - auto counter_def = it->second; - auto def_iterator = counter_def["architectures"]; - - for(auto def_it = def_iterator.begin(); def_it != def_iterator.end(); ++def_it) + append_yaml = YAML::Load(override.data); + if(append_yaml["rocprofiler-sdk"] && append_yaml["rocprofiler-sdk"]["counters"]) { - auto archs = def_it->first.as(); - auto def = def_it->second; - // To save space in the YAML file, we combine architectures with the same - // definition into a single entry. Split these out into separate entries. - // architectures: - // gfx10/gfx1010/gfx1030/gfx1031/.....9: - // expression: 400*SQ_WAIT_INST_LDS/SQ_WAVES/GRBM_GUI_ACTIVE - std::vector result; - std::stringstream ss(archs); - std::string arch_name; - - while(std::getline(ss, arch_name, '/')) + for(const auto& counter : append_yaml["rocprofiler-sdk"]["counters"]) { - auto& metricVec = ret.emplace(arch_name, std::vector()).first->second; + header.push_back(counter); + } + } + } + + for(const auto& counter : header) + { + auto counter_name = counter["name"].as(); + auto description = counter["description"].as(); + for(const auto& definition : counter["definitions"]) + { + for(const auto& arch : definition["architectures"]) + { + auto& metricVec = + ret.emplace(arch.as(), std::vector()).first->second; if(metricVec.empty()) { const auto constants = get_constants(current_id); metricVec.insert(metricVec.end(), constants.begin(), constants.end()); current_id += constants.size(); } - - std::string description; - if(def["description"]) - description = def["description"].as(); - else if(counter_def["description"]) - description = counter_def["description"].as(); metricVec.emplace_back( - arch_name, + arch.as(), counter_name, - (def["block"] ? def["block"].as() : ""), - (def["event"] ? def["event"].as() : ""), + (definition["block"] ? definition["block"].as() : ""), + (definition["event"] ? definition["event"].as() : ""), description, - (def["expression"] ? def["expression"].as() : ""), + (definition["expression"] ? definition["expression"].as() : ""), "", current_id); current_id++; - ROCP_TRACE << fmt::format("Inserted info {}: {}", arch_name, metricVec.back()); } } } diff --git a/source/lib/rocprofiler-sdk/counters/tests/core.cpp b/source/lib/rocprofiler-sdk/counters/tests/core.cpp index fe2442ce66..d2f5037174 100644 --- a/source/lib/rocprofiler-sdk/counters/tests/core.cpp +++ b/source/lib/rocprofiler-sdk/counters/tests/core.cpp @@ -755,11 +755,33 @@ TEST(core, public_api_iterate_agents) TEST(core, check_load_counter_def_append) { const std::string test_yaml = R"( -TEST_YAML_LOAD: - architectures: - gfx950/gfx942/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9/gfx12/gfx1200/gfx1201: - expression: reduce(GRBM_GUI_ACTIVE,max)*CU_NUM - description: 'Unit: cycles' +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TEST_YAML_LOAD + description: cycles + properties: [] + definitions: + - architectures: + - gfx950 + - gfx942 + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx11 + - gfx1032 + - gfx1102 + - gfx906 + - gfx1100 + - gfx1101 + - gfx908 + - gfx90a + - gfx9 + - gfx12 + - gfx1200 + - gfx1201 + expression: reduce(GRBM_GUI_ACTIVE,max)*CU_NUM )"; ASSERT_EQ(hsa_init(), HSA_STATUS_SUCCESS); test_init(); @@ -782,17 +804,61 @@ TEST_YAML_LOAD: TEST(core, check_load_counter_def) { const std::string test_yaml = R"( -GRBM_GUI_ACTIVE: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx900/gfx90a/gfx9/gfx12/gfx1200/gfx1201: - block: GRBM - event: 2 - description: The GUI is Active -TEST_YAML_LOAD: - architectures: - gfx950/gfx942/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9/gfx12/gfx1200/gfx1201: - expression: reduce(GRBM_GUI_ACTIVE,max) - description: cycles +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: GRBM_GUI_ACTIVE + description: The GUI is Active + properties: [] + definitions: + - architectures: + - gfx950 + - gfx942 + - gfx941 + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx11 + - gfx1032 + - gfx1102 + - gfx906 + - gfx1100 + - gfx1101 + - gfx940 + - gfx908 + - gfx900 + - gfx90a + - gfx9 + - gfx12 + - gfx1200 + - gfx1201 + block: GRBM + event: 2 + - name: TEST_YAML_LOAD + description: cycles + properties: [] + definitions: + - architectures: + - gfx950 + - gfx942 + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx11 + - gfx1032 + - gfx1102 + - gfx906 + - gfx1100 + - gfx1101 + - gfx908 + - gfx90a + - gfx9 + - gfx12 + - gfx1200 + - gfx1201 + expression: reduce(GRBM_GUI_ACTIVE,max) )"; ASSERT_EQ(hsa_init(), HSA_STATUS_SUCCESS); test_init(); diff --git a/source/lib/rocprofiler-sdk/counters/yaml/counter_defs.yaml b/source/lib/rocprofiler-sdk/counters/yaml/counter_defs.yaml index 1a31ef1ae3..198e8599d4 100644 --- a/source/lib/rocprofiler-sdk/counters/yaml/counter_defs.yaml +++ b/source/lib/rocprofiler-sdk/counters/yaml/counter_defs.yaml @@ -1,5801 +1,10081 @@ -schema-version: 1 -ALUStalledByLDS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9: +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: ALUStalledByLDS + description: 'The percentage of GPUTime ALU units are stalled by the LDS input queue being full or the output queue being + not ready. If there are LDS bank conflicts, reduce them. Otherwise, try reducing the number of LDS accesses if possible. + Value range: 0% (optimal) to 100% (bad).' + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx906 + - gfx908 + - gfx90a expression: 400*reduce(SQ_WAIT_INST_LDS,sum)/reduce(SQ_WAVES,sum)/reduce(GRBM_GUI_ACTIVE,max) - description: 'The percentage of GPUTime ALU units are stalled by the LDS input queue being full or the - output queue being not ready. If there are LDS bank conflicts, reduce them. Otherwise, try reducing - the number of LDS accesses if possible. Value range: 0% (optimal) to 100% (bad).' -AggSysCycles: - architectures: - gfx90a: + - name: AggSysCycles + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(GRBM_GUI_ACTIVE,max)*CU_NUM - description: 'Unit: cycles' -AvgNumActiveThreads: - architectures: - gfx90a: + - name: AvgNumActiveThreads + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(SQ_THREAD_CYCLES_VALU,sum)/reduce(SQ_ACTIVE_INST_VALU,sum) - description: 'Unit: percent' -# CPC Block (Command Processor Compute) - The CPC block is responsible for the compute workloads -CPC_CPC_STAT_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_CPC_STAT_BUSY + description: CPC Busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 25 - description: CPC Busy. -CPC_CPC_STAT_IDLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_CPC_STAT_IDLE + description: CPC Idle. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 26 - description: CPC Idle. -CPC_CPC_STAT_STALL: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_CPC_STAT_STALL + description: CPC Stalled. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 27 - description: CPC Stalled. -CPC_CPC_TCIU_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_CPC_TCIU_BUSY + description: CPC TCIU interface Busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 28 - description: CPC TCIU interface Busy. -CPC_CPC_TCIU_IDLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_CPC_TCIU_IDLE + description: CPC TCIU interface Idle. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 29 - description: CPC TCIU interface Idle. -CPC_CPC_UTCL2IU_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_CPC_UTCL2IU_BUSY + description: CPC UTCL2 interface Busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 30 - description: CPC UTCL2 interface Busy. -CPC_CPC_UTCL2IU_IDLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_CPC_UTCL2IU_IDLE + description: CPC UTCL2 interface Idle. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 31 - description: CPC UTCL2 interface Idle. -CPC_CPC_UTCL2IU_STALL: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_CPC_UTCL2IU_STALL + description: CPC UTCL2 interface Stalled waiting on Free, Tags or Translation. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 32 - description: CPC UTCL2 interface Stalled waiting on Free, Tags or Translation. -CPC_ME1_BUSY_FOR_PACKET_DECODE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_ME1_BUSY_FOR_PACKET_DECODE + description: Me1 busy for packet decode. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 13 - description: Me1 busy for packet decode. -CPC_ME1_DC0_SPI_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_ME1_DC0_SPI_BUSY + description: CPC Me1 Processor Busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 33 - description: CPC Me1 Processor Busy. -CPC_UTCL1_STALL_ON_TRANSLATION: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPC_UTCL1_STALL_ON_TRANSLATION + description: One of the UTCL1s is stalled waiting on translation, XNACK or PENDING response. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPC event: 24 - description: One of the UTCL1s is stalled waiting on translation, XNACK or PENDING response. -CPC_ALWAYS_COUNT: - architectures: - gfx950: + - name: CPC_ALWAYS_COUNT + description: Always Count. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 0 - description: Always Count. -CPC_ADC_VALID_CHUNK_NOT_AVAIL: - architectures: - gfx950: + - name: CPC_ADC_VALID_CHUNK_NOT_AVAIL + description: ADC valid chunk not available when dispatch walking is in progress at multi-xcc mode. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 3 - description: ADC valid chunk not available when dispatch walking is in progress at multi-xcc mode. -CPC_ADC_DISPATCH_ALLOC_DONE: - architectures: - gfx950: + - name: CPC_ADC_DISPATCH_ALLOC_DONE + description: ADC dispatch allocation done. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 4 - description: ADC dispatch allocation done. -CPC_ADC_VALID_CHUNK_END: - architectures: - gfx950: + - name: CPC_ADC_VALID_CHUNK_END + description: ADC cralwer valid chunk end at multi-xcc mode. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 9 - description: ADC cralwer valid chunk end at multi-xcc mode. -CPC_SYNC_FIFO_FULL_LEVEL: - architectures: - gfx950: + - name: CPC_SYNC_FIFO_FULL_LEVEL + description: SYNC FIFO full last cycles. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 43 - description: SYNC FIFO full last cycles. -CPC_SYNC_FIFO_FULL: - architectures: - gfx950: + - name: CPC_SYNC_FIFO_FULL + description: SYNC FIFO full times. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 44 - description: SYNC FIFO full times. -CPC_GD_BUSY: - architectures: - gfx950: + - name: CPC_GD_BUSY + description: ADC busy. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 61 - description: ADC busy. -CPC_TG_SEND: - architectures: - gfx950: + - name: CPC_TG_SEND + description: ADC thread group send. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 62 - description: ADC thread group send. -CPC_WALK_NEXT_CHUNK: - architectures: - gfx950: + - name: CPC_WALK_NEXT_CHUNK + description: ADC walking next valid chunk at multi-xcc mode. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 63 - description: ADC walking next valid chunk at multi-xcc mode. -CPC_STALLED_BY_SE0_SPI: - architectures: - gfx950: + - name: CPC_STALLED_BY_SE0_SPI + description: ADC csdata stalled by SE0SPI. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 64 - description: ADC csdata stalled by SE0SPI. -CPC_STALLED_BY_SE1_SPI: - architectures: - gfx950: + - name: CPC_STALLED_BY_SE1_SPI + description: ADC csdata stalled by SE1SPI. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 65 - description: ADC csdata stalled by SE1SPI. -CPC_STALLED_BY_SE2_SPI: - architectures: - gfx950: + - name: CPC_STALLED_BY_SE2_SPI + description: ADC csdata stalled by SE2SPI. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 66 - description: ADC csdata stalled by SE2SPI. -CPC_STALLED_BY_SE3_SPI: - architectures: - gfx950: + - name: CPC_STALLED_BY_SE3_SPI + description: ADC csdata stalled by SE3SPI. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 67 - description: ADC csdata stalled by SE3SPI. -CPC_LTE_ALL: - architectures: - gfx950: + - name: CPC_LTE_ALL + description: CPC Sync counter LteAll, only Master XCD cares LteAll. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 68 - description: CPC Sync counter LteAll, only Master XCD cares LteAll. -CPC_SYNC_WRREQ_FIFO_BUSY: - architectures: - gfx950: + - name: CPC_SYNC_WRREQ_FIFO_BUSY + description: CPC Sync Counter Request Fifo is not empty. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 69 - description: CPC Sync Counter Request Fifo is not empty. -CPC_CANE_BUSY: - architectures: - gfx950: + - name: CPC_CANE_BUSY + description: CPC CANE bus busy, means there are inflight sync counter requests. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 70 - description: CPC CANE bus busy, means there are inflight sync counter requests. -CPC_CANE_STALL: - architectures: - gfx950: + - name: CPC_CANE_STALL + description: CPC Sync counter sending is stalled by CANE. + properties: [] + definitions: + - architectures: + - gfx950 block: CPC event: 71 - description: CPC Sync counter sending is stalled by CANE. -# Block CPF(Command Processor Fetch) - The CPF block is responsible for fetching the compute workloads -CPF_CMP_UTCL1_STALL_ON_TRANSLATION: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPF_CMP_UTCL1_STALL_ON_TRANSLATION + description: One of the Compute UTCL1s is stalled waiting on translation, XNACK or PENDING response. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPF event: 20 - description: One of the Compute UTCL1s is stalled waiting on translation, XNACK or PENDING response. -CPF_CPF_STAT_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPF_CPF_STAT_BUSY + description: CPF Busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPF event: 23 - description: CPF Busy. -CPF_CPF_STAT_IDLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPF_CPF_STAT_IDLE + description: CPF Idle. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPF event: 24 - description: CPF Idle. -CPF_CPF_STAT_STALL: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPF_CPF_STAT_STALL + description: CPF Stalled. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPF event: 25 - description: CPF Stalled. -CPF_CPF_TCIU_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPF_CPF_TCIU_BUSY + description: CPF TCIU interface Busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPF event: 26 - description: CPF TCIU interface Busy. -CPF_CPF_TCIU_IDLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPF_CPF_TCIU_IDLE + description: CPF TCIU interface Idle. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPF event: 27 - description: CPF TCIU interface Idle. -CPF_CPF_TCIU_STALL: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: CPF_CPF_TCIU_STALL + description: CPF TCIU interface Stalled waiting on Free, Tags. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: CPF event: 28 - description: CPF TCIU interface Stalled waiting on Free, Tags. -CP_UTIL: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: CP_UTIL + description: Percentage of the GRBM_GUI_ACTIVE time that any of the Command Processor (CPG/CPC/CPF) blocks are busy + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 expression: 100*reduce(GRBM_CP_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: Percentage of the GRBM_GUI_ACTIVE time that any of the Command Processor (CPG/CPC/CPF) - blocks are busy -CU_NUM: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx900/gfx90a/gfx9/gfx12/gfx1200/gfx1201: + - name: CU_NUM + description: CU_NUM + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: simd_count/simd_per_cu - description: CU_NUM -SIMD_NUM: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx900/gfx90a/gfx9: + - name: SIMD_NUM + description: SIMD Number + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: simd_count - description: SIMD Number -CpUtil: - architectures: - gfx90a: + - name: CpUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(GRBM_CP_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: 'Unit: percent' -EA_UTIL: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: EA_UTIL + description: Percentage of the GRBM_GUI_ACTIVE time that the Efficiency Arbiter (EA) block is busy. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 expression: 100*reduce(GRBM_EA_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: Percentage of the GRBM_GUI_ACTIVE time that the Efficiency Arbiter (EA) block is busy. -EaAtomicLatency: - architectures: - gfx90a: + - name: EaAtomicLatency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a expression: TCC_EA_ATOMIC_LEVEL_sum/TCC_EA_ATOMIC_sum - description: 'Unit: cycles' -EaRdDramStallRate: - architectures: - gfx90a: + - name: EaRdDramStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum/TCC_BUSY_sum - description: 'Unit: percent' -EaRdGmiStallRate: - architectures: - gfx90a: + - name: EaRdGmiStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCC_EA_RDREQ_GMI_CREDIT_STALL_sum/TCC_BUSY_sum - description: 'Unit: percent' -EaRdIoStallRate: - architectures: - gfx90a: + - name: EaRdIoStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCC_EA_RDREQ_IO_CREDIT_STALL_sum/TCC_BUSY_sum - description: 'Unit: percent' -EaRdLatency: - architectures: - gfx90a: + - name: EaRdLatency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a expression: TCC_EA_RDREQ_LEVEL_sum/TCC_EA_RDREQ_sum - description: 'Unit: cycles' -EaUtil: - architectures: - gfx90a: + - name: EaUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(GRBM_EA_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: 'Unit: percent' -EaWrDramStallRate: - architectures: - gfx90a: + - name: EaWrDramStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum/TCC_BUSY_sum - description: 'Unit: percent' -EaWrGmiStallRate: - architectures: - gfx90a: + - name: EaWrGmiStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCC_EA_WRREQ_GMI_CREDIT_STALL_sum/TCC_BUSY_sum - description: 'Unit: percent' -EaWrIoStallRate: - architectures: - gfx90a: + - name: EaWrIoStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCC_EA_WRREQ_IO_CREDIT_STALL_sum/TCC_BUSY_sum - description: 'Unit: percent' -EaWrLatency: - architectures: - gfx90a: + - name: EaWrLatency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a expression: TCC_EA_WRREQ_LEVEL_sum/TCC_EA_WRREQ_sum - description: 'Unit: cycles' -EaWrStarveRate: - architectures: - gfx90a: + - name: EaWrStarveRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCC_TOO_MANY_EA_WRREQS_STALL_sum/TCC_BUSY_sum - description: 'Unit: percent' -FETCH_SIZE: - architectures: - gfx906: + - name: FETCH_SIZE + description: The total kilobytes fetched from the video memory. This is measured with all extra fetches and any cache + or memory effects taken into account. + properties: [] + definitions: + - architectures: + - gfx906 expression: (TCC_EA_RDREQ_32B_sum*32+(TCC_EA_RDREQ_sum-TCC_EA_RDREQ_32B_sum)*64+RDATA1_SIZE)/1024 - gfx908/gfx90a/gfx9/gfx900: + - architectures: + - gfx9 + - gfx900 + - gfx908 + - gfx90a expression: (TCC_EA_RDREQ_32B_sum*32+(TCC_EA_RDREQ_sum-TCC_EA_RDREQ_32B_sum)*64)/1024 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: (TCC_BUBBLE_sum*128 + (TCC_EA0_RDREQ_sum-TCC_BUBBLE_sum-TCC_EA0_RDREQ_32B_sum)*64 + TCC_EA0_RDREQ_32B_sum*32)/1024 - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: (GL2C_EA_RDREQ_32B_sum*32+GL2C_EA_RDREQ_64B_sum*64+GL2C_EA_RDREQ_96B_sum*96+GL2C_EA_RDREQ_128B_sum*128)/1024 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 expression: (GL2C_EA_RDREQ_32B_sum*32+GL2C_EA_RDREQ_64B_sum*64+GL2C_EA_RDREQ_128B_sum*128)/1024 - description: The total kilobytes fetched from the video memory. This is measured with all extra fetches - and any cache or memory effects taken into account. -BANDWIDTH_EA: - architectures: - gfx90a: + - name: BANDWIDTH_EA + description: Memory Bandwidth measured at the TCC_EA interface. In units of bytes/cycle. + properties: [] + definitions: + - architectures: + - gfx90a expression: 1024*(WRITE_SIZE+FETCH_SIZE)/reduce(GRBM_GUI_ACTIVE,max) - gfx950/gfx940/gfx941/gfx942: - expression: - (WRITE_SIZE*1024+TCC_BUBBLE_sum*128+(TCC_BUBBLE_sum-TCC_EA0_RDREQ_sum)*64)/reduce(GRBM_GUI_ACTIVE,max) - description: Memory Bandwidth measured at the TCC_EA interface. In units of bytes/cycle. -FetchSize: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 + expression: (WRITE_SIZE*1024+TCC_BUBBLE_sum*128+(TCC_BUBBLE_sum-TCC_EA0_RDREQ_sum)*64)/reduce(GRBM_GUI_ACTIVE,max) + - name: FetchSize + description: The total kilobytes fetched from the video memory. This is measured with all extra fetches and any cache + or memory effects taken into account. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: FETCH_SIZE - description: The total kilobytes fetched from the video memory. This is measured with all extra fetches - and any cache or memory effects taken into account. -FlatLDSInsts: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: FlatLDSInsts + description: The average number of FLAT instructions that read or write to LDS executed per work item (affected by flow + control). + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: reduce(SQ_INSTS_FLAT_LDS_ONLY,sum)/reduce(SQ_WAVES,sum) - description: The average number of FLAT instructions that read or write to LDS executed per work item - (affected by flow control). -FlatVMemInsts: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: FlatVMemInsts + description: The average number of FLAT instructions that read from or write to the video memory executed per work item + (affected by flow control). Includes FLAT instructions that read from or write to scratch. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: (reduce(SQ_INSTS_FLAT,sum)-reduce(SQ_INSTS_FLAT_LDS_ONLY,sum))/reduce(SQ_WAVES,sum) - description: The average number of FLAT instructions that read from or write to the video memory executed - per work item (affected by flow control). Includes FLAT instructions that read from or write to scratch. -GDSInsts: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9: + - name: GDSInsts + description: The average number of GDS read or GDS write instructions executed per work item (affected by flow control). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx906 + - gfx908 + - gfx90a expression: reduce(SQ_INSTS_GDS,sum)/reduce(SQ_WAVES,sum) - description: The average number of GDS read or GDS write instructions executed per work item (affected - by flow control). -GDS_UTIL: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: GDS_UTIL + description: Percentage of the GRBM_GUI_ACTIVE time that the Global Data Share (GDS) is busy. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 expression: 100*reduce(GRBM_GDS_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: Percentage of the GRBM_GUI_ACTIVE time that the Global Data Share (GDS) is busy. -# Block GL2C (Graphic L2 Cache) - The GL2C block is a cache that sits between the L1 cache and the memory -GL2C_EA_RDREQ: - architectures: - gfx12/gfx1200/gfx1201: + - name: GL2C_EA_RDREQ + description: Number of GL2C/EA read requests (either 32-byte or 64-byte or 128-byte) for all clients. + properties: [] + definitions: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: GL2C event: 140 - description: Number of GL2C/EA read requests (either 32-byte or 64-byte or 128-byte) for all clients. -GL2C_EA_RDREQ_sum: - architectures: - gfx12/gfx1200/gfx1201: + - name: GL2C_EA_RDREQ_sum + description: Number of GL2C/EA read requests (either 32-byte or 64-byte or 128-byte). Sum over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(GL2C_EA_RDREQ,sum) - description: Number of GL2C/EA read requests (either 32-byte or 64-byte or 128-byte). Sum over GL2C - instances. -GL2C_EA_RDREQ_128B: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_EA_RDREQ_128B + description: Number of 128-byte GL2C/EA read requests + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 102 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: GL2C event: 148 - description: Number of 128-byte GL2C/EA read requests -GL2C_EA_RDREQ_128B_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: GL2C_EA_RDREQ_128B_sum + description: Number of 128-byte GL2C/EA read requests. Sum over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(GL2C_EA_RDREQ_128B,sum) - description: Number of 128-byte GL2C/EA read requests. Sum over GL2C instances. -GL2C_EA_RDREQ_32B: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_EA_RDREQ_32B + description: Number of 32-byte GL2C/EA read requests + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 99 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: GL2C event: 146 - description: Number of 32-byte GL2C/EA read requests -GL2C_EA_RDREQ_32B_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: GL2C_EA_RDREQ_32B_sum + description: Number of 32-byte GL2C/EA read requests. Sum over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(GL2C_EA_RDREQ_32B,sum) - description: Number of 32-byte GL2C/EA read requests. Sum over GL2C instances. -GL2C_EA_RDREQ_64B: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_EA_RDREQ_64B + description: Number of 64-byte GL2C/EA read requests + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 100 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: GL2C event: 147 - description: Number of 64-byte GL2C/EA read requests -GL2C_EA_RDREQ_64B_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: GL2C_EA_RDREQ_64B_sum + description: Number of 64-byte GL2C/EA read requests. Sum over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(GL2C_EA_RDREQ_64B,sum) - description: Number of 64-byte GL2C/EA read requests. Sum over GL2C instances. -GL2C_EA_RDREQ_96B: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_EA_RDREQ_96B + description: Number of 96-byte GL2C/EA read requests + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 101 - description: Number of 96-byte GL2C/EA read requests -GL2C_EA_RDREQ_96B_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_EA_RDREQ_96B_sum + description: Number of 96-byte GL2C/EA read requests. Sum over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: reduce(GL2C_EA_RDREQ_96B,sum) - description: Number of 96-byte GL2C/EA read requests. Sum over GL2C instances. -GL2C_EA_WRREQ: - architectures: - gfx12/gfx1200/gfx1201: + - name: GL2C_EA_WRREQ + description: Number of transactions (all sizes) going over the GL2C_EA_WRREQ interface for all clients. This does not + include probe commands. + properties: [] + definitions: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: GL2C event: 108 - description: Number of transactions (all sizes) going over the GL2C_EA_WRREQ interface for all clients. This does not include probe commands. -GL2C_EA_WRREQ_sum: - architectures: - gfx12/gfx1200/gfx1201: + - name: GL2C_EA_WRREQ_sum + description: Number of transactions (either 32-byte or 64-byte) going over the GL2C_EA_WRREQ interface. Sum over GL2C + instances. + properties: [] + definitions: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(GL2C_EA_WRREQ,sum) - description: Number of transactions (either 32-byte or 64-byte) going over the GL2C_EA_WRREQ interface. - Sum over GL2C instances. -GL2C_EA_WRREQ_STALL: - architectures: - gfx12/gfx1200/gfx1201: + - name: GL2C_EA_WRREQ_STALL + description: Number of cycles a write request was stalled. + properties: [] + definitions: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: GL2C event: 122 - description: Number of cycles a write request was stalled. -GL2C_EA_WRREQ_STALL_max: - architectures: - gfx12/gfx1200/gfx1201: + - name: GL2C_EA_WRREQ_STALL_max + description: Number of cycles a write request was stalled. Max over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(GL2C_EA_WRREQ_STALL,max) - description: Number of cycles a write request was stalled. Max over GL2C instances. -GL2C_EA_WRREQ_64B: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_EA_WRREQ_64B + description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 85 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: GL2C event: 114 - description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. -GL2C_EA_WRREQ_64B_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: GL2C_EA_WRREQ_64B_sum + description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the GL2C_EA_wrreq interface. Sum over + GL2C instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(GL2C_EA_WRREQ_64B,sum) - description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the GL2C_EA_wrreq - interface. Sum over GL2C instances. -GL2C_HIT: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_HIT + description: Number of cache hits + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 42 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: GL2C event: 41 - description: Number of cache hits -GL2C_HIT_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: GL2C_HIT_sum + description: Number of cache hits. Sum over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(GL2C_HIT,sum) - description: Number of cache hits. Sum over GL2C instances. -GL2C_MC_RDREQ: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_MC_RDREQ + description: Number of GL2C/EA read requests (either 32-byte or 64-byte or 128-byte). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 96 - description: Number of GL2C/EA read requests (either 32-byte or 64-byte or 128-byte). -GL2C_MC_RDREQ_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_MC_RDREQ_sum + description: Number of GL2C/EA read requests (either 32-byte or 64-byte or 128-byte). Sum over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: reduce(GL2C_MC_RDREQ,sum) - description: Number of GL2C/EA read requests (either 32-byte or 64-byte or 128-byte). Sum over GL2C - instances. -GL2C_MC_WRREQ: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_MC_WRREQ + description: Number of transactions (either 32-byte or 64-byte) going over the GL2C_EA_wrreq interface. Atomics may travel + over the same interface and are generally classified as write requests. This does not include probe commands + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 83 - description: Number of transactions (either 32-byte or 64-byte) going over the GL2C_EA_wrreq interface. - Atomics may travel over the same interface and are generally classified as write requests. This does - not include probe commands -GL2C_MC_WRREQ_STALL: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_MC_WRREQ_STALL + description: Number of cycles a write request was stalled. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 88 - description: Number of cycles a write request was stalled. -GL2C_MC_WRREQ_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_MC_WRREQ_sum + description: Number of transactions (either 32-byte or 64-byte) going over the GL2C_MC_wrreq interface. Sum over GL2C + instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: reduce(GL2C_MC_WRREQ,sum) - description: Number of transactions (either 32-byte or 64-byte) going over the GL2C_MC_wrreq interface. - Sum over GL2C instances. -GL2C_MISS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_MISS + description: Number of cache misses. UC reads count as misses. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: GL2C event: 43 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: GL2C event: 42 - description: Number of cache misses. UC reads count as misses. -GL2C_MISS_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: GL2C_MISS_sum + description: Number of cache misses. Sum over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(GL2C_MISS,sum) - description: Number of cache misses. Sum over GL2C instances. -GL2C_WRREQ_STALL_max: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - name: GL2C_WRREQ_STALL_max + description: Number of cycles a write request was stalled. Max over GL2C instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: reduce(GL2C_MC_WRREQ_STALL,max) - description: Number of cycles a write request was stalled. Max over GL2C instances. -GPUBusy: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9/gfx900: + - name: GPUBusy + description: The percentage of time GPU was busy. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: 100*reduce(GRBM_GUI_ACTIVE,max)/reduce(GRBM_COUNT,max) - description: The percentage of time GPU was busy. -GPU_UTIL: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx90a/gfx9/gfx900/gfx12/gfx1200/gfx1201: + - name: GPU_UTIL + description: Percentage of the time that GUI is active + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: 100*reduce(GRBM_GUI_ACTIVE,max)/reduce(GRBM_COUNT,max) - description: Percentage of the time that GUI is active -# Block GRBM (Graphics Register Bus Manager Block) -GRBM_COUNT: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx900/gfx90a/gfx9/gfx12/gfx1200/gfx1201: + - name: GRBM_COUNT + description: Tie High - Count Number of Clocks + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 0 - description: Tie High - Count Number of Clocks -GRBM_CPC_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: GRBM_CPC_BUSY + description: The Command Processor Compute (CPC) is busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 30 - description: The Command Processor Compute (CPC) is busy. -GRBM_CPF_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: GRBM_CPF_BUSY + description: The Command Processor Fetchers (CPF) is busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 31 - description: The Command Processor Fetchers (CPF) is busy. -GRBM_CP_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx1032/gfx940/gfx90a: + - name: GRBM_CP_BUSY + description: Any of the Command Processor (CPG/CPC/CPF) blocks are busy. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 3 - description: Any of the Command Processor (CPG/CPC/CPF) blocks are busy. -GRBM_EA_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx1032/gfx940/gfx90a: + - name: GRBM_EA_BUSY + description: The Efficiency Arbiter (EA) block is busy. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 35 - description: The Efficiency Arbiter (EA) block is busy. -GRBM_GDS_BUSY: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: GRBM_GDS_BUSY + description: The Global Data Share (GDS) is busy. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: GRBM event: 25 - description: The Global Data Share (GDS) is busy. -GRBM_GL2CC_BUSY: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: GRBM_GL2CC_BUSY + description: The GL2CC block is busy. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: GRBM event: 40 - description: The GL2CC block is busy. -GRBM_GUI_ACTIVE: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx900/gfx90a/gfx9/gfx12/gfx1200/gfx1201: + - name: GRBM_GUI_ACTIVE + description: The GUI is Active + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 2 - description: The GUI is Active -GRBM_SPI_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx1032/gfx940/gfx90a: + - name: GRBM_SPI_BUSY + description: Any of the Shader Pipe Interpolators (SPI) are busy in the shader engine(s). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 11 - description: Any of the Shader Pipe Interpolators (SPI) are busy in the shader engine(s). -GRBM_TA_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx1032/gfx940/gfx90a: + - name: GRBM_TA_BUSY + description: Any of the Texture Pipes (TA) are busy in the shader engine(s). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 13 - description: Any of the Texture Pipes (TA) are busy in the shader engine(s). -GRBM_TC_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: GRBM_TC_BUSY + description: Any of the Texture Cache Blocks (TCP/TCI/TCA/TCC) are busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 28 - description: Any of the Texture Cache Blocks (TCP/TCI/TCA/TCC) are busy. -GRBM_UTCL2_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: GRBM_UTCL2_BUSY + description: The Unified Translation Cache Level-2 (UTCL2) block is busy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: GRBM event: 34 - description: The Unified Translation Cache Level-2 (UTCL2) block is busy. -GpuUtil: - architectures: - gfx90a: + - name: GpuUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(GRBM_GUI_ACTIVE,max)/reduce(GRBM_COUNT,max) - description: 'Unit: percent' -InstrFetchLatency: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: InstrFetchLatency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(accumulate(SQ_IFETCH_LEVEL, HIGH_RES),sum)/reduce(SQ_IFETCH,sum) - description: 'Unit: cycles' -L1iCacheHitRate: - architectures: - gfx90a: + - name: L1iCacheHitRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(SQC_ICACHE_HITS,sum)/reduce(SQC_ICACHE_REQ,sum) - description: 'Unit: percent' -L2CacheHit: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: L2CacheHit + description: 'The percentage of fetch, write, atomic, and other instructions that hit the data in L2 cache. Value range: + 0% (no hit) to 100% (optimal).' + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: 100*reduce(TCC_HIT,sum)/(reduce(TCC_HIT,sum)+reduce(TCC_MISS,sum)) - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: 100*reduce(GL2C_HIT,sum)/(reduce(GL2C_HIT,sum)+reduce(GL2C_MISS,sum)) - description: 'The percentage of fetch, write, atomic, and other instructions that hit the data in L2 - cache. Value range: 0% (no hit) to 100% (optimal).' -L2CacheTagRamStallRate: - architectures: - gfx90a: + - name: L2CacheTagRamStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCC_TAG_STALL_sum/TCC_BUSY_sum - description: 'Unit: percent' -LDSBankConflict: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: LDSBankConflict + description: 'The percentage of GPUTime LDS is stalled by bank conflicts. Value range: 0% (optimal) to 100% (bad).' + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: 100*reduce(SQC_LDS_BANK_CONFLICT,sum)/reduce(SQC_LDS_IDX_ACTIVE,sum) - gfx906/gfx908/gfx90a/gfx9/gfx900: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: 100*reduce(SQ_LDS_BANK_CONFLICT,sum)/reduce(GRBM_GUI_ACTIVE,max)/CU_NUM - description: 'The percentage of GPUTime LDS is stalled by bank conflicts. Value range: 0% (optimal) - to 100% (bad).' -LDSInsts: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: LDSInsts + description: The average number of LDS read or LDS write instructions executed per work item (affected by flow control). Excludes + FLAT instructions that read from or write to LDS. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: (reduce(SQ_INSTS_LDS,sum)-reduce(SQ_INSTS_FLAT_LDS_ONLY,sum))/reduce(SQ_WAVES,sum) - description: The average number of LDS read or LDS write instructions executed per work item (affected - by flow control). Excludes FLAT instructions that read from or write to LDS. -LdsBankConflict: - architectures: - gfx90a: + - name: LdsBankConflict + description: 'Unit: conflicts/access' + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(SQ_LDS_BANK_CONFLICT,sum)/(reduce(SQ_LDS_IDX_ACTIVE,sum)-reduce(SQ_LDS_BANK_CONFLICT,sum)) - description: 'Unit: conflicts/access' -LdsLatency: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a/gfx10/gfx1010/gfx1030/gfx1031/gfx1032/gfx11/gfx1100/gfx1101/gfx1102: + - name: LdsLatency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(accumulate(SQ_INST_LEVEL_LDS, HIGH_RES),sum)/reduce(SQ_INSTS_LDS,sum) - description: 'Unit: cycles' -LdsPipeIssueUtil: - architectures: - gfx90a: + - name: LdsPipeIssueUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 400*reduce(SQ_ACTIVE_INST_LDS,sum)/(reduce(GRBM_GUI_ACTIVE,max)*CU_NUM*2) - description: 'Unit: percent' -LdsUtil: - architectures: - gfx90a: + - name: LdsUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(SQ_LDS_IDX_ACTIVE,sum)/(reduce(GRBM_GUI_ACTIVE,max)*CU_NUM) - description: 'Unit: percent' -MAX_WAVE_SIZE: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx900/gfx90a/gfx9: + - name: MAX_WAVE_SIZE + description: Max wave size constant + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: wave_front_size - description: Max wave size constant -MeanOccupancyPerActiveCU: - architectures: - gfx11/gfx1100/gfx1101/gfx1102: + - name: MeanOccupancyPerActiveCU + description: Mean occupancy per active compute unit. + properties: [] + definitions: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: reduce(SQ_WAVE_CYCLES,sum)/reduce(SQ_BUSY_CYCLES,sum) - gfx950/gfx942/gfx941/gfx940/gfx90a: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(accumulate(SQ_LEVEL_WAVES, LOW_RES),sum)/reduce(SQ_BUSY_CU_CYCLES,sum) - description: Mean occupancy per active compute unit. -MeanOccupancyPerCU: - architectures: - gfx11/gfx1100/gfx1101/gfx1102: + - name: MeanOccupancyPerCU + description: Mean occupancy per compute unit. + properties: [] + definitions: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: reduce(SQ_WAVE_CYCLES,sum)/reduce(GRBM_GUI_ACTIVE,max)/CU_NUM - gfx950/gfx10/gfx1010/gfx1030/gfx1031/gfx1032/gfx90a/gfx942/gfx941/gfx940: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(accumulate(SQ_LEVEL_WAVES, HIGH_RES),sum)/reduce(GRBM_GUI_ACTIVE,max)/CU_NUM - description: Mean occupancy per compute unit. -OccupancyPercent: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032/gfx11/gfx1100/gfx1101/gfx1102: + - name: OccupancyPercent + description: GPU Occupancy as % of maximum. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: 100*reduce(SQ_WAVE_CYCLES,sum)/reduce(GRBM_GUI_ACTIVE,max)/CU_NUM/32 - gfx950/gfx90a/gfx942/gfx941/gfx940: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: 400*reduce(SQ_WAVE_CYCLES,sum)/reduce(GRBM_GUI_ACTIVE,max)/CU_NUM/32 - description: GPU Occupancy as % of maximum. -MemUnitBusy: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9: + - name: MemUnitBusy + description: 'The percentage of GPUTime the memory unit is active. The result includes the stall time (MemUnitStalled). + This is measured with all extra fetches and writes and any cache or memory effects taken into account. Value range: + 0% to 100% (fetch-bound).' + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx906 + - gfx908 + - gfx90a expression: 100*reduce(TA_TA_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: 'The percentage of GPUTime the memory unit is active. The result includes the stall time - (MemUnitStalled). This is measured with all extra fetches and writes and any cache or memory effects - taken into account. Value range: 0% to 100% (fetch-bound).' -MemUnitStalled: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: MemUnitStalled + description: 'The percentage of GPUTime the memory unit is stalled. Try reducing the number or size of fetches and writes + if possible. Value range: 0% (optimal) to 100% (bad).' + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: 100*TCP_TCP_TA_DATA_STALL_CYCLES_max/reduce(GRBM_GUI_ACTIVE,max)/SE_NUM - description: 'The percentage of GPUTime the memory unit is stalled. Try reducing the number or size - of fetches and writes if possible. Value range: 0% (optimal) to 100% (bad).' -MemWrites32B: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: MemWrites32B + description: The total number of effective 32B write transactions to the memory + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: WRITE_REQ_32B - description: The total number of effective 32B write transactions to the memory -MfmaFlops: - architectures: - gfx950/gfx90a/gfx942/gfx941/gfx940: - expression: - (SQ_INSTS_VALU_MFMA_MOPS_F16+SQ_INSTS_VALU_MFMA_MOPS_BF16+SQ_INSTS_VALU_MFMA_MOPS_F32+SQ_INSTS_VALU_MFMA_MOPS_F64)*512 - description: 'Unit: FLOP' -MfmaFlopsBF16: - architectures: - gfx950/gfx90a/gfx942/gfx941/gfx940: + - name: MfmaFlops + description: 'Unit: FLOP' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 + expression: (SQ_INSTS_VALU_MFMA_MOPS_F16+SQ_INSTS_VALU_MFMA_MOPS_BF16+SQ_INSTS_VALU_MFMA_MOPS_F32+SQ_INSTS_VALU_MFMA_MOPS_F64)*512 + - name: MfmaFlopsBF16 + description: 'Unit: FLOP' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: SQ_INSTS_VALU_MFMA_MOPS_BF16*512 - description: 'Unit: FLOP' -MfmaFlopsF16: - architectures: - gfx950/gfx90a/gfx942/gfx941/gfx940: + - name: MfmaFlopsF16 + description: 'Unit: FLOP' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: SQ_INSTS_VALU_MFMA_MOPS_F16*512 - description: 'Unit: FLOP' -MfmaFlopsF32: - architectures: - gfx950/gfx90a/gfx942/gfx941/gfx940: + - name: MfmaFlopsF32 + description: 'Unit: FLOP' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: SQ_INSTS_VALU_MFMA_MOPS_F32*512 - description: 'Unit: FLOP' -MfmaFlopsF64: - architectures: - gfx950/gfx90a/gfx942/gfx941/gfx940: + - name: MfmaFlopsF64 + description: 'Unit: IOP' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: SQ_INSTS_VALU_MFMA_MOPS_F64*512 - description: 'Unit: IOP' -MfmaUtil: - architectures: - gfx950/gfx90a/gfx942/gfx941/gfx940: + - name: MfmaUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(SQ_VALU_MFMA_BUSY_CYCLES,sum)/(reduce(GRBM_GUI_ACTIVE,max)*SIMD_NUM)*100 - description: 'Unit: percent' -RDATA1_SIZE: - architectures: - gfx906: + - name: RDATA1_SIZE + description: The total kilobytes fetched from the video memory. This is measured on EA1s. + properties: [] + definitions: + - architectures: + - gfx906 expression: (TCC_EA1_RDREQ_32B_sum*32+(TCC_EA1_RDREQ_sum-TCC_EA1_RDREQ_32B_sum)*64) - description: The total kilobytes fetched from the video memory. This is measured on EA1s. -SALUBusy: - architectures: - gfx950/gfx906/gfx908/gfx90a/gfx9/gfx900/gfx942/gfx941/gfx940: + - name: SALUBusy + description: 'The percentage of GPUTime scalar ALU instructions are processed. Value range: 0% (bad) to 100% (optimal).' + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: 100*reduce(SQ_INST_CYCLES_SALU,sum)/CU_NUM/reduce(GRBM_GUI_ACTIVE,max) - description: 'The percentage of GPUTime scalar ALU instructions are processed. Value range: 0% (bad) - to 100% (optimal).' -SALUInsts: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9: + - name: SALUInsts + description: The average number of scalar ALU instructions executed per work-item (affected by flow control). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx906 + - gfx908 + - gfx90a expression: reduce(SQ_INSTS_SALU,sum)/reduce(SQ_WAVES,sum) - description: The average number of scalar ALU instructions executed per work-item (affected by flow - control). -SE_NUM: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx900/gfx90a/gfx9: + - name: SE_NUM + description: SE_NUM + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: array_count/simd_arrays_per_engine - description: SE_NUM -SFetchInsts: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9: + - name: SFetchInsts + description: The average number of scalar fetch instructions from the video memory executed per work-item (affected by + flow control). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx906 + - gfx908 + - gfx90a expression: reduce(SQ_INSTS_SMEM,sum)/reduce(SQ_WAVES,sum) - description: The average number of scalar fetch instructions from the video memory executed per work-item - (affected by flow control). -# SPI Block(Shader Pipe Interpolator- The Shader Processor Input/Interpolator (SPI), is in charge of managing all resources (wave-slots, GPRs, LDS, barrier), in the shader array, as well as launching and tracking waves on SIMDs) -SPI_CSN_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_CSN_BUSY + description: Number of clocks with outstanding waves (SPI or SH). Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, + DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source + is CS0; + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 48 - description: Number of clocks with outstanding waves (SPI or SH). Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL - to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL - = 3, source is CS3; default, source is CS0; -SPI_CSN_NUM_THREADGROUPS: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_CSN_NUM_THREADGROUPS + description: Number of threadgroups launched. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL + = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0; + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 49 - description: Number of threadgroups launched. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, - DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is - CS3; default, source is CS0; -SPI_CSN_WAVE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_CSN_WAVE + description: Number of waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; + DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0; + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 52 - description: Number of waves. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL - = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, - source is CS0; -SPI_CSN_WINDOW_VALID: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_CSN_WINDOW_VALID + description: Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, + DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source + is CS0; + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 47 - description: Clock count enabled by perfcounter_start event. Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL - to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL - = 3, source is CS3; default, source is CS0; -SPI_RA_BAR_CU_FULL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_BAR_CU_FULL_CSN + description: Sum of CU where BARRIER can't take csn wave when !fits. Source is RA0 + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 123 - description: Sum of CU where BARRIER can't take csn wave when !fits. Source is RA0 -SPI_RA_BULKY_CU_FULL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_BULKY_CU_FULL_CSN + description: Sum of CU where BULKY can't take csn wave when !fits. Source is RA0 + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 125 - description: Sum of CU where BULKY can't take csn wave when !fits. Source is RA0 -SPI_RA_LDS_CU_FULL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_LDS_CU_FULL_CSN + description: Sum of CU where LDS can't take csn wave when !fits. Source is RA0 + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 120 - description: Sum of CU where LDS can't take csn wave when !fits. Source is RA0 -SPI_RA_REQ_NO_ALLOC: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_REQ_NO_ALLOC + description: Arb cycles with requests but no allocation. Source is RA0 + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 79 - description: Arb cycles with requests but no allocation. Source is RA0 -SPI_RA_REQ_NO_ALLOC_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_REQ_NO_ALLOC_CSN + description: Arb cycles with CSn req and no CSn alloc. Source is RA0 + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 85 - description: Arb cycles with CSn req and no CSn alloc. Source is RA0 -SPI_RA_RES_STALL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_RES_STALL_CSN + description: Arb cycles with CSn req and no CSn fits. Source is RA0 + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 91 - description: Arb cycles with CSn req and no CSn fits. Source is RA0 -SPI_RA_SGPR_SIMD_FULL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_SGPR_SIMD_FULL_CSN + description: Sum of SIMD where SGPR can't take csn wave when !fits. Source is RA0 + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 115 - description: Sum of SIMD where SGPR can't take csn wave when !fits. Source is RA0 -SPI_RA_TGLIM_CU_FULL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_TGLIM_CU_FULL_CSN + description: Cycles where csn wants to req but all CU are at tg_limit + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 127 - description: Cycles where csn wants to req but all CU are at tg_limit -SPI_RA_TMP_STALL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_TMP_STALL_CSN + description: Cycles where csn wants to req but does not fit in temp space. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 97 - description: Cycles where csn wants to req but does not fit in temp space. -SPI_RA_VGPR_SIMD_FULL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_VGPR_SIMD_FULL_CSN + description: Sum of SIMD where VGPR can't take csn wave when !fits. Source is RA0 + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 109 - description: Sum of SIMD where VGPR can't take csn wave when !fits. Source is RA0 -SPI_RA_WAVE_SIMD_FULL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_WAVE_SIMD_FULL_CSN + description: Sum of SIMD where WAVE can't take csn wave when !fits. Source is RA0 + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 103 - description: Sum of SIMD where WAVE can't take csn wave when !fits. Source is RA0 -SPI_RA_WVLIM_STALL_CSN: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_RA_WVLIM_STALL_CSN + description: Number of clocks csn is stalled due to WAVE LIMIT. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 133 - description: Number of clocks csn is stalled due to WAVE LIMIT. -SPI_SWC_CSC_WR: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_SWC_CSC_WR + description: Number of clocks to write CSC waves to SGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL + to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is + CS3; default, source is CS0; + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 189 - description: Number of clocks to write CSC waves to SGPRs (need to multiply this value by 4) Requires - SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL - = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0; -SPI_UTIL: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SPI_UTIL + description: Percentage of the GRBM_GUI_ACTIVE time that any of the Shader Pipe Interpolators (SPI) are busy in the shader + engine(s) + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 expression: 100*reduce(GRBM_SPI_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: Percentage of the GRBM_GUI_ACTIVE time that any of the Shader Pipe Interpolators (SPI) - are busy in the shader engine(s) -SPI_VWC_CSC_WR: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SPI_VWC_CSC_WR + description: Number of clocks to write CSC waves to VGPRs (need to multiply this value by 4) Requires SPI_DEBUG_CNTL.DEBUG_PIPE_SEL + to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is + CS3; default, source is CS0; + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SPI event: 195 - description: Number of clocks to write CSC waves to VGPRs (need to multiply this value by 4) Requires - SPI_DEBUG_CNTL.DEBUG_PIPE_SEL to select source, DEBUG_PIPE_SEL = 1, source is CS1; DEBUG_PIPE_SEL - = 2, source is CS2; DEBUG_PIPE_SEL = 3, source is CS3; default, source is CS0; -SPI_CS0_WINDOW_VALID: - architectures: - gfx950: + - name: SPI_CS0_WINDOW_VALID + description: Clock count enabled by perfcounter_start event of PIPE0. + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 0 - description: Clock count enabled by perfcounter_start event of PIPE0. -SPI_CS0_BUSY: - architectures: - gfx950: + - name: SPI_CS0_BUSY + description: Number of clocks with outstanding waves of PIPE0 (SPI or SH). + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 1 - description: Number of clocks with outstanding waves of PIPE0 (SPI or SH). -SPI_CS0_NUM_THREADGROUPS: - architectures: - gfx950: + - name: SPI_CS0_NUM_THREADGROUPS + description: Number of threadgroups launched of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 2 - description: Number of threadgroups launched of PIPE0 -SPI_CS0_CRAWLER_STALL: - architectures: - gfx950: + - name: SPI_CS0_CRAWLER_STALL + description: Number of clocks event/wave order fifo is full of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 3 - description: Number of clocks event/wave order fifo is full of PIPE0 -SPI_CS0_EVENT_WAVE: - architectures: - gfx950: + - name: SPI_CS0_EVENT_WAVE + description: Number of events and waves of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 4 - description: Number of events and waves of PIPE0 -SPI_CS0_WAVE: - architectures: - gfx950: + - name: SPI_CS0_WAVE + description: Number of waves of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 5 - description: Number of waves of PIPE0 -SPI_CS1_WINDOW_VALID: - architectures: - gfx950: + - name: SPI_CS1_WINDOW_VALID + description: Clock count enabled by perfcounter_start event of PIPE1. + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 6 - description: Clock count enabled by perfcounter_start event of PIPE1. -SPI_CS1_BUSY: - architectures: - gfx950: + - name: SPI_CS1_BUSY + description: Number of clocks with outstanding waves of PIPE1 (SPI or SH). + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 7 - description: Number of clocks with outstanding waves of PIPE1 (SPI or SH). -SPI_CS1_NUM_THREADGROUPS: - architectures: - gfx950: + - name: SPI_CS1_NUM_THREADGROUPS + description: Number of threadgroups launched of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 8 - description: Number of threadgroups launched of PIPE1 -SPI_CS1_CRAWLER_STALL: - architectures: - gfx950: + - name: SPI_CS1_CRAWLER_STALL + description: Number of clocks event/wave order fifo is full of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 9 - description: Number of clocks event/wave order fifo is full of PIPE1 -SPI_CS1_EVENT_WAVE: - architectures: - gfx950: + - name: SPI_CS1_EVENT_WAVE + description: Number of events and waves of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 10 - description: Number of events and waves of PIPE1 -SPI_CS1_WAVE: - architectures: - gfx950: + - name: SPI_CS1_WAVE + description: Number of waves of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 11 - description: Number of waves of PIPE1 -SPI_CS2_WINDOW_VALID: - architectures: - gfx950: + - name: SPI_CS2_WINDOW_VALID + description: Clock count enabled by perfcounter_start event of PIPE2. + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 12 - description: Clock count enabled by perfcounter_start event of PIPE2. -SPI_CS2_BUSY: - architectures: - gfx950: + - name: SPI_CS2_BUSY + description: Number of clocks with outstanding waves of PIPE2 (SPI or SH). + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 13 - description: Number of clocks with outstanding waves of PIPE2 (SPI or SH). -SPI_CS2_NUM_THREADGROUPS: - architectures: - gfx950: + - name: SPI_CS2_NUM_THREADGROUPS + description: Number of threadgroups launched of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 14 - description: Number of threadgroups launched of PIPE2 -SPI_CS2_CRAWLER_STALL: - architectures: - gfx950: + - name: SPI_CS2_CRAWLER_STALL + description: Number of clocks event/wave order fifo is full of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 15 - description: Number of clocks event/wave order fifo is full of PIPE2 -SPI_CS2_EVENT_WAVE: - architectures: - gfx950: + - name: SPI_CS2_EVENT_WAVE + description: Number of events and waves of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 16 - description: Number of events and waves of PIPE2 -SPI_CS2_WAVE: - architectures: - gfx950: + - name: SPI_CS2_WAVE + description: Number of waves of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 17 - description: Number of waves of PIPE2 -SPI_CS3_WINDOW_VALID: - architectures: - gfx950: + - name: SPI_CS3_WINDOW_VALID + description: Clock count enabled by perfcounter_start event of PIPE3. + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 18 - description: Clock count enabled by perfcounter_start event of PIPE3. -SPI_CS3_BUSY: - architectures: - gfx950: + - name: SPI_CS3_BUSY + description: Number of clocks with outstanding waves of PIPE3 (SPI or SH). + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 19 - description: Number of clocks with outstanding waves of PIPE3 (SPI or SH). -SPI_CS3_NUM_THREADGROUPS: - architectures: - gfx950: + - name: SPI_CS3_NUM_THREADGROUPS + description: Number of threadgroups launched of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 20 - description: Number of threadgroups launched of PIPE3 -SPI_CS3_CRAWLER_STALL: - architectures: - gfx950: + - name: SPI_CS3_CRAWLER_STALL + description: Number of clocks event/wave order fifo is full of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 21 - description: Number of clocks event/wave order fifo is full of PIPE3 -SPI_CS3_EVENT_WAVE: - architectures: - gfx950: + - name: SPI_CS3_EVENT_WAVE + description: Number of events and waves of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 22 - description: Number of events and waves of PIPE3 -SPI_CS3_WAVE: - architectures: - gfx950: + - name: SPI_CS3_WAVE + description: Number of waves of PIPE3. + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 23 - description: Number of waves of PIPE3. -SPI_CSQ_P0_Q0_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P0_Q0_OCCUPANCY + description: Sum of occupancy info of Queue0 of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 140 - description: Sum of occupancy info of Queue0 of PIPE0 -SPI_CSQ_P0_Q1_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P0_Q1_OCCUPANCY + description: Sum of occupancy info of Queue1 of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 141 - description: Sum of occupancy info of Queue1 of PIPE0 -SPI_CSQ_P0_Q2_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P0_Q2_OCCUPANCY + description: Sum of occupancy info of Queue2 of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 142 - description: Sum of occupancy info of Queue2 of PIPE0 -SPI_CSQ_P0_Q3_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P0_Q3_OCCUPANCY + description: Sum of occupancy info of Queue3 of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 143 - description: Sum of occupancy info of Queue3 of PIPE0 -SPI_CSQ_P0_Q4_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P0_Q4_OCCUPANCY + description: Sum of occupancy info of Queue4 of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 144 - description: Sum of occupancy info of Queue4 of PIPE0 -SPI_CSQ_P0_Q5_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P0_Q5_OCCUPANCY + description: Sum of occupancy info of Queue5 of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 145 - description: Sum of occupancy info of Queue5 of PIPE0 -SPI_CSQ_P0_Q6_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P0_Q6_OCCUPANCY + description: Sum of occupancy info of Queue6 of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 146 - description: Sum of occupancy info of Queue6 of PIPE0 -SPI_CSQ_P0_Q7_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P0_Q7_OCCUPANCY + description: Sum of occupancy info of Queue7 of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 147 - description: Sum of occupancy info of Queue7 of PIPE0 -SPI_CSQ_P1_Q0_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P1_Q0_OCCUPANCY + description: Sum of occupancy info of Queue0 of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 148 - description: Sum of occupancy info of Queue0 of PIPE1 -SPI_CSQ_P1_Q1_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P1_Q1_OCCUPANCY + description: Sum of occupancy info of Queue1 of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 149 - description: Sum of occupancy info of Queue1 of PIPE1 -SPI_CSQ_P1_Q2_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P1_Q2_OCCUPANCY + description: Sum of occupancy info of Queue2 of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 150 - description: Sum of occupancy info of Queue2 of PIPE1 -SPI_CSQ_P1_Q3_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P1_Q3_OCCUPANCY + description: Sum of occupancy info of Queue3 of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 151 - description: Sum of occupancy info of Queue3 of PIPE1 -SPI_CSQ_P1_Q4_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P1_Q4_OCCUPANCY + description: Sum of occupancy info of Queue4 of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 152 - description: Sum of occupancy info of Queue4 of PIPE1 -SPI_CSQ_P1_Q5_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P1_Q5_OCCUPANCY + description: Sum of occupancy info of Queue5 of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 153 - description: Sum of occupancy info of Queue5 of PIPE1 -SPI_CSQ_P1_Q6_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P1_Q6_OCCUPANCY + description: Sum of occupancy info of Queue6 of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 154 - description: Sum of occupancy info of Queue6 of PIPE1 -SPI_CSQ_P1_Q7_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P1_Q7_OCCUPANCY + description: Sum of occupancy info of Queue7 of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 155 - description: Sum of occupancy info of Queue7 of PIPE1 -SPI_CSQ_P2_Q0_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P2_Q0_OCCUPANCY + description: Sum of occupancy info of Queue0 of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 156 - description: Sum of occupancy info of Queue0 of PIPE2 -SPI_CSQ_P2_Q1_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P2_Q1_OCCUPANCY + description: Sum of occupancy info of Queue1 of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 157 - description: Sum of occupancy info of Queue1 of PIPE2 -SPI_CSQ_P2_Q2_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P2_Q2_OCCUPANCY + description: Sum of occupancy info of Queue2 of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 158 - description: Sum of occupancy info of Queue2 of PIPE2 -SPI_CSQ_P2_Q3_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P2_Q3_OCCUPANCY + description: Sum of occupancy info of Queue3 of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 159 - description: Sum of occupancy info of Queue3 of PIPE2 -SPI_CSQ_P2_Q4_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P2_Q4_OCCUPANCY + description: Sum of occupancy info of Queue4 of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 160 - description: Sum of occupancy info of Queue4 of PIPE2 -SPI_CSQ_P2_Q5_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P2_Q5_OCCUPANCY + description: Sum of occupancy info of Queue5 of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 161 - description: Sum of occupancy info of Queue5 of PIPE2 -SPI_CSQ_P2_Q6_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P2_Q6_OCCUPANCY + description: Sum of occupancy info of Queue6 of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 162 - description: Sum of occupancy info of Queue6 of PIPE2 -SPI_CSQ_P2_Q7_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P2_Q7_OCCUPANCY + description: Sum of occupancy info of Queue7 of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 163 - description: Sum of occupancy info of Queue7 of PIPE2 -SPI_CSQ_P3_Q0_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P3_Q0_OCCUPANCY + description: Sum of occupancy info of Queue0 of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 164 - description: Sum of occupancy info of Queue0 of PIPE3 -SPI_CSQ_P3_Q1_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P3_Q1_OCCUPANCY + description: Sum of occupancy info of Queue1 of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 165 - description: Sum of occupancy info of Queue1 of PIPE3 -SPI_CSQ_P3_Q2_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P3_Q2_OCCUPANCY + description: Sum of occupancy info of Queue2 of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 166 - description: Sum of occupancy info of Queue2 of PIPE3 -SPI_CSQ_P3_Q3_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P3_Q3_OCCUPANCY + description: Sum of occupancy info of Queue3 of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 167 - description: Sum of occupancy info of Queue3 of PIPE3 -SPI_CSQ_P3_Q4_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P3_Q4_OCCUPANCY + description: Sum of occupancy info of Queue4 of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 168 - description: Sum of occupancy info of Queue4 of PIPE3 -SPI_CSQ_P3_Q5_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P3_Q5_OCCUPANCY + description: Sum of occupancy info of Queue5 of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 169 - description: Sum of occupancy info of Queue5 of PIPE3 -SPI_CSQ_P3_Q6_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P3_Q6_OCCUPANCY + description: Sum of occupancy info of Queue6 of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 170 - description: Sum of occupancy info of Queue6 of PIPE3 -SPI_CSQ_P3_Q7_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P3_Q7_OCCUPANCY + description: Sum of occupancy info of Queue7 of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 171 - description: Sum of occupancy info of Queue7 of PIPE3 -SPI_CSQ_P0_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P0_OCCUPANCY + description: Sum of occupancy info of all queues of PIPE0 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 172 - description: Sum of occupancy info of all queues of PIPE0 -SPI_CSQ_P1_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P1_OCCUPANCY + description: Sum of occupancy info of all queues of PIPE1 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 173 - description: Sum of occupancy info of all queues of PIPE1 -SPI_CSQ_P2_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P2_OCCUPANCY + description: Sum of occupancy info of all queues of PIPE2 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 174 - description: Sum of occupancy info of all queues of PIPE2 -SPI_CSQ_P3_OCCUPANCY: - architectures: - gfx950: + - name: SPI_CSQ_P3_OCCUPANCY + description: Sum of occupancy info of all queues of PIPE3 + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 175 - description: Sum of occupancy info of all queues of PIPE3 -SPI_VWC0_VDATA_VALID_WR: - architectures: - gfx950: + - name: SPI_VWC0_VDATA_VALID_WR + description: Number of clocks for vgpr bus_0 to write VGPRs + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 193 - description: Number of clocks for vgpr bus_0 to write VGPRs -SPI_VWC1_VDATA_VALID_WR: - architectures: - gfx950: + - name: SPI_VWC1_VDATA_VALID_WR + description: Number of clocks for vgpr bus_1 to write VGPRs + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 194 - description: Number of clocks for vgpr bus_1 to write VGPRs -SPI_CSC_WAVE_CNT_BUSY: - architectures: - gfx950: + - name: SPI_CSC_WAVE_CNT_BUSY + description: Number of cycles when there is any waves in pipe + properties: [] + definitions: + - architectures: + - gfx950 block: SPI event: 225 - description: Number of cycles when there is any waves in pipe -# Block SQ( Shader SeQuencer Block) -SQC_DCACHE_ATOMIC: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_ATOMIC + description: Number of atomic requests. (per-SQ, per-Bank) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 298 - description: Number of atomic requests. (per-SQ, per-Bank) -SQC_DCACHE_BUSY_CYCLES: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: SQC_DCACHE_BUSY_CYCLES + description: ' Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed)' + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 289 - description: ' Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, - unwindowed)' -SQC_DCACHE_HITS: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_HITS + description: Number of cache hits. (per-SQ, per-Bank, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 291 - description: Number of cache hits. (per-SQ, per-Bank, nondeterministic) -SQC_DCACHE_INPUT_VALID_READYB: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_INPUT_VALID_READYB + description: Input stalled by SQC (per-SQ, nondeterministic, unwindowed) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 260 - description: Input stalled by SQC (per-SQ, nondeterministic, unwindowed) -SQC_DCACHE_MISSES: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_MISSES + description: Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 292 - description: Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic) -SQC_DCACHE_MISSES_DUPLICATE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_MISSES_DUPLICATE + description: Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 293 - description: Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, - per-Bank, nondeterministic) -SQC_DCACHE_REQ: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_REQ + description: Number of requests (post-bank-serialization). (per-SQ, per-Bank) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 290 - description: Number of requests (post-bank-serialization). (per-SQ, per-Bank) -SQC_DCACHE_REQ_READ_1: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_REQ_READ_1 + description: Number of constant cache 1 dw read requests. (per-SQ) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 323 - description: Number of constant cache 1 dw read requests. (per-SQ) -SQC_DCACHE_REQ_READ_16: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_REQ_READ_16 + description: Number of constant cache 16 dw read requests. (per-SQ) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 327 - description: Number of constant cache 16 dw read requests. (per-SQ) -SQC_DCACHE_REQ_READ_2: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_REQ_READ_2 + description: Number of constant cache 2 dw read requests. (per-SQ) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 324 - description: Number of constant cache 2 dw read requests. (per-SQ) -SQC_DCACHE_REQ_READ_4: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_REQ_READ_4 + description: Number of constant cache 4 dw read requests. (per-SQ) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 325 - description: Number of constant cache 4 dw read requests. (per-SQ) -SQC_DCACHE_REQ_READ_8: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_DCACHE_REQ_READ_8 + description: Number of constant cache 8 dw read requests. (per-SQ) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 326 - description: Number of constant cache 8 dw read requests. (per-SQ) -SQC_ICACHE_BUSY_CYCLES: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: SQC_ICACHE_BUSY_CYCLES + description: Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed) + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 269 - description: Clock cycles while cache is reporting that it is busy. (No-Masking, nondeterministic, unwindowed) -SQC_ICACHE_HITS: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_ICACHE_HITS + description: Number of cache hits. (per-SQ, per-Bank, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 271 - description: Number of cache hits. (per-SQ, per-Bank, nondeterministic) -SQC_ICACHE_INPUT_VALID_READYB: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: SQC_ICACHE_INPUT_VALID_READYB + description: ' Input stalled by SQC (per-SQ, nondeterministic, unwindowed)' + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 257 - description: ' Input stalled by SQC (per-SQ, nondeterministic, unwindowed)' -SQC_ICACHE_MISSES: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_ICACHE_MISSES + description: Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 272 - description: Number of cache misses, includes uncached requests. (per-SQ, per-Bank, nondeterministic) -SQC_ICACHE_MISSES_DUPLICATE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_ICACHE_MISSES_DUPLICATE + description: Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, per-Bank, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 273 - description: Number of misses that were duplicates (access to a non-resident, miss pending CL). (per-SQ, - per-Bank, nondeterministic) -SQC_ICACHE_REQ: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_ICACHE_REQ + description: Number of requests. (per-SQ, per-Bank) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 270 - description: Number of requests. (per-SQ, per-Bank) -SQC_LDS_BANK_CONFLICT: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQC_LDS_BANK_CONFLICT + description: Number of cycles LDS is stalled by bank conflicts. (emulated, C1) + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 285 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 256 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 288 - description: Number of cycles LDS is stalled by bank conflicts. (emulated, C1) -SQC_LDS_IDX_ACTIVE: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQC_LDS_IDX_ACTIVE + description: Number of cycles LDS is used for indexed (non-direct,non-interpolation) operations. {per-simd, emulated, + C1} + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 290 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 261 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 293 - description: Number of cycles LDS is used for indexed (non-direct,non-interpolation) operations. {per-simd, - emulated, C1} -SQC_TC_DATA_ATOMIC_REQ: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_TC_DATA_ATOMIC_REQ + description: Number of data atomic requests to the TC (No-Masking, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 266 - description: Number of data atomic requests to the TC (No-Masking, nondeterministic) -SQC_TC_DATA_READ_REQ: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_TC_DATA_READ_REQ + description: Number of data read requests to the TC (No-Masking, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 264 - description: Number of data read requests to the TC (No-Masking, nondeterministic) -SQC_TC_DATA_WRITE_REQ: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_TC_DATA_WRITE_REQ + description: Number of data write requests to the TC (No-Masking, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 265 - description: Number of data write requests to the TC (No-Masking, nondeterministic) -SQC_TC_INST_REQ: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_TC_INST_REQ + description: Number of insruction requests to the TC (No-Masking, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 263 - description: Number of insruction requests to the TC (No-Masking, nondeterministic) -SQC_TC_REQ: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_TC_REQ + description: Total number of TC requests that were issued by instruction and constant caches. (No-Masking, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 262 - description: Total number of TC requests that were issued by instruction and constant caches. (No-Masking, - nondeterministic) -SQC_TC_STALL: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQC_TC_STALL + description: Valid request stalled TC request interface (no-credits). (No-Masking, nondeterministic, unwindowed) + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 267 - description: Valid request stalled TC request interface (no-credits). (No-Masking, nondeterministic, - unwindowed) -SQ_ACCUM_PREV: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx940/gfx90a/gfx12/gfx1200/gfx1201: + - name: SQ_ACCUM_PREV + description: This is a hardware register that can be used for accumulating values for other counters. This is useful in + expressions where you want to integrate over time. Only accumulates once every 4 cycles. This counter is primarily for + use with derived counters supplied by rocprof. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 1 - description: This is a hardware register that can be used for accumulating values for other counters. - This is useful in expressions where you want to integrate over time. Only accumulates once every 4 - cycles. This counter is primarily for use with derived counters supplied by rocprof. -SQ_ACCUM_PREV_HIRES: - architectures: - gfx90a: + - name: SQ_ACCUM_PREV_HIRES + description: This is a hardware register that can be used for accumulating values for other counters. This is useful in + expressions where you want to integrate over time. This counter is primarily for use with derived counters supplied + by rocprof. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 185 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 184 - gfx950: + - architectures: + - gfx950 block: SQ event: 200 - description: This is a hardware register that can be used for accumulating values for other counters. - This is useful in expressions where you want to integrate over time. This - counter is primarily for use with derived counters supplied by rocprof. -SQ_ACTIVE_INST_ANY: - architectures: - gfx90a: + - name: SQ_ACTIVE_INST_ANY + description: Number of cycles each wave spends working on any type of instruction. Useful in determining percentage of + time spend executing wave workloads (see WaveExec). This value is returned on a per-SE (aggregate of values in SIMDs + in the SE) basis with units in quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 96 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 101 - gfx950: + - architectures: + - gfx950 block: SQ event: 117 - description: Number of cycles each wave spends working on any type of instruction. Useful in determining - percentage of time spend executing wave workloads (see WaveExec). This value is returned on a per-SE - (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). -SQ_ACTIVE_INST_EXP_GDS: - architectures: - gfx90a: + - name: SQ_ACTIVE_INST_EXP_GDS + description: Number of cycles each wave spends working on EXPORT or GDS instructions. This value represents the number + of cycles each wave spends executing instructions synchronizing workgroups across the device (global data sync). High + values indicates large amounts of time spent waiting on communication between CUs. This value is returned on a per-SE + (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). See AMD ISAs for more information + on GDS instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 101 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 106 - gfx950: + - architectures: + - gfx950 block: SQ event: 122 - description: Number of cycles each wave spends working on EXPORT or GDS instructions. This value represents - the number of cycles each wave spends executing instructions synchronizing workgroups across the device - (global data sync). High values indicates large amounts of time spent waiting on communication between - CUs. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units - in quad-cycles(4 cycles). See AMD ISAs for more information on GDS instructions. -SQ_ACTIVE_INST_FLAT: - architectures: - gfx90a: + - name: SQ_ACTIVE_INST_FLAT + description: Number of cycles each wave spends working on FLAT instructions. This value represents the number of cycles + each wave spends executing instructions accessing flat scratch memory locations. High values indicates a large amount + of reading/writing to scratch memory on the device. This value is returned on a per-SE (aggregate of values in SIMDs + in the SE) basis with units in quad-cycles(4 cycles). See AMD ISAs for more information on FLAT instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 103 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 108 - gfx950: + - architectures: + - gfx950 block: SQ event: 124 - description: Number of cycles each wave spends working on FLAT instructions. This value represents the - number of cycles each wave spends executing instructions accessing flat scratch memory locations. - High values indicates a large amount of reading/writing to scratch memory on the device. This value - is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 - cycles). See AMD ISAs for more information on FLAT instructions. -SQ_ACTIVE_INST_LDS: - architectures: - gfx90a: + - name: SQ_ACTIVE_INST_LDS + description: Number of cycles each wave spends working on LDS instructions. This value represents the number of cycles + each wave spends executing instructions accessing the local data store (data shared between SIMDs on the same CU). High + values indicates a large amount of reading/writing to this shared memory space. This value is returned on a per-SE (aggregate + of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). See AMD ISAs for more information on LDS instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 98 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 103 - gfx950: + - architectures: + - gfx950 block: SQ event: 119 - description: Number of cycles each wave spends working on LDS instructions. This value represents the - number of cycles each wave spends executing instructions accessing the local data store (data shared - between SIMDs on the same CU). High values indicates a large amount of reading/writing to this shared - memory space. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with - units in quad-cycles(4 cycles). See AMD ISAs for more information on LDS instructions. -SQ_ACTIVE_INST_MISC: - architectures: - gfx90a: + - name: SQ_ACTIVE_INST_MISC + description: Number of cycles each wave spends working on a BRANCH or SENDMSG instructions. This value represents the + number of cycles each wave spends executing instructions performing control flow branching and message sending. This + value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). See + AMD ISAs for more information on BRANCH and SENDMSG instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 102 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 107 - gfx950: + - architectures: + - gfx950 block: SQ event: 123 - description: Number of cycles each wave spends working on a BRANCH or SENDMSG instructions. This value - represents the number of cycles each wave spends executing instructions performing control flow branching - and message sending. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis - with units in quad-cycles(4 cycles). See AMD ISAs for more information on BRANCH and SENDMSG instructions. -SQ_ACTIVE_INST_SCA: - architectures: - gfx90a: + - name: SQ_ACTIVE_INST_SCA + description: Number of cycles each wave spends working on a SALU or SMEM instructions. This value represents the number + of cycles each wave spends executing scalar ALU or scalar memory instructions. On MI200/300 platforms, there is a single + ALU per CU. High values indicates a large amount of time spent executing scalar instructions. This value is returned + on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). See AMD ISAs for more + information on SALU and SMEM instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 100 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 105 - gfx950: + - architectures: + - gfx950 block: SQ event: 121 - description: Number of cycles each wave spends working on a SALU or SMEM instructions. This value represents - the number of cycles each wave spends executing scalar ALU or scalar memory instructions. On MI200/300 - platforms, there is a single ALU per CU. High values indicates a large amount of time spent executing - scalar instructions. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis - with units in quad-cycles(4 cycles). See AMD ISAs for more information on SALU and SMEM instructions. -SQ_ACTIVE_INST_VALU: - architectures: - gfx906/gfx900/gfx9: + - name: SQ_ACTIVE_INST_VALU + description: Number of cycles each wave spends working on a VALU instructions. This value represents the number of cycles + each wave spends executing vector ALU instructions. On MI200 platforms, there are 4 VALUs per CU. High values indicates + a large amount of time spent executing vector instructions. This value is returned on a per-SE (aggregate of values + in SIMDs in the SE) basis with units in quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 71 - gfx908: + - architectures: + - gfx908 block: SQ event: 72 - gfx90a: + - architectures: + - gfx90a block: SQ event: 99 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 104 - gfx950: + - architectures: + - gfx950 block: SQ event: 120 - description: Number of cycles each wave spends working on a VALU instructions. This value represents - the number of cycles each wave spends executing vector ALU instructions. On MI200 platforms, there - are 4 VALUs per CU. High values indicates a large amount of time spent executing vector instructions. - This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 - cycles). -SQ_ACTIVE_INST_VMEM: - architectures: - gfx90a: + - name: SQ_ACTIVE_INST_VMEM + description: Number of cycles each wave spends working on a VMEM instructions. This value represents the number of cycles + each wave spends executing vector memory instructions. High values indicates a large amount of time spent executing + vector memory operations. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units + in quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 97 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 102 - gfx950: + - architectures: + - gfx950 block: SQ event: 118 - description: Number of cycles each wave spends working on a VMEM instructions. This value represents - the number of cycles each wave spends executing vector memory instructions. High values indicates - a large amount of time spent executing vector memory operations. This value is returned on a per-SE - (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). -SQ_BUSY_CU_CYCLES: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_BUSY_CU_CYCLES + description: Number of quad-cycles each CU is busy. Can be used to calculate the percentage of time each CU is busy. This + value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 13 - description: Number of quad-cycles each CU is busy. Can be used to calculate the percentage of time - each CU is busy. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis - with units in quad-cycles(4 cycles). -SQ_BUSY_CYCLES: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx940/gfx90a/gfx12/gfx1200/gfx1201: + - name: SQ_BUSY_CYCLES + description: Number of clock cycles there are active waves in a shader engine (as reported by the distributed sequencer). + This value does not denote the number of active waves, only the clock cycle in which any wave is present in a SE. This + value is returned on a per-shader engine basis in clock cycles. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 3 - description: Number of clock cycles there are active waves in a shader engine (as reported by the distributed - sequencer). This value does not denote the number of active waves, only the clock cycle in which any - wave is present in a SE. This value is returned on a per-shader engine basis in clock cycles. -SQ_CYCLES: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_CYCLES + description: Clock cycles. Value is returned per-SIMD. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 2 - description: Clock cycles. Value is returned per-SIMD. -SQ_IFETCH: - architectures: - gfx90a: + - name: SQ_IFETCH + description: Number of instruction fetch requests from L1I (instruction) cache. This is a value returned per-SIMD. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 115 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 120 - gfx950: + - architectures: + - gfx950 block: SQ event: 136 - description: Number of instruction fetch requests from L1I (instruction) cache. This is a value returned - per-SIMD. -SQ_IFETCH_LEVEL: - architectures: - gfx90a: + - name: SQ_IFETCH_LEVEL + description: Number of inflight instruction fetch requests from the cache. This is a value returned per-sharder engine. + Best used with accumlate() functions as part of a derived counter. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 116 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 121 - gfx950: + - architectures: + - gfx950 block: SQ event: 137 - description: Number of inflight instruction fetch requests from the cache. This is a value returned - per-sharder engine. Best used with accumlate() functions as part of a derived counter. -SQ_INSTS: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS + description: Total number of instructions issued. When used in combination with SQ_ACTIVE_INST_ANY (cycle count for executing + instructions) the average latency of instruction execution can be calculated (SQ_ACTIVE_INST_ANY / SQ_INSTS). This value + is returned per-SE (aggregate of values in SIMDs in the SE). + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 25 - description: Total number of instructions issued. When used in combination with SQ_ACTIVE_INST_ANY (cycle - count for executing instructions) the average latency of instruction execution can be calculated (SQ_ACTIVE_INST_ANY - / SQ_INSTS). This value is returned per-SE (aggregate of values in SIMDs in the SE). -SQ_INSTS_BRANCH: - architectures: - gfx90a: + - name: SQ_INSTS_BRANCH + description: Total number of BRANCH instructions issued. This value is returned per-SE (aggregate of values in SIMDs in + the SE). This value SHOULD NOT be used in combination with SQ_ACTIVE_INST_MISC to calculate latency. SQ_ACTIVE_INST_MISC + includes both BRANCH and SENDMSG instructions while this is only BRANCH. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 64 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 69 - gfx950: + - architectures: + - gfx950 block: SQ event: 71 - description: Total number of BRANCH instructions issued. This value is returned per-SE (aggregate of - values in SIMDs in the SE). This value SHOULD NOT be used in combination with SQ_ACTIVE_INST_MISC - to calculate latency. SQ_ACTIVE_INST_MISC includes both BRANCH and SENDMSG instructions while this - is only BRANCH. -SQ_INSTS_EXP_GDS: - architectures: - gfx90a: + - name: SQ_INSTS_EXP_GDS + description: Total number of EXPORT or GDS (global wave state) instructions issued. When used in combination with SQ_ACTIVE_INST_EXP_GDS + (cycle count for executing instructions) the average latency of EXPORT/GDS instruction execution can be calculated (SQ_ACTIVE_INST_EXP_GDS + / SQ_INSTS_EXP_GDS). This value is returned per-SE (aggregate of values in SIMDs in the SE). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 63 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 68 - gfx950: + - architectures: + - gfx950 block: SQ event: 70 - description: Total number of EXPORT or GDS (global wave state) instructions issued. When used in combination - with SQ_ACTIVE_INST_EXP_GDS (cycle count for executing instructions) the average latency of EXPORT/GDS - instruction execution can be calculated (SQ_ACTIVE_INST_EXP_GDS / SQ_INSTS_EXP_GDS). This value is - returned per-SE (aggregate of values in SIMDs in the SE). -SQ_INSTS_FLAT: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INSTS_FLAT + description: Total number of FLAT instructions issued. When used in combination with SQ_ACTIVE_INST_FLAT (cycle count + for executing instructions) the average latency of FLAT instruction execution can be calculated (SQ_ACTIVE_INST_FLAT + / SQ_INSTS). This value is returned per-SE (aggregate of values in SIMDs in the SE). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 57 - gfx906/gfx900/gfx9: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 32 - gfx908: + - architectures: + - gfx908 block: SQ event: 33 - gfx90a: + - architectures: + - gfx90a block: SQ event: 58 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 62 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 56 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 44 - gfx950: + - architectures: + - gfx950 block: SQ event: 64 - description: Total number of FLAT instructions issued. When used in combination with SQ_ACTIVE_INST_FLAT - (cycle count for executing instructions) the average latency of FLAT instruction execution can be - calculated (SQ_ACTIVE_INST_FLAT / SQ_INSTS). This value is returned per-SE (aggregate of values in - SIMDs in the SE). -SQ_INSTS_FLAT_LDS_ONLY: - architectures: - gfx906/gfx900/gfx9: + - name: SQ_INSTS_FLAT_LDS_ONLY + description: Total number of FLAT instructions issued that read/wrote only from/to LDS (scratch memory). Values are only + populated if EARLY_TA_DONE is enabled. This value is returned per-SE (aggregate of values in SIMDs in the SE). + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 33 - gfx908: + - architectures: + - gfx908 block: SQ event: 34 - gfx90a: + - architectures: + - gfx90a block: SQ event: 59 - description: Total number of FLAT instructions issued that read/wrote only from/to LDS (scratch memory). - Values are only populated if EARLY_TA_DONE is enabled. This value is returned per-SE (aggregate of - values in SIMDs in the SE). -SQ_INSTS_GDS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INSTS_GDS + description: Total number of GDS (global data sync) instructions issued. This value is returned per-SE (aggregate of values + in SIMDs in the SE). See AMD ISAs for more information on GDS (global data sync) instructions. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 55 - gfx906/gfx900/gfx9: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 35 - gfx908: + - architectures: + - gfx908 block: SQ event: 36 - gfx90a: + - architectures: + - gfx90a block: SQ event: 61 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 66 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 54 - gfx950: + - architectures: + - gfx950 block: SQ event: 68 - description: Total number of GDS (global data sync) instructions issued. This value is returned per-SE - (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on GDS (global data sync) - instructions. -SQ_INSTS_LDS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INSTS_LDS + description: Total number of LDS instructions issued (including FLAT). This value is returned per-SE (aggregate of values + in SIMDs in the SE). See AMD ISAs for more information on LDS instructions. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 59 - gfx906/gfx900/gfx9: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 34 - gfx908: + - architectures: + - gfx908 block: SQ event: 35 - gfx90a: + - architectures: + - gfx90a block: SQ event: 60 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 65 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 57 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 45 - gfx950: + - architectures: + - gfx950 block: SQ event: 67 - description: Total number of LDS instructions issued (including FLAT). This value is returned per-SE - (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on LDS instructions. -SQ_INSTS_MFMA: - architectures: - gfx90a: + - name: SQ_INSTS_MFMA + description: Total number of MFMA (Matrix-Fused-Multiply-Add) instructions issued. This value is returned per-SE (aggregate + of values in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 52 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 56 - gfx950: + - architectures: + - gfx950 block: SQ event: 58 - description: Total number of MFMA (Matrix-Fused-Multiply-Add) instructions issued. This value is returned - per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. -SQ_INSTS_SALU: - architectures: - gfx906/gfx900/gfx9: + - name: SQ_INSTS_SALU + description: Total Number of SALU (Scalar ALU) instructions issued. This value is returned per-SE (aggregate of values + in SIMDs in the SE). See AMD ISAs for more information on SALU instructions. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 30 - gfx908: + - architectures: + - gfx908 block: SQ event: 31 - gfx90a: + - architectures: + - gfx90a block: SQ event: 56 - gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx1032/gfx940: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx940 + - gfx941 + - gfx942 block: SQ event: 60 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 58 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 46 - gfx950: + - architectures: + - gfx950 block: SQ event: 62 - description: Total Number of SALU (Scalar ALU) instructions issued. This value is returned per-SE (aggregate - of values in SIMDs in the SE). See AMD ISAs for more information on SALU instructions. -SQ_INSTS_SENDMSG: - architectures: - gfx90a: + - name: SQ_INSTS_SENDMSG + description: Total number of Sendmsg (typically an interrupt to the CPU host) instructions issued. This value is returned + per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on Sendmsg instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 65 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 70 - gfx950: + - architectures: + - gfx950 block: SQ event: 72 - description: Total number of Sendmsg (typically an interrupt to the CPU host) instructions issued. This - value is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information - on Sendmsg instructions. -SQ_INSTS_SMEM: - architectures: - gfx906/gfx900/gfx9: + - name: SQ_INSTS_SMEM + description: Total number of SMEM (Scalar Memory Read) instructions issued. This value is returned per-SE (aggregate of + values in SIMDs in the SE). See AMD ISAs for more information on SMEM instructions. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 31 - gfx908: + - architectures: + - gfx908 block: SQ event: 32 - gfx90a: + - architectures: + - gfx90a block: SQ event: 57 - gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx1032/gfx940: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx940 + - gfx941 + - gfx942 block: SQ event: 61 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 59 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 47 - gfx950: + - architectures: + - gfx950 block: SQ event: 63 - description: Total number of SMEM (Scalar Memory Read) instructions issued. This value is returned per-SE - (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on SMEM instructions. -SQ_INSTS_SMEM_NORM: - architectures: - gfx90a: + - name: SQ_INSTS_SMEM_NORM + description: Number of SMEM instructions issued normalized to match the level of memory accessed (i.e. scratch, global, + etc). This normalized value is designed to give a hint of high cost memory actions being used. The formula used to calculate + this value is the following (INST_COUNT *2 for load/store; INST_COUNT*2 atomic; INST_COUNT*2 memtime; INST_COUNT*4 wb/inv). + This value is returned per-SE (aggregate of values in SIMDs in the SE). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 188 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 187 - gfx950: + - architectures: + - gfx950 block: SQ event: 203 - description: Number of SMEM instructions issued normalized to match the level of memory accessed (i.e. - scratch, global, etc). This normalized value is designed to give a hint of high cost memory actions - being used. The formula used to calculate this value is the following (INST_COUNT *2 for load/store; - INST_COUNT*2 atomic; INST_COUNT*2 memtime; INST_COUNT*4 wb/inv). This value is returned per-SE (aggregate - of values in SIMDs in the SE). -SQ_INSTS_TEX_LOAD: - architectures: - gfx11/gfx1102/gfx1100/gfx1101: + - name: SQ_INSTS_TEX_LOAD + description: The number of buffer load, image load, sample, or atomic (with return) texture instructions issued. The value + is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on TEX_LOAD instructions. + properties: [] + definitions: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 66 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 54 - description: The number of buffer load, image load, sample, or atomic (with return) texture instructions - issued. The value is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more - information on TEX_LOAD instructions. -SQ_INSTS_TEX_STORE: - architectures: - gfx11/gfx1102/gfx1100/gfx1101: + - name: SQ_INSTS_TEX_STORE + description: The number of buffer store, image store, or atomic (without return) texture instructions issued. The value + is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on TEX_STORE instructions. + properties: [] + definitions: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 67 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 55 - description: The number of buffer store, image store, or atomic (without return) texture instructions - issued. The value is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more - information on TEX_STORE instructions. -SQ_INSTS_VALU: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INSTS_VALU + description: The number of VALU (Vector ALU) instructions issued. The value is returned per-SE (aggregate of values in + SIMDs in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 64 - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx900/gfx90a/gfx9: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 26 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 62 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 50 - description: The number of VALU (Vector ALU) instructions issued. The value is returned per-SE (aggregate - of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. -SQ_INSTS_VALU_ADD_F16: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_ADD_F16 + description: The number of VALU (Vector ALU) ADD/SUB instructions on float16. For maximum performance lower precision + floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs + in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 27 - description: The number of VALU (Vector ALU) ADD/SUB instructions on float16. For maximum performance - lower precision floating point ops are preferred to higher precision ones. The value is returned per-SE - (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. -SQ_INSTS_VALU_ADD_F32: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_ADD_F32 + description: The number of VALU (Vector ALU) ADD/SUB instructions on float32. For maximum performance lower precision + floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs + in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 31 - description: The number of VALU (Vector ALU) ADD/SUB instructions on float32. For maximum performance - lower precision floating point ops are preferred to higher precision ones. The value is returned per-SE - (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. -SQ_INSTS_VALU_ADD_F64: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_ADD_F64 + description: The number of VALU ADD/SUB instructions on float64. For maximum performance lower precision floating point + ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See + AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 35 - description: The number of VALU ADD/SUB instructions on float64. For maximum performance lower precision - floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate - of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. -SQ_INSTS_VALU_CVT: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_CVT + description: The number of VALU (Vector ALU) data conversion instructions (ex. float -> int). The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 41 - description: The number of VALU (Vector ALU) data conversion instructions (ex. float -> int). The value - is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on - VALU instructions. -SQ_INSTS_VALU_FMA_F16: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_FMA_F16 + description: The number of VALU (Vector ALU) FMA (Fused-Multiply-Add)/MAD(Multiply-Add) instructions on float16. For maximum + performance lower precision floating point ops are preferred to higher precision ones. The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 29 - description: The number of VALU (Vector ALU) FMA (Fused-Multiply-Add)/MAD(Multiply-Add) instructions - on float16. For maximum performance lower precision floating point ops are preferred to higher precision - ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more - information on VALU instructions. -SQ_INSTS_VALU_FMA_F32: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_FMA_F32 + description: The number of VALU (Vector ALU) FMA (Fused-Multiply-Add)/MAD(Multiply-Add) instructions on float32. For maximum + performance lower precision floating point ops are preferred to higher precision ones. The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 33 - description: The number of VALU (Vector ALU) FMA (Fused-Multiply-Add)/MAD(Multiply-Add) instructions - on float32. For maximum performance lower precision floating point ops are preferred to higher precision - ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more - information on VALU instructions. -SQ_INSTS_VALU_FMA_F64: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_FMA_F64 + description: The number of VALU (Vector ALU) FMA (Fused-Multiply-Add)/MAD(Multiply-Add) instructions on float64. For maximum + performance lower precision floating point ops are preferred to higher precision ones. The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 37 - description: The number of VALU (Vector ALU) FMA (Fused-Multiply-Add)/MAD(Multiply-Add) instructions - on float64. For maximum performance lower precision floating point ops are preferred to higher precision - ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more - information on VALU instructions. -SQ_INSTS_VALU_INT32: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_INT32 + description: The number of VALU (Vector ALU) 32-bit integer (signed or unsigned) instructions. The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instruction. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 39 - description: The number of VALU (Vector ALU) 32-bit integer (signed or unsigned) instructions. The value - is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on - VALU instruction. -SQ_INSTS_VALU_INT64: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_INT64 + description: The number of VALU (Vector ALU) 64-bit integer (signed or unsigned) instructions. The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instruction. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 40 - description: The number of VALU (Vector ALU) 64-bit integer (signed or unsigned) instructions. The value - is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on - VALU instruction. -SQ_INSTS_VALU_MFMA_BF16: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_MFMA_BF16 + description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on BF16 format (V_MFMA or V_SMFMAC). For maximum + performance lower precision floating point ops are preferred to higher precision ones. The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 44 - description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on BF16 format - (V_MFMA or V_SMFMAC). For maximum performance lower precision floating point ops are - preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in - the SE). See AMD ISAs for more information on MFMA instructions. -SQ_INSTS_VALU_MFMA_F16: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_MFMA_F16 + description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on F16 format (V_MFMA or V_SMFMAC). For maximum + performance lower precision floating point ops are preferred to higher precision ones. The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 43 - description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on F16 format - (V_MFMA or V_SMFMAC). For maximum performance lower precision floating point ops are - preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in - the SE). See AMD ISAs for more information on MFMA instructions. -SQ_INSTS_VALU_MFMA_F32: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_MFMA_F32 + description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on F32 format (V_MFMA or V_SMFMAC). For maximum + performance lower precision floating point ops are preferred to higher precision ones. The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 45 - description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on F32 format - (V_MFMA or V_SMFMAC). For maximum performance lower precision floating point ops are - preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in - the SE). See AMD ISAs for more information on MFMA instructions. -SQ_INSTS_VALU_MFMA_F64: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_MFMA_F64 + description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on F64 format (V_MFMA_F64_*). For maximum performance + lower precision floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate of + values in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 46 - description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on F64 format - (V_MFMA_F64_*). For maximum performance lower precision floating point ops are - preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in - the SE). See AMD ISAs for more information on MFMA instructions. -SQ_INSTS_VALU_MFMA_I8: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_MFMA_I8 + description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on I8 format (V_MFMA or V_SMFMAC). See AMD ISAs + for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 42 - description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on I8 format - (V_MFMA or V_SMFMAC). See AMD ISAs for more information on MFMA instructions. -SQ_INSTS_VALU_MFMA_F8: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: SQ_INSTS_VALU_MFMA_F8 + description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on F8 format (V_MFMA or V_SMFMAC). See AMD CDNA3 + ISA for more informations. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 48 - description: The number of MFMA (Matrix-Fused-Multiply-Add) operating on F8 format - (V_MFMA or V_SMFMAC). See AMD CDNA3 ISA for more informations. -SQ_INSTS_VALU_MFMA_XF32: - architectures: - gfx950: + - name: SQ_INSTS_VALU_MFMA_XF32 + description: Number of VALU V_MFMA_*_XF32 instructions. + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 47 - description: Number of VALU V_MFMA_*_XF32 instructions. -SQ_INSTS_VALU_MFMA_MOPS_BF16: - architectures: - gfx90a: + - name: SQ_INSTS_VALU_MFMA_MOPS_BF16 + description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) + and operating on BF16 (bfloat16) data. Captures add or mul ops performed divided by 512. For maximum performance lower + precision floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values + in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 49 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 51 - gfx950: + - architectures: + - gfx950 block: SQ event: 52 - description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) - and operating on BF16 (bfloat16) data. Captures add or mul ops performed divided by 512. For maximum - performance lower precision floating point ops are preferred to higher precision ones. The value is - returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on MFMA - instructions. -SQ_INSTS_VALU_MFMA_MOPS_F16: - architectures: - gfx90a: + - name: SQ_INSTS_VALU_MFMA_MOPS_F16 + description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) + and operating on F16 (float16) data. Captures add or mul ops performed divided by 512. For maximum performance lower + precision floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values + in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 48 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 50 - gfx950: + - architectures: + - gfx950 block: SQ event: 51 - description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) - and operating on F16 (float16) data. Captures add or mul ops performed divided by 512. For maximum - performance lower precision floating point ops are preferred to higher precision ones. The value is - returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on MFMA - instructions. -SQ_INSTS_VALU_MFMA_MOPS_F32: - architectures: - gfx90a: + - name: SQ_INSTS_VALU_MFMA_MOPS_F32 + description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) + and operating on F32 (float32) data. Captures add or mul ops performed divided by 512. For maximum performance lower + precision floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values + in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 50 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 52 - gfx950: + - architectures: + - gfx950 block: SQ event: 53 - description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) - and operating on F32 (float32) data. Captures add or mul ops performed divided by 512. For maximum - performance lower precision floating point ops are preferred to higher precision ones. The value is - returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on MFMA - instructions. -SQ_INSTS_VALU_MFMA_MOPS_F64: - architectures: - gfx90a: + - name: SQ_INSTS_VALU_MFMA_MOPS_F64 + description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) + and operating on F64 (float64) data. Captures add or mul ops performed divided by 512. For maximum performance lower + precision floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values + in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 51 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 53 - gfx950: + - architectures: + - gfx950 block: SQ event: 54 - description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) - and operating on F64 (float64) data. Captures add or mul ops performed divided by 512. For maximum - performance lower precision floating point ops are preferred to higher precision ones. The value is - returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on MFMA - instructions. -SQ_INSTS_VALU_MFMA_MOPS_I8: - architectures: - gfx90a: + - name: SQ_INSTS_VALU_MFMA_MOPS_I8 + description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) + and operating on I8 (8 bit int) data. Captures add or mul ops performed divided by 512. The value is returned per-SE + (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on MFMA instructions. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 47 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 49 - gfx950: + - architectures: + - gfx950 block: SQ event: 50 - description: The number of math operation instructions on the VALU (Vector ALU) using MFMA (Matrix-Fused-Multiply-Add) - and operating on I8 (8 bit int) data. Captures add or mul ops performed divided by 512. The value - is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on - MFMA instructions. -SQ_INSTS_VALU_MFMA_MOPS_F8: - architectures: - gfx942/gfx941/gfx940: + - name: SQ_INSTS_VALU_MFMA_MOPS_F8 + description: The number of math operation on F8 datatype. Captures add or mul ops performed divided by 512. The value + is returned per-SE (aggregate of values in SIMDs in the SE). See AMD CDNA3 ISA for more information on MFMA F8 instructions. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 55 - gfx950: + - architectures: + - gfx950 block: SQ event: 56 - description: The number of math operation on F8 datatype. Captures add or mul ops performed divided by 512. The value - is returned per-SE (aggregate of values in SIMDs in the SE). See AMD CDNA3 ISA for more information on MFMA F8 instructions. -SQ_INSTS_VALU_MFMA_MOPS_XF32: - architectures: - gfx950: + - name: SQ_INSTS_VALU_MFMA_MOPS_XF32 + description: Number of VALU matrix math operations (add or mul) performed dividied by 512, assuming a full EXEC mask, + of data type XF32. (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 55 - description: Number of VALU matrix math operations (add or mul) performed dividied by 512, assuming a full EXEC mask, of data type XF32. (per-simd, emulated) -SQ_VALU_MFMA_COEXEC_CYCLES: - architectures: - gfx950: + - name: SQ_VALU_MFMA_COEXEC_CYCLES + description: Number of cycles in which MFMA VALU was busy and a normal VALU instruction was issued (co-execution) (per-simd, + nondeterministic) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 94 - description: Number of cycles in which MFMA VALU was busy and a normal VALU instruction was issued (co-execution) (per-simd, nondeterministic) -SQ_INSTS_VALU_MUL_F16: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_MUL_F16 + description: The number of VALU MUL instructions on float16 data. For maximum performance lower precision floating point + ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See + AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 28 - description: The number of VALU MUL instructions on float16 data. For maximum performance lower precision - floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate - of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. -SQ_INSTS_VALU_MUL_F32: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_MUL_F32 + description: The number of VALU MUL instructions on float32 data. For maximum performance lower precision floating point + ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See + AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 32 - description: The number of VALU MUL instructions on float32 data. For maximum performance lower precision - floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate - of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. -SQ_INSTS_VALU_MUL_F64: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_MUL_F64 + description: The number of VALU MUL instructions on float64 data. For maximum performance lower precision floating point + ops are preferred to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See + AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 36 - description: The number of VALU MUL instructions on float64 data. For maximum performance lower precision - floating point ops are preferred to higher precision ones. The value is returned per-SE (aggregate - of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. -SQ_INSTS_VALU_TRANS_F16: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_TRANS_F16 + description: The number of VALU transcendental instructions on float16 data. Transcendental instructions include sin, + cos, exp, log, etc. For maximum performance lower precision floating point ops are preferred to higher precision ones. + The value is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 30 - description: The number of VALU transcendental instructions on float16 data. Transcendental instructions - include sin, cos, exp, log, etc. For maximum performance lower precision floating point ops are preferred - to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See - AMD ISAs for more information on VALU instructions. -SQ_INSTS_VALU_TRANS_F32: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_TRANS_F32 + description: The number of VALU transcendental instructions on float32 data. Transcendental instructions include sin, + cos, exp, log, etc. For maximum performance lower precision floating point ops are preferred to higher precision ones. + The value is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 34 - description: The number of VALU transcendental instructions on float32 data. Transcendental instructions - include sin, cos, exp, log, etc. For maximum performance lower precision floating point ops are preferred - to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See - AMD ISAs for more information on VALU instructions. -SQ_INSTS_VALU_TRANS_F64: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_INSTS_VALU_TRANS_F64 + description: The number of VALU transcendental instructions on float64 data. Transcendental instructions include sin, + cos, exp, log, etc. For maximum performance lower precision floating point ops are preferred to higher precision ones. + The value is returned per-SE (aggregate of values in SIMDs in the SE). See AMD ISAs for more information on VALU instructions. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 38 - description: The number of VALU transcendental instructions on float64 data. Transcendental instructions - include sin, cos, exp, log, etc. For maximum performance lower precision floating point ops are preferred - to higher precision ones. The value is returned per-SE (aggregate of values in SIMDs in the SE). See - AMD ISAs for more information on VALU instructions. -SQ_INSTS_VMEM: - architectures: - gfx90a: + - name: SQ_INSTS_VMEM + description: The number of VMEM (GPU Memory) instructions issued. The value is returned per-SE (aggregate of values in + SIMDs in the SE). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 55 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 59 - gfx950: + - architectures: + - gfx950 block: SQ event: 61 - description: The number of VMEM (GPU Memory) instructions issued. The value is returned per-SE (aggregate - of values in SIMDs in the SE). -SQ_INSTS_VMEM_RD: - architectures: - gfx906/gfx900/gfx9: + - name: SQ_INSTS_VMEM_RD + description: The number of VMEM (GPU Memory) read instructions issued (including FLAT/scratch memory). The value is returned + per-SE (aggregate of values in SIMDs in the SE). + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 28 - gfx908: + - architectures: + - gfx908 block: SQ event: 29 - gfx90a: + - architectures: + - gfx90a block: SQ event: 54 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 58 - gfx950: + - architectures: + - gfx950 block: SQ event: 60 - description: The number of VMEM (GPU Memory) read instructions issued (including FLAT/scratch memory). - The value is returned per-SE (aggregate of values in SIMDs in the SE). -SQ_INSTS_VMEM_WR: - architectures: - gfx906/gfx900/gfx9: + - name: SQ_INSTS_VMEM_WR + description: The number of VMEM (GPU Memory) write instructions issued (including FLAT/scratch memory). The value is returned + per-SE (aggregate of values in SIMDs in the SE). + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 27 - gfx908: + - architectures: + - gfx908 block: SQ event: 28 - gfx90a: + - architectures: + - gfx90a block: SQ event: 53 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 57 - gfx950: + - architectures: + - gfx950 block: SQ event: 59 - description: The number of VMEM (GPU Memory) write instructions issued (including FLAT/scratch memory). - The value is returned per-SE (aggregate of values in SIMDs in the SE). -SQ_INSTS_VSKIPPED: - architectures: - gfx90a: + - name: SQ_INSTS_VSKIPPED + description: The number of vector instructions skipped. This can occur when the S_SETVSKIP bit is enabled on certain instructions. + Often this is used as an alturnative to branching (a compiler may replace a branch with setting this bit to skip the + operation, typically as a performance optimization). The value is returned per-SE (aggregate of values in SIMDs in the + SE). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 66 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 71 - gfx950: + - architectures: + - gfx950 block: SQ event: 73 - description: The number of vector instructions skipped. This can occur when the S_SETVSKIP bit is enabled - on certain instructions. Often this is used as an alturnative to branching (a compiler may replace - a branch with setting this bit to skip the operation, typically as a performance optimization). The - value is returned per-SE (aggregate of values in SIMDs in the SE). -SQ_INSTS_WAVE32: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INSTS_WAVE32 + description: Number of wave32 instructions issued, for flat, lds, valu, tex. {emulated, C1} + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 71 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 70 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 58 - description: Number of wave32 instructions issued, for flat, lds, valu, tex. {emulated, C1} -SQ_INSTS_WAVE32_LDS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INSTS_WAVE32_LDS + description: Number of wave32 LDS indexed instructions issued. Wave64 may count 1 or 2, depending on what gets issued. + {emulated, C1} + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 74 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 72 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 60 - description: Number of wave32 LDS indexed instructions issued. Wave64 may count 1 or 2, depending on - what gets issued. {emulated, C1} -SQ_INSTS_WAVE32_VALU: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INSTS_WAVE32_VALU + description: Number of wave32 valu instructions issued. Wave64 may count 1 or 2, depending on what gets issued. {emulated, + C1} + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 75 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 73 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 61 - description: Number of wave32 valu instructions issued. Wave64 may count 1 or 2, depending on what gets - issued. {emulated, C1} -SQ_INST_CYCLES_SALU: - architectures: - gfx906/gfx900/gfx9: + - name: SQ_INST_CYCLES_SALU + description: The number of cycles needed to execute non-memory read scalar operations (SALU). This value is returned on + a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 84 - gfx908: + - architectures: + - gfx908 block: SQ event: 85 - gfx90a: + - architectures: + - gfx90a block: SQ event: 112 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 117 - gfx950: + - architectures: + - gfx950 block: SQ event: 133 - description: The number of cycles needed to execute non-memory read scalar operations (SALU). This value - is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 - cycles). -SQ_INST_CYCLES_SMEM: - architectures: - gfx90a: + - name: SQ_INST_CYCLES_SMEM + description: The number of cycles needed to execute scalar memory reads (SMEM). This value is returned on a per-SE (aggregate + of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 111 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 116 - gfx950: + - architectures: + - gfx950 block: SQ event: 132 - description: The number of cycles needed to execute scalar memory reads (SMEM). This value is returned - on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). -SQ_INST_CYCLES_VMEM: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INST_CYCLES_VMEM + description: The number of cycles needed to send addr and data for VMEM (lds, buffer, image, flat, scratch, global) instructions, + windowed by perf_en. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units in + quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 120 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 106 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 102 - description: The number of cycles needed to send addr and data for VMEM (lds, buffer, image, flat, scratch, - global) instructions, windowed by perf_en. This value is returned on a per-SE (aggregate of values - in SIMDs in the SE) basis with units in quad-cycles(4 cycles). -SQ_INST_CYCLES_VMEM_RD: - architectures: - gfx90a: + - name: SQ_INST_CYCLES_VMEM_RD + description: The number of cycles needed to send addr and cmd data for VMEM read instructions. This value is returned + on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 105 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 110 - gfx950: + - architectures: + - gfx950 block: SQ event: 126 - description: The number of cycles needed to send addr and cmd data for VMEM read instructions. This - value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 - cycles). -SQ_INST_CYCLES_VMEM_WR: - architectures: - gfx90a: + - name: SQ_INST_CYCLES_VMEM_WR + description: The number of cycles needed to send addr and cmd data for VMEM write instructions. This value is returned + on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 104 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 109 - gfx950: + - architectures: + - gfx950 block: SQ event: 125 - description: The number of cycles needed to send addr and cmd data for VMEM write instructions. This - value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis with units in quad-cycles(4 - cycles). -SQ_INST_LEVEL_GDS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INST_LEVEL_GDS + description: Number of in-flight GDS (global) instructions. This value represents the number of instructions each wave + spends synchronizing workgroups across the device (global data sync). Set next counter to ACCUM_PREV and divide by INSTS_GDS + for average latency. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 98 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 87 - description: Number of in-flight GDS (global) instructions. This value represents the number of instructions - each wave spends synchronizing workgroups across the device (global data sync). Set next counter to - ACCUM_PREV and divide by INSTS_GDS for average latency. This value is returned on a per-SE (aggregate - of values in SIMDs in the SE) basis. -SQ_INST_LEVEL_LDS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_INST_LEVEL_LDS + description: Number of in-flight LDS instructions. This value represents the number of instructions each wave spends executing + instructions accessing the local data store (data shared between SIMDs on the same CU). Set next counter to ACCUM_PREV + and divide by INSTS_LDS for average latency. Includes FLAT instructions. This value is returned on a per-SE (aggregate + of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 99 - gfx90a: + - architectures: + - gfx90a block: SQ event: 69 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 74 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 88 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 75 - gfx950: + - architectures: + - gfx950 block: SQ event: 90 - description: Number of in-flight LDS instructions. This value represents the number of instructions - each wave spends executing instructions accessing the local data store (data shared between SIMDs - on the same CU). Set next counter to ACCUM_PREV and divide by INSTS_LDS for average latency. Includes - FLAT instructions. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis. -SQ_INST_LEVEL_SMEM: - architectures: - gfx90a: + - name: SQ_INST_LEVEL_SMEM + description: Number of in-flight SMEM instructions (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). Set next counter + to ACCUM_PREV and divide by INSTS_SMEM for average latency per smem request. Falls slightly short of total request latency + because some fetches are divided into two requests that may finish at different times and this counter collects the + average latency of the two. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 68 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 73 - gfx950: + - architectures: + - gfx950 block: SQ event: 89 - description: Number of in-flight SMEM instructions (*2 load/store; *2 atomic; *2 memtime; *4 wb/inv). - Set next counter to ACCUM_PREV and divide by INSTS_SMEM for average latency per smem request. Falls - slightly short of total request latency because some fetches are divided into two requests that may - finish at different times and this counter collects the average latency of the two. This value is - returned on a per-SE (aggregate of values in SIMDs in the SE) basis. -SQ_INST_LEVEL_VMEM: - architectures: - gfx90a: + - name: SQ_INST_LEVEL_VMEM + description: Number of in-flight VMEM instructions. Set next counter to ACCUM_PREV and divide by INSTS_VMEM for average + latency. Includes FLAT instructions. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 67 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 72 - gfx950: + - architectures: + - gfx950 block: SQ event: 88 - description: Number of in-flight VMEM instructions. Set next counter to ACCUM_PREV and divide by INSTS_VMEM - for average latency. Includes FLAT instructions. This value is returned on a per-SE (aggregate of - values in SIMDs in the SE) basis. -SQ_ITEMS: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_ITEMS + description: Number of valid items per wave. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) + basis. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 14 - description: Number of valid items per wave. This value is returned on a per-SE (aggregate of values - in SIMDs in the SE) basis. -SQ_LDS_ADDR_CONFLICT: - architectures: - gfx90a: + - name: SQ_LDS_ADDR_CONFLICT + description: Number of cycles LDS (local data store) is stalled by address conflicts. This value is returned on a per-SE + (aggregate of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 122 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 127 - gfx950: + - architectures: + - gfx950 block: SQ event: 143 - description: Number of cycles LDS (local data store) is stalled by address conflicts. This value is - returned on a per-SE (aggregate of values in SIMDs in the SE) basis. -SQ_LDS_ATOMIC_RETURN: - architectures: - gfx90a: + - name: SQ_LDS_ATOMIC_RETURN + description: The number of atomic return cycles in LDS (local data store). This value is returned on a per-SE (aggregate + of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 125 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 130 - gfx950: + - architectures: + - gfx950 block: SQ event: 146 - description: The number of atomic return cycles in LDS (local data store). This value is returned on - a per-SE (aggregate of values in SIMDs in the SE) basis. -SQ_LDS_BANK_CONFLICT: - architectures: - gfx906/gfx900/gfx9: + - name: SQ_LDS_BANK_CONFLICT + description: The number of cycles LDS (local data store) is stalled by bank conflicts. This value is returned on a per-SE + (aggregate of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 93 - gfx908: + - architectures: + - gfx908 block: SQ event: 94 - gfx90a: + - architectures: + - gfx90a block: SQ event: 121 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 126 - gfx950: + - architectures: + - gfx950 block: SQ event: 142 - description: The number of cycles LDS (local data store) is stalled by bank conflicts. This value is - returned on a per-SE (aggregate of values in SIMDs in the SE) basis. -SQ_LDS_IDX_ACTIVE: - architectures: - gfx90a: + - name: SQ_LDS_IDX_ACTIVE + description: Number of cycles LDS (local data store) is used for indexed (non-direct,non-interpolation) operations. This + value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 126 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 131 - gfx950: + - architectures: + - gfx950 block: SQ event: 147 - description: Number of cycles LDS (local data store) is used for indexed (non-direct,non-interpolation) - operations. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis. -SQ_LDS_MEM_VIOLATIONS: - architectures: - gfx90a: + - name: SQ_LDS_MEM_VIOLATIONS + description: Number of threads that have a memory violation in the LDS (local data store). This value is returned on a + per-SE (aggregate of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 124 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 129 - gfx950: + - architectures: + - gfx950 block: SQ event: 145 - description: Number of threads that have a memory violation in the LDS (local data store). This value - is returned on a per-SE (aggregate of values in SIMDs in the SE) basis. -SQ_LDS_UNALIGNED_STALL: - architectures: - gfx90a: + - name: SQ_LDS_UNALIGNED_STALL + description: Number of cycles LDS (local data store) is stalled processing flat unaligned load/store ops. This value is + returned on a per-SE (aggregate of values in SIMDs in the SE) basis. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 123 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 128 - gfx950: + - architectures: + - gfx950 block: SQ event: 144 - description: Number of cycles LDS (local data store) is stalled processing flat unaligned load/store - ops. This value is returned on a per-SE (aggregate of values in SIMDs in the SE) basis. -SQ_LEVEL_WAVES: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_LEVEL_WAVES + description: Track the number of waves. Set ACCUM_PREV for the next counter to use this. This value is returned on a per-SIMD + basis. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 7 - gfx950/gfx942/gfx941/gfx940/gfx90a: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 5 - description: Track the number of waves. Set ACCUM_PREV for the next counter to use this. This value - is returned on a per-SIMD basis. -SQ_THREAD_CYCLES_VALU: - architectures: - gfx906/gfx900/gfx9: + - name: SQ_THREAD_CYCLES_VALU + description: 'Number of thread-cycles used to execute VALU operations (similar to INST_CYCLES_VALU but multiplied by # + of active threads). (per-simd)' + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 85 - gfx908: + - architectures: + - gfx908 block: SQ event: 86 - gfx90a: + - architectures: + - gfx90a block: SQ event: 113 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 118 - gfx950: + - architectures: + - gfx950 block: SQ event: 134 - description: 'Number of thread-cycles used to execute VALU operations (similar to INST_CYCLES_VALU but - multiplied by # of active threads). (per-simd)' -SQ_VALU_MFMA_BUSY_CYCLES: - architectures: - gfx90a: + - name: SQ_VALU_MFMA_BUSY_CYCLES + description: Number of cycles the MFMA (Matrixed-Fused-Multiply-Add) ALU is busy. This value is returned on a per-SIMD + basis. + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 72 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 77 - gfx950: + - architectures: + - gfx950 block: SQ event: 93 - description: Number of cycles the MFMA (Matrixed-Fused-Multiply-Add) ALU is busy. This value is returned - on a per-SIMD basis. -SQ_WAIT_ANY: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_WAIT_ANY + description: Number of wave-cycles spent waiting for anything (per-simd, nondeterministic). Units in quad-cycles(4 cycles) + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 37 - gfx90a: + - architectures: + - gfx90a block: SQ event: 85 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 90 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 35 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 27 - gfx950: + - architectures: + - gfx950 block: SQ event: 106 - description: Number of wave-cycles spent waiting for anything (per-simd, nondeterministic). Units in - quad-cycles(4 cycles) -SQ_WAIT_INST_ANY: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_WAIT_INST_ANY + description: Number of wave-cycles spent waiting for any instruction issue. Units in quad-cycles(4 cycles). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 28 - gfx90a: + - architectures: + - gfx90a block: SQ event: 88 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 93 - gfx11/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 26 - gfx950: + - architectures: + - gfx950 block: SQ event: 109 - description: Number of wave-cycles spent waiting for any instruction issue. Units in quad-cycles(4 cycles). -SQ_WAIT_INST_LDS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_WAIT_INST_LDS + description: Number of wave-cycles spent waiting for LDS instruction issue. In units of 4 cycles. (per-simd, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 31 - gfx906/gfx900/gfx9: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: SQ event: 63 - gfx908: + - architectures: + - gfx908 block: SQ event: 64 - gfx90a: + - architectures: + - gfx90a block: SQ event: 91 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 96 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 29 - gfx950: + - architectures: + - gfx950 block: SQ event: 112 - description: Number of wave-cycles spent waiting for LDS instruction issue. In units of 4 cycles. (per-simd, - nondeterministic) -SQ_WAVE32_INSTS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_WAVE32_INSTS + description: Number of instructions issued by wave32 waves. Skipped instructions are not counted. {emulated} + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 84 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 82 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 70 - description: Number of instructions issued by wave32 waves. Skipped instructions are not counted. {emulated} -SQ_WAVE64_INSTS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_WAVE64_INSTS + description: Number of instructions issued by wave64 waves. Skipped instructions are not counted. {emulated} + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 85 - gfx11/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 block: SQ event: 83 - gfx12/gfx1200/gfx1201: + - architectures: + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 71 - description: Number of instructions issued by wave64 waves. Skipped instructions are not counted. {emulated} -SQ_WAVES: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx900/gfx90a/gfx9/gfx12/gfx1200/gfx1201: + - name: SQ_WAVES + description: Count number of waves sent to distributed sequencers (SQs). This value represents the number of waves that + are sent to each SQ. This only counts new waves sent since the start of collection (for dispatch profiling this is the + timeframe of kernel execution, for agent profiling it is the timeframe between start_context and read counter data). + A sum of all SQ_WAVES values will give the total number of waves started by the application during the collection timeframe. + Returns one value per-SE (aggregates of SIMD values). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 4 - description: Count number of waves sent to distributed sequencers (SQs). This value represents the number - of waves that are sent to each SQ. This only counts new waves sent since the start of collection (for - dispatch profiling this is the timeframe of kernel execution, for agent profiling it is the timeframe - between start_context and read counter data). A sum of all SQ_WAVES values will give the total number - of waves started by the application during the collection timeframe. Returns one value per-SE (aggregates - of SIMD values). -SQ_WAVES_EQ_64: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_WAVES_EQ_64 + description: Count number of waves with exactly 64 active threads sent to SQs. This value represents the number of waves + that an each individual SIMD has enqueued during the collection timeframe (for dispatch profiling this is the timeframe + of kernel execution, for agent profiling it is the timeframe between start_context and read counter data) with exactly + 64 threads. A sum of all SQ_WAVES_EQ_64 values will give the total number of waves with 64 threads enqueued during the + collection timeframe by the application. Returns one value per-SE (aggregates of SIMD values). Useful for checking for + wavefront occupancy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 6 - description: Count number of waves with exactly 64 active threads sent to SQs. This value represents - the number of waves that an each individual SIMD has enqueued during the collection timeframe (for - dispatch profiling this is the timeframe of kernel execution, for agent profiling it is the timeframe - between start_context and read counter data) with exactly 64 threads. A sum of all SQ_WAVES_EQ_64 - values will give the total number of waves with 64 threads enqueued during the collection timeframe - by the application. Returns one value per-SE (aggregates of SIMD values). Useful for checking for - wavefront occupancy. -SQ_WAVES_LT_16: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_WAVES_LT_16 + description: Count number of waves sent <16 active threads sent to SQs. (per-simd, emulated, global). This value represents + the number of waves that an each individual SIMD has enqueued during the collection timeframe (for dispatch profiling + this is the timeframe of kernel execution, for agent profiling it is the timeframe between start_context and read counter + data) with less than 16 threads. A sum of all SQ_WAVES_LT_16 values will give the total number of waves with 16 threads + enqueued during the collection timeframe by the application. Returns one value per-SE (aggregates of SIMD values). Useful + for checking for wavefront occupancy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 10 - description: Count number of waves sent <16 active threads sent to SQs. (per-simd, emulated, global). - This value represents the number of waves that an each individual SIMD has enqueued during the collection - timeframe (for dispatch profiling this is the timeframe of kernel execution, for agent profiling it - is the timeframe between start_context and read counter data) with less than 16 threads. A sum of - all SQ_WAVES_LT_16 values will give the total number of waves with 16 threads enqueued during the - collection timeframe by the application. Returns one value per-SE (aggregates of SIMD values). Useful - for checking for wavefront occupancy. -SQ_WAVES_LT_32: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_WAVES_LT_32 + description: Count number of waves sent <32 active threads sent to SQs. This value represents the number of waves that + an each individual SIMD has enqueued during the collection timeframe (for dispatch profiling this is the timeframe of + kernel execution, for agent profiling it is the timeframe between start_context and read counter data) with less than + 32 threads. A sum of all SQ_WAVES_LT_32 values will give the total number of waves with 32 threads enqueued during the + collection timeframe by the application. Returns one value per-SE (aggregates of SIMD values). Useful for checking for + wavefront occupancy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 9 - description: Count number of waves sent <32 active threads sent to SQs. This value represents the number - of waves that an each individual SIMD has enqueued during the collection timeframe (for dispatch profiling - this is the timeframe of kernel execution, for agent profiling it is the timeframe between start_context - and read counter data) with less than 32 threads. A sum of all SQ_WAVES_LT_32 values will give the - total number of waves with 32 threads enqueued during the collection timeframe by the application. - Returns one value per-SE (aggregates of SIMD values). Useful for checking for wavefront occupancy. -SQ_WAVES_LT_48: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_WAVES_LT_48 + description: Count number of waves with <48 active threads sent to SQs. This value represents the number of waves that + an each individual SIMD has enqueued during the collection timeframe (for dispatch profiling this is the timeframe of + kernel execution, for agent profiling it is the timeframe between start_context and read counter data) with less than + 48 threads. A sum of all SQ_WAVES_LT_48 values will give the total number of waves with 48 threads enqueued during the + collection timeframe by the application. Returns one value per-SE (aggregates of SIMD values). Useful for checking for + wavefront occupancy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 8 - description: Count number of waves with <48 active threads sent to SQs. This value represents the number - of waves that an each individual SIMD has enqueued during the collection timeframe (for dispatch profiling - this is the timeframe of kernel execution, for agent profiling it is the timeframe between start_context - and read counter data) with less than 48 threads. A sum of all SQ_WAVES_LT_48 values will give the - total number of waves with 48 threads enqueued during the collection timeframe by the application. - Returns one value per-SE (aggregates of SIMD values). Useful for checking for wavefront occupancy. -SQ_WAVES_LT_64: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SQ_WAVES_LT_64 + description: Count number of waves with <64 active threads sent to SQs. This value represents the number of waves that + an each individual SIMD has enqueued during the collection timeframe (for dispatch profiling this is the timeframe of + kernel execution, for agent profiling it is the timeframe between start_context and read counter data) with less than + 64 threads. A sum of all SQ_WAVES_LT_64 values will give the total number of waves with 64 threads enqueued during the + collection timeframe by the application. Returns one value per-SE (aggregates of SIMD values). Useful for checking for + wavefront occupancy. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: SQ event: 7 - description: Count number of waves with <64 active threads sent to SQs. This value represents the number - of waves that an each individual SIMD has enqueued during the collection timeframe (for dispatch profiling - this is the timeframe of kernel execution, for agent profiling it is the timeframe between start_context - and read counter data) with less than 64 threads. A sum of all SQ_WAVES_LT_64 values will give the - total number of waves with 64 threads enqueued during the collection timeframe by the application. - Returns one value per-SE (aggregates of SIMD values). Useful for checking for wavefront occupancy. -SQ_WAVES_RESTORED: - architectures: - gfx90a: + - name: SQ_WAVES_RESTORED + description: Count number of context-restored waves sent to SQs. This value represents the number of waves whos current + register state has been restored from a register bank during the collection timeframe (for dispatch profiling this is + the timeframe of kernel execution, for agent profiling it is the timeframe between start_context and read counter data). + Context saving/restoring is a slow operation and should be limited. High values can also indicate that stalling may + be taking place (waiting for free register space). Returns one value per-SE (aggregates of SIMD values). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 186 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 185 - gfx950: + - architectures: + - gfx950 block: SQ event: 201 - description: Count number of context-restored waves sent to SQs. This value represents the number of - waves whos current register state has been restored from a register bank during the collection timeframe - (for dispatch profiling this is the timeframe of kernel execution, for agent profiling it is the timeframe - between start_context and read counter data). Context saving/restoring is a slow operation and should - be limited. High values can also indicate that stalling may be taking place (waiting for free register - space). Returns one value per-SE (aggregates of SIMD values). -SQ_WAVES_SAVED: - architectures: - gfx90a: + - name: SQ_WAVES_SAVED + description: Count number of context-saved waves sent to SQs. This value represents the number of waves whos current register + state has been saved to a register bank during the collection timeframe (for dispatch profiling this is the timeframe + of kernel execution, for agent profiling it is the timeframe between start_context and read counter data) . Context + saving/restoring is a slow operation and should be limited. High values can also indicate that stalling may be taking + place (waiting for free register space). Returns one value per-SE (aggregates of SIMD values). + properties: [] + definitions: + - architectures: + - gfx90a block: SQ event: 187 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 186 - gfx950: + - architectures: + - gfx950 block: SQ event: 202 - description: Count number of context-saved waves sent to SQs. This value represents the number of waves - whos current register state has been saved to a register bank during the collection timeframe (for - dispatch profiling this is the timeframe of kernel execution, for agent profiling it is the timeframe - between start_context and read counter data) . Context saving/restoring is a slow operation and should - be limited. High values can also indicate that stalling may be taking place (waiting for free register - space). Returns one value per-SE (aggregates of SIMD values). -SQ_WAVES_sum: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx90a/gfx9/gfx900/gfx12/gfx1200/gfx1201: + - name: SQ_WAVES_sum + description: Gives the total number of waves currently enqueued by the application during the collection timeframe (for + dispatch profiling this is the timeframe of kernel execution, for agent profiling it is the timeframe between start_context + and read counter data). See SQ_WAVES for more details. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(SQ_WAVES,sum) - description: Gives the total number of waves currently enqueued by the application during the collection - timeframe (for dispatch profiling this is the timeframe of kernel execution, for agent profiling it - is the timeframe between start_context and read counter data). See SQ_WAVES for more details. -SQ_WAVE_CYCLES: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: SQ_WAVE_CYCLES + description: The cycles spent executing waves in the CUs. This value is reported per-SE (aggregates of SIMD values) and + is nondeterministic. Units are in quad-cycles (4 cycles). Useful for determining how much time is spent executing wave + code vs overhead/waiting. Low cycle count relative to actual number of cycles processed by the CU can indicate that + the CU is stalling or is overloaded. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: SQ event: 26 - gfx90a: + - architectures: + - gfx90a block: SQ event: 74 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: SQ event: 79 - gfx11/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 block: SQ event: 24 - gfx950: + - architectures: + - gfx950 block: SQ event: 95 - description: The cycles spent executing waves in the CUs. This value is reported per-SE (aggregates - of SIMD values) and is nondeterministic. Units are in quad-cycles (4 cycles). Useful for determining - how much time is spent executing wave code vs overhead/waiting. Low cycle count relative to actual - number of cycles processed by the CU can indicate that the CU is stalling or is overloaded. -SQ_INSTS_VALU_FLOPS_FP16: - architectures: - gfx950: + - name: SQ_INSTS_VALU_FLOPS_FP16 + description: Counts FLOPS per instruction on float 16 excluding MFMA/SMFMA. + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 81 - description: Counts FLOPS per instruction on float 16 excluding MFMA/SMFMA. -SQ_INSTS_VALU_FLOPS_FP32: - architectures: - gfx950: + - name: SQ_INSTS_VALU_FLOPS_FP32 + description: Counts FLOPS per instruction on float 32 excluding MFMA/SMFMA. + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 82 - description: Counts FLOPS per instruction on float 32 excluding MFMA/SMFMA. -SQ_INSTS_VALU_FLOPS_FP64: - architectures: - gfx950: + - name: SQ_INSTS_VALU_FLOPS_FP64 + description: Counts FLOPS per instruction on float 64 excluding MFMA/SMFMA. + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 83 - description: Counts FLOPS per instruction on float 64 excluding MFMA/SMFMA. -SQ_INSTS_VALU_FLOPS_FP16_TRANS: - architectures: - gfx950: + - name: SQ_INSTS_VALU_FLOPS_FP16_TRANS + description: Counts FLOPS per instruction on float 16 trans excluding MFMA/SMFMA. + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 84 - description: Counts FLOPS per instruction on float 16 trans excluding MFMA/SMFMA. -SQ_INSTS_VALU_FLOPS_FP32_TRANS: - architectures: - gfx950: + - name: SQ_INSTS_VALU_FLOPS_FP32_TRANS + description: Counts FLOPS per instruction on float 32 trans excluding MFMA/SMFMA. + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 85 - description: Counts FLOPS per instruction on float 32 trans excluding MFMA/SMFMA. -SQ_INSTS_VALU_FLOPS_FP64_TRANS: - architectures: - gfx950: + - name: SQ_INSTS_VALU_FLOPS_FP64_TRANS + description: Counts FLOPS per instruction on float 64 trans excluding MFMA/SMFMA. + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 86 - description: Counts FLOPS per instruction on float 64 trans excluding MFMA/SMFMA. -SQ_INSTS_VALU_MFMA_F6F4: - architectures: - gfx950: + - name: SQ_INSTS_VALU_MFMA_F6F4 + description: Number of VALU V_MFMA_*_F6F4 instructions. + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 49 - description: Number of VALU V_MFMA_*_F6F4 instructions. -SQ_INSTS_VALU_MFMA_MOPS_F6F4: - architectures: - gfx950: + - name: SQ_INSTS_VALU_MFMA_MOPS_F6F4 + description: Number of VALU matrix math operations (add or mul) performed dividied by 512, assuming a full EXEC mask, + of data type F6 or F4. + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 57 - description: Number of VALU matrix math operations (add or mul) performed dividied by 512, assuming a full EXEC mask, of data type F6 or F4. -SQ_ACTIVE_INST_VALU2: - architectures: - gfx950: + - name: SQ_ACTIVE_INST_VALU2 + description: Number of quad-cycles two VALU instructions are issued.(per-simd, nondeterministic) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 74 - description: Number of quad-cycles two VALU instructions are issued.(per-simd, nondeterministic) -SQ_INSTS_LDS_LOAD: - architectures: - gfx950: + - name: SQ_INSTS_LDS_LOAD + description: Number of LDS load instructions issued . (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 75 - description: Number of LDS load instructions issued . (per-simd, emulated) -SQ_INSTS_LDS_STORE: - architectures: - gfx950: + - name: SQ_INSTS_LDS_STORE + description: Number of LDS store instructions issued . (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 76 - description: Number of LDS store instructions issued . (per-simd, emulated) -SQ_INSTS_LDS_ATOMIC: - architectures: - gfx950: + - name: SQ_INSTS_LDS_ATOMIC + description: Number of LDS atomic instructions issued . (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 77 - description: Number of LDS atomic instructions issued . (per-simd, emulated) -SQ_INSTS_LDS_LOAD_BANDWIDTH: - architectures: - gfx950: + - name: SQ_INSTS_LDS_LOAD_BANDWIDTH + description: Total number of 64-bytes loaded. (instrSize * CountOnes(EXEC))/64 . (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 78 - description: Total number of 64-bytes loaded. (instrSize * CountOnes(EXEC))/64 . (per-simd, emulated) -SQ_INSTS_LDS_STORE_BANDWIDTH: - architectures: - gfx950: + - name: SQ_INSTS_LDS_STORE_BANDWIDTH + description: Total number of 64-bytes written. (instrSize * CountOnes(EXEC))/64 . (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 79 - description: Total number of 64-bytes written. (instrSize * CountOnes(EXEC))/64 . (per-simd, emulated) -SQ_INSTS_LDS_ATOMIC_BANDWIDTH: - architectures: - gfx950: + - name: SQ_INSTS_LDS_ATOMIC_BANDWIDTH + description: Total number of 64-bytes atomic. (instrSize * CountOnes(EXEC))/64. (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 80 - description: Total number of 64-bytes atomic. (instrSize * CountOnes(EXEC))/64. (per-simd, emulated) -SQ_INSTS_VALU_IOPS: - architectures: - gfx950: + - name: SQ_INSTS_VALU_IOPS + description: Counts OPS per instruction on integer/unsigned/bit data. (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 87 - description: Counts OPS per instruction on integer/unsigned/bit data. (per-simd, emulated) -SQ_LDS_DATA_FIFO_FULL: - architectures: - gfx950: + - name: SQ_LDS_DATA_FIFO_FULL + description: Number of cycles LDS data fifo is full. (nondeterministic, unwindowed) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 152 - description: Number of cycles LDS data fifo is full. (nondeterministic, unwindowed) -SQ_LDS_CMD_FIFO_FULL: - architectures: - gfx950: + - name: SQ_LDS_CMD_FIFO_FULL + description: Number of cycles LDS command fifo is full. (nondeterministic, unwindowed) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 153 - description: Number of cycles LDS command fifo is full. (nondeterministic, unwindowed) -SQ_VMEM_TA_ADDR_FIFO_FULL: - architectures: - gfx950: + - name: SQ_VMEM_TA_ADDR_FIFO_FULL + description: Number of cycles texture requests are stalled due to full address fifo in TA. (nondeterministic, unwindowed) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 154 - description: Number of cycles texture requests are stalled due to full address fifo in TA. (nondeterministic, unwindowed) -SQ_VMEM_TA_CMD_FIFO_FULL: - architectures: - gfx950: + - name: SQ_VMEM_TA_CMD_FIFO_FULL + description: Number of cycles texture requests are stalled due to full cmd fifo in TA. (nondeterministic, unwindowed). + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 155 - description: Number of cycles texture requests are stalled due to full cmd fifo in TA. (nondeterministic, unwindowed). -SQ_VMEM_WR_TA_DATA_FIFO_FULL: - architectures: - gfx950: + - name: SQ_VMEM_WR_TA_DATA_FIFO_FULL + description: Number of cycles texture writes are stalled due to full data fifo in TA. (nondeterministic, unwindowed) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 157 - description: Number of cycles texture writes are stalled due to full data fifo in TA. (nondeterministic, unwindowed) -SQ_INSTS_FLAT_FLATSEG: - architectures: - gfx950: + - name: SQ_INSTS_FLAT_FLATSEG + description: Number of FLAT-FLAT instructions issued. (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 65 - description: Number of FLAT-FLAT instructions issued. (per-simd, emulated) -SQ_INSTS_FLAT_NO_LDS: - architectures: - gfx950: + - name: SQ_INSTS_FLAT_NO_LDS + description: Number of FLAT instructions issued with no lds thread. (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 66 - description: Number of FLAT instructions issued with no lds thread. (per-simd, emulated) -SQ_INSTS_EXP: - architectures: - gfx950: + - name: SQ_INSTS_EXP + description: Number of EXP instructions issued, excluding skipped export instructions. (per-simd, emulated) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 69 - description: Number of EXP instructions issued, excluding skipped export instructions. (per-simd, emulated) -SQ_EVENTS: - architectures: - gfx950: + - name: SQ_EVENTS + description: Number of events. (unwindowed, emulated, global) + properties: [] + definitions: + - architectures: + - gfx950 block: SQ event: 16 - description: Number of events. (unwindowed, emulated, global) -ScaPipeIssueUtil: - architectures: - gfx90a: + - name: ScaPipeIssueUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(SQ_ACTIVE_INST_SCA,sum)/(reduce(GRBM_GUI_ACTIVE,max)*CU_NUM) - description: 'Unit: percent' -SmemLatency: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SmemLatency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(accumulate(SQ_INST_LEVEL_SMEM, HIGH_RES),sum)/reduce(SQ_INSTS_SMEM_NORM,sum) - description: 'Unit: cycles' -SpiUtil: - architectures: - gfx90a: + - name: SpiUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(GRBM_SPI_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: 'Unit: percent' - -# TA block( The Texture Addressing block) processes address components and write data from the shaders and passes them to the TCP and texture data TD blocks. -TA_ADDR_STALLED_BY_TC_CYCLES: - architectures: - gfx90a: + - name: TA_ADDR_STALLED_BY_TC_CYCLES + description: Number of cycles addr path stalled by TC. Perf_Windowing not supported for this counter. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 54 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 42 - description: Number of cycles addr path stalled by TC. Perf_Windowing not supported for this counter. -TA_ADDR_STALLED_BY_TC_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_ADDR_STALLED_BY_TC_CYCLES_sum + description: Number of cycles addr path stalled by TC. Perf_Windowing not supported for this counter. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_ADDR_STALLED_BY_TC_CYCLES,sum) - description: Number of cycles addr path stalled by TC. Perf_Windowing not supported for this counter. - Sum over TA instances. -TA_ADDR_STALLED_BY_TD_CYCLES: - architectures: - gfx90a: + - name: TA_ADDR_STALLED_BY_TD_CYCLES + description: Number of cycles addr path stalled by TD. Perf_Windowing not supported for this counter. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 55 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 43 - description: Number of cycles addr path stalled by TD. Perf_Windowing not supported for this counter. -TA_ADDR_STALLED_BY_TD_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_ADDR_STALLED_BY_TD_CYCLES_sum + description: Number of cycles addr path stalled by TD. Perf_Windowing not supported for this counter. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_ADDR_STALLED_BY_TD_CYCLES,sum) - description: Number of cycles addr path stalled by TD. Perf_Windowing not supported for this counter. - Sum over TA instances. -TA_BUFFER_ATOMIC_WAVEFRONTS: - architectures: - gfx90a: + - name: TA_BUFFER_ATOMIC_WAVEFRONTS + description: Number of buffer atomic wavefronts processed by TA. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 47 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 35 - description: Number of buffer atomic wavefronts processed by TA. -TA_BUFFER_ATOMIC_WAVEFRONTS_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_BUFFER_ATOMIC_WAVEFRONTS_sum + description: Number of buffer atomic wavefronts processed by TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_BUFFER_ATOMIC_WAVEFRONTS,sum) - description: Number of buffer atomic wavefronts processed by TA. Sum over TA instances. -TA_BUFFER_COALESCED_READ_CYCLES: - architectures: - gfx90a: + - name: TA_BUFFER_COALESCED_READ_CYCLES + description: Number of buffer coalesced read cycles issued to TC. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 52 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 40 - description: Number of buffer coalesced read cycles issued to TC. -TA_BUFFER_COALESCED_READ_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_BUFFER_COALESCED_READ_CYCLES_sum + description: Number of buffer coalesced read cycles issued to TC. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_BUFFER_COALESCED_READ_CYCLES,sum) - description: Number of buffer coalesced read cycles issued to TC. Sum over TA instances. -TA_BUFFER_COALESCED_WRITE_CYCLES: - architectures: - gfx90a: + - name: TA_BUFFER_COALESCED_WRITE_CYCLES + description: Number of buffer coalesced write cycles issued to TC. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 53 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 41 - description: Number of buffer coalesced write cycles issued to TC. -TA_BUFFER_COALESCED_WRITE_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_BUFFER_COALESCED_WRITE_CYCLES_sum + description: Number of buffer coalesced write cycles issued to TC. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_BUFFER_COALESCED_WRITE_CYCLES,sum) - description: Number of buffer coalesced write cycles issued to TC. Sum over TA instances. -TA_BUFFER_LOAD_WAVEFRONTS: - architectures: - gfx11/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: TA_BUFFER_LOAD_WAVEFRONTS + description: Number of buffer load vec32 packets processed by TA + properties: [] + definitions: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 block: TA event: 45 - description: Number of buffer load vec32 packets processed by TA -TA_BUFFER_LOAD_WAVEFRONTS_sum: - architectures: - gfx11/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: TA_BUFFER_LOAD_WAVEFRONTS_sum + description: Number of buffer load vec32 packets processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(TA_BUFFER_LOAD_WAVEFRONTS,sum) - description: Number of buffer load vec32 packets processed by the TA. Sum over TA instances. -TA_BUFFER_READ_WAVEFRONTS: - architectures: - gfx90a: + - name: TA_BUFFER_READ_WAVEFRONTS + description: Number of buffer read wavefronts processed by TA. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 45 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 33 - description: Number of buffer read wavefronts processed by TA. -TA_BUFFER_READ_WAVEFRONTS_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_BUFFER_READ_WAVEFRONTS_sum + description: Number of buffer read wavefronts processed by TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_BUFFER_READ_WAVEFRONTS,sum) - description: Number of buffer read wavefronts processed by TA. Sum over TA instances. -TA_BUFFER_STORE_WAVEFRONTS: - architectures: - gfx11/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: TA_BUFFER_STORE_WAVEFRONTS + description: Number of buffer store vec32 packets processed by TA + properties: [] + definitions: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 block: TA event: 46 - description: Number of buffer store vec32 packets processed by TA -TA_BUFFER_STORE_WAVEFRONTS_sum: - architectures: - gfx11/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: TA_BUFFER_STORE_WAVEFRONTS_sum + description: Number of buffer store vec32 packets processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: reduce(TA_BUFFER_STORE_WAVEFRONTS,sum) - description: Number of buffer store vec32 packets processed by the TA. Sum over TA instances. -TA_BUFFER_TOTAL_CYCLES: - architectures: - gfx90a: + - name: TA_BUFFER_TOTAL_CYCLES + description: Number of buffer cycles issued to TC. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 49 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 37 - description: Number of buffer cycles issued to TC. -TA_BUFFER_TOTAL_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_BUFFER_TOTAL_CYCLES_sum + description: Number of buffer cycles issued to TC. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_BUFFER_TOTAL_CYCLES,sum) - description: Number of buffer cycles issued to TC. Sum over TA instances. -TA_BUFFER_WAVEFRONTS: - architectures: - gfx90a: + - name: TA_BUFFER_WAVEFRONTS + description: Number of buffer wavefronts processed by TA. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 44 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 32 - description: Number of buffer wavefronts processed by TA. -TA_BUFFER_WAVEFRONTS_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_BUFFER_WAVEFRONTS_sum + description: Number of buffer wavefronts processed by TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_BUFFER_WAVEFRONTS,sum) - description: Number of buffer wavefronts processed by TA. Sum over TA instances. -TA_BUFFER_WRITE_WAVEFRONTS: - architectures: - gfx90a: + - name: TA_BUFFER_WRITE_WAVEFRONTS + description: Number of buffer write wavefronts processed by TA. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 46 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 34 - description: Number of buffer write wavefronts processed by TA. -TA_BUFFER_WRITE_WAVEFRONTS_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_BUFFER_WRITE_WAVEFRONTS_sum + description: Number of buffer write wavefronts processed by TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_BUFFER_WRITE_WAVEFRONTS,sum) - description: Number of buffer write wavefronts processed by TA. Sum over TA instances. -TA_BUSY_avr: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx90a/gfx9/gfx900/gfx12/gfx1200/gfx1201: + - name: TA_BUSY_avr + description: TA block is busy. Average over TA instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_TA_BUSY,avr) - description: TA block is busy. Average over TA instances. -TA_BUSY_max: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx90a/gfx9/gfx900/gfx12/gfx1200/gfx1201: + - name: TA_BUSY_max + description: TA block is busy. Max over TA instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_TA_BUSY,max) - description: TA block is busy. Max over TA instances. -TA_BUSY_min: - architectures: - gfx950/gfx942/gfx941/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx940/gfx908/gfx90a/gfx9/gfx900/gfx12/gfx1200/gfx1201: + - name: TA_BUSY_min + description: TA block is busy. Min over TA instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_TA_BUSY,min) - description: TA block is busy. Min over TA instances. -TA_DATA_STALLED_BY_TC_CYCLES: - architectures: - gfx90a: + - name: TA_DATA_STALLED_BY_TC_CYCLES + description: Number of cycles data path stalled by TC. Perf_Windowing not supported for this counter. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 56 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 44 - description: Number of cycles data path stalled by TC. Perf_Windowing not supported for this counter. -TA_DATA_STALLED_BY_TC_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_DATA_STALLED_BY_TC_CYCLES_sum + description: Number of cycles data path stalled by TC. Perf_Windowing not supported for this counter. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_DATA_STALLED_BY_TC_CYCLES,sum) - description: Number of cycles data path stalled by TC. Perf_Windowing not supported for this counter. - Sum over TA instances. -TA_FLAT_ATOMIC_WAVEFRONTS: - architectures: - gfx90a: + - name: TA_FLAT_ATOMIC_WAVEFRONTS + description: Number of flat opcode atomics processed by the TA. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 103 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 54 - description: Number of flat opcode atomics processed by the TA. -TA_FLAT_ATOMIC_WAVEFRONTS_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_FLAT_ATOMIC_WAVEFRONTS_sum + description: Number of flat opcode atomics processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_FLAT_ATOMIC_WAVEFRONTS,sum) - description: Number of flat opcode atomics processed by the TA. Sum over TA instances. -TA_FLAT_LOAD_WAVEFRONTS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: TA_FLAT_LOAD_WAVEFRONTS + description: ' Number of flat load vec32 packets processed by TA, same as flat_read_wavefronts in earlier IP' + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: TA event: 101 - description: ' Number of flat load vec32 packets processed by TA, same as flat_read_wavefronts in earlier - IP' -TA_FLAT_LOAD_WAVEFRONTS_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: TA_FLAT_LOAD_WAVEFRONTS_sum + description: Number of flat load vec32 packets processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 expression: reduce(TA_FLAT_LOAD_WAVEFRONTS,sum) - description: Number of flat load vec32 packets processed by the TA. Sum over TA instances. -TA_FLAT_READ_WAVEFRONTS: - architectures: - gfx906/gfx908/gfx900/gfx90a/gfx9: + - name: TA_FLAT_READ_WAVEFRONTS + description: Number of flat opcode reads processed by the TA. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a block: TA event: 101 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 52 - description: Number of flat opcode reads processed by the TA. -TA_FLAT_READ_WAVEFRONTS_sum: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: TA_FLAT_READ_WAVEFRONTS_sum + description: Number of flat opcode reads processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_FLAT_READ_WAVEFRONTS,sum) - description: Number of flat opcode reads processed by the TA. Sum over TA instances. -TA_FLAT_STORE_WAVEFRONTS: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: TA_FLAT_STORE_WAVEFRONTS + description: Number of flat store vec32 packets processed by TA, same as flat_write_wavefronts in earlier IP + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 block: TA event: 102 - description: Number of flat store vec32 packets processed by TA, same as flat_write_wavefronts in earlier - IP -TA_FLAT_STORE_WAVEFRONTS_sum: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: TA_FLAT_STORE_WAVEFRONTS_sum + description: Number of flat store vec32 packets processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 expression: reduce(TA_FLAT_STORE_WAVEFRONTS,sum) - description: Number of flat store vec32 packets processed by the TA. Sum over TA instances. -TA_FLAT_WAVEFRONTS: - architectures: - gfx90a: + - name: TA_FLAT_WAVEFRONTS + description: Number of flat opcode wavfronts processed by the TA. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 100 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 51 - description: Number of flat opcode wavfronts processed by the TA. -TA_FLAT_WAVEFRONTS_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_FLAT_WAVEFRONTS_sum + description: Number of flat opcode wavfronts processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_FLAT_WAVEFRONTS,sum) - description: Number of flat opcode wavfronts processed by the TA. Sum over TA instances. -TA_FLAT_WRITE_WAVEFRONTS: - architectures: - gfx906/gfx908/gfx900/gfx90a/gfx9: + - name: TA_FLAT_WRITE_WAVEFRONTS + description: Number of flat opcode writes processed by the TA. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a block: TA event: 102 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 53 - description: Number of flat opcode writes processed by the TA. -TA_FLAT_WRITE_WAVEFRONTS_sum: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: TA_FLAT_WRITE_WAVEFRONTS_sum + description: Number of flat opcode writes processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_FLAT_WRITE_WAVEFRONTS,sum) - description: Number of flat opcode writes processed by the TA. Sum over TA instances. -TA_TA_BUSY: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx900/gfx90a/gfx9/gfx12/gfx1200/gfx1201: + - name: TA_TA_BUSY + description: TA block is busy. Perf_Windowing not supported for this counter. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a block: TA event: 15 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 13 - description: TA block is busy. Perf_Windowing not supported for this counter. -TA_TA_BUSY_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_TA_BUSY_sum + description: TA block is busy. Perf_Windowing not supported for this counter. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_TA_BUSY,sum) - description: TA block is busy. Perf_Windowing not supported for this counter. Sum over TA instances. -TA_TOTAL_WAVEFRONTS: - architectures: - gfx90a: + - name: TA_TOTAL_WAVEFRONTS + description: Total number of wavefronts processed by TA. + properties: [] + definitions: + - architectures: + - gfx90a block: TA event: 32 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TA event: 29 - description: Total number of wavefronts processed by TA. -TA_TOTAL_WAVEFRONTS_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TA_TOTAL_WAVEFRONTS_sum + description: Total number of wavefronts processed by TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TA_TOTAL_WAVEFRONTS,sum) - description: Total number of wavefronts processed by TA. Sum over TA instances. -TA_UTIL: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx1032: + - name: TA_UTIL + description: Percentage of the GRBM_GUI_ACTIVE time that any of the Texture Pipes (TA) are busy in the shader engine(s). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 expression: 100*reduce(GRBM_TA_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: Percentage of the GRBM_GUI_ACTIVE time that any of the Texture Pipes (TA) are busy in the - shader engine(s). -TA_BUFFER_READ_LDS_WAVEFRONTS: - architectures: - gfx950: + - name: TA_BUFFER_READ_LDS_WAVEFRONTS + description: Number of buffer read wavefronts for lds return processed by TA. + properties: [] + definitions: + - architectures: + - gfx950 block: TA event: 70 - description: Number of buffer read wavefronts for lds return processed by TA. -TA_FLAT_READ_LDS_WAVEFRONTS: - architectures: - gfx950: + - name: TA_FLAT_READ_LDS_WAVEFRONTS + description: Number of flat opcode reads for lds return processed by the TA. + properties: [] + definitions: + - architectures: + - gfx950 block: TA event: 71 - description: Number of flat opcode reads for lds return processed by the TA. -TA_BUFFER_COALESCEABLE_WAVEFRONTS: - architectures: - gfx950: + - name: TA_BUFFER_COALESCEABLE_WAVEFRONTS + description: Number of buffer coalesceable wavefronts processed by TA. + properties: [] + definitions: + - architectures: + - gfx950 block: TA event: 36 - description: Number of buffer coalesceable wavefronts processed by TA. -TA_FLAT_COALESCEABLE_WAVEFRONTS: - architectures: - gfx950: + - name: TA_FLAT_COALESCEABLE_WAVEFRONTS + description: Number of flat opcode coalesceale ops processed by the TA. + properties: [] + definitions: + - architectures: + - gfx950 block: TA event: 55 - description: Number of flat opcode coalesceale ops processed by the TA. -TA_FLAT_READ_LDS_WAVEFRONTS_sum: - architectures: - gfx950: + - name: TA_FLAT_READ_LDS_WAVEFRONTS_sum + description: Number of flat opcode reads for lds return processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TA_FLAT_READ_LDS_WAVEFRONTS, sum) - description: Number of flat opcode reads for lds return processed by the TA. Sum over TA instances. -TA_BUFFER_READ_LDS_WAVEFRONTS_sum: - architectures: - gfx950: + - name: TA_BUFFER_READ_LDS_WAVEFRONTS_sum + description: Number of buffer read wavefronts for lds return processed by TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TA_BUFFER_READ_LDS_WAVEFRONTS, sum) - description: Number of buffer read wavefronts for lds return processed by TA. Sum over TA instances. -TA_BUFFER_COALESCEABLE_WAVEFRONTS_sum: - architectures: - gfx950: + - name: TA_BUFFER_COALESCEABLE_WAVEFRONTS_sum + description: Number of buffer coalesceable wavefronts processed by TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TA_BUFFER_COALESCEABLE_WAVEFRONTS, sum) - description: Number of buffer coalesceable wavefronts processed by TA. Sum over TA instances. -TA_FLAT_COALESCEABLE_WAVEFRONTS_sum: - architectures: - gfx950: + - name: TA_FLAT_COALESCEABLE_WAVEFRONTS_sum + description: Number of flat opcode coalesceale ops processed by the TA. Sum over TA instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TA_FLAT_COALESCEABLE_WAVEFRONTS, sum) - description: Number of flat opcode coalesceale ops processed by the TA. Sum over TA instances. -# TCA block(The Texture Cache Arbiter) -TCA_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCA_BUSY + description: Number of cycles we have a request pending. Not windowable. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCA event: 2 - description: Number of cycles we have a request pending. Not windowable. -TCA_BUSY_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCA_BUSY_sum + description: Number of cycles we have a request pending. Sum over all TCA instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCA_BUSY,sum) - description: Number of cycles we have a request pending. Sum over all TCA instances. -TCA_CYCLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCA_CYCLE + description: Number of cycles. Not windowable. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCA event: 1 - description: Number of cycles. Not windowable. -TCA_CYCLE_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCA_CYCLE_sum + description: 'Number of cycles. Sum over all TCA instances ' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCA_CYCLE,sum) - description: 'Number of cycles. Sum over all TCA instances ' -# TCC Block (Texture Cache per Channel) -TCC_ALL_TC_OP_INV_EVICT: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_ALL_TC_OP_INV_EVICT + description: Number of evictions due to all TC_OP invalidate requests. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 80 - gfx950: + - architectures: + - gfx950 block: TCC event: 86 - description: Number of evictions due to all TC_OP invalidate requests. -TCC_ALL_TC_OP_INV_EVICT_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_ALL_TC_OP_INV_EVICT_sum + description: Number of evictions due to all TC_OP invalidate requests. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_ALL_TC_OP_INV_EVICT,sum) - description: Number of evictions due to all TC_OP invalidate requests. Sum over TCC instances. -TCC_ALL_TC_OP_WB_WRITEBACK: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_ALL_TC_OP_WB_WRITEBACK + description: Number of writebacks due to all TC_OP writeback requests. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 73 - gfx950: + - architectures: + - gfx950 block: TCC event: 79 - description: Number of writebacks due to all TC_OP writeback requests. -TCC_ALL_TC_OP_WB_WRITEBACK_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_ALL_TC_OP_WB_WRITEBACK_sum + description: Number of writebacks due to all TC_OP writeback requests. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_ALL_TC_OP_WB_WRITEBACK,sum) - description: Number of writebacks due to all TC_OP writeback requests. Sum over TCC instances. -TCC_ATOMIC: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_ATOMIC + description: Number of atomic requests of all types. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 14 - gfx950: + - architectures: + - gfx950 block: TCC event: 18 - description: Number of atomic requests of all types. -TCC_ATOMIC_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_ATOMIC_sum + description: Number of atomic requests of all types. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_ATOMIC,sum) - description: Number of atomic requests of all types. Sum over TCC instances. -TCC_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_BUSY + description: Number of cycles we have a request pending. Not windowable. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCC event: 2 - description: Number of cycles we have a request pending. Not windowable. -TCC_BUSY_avr: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_BUSY_avr + description: TCC_BUSY avr over all memory channels. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_BUSY,avr) - description: TCC_BUSY avr over all memory channels. -TCC_BUSY_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_BUSY_sum + description: Number of cycles we have a request pending. Not windowable. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_BUSY,sum) - description: Number of cycles we have a request pending. Not windowable. Sum over TCC instances. -TCC_CC_REQ: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_CC_REQ + description: The number of coherently cached requests. This is measured at the tag block. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 7 - gfx950: + - architectures: + - gfx950 block: TCC event: 11 - description: The number of coherently cached requests. This is measured at the tag block. -TCC_CC_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_CC_REQ_sum + description: The number of coherently cached requests. This is measured at the tag block. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_CC_REQ,sum) - description: The number of coherently cached requests. This is measured at the tag block. Sum over TCC - instances. -TCC_CYCLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_CYCLE + description: Number of cycles. Not windowable. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCC event: 1 - description: Number of cycles. Not windowable. -TCC_CYCLE_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_CYCLE_sum + description: Number of cycles. Not windowable. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_CYCLE,sum) - description: Number of cycles. Not windowable. Sum over TCC instances. -TCC_EA0_ATOMIC: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_ATOMIC + description: Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 36 - gfx950: + - architectures: + - gfx950 block: TCC event: 40 - description: Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests. -TCC_EA0_ATOMIC_LEVEL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_ATOMIC_LEVEL + description: The sum of the number of EA atomics in flight. This is primarily meant for measure average EA atomic latency. + Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 37 - gfx950: + - architectures: + - gfx950 block: TCC event: 41 - description: The sum of the number of EA atomics in flight. This is primarily meant for measure average - EA atomic latency. Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC. -TCC_EA0_ATOMIC_LEVEL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_ATOMIC_LEVEL_sum + description: The sum of the number of EA atomics in flight. This is primarily meant for measure average EA atomic latency. + Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_ATOMIC_LEVEL,sum) - description: The sum of the number of EA atomics in flight. This is primarily meant for measure average - EA atomic latency. Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC. - Sum over TCC instances. -TCC_EA0_ATOMIC_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_ATOMIC_sum + description: Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests. Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_ATOMIC,sum) - description: Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests. - Sum over TCC instances. -TCC_EA0_RDREQ: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ + description: Number of TCC/EA read requests (either 32-byte or 64-byte) + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 38 - gfx950: + - architectures: + - gfx950 block: TCC event: 42 - description: Number of TCC/EA read requests (either 32-byte or 64-byte) -TCC_EA0_RDREQ_32B: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_32B + description: Number of 32-byte TCC/EA read requests + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 39 - gfx950: + - architectures: + - gfx950 block: TCC event: 43 - description: Number of 32-byte TCC/EA read requests -TCC_EA0_RDREQ_32B_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_32B_sum + description: Number of 32-byte TCC/EA read requests Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_RDREQ_32B,sum) - description: Number of 32-byte TCC/EA read requests Sum over TCC instances. -TCC_EA0_RDREQ_DRAM: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_DRAM + description: Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC). + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 102 - gfx950: + - architectures: + - gfx950 block: TCC event: 108 - description: Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC). -TCC_EA0_RDREQ_DRAM_CREDIT_STALL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL + description: Number of cycles there was a stall because the read request interface was out of DRAM credits. Stalls occur + regardless of whether a read needed to be performed or not. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 43 - gfx950: + - architectures: + - gfx950 block: TCC event: 49 - description: Number of cycles there was a stall because the read request interface was out of DRAM credits. - Stalls occur regardless of whether a read needed to be performed or not. -TCC_EA0_RDREQ_DRAM_CREDIT_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL_sum + description: Number of cycles there was a stall because the read request interface was out of DRAM credits. Stalls occur + regardless of whether a read needed to be performed or not. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,sum) - description: Number of cycles there was a stall because the read request interface was out of DRAM credits. - Stalls occur regardless of whether a read needed to be performed or not. Sum over TCC instances. -TCC_EA0_RDREQ_DRAM_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_DRAM_sum + description: Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC). Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_RDREQ_DRAM,sum) - description: Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC). Sum - over TCC instances. -TCC_EA0_RDREQ_GMI_CREDIT_STALL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL + description: Number of cycles there was a stall because the read request interface was out of GMI credits. Stalls occur + regardless of whether a read needed to be performed or not. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 42 - gfx950: + - architectures: + - gfx950 block: TCC event: 48 - description: Number of cycles there was a stall because the read request interface was out of GMI credits. - Stalls occur regardless of whether a read needed to be performed or not. -TCC_EA0_RDREQ_GMI_CREDIT_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL_sum + description: Number of cycles there was a stall because the read request interface was out of GMI credits. Stalls occur + regardless of whether a read needed to be performed or not. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_RDREQ_GMI_CREDIT_STALL,sum) - description: Number of cycles there was a stall because the read request interface was out of GMI credits. - Stalls occur regardless of whether a read needed to be performed or not. Sum over TCC instances. -TCC_EA0_RDREQ_IO_CREDIT_STALL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL + description: Number of cycles there was a stall because the read request interface was out of IO credits. Stalls occur + regardless of whether a read needed to be performed or not. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 41 - gfx950: + - architectures: + - gfx950 block: TCC event: 47 - description: Number of cycles there was a stall because the read request interface was out of IO credits. - Stalls occur regardless of whether a read needed to be performed or not. -TCC_EA0_RDREQ_IO_CREDIT_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL_sum + description: Number of cycles there was a stall because the read request interface was out of IO credits. Stalls occur + regardless of whether a read needed to be performed or not. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_RDREQ_IO_CREDIT_STALL,sum) - description: Number of cycles there was a stall because the read request interface was out of IO credits. - Stalls occur regardless of whether a read needed to be performed or not. Sum over TCC instances. -TCC_EA0_RDREQ_LEVEL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_LEVEL + description: The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure average EA read + latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 44 - gfx950: + - architectures: + - gfx950 block: TCC event: 50 - description: The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure - average EA read latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ. -TCC_EA0_RDREQ_LEVEL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_LEVEL_sum + description: The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure average EA read + latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_RDREQ_LEVEL,sum) - description: The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure - average EA read latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ. - Sum over TCC instances. -TCC_EA0_RDREQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_RDREQ_sum + description: Number of TCC/EA read requests (either 32-byte or 64-byte) Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_RDREQ,sum) - description: Number of TCC/EA read requests (either 32-byte or 64-byte) Sum over TCC instances. -TCC_EA0_RD_UNCACHED_32B: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_RD_UNCACHED_32B + description: Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted as 2 + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 40 - gfx950: + - architectures: + - gfx950 block: TCC event: 46 - description: Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted - as 2 -TCC_EA0_RD_UNCACHED_32B_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_RD_UNCACHED_32B_sum + description: Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted as 2 Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_RD_UNCACHED_32B,sum) - description: Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted - as 2 Sum over TCC instances. -TCC_EA0_WRREQ: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ + description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Atomics may travel + over the same interface and are generally classified as write requests. This does not include probe commands. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 26 - gfx950: + - architectures: + - gfx950 block: TCC event: 30 - description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. - Atomics may travel over the same interface and are generally classified as write requests. This does - not include probe commands. -TCC_EA0_WRREQ_64B: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_64B + description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 27 - gfx950: + - architectures: + - gfx950 block: TCC event: 31 - description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. -TCC_EA0_WRREQ_64B_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_64B_sum + description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. Sum over + TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WRREQ_64B,sum) - description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. - Sum over TCC instances. -TCC_EA0_WRREQ_DRAM: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_DRAM + description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 103 - gfx950: + - architectures: + - gfx950 block: TCC event: 109 - description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). -TCC_EA0_WRREQ_DRAM_CREDIT_STALL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL + description: Number of cycles a EA write request was stalled because the interface was out of DRAM credits. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 33 - gfx950: + - architectures: + - gfx950 block: TCC event: 37 - description: Number of cycles a EA write request was stalled because the interface was out of DRAM credits. -TCC_EA0_WRREQ_DRAM_CREDIT_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL_sum + description: Number of cycles a EA write request was stalled because the interface was out of DRAM credits. Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,sum) - description: Number of cycles a EA write request was stalled because the interface was out of DRAM credits. - Sum over TCC instances. -TCC_EA0_WRREQ_DRAM_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_DRAM_sum + description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WRREQ_DRAM,sum) - description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). Sum - over TCC instances. -TCC_EA0_WRREQ_GMI_CREDIT_STALL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL + description: Number of cycles a EA write request was stalled because the interface was out of GMI credits. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 32 - gfx950: + - architectures: + - gfx950 block: TCC event: 36 - description: Number of cycles a EA write request was stalled because the interface was out of GMI credits. -TCC_EA0_WRREQ_GMI_CREDIT_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL_sum + description: Number of cycles a EA write request was stalled because the interface was out of GMI credits. Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WRREQ_GMI_CREDIT_STALL,sum) - description: Number of cycles a EA write request was stalled because the interface was out of GMI credits. - Sum over TCC instances. -TCC_EA0_WRREQ_IO_CREDIT_STALL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL + description: Number of cycles a EA write request was stalled because the interface was out of IO credits. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 31 - gfx950: + - architectures: + - gfx950 block: TCC event: 35 - description: Number of cycles a EA write request was stalled because the interface was out of IO credits. -TCC_EA0_WRREQ_IO_CREDIT_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL_sum + description: Number of cycles a EA write request was stalled because the interface was out of IO credits. Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WRREQ_IO_CREDIT_STALL,sum) - description: Number of cycles a EA write request was stalled because the interface was out of IO credits. - Sum over TCC instances. -TCC_EA0_WRREQ_LEVEL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_LEVEL + description: The sum of the number of EA write requests in flight. This is primarily meant for measure average EA write + latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 35 - gfx950: + - architectures: + - gfx950 block: TCC event: 39 - description: The sum of the number of EA write requests in flight. This is primarily meant for measure - average EA write latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ. -TCC_EA0_WRREQ_LEVEL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_LEVEL_sum + description: The sum of the number of EA write requests in flight. This is primarily meant for measure average EA write + latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WRREQ_LEVEL,sum) - description: The sum of the number of EA write requests in flight. This is primarily meant for measure - average EA write latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ. - Sum over TCC instances. -TCC_EA0_WRREQ_PROBE_COMMAND: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_PROBE_COMMAND + description: Number of probe commands going over the TC_EA_wrreq interface. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 28 - gfx950: + - architectures: + - gfx950 block: TCC event: 32 - description: Number of probe commands going over the TC_EA_wrreq interface. -TCC_EA0_WRREQ_STALL: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_STALL + description: Number of cycles a write request was stalled. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 30 - gfx950: + - architectures: + - gfx950 block: TCC event: 34 - description: Number of cycles a write request was stalled. -TCC_EA0_WRREQ_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_STALL_sum + description: Number of cycles a write request was stalled. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WRREQ_STALL,sum) - description: Number of cycles a write request was stalled. Sum over TCC instances. -TCC_EA0_WRREQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_WRREQ_sum + description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Atomics may travel + over the same interface and are generally classified as write requests. This does not include probe commands. Sum over + TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WRREQ,sum) - description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. - Atomics may travel over the same interface and are generally classified as write requests. This does - not include probe commands. Sum over TCC instances. -TCC_EA0_WR_UNCACHED_32B: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_EA0_WR_UNCACHED_32B + description: Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. Note that CC + mtypes can produce uncached requests, and those are included in this. A 64-byte request will be counted as 2 + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 29 - gfx950: + - architectures: + - gfx950 block: TCC event: 33 - description: Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. - Note that CC mtypes can produce uncached requests, and those are included in this. A 64-byte request - will be counted as 2 -TCC_EA0_WR_UNCACHED_32B_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_EA0_WR_UNCACHED_32B_sum + description: Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. Note that CC + mtypes can produce uncached requests, and those are included in this. A 64-byte request will be counted as 2. Sum over + TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WR_UNCACHED_32B,sum) - description: Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. - Note that CC mtypes can produce uncached requests, and those are included in this. A 64-byte request - will be counted as 2. Sum over TCC instances. -TCC_EA1_RDREQ: - architectures: - gfx906: + - name: TCC_EA1_RDREQ + description: Number of TCC/EA read requests (either 32-byte or 64-byte) + properties: [] + definitions: + - architectures: + - gfx906 block: TCC event: 267 - description: Number of TCC/EA read requests (either 32-byte or 64-byte) -TCC_EA1_RDREQ_32B: - architectures: - gfx906: + - name: TCC_EA1_RDREQ_32B + description: Number of 32-byte TCC/EA read requests + properties: [] + definitions: + - architectures: + - gfx906 block: TCC event: 268 - description: Number of 32-byte TCC/EA read requests -TCC_EA1_RDREQ_32B_sum: - architectures: - gfx906: + - name: TCC_EA1_RDREQ_32B_sum + description: Number of 32-byte TCC/EA read requests. Sum over TCC EA1s. + properties: [] + definitions: + - architectures: + - gfx906 expression: reduce(TCC_EA1_RDREQ_32B,sum) - description: Number of 32-byte TCC/EA read requests. Sum over TCC EA1s. -TCC_EA1_RDREQ_sum: - architectures: - gfx906: + - name: TCC_EA1_RDREQ_sum + description: Number of TCC/EA read requests (either 32-byte or 64-byte). Sum over TCC EA1s. + properties: [] + definitions: + - architectures: + - gfx906 expression: reduce(TCC_EA1_RDREQ,sum) - description: Number of TCC/EA read requests (either 32-byte or 64-byte). Sum over TCC EA1s. -TCC_EA1_WRREQ: - architectures: - gfx906: + - name: TCC_EA1_WRREQ + description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Atomics may travel + over the same interface and are generally classified as write requests. This does not include probe commands. + properties: [] + definitions: + - architectures: + - gfx906 block: TCC event: 256 - description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. - Atomics may travel over the same interface and are generally classified as write requests. This does - not include probe commands. -TCC_EA1_WRREQ_64B: - architectures: - gfx906: + - name: TCC_EA1_WRREQ_64B + description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. + properties: [] + definitions: + - architectures: + - gfx906 block: TCC event: 257 - description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. -TCC_EA1_WRREQ_64B_sum: - architectures: - gfx906: + - name: TCC_EA1_WRREQ_64B_sum + description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. Sum over + TCC EA1s. + properties: [] + definitions: + - architectures: + - gfx906 expression: reduce(TCC_EA1_WRREQ_64B,sum) - description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. - Sum over TCC EA1s. -TCC_EA1_WRREQ_STALL: - architectures: - gfx906: + - name: TCC_EA1_WRREQ_STALL + description: Number of cycles a write request was stalled. + properties: [] + definitions: + - architectures: + - gfx906 block: TCC event: 260 - description: Number of cycles a write request was stalled. -TCC_EA1_WRREQ_sum: - architectures: - gfx906: + - name: TCC_EA1_WRREQ_sum + description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Sum over TCC EA1s. + properties: [] + definitions: + - architectures: + - gfx906 expression: reduce(TCC_EA1_WRREQ,sum) - description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. - Sum over TCC EA1s. -TCC_EA_ATOMIC: - architectures: - gfx90a: + - name: TCC_EA_ATOMIC + description: Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 36 - description: Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests. -TCC_EA_ATOMIC_LEVEL: - architectures: - gfx90a: + - name: TCC_EA_ATOMIC_LEVEL + description: The sum of the number of EA atomics in flight. This is primarily meant for measure average EA atomic latency. + Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 37 - description: The sum of the number of EA atomics in flight. This is primarily meant for measure average - EA atomic latency. Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC. -TCC_EA_ATOMIC_LEVEL_sum: - architectures: - gfx90a: + - name: TCC_EA_ATOMIC_LEVEL_sum + description: The sum of the number of EA atomics in flight. This is primarily meant for measure average EA atomic latency. + Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_ATOMIC_LEVEL,sum) - description: The sum of the number of EA atomics in flight. This is primarily meant for measure average - EA atomic latency. Average atomic latency = TCC_PERF_SEL_EA_WRREQ_ATOMIC_LEVEL/TCC_PERF_SEL_EA_WRREQ_ATOMIC. - Sum over TCC instances. -TCC_EA_ATOMIC_sum: - architectures: - gfx90a: + - name: TCC_EA_ATOMIC_sum + description: Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests. Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_ATOMIC,sum) - description: Number of transactions going over the TC_EA_wrreq interface that are actually atomic requests. - Sum over TCC instances. -TCC_EA_RDREQ: - architectures: - gfx906/gfx900/gfx9: + - name: TCC_EA_RDREQ + description: Number of TCC/EA read requests (either 32-byte or 64-byte) + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: TCC event: 41 - gfx908/gfx90a: + - architectures: + - gfx908 + - gfx90a block: TCC event: 38 - description: Number of TCC/EA read requests (either 32-byte or 64-byte) -TCC_EA_RDREQ_32B: - architectures: - gfx906/gfx900/gfx9: + - name: TCC_EA_RDREQ_32B + description: Number of 32-byte TCC/EA read requests + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: TCC event: 42 - gfx908/gfx90a: + - architectures: + - gfx908 + - gfx90a block: TCC event: 39 - description: Number of 32-byte TCC/EA read requests -TCC_EA_RDREQ_32B_sum: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: TCC_EA_RDREQ_32B_sum + description: Number of 32-byte TCC/EA read requests. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: reduce(TCC_EA_RDREQ_32B,sum) - description: Number of 32-byte TCC/EA read requests. Sum over TCC instances. -TCC_EA_RDREQ_DRAM: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_DRAM + description: Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC). + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 102 - description: Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC). -TCC_EA_RDREQ_DRAM_CREDIT_STALL: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_DRAM_CREDIT_STALL + description: Number of cycles there was a stall because the read request interface was out of DRAM credits. Stalls occur + regardless of whether a read needed to be performed or not. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 43 - description: Number of cycles there was a stall because the read request interface was out of DRAM credits. - Stalls occur regardless of whether a read needed to be performed or not. -TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum + description: Number of cycles there was a stall because the read request interface was out of DRAM credits. Stalls occur + regardless of whether a read needed to be performed or not. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_RDREQ_DRAM_CREDIT_STALL,sum) - description: Number of cycles there was a stall because the read request interface was out of DRAM credits. - Stalls occur regardless of whether a read needed to be performed or not. Sum over TCC instances. -TCC_EA_RDREQ_DRAM_sum: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_DRAM_sum + description: Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC). Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_RDREQ_DRAM,sum) - description: Number of TCC/EA read requests (either 32-byte or 64-byte) destined for DRAM (MC). Sum - over TCC instances. -TCC_EA_RDREQ_GMI_CREDIT_STALL: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_GMI_CREDIT_STALL + description: Number of cycles there was a stall because the read request interface was out of GMI credits. Stalls occur + regardless of whether a read needed to be performed or not. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 42 - description: Number of cycles there was a stall because the read request interface was out of GMI credits. - Stalls occur regardless of whether a read needed to be performed or not. -TCC_EA_RDREQ_GMI_CREDIT_STALL_sum: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_GMI_CREDIT_STALL_sum + description: Number of cycles there was a stall because the read request interface was out of GMI credits. Stalls occur + regardless of whether a read needed to be performed or not. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_RDREQ_GMI_CREDIT_STALL,sum) - description: Number of cycles there was a stall because the read request interface was out of GMI credits. - Stalls occur regardless of whether a read needed to be performed or not. Sum over TCC instances. -TCC_EA_RDREQ_IO_CREDIT_STALL: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_IO_CREDIT_STALL + description: Number of cycles there was a stall because the read request interface was out of IO credits. Stalls occur + regardless of whether a read needed to be performed or not. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 41 - description: Number of cycles there was a stall because the read request interface was out of IO credits. - Stalls occur regardless of whether a read needed to be performed or not. -TCC_EA_RDREQ_IO_CREDIT_STALL_sum: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_IO_CREDIT_STALL_sum + description: Number of cycles there was a stall because the read request interface was out of IO credits. Stalls occur + regardless of whether a read needed to be performed or not. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_RDREQ_IO_CREDIT_STALL,sum) - description: Number of cycles there was a stall because the read request interface was out of IO credits. - Stalls occur regardless of whether a read needed to be performed or not. Sum over TCC instances. -TCC_EA_RDREQ_LEVEL: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_LEVEL + description: The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure average EA read + latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 44 - description: The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure - average EA read latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ. -TCC_EA_RDREQ_LEVEL_sum: - architectures: - gfx90a: + - name: TCC_EA_RDREQ_LEVEL_sum + description: The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure average EA read + latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_RDREQ_LEVEL,sum) - description: The sum of the number of TCC/EA read requests in flight. This is primarily meant for measure - average EA read latency. Average read latency = TCC_PERF_SEL_EA_RDREQ_LEVEL/TCC_PERF_SEL_EA_RDREQ. - Sum over TCC instances. -TCC_EA_RDREQ_sum: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: TCC_EA_RDREQ_sum + description: Number of TCC/EA read requests (either 32-byte or 64-byte). Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: reduce(TCC_EA_RDREQ,sum) - description: Number of TCC/EA read requests (either 32-byte or 64-byte). Sum over TCC instances. -TCC_EA_RD_UNCACHED_32B: - architectures: - gfx90a: + - name: TCC_EA_RD_UNCACHED_32B + description: Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted as 2 + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 40 - description: Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted - as 2 -TCC_EA_RD_UNCACHED_32B_sum: - architectures: - gfx90a: + - name: TCC_EA_RD_UNCACHED_32B_sum + description: Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted as 2 Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_RD_UNCACHED_32B,sum) - description: Number of 32-byte TCC/EA read due to uncached traffic. A 64-byte request will be counted - as 2 Sum over TCC instances. -TCC_EA_WRREQ: - architectures: - gfx906/gfx900/gfx9: + - name: TCC_EA_WRREQ + description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Atomics may travel + over the same interface and are generally classified as write requests. This does not include probe commands. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: TCC event: 29 - gfx908/gfx90a: + - architectures: + - gfx908 + - gfx90a block: TCC event: 26 - description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. - Atomics may travel over the same interface and are generally classified as write requests. This does - not include probe commands. -TCC_EA_WRREQ_64B: - architectures: - gfx906/gfx900/gfx9: + - name: TCC_EA_WRREQ_64B + description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: TCC event: 30 - gfx908/gfx90a: + - architectures: + - gfx908 + - gfx90a block: TCC event: 27 - description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. -TCC_EA_WRREQ_64B_sum: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: TCC_EA_WRREQ_64B_sum + description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. Sum over + TCC instances. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: reduce(TCC_EA_WRREQ_64B,sum) - description: Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq interface. - Sum over TCC instances. -TCC_EA_WRREQ_DRAM: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_DRAM + description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 103 - description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). -TCC_EA_WRREQ_DRAM_CREDIT_STALL: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_DRAM_CREDIT_STALL + description: Number of cycles a EA write request was stalled because the interface was out of DRAM credits. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 33 - description: Number of cycles a EA write request was stalled because the interface was out of DRAM credits. -TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum + description: Number of cycles a EA write request was stalled because the interface was out of DRAM credits. Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_WRREQ_DRAM_CREDIT_STALL,sum) - description: Number of cycles a EA write request was stalled because the interface was out of DRAM credits. - Sum over TCC instances. -TCC_EA_WRREQ_DRAM_sum: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_DRAM_sum + description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_WRREQ_DRAM,sum) - description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). Sum - over TCC instances. -TCC_EA_WRREQ_GMI_CREDIT_STALL: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_GMI_CREDIT_STALL + description: Number of cycles a EA write request was stalled because the interface was out of GMI credits. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 32 - description: Number of cycles a EA write request was stalled because the interface was out of GMI credits. -TCC_EA_WRREQ_GMI_CREDIT_STALL_sum: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_GMI_CREDIT_STALL_sum + description: Number of cycles a EA write request was stalled because the interface was out of GMI credits. Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_WRREQ_GMI_CREDIT_STALL,sum) - description: Number of cycles a EA write request was stalled because the interface was out of GMI credits. - Sum over TCC instances. -TCC_EA_WRREQ_IO_CREDIT_STALL: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_IO_CREDIT_STALL + description: Number of cycles a EA write request was stalled because the interface was out of IO credits. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 31 - description: Number of cycles a EA write request was stalled because the interface was out of IO credits. -TCC_EA_WRREQ_IO_CREDIT_STALL_sum: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_IO_CREDIT_STALL_sum + description: Number of cycles a EA write request was stalled because the interface was out of IO credits. Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_WRREQ_IO_CREDIT_STALL,sum) - description: Number of cycles a EA write request was stalled because the interface was out of IO credits. - Sum over TCC instances. -TCC_EA_WRREQ_LEVEL: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_LEVEL + description: The sum of the number of EA write requests in flight. This is primarily meant for measure average EA write + latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ. + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 35 - description: The sum of the number of EA write requests in flight. This is primarily meant for measure - average EA write latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ. -TCC_EA_WRREQ_LEVEL_sum: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_LEVEL_sum + description: The sum of the number of EA write requests in flight. This is primarily meant for measure average EA write + latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_WRREQ_LEVEL,sum) - description: The sum of the number of EA write requests in flight. This is primarily meant for measure - average EA write latency. Average write latency = TCC_PERF_SEL_EA_WRREQ_LEVEL/TCC_PERF_SEL_EA_WRREQ. - Sum over TCC instances. -TCC_EA_WRREQ_STALL: - architectures: - gfx906/gfx900/gfx9: + - name: TCC_EA_WRREQ_STALL + description: Number of cycles a write request was stalled. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: TCC event: 33 - gfx908/gfx90a: + - architectures: + - gfx908 + - gfx90a block: TCC event: 30 - description: Number of cycles a write request was stalled. -TCC_EA_WRREQ_STALL_sum: - architectures: - gfx90a: + - name: TCC_EA_WRREQ_STALL_sum + description: Number of cycles a write request was stalled. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_WRREQ_STALL,sum) - description: Number of cycles a write request was stalled. Sum over TCC instances. -TCC_EA_WRREQ_sum: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: TCC_EA_WRREQ_sum + description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: reduce(TCC_EA_WRREQ,sum) - description: Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. - Sum over TCC instances. -TCC_EA_WR_UNCACHED_32B: - architectures: - gfx90a: + - name: TCC_EA_WR_UNCACHED_32B + description: Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. Note that CC + mtypes can produce uncached requests, and those are included in this. A 64-byte request will be counted as 2 + properties: [] + definitions: + - architectures: + - gfx90a block: TCC event: 29 - description: Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. - Note that CC mtypes can produce uncached requests, and those are included in this. A 64-byte request - will be counted as 2 -TCC_EA_WR_UNCACHED_32B_sum: - architectures: - gfx90a: + - name: TCC_EA_WR_UNCACHED_32B_sum + description: Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. Note that CC + mtypes can produce uncached requests, and those are included in this. A 64-byte request will be counted as 2. Sum over + TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a expression: reduce(TCC_EA_WR_UNCACHED_32B,sum) - description: Number of 32-byte write/atomic going over the TC_EA_wrreq interface due to uncached traffic. - Note that CC mtypes can produce uncached requests, and those are included in this. A 64-byte request - will be counted as 2. Sum over TCC instances. -TCC_HIT: - architectures: - gfx906/gfx900/gfx9: + - name: TCC_HIT + description: Number of cache hits. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: TCC event: 20 - gfx942/gfx941/gfx940/gfx908/gfx90a: + - architectures: + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 17 - gfx950: + - architectures: + - gfx950 block: TCC event: 21 - description: Number of cache hits. -TCC_HIT_sum: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: TCC_HIT_sum + description: Number of cache hits. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_HIT,sum) - description: Number of cache hits. Sum over TCC instances. -TCC_INTERNAL_PROBE: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_INTERNAL_PROBE + description: Number of self-probes spawned by TCC for CC writes/atomic operations. Not windowable. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 11 - gfx950: + - architectures: + - gfx950 block: TCC event: 15 - description: Number of self-probes spawned by TCC for CC writes/atomic operations. Not windowable. -TCC_MISS: - architectures: - gfx906/gfx900/gfx9: + - name: TCC_MISS + description: Number of cache misses. UC reads count as misses. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 block: TCC event: 22 - gfx942/gfx941/gfx940/gfx908/gfx90a: + - architectures: + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 19 - gfx950: + - architectures: + - gfx950 block: TCC event: 23 - description: Number of cache misses. UC reads count as misses. -TCC_MISS_sum: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: TCC_MISS_sum + description: Number of cache misses. UC reads count as misses. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_MISS,sum) - description: Number of cache misses. UC reads count as misses. Sum over TCC instances. -TCC_NC_REQ: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_NC_REQ + description: The number of noncoherently cached requests. This is measured at the tag block. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 5 - gfx950: + - architectures: + - gfx950 block: TCC event: 9 - description: The number of noncoherently cached requests. This is measured at the tag block. -TCC_NC_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_NC_REQ_sum + description: The number of noncoherently cached requests. This is measured at the tag block. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_NC_REQ,sum) - description: The number of noncoherently cached requests. This is measured at the tag block. Sum over - TCC instances. -TCC_NORMAL_EVICT: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_NORMAL_EVICT + description: Number of evictions due to requests that are not invalidate or probe requests. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 74 - gfx950: + - architectures: + - gfx950 block: TCC event: 80 - description: Number of evictions due to requests that are not invalidate or probe requests. -TCC_NORMAL_EVICT_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_NORMAL_EVICT_sum + description: Number of evictions due to requests that are not invalidate or probe requests. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_NORMAL_EVICT,sum) - description: Number of evictions due to requests that are not invalidate or probe requests. Sum over - TCC instances. -TCC_NORMAL_WRITEBACK: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_NORMAL_WRITEBACK + description: Number of writebacks due to requests that are not writeback requests. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 68 - gfx950: + - architectures: + - gfx950 block: TCC event: 74 - description: Number of writebacks due to requests that are not writeback requests. -TCC_NORMAL_WRITEBACK_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_NORMAL_WRITEBACK_sum + description: Number of writebacks due to requests that are not writeback requests. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_NORMAL_WRITEBACK,sum) - description: Number of writebacks due to requests that are not writeback requests. Sum over TCC instances. -TCC_PROBE: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_PROBE + description: Number of probe requests. Not windowable. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 9 - gfx950: + - architectures: + - gfx950 block: TCC event: 13 - description: Number of probe requests. Not windowable. -TCC_PROBE_ALL: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_PROBE_ALL + description: Number of external probe requests with with EA_TCC_preq_all== 1. Not windowable. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 10 - gfx950: + - architectures: + - gfx950 block: TCC event: 14 - description: Number of external probe requests with with EA_TCC_preq_all== 1. Not windowable. -TCC_PROBE_ALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_PROBE_ALL_sum + description: Number of external probe requests with with EA_TCC_preq_all== 1. Not windowable. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_PROBE_ALL,sum) - description: Number of external probe requests with with EA_TCC_preq_all== 1. Not windowable. Sum over - TCC instances. -TCC_PROBE_EVICT: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_PROBE_EVICT + description: Number of evictions/invalidations due to probes. Not windowable. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 81 - gfx950: + - architectures: + - gfx950 block: TCC event: 87 - description: Number of evictions/invalidations due to probes. Not windowable. -TCC_PROBE_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_PROBE_sum + description: Number of probe requests. Not windowable. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_PROBE,sum) - description: Number of probe requests. Not windowable. Sum over TCC instances. -TCC_READ: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_READ + description: Number of read requests. Compressed reads are included in this, but metadata reads are not included. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 12 - gfx950: + - architectures: + - gfx950 block: TCC event: 16 - description: Number of read requests. Compressed reads are included in this, but metadata reads are - not included. -TCC_READ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_READ_sum + description: Number of read requests. Compressed reads are included in this, but metadata reads are not included. Sum + over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_READ,sum) - description: Number of read requests. Compressed reads are included in this, but metadata reads are - not included. Sum over TCC instances. -TCC_REQ: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_REQ + description: Number of requests of all types. This is measured at the tag block. This may be more than the number of requests + arriving at the TCC, but it is a good indication of the total amount of work that needs to be performed. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 3 - gfx950: + - architectures: + - gfx950 block: TCC event: 6 - description: Number of requests of all types. This is measured at the tag block. This may be more than - the number of requests arriving at the TCC, but it is a good indication of the total amount of work - that needs to be performed. -TCC_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_REQ_sum + description: Number of requests of all types. This is measured at the tag block. This may be more than the number of requests + arriving at the TCC, but it is a good indication of the total amount of work that needs to be performed. Sum over TCC + instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_REQ,sum) - description: Number of requests of all types. This is measured at the tag block. This may be more than - the number of requests arriving at the TCC, but it is a good indication of the total amount of work - that needs to be performed. Sum over TCC instances. -TCC_RW_REQ: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_RW_REQ + description: The number of RW requests. This is measured at the tag block. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 8 - gfx950: + - architectures: + - gfx950 block: TCC event: 12 - description: The number of RW requests. This is measured at the tag block. -TCC_RW_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_RW_REQ_sum + description: The number of RW requests. This is measured at the tag block. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_RW_REQ,sum) - description: The number of RW requests. This is measured at the tag block. Sum over TCC instances. -TCC_STREAMING_REQ: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_STREAMING_REQ + description: Number of streaming requests. This is measured at the tag block. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 4 - gfx950: + - architectures: + - gfx950 block: TCC event: 7 - description: Number of streaming requests. This is measured at the tag block. -TCC_STREAMING_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_STREAMING_REQ_sum + description: Number of streaming requests. This is measured at the tag block. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_STREAMING_REQ,sum) - description: Number of streaming requests. This is measured at the tag block. Sum over TCC instances. -TCC_TAG_STALL: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_TAG_STALL + description: Number of cycles the normal request pipeline in the tag was stalled for any reason. Normally, stalls of this + nature are measured exactly from one point the pipeline, but that is not the case for this counter. Probes can stall + the pipeline at a variety of places, and there is no single point that can reasonably measure the total stalls accurately. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 45 - gfx950: + - architectures: + - gfx950 block: TCC event: 51 - description: Number of cycles the normal request pipeline in the tag was stalled for any reason. Normally, - stalls of this nature are measured exactly from one point the pipeline, but that is not the case for - this counter. Probes can stall the pipeline at a variety of places, and there is no single point that - can reasonably measure the total stalls accurately. -TCC_TAG_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_TAG_STALL_sum + description: Total number of cycles the normal request pipeline in the tag is stalled for any reason. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_TAG_STALL,sum) - description: Total number of cycles the normal request pipeline in the tag is stalled for any reason. -TCC_TOO_MANY_EA_WRREQS_STALL: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_TOO_MANY_EA_WRREQS_STALL + description: Number of cycles the TCC could not send a EA write request because it already reached its maximum number + of pending EA write requests. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 34 - gfx950: + - architectures: + - gfx950 block: TCC event: 38 - description: Number of cycles the TCC could not send a EA write request because it already reached its - maximum number of pending EA write requests. -TCC_TOO_MANY_EA_WRREQS_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_TOO_MANY_EA_WRREQS_STALL_sum + description: Number of cycles the TCC could not send a EA write request because it already reached its maximum number + of pending EA write requests. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_TOO_MANY_EA_WRREQS_STALL,sum) - description: Number of cycles the TCC could not send a EA write request because it already reached its - maximum number of pending EA write requests. Sum over TCC instances. -TCC_UC_REQ: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_UC_REQ + description: The number of uncached requests. This is measured at the tag block. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 6 - gfx950: + - architectures: + - gfx950 block: TCC event: 10 - description: The number of uncached requests. This is measured at the tag block. -TCC_UC_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_UC_REQ_sum + description: The number of uncached requests. This is measured at the tag block. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_UC_REQ,sum) - description: The number of uncached requests. This is measured at the tag block. Sum over TCC instances. -TCC_WRITE: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_WRITE + description: Number of write requests. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 13 - gfx950: + - architectures: + - gfx950 block: TCC event: 17 - description: Number of write requests. -TCC_WRITEBACK: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCC_WRITEBACK + description: Number of lines written back to main memory. This includes writebacks of dirty lines and uncached write/atomic + requests. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCC event: 22 - gfx950: + - architectures: + - gfx950 block: TCC event: 26 - description: Number of lines written back to main memory. This includes writebacks of dirty lines and - uncached write/atomic requests. -TCC_WRITEBACK_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_WRITEBACK_sum + description: Number of lines written back to main memory. This includes writebacks of dirty lines and uncached write/atomic + requests. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_WRITEBACK,sum) - description: Number of lines written back to main memory. This includes writebacks of dirty lines and - uncached write/atomic requests. Sum over TCC instances. -TCC_WRITE_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCC_WRITE_sum + description: Number of write requests. Sum over TCC instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_WRITE,sum) - description: Number of write requests. Sum over TCC instances. -TCC_WRREQ1_STALL_max: - architectures: - gfx906: + - name: TCC_WRREQ1_STALL_max + description: Number of cycles a write request was stalled. Max over TCC instances. + properties: [] + definitions: + - architectures: + - gfx906 expression: reduce(TCC_EA1_WRREQ_STALL,max) - description: Number of cycles a write request was stalled. Max over TCC instances. -TCC_WRREQ_STALL_max: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: TCC_WRREQ_STALL_max + description: Number of cycles a write request was stalled. Max over TCC instances. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: reduce(TCC_EA_WRREQ_STALL,max) - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_EA0_WRREQ_STALL,max) - description: Number of cycles a write request was stalled. Max over TCC instances. -TCC_BUBBLE: - architectures: - gfx942/gfx941/gfx940: + - name: TCC_BUBBLE + description: Number of 128-byte read requests sent to EA. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCC event: 56 - gfx950: + - architectures: + - gfx950 block: TCC event: 62 - description: Number of 128-byte read requests sent to EA. -TCC_BUBBLE_sum: - architectures: - gfx950/gfx942/gfx941/gfx940: + - name: TCC_BUBBLE_sum + description: Number of 128-byte read requests sent to EA. Sum over all TCC instances. + properties: [] + definitions: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCC_BUBBLE,sum) - description: Number of 128-byte read requests sent to EA. Sum over all TCC instances. -TCC_EA0_RDREQ_DRAM_32B: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_DRAM_32B + description: Number of 32-byte TCC/EA read requests due to DRAM traffic, 1 64-byte request will be counted to 2, 128-byte + as 4. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 112 - description: Number of 32-byte TCC/EA read requests due to DRAM traffic, 1 64-byte request will be counted to 2, 128-byte as 4. -TCC_EA0_RDREQ_GMI_32B: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_GMI_32B + description: Number of 32-byte TCC/EA read requests due to GMI traffic, 1 64-byte request will be counted to 2, 128-byte + as 4. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 113 - description: Number of 32-byte TCC/EA read requests due to GMI traffic, 1 64-byte request will be counted to 2, 128-byte as 4. -TCC_EA0_RDREQ_IO_32B: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_IO_32B + description: Number of 32-byte TCC/EA read requests due to IO traffic, 1 64-byte request will be counted to 2, 128-byte + as 4. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 114 - description: Number of 32-byte TCC/EA read requests due to IO traffic, 1 64-byte request will be counted to 2, 128-byte as 4. -TCC_EA0_WRREQ_WRITE_DRAM_32B: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_DRAM_32B + description: Number of 32-byte TCC/EA write requests due to DRAM traffic, 1 64-byte request will be counted to 2. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 115 - description: Number of 32-byte TCC/EA write requests due to DRAM traffic, 1 64-byte request will be counted to 2. -TCC_EA0_WRREQ_WRITE_ATOMIC_32B: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_ATOMIC_32B + description: Number of 32-byte TCC/EA atomic requests due to DRAM traffic, 1 64-byte request will be counted to 2. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 116 - description: Number of 32-byte TCC/EA atomic requests due to DRAM traffic, 1 64-byte request will be counted to 2. -TCC_EA0_WRREQ_WRITE_GMI_32B: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_GMI_32B + description: Number of 32-byte TCC/EA write requests due to GMI traffic, 1 64-byte request will be counted to 2. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 117 - description: Number of 32-byte TCC/EA write requests due to GMI traffic, 1 64-byte request will be counted to 2. -TCC_EA0_WRREQ_ATOMIC_GMI_32B: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_ATOMIC_GMI_32B + description: Number of 32-byte TCC/EA atomic requests due to GMI traffic, 1 64-byte request will be counted to 2. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 118 - description: Number of 32-byte TCC/EA atomic requests due to GMI traffic, 1 64-byte request will be counted to 2. -TCC_EA0_WRREQ_WRITE_IO_32B: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_IO_32B + description: Number of 32-byte TCC/EA write requests due to IO traffic, 1 64-byte request will be counted to 2. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 119 - description: Number of 32-byte TCC/EA write requests due to IO traffic, 1 64-byte request will be counted to 2. -TCC_EA0_WRREQ_ATOMIC_IO_32B: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_ATOMIC_IO_32B + description: Number of 32-byte TCC/EA atomic requests due to IO traffic, 1 64-byte request will be counted to 2. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 120 - description: Number of 32-byte TCC/EA atomic requests due to IO traffic, 1 64-byte request will be counted to 2. -TCC_READ_SECTORS: - architectures: - gfx950: + - name: TCC_READ_SECTORS + description: Total number of 32B data sectors in read requests + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 3 - description: Total number of 32B data sectors in read requests -TCC_WRITE_SECTORS: - architectures: - gfx950: + - name: TCC_WRITE_SECTORS + description: Total number of 32B data sectors in write requests + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 4 - description: Total number of 32B data sectors in write requests -TCC_ATOMIC_SECTORS: - architectures: - gfx950: + - name: TCC_ATOMIC_SECTORS + description: Total number of 32B data sectors in atomic requests + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 5 - description: Total number of 32B data sectors in atomic requests -TCC_BYPASS_REQ: - architectures: - gfx950: + - name: TCC_BYPASS_REQ + description: Number of bypass requests. This is measured at the tag block. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 8 - description: Number of bypass requests. This is measured at the tag block. -TCC_LATENCY_FIFO_FULL: - architectures: - gfx950: + - name: TCC_LATENCY_FIFO_FULL + description: Number of cycles the latency fifo was full. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 27 - description: Number of cycles the latency fifo was full. -TCC_SRC_FIFO_FULL: - architectures: - gfx950: + - name: TCC_SRC_FIFO_FULL + description: Number of cycles the src fifo was expected to be full as measured at the IB block. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 28 - description: Number of cycles the src fifo was expected to be full as measured at the IB block. -TCC_EA0_RDREQ_64B: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_64B + description: Number of 64-byte TCC/EA read requests + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 44 - description: Number of 64-byte TCC/EA read requests -TCC_EA0_RDREQ_128B: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_128B + description: Number of 128-byte TCC/EA read requests + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 45 - description: Number of 128-byte TCC/EA read requests -TCC_IB_REQ: - architectures: - gfx950: + - name: TCC_IB_REQ + description: Number of requests through the IB. This measures the raw request count from graphics clients going to this + TCC. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 67 - description: Number of requests through the IB. This measures the raw request count from graphics clients going to this TCC. -TCC_IB_STALL: - architectures: - gfx950: + - name: TCC_IB_STALL + description: Number of cycles the IB output was stalled. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 68 - description: Number of cycles the IB output was stalled. -TCC_EA0_WRREQ_ATOMIC_DRAM: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_ATOMIC_DRAM + description: Number of TCC/EA atomic requests (either 32-byte of 64-byte) destined for DRAM (MC). + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 111 - description: Number of TCC/EA atomic requests (either 32-byte of 64-byte) destined for DRAM (MC). -TCC_EA0_WRREQ_WRITE_DRAM: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_DRAM + description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 110 - description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). -TCC_EA0_WRREQ_ATOMIC_DRAM_32B: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_ATOMIC_DRAM_32B + description: Number of 32-byte TCC/EA atomic requests due to DRAM traffic, 1 64-byte request will be counted to 2. + properties: [] + definitions: + - architectures: + - gfx950 block: TCC event: 116 - description: Number of 32-byte TCC/EA atomic requests due to DRAM traffic, 1 64-byte request will be counted to 2. -TCC_EA0_RDREQ_64B_sum: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_64B_sum + description: Number of 64-byte TCC/EA read requests. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_RDREQ_64B,sum) - description: Number of 64-byte TCC/EA read requests. Sum over TCP instances. -TCC_EA0_RDREQ_128B_sum: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_128B_sum + description: Number of 128-byte TCC/EA read requests. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_RDREQ_128B,sum) - description: Number of 128-byte TCC/EA read requests. Sum over TCP instances. -TCC_READ_SECTORS_sum: - architectures: - gfx950: + - name: TCC_READ_SECTORS_sum + description: Total number of 32B data sectors in read requests. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_READ_SECTORS,sum) - description: Total number of 32B data sectors in read requests. Sum over TCP instances. -TCC_WRITE_SECTORS_sum: - architectures: - gfx950: + - name: TCC_WRITE_SECTORS_sum + description: Total number of 32B data sectors in write requests. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_WRITE_SECTORS,sum) - description: Total number of 32B data sectors in write requests. Sum over TCP instances. -TCC_ATOMIC_SECTORS_sum: - architectures: - gfx950: + - name: TCC_ATOMIC_SECTORS_sum + description: Total number of 32B data sectors in atomic requests. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_ATOMIC_SECTORS,sum) - description: Total number of 32B data sectors in atomic requests. Sum over TCP instances. -TCC_BYPASS_REQ_sum: - architectures: - gfx950: + - name: TCC_BYPASS_REQ_sum + description: Number of bypass requests. This is measured at the tag block. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_BYPASS_REQ,sum) - description: Number of bypass requests. This is measured at the tag block. Sum over TCP instances. -TCC_IB_REQ_sum: - architectures: - gfx950: + - name: TCC_IB_REQ_sum + description: Number of requests through the IB. This measures the raw request count from graphics clients going to this + TCC. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_IB_REQ,sum) - description: Number of requests through the IB. This measures the raw request count from graphics clients going to this TCC. Sum over TCP instances. -TCC_LATENCY_FIFO_FULL_sum: - architectures: - gfx950: + - name: TCC_LATENCY_FIFO_FULL_sum + description: Number of cycles the latency fifo was full. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_LATENCY_FIFO_FULL,sum) - description: Number of cycles the latency fifo was full. Sum over TCP instances. -TCC_SRC_FIFO_FULL_sum: - architectures: - gfx950: + - name: TCC_SRC_FIFO_FULL_sum + description: Number of cycles the src fifo was expected to be full as measured at the IB block. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_SRC_FIFO_FULL,sum) - description: Number of cycles the src fifo was expected to be full as measured at the IB block. Sum over TCP instances. -TCC_IB_STALL_sum: - architectures: - gfx950: + - name: TCC_IB_STALL_sum + description: Number of cycles the IB output was stalled. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_IB_STALL,sum) - description: Number of cycles the IB output was stalled. Sum over TCP instances. -TCC_EA0_WRREQ_WRITE_DRAM_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_DRAM_32B_sum + description: Number of 32-byte TCC/EA write requests due to DRAM traffic, 1 64-byte request will be counted to 2. Sum + over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_WRREQ_WRITE_DRAM_32B,sum) - description: Number of 32-byte TCC/EA write requests due to DRAM traffic, 1 64-byte request will be counted to 2. Sum over TCP instances. -TCC_EA0_WRREQ_WRITE_DRAM_sum: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_DRAM_sum + description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_WRREQ_WRITE_DRAM,sum) - description: Number of TCC/EA write requests (either 32-byte of 64-byte) destined for DRAM (MC). Sum over TCP instances. -TCC_EA0_WRREQ_WRITE_ATOMIC_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_ATOMIC_32B_sum + description: Number of 32-byte TCC/EA atomic requests due to DRAM traffic, 1 64-byte request will be counted to 2. Sum + over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_WRREQ_WRITE_ATOMIC_32B,sum) - description: Number of 32-byte TCC/EA atomic requests due to DRAM traffic, 1 64-byte request will be counted to 2. Sum over TCP instances. -TCC_EA0_WRREQ_WRITE_GMI_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_GMI_32B_sum + description: Number of 32-byte TCC/EA write requests due to GMI traffic, 1 64-byte request will be counted to 2. Sum over + TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_WRREQ_WRITE_GMI_32B,sum) - description: Number of 32-byte TCC/EA write requests due to GMI traffic, 1 64-byte request will be counted to 2. Sum over TCP instances. -TCC_EA0_WRREQ_ATOMIC_GMI_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_ATOMIC_GMI_32B_sum + description: Number of 32-byte TCC/EA atomic requests due to GMI traffic, 1 64-byte request will be counted to 2. Sum + over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_WRREQ_ATOMIC_GMI_32B,sum) - description: Number of 32-byte TCC/EA atomic requests due to GMI traffic, 1 64-byte request will be counted to 2. Sum over TCP instances. -TCC_EA0_WRREQ_WRITE_IO_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_WRITE_IO_32B_sum + description: Number of 32-byte TCC/EA write requests due to IO traffic, 1 64-byte request will be counted to 2. Sum over + TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_WRREQ_WRITE_IO_32B,sum) - description: Number of 32-byte TCC/EA write requests due to IO traffic, 1 64-byte request will be counted to 2. Sum over TCP instances. -TCC_EA0_WRREQ_ATOMIC_DRAM_sum: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_ATOMIC_DRAM_sum + description: Number of TCC/EA atomic requests (either 32-byte of 64-byte) destined for DRAM (MC). Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_WRREQ_ATOMIC_DRAM,sum) - description: Number of TCC/EA atomic requests (either 32-byte of 64-byte) destined for DRAM (MC). Sum over TCP instances. -TCC_EA0_WRREQ_ATOMIC_IO_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_ATOMIC_IO_32B_sum + description: Number of 32-byte TCC/EA atomic requests due to IO traffic, 1 64-byte request will be counted to 2. Sum over + TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_WRREQ_ATOMIC_IO_32B,sum) - description: Number of 32-byte TCC/EA atomic requests due to IO traffic, 1 64-byte request will be counted to 2. Sum over TCP instances. -TCC_EA0_WRREQ_ATOMIC_DRAM_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_WRREQ_ATOMIC_DRAM_32B_sum + description: Number of 32-byte TCC/EA atomic requests due to DRAM traffic, 1 64-byte request will be counted to 2. Sum + over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_WRREQ_ATOMIC_DRAM_32B,sum) - description: Number of 32-byte TCC/EA atomic requests due to DRAM traffic, 1 64-byte request will be counted to 2. Sum over TCP instances. -TCC_EA0_RDREQ_IO_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_IO_32B_sum + description: Number of 32-byte TCC/EA read requests due to IO traffic, 1 64-byte request will be counted to 2, 128-byte + as 4. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_RDREQ_IO_32B,sum) - description: Number of 32-byte TCC/EA read requests due to IO traffic, 1 64-byte request will be counted to 2, 128-byte as 4. Sum over TCP instances. -TCC_EA0_RDREQ_GMI_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_GMI_32B_sum + description: Number of 32-byte TCC/EA read requests due to GMI traffic, 1 64-byte request will be counted to 2, 128-byte + as 4. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_RDREQ_GMI_32B,sum) - description: Number of 32-byte TCC/EA read requests due to GMI traffic, 1 64-byte request will be counted to 2, 128-byte as 4. Sum over TCP instances. -TCC_EA0_RDREQ_DRAM_32B_sum: - architectures: - gfx950: + - name: TCC_EA0_RDREQ_DRAM_32B_sum + description: Number of 32-byte TCC/EA read requests due to DRAM traffic, 1 64-byte request will be counted to 2, 128-byte + as 4. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCC_EA0_RDREQ_DRAM_32B,sum) - description: Number of 32-byte TCC/EA read requests due to DRAM traffic, 1 64-byte request will be counted to 2, 128-byte as 4. Sum over TCP instances. -# TCP Block (Texture Cache per Pipe) -TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES: - architectures: - gfx90a: + - name: TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES + description: Tagram conflict stall on an atomic + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 13 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 12 - description: Tagram conflict stall on an atomic -TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum + description: Tagram conflict stall on an atomic. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES,sum) - description: Tagram conflict stall on an atomic. Sum over TCP instances. -TCP_GATE_EN1: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_GATE_EN1 + description: TCP interface clocks are turned on. Not Windowed. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 0 - description: TCP interface clocks are turned on. Not Windowed. -TCP_GATE_EN1_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_GATE_EN1_sum + description: TCP interface clocks are turned on. Not Windowed. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_GATE_EN1,sum) - description: TCP interface clocks are turned on. Not Windowed. Sum over TCP instances. -TCP_GATE_EN2: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_GATE_EN2 + description: TCP core clocks are turned on. Not Windowed. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 1 - description: TCP core clocks are turned on. Not Windowed. -TCP_GATE_EN2_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_GATE_EN2_sum + description: TCP core clocks are turned on. Not Windowed. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_GATE_EN2,sum) - description: TCP core clocks are turned on. Not Windowed. Sum over TCP instances. -TCP_PENDING_STALL_CYCLES: - architectures: - gfx90a: + - name: TCP_PENDING_STALL_CYCLES + description: Stall due to data pending from L2 + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 22 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 21 - description: Stall due to data pending from L2 -TCP_PENDING_STALL_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_PENDING_STALL_CYCLES_sum + description: Stall due to data pending from L2. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_PENDING_STALL_CYCLES,sum) - description: Stall due to data pending from L2. Sum over TCP instances. -TCP_READ_TAGCONFLICT_STALL_CYCLES: - architectures: - gfx90a: + - name: TCP_READ_TAGCONFLICT_STALL_CYCLES + description: Tagram conflict stall on a read + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 11 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 10 - description: Tagram conflict stall on a read -TCP_READ_TAGCONFLICT_STALL_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_READ_TAGCONFLICT_STALL_CYCLES_sum + description: Tagram conflict stall on a read. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_READ_TAGCONFLICT_STALL_CYCLES,sum) - description: Tagram conflict stall on a read. Sum over TCP instances. -TCP_TA_TCP_STATE_READ: - architectures: - gfx90a: + - name: TCP_TA_TCP_STATE_READ + description: Number of state reads + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 27 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 25 - description: Number of state reads -TCP_TA_TCP_STATE_READ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TA_TCP_STATE_READ_sum + description: Number of state reads Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TA_TCP_STATE_READ,sum) - description: Number of state reads Sum over TCP instances. -TCP_TCC_ATOMIC_WITHOUT_RET_REQ: - architectures: - gfx90a: + - name: TCP_TCC_ATOMIC_WITHOUT_RET_REQ + description: Total atomic without return requests from TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 72 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 68 - gfx950: + - architectures: + - gfx950 block: TCP event: 71 - description: Total atomic without return requests from TCP to all TCCs -TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + description: Total atomic without return requests from TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_ATOMIC_WITHOUT_RET_REQ,sum) - description: Total atomic without return requests from TCP to all TCCs Sum over TCP instances. -TCP_TCC_ATOMIC_WITH_RET_REQ: - architectures: - gfx90a: + - name: TCP_TCC_ATOMIC_WITH_RET_REQ + description: Total atomic with return requests from TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 71 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 67 - gfx950: + - architectures: + - gfx950 block: TCP event: 70 - description: Total atomic with return requests from TCP to all TCCs -TCP_TCC_ATOMIC_WITH_RET_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_ATOMIC_WITH_RET_REQ_sum + description: Total atomic with return requests from TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_ATOMIC_WITH_RET_REQ,sum) - description: Total atomic with return requests from TCP to all TCCs Sum over TCP instances. -TCP_TCC_CC_ATOMIC_REQ: - architectures: - gfx90a: + - name: TCP_TCC_CC_ATOMIC_REQ + description: Total atomic requests with CC mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 83 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 79 - gfx950: + - architectures: + - gfx950 block: TCP event: 82 - description: Total atomic requests with CC mtype from this TCP to all TCCs -TCP_TCC_CC_ATOMIC_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_CC_ATOMIC_REQ_sum + description: Total atomic requests with CC mtype from this TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_CC_ATOMIC_REQ,sum) - description: Total atomic requests with CC mtype from this TCP to all TCCs Sum over TCP instances. -TCP_TCC_CC_READ_REQ: - architectures: - gfx90a: + - name: TCP_TCC_CC_READ_REQ + description: Total write requests with CC mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 81 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 77 - gfx950: + - architectures: + - gfx950 block: TCP event: 80 - description: Total write requests with CC mtype from this TCP to all TCCs -TCP_TCC_CC_READ_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_CC_READ_REQ_sum + description: Total write requests with CC mtype from this TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_CC_READ_REQ,sum) - description: Total write requests with CC mtype from this TCP to all TCCs Sum over TCP instances. -TCP_TCC_CC_WRITE_REQ: - architectures: - gfx90a: + - name: TCP_TCC_CC_WRITE_REQ + description: Total write requests with CC mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 82 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 78 - gfx950: + - architectures: + - gfx950 block: TCP event: 81 - description: Total write requests with CC mtype from this TCP to all TCCs -TCP_TCC_CC_WRITE_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_CC_WRITE_REQ_sum + description: Total write requests with CC mtype from this TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_CC_WRITE_REQ,sum) - description: Total write requests with CC mtype from this TCP to all TCCs Sum over TCP instances. -TCP_TCC_NC_ATOMIC_REQ: - architectures: - gfx90a: + - name: TCP_TCC_NC_ATOMIC_REQ + description: Total atomic requests with NC mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 77 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 73 - gfx950: + - architectures: + - gfx950 block: TCP event: 76 - description: Total atomic requests with NC mtype from this TCP to all TCCs -TCP_TCC_NC_ATOMIC_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_NC_ATOMIC_REQ_sum + description: Total atomic requests with NC mtype from this TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_NC_ATOMIC_REQ,sum) - description: Total atomic requests with NC mtype from this TCP to all TCCs Sum over TCP instances. -TCP_TCC_NC_READ_REQ: - architectures: - gfx90a: + - name: TCP_TCC_NC_READ_REQ + description: Total read requests with NC mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 75 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 71 - gfx950: + - architectures: + - gfx950 block: TCP event: 74 - description: Total read requests with NC mtype from this TCP to all TCCs -TCP_TCC_NC_READ_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_NC_READ_REQ_sum + description: Total read requests with NC mtype from this TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_NC_READ_REQ,sum) - description: Total read requests with NC mtype from this TCP to all TCCs Sum over TCP instances. -TCP_TCC_NC_WRITE_REQ: - architectures: - gfx90a: + - name: TCP_TCC_NC_WRITE_REQ + description: Total write requests with NC mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 76 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 72 - gfx950: + - architectures: + - gfx950 block: TCP event: 75 - description: Total write requests with NC mtype from this TCP to all TCCs -TCP_TCC_NC_WRITE_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_NC_WRITE_REQ_sum + description: Total write requests with NC mtype from this TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_NC_WRITE_REQ,sum) - description: Total write requests with NC mtype from this TCP to all TCCs Sum over TCP instances. -TCP_TCC_READ_REQ: - architectures: - gfx90a: + - name: TCP_TCC_READ_REQ + description: Total read requests from TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 69 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 65 - gfx950: + - architectures: + - gfx950 block: TCP event: 68 - description: Total read requests from TCP to all TCCs -TCP_TCC_READ_REQ_LATENCY: - architectures: - gfx90a: + - name: TCP_TCC_READ_REQ_LATENCY + description: Total TCP->TCC request latency for reads and atomics with return. Not Windowed. + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 66 - gfx950: + - architectures: + - gfx950 block: TCP event: 65 - description: Total TCP->TCC request latency for reads and atomics with return. Not Windowed. -TCP_TCC_READ_REQ_LATENCY_sum: - architectures: - gfx950/gfx90a: + - name: TCP_TCC_READ_REQ_LATENCY_sum + description: Total TCP->TCC request latency for reads and atomics with return. Not Windowed. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx950 expression: reduce(TCP_TCC_READ_REQ_LATENCY,sum) - description: Total TCP->TCC request latency for reads and atomics with return. Not Windowed. Sum over - TCP instances. -TCP_TCC_READ_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_READ_REQ_sum + description: Total read requests from TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_READ_REQ,sum) - description: Total read requests from TCP to all TCCs Sum over TCP instances. -TCP_TCC_RW_ATOMIC_REQ: - architectures: - gfx90a: + - name: TCP_TCC_RW_ATOMIC_REQ + description: Total atomic requests with RW mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 87 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 82 - gfx950: + - architectures: + - gfx950 block: TCP event: 85 - description: Total atomic requests with RW mtype from this TCP to all TCCs -TCP_TCC_RW_ATOMIC_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_RW_ATOMIC_REQ_sum + description: Total atomic requests with RW mtype from this TCP to all TCCs. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_RW_ATOMIC_REQ,sum) - description: Total atomic requests with RW mtype from this TCP to all TCCs. Sum over TCP instances. -TCP_TCC_RW_READ_REQ: - architectures: - gfx90a: + - name: TCP_TCC_RW_READ_REQ + description: Total write requests with RW mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 85 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 80 - gfx950: + - architectures: + - gfx950 block: TCP event: 83 - description: Total write requests with RW mtype from this TCP to all TCCs -TCP_TCC_RW_READ_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_RW_READ_REQ_sum + description: Total write requests with RW mtype from this TCP to all TCCs. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_RW_READ_REQ,sum) - description: Total write requests with RW mtype from this TCP to all TCCs. Sum over TCP instances. -TCP_TCC_RW_WRITE_REQ: - architectures: - gfx90a: + - name: TCP_TCC_RW_WRITE_REQ + description: Total write requests with RW mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 86 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 81 - gfx950: + - architectures: + - gfx950 block: TCP event: 84 - description: Total write requests with RW mtype from this TCP to all TCCs -TCP_TCC_RW_WRITE_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_RW_WRITE_REQ_sum + description: Total write requests with RW mtype from this TCP to all TCCs. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_RW_WRITE_REQ,sum) - description: Total write requests with RW mtype from this TCP to all TCCs. Sum over TCP instances. -TCP_TCC_UC_ATOMIC_REQ: - architectures: - gfx90a: + - name: TCP_TCC_UC_ATOMIC_REQ + description: Total atomic requests with UC mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 80 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 76 - gfx950: + - architectures: + - gfx950 block: TCP event: 79 - description: Total atomic requests with UC mtype from this TCP to all TCCs -TCP_TCC_UC_ATOMIC_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_UC_ATOMIC_REQ_sum + description: Total atomic requests with UC mtype from this TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_UC_ATOMIC_REQ,sum) - description: Total atomic requests with UC mtype from this TCP to all TCCs Sum over TCP instances. -TCP_TCC_UC_READ_REQ: - architectures: - gfx90a: + - name: TCP_TCC_UC_READ_REQ + description: Total read requests with UC mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 78 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 74 - gfx950: + - architectures: + - gfx950 block: TCP event: 77 - description: Total read requests with UC mtype from this TCP to all TCCs -TCP_TCC_UC_READ_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_UC_READ_REQ_sum + description: Total read requests with UC mtype from this TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_UC_READ_REQ,sum) - description: Total read requests with UC mtype from this TCP to all TCCs Sum over TCP instances. -TCP_TCC_UC_WRITE_REQ: - architectures: - gfx90a: + - name: TCP_TCC_UC_WRITE_REQ + description: Total write requests with UC mtype from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 79 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 75 - gfx950: + - architectures: + - gfx950 block: TCP event: 78 - description: Total write requests with UC mtype from this TCP to all TCCs -TCP_TCC_UC_WRITE_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_UC_WRITE_REQ_sum + description: Total write requests with UC mtype from this TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_UC_WRITE_REQ,sum) - description: Total write requests with UC mtype from this TCP to all TCCs Sum over TCP instances. -TCP_TCC_WRITE_REQ: - architectures: - gfx90a: + - name: TCP_TCC_WRITE_REQ + description: Total write requests from TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 70 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 66 - gfx950: + - architectures: + - gfx950 block: TCP event: 69 - description: Total write requests from TCP to all TCCs -TCP_TCC_WRITE_REQ_LATENCY: - architectures: - gfx90a: + - name: TCP_TCC_WRITE_REQ_LATENCY + description: Total TCP->TCC request latency for writes and atomics without return. Not Windowed. + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 67 - gfx950: + - architectures: + - gfx950 block: TCP event: 66 - description: Total TCP->TCC request latency for writes and atomics without return. Not Windowed. -TCP_TCC_WRITE_REQ_LATENCY_sum: - architectures: - gfx950/gfx90a: + - name: TCP_TCC_WRITE_REQ_LATENCY_sum + description: Total TCP->TCC request latency for writes and atomics without return. Not Windowed. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx950 expression: reduce(TCP_TCC_WRITE_REQ_LATENCY,sum) - description: Total TCP->TCC request latency for writes and atomics without return. Not Windowed. Sum - over TCP instances. -TCP_TCC_WRITE_REQ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCC_WRITE_REQ_sum + description: Total write requests from TCP to all TCCs Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCC_WRITE_REQ,sum) - description: Total write requests from TCP to all TCCs Sum over TCP instances. -TCP_TCP_LATENCY: - architectures: - gfx90a: + - name: TCP_TCP_LATENCY + description: Total TCP wave latency (from first clock of wave entering to first clock of wave leaving), divide by TA_TCP_STATE_READ + to avg wave latency + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 65 - gfx950: + - architectures: + - gfx950 block: TCP event: 64 - description: Total TCP wave latency (from first clock of wave entering to first clock of wave leaving), - divide by TA_TCP_STATE_READ to avg wave latency -TCP_TCP_LATENCY_sum: - architectures: - gfx950/gfx90a: + - name: TCP_TCP_LATENCY_sum + description: Total TCP wave latency (from first clock of wave entering to first clock of wave leaving), divide by TA_TCP_STATE_READ + to avg wave latency Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx950 expression: reduce(TCP_TCP_LATENCY,sum) - description: Total TCP wave latency (from first clock of wave entering to first clock of wave leaving), - divide by TA_TCP_STATE_READ to avg wave latency Sum over TCP instances. -TCP_TCP_TA_DATA_STALL_CYCLES: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx900/gfx90a/gfx9: + - name: TCP_TCP_TA_DATA_STALL_CYCLES + description: TCP stalls TA data interface. Now Windowed. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 6 - description: TCP stalls TA data interface. Now Windowed. -TCP_TCP_TA_DATA_STALL_CYCLES_max: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: TCP_TCP_TA_DATA_STALL_CYCLES_max + description: Maximum number of TCP stalls TA data interface. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCP_TA_DATA_STALL_CYCLES,max) - description: Maximum number of TCP stalls TA data interface. -TCP_TCP_TA_DATA_STALL_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: TCP_TCP_TA_DATA_STALL_CYCLES_sum + description: Total number of TCP stalls TA data interface. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCP_TA_DATA_STALL_CYCLES,sum) - description: Total number of TCP stalls TA data interface. -TCP_TCR_TCP_STALL_CYCLES: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCR_TCP_STALL_CYCLES + description: TCR stalls TCP_TCR_req interface + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 8 - description: TCR stalls TCP_TCR_req interface -TCP_TCR_TCP_STALL_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TCR_TCP_STALL_CYCLES_sum + description: TCR stalls TCP_TCR_req interface. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TCR_TCP_STALL_CYCLES,sum) - description: TCR stalls TCP_TCR_req interface. Sum over TCP instances. -TCP_TD_TCP_STALL_CYCLES: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TD_TCP_STALL_CYCLES + description: TD stalls TCP + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 7 - description: TD stalls TCP -TCP_TD_TCP_STALL_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TD_TCP_STALL_CYCLES_sum + description: TD stalls TCP. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TD_TCP_STALL_CYCLES,sum) - description: TD stalls TCP. Sum over TCP instances. -TCP_TOTAL_ACCESSES: - architectures: - gfx90a: + - name: TCP_TOTAL_ACCESSES + description: Total number of pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_READ+TCP_PERF_SEL_TOTAL_NONREAD + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 29 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 27 - description: Total number of pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_READ+TCP_PERF_SEL_TOTAL_NONREAD -TCP_TOTAL_ACCESSES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TOTAL_ACCESSES_sum + description: Total number of pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_READ+TCP_PERF_SEL_TOTAL_NONREAD. Sum over + TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TOTAL_ACCESSES,sum) - description: Total number of pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_READ+TCP_PERF_SEL_TOTAL_NONREAD. - Sum over TCP instances. -TCP_TOTAL_ATOMIC_WITHOUT_RET: - architectures: - gfx90a: + - name: TCP_TOTAL_ATOMIC_WITHOUT_RET + description: Total number of atomic without return pixels/buffers from TA + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 39 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 37 - description: Total number of atomic without return pixels/buffers from TA -TCP_TOTAL_ATOMIC_WITHOUT_RET_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TOTAL_ATOMIC_WITHOUT_RET_sum + description: Total number of atomic without return pixels/buffers from TA Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TOTAL_ATOMIC_WITHOUT_RET,sum) - description: Total number of atomic without return pixels/buffers from TA Sum over TCP instances. -TCP_TOTAL_ATOMIC_WITH_RET: - architectures: - gfx90a: + - name: TCP_TOTAL_ATOMIC_WITH_RET + description: Total number of atomic with return pixels/buffers from TA + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 38 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 36 - description: Total number of atomic with return pixels/buffers from TA -TCP_TOTAL_ATOMIC_WITH_RET_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TOTAL_ATOMIC_WITH_RET_sum + description: Total number of atomic with return pixels/buffers from TA. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TOTAL_ATOMIC_WITH_RET,sum) - description: Total number of atomic with return pixels/buffers from TA. Sum over TCP instances. -TCP_TOTAL_CACHE_ACCESSES: - architectures: - gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TOTAL_CACHE_ACCESSES + description: Count of total cache line (tag) accesses (includes hits and misses). + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 block: TCP event: 60 - gfx950: + - architectures: + - gfx950 block: TCP event: 58 - description: Count of total cache line (tag) accesses (includes hits and misses). -TCP_TOTAL_CACHE_ACCESSES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TOTAL_CACHE_ACCESSES_sum + description: Count of total cache line (tag) accesses (includes hits and misses). Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TOTAL_CACHE_ACCESSES,sum) - description: Count of total cache line (tag) accesses (includes hits and misses). Sum over TCP instances. -TCP_TOTAL_READ: - architectures: - gfx90a: + - name: TCP_TOTAL_READ + description: Total number of read pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_HIT_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_LRU_READ + + TCP_PERF_SEL_TOTAL_MISS_EVICT_READ + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 30 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 28 - description: Total number of read pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_HIT_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_LRU_READ - + TCP_PERF_SEL_TOTAL_MISS_EVICT_READ -TCP_TOTAL_READ_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TOTAL_READ_sum + description: Total number of read pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_HIT_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_LRU_READ + + TCP_PERF_SEL_TOTAL_MISS_EVICT_READ. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TOTAL_READ,sum) - description: Total number of read pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_HIT_LRU_READ + TCP_PERF_SEL_TOTAL_MISS_LRU_READ - + TCP_PERF_SEL_TOTAL_MISS_EVICT_READ. Sum over TCP instances. -TCP_TOTAL_WRITE: - architectures: - gfx90a: + - name: TCP_TOTAL_WRITE + description: Total number of local write pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_MISS_LRU_WRITE+ TCP_PERF_SEL_TOTAL_MISS_EVICT_WRITE + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 32 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 30 - description: Total number of local write pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_MISS_LRU_WRITE+ - TCP_PERF_SEL_TOTAL_MISS_EVICT_WRITE -TCP_TOTAL_WRITEBACK_INVALIDATES: - architectures: - gfx90a: + - name: TCP_TOTAL_WRITEBACK_INVALIDATES + description: Total number of cache invalidates. Equals TCP_PERF_SEL_TOTAL_WBINVL1+ TCP_PERF_SEL_TOTAL_WBINVL1_VOL+ TCP_PERF_SEL_CP_TCP_INVALIDATE+ + TCP_PERF_SEL_SQ_TCP_INVALIDATE_VOL. Not Windowed. + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 45 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 43 - gfx950: + - architectures: + - gfx950 block: TCP event: 41 - description: Total number of cache invalidates. Equals TCP_PERF_SEL_TOTAL_WBINVL1+ TCP_PERF_SEL_TOTAL_WBINVL1_VOL+ - TCP_PERF_SEL_CP_TCP_INVALIDATE+ TCP_PERF_SEL_SQ_TCP_INVALIDATE_VOL. Not Windowed. -TCP_TOTAL_WRITEBACK_INVALIDATES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TOTAL_WRITEBACK_INVALIDATES_sum + description: Total number of cache invalidates. Equals TCP_PERF_SEL_TOTAL_WBINVL1+ TCP_PERF_SEL_TOTAL_WBINVL1_VOL+ TCP_PERF_SEL_CP_TCP_INVALIDATE+ + TCP_PERF_SEL_SQ_TCP_INVALIDATE_VOL. Not Windowed. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TOTAL_WRITEBACK_INVALIDATES,sum) - description: Total number of cache invalidates. Equals TCP_PERF_SEL_TOTAL_WBINVL1+ TCP_PERF_SEL_TOTAL_WBINVL1_VOL+ - TCP_PERF_SEL_CP_TCP_INVALIDATE+ TCP_PERF_SEL_SQ_TCP_INVALIDATE_VOL. Not Windowed. Sum over TCP instances. -TCP_TOTAL_WRITE_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_TOTAL_WRITE_sum + description: Total number of local write pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_MISS_LRU_WRITE+ TCP_PERF_SEL_TOTAL_MISS_EVICT_WRITE. + Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_TOTAL_WRITE,sum) - description: Total number of local write pixels/buffers from TA. Equals TCP_PERF_SEL_TOTAL_MISS_LRU_WRITE+ - TCP_PERF_SEL_TOTAL_MISS_EVICT_WRITE. Sum over TCP instances. -TCP_UTCL1_PERMISSION_MISS: - architectures: - gfx90a: + - name: TCP_UTCL1_PERMISSION_MISS + description: Total utcl1 permission misses + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 50 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 49 - gfx950: + - architectures: + - gfx950 block: TCP event: 47 - description: Total utcl1 permission misses -TCP_UTCL1_PERMISSION_MISS_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_UTCL1_PERMISSION_MISS_sum + description: Total utcl1 permission misses Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_UTCL1_PERMISSION_MISS,sum) - description: Total utcl1 permission misses Sum over TCP instances. -TCP_UTCL1_REQUEST: - architectures: - gfx90a: + - name: TCP_UTCL1_REQUEST + description: Total CLIENT_UTCL1 NORMAL requests + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 47 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 45 - gfx950: + - architectures: + - gfx950 block: TCP event: 43 - description: Total CLIENT_UTCL1 NORMAL requests -TCP_UTCL1_REQUEST_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_UTCL1_REQUEST_sum + description: Total CLIENT_UTCL1 NORMAL requests Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_UTCL1_REQUEST,sum) - description: Total CLIENT_UTCL1 NORMAL requests Sum over TCP instances. -TCP_UTCL1_TRANSLATION_HIT: - architectures: - gfx90a: + - name: TCP_UTCL1_TRANSLATION_HIT + description: Total utcl1 translation hits + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 49 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 48 - gfx950: + - architectures: + - gfx950 block: TCP event: 46 - description: Total utcl1 translation hits -TCP_UTCL1_TRANSLATION_HIT_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_UTCL1_TRANSLATION_HIT_sum + description: Total utcl1 translation hits Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_UTCL1_TRANSLATION_HIT,sum) - description: Total utcl1 translation hits Sum over TCP instances. -TCP_UTCL1_TRANSLATION_MISS: - architectures: - gfx90a: + - name: TCP_UTCL1_TRANSLATION_MISS + description: Total utcl1 translation misses + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 48 - gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 block: TCP event: 47 - gfx950: + - architectures: + - gfx950 block: TCP event: 45 - description: Total utcl1 translation misses -TCP_UTCL1_TRANSLATION_MISS_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_UTCL1_TRANSLATION_MISS_sum + description: Total utcl1 translation misses Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_UTCL1_TRANSLATION_MISS,sum) - description: Total utcl1 translation misses Sum over TCP instances. -TCP_VOLATILE: - architectures: - gfx90a: + - name: TCP_VOLATILE + description: Total number of L1 volatile pixels/buffers from TA + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 28 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 26 - description: Total number of L1 volatile pixels/buffers from TA -TCP_VOLATILE_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_VOLATILE_sum + description: Total number of L1 volatile pixels/buffers from TA. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_VOLATILE,sum) - description: Total number of L1 volatile pixels/buffers from TA. Sum over TCP instances. -TCP_WRITE_TAGCONFLICT_STALL_CYCLES: - architectures: - gfx90a: + - name: TCP_WRITE_TAGCONFLICT_STALL_CYCLES + description: Tagram conflict stall on a write + properties: [] + definitions: + - architectures: + - gfx90a block: TCP event: 12 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TCP event: 11 - description: Tagram conflict stall on a write -TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum + description: Tagram conflict stall on a write. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TCP_WRITE_TAGCONFLICT_STALL_CYCLES,sum) - description: Tagram conflict stall on a write. Sum over TCP instances. -TCP_CACHE_MISS: - architectures: - gfx950: + - name: TCP_CACHE_MISS + description: Total L1 cache miss requests sent from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 63 - description: Total L1 cache miss requests sent from this TCP to all TCCs -TCP_TCP_TA_ADDR_STALL_CYCLES: - architectures: - gfx950: + - name: TCP_TCP_TA_ADDR_STALL_CYCLES + description: TCP stalls TA addr interface. + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 5 - description: TCP stalls TA addr interface. -TCP_LFIFO_STALL_CYCLES: - architectures: - gfx950: + - name: TCP_LFIFO_STALL_CYCLES + description: Memory Latency fifos full stall. + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 15 - description: Memory Latency fifos full stall. -TCP_RFIFO_STALL_CYCLES: - architectures: - gfx950: + - name: TCP_RFIFO_STALL_CYCLES + description: Memory Request fifos full stall + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 16 - description: Memory Request fifos full stall -TCP_TCR_RDRET_STALL: - architectures: - gfx950: + - name: TCP_TCR_RDRET_STALL + description: Write into cache stalled by read return from tcr + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 17 - description: Write into cache stalled by read return from tcr -TCP_UTCL1_SERIALIZATION_STALL: - architectures: - gfx950: + - name: TCP_UTCL1_SERIALIZATION_STALL + description: Total number of stalls due to serializing translation requests through the UTCL1. + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 23 - description: Total number of stalls due to serializing translation requests through the UTCL1. -TCP_UTCL1_THRASHING_STALL: - architectures: - gfx950: + - name: TCP_UTCL1_THRASHING_STALL + description: Stall caused by thrashing feature in any probes. Not accurate when the stall signal has overlap between probe0 + and probe1. Even worse with MECO of thrashing deadlock. Some event of probe0 could miss to count in with + MECO on. Anyway this perf count can be a rough estimation of thrashing. + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 44 - description: Stall caused by thrashing feature in any probes. Not accurate when the stall signal has - overlap between probe0 and probe1. Even worse with MECO of thrashing deadlock:DEMI350-4489. Some event - of probe0 could miss to count in with MECO on. Anyway this perf count can be a rough estimation of thrashing. -TCP_UTCL1_TRANSLATION_MISS_UNDER_MISS: - architectures: - gfx950: + - name: TCP_UTCL1_TRANSLATION_MISS_UNDER_MISS + description: Translation miss_under_miss + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 48 - description: Translation miss_under_miss -TCP_UTCL1_STALL_INFLIGHT_MAX: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_INFLIGHT_MAX + description: Total utcl1 stalls due to inflight counter saturation + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 49 - description: Total utcl1 stalls due to inflight counter saturation -TCP_UTCL1_STALL_LRU_INFLIGHT: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_LRU_INFLIGHT + description: Total utcl1 stalls due to LRU cache line with traffic inflight + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 50 - description: Total utcl1 stalls due to LRU cache line with traffic inflight -TCP_UTCL1_STALL_MULTI_MISS: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_MULTI_MISS + description: Total utcl1 stalls due to arbitrated multiple misses + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 51 - description: Total utcl1 stalls due to arbitrated multiple misses -TCP_UTCL1_LFIFO_FULL: - architectures: - gfx950: + - name: TCP_UTCL1_LFIFO_FULL + description: Total utcl1 utcl2 latency hiding fifo full cycles + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 52 - description: Total utcl1 utcl2 latency hiding fifo full cycles -TCP_UTCL1_STALL_LFIFO_NOT_RES: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_LFIFO_NOT_RES + description: Total utcl1 stalls due to utcl2 latency hiding fifo output not resident + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 53 - description: Total utcl1 stalls due to utcl2 latency hiding fifo output not resident -TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS + description: Total utcl1 stalls due to utcl2_req out of credits + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 54 - description: Total utcl1 stalls due to utcl2_req out of credits -TCP_CLIENT_UTCL1_INFLIGHT: - architectures: - gfx950: + - name: TCP_CLIENT_UTCL1_INFLIGHT + description: The sum of inflight client to UTCL1 requests per cycle + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 55 - description: The sum of inflight client to UTCL1 requests per cycle -TCP_TAGRAM0_REQ: - architectures: - gfx950: + - name: TCP_TAGRAM0_REQ + description: Total L2 requests that mapped to tagram 0 from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 59 - description: Total L2 requests that mapped to tagram 0 from this TCP to all TCCs -TCP_TAGRAM1_REQ: - architectures: - gfx950: + - name: TCP_TAGRAM1_REQ + description: Total L2 requests that mapped to tagram 1 from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 60 - description: Total L2 requests that mapped to tagram 1 from this TCP to all TCCs -TCP_TAGRAM2_REQ: - architectures: - gfx950: + - name: TCP_TAGRAM2_REQ + description: Total L2 requests that mapped to tagram 2 from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 61 - description: Total L2 requests that mapped to tagram 2 from this TCP to all TCCs -TCP_TAGRAM3_REQ: - architectures: - gfx950: + - name: TCP_TAGRAM3_REQ + description: Total L2 requests that mapped to tagram 3 from this TCP to all TCCs + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 62 - description: Total L2 requests that mapped to tagram 3 from this TCP to all TCCs -TCP_TCC_WRITE_REQ_HOLE_LATENCY: - architectures: - gfx950: + - name: TCP_TCC_WRITE_REQ_HOLE_LATENCY + description: Total TCP req ->TCC hole latency for writes and atomics. Not Windowed. + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 67 - description: Total TCP req ->TCC hole latency for writes and atomics. Not Windowed. -TCP_TOTAL_WBINVL1_VOL: - architectures: - gfx950: + - name: TCP_TOTAL_WBINVL1_VOL + description: Total number of wbinvl1/inv transactions from TA (from shader WBINVL/INV instructions) + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 38 - description: Total number of wbinvl1/inv transactions from TA (from shader WBINVL/INV instructions) -TCP_SQ_TCP_INVALIDATE_VOL: - architectures: - gfx950: + - name: TCP_SQ_TCP_INVALIDATE_VOL + description: Number of cache invalidates from the SQ. Not Windowed. + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 39 - description: Number of cache invalidates from the SQ. Not Windowed. -TCP_CP_TCP_INVALIDATE_VOL: - architectures: - gfx950: + - name: TCP_CP_TCP_INVALIDATE_VOL + description: Number of cache invalidates from the CP. Not Windowed. + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 40 - description: Number of cache invalidates from the CP. Not Windowed. -TCP_UTCL1_STALL_LFIFO_NO_RES: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_LFIFO_NO_RES + description: Total utcl1 stalls due to utcl2 latency hiding fifo output not resident + properties: [] + definitions: + - architectures: + - gfx950 block: TCP event: 53 - description: Total utcl1 stalls due to utcl2 latency hiding fifo output not resident -TCP_TCP_TA_ADDR_STALL_CYCLES_sum: - architectures: - gfx950: + - name: TCP_TCP_TA_ADDR_STALL_CYCLES_sum + description: TCP stalls TA addr interface. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_TCP_TA_ADDR_STALL_CYCLES,sum) - description: TCP stalls TA addr interface. Sum over TCP instances. -TCP_LFIFO_STALL_CYCLES_sum: - architectures: - gfx950: + - name: TCP_LFIFO_STALL_CYCLES_sum + description: Memory Latency fifos full stall. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_LFIFO_STALL_CYCLES,sum) - description: Memory Latency fifos full stall. Sum over TCP instances. -TCP_RFIFO_STALL_CYCLES_sum: - architectures: - gfx950: + - name: TCP_RFIFO_STALL_CYCLES_sum + description: Memory Request fifos full stall. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_RFIFO_STALL_CYCLES,sum) - description: Memory Request fifos full stall. Sum over TCP instances. -TCP_TCR_RDRET_STALL_sum: - architectures: - gfx950: + - name: TCP_TCR_RDRET_STALL_sum + description: Write into cache stalled by read return from tcr. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_TCR_RDRET_STALL,sum) - description: Write into cache stalled by read return from tcr. Sum over TCP instances. -TCP_TAGRAM0_REQ_sum: - architectures: - gfx950: + - name: TCP_TAGRAM0_REQ_sum + description: Total L2 requests that mapped to tagram 0 from this TCP to all TCCs. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_TAGRAM0_REQ,sum) - description: Total L2 requests that mapped to tagram 0 from this TCP to all TCCs. Sum over TCP instances. -TCP_TAGRAM1_REQ_sum: - architectures: - gfx950: + - name: TCP_TAGRAM1_REQ_sum + description: Total L2 requests that mapped to tagram 1 from this TCP to all TCCs. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_TAGRAM1_REQ,sum) - description: Total L2 requests that mapped to tagram 1 from this TCP to all TCCs. Sum over TCP instances. -TCP_TAGRAM2_REQ_sum: - architectures: - gfx950: + - name: TCP_TAGRAM2_REQ_sum + description: Total L2 requests that mapped to tagram 2 from this TCP to all TCCs. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_TAGRAM2_REQ,sum) - description: Total L2 requests that mapped to tagram 2 from this TCP to all TCCs. Sum over TCP instances. -TCP_TAGRAM3_REQ_sum: - architectures: - gfx950: + - name: TCP_TAGRAM3_REQ_sum + description: Total L2 requests that mapped to tagram 3 from this TCP to all TCCs. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_TAGRAM3_REQ,sum) - description: Total L2 requests that mapped to tagram 3 from this TCP to all TCCs. Sum over TCP instances. -TCP_CLIENT_UTCL1_INFLIGHT_sum: - architectures: - gfx950: + - name: TCP_CLIENT_UTCL1_INFLIGHT_sum + description: The sum of inflight client to UTCL1 requests per cycle. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_CLIENT_UTCL1_INFLIGHT,sum) - description: The sum of inflight client to UTCL1 requests per cycle. Sum over TCP instances. -TCP_UTCL1_TRANSLATION_MISS_UNDER_MISS_sum: - architectures: - gfx950: + - name: TCP_UTCL1_TRANSLATION_MISS_UNDER_MISS_sum + description: Translation miss_under_miss. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_UTCL1_TRANSLATION_MISS_UNDER_MISS,sum) - description: Translation miss_under_miss. Sum over TCP instances. -TCP_UTCL1_STALL_INFLIGHT_MAX_sum: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_INFLIGHT_MAX_sum + description: Total utcl1 stalls due to inflight counter saturation. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_UTCL1_STALL_INFLIGHT_MAX,sum) - description: Total utcl1 stalls due to inflight counter saturation. Sum over TCP instances. -TCP_UTCL1_STALL_MULTI_MISS_sum: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_MULTI_MISS_sum + description: Total utcl1 stalls due to arbitrated multiple misses. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_UTCL1_STALL_MULTI_MISS,sum) - description: Total utcl1 stalls due to arbitrated multiple misses. Sum over TCP instances. -TCP_UTCL1_SERIALIZATION_STALL_sum: - architectures: - gfx950: + - name: TCP_UTCL1_SERIALIZATION_STALL_sum + description: Total number of stalls due to serializing translation requests through the UTCL1. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_UTCL1_SERIALIZATION_STALL,sum) - description: Total number of stalls due to serializing translation requests through the UTCL1. Sum over TCP instances. -TCP_UTCL1_THRASHING_STALL_sum: - architectures: - gfx950: + - name: TCP_UTCL1_THRASHING_STALL_sum + description: Stall caused by thrashing feature in any probes. Not accurate when the stall signal has overlap between probe0 + and probe1. Even worse with MECO of thrashing deadlock. Some event of probe0 could miss to count in with + MECO on. Anyway this perf count can be a rough estimation of thrashing. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_UTCL1_THRASHING_STALL,sum) - description: Stall caused by thrashing feature in any probes. Not accurate when the stall signal has - overlap between probe0 and probe1. Even worse with MECO of thrashing deadlock:DEMI350-4489. Some event - of probe0 could miss to count in with MECO on. Anyway this perf count can be a rough estimation of thrashing. Sum over TCP instances. -TCP_UTCL1_LFIFO_FULL_sum: - architectures: - gfx950: + - name: TCP_UTCL1_LFIFO_FULL_sum + description: Total utcl1 utcl2 latency hiding fifo full cycles. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_UTCL1_LFIFO_FULL,sum) - description: Total utcl1 utcl2 latency hiding fifo full cycles. Sum over TCP instances. -TCP_UTCL1_STALL_LFIFO_NO_RES_sum: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_LFIFO_NO_RES_sum + description: Total utcl1 stalls due to utcl2 latency hiding fifo output not resident. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_UTCL1_STALL_LFIFO_NO_RES,sum) - description: Total utcl1 stalls due to utcl2 latency hiding fifo output not resident. Sum over TCP instances. -TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS_sum: - architectures: - gfx950: + - name: TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS_sum + description: Total utcl1 stalls due to utcl2_req out of credits. Sum over TCP instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS,sum) - description: Total utcl1 stalls due to utcl2_req out of credits. Sum over TCP instances. -# Block TD (Texture Data Block) -TD_ATOMIC_WAVEFRONT: - architectures: - gfx90a: + - name: TD_ATOMIC_WAVEFRONT + description: Count the wavefronts with opcode = atomic. + properties: [] + definitions: + - architectures: + - gfx90a block: TD event: 26 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TD event: 17 - description: Count the wavefronts with opcode = atomic. -TD_ATOMIC_WAVEFRONT_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TD_ATOMIC_WAVEFRONT_sum + description: Count the wavefronts with opcode = atomic. Sum over TD instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TD_ATOMIC_WAVEFRONT,sum) - description: Count the wavefronts with opcode = atomic. Sum over TD instances. -TD_COALESCABLE_WAVEFRONT: - architectures: - gfx90a: + - name: TD_COALESCABLE_WAVEFRONT + description: Count wavefronts that TA finds coalescable. + properties: [] + definitions: + - architectures: + - gfx90a block: TD event: 32 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TD event: 21 - description: Count wavefronts that TA finds coalescable. -TD_COALESCABLE_WAVEFRONT_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TD_COALESCABLE_WAVEFRONT_sum + description: Count wavefronts that TA finds coalescable. Sum over TD instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TD_COALESCABLE_WAVEFRONT,sum) - description: Count wavefronts that TA finds coalescable. Sum over TD instances. -TD_LOAD_WAVEFRONT: - architectures: - gfx90a: + - name: TD_LOAD_WAVEFRONT + description: Count the wavefronts with opcode = load, include atomics and store. + properties: [] + definitions: + - architectures: + - gfx90a block: TD event: 25 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TD event: 16 - description: Count the wavefronts with opcode = load, include atomics and store. -TD_LOAD_WAVEFRONT_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TD_LOAD_WAVEFRONT_sum + description: Count the wavefronts with opcode = load, include atomics and store. Sum over TD instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TD_LOAD_WAVEFRONT,sum) - description: Count the wavefronts with opcode = load, include atomics and store. Sum over TD instances. -TD_SPI_STALL: - architectures: - gfx90a: + - name: TD_SPI_STALL + description: TD is stalled SPI vinit + properties: [] + definitions: + - architectures: + - gfx90a block: TD event: 18 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TD event: 15 - description: TD is stalled SPI vinit -TD_SPI_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TD_SPI_STALL_sum + description: TD is stalled SPI vinit, sum of TCP instances + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TD_SPI_STALL,sum) - description: TD is stalled SPI vinit, sum of TCP instances -TD_STORE_WAVEFRONT: - architectures: - gfx90a: + - name: TD_STORE_WAVEFRONT + description: Count the wavefronts with opcode = store. + properties: [] + definitions: + - architectures: + - gfx90a block: TD event: 27 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TD event: 18 - description: Count the wavefronts with opcode = store. -TD_STORE_WAVEFRONT_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TD_STORE_WAVEFRONT_sum + description: Count the wavefronts with opcode = store. Sum over TD instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TD_STORE_WAVEFRONT,sum) - description: Count the wavefronts with opcode = store. Sum over TD instances. -TD_TC_STALL: - architectures: - gfx90a: + - name: TD_TC_STALL + description: TD is stalled waiting for TC data. + properties: [] + definitions: + - architectures: + - gfx90a block: TD event: 15 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TD event: 12 - description: TD is stalled waiting for TC data. -TD_TC_STALL_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TD_TC_STALL_sum + description: TD is stalled waiting for TC data. Sum over TD instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TD_TC_STALL,sum) - description: TD is stalled waiting for TC data. Sum over TD instances. -TD_TD_BUSY: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TD_TD_BUSY + description: TD is processing or waiting for data. Perf_Windowing not supported for this counter. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 block: TD event: 1 - description: TD is processing or waiting for data. Perf_Windowing not supported for this counter. -TD_TD_BUSY_sum: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TD_TD_BUSY_sum + description: TD is processing or waiting for data. Perf_Windowing not supported for this counter. Sum over TD instances. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(TD_TD_BUSY,sum) - description: TD is processing or waiting for data. Perf_Windowing not supported for this counter. Sum - over TD instances. -TD_WRITE_ACKT_WAVEFRONT: - architectures: - gfx950: + - name: TD_WRITE_ACKT_WAVEFRONT + description: Count write acknowledgments, sent to SQ and not to SP. + properties: [] + definitions: + - architectures: + - gfx950 block: TD event: 27 - description: Count write acknowledgments, sent to SQ and not to SP. -TD_WRITE_ACKT_WAVEFRONT_sum: - architectures: - gfx950: + - name: TD_WRITE_ACKT_WAVEFRONT_sum + description: Count write acknowledgments, sent to SQ and not to SP. Sum over TD instances. + properties: [] + definitions: + - architectures: + - gfx950 expression: reduce(TD_WRITE_ACKT_WAVEFRONT,sum) - description: Count write acknowledgments, sent to SQ and not to SP. Sum over TD instances. -TD_TD_SP_TRAFFIC: - architectures: - gfx950: + - name: TD_TD_SP_TRAFFIC + description: Count the number of times this TD sends data to the SP. + properties: [] + definitions: + - architectures: + - gfx950 block: TD event: 29 - description: Count the number of times this TD sends data to the SP. -TOTAL_16_OPS: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: - expression: - (SQ_INSTS_VALU_FMA_F16*2+SQ_INSTS_VALU_ADD_F16+SQ_INSTS_VALU_MUL_F16+SQ_INSTS_VALU_TRANS_F16)*64+((SQ_INSTS_VALU_MFMA_MOPS_F16+SQ_INSTS_VALU_MFMA_MOPS_BF16)*512) - description: The number of 16 bits OPS executed -TOTAL_32_OPS: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: - expression: - (SQ_INSTS_VALU_FMA_F32*2+SQ_INSTS_VALU_INT32+SQ_INSTS_VALU_ADD_F32+SQ_INSTS_VALU_MUL_F32+SQ_INSTS_VALU_TRANS_F32)*64+(SQ_INSTS_VALU_MFMA_MOPS_F32*512) - description: The number of 32 bits OPS executed -TOTAL_64_OPS: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: - expression: - (SQ_INSTS_VALU_FMA_F64*2+SQ_INSTS_VALU_INT64+SQ_INSTS_VALU_ADD_F64+SQ_INSTS_VALU_MUL_F64)*64+(SQ_INSTS_VALU_MFMA_MOPS_F64*512) - description: The number of 64 bits OPS executed -RDC_OPS_16_PER_SIMDCYCLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: TOTAL_16_OPS + description: The number of 16 bits OPS executed + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 + expression: (SQ_INSTS_VALU_FMA_F16*2+SQ_INSTS_VALU_ADD_F16+SQ_INSTS_VALU_MUL_F16+SQ_INSTS_VALU_TRANS_F16)*64+((SQ_INSTS_VALU_MFMA_MOPS_F16+SQ_INSTS_VALU_MFMA_MOPS_BF16)*512) + - name: TOTAL_32_OPS + description: The number of 32 bits OPS executed + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 + expression: (SQ_INSTS_VALU_FMA_F32*2+SQ_INSTS_VALU_INT32+SQ_INSTS_VALU_ADD_F32+SQ_INSTS_VALU_MUL_F32+SQ_INSTS_VALU_TRANS_F32)*64+(SQ_INSTS_VALU_MFMA_MOPS_F32*512) + - name: TOTAL_64_OPS + description: The number of 64 bits OPS executed + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 + expression: (SQ_INSTS_VALU_FMA_F64*2+SQ_INSTS_VALU_INT64+SQ_INSTS_VALU_ADD_F64+SQ_INSTS_VALU_MUL_F64)*64+(SQ_INSTS_VALU_MFMA_MOPS_F64*512) + - name: RDC_OPS_16_PER_SIMDCYCLE + description: The number of 16 bits OPS executed per simd-cycle + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: TOTAL_16_OPS/SIMD_NUM/reduce(GRBM_COUNT,max) - description: The number of 16 bits OPS executed per simd-cycle -RDC_OPS_32_PER_SIMDCYCLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: RDC_OPS_32_PER_SIMDCYCLE + description: The number of 32 bits OPS executed per simd-cycle + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: TOTAL_32_OPS/SIMD_NUM/reduce(GRBM_COUNT,max) - description: The number of 32 bits OPS executed per simd-cycle -RDC_OPS_64_PER_SIMDCYCLE: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: RDC_OPS_64_PER_SIMDCYCLE + description: The number of 64 bits OPS executed per simd-cycle + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: TOTAL_64_OPS/SIMD_NUM/reduce(GRBM_COUNT,max) - description: The number of 64 bits OPS executed per simd-cycle -TaUtil: - architectures: - gfx90a: + - name: TaUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(GRBM_TA_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: 'Unit: percent' -TcUtil: - architectures: - gfx90a: + - name: TcUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(GRBM_TC_BUSY,max)/reduce(GRBM_GUI_ACTIVE,max) - description: 'Unit: percent' -VALUBusy: - architectures: - gfx950/gfx906/gfx908/gfx90a/gfx9/gfx900/gfx942/gfx941/gfx940: + - name: VALUBusy + description: 'The percentage of GPUTime vector ALU instructions are processed. Value range: 0% (bad) to 100% (optimal).' + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: 100*reduce(SQ_ACTIVE_INST_VALU,sum)/CU_NUM/reduce(GRBM_GUI_ACTIVE,max) - description: 'The percentage of GPUTime vector ALU instructions are processed. Value range: 0% (bad) - to 100% (optimal).' -VALUInsts: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9: + - name: VALUInsts + description: The average number of vector ALU instructions executed per work-item (affected by flow control). + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx906 + - gfx908 + - gfx90a expression: reduce(SQ_INSTS_VALU,sum)/reduce(SQ_WAVES,sum) - description: The average number of vector ALU instructions executed per work-item (affected by flow - control). -VALUUtilization: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: VALUUtilization + description: 'The percentage of active vector ALU threads in a wave. A lower number can mean either more thread divergence + in a wave or that the work-group size is not a multiple of 64. Value range: 0% (bad), 100% (ideal - no thread divergence).' + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: 100*reduce(SQ_THREAD_CYCLES_VALU,sum)/(reduce(SQ_ACTIVE_INST_VALU,sum)*MAX_WAVE_SIZE) - description: 'The percentage of active vector ALU threads in a wave. A lower number can mean either - more thread divergence in a wave or that the work-group size is not a multiple of 64. Value range: - 0% (bad), 100% (ideal - no thread divergence).' -SIMD_UTILIZATION: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SIMD_UTILIZATION + description: Fraction of time the SIMDs are being utilized [0,1]. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(SQ_BUSY_CU_CYCLES,sum)/reduce(GRBM_COUNT,max)/CU_NUM - description: 'Fraction of time the SIMDs are being utilized [0,1].' -VFetchInsts: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: VFetchInsts + description: The average number of vector fetch instructions from the video memory executed per work-item (affected by + flow control). Excludes FLAT instructions that fetch from video memory. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: (reduce(SQ_INSTS_VMEM_RD,sum)-TA_FLAT_READ_WAVEFRONTS_sum)/reduce(SQ_WAVES,sum) - description: The average number of vector fetch instructions from the video memory executed per work-item - (affected by flow control). Excludes FLAT instructions that fetch from video memory. -VWriteInsts: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: VWriteInsts + description: The average number of vector write instructions to the video memory executed per work-item (affected by flow + control). Excludes FLAT instructions that write to video memory. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: (reduce(SQ_INSTS_VMEM_WR,sum)-TA_FLAT_WRITE_WAVEFRONTS_sum)/reduce(SQ_WAVES,sum) - description: The average number of vector write instructions to the video memory executed per work-item - (affected by flow control). Excludes FLAT instructions that write to video memory. -ValuIops: - architectures: - gfx90a: + - name: ValuIops + description: 'Unit: IOP' + properties: [] + definitions: + - architectures: + - gfx90a expression: (SQ_INSTS_VALU_INT32+SQ_INSTS_VALU_INT64)*64 - description: 'Unit: IOP' -ValuPipeIssueUtil: - architectures: - gfx90a/gfx940/gfx9/gfx942/gfx941: + - name: ValuPipeIssueUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx9 + - gfx90a + - gfx940 + - gfx941 + - gfx942 expression: 100*reduce(SQ_ACTIVE_INST_VALU,sum)/(reduce(GRBM_GUI_ACTIVE,max)*CU_NUM) - description: 'Unit: percent' -VmemLatency: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: VmemLatency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: reduce(accumulate(SQ_INST_LEVEL_VMEM, HIGH_RES),sum)/reduce(SQ_INSTS_VMEM,sum) - description: 'Unit: cycles' -VmemPipeIssueUtil: - architectures: - gfx90a: - expression: - 400*(reduce(SQ_ACTIVE_INST_VMEM,sum)+reduce(SQ_ACTIVE_INST_FLAT,sum))/(reduce(GRBM_GUI_ACTIVE,max)*CU_NUM) - description: 'Unit: percent' -WAVE_DEP_WAIT: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: VmemPipeIssueUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a + expression: 400*(reduce(SQ_ACTIVE_INST_VMEM,sum)+reduce(SQ_ACTIVE_INST_FLAT,sum))/(reduce(GRBM_GUI_ACTIVE,max)*CU_NUM) + - name: WAVE_DEP_WAIT + description: Percentage of the SQ_WAVE_CYCLE time spent waiting for anything. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: 100*reduce(SQ_WAIT_ANY,sum)/reduce(SQ_WAVE_CYCLES,sum) - description: Percentage of the SQ_WAVE_CYCLE time spent waiting for anything. -WAVE_ISSUE_WAIT: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101/gfx12/gfx1200/gfx1201: + - name: WAVE_ISSUE_WAIT + description: Percentage of the SQ_WAVE_CYCLE time spent waiting for any instruction issue. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx12 + - gfx1200 + - gfx1201 expression: 100*reduce(SQ_WAIT_INST_ANY,sum)/reduce(SQ_WAVE_CYCLES,sum) - description: Percentage of the SQ_WAVE_CYCLE time spent waiting for any instruction issue. -WDATA1_SIZE: - architectures: - gfx906: + - name: WDATA1_SIZE + description: The total kilobytes written to the video memory. This is measured on EA1s. + properties: [] + definitions: + - architectures: + - gfx906 expression: ((TCC_EA1_WRREQ_sum-TCC_EA1_WRREQ_64B_sum)*32+TCC_EA1_WRREQ_64B_sum*64) - description: The total kilobytes written to the video memory. This is measured on EA1s. -WRITE_REQ_32B: - architectures: - gfx906: - expression: - (TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum)+(TCC_EA1_WRREQ_sum-TCC_EA1_WRREQ_64B_sum)+(TCC_EA_WRREQ_64B_sum+TCC_EA1_WRREQ_64B_sum)*2 - gfx908/gfx90a/gfx9/gfx900: + - name: WRITE_REQ_32B + description: The total number of 32-byte effective memory writes. + properties: [] + definitions: + - architectures: + - gfx906 + expression: (TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum)+(TCC_EA1_WRREQ_sum-TCC_EA1_WRREQ_64B_sum)+(TCC_EA_WRREQ_64B_sum+TCC_EA1_WRREQ_64B_sum)*2 + - architectures: + - gfx9 + - gfx900 + - gfx908 + - gfx90a expression: TCC_EA_WRREQ_64B_sum*2+(TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum) - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: TCC_EA0_WRREQ_64B_sum*2+(TCC_EA0_WRREQ_sum-TCC_EA0_WRREQ_64B_sum) - description: The total number of 32-byte effective memory writes. -WRITE_SIZE: - architectures: - gfx906: + - name: WRITE_SIZE + description: The total kilobytes written to the video memory. This is measured with all extra fetches and any cache or + memory effects taken into account. + properties: [] + definitions: + - architectures: + - gfx906 expression: ((TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum)*32+TCC_EA_WRREQ_64B_sum*64+WDATA1_SIZE)/1024 - gfx908/gfx90a/gfx9/gfx900: + - architectures: + - gfx9 + - gfx900 + - gfx908 + - gfx90a expression: ((TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum)*32+TCC_EA_WRREQ_64B_sum*64)/1024 - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: ((GL2C_MC_WRREQ_sum-GL2C_EA_WRREQ_64B_sum)*32+GL2C_EA_WRREQ_64B_sum*64)/1024 - gfx950/gfx942/gfx941/gfx940: + - architectures: + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: ((TCC_EA0_WRREQ_sum-TCC_EA0_WRREQ_64B_sum)*32+TCC_EA0_WRREQ_64B_sum*64)/1024 - description: The total kilobytes written to the video memory. This is measured with all extra fetches - and any cache or memory effects taken into account. -WaveDepWait: - architectures: - gfx90a: + - name: WaveDepWait + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(SQ_WAIT_ANY,sum)/reduce(SQ_WAVE_CYCLES,sum) - description: 'Unit: percent' -WaveDuration: - architectures: - gfx90a: + - name: WaveDuration + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a expression: 4*reduce(SQ_WAVE_CYCLES,sum)/reduce(SQ_WAVES,sum) - description: 'Unit: cycles' -WaveExec: - architectures: - gfx90a: + - name: WaveExec + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(SQ_ACTIVE_INST_ANY,sum)/reduce(SQ_WAVE_CYCLES,sum) - description: 'Unit: percent' -WaveIssueWait: - architectures: - gfx90a: + - name: WaveIssueWait + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(SQ_WAIT_INST_ANY,sum)/reduce(SQ_WAVE_CYCLES,sum) - description: 'Unit: percent' -Wavefronts: - architectures: - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9: + - name: Wavefronts + description: Total wavefronts. + properties: [] + definitions: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 + - gfx9 + - gfx906 + - gfx908 + - gfx90a expression: reduce(SQ_WAVES,sum) - description: Total wavefronts. -WriteSize: - architectures: - gfx950/gfx942/gfx941/gfx906/gfx940/gfx908/gfx90a/gfx9/gfx900: + - name: WriteSize + description: The total kilobytes written to the video memory. This is measured with all extra fetches and any cache or + memory effects taken into account. + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: WRITE_SIZE - description: The total kilobytes written to the video memory. This is measured with all extra fetches - and any cache or memory effects taken into account. -WriteUnitStalled: - architectures: - gfx906/gfx908/gfx90a/gfx9/gfx900: + - name: WriteUnitStalled + description: 'The percentage of GPUTime the Write unit is stalled. Value range: 0% to 100% (bad).' + properties: [] + definitions: + - architectures: + - gfx9 + - gfx900 + - gfx906 + - gfx908 + - gfx90a expression: 100*TCC_WRREQ_STALL_max/reduce(GRBM_GUI_ACTIVE,max) - gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx1100/gfx1101: + - architectures: + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx1032 + - gfx11 + - gfx1100 + - gfx1101 + - gfx1102 expression: 100*GL2C_WRREQ_STALL_max/reduce(GRBM_GUI_ACTIVE,max) - description: 'The percentage of GPUTime the Write unit is stalled. Value range: 0% to 100% (bad).' -sL1dCacheHitRate: - architectures: - gfx90a: + - name: sL1dCacheHitRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*reduce(SQC_DCACHE_HITS,sum)/reduce(SQC_DCACHE_REQ,sum) - description: 'Unit: percent' -vL1dAtomicTagConfStallRate: - architectures: - gfx90a: + - name: vL1dAtomicTagConfStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum/TCP_GATE_EN2_sum - description: 'Unit: percent' -vL1dBufCoalesceRate: - architectures: - gfx90a: + - name: vL1dBufCoalesceRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 6400*TA_TOTAL_WAVEFRONTS_sum/(TCP_TOTAL_ACCESSES_sum*4) - description: 'Unit: percent' -vL1dCacheTcbHitRate: - architectures: - gfx90a: + - name: vL1dCacheTcbHitRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCP_UTCL1_TRANSLATION_HIT_sum/TCP_UTCL1_REQUEST_sum - description: 'Unit: percent' -vL1dCacheUtil: - architectures: - gfx90a: + - name: vL1dCacheUtil + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCP_GATE_EN2_sum/TCP_GATE_EN1_sum - description: 'Unit: percent' -vL1dCacheWaveLatency: - architectures: - gfx90a: + - name: vL1dCacheWaveLatency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a expression: TCP_TCP_LATENCY_sum/TCP_TA_TCP_STATE_READ_sum - description: 'Unit: cycles' -vL1dDataPendRate: - architectures: - gfx90a: + - name: vL1dDataPendRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCP_PENDING_STALL_CYCLES_sum/TCP_GATE_EN2_sum - description: 'Unit: percent' -vL1dDataRetStallRate: - architectures: - gfx90a: + - name: vL1dDataRetStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TD_TC_STALL_sum/TD_TD_BUSY_sum - description: 'Unit: percent' -vL1dMissReqStallRate: - architectures: - gfx90a: + - name: vL1dMissReqStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCP_TCR_TCP_STALL_CYCLES_sum/TCP_GATE_EN2_sum - description: 'Unit: percent' -vL1dRdTagConfStallRate: - architectures: - gfx90a: + - name: vL1dRdTagConfStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCP_READ_TAGCONFLICT_STALL_CYCLES_sum/TCP_GATE_EN2_sum - description: 'Unit: percent' -vL1dReadFromL2Latency: - architectures: - gfx90a: + - name: vL1dReadFromL2Latency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a expression: TCP_TCC_READ_REQ_LATENCY_sum/(TCP_TCC_READ_REQ_sum+TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - description: 'Unit: cycles' -vL1dWrTagConfStallRate: - architectures: - gfx90a: + - name: vL1dWrTagConfStallRate + description: 'Unit: percent' + properties: [] + definitions: + - architectures: + - gfx90a expression: 100*TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum/TCP_GATE_EN2_sum - description: 'Unit: percent' -vL1dWriteToL2Latency: - architectures: - gfx90a: + - name: vL1dWriteToL2Latency + description: 'Unit: cycles' + properties: [] + definitions: + - architectures: + - gfx90a expression: TCP_TCC_WRITE_REQ_LATENCY_sum/(TCP_TCC_WRITE_REQ_sum+TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - description: 'Unit: cycles' -SerializedAtomicRatio: - architectures: - gfx950/gfx942/gfx941/gfx940/gfx90a: + - name: SerializedAtomicRatio + description: Ratio of cycles spent waiting on serialized atomic accesses caused by contention (access to the same atomic) + over total number of cycles spent on atomic operations. Values greater than 0.10 indicate contention is high and might + be worth addressing. + properties: [] + definitions: + - architectures: + - gfx90a + - gfx940 + - gfx941 + - gfx942 + - gfx950 expression: TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum/TCP_GATE_EN1_sum - description: Ratio of cycles spent waiting on serialized atomic accesses caused by contention - (access to the same atomic) over total number of cycles spent on atomic operations. Values - greater than 0.10 indicate contention is high and might be worth addressing. - diff --git a/source/scripts/convert-counter-collection-yaml-schema.py b/source/scripts/convert-counter-collection-yaml-schema.py new file mode 100755 index 0000000000..339145a80c --- /dev/null +++ b/source/scripts/convert-counter-collection-yaml-schema.py @@ -0,0 +1,91 @@ +#!/usr/bin/env python3 + +import sys +import yaml +import argparse + + +def fatal_error(msg, exit_code=1): + sys.stderr.write(f"Fatal error: {msg}\n") + sys.stderr.flush() + sys.exit(exit_code) + + +def parse_yaml(yaml_file): + try: + with open(yaml_file, "r") as file: + data = yaml.safe_load(file) + return data + + except yaml.YAMLError as exc: + fatal_error(f"{exc}") + + +def dump_yaml(data, ostream): + yaml.dump( + data, + ostream, + default_flow_style=False, + canonical=False, + indent=1, + width=120, + sort_keys=False, + ) + + +def convert_yaml_schema(inp): + data = {"rocprofiler-sdk": {}} + data["rocprofiler-sdk"]["counters-schema-version"] = inp["schema-version"] + data["rocprofiler-sdk"]["counters"] = [] + + for key, itr in inp.items(): + if key == "schema-version": + pass + else: + entry = { + "name": key, + "description": itr["description"], + "properties": [], + "definitions": [], + } + for arch, aitr in itr["architectures"].items(): + definition = {"architectures": sorted(arch.split("/"))} + + # expression or block + event + for dkey, ditr in aitr.items(): + definition[dkey] = ditr + + # add the arch-specific counter definition + entry["definitions"].append(definition) + + # add the counter entry + data["rocprofiler-sdk"]["counters"].append(entry) + + return data + + +if __name__ == "__main__": + + parser = argparse.ArgumentParser() + parser.add_argument("-i", "--input", help="Input file", type=str, required=True) + parser.add_argument( + "-o", + "--output", + help="Output file (stdout if not provided)", + type=str, + default=None, + required=False, + ) + args = parser.parse_args(sys.argv[1:]) + + inp = parse_yaml(args.input) + if "rocprofiler-sdk" not in inp.keys(): + data = convert_yaml_schema(inp) + else: + data = inp + + if args.output is None: + dump_yaml(data, sys.stdout) + else: + with open(args.output, "w") as outfile: + dump_yaml(data, outfile) diff --git a/tests/rocprofv3/counter-collection/extra_counters/extra_counters.yaml b/tests/rocprofv3/counter-collection/extra_counters/extra_counters.yaml index b78429f3e9..bd74dd5eb8 100644 --- a/tests/rocprofv3/counter-collection/extra_counters/extra_counters.yaml +++ b/tests/rocprofv3/counter-collection/extra_counters/extra_counters.yaml @@ -1,5 +1,27 @@ -TEST_YAML_LOAD: - architectures: - gfx950/gfx942/gfx10/gfx1010/gfx1030/gfx1031/gfx11/gfx1032/gfx1102/gfx906/gfx1100/gfx1101/gfx908/gfx90a/gfx9/gfx12/gfx1200/gfx1201: - expression: reduce(GRBM_GUI_ACTIVE,max)*CU_NUM - description: 'Unit: cycles' +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TEST_YAML_LOAD + description: cycles + properties: [] + definitions: + - architectures: + - gfx950 + - gfx942 + - gfx10 + - gfx1010 + - gfx1030 + - gfx1031 + - gfx11 + - gfx1032 + - gfx1102 + - gfx906 + - gfx1100 + - gfx1101 + - gfx908 + - gfx90a + - gfx9 + - gfx12 + - gfx1200 + - gfx1201 + expression: reduce(GRBM_GUI_ACTIVE,max)*CU_NUM