initial commit
This commit is contained in:
foreman
@@ -0,0 +1,483 @@
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//
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// Copyright (c) 2010 Advanced Micro Devices, Inc. All rights reserved.
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//
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#include "top.hpp"
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#include "os/os.hpp"
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#include "device/device.hpp"
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#include "device/gpu/gpudefs.hpp"
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#include "device/gpu/gpusettings.hpp"
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#include <algorithm>
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namespace gpu {
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Settings::Settings()
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{
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// Initialize the GPU device default settings
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oclVersion_ = OpenCL12;
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debugFlags_ = 0;
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singleHeap_ = false;
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syncObject_ = GPU_USE_SYNC_OBJECTS;
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remoteAlloc_ = REMOTE_ALLOC;
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stagedXferRead_ = true;
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stagedXferWrite_ = true;
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stagedXferSize_ = GPU_STAGING_BUFFER_SIZE * Ki;
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// We will enable staged read/write if we use local memory
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disablePersistent_ = false;
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// By Default persistent writes will be disabled.
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stagingWritePersistent_ = GPU_STAGING_WRITE_PERSISTENT;
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maxRenames_ = 32;
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maxRenameSize_ = 4 * Mi;
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// The global heap settings
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heapSize_ = GPU_INITIAL_HEAP_SIZE * Mi;
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heapSizeGrowth_ = GPU_HEAP_GROWTH_INCREMENT * Mi;
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useAliases_ = false;
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imageSupport_ = false;
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hwLDSSize_ = 0;
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// Set this to true when we drop the flag
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doublePrecision_ = ::CL_KHR_FP64;
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// Fill workgroup info size
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// @todo: revisit the 256 limitation on workgroup size
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maxWorkGroupSize_ = 256;
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hostMemDirectAccess_ = HostMemDisable;
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libSelector_ = amd::LibraryUndefined;
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#if cl_amd_open_video
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// By default Open Video extension is not yet supported
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openVideo_ = false;
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#endif // cl_amd_open_video
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// Enable workload split by default (for 24 bit arithmetic or timeout)
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workloadSplitSize_ = 1 << GPU_WORKLOAD_SPLIT;
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// By default use host blit
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blitEngine_ = BlitEngineHost;
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const static size_t MaxPinnedXferSize = 32;
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pinnedXferSize_ = std::min(GPU_PINNED_XFER_SIZE, MaxPinnedXferSize) * Mi;
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pinnedMinXferSize_ = std::min(GPU_PINNED_MIN_XFER_SIZE * Ki, pinnedXferSize_);
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// Disable FP_FAST_FMA defines by default
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reportFMAF_ = false;
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reportFMA_ = false;
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// Disable async memory transfers by default
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asyncMemCopy_ = false;
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// GPU device by default
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apuSystem_ = false;
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// Save resource cache size
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resourceCacheSize_ = GPU_RESOURCE_CACHE_SIZE * Mi;
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// Disable 64 bit pointers support by default
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use64BitPtr_ = false;
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// Max alloc size is 16GB
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maxAllocSize_ = 16 * static_cast<uint64_t>(Gi);
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// Disable memory dependency tracking by default
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numMemDependencies_ = 0;
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// By default cache isn't present
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cacheLineSize_ = 0;
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cacheSize_ = 0;
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// Initialize transfer buffer size to 1MB by default
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xferBufSize_ = 1024 * Ki;
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// Use image DMA if requested
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imageDMA_ = GPU_IMAGE_DMA;
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// Disable ASIC specific features by default
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siPlus_ = false;
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ciPlus_ = false;
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viPlus_ = false;
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// Number of compute rings.
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numComputeRings_ = 0;
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// Rectangular Linear DRMDMA
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rectLinearDMA_ = false;
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minWorkloadTime_ = 1; // 0.1 ms
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maxWorkloadTime_ = 5000; // 500 ms
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// Preallocates address space
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preallocAddrSpace_ = GPU_PREALLOC_ADDR_SPACE;
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// Controls tiled images in persistent
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//!@note IOL for Linux doesn't setup tiling aperture in CMM/QS
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linearPersistentImage_ = false;
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useSingleScratch_ = GPU_USE_SINGLE_SCRATCH;
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// SDMA profiling is disabled by default
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sdmaProfiling_ = false;
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// Device enqueuing settings
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numDeviceEvents_ = 1024;
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numWaitEvents_ = 8;
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// Disable HSAIL by default
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hsail_ = false;
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// Don't support platform atomics by default.
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svmAtomics_ = false;
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// Use direct SRD by default
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hsailDirectSRD_ = GPU_DIRECT_SRD;
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}
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bool
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Settings::create(
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const CALdeviceattribs& calAttr
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#if cl_amd_open_video
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, const CALdeviceVideoAttribs& calVideoAttr
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#endif // cl_amd_open_video
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, bool reportAsOCL12Device
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)
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{
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CALuint target = calAttr.target;
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uint32_t osVer = 0x0;
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// Disable thread trace by default for all devices
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threadTraceEnable_ = false;
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if (calAttr.doublePrecision) {
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// Report FP_FAST_FMA define if double precision HW
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reportFMA_ = true;
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// FMA is 1/4 speed on Pitcairn, Cape Verde, Devastator and Scrapper
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// Bonaire, Kalindi, Spectre and Spooky so disable
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// FP_FMA_FMAF for those parts in switch below
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reportFMAF_ = true;
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}
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// Update GPU specific settings and info structure if we have any
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switch (target) {
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case CAL_TARGET_SUMO:
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case CAL_TARGET_SUPERSUMO:
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case CAL_TARGET_WRESTLER:
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// Treat these like Evergreen parts as far as capabilities go
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// Fall through ...
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case CAL_TARGET_DEVASTATOR:
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case CAL_TARGET_SCRAPPER:
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apuSystem_ = true;
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reportFMAF_ = false;
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// For the system that has APU and Win 8, the work load needs to be smaller
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// This is because KMD doesn't have workaround for TDR in Win 8
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// This is needed only for EG/NI because EG/NI is using graphics ring
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#if defined(_WIN32)
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{
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OSVERSIONINFOEX versionInfo = { 0 };
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versionInfo.dwOSVersionInfoSize = sizeof(OSVERSIONINFOEX);
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versionInfo.dwMajorVersion = 6;
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versionInfo.dwMinorVersion = 2;
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DWORDLONG conditionMask = 0;
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VER_SET_CONDITION(conditionMask, VER_MAJORVERSION, VER_GREATER_EQUAL);
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VER_SET_CONDITION(conditionMask, VER_MINORVERSION, VER_GREATER_EQUAL);
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if (VerifyVersionInfo(&versionInfo, VER_MAJORVERSION | VER_MINORVERSION, conditionMask)) {
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maxWorkloadTime_ = 500; // 50 ms
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}
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}
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#endif // defined(_WIN32)
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// Add the caps for Trinity here ...
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// Fall through ...
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case CAL_TARGET_CAYMAN:
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// Add the caps for Cayman here ...
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case CAL_TARGET_KAUAI:
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case CAL_TARGET_BARTS:
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case CAL_TARGET_TURKS:
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case CAL_TARGET_CAICOS:
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// Treat these like Evergreen parts as far as capabilities go
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// Fall through ...
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case CAL_TARGET_CYPRESS:
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case CAL_TARGET_JUNIPER:
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case CAL_TARGET_REDWOOD:
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case CAL_TARGET_CEDAR:
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// UAV arena is a pre-SI specific HW feature
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useAliases_ = true;
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if (CAL_TARGET_CEDAR == target) {
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// Workaround for SC spill bugs.
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maxWorkGroupSize_ = 128;
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}
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// Get the link library
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libSelector_ = amd::GPU_Library_Evergreen;
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// Max alloc size
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maxAllocSize_ = 512 * Mi;
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if ((target == CAL_TARGET_CAYMAN) ||
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(target == CAL_TARGET_DEVASTATOR) ||
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(target == CAL_TARGET_SCRAPPER)) {
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rectLinearDMA_ = true;
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}
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// Disable KHR_FP64 for Trinity in the mainline
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if ((target == CAL_TARGET_DEVASTATOR) ||
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(target == CAL_TARGET_SCRAPPER)) {
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doublePrecision_ &= !IS_MAINLINE || !flagIsDefault(CL_KHR_FP64);
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}
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if (target == CAL_TARGET_CYPRESS) {
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// Float FMA is slower than "multiply + add" because we combine
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// "multiply + add" into mad. MAD is 25% faster than FMA on Cypress,
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// assuming perfect VLIW packing.
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reportFMAF_ = false;
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}
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enableExtension(ClAmdImage2dFromBufferReadOnly);
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break;
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case CAL_TARGET_ICELAND:
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case CAL_TARGET_TONGA:
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case CAL_TARGET_BERMUDA:
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case CAL_TARGET_FIJI:
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case CAL_TARGET_CARRIZO:
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// Disable tiling aperture on VI+
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linearPersistentImage_ = true;
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viPlus_ = true;
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// Fall through to CI ...
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case CAL_TARGET_KALINDI:
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case CAL_TARGET_SPECTRE:
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case CAL_TARGET_SPOOKY:
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case CAL_TARGET_GODAVARI:
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if (!viPlus_) {
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// APU systems for CI
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apuSystem_ = true;
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}
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// Fall through ...
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case CAL_TARGET_BONAIRE:
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case CAL_TARGET_HAWAII:
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ciPlus_ = true;
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sdmaProfiling_ = true;
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hsail_ = GPU_HSAIL_ENABLE;
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// Fall through to SI ...
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case CAL_TARGET_PITCAIRN:
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case CAL_TARGET_CAPEVERDE:
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case CAL_TARGET_OLAND:
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case CAL_TARGET_HAINAN:
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reportFMAF_ = false;
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if (target == CAL_TARGET_HAWAII) {
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reportFMAF_ = true;
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}
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// Fall through ...
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case CAL_TARGET_TAHITI:
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siPlus_ = true;
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// Cache line size is 64 bytes
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cacheLineSize_ = 64;
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// L1 cache size is 16KB
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cacheSize_ = 16 * Ki;
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if (ciPlus_) {
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libSelector_ = amd::GPU_Library_CI;
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#if defined(_LP64)
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oclVersion_ = reportAsOCL12Device ? OpenCL12 : XCONCAT(OpenCL,XCONCAT(OPENCL_MAJOR,OPENCL_MINOR));
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#endif
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if (GPU_FORCE_OCL20_32BIT) {
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force32BitOcl20_ = true;
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oclVersion_ = reportAsOCL12Device ? OpenCL12 : XCONCAT(OpenCL,XCONCAT(OPENCL_MAJOR,OPENCL_MINOR));
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}
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if (hsail_) {
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oclVersion_ = OpenCL12;
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}
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numComputeRings_ = 8;
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}
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else {
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numComputeRings_ = 2;
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libSelector_ = amd::GPU_Library_SI;
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}
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// This needs to be cleaned once 64bit addressing is stable
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if (oclVersion_ < OpenCL20) {
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use64BitPtr_ = flagIsDefault(GPU_FORCE_64BIT_PTR) ? LP64_SWITCH(false,
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calAttr.isWorkstation || hsail_) : GPU_FORCE_64BIT_PTR;
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}
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else {
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if (GPU_FORCE_64BIT_PTR || LP64_SWITCH(false, (hsail_
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|| (oclVersion_ >= OpenCL20)))) {
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use64BitPtr_ = true;
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}
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}
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if (oclVersion_ >= OpenCL20) {
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supportDepthsRGB_ = true;
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}
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if (use64BitPtr_) {
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maxAllocSize_ = 4048 * Mi;
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}
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else {
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maxAllocSize_ = 3ULL * Gi;
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}
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supportRA_ = false;
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partialDispatch_ = GPU_PARTIAL_DISPATCH;
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numMemDependencies_ = GPU_NUM_MEM_DEPENDENCY;
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//! @todo HSAIL doesn't support 64 bit atomic on 32 bit!
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if (LP64_SWITCH(!hsail_, true)) {
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enableExtension(ClKhrInt64BaseAtomics);
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enableExtension(ClKhrInt64ExtendedAtomics);
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}
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enableExtension(ClKhrImage2dFromBuffer);
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rectLinearDMA_ = true;
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if (AMD_DEPTH_MSAA_INTEROP) {
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enableExtension(ClKhrGLDepthImages);
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depthMSAAInterop_ = true;
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}
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if (AMD_THREAD_TRACE_ENABLE) {
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threadTraceEnable_ = true;
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}
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// Disable non-aliased(multiUAV) optimization
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assumeAliases_ = true;
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break;
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default:
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assert(0 && "Unknown ASIC type!");
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return false;
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}
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// Enable atomics support
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enableExtension(ClKhrGlobalInt32BaseAtomics);
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enableExtension(ClKhrGlobalInt32ExtendedAtomics);
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enableExtension(ClKhrLocalInt32BaseAtomics);
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enableExtension(ClKhrLocalInt32ExtendedAtomics);
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enableExtension(ClKhrByteAddressableStore);
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enableExtension(ClKhrGlSharing);
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enableExtension(ClKhrGlEvent);
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enableExtension(ClAmdMediaOps);
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enableExtension(ClAmdMediaOps2);
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enableExtension(ClAmdPopcnt);
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#if defined(_WIN32)
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enableExtension(ClKhrD3d9Sharing);
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enableExtension(ClKhrD3d10Sharing);
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enableExtension(ClKhrD3d11Sharing);
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#endif // _WIN32
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enableExtension(ClKhr3DImageWrites);
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enableExtension(ClAmdVec3);
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enableExtension(ClAmdPrintf);
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enableExtension(ClExtAtomicCounters32);
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hwLDSSize_ = 32 * Ki;
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imageSupport_ = true;
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singleHeap_ = true;
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customSvmAllocator_ = true;
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// Use kernels for blit if appropriate
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blitEngine_ = BlitEngineKernel;
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#if cl_amd_open_video
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// Enable OpenVideo by default if CAL supports it
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if (calVideoAttr.max_decode_sessions > 0) {
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openVideo_ = true;
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if (GPU_OPEN_VIDEO)
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enableExtension(ClAmdOpenVideo);
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}
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#endif // cl_amd_open_video
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hostMemDirectAccess_ |= HostMemBuffer;
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// HW doesn't support untiled image writes
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// hostMemDirectAccess_ |= HostMemImage;
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asyncMemCopy_ = true;
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// Make sure device actually supports double precision
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doublePrecision_ = (calAttr.doublePrecision) ? doublePrecision_ : false;
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if (doublePrecision_) {
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// Enable KHR double precision extension
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enableExtension(ClKhrFp64);
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}
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if (calAttr.doublePrecision) {
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// Enable AMD double precision extension
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doublePrecision_ = true;
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enableExtension(ClAmdFp64);
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}
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if (calAttr.totalSDIHeap > 0) {
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//Enable bus addressable memory extension
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enableExtension(ClAMDBusAddressableMemory);
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}
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if (calAttr.longIdleDetect) {
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// KMD is unable to detect if we map the visible memory for CPU access, so
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// accessing persistent staged buffer may fail if LongIdleDetct is enabled.
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disablePersistent_ = true;
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}
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if (calAttr.priSupport) {
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svmAtomics_ = true;
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}
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// Enable some platform extensions
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enableExtension(ClAmdDeviceAttributeQuery);
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enableExtension(ClKhrSpir);
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// Enable some OpenCL 2.0 extensions
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if (oclVersion_ >= OpenCL20) {
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enableExtension(ClKhrSubGroups);
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}
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// Override current device settings
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override();
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return true;
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}
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void
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Settings::override()
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{
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// Limit reported workgroup size
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if (GPU_MAX_WORKGROUP_SIZE != 0) {
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maxWorkGroupSize_ = GPU_MAX_WORKGROUP_SIZE;
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}
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// Override blit engine type
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if (GPU_BLIT_ENGINE_TYPE != BlitEngineDefault) {
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blitEngine_ = GPU_BLIT_ENGINE_TYPE;
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}
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if (!flagIsDefault(DEBUG_GPU_FLAGS)) {
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debugFlags_ = DEBUG_GPU_FLAGS;
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}
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// Check async memory transfer
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if (!flagIsDefault(GPU_ASYNC_MEM_COPY)) {
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asyncMemCopy_ = GPU_ASYNC_MEM_COPY;
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}
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if (!flagIsDefault(DEBUG_GPU_FLAGS)) {
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debugFlags_ = DEBUG_GPU_FLAGS;
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}
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if (!flagIsDefault(GPU_XFER_BUFFER_SIZE)) {
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xferBufSize_ = GPU_XFER_BUFFER_SIZE * Ki;
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}
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if (!flagIsDefault(GPU_USE_SYNC_OBJECTS)) {
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syncObject_ = GPU_USE_SYNC_OBJECTS;
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}
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if (!flagIsDefault(GPU_NUM_COMPUTE_RINGS)) {
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numComputeRings_ = GPU_NUM_COMPUTE_RINGS;
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}
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if (!flagIsDefault(GPU_ASSUME_ALIASES)) {
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assumeAliases_ = GPU_ASSUME_ALIASES;
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}
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}
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} // namespace gpu
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Reference in New Issue
Block a user