SWDEV-554608 - Add hipHostRegisterIoMemory for hipHostRegister (#962)
* SWDEV-554608 - Add hipHostRegisterIoMemory for hipHostRegister * SWDEV-554608 - Add hipHostRegisterIoMemory for hipHostRegister * SWDEV-554174 Added hipHostRegisterIoMemory flag in test cases * SWDEV-554174 : Did formatting corrections * SWDEV-554608 - set HSA_AMD_MEMORY_POOL_UNCACHED_FLAG if IoMemory is set * SWDEV-554608 - set HSA_AMD_MEMORY_POOL_UNCACHED_FLAG if IoMemory is set * SWDEV-554608 - Add hipHostRegisterIoMemory for hipHostRegister --------- Co-authored-by: Anavena Venkatesh <Anavena.Venkatesh@amd.com> Co-authored-by: Rambabu Swargam <rambabu.swargam@amd.com>
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@@ -39,6 +39,16 @@ Full documentation for HIP is available at [rocm.docs.amd.com](https://rocm.docs
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- `hipGetDriverEntryPoint ` gets function pointer of a HIP API.
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- `hipSetValidDevices` sets a default list of devices that can be used by HIP
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- `hipStreamGetId` queries the id of a stream
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- `hipLibraryLoadData` Create library object from code
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- `hipLibraryLoadFromFile` Create library object from file
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- `hipLibraryUnload` Unload library
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- `hipLibraryGetKernel` Get a kernel from library
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- `hipLibraryGetKernelCount` Get kernel count in library
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* Changed HIP APIs
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- `hipMemAllocationType` now has hip exclusive enum hipMemAllocationTypeUncached
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- `hipMemCreate` now checks for hipMemAllocationTypeUncached enum from
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hipMemAllocationType and allocates uncached memory if so
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- `hipHostRegister` now supports hipHostRegisterIoMemory flag
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* Support for the flag `hipMemLocationTypeHost`, enables handling virtual memory management in host memory location, in addition to device memory.
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* Support for nested tile partitioning within cooperative groups, matching NVIDIA CUDA functionality.
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@@ -1287,7 +1287,7 @@ hipError_t hipHostGetFlags(unsigned int* flagsPtr, void* hostPtr) {
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hipError_t ihipHostRegister(void* hostPtr, size_t sizeBytes, unsigned int flags) {
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if (hostPtr == nullptr || sizeBytes == 0 ||
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flags & ~(hipHostRegisterPortable | hipHostRegisterMapped | hipExtHostRegisterCoarseGrained |
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hipExtHostRegisterUncached)) {
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hipExtHostRegisterUncached | hipHostRegisterIoMemory)) {
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return hipErrorInvalidValue;
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} else {
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unsigned int memFlags = CL_MEM_USE_HOST_PTR | CL_MEM_SVM_ATOMICS;
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@@ -1296,6 +1296,11 @@ hipError_t ihipHostRegister(void* hostPtr, size_t sizeBytes, unsigned int flags)
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return hipErrorInvalidValue;
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}
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memFlags |= ROCCLR_MEM_HSA_UNCACHED;
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} else if (flags & hipHostRegisterIoMemory) {
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if (IS_WINDOWS) {
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return hipErrorInvalidValue;
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}
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memFlags |= ROCCLR_MEM_IO_MEMORY;
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}
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amd::Memory* mem =
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@@ -1648,7 +1648,8 @@ class Device : public RuntimeObject {
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kNoAtomics = 0,
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kAtomics = 1,
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kKernArg = 2,
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kUncachedAtomics = 4
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kUncachedAtomics = 4,
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kIoMemory = 8
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} MemorySegment;
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typedef enum CacheState {
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@@ -2010,6 +2010,7 @@ hsa_amd_memory_pool_t Device::getHostMemoryPool(MemorySegment mem_seg,
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segment = agentInfo->fine_grain_pool;
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break;
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case kUncachedAtomics:
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case kIoMemory:
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if (agentInfo->ext_fine_grain_pool.handle != 0) {
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ClPrint(amd::LOG_DETAIL_DEBUG, amd::LOG_MEM,
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"Using extended fine grained access system memory pool");
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@@ -2032,6 +2033,7 @@ void* Device::hostAlloc(size_t size, size_t alignment, MemorySegment mem_seg,
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if (mem_seg == kKernArg) {
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memFlags |= HSA_AMD_MEMORY_POOL_EXECUTABLE_FLAG;
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}
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hsa_amd_memory_pool_t pool =
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getHostMemoryPool(mem_seg, static_cast<const amd::roc::AgentInfo*>(agentInfo));
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hsa_status_t stat = Hsa::memory_pool_allocate(pool, size, memFlags, &ptr);
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@@ -2099,8 +2101,13 @@ void* Device::hostNumaAlloc(size_t size, size_t alignment, MemorySegment mem_seg
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void* Device::hostLock(void* hostMem, size_t size, const MemorySegment memSegment) const {
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hsa_amd_memory_pool_t pool = getHostMemoryPool(memSegment);
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void* deviceMemory = nullptr;
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uint32_t memFlags = 0;
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if (memSegment == kIoMemory) {
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memFlags |= HSA_AMD_MEMORY_POOL_UNCACHED_FLAG;
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}
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hsa_status_t status = Hsa::memory_lock_to_pool(
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hostMem, size, const_cast<hsa_agent_t*>(&bkendDevice_), 1, pool, 0, &deviceMemory);
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hostMem, size, const_cast<hsa_agent_t*>(&bkendDevice_), 1, pool, memFlags, &deviceMemory);
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ClPrint(amd::LOG_DEBUG, amd::LOG_MEM,
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"Locking to pool %p, size 0x%zx, hostMem = %p,"
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" deviceMemory = %p, memSegment = %d",
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@@ -154,7 +154,9 @@ class Memory : public device::Memory {
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return (memFlags & CL_MEM_SVM_ATOMICS) == 0 ? Device::MemorySegment::kNoAtomics
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: ((memFlags & ROCCLR_MEM_HSA_UNCACHED) != 0
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? Device::MemorySegment::kUncachedAtomics
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: Device::MemorySegment::kAtomics);
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: ((memFlags & ROCCLR_MEM_IO_MEMORY) != 0
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? Device::MemorySegment::kIoMemory
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: Device::MemorySegment::kAtomics));
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}
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private:
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@@ -44,6 +44,7 @@
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#define ROCCLR_MEM_INTERPROCESS (1u << 26)
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#define ROCCLR_MEM_PHYMEM (1u << 25)
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#define ROCCLR_MEM_HSA_CONTIGUOUS (1u << 24)
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#define ROCCLR_MEM_IO_MEMORY (1u << 23)
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namespace amd::device {
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class Memory;
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