SWDEV-273943 - Enable runtimeApi.event dtest
Add device_id_ in hip::event to match cuda behaviour in hipEventQuery() and hipEventRecord(). Enable hipEventElapsedTime test on AMD platform. Workarround sporadic crash of hipEventIpc test due to some bug of event ipc. Add missing hipEventDestroy() in some event tests. Fix some logic code errors. Fix typo in comment. Change-Id: I9ec74c475161b3e31df48d193449023e921f2924
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@@ -23,7 +23,7 @@ ROCm defines two coherency options for host memory:
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IP provides the developer with controls to select which type of memory is used via allocation flags passed to hipHostMalloc and the HIP_HOST_COHERENT environment variable:
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- hipHostllocCoherent=0, hipHostMallocNonCoherent=0: Use HIP_HOST_COHERENT environment variable:
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- If HIP_HOST_COHERENT is 1 or undefined, the host memory allocation is coherent.
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- If host memory is `defined and 0: the host memory allocation is non-coherent.
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- If HIP_HOST_COHERENT is `defined and 0: the host memory allocation is non-coherent.
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- hipHostMallocCoherent=1, hipHostMallocNonCoherent=0: The host memory allocation will be coherent. HIP_HOST_COHERENT env variable is ignored.
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- hipHostMallocCoherent=0, hipHostMallocNonCoherent=1: The host memory allocation will be non-coherent. HIP_HOST_COHERENT env variable is ignored.
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- hipHostMallocCoherent=1, hipHostMallocNonCoherent=1: Illegal.
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