diff --git a/runtime/hsa-runtime/core/inc/isa.h b/runtime/hsa-runtime/core/inc/isa.h
index 1dd6576cc7..c5dba5f75b 100644
--- a/runtime/hsa-runtime/core/inc/isa.h
+++ b/runtime/hsa-runtime/core/inc/isa.h
@@ -110,6 +110,10 @@ class Isa final: public amd::hsa::common::Signed<0xB13594F2BD8F212D> {
   const bool &xnackEnabled() const {
     return xnackEnabled_;
   }
+  /// @returns True if this Isa has sram ecc enabled, false otherwise.
+  const bool &sramEccEnabled() const {
+    return sramEcc_;
+  }
   /// @returns This Isa's supported wavefront.
   const Wavefront &wavefront() const {
     return wavefront_;
@@ -181,13 +185,13 @@ class Isa final: public amd::hsa::common::Signed<0xB13594F2BD8F212D> {
 
  private:
   /// @brief Default constructor.
-  Isa(): version_(Version(-1, -1, -1)), xnackEnabled_(false) {}
+  Isa(): version_(Version(-1, -1, -1)), xnackEnabled_(false), sramEcc_(false) {}
 
   /// @brief Construct from @p version.
-  Isa(const Version &version): version_(version), xnackEnabled_(false) {}
+  Isa(const Version &version): version_(version), xnackEnabled_(false), sramEcc_(false) {}
 
   /// @brief Construct from @p version.
-  Isa(const Version &version, const bool xnack): version_(version), xnackEnabled_(xnack) {}
+  Isa(const Version &version, const bool xnack, const bool ecc): version_(version), xnackEnabled_(xnack), sramEcc_(ecc) {}
 
   /// @brief Isa's version.
   Version version_;
@@ -195,6 +199,9 @@ class Isa final: public amd::hsa::common::Signed<0xB13594F2BD8F212D> {
   /// @brief Isa's supported xnack flag.
   bool xnackEnabled_;
 
+  /// @brief Isa's sram ecc flag.
+  bool sramEcc_;
+
   /// @brief Isa's supported wavefront.
   Wavefront wavefront_;
 
@@ -209,7 +216,7 @@ class IsaRegistry final {
   /// @returns Isa for requested @p full_name, null pointer if not supported.
   static const Isa *GetIsa(const std::string &full_name);
   /// @returns Isa for requested @p version, null pointer if not supported.
-  static const Isa *GetIsa(const Isa::Version &version, bool xnack);
+  static const Isa *GetIsa(const Isa::Version &version, bool xnack, bool ecc);
 
  private:
   /// @brief IsaRegistry's map type.
diff --git a/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp b/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp
index d41542cffa..e9e1e94d59 100644
--- a/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp
+++ b/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp
@@ -97,9 +97,10 @@ GpuAgent::GpuAgent(HSAuint32 node, const HsaNodeProperties& node_props)
   assert(err == HSAKMT_STATUS_SUCCESS && "hsaGetClockCounters error");
 
   // Set instruction set architecture via node property, only on GPU device.
-  isa_ = (core::Isa*)core::IsaRegistry::GetIsa(core::Isa::Version(
-      node_props.EngineId.ui32.Major, node_props.EngineId.ui32.Minor,
-      node_props.EngineId.ui32.Stepping), profile_ == HSA_PROFILE_FULL);
+  isa_ = (core::Isa*)core::IsaRegistry::GetIsa(
+      core::Isa::Version(node_props.EngineId.ui32.Major, node_props.EngineId.ui32.Minor,
+                         node_props.EngineId.ui32.Stepping),
+      profile_ == HSA_PROFILE_FULL, node_props.Capability.ui32.SRAM_EDCSupport == 1);
 
   // Check if the device is Kaveri, only on GPU device.
   if (isa_->GetMajorVersion() == 7 && isa_->GetMinorVersion() == 0 &&
diff --git a/runtime/hsa-runtime/core/runtime/amd_loader_context.cpp b/runtime/hsa-runtime/core/runtime/amd_loader_context.cpp
index 3701b4210b..14b2b4de34 100644
--- a/runtime/hsa-runtime/core/runtime/amd_loader_context.cpp
+++ b/runtime/hsa-runtime/core/runtime/amd_loader_context.cpp
@@ -378,11 +378,17 @@ hsa_status_t IsIsaEquivalent(hsa_isa_t isa, void *data) {
   assert(data_pair->first.handle != 0);
   assert(data_pair->second != true);
 
-  const core::Isa *isa1 = core::Isa::Object(isa);
-  assert(isa1);
-  const core::Isa *isa2 = core::Isa::Object(data_pair->first);
-  assert(isa2);
-  if (isa1->version() == isa2->version()) {
+  const core::Isa *agent_isa = core::Isa::Object(isa);
+  assert(agent_isa);
+  const core::Isa *code_object_isa = core::Isa::Object(data_pair->first);
+  assert(code_object_isa);
+
+  // SRAM ECC enabled code may run on a system without ECC
+  // but a system which has ECC enabled requires ECC enabled code.
+  if (agent_isa->sramEccEnabled() && !code_object_isa->sramEccEnabled())
+    return HSA_STATUS_SUCCESS;
+
+  if (agent_isa->version() == code_object_isa->version()) {
     data_pair->second = true;
     return HSA_STATUS_INFO_BREAK;
   }
diff --git a/runtime/hsa-runtime/core/runtime/amd_topology.cpp b/runtime/hsa-runtime/core/runtime/amd_topology.cpp
index 49a8b3e912..1b1438fc18 100644
--- a/runtime/hsa-runtime/core/runtime/amd_topology.cpp
+++ b/runtime/hsa-runtime/core/runtime/amd_topology.cpp
@@ -68,7 +68,7 @@ static const uint kKfdVersionMinor = 99;
 
 #ifndef NDEBUG
 static bool PrintUsrGpuMap(std::map<uint32_t, int32_t>& gpu_usr_map) {
-  (void)PrintUsrGpuMap; //Suppress unused symbol warning.
+  (void)PrintUsrGpuMap;  // Suppress unused symbol warning.
   std::map<uint32_t, int32_t>::iterator it;
   for (it = gpu_usr_map.begin(); it != gpu_usr_map.end(); it++) {
     int32_t usrIdx = it->second;
diff --git a/runtime/hsa-runtime/core/runtime/isa.cpp b/runtime/hsa-runtime/core/runtime/isa.cpp
index 431ed6ebfd..7c9768c104 100644
--- a/runtime/hsa-runtime/core/runtime/isa.cpp
+++ b/runtime/hsa-runtime/core/runtime/isa.cpp
@@ -44,6 +44,7 @@
 
 #include <cstring>
 #include <sstream>
+#include <utility>
 
 namespace core {
 
@@ -74,6 +75,9 @@ std::string Isa::GetFullName() const {
   if (xnackEnabled_)
     full_name << "+xnack";
 
+  if (sramEcc_)
+    full_name << "+sram-ecc";
+
   return full_name.str();
 }
 
@@ -180,8 +184,8 @@ const Isa *IsaRegistry::GetIsa(const std::string &full_name) {
   return isareg_iter == supported_isas_.end() ? nullptr : &isareg_iter->second;
 }
 
-const Isa *IsaRegistry::GetIsa(const Isa::Version &version, bool xnack) {
-  auto isareg_iter = supported_isas_.find(Isa(version, xnack).GetFullName());
+const Isa *IsaRegistry::GetIsa(const Isa::Version &version, bool xnack, bool ecc) {
+  auto isareg_iter = supported_isas_.find(Isa(version, xnack, ecc).GetFullName());
   return isareg_iter == supported_isas_.end() ? nullptr : &isareg_iter->second;
 }
 
@@ -189,27 +193,29 @@ const IsaRegistry::IsaMap IsaRegistry::supported_isas_ =
   IsaRegistry::GetSupportedIsas();
 
 const IsaRegistry::IsaMap IsaRegistry::GetSupportedIsas() {
-#define ISAREG_ENTRY_GEN(maj, min, stp, xnack)                                 \
-  Isa amd_amdgpu_##maj##min##stp##xnack;                                       \
-  amd_amdgpu_##maj##min##stp##xnack.version_ = Isa::Version(maj, min, stp);    \
-  amd_amdgpu_##maj##min##stp##xnack.xnackEnabled_ = xnack;                     \
-  supported_isas.insert(std::make_pair(                                        \
-      amd_amdgpu_##maj##min##stp##xnack.GetFullName(),                         \
-      amd_amdgpu_##maj##min##stp##xnack));                                     \
+#define ISAREG_ENTRY_GEN(maj, min, stp, xnack, ecc)                                 \
+  Isa amd_amdgpu_##maj##min##stp##xnack##ecc;                                       \
+  amd_amdgpu_##maj##min##stp##xnack##ecc.version_ = Isa::Version(maj, min, stp);    \
+  amd_amdgpu_##maj##min##stp##xnack##ecc.xnackEnabled_ = xnack;                     \
+  amd_amdgpu_##maj##min##stp##xnack##ecc.sramEcc_ = ecc;                            \
+  supported_isas.insert(std::make_pair(                                             \
+      amd_amdgpu_##maj##min##stp##xnack##ecc.GetFullName(),                         \
+      amd_amdgpu_##maj##min##stp##xnack##ecc));                                     \
 
   IsaMap supported_isas;
 
-  ISAREG_ENTRY_GEN(7, 0, 0, false)
-  ISAREG_ENTRY_GEN(7, 0, 1, false)
-  ISAREG_ENTRY_GEN(7, 0, 2, false)
-  ISAREG_ENTRY_GEN(8, 0, 1, true)
-  ISAREG_ENTRY_GEN(8, 0, 2, false)
-  ISAREG_ENTRY_GEN(8, 0, 3, false)
-  ISAREG_ENTRY_GEN(8, 1, 0, true)
-  ISAREG_ENTRY_GEN(9, 0, 0, false)
-  ISAREG_ENTRY_GEN(9, 0, 2, true)
-  ISAREG_ENTRY_GEN(9, 0, 4, false)
-  ISAREG_ENTRY_GEN(9, 0, 6, false)
+  ISAREG_ENTRY_GEN(7, 0, 0, false, false)
+  ISAREG_ENTRY_GEN(7, 0, 1, false, false)
+  ISAREG_ENTRY_GEN(7, 0, 2, false, false)
+  ISAREG_ENTRY_GEN(8, 0, 1, true,  false)
+  ISAREG_ENTRY_GEN(8, 0, 2, false, false)
+  ISAREG_ENTRY_GEN(8, 0, 3, false, false)
+  ISAREG_ENTRY_GEN(8, 1, 0, true,  false)
+  ISAREG_ENTRY_GEN(9, 0, 0, false, false)
+  ISAREG_ENTRY_GEN(9, 0, 2, true,  false)
+  ISAREG_ENTRY_GEN(9, 0, 4, false, false)
+  ISAREG_ENTRY_GEN(9, 0, 6, false, false)
+  ISAREG_ENTRY_GEN(9, 0, 6, false, true )
 
   return supported_isas;
 }
diff --git a/runtime/hsa-runtime/inc/amd_hsa_elf.h b/runtime/hsa-runtime/inc/amd_hsa_elf.h
index ac3e5e2c30..60f0c6d44a 100644
--- a/runtime/hsa-runtime/inc/amd_hsa_elf.h
+++ b/runtime/hsa-runtime/inc/amd_hsa_elf.h
@@ -68,6 +68,7 @@
 #define EF_AMDGPU_MACH_AMDGCN_GFX906_LC 0x02f
 #define EF_AMDGPU_MACH_AMDGCN_GFX909_LC 0x031
 #define EF_AMDGPU_XNACK_LC 0x100
+#define EF_AMDGPU_SRAM_ECC_LC 0x200
 
 // ELF Section Header Flag Enumeration Values.
 #define SHF_AMDGPU_HSA_GLOBAL   (0x00100000 & SHF_MASKOS)
diff --git a/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp b/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
index 30980d2a06..86570e7b91 100644
--- a/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
+++ b/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
@@ -583,7 +583,7 @@ namespace code {
       if (IsFinalizer && (EFlags & EF_AMDGPU_XNACK)) {
         NewName = NewName + "+xnack";
       } else {
-        if (EFlags != 0 && (EFlags & EF_AMDGPU_XNACK_LC)) {
+        if (EFlags & EF_AMDGPU_XNACK_LC) {
           NewName = NewName + "+xnack";
         } else {
           if (OldName == "AMD:AMDGPU:8:0:1")
@@ -599,6 +599,9 @@ namespace code {
         }
       }
 
+      if (EFlags & EF_AMDGPU_SRAM_ECC_LC)
+        NewName += "+sram-ecc";
+
       return NewName;
     }
 
@@ -631,6 +634,9 @@ namespace code {
         if (img->EFlags() & EF_AMDGPU_XNACK_LC)
           isaName += "+xnack";
 
+        if (img->EFlags() & EF_AMDGPU_SRAM_ECC_LC)
+          isaName += "+sram-ecc";
+
         return true;
       } else {
         std::string vendor_name, architecture_name;
diff --git a/runtime/hsa-runtime/libamdhsacode/amd_hsa_code_util.cpp b/runtime/hsa-runtime/libamdhsacode/amd_hsa_code_util.cpp
index 9d7f558a79..922a5364eb 100644
--- a/runtime/hsa-runtime/libamdhsacode/amd_hsa_code_util.cpp
+++ b/runtime/hsa-runtime/libamdhsacode/amd_hsa_code_util.cpp
@@ -108,7 +108,7 @@ bool IsAccessibleMemoryAddress(uint64_t address)
   int32_t random_fd = 0;
   ssize_t bytes_written = 0;
   if (-1 == (random_fd = open("/dev/random", O_WRONLY))) {
-    return false;
+    return true;  // Skip check if /dev/random is not available.
   }
   bytes_written = write(random_fd, (void*)address, 1);
   if (-1 == close(random_fd)) {