diff --git a/projects/clr/rocclr/compiler/lib/utils/OPTIONS.def b/projects/clr/rocclr/compiler/lib/utils/OPTIONS.def index 196cb35852..f0da7ee395 100644 --- a/projects/clr/rocclr/compiler/lib/utils/OPTIONS.def +++ b/projects/clr/rocclr/compiler/lib/utils/OPTIONS.def @@ -1226,6 +1226,15 @@ OPTION(OT_BOOL, \ false, 0, 0, NULL, \ "Do round-trip translation of SPIR-V in pre-linking for testing purpose.") +// -force-wave-size-32 +OPTION(OT_BOOL, \ + OA_RUNTIME|OVIS_SUPPORT|OVA_DISALLOWED|OFA_NORMAL, \ + "force-wave-size-32", NULL, \ + SCForceWaveSize32, \ + false, 0, 0, NULL, \ + "Force wave size 32 for compute shader compilation") + + /* Do not remove the following line. Any option should be added above this line. diff --git a/projects/clr/rocclr/runtime/device/pal/palprogram.cpp b/projects/clr/rocclr/runtime/device/pal/palprogram.cpp index 989ead020c..54c0839063 100644 --- a/projects/clr/rocclr/runtime/device/pal/palprogram.cpp +++ b/projects/clr/rocclr/runtime/device/pal/palprogram.cpp @@ -598,6 +598,10 @@ bool HSAILProgram::linkImpl(amd::option::Options* options) { if (dev().settings().svmFineGrainSystem_) { fin_options.append(" -sc-xnack-iommu"); } + if (dev().settings().gfx10Plus_ && GPU_FORCE_WAVE_SIZE_32) { + fin_options.append(" -force-wave-size-32"); + } + errorCode = aclCompile(dev().compiler(), binaryElf_, fin_options.c_str(), ACL_TYPE_CG, ACL_TYPE_ISA, nullptr); buildLog_ += aclGetCompilerLog(dev().compiler()); diff --git a/projects/clr/rocclr/runtime/utils/flags.hpp b/projects/clr/rocclr/runtime/utils/flags.hpp index aba52edb5b..7db658aee6 100644 --- a/projects/clr/rocclr/runtime/utils/flags.hpp +++ b/projects/clr/rocclr/runtime/utils/flags.hpp @@ -213,6 +213,9 @@ release_on_stg(bool, PAL_DISABLE_SDMA, false, \ "1 = Disable SDMA for PAL") \ release_on_stg(uint, PAL_RGP_DISP_COUNT, 10, \ "The number of dispatches for RGP capture with SQTT") \ +release(bool, GPU_FORCE_WAVE_SIZE_32, false, \ + "Forces WaveSize32 compilation in SC") \ + namespace amd {