NCCL 2.27.5-1
Improvements for GB200 systems * Optimize the network performance by alternating the direction of the rings and the NIC to GPU assignment across communicators to limit unnecessary sharing. * Fix the detection of C2C links in case GPU Direct RDMA is disabled between a GPU and a NIC. * Fix PXN support on MNNVL systems, where NCCL would try (and fail) to share regular host memory across multiple nodes. * Fix P2C (PXN over C2C), which is now preferred over regular PXN. This support is currently preliminary and is disabled by default; use NCCL_PXN_C2C=1 to enable. Further reduce the overheads of CUDA graph capturing, which increased in NCCL 2.26.2 for large graphs. Optimize the network performance on DGX B200 systems by adjusting the bandwidths provided to the graph search algorithm. Enable fp8 reductions in symmetric kernels on Blackwell with CUDA 12.8. Restore the plugin name handling logic to make it possible to specify a path to the plugin (Issue #1732). Restore the ability to change NCCL_COLLNET_ENABLE during execution (Issue #1741). Add an example tuner plugin with CSV-based overrides. Remove an x86 dependency from the example profiler.
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@@ -494,7 +494,9 @@ static int ibvSpeeds[] = {
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14000, /* FDR */
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25000, /* EDR */
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50000, /* HDR */
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100000 /* NDR */ };
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100000, /* NDR */
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200000 /* XDR */
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};
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static int firstBitSet(int val, int max) {
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int i = 0;
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@@ -654,7 +656,7 @@ ncclResult_t ncclIbInit(ncclDebugLogger_t logFunction, ncclProfilerCallback_t pr
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ibProvider = IB_PROVIDER_MLX5;
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snprintf(dataDirectDevicePath, PATH_MAX, "/sys");
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if((ncclMlx5dvDmaBufCapable(context)) && (wrap_mlx5dv_get_data_direct_sysfs_path(context, dataDirectDevicePath + 4, PATH_MAX - 4) == ncclSuccess)) {
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INFO(NCCL_NET, "Data Direct DMA Interface is detected for device:%s", devices[d]->name);
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INFO(NCCL_INIT|NCCL_NET, "Data Direct DMA Interface is detected for device:%s", devices[d]->name);
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if(ncclParamIbDataDirect()) dataDirectSupported = 1;
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}
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}
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