Compiler warnings fix 2 (#1801)
* Changes to device code * Changes to src/misc * Changes to graph * src/include changes * src/transport changes * changes in init, enqueue, proxy * Changes to CMakeLists.txt * Additional changes to device code * Additional changes to net.cc * adding 'compiler warning' tag to ease upstream merge' * typo correction * Addessing comments * Additional changes for new commits
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+6
-4
@@ -286,14 +286,17 @@ ncclResult_t ncclTopoCheckP2p(struct ncclComm* comm, struct ncclTopoSystem* syst
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// GPU not found, we can't use p2p.
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return ncclSuccess;
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}
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#if !defined(__HIP_PLATFORM_AMD__) && !defined(__HIPCC__)
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int intermediateIndex = -1;
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#endif
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// Set intermediate GPU rank, if routing through an intermediate GPU.
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struct ncclTopoLinkList* path = gpu1->paths[GPU]+g2;
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if (path->count == 2) {
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struct ncclTopoNode* intermediateNode = path->list[0]->remNode;
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if (intermediateNode->type == GPU) {
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#if !defined(__HIP_PLATFORM_AMD__) && !defined(__HIPCC__)
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intermediateIndex = intermediateNode - system->nodes[GPU].nodes;
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#endif
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if (intermediateRank) *intermediateRank = intermediateNode->gpu.rank;
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}
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}
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@@ -324,8 +327,7 @@ compare:
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// Compute the PCI distance and compare with the p2pLevel.
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if (path->type <= p2pLevel) *p2p = 1;
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#if defined(__HIP_PLATFORM_AMD__) || defined(__HIPCC__)
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#else
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#if !defined(__HIP_PLATFORM_AMD__) && !defined(__HIPCC__)
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if (*p2p == 1) {
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// NCCL_IGNORE_DISABLED_P2P=2 is used by unit tests that don't want to
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// validate against NVML at all since they are pretending to be on other hw.
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@@ -515,10 +517,10 @@ ncclResult_t ncclTopoNeedFlush(struct ncclComm* comm, int64_t netId, int netDev,
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int g;
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struct ncclTopoSystem* system = comm->topo;
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NCCLCHECK(ncclTopoRankToIndex(system, rank, &g));
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struct ncclTopoNode* gpu = system->nodes[GPU].nodes+g;
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#if defined(__HIP_PLATFORM_AMD__) || defined(__HIPCC__)
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*flush = 1;
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#else
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struct ncclTopoNode* gpu = system->nodes[GPU].nodes+g; // unused variable - compiler warning
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// Flush is required on Ampere and earlier
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if (gpu->gpu.cudaCompCap >= 90) *flush = 0;
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// On C2C platforms, data could go through a PCI switch while completions and
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