Enable roofline for MI350 series (#677)

Rework of roofline binaries generated from rocm-amdgpu-bench
- removed arch identifier in bin name
- removed rocm5 bins altogether

Updated required distros for roofline
- updated distro checks and bin naming
- moved up ubuntu20.04->22.04 and sles15.3->15.6 per rocm support

Enabled ctests for mi350 for test_roof_*
- removed mi350 series check to skip these specific tests

---------

Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com>

src/rocprof_compute_soc/profile_configs/gfx950/roofline/pmc_roof_perf.txt

@@ -0,0 +1,12 @@
+pmc: SQ_INSTS_VALU_ADD_F16   SQ_INSTS_VALU_MUL_F16   SQ_INSTS_VALU_FMA_F16   SQ_INSTS_VALU_TRANS_F16  SQ_INSTS_VALU_ADD_F32       SQ_INSTS_VALU_MUL_F32         SQ_INSTS_VALU_FMA_F32       SQ_INSTS_VALU_TRANS_F32
+
+pmc: SQ_INSTS_VALU_ADD_F64   SQ_INSTS_VALU_MUL_F64   SQ_INSTS_VALU_FMA_F64   SQ_INSTS_VALU_TRANS_F64  SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16  SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 TCP_TCC_READ_REQ_sum TCC_EA0_RDREQ_32B_sum    TCC_EA0_RDREQ_sum    TCC_EA0_WRREQ_64B_sum    TCC_EA0_WRREQ_sum   TCC_BUBBLE_sum
+
+pmc: SQ_LDS_IDX_ACTIVE    SQ_LDS_BANK_CONFLICT    TCP_TOTAL_CACHE_ACCESSES_sum    TCP_TCC_WRITE_REQ_sum    TCP_TCC_ATOMIC_WITH_RET_REQ_sum    TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum
+
+#ROOF:MI300 series and above
+pmc: SQ_INSTS_VALU_MFMA_MOPS_F8
+
+range:
+gpu:
+kernels:

src/rocprof_compute_soc/soc_gfx950.py

@@ -46,17 +46,6 @@ class gfx950_soc(OmniSoC_Base):
                     )
                 )
             )
-        else:
-            # NB: We're using generalized Mi300 perfmon configs
-            self.set_perfmon_dir(
-                str(
-                    Path(str(config.rocprof_compute_home)).joinpath(
-                        "rocprof_compute_soc",
-                        "profile_configs",
-                        "gfx950",
-                    )
-                )
-            )
         self.set_compatible_profilers(["rocprofv3"])
         # Per IP block max number of simultaneous counters. GFX IP Blocks
         self.set_perfmon_config(