Adding gfx941 and gfx942
Adding support for gfx941 and gfx942 ISAs. gfx940 ISA will use sc0:1 sc1:1 on load/store operations gfx942 ISA will use default load/store operations Change-Id: If1efbef86f59e2cf2d48fe359cd4166405a0a579
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@@ -581,6 +581,8 @@ namespace code {
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90A: MI.Name = "gfx90a"; MI.XnackSupported = true; MI.SrameccSupported = true; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C: MI.Name = "gfx90c"; MI.XnackSupported = true; MI.SrameccSupported = false; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX940: MI.Name = "gfx940"; MI.XnackSupported = true; MI.SrameccSupported = true; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX941: MI.Name = "gfx941"; MI.XnackSupported = true; MI.SrameccSupported = true; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX942: MI.Name = "gfx942"; MI.XnackSupported = true; MI.SrameccSupported = true; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010: MI.Name = "gfx1010"; MI.XnackSupported = true; MI.SrameccSupported = false; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011: MI.Name = "gfx1011"; MI.XnackSupported = true; MI.SrameccSupported = false; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: MI.Name = "gfx1012"; MI.XnackSupported = true; MI.SrameccSupported = false; break;
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