diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/util/flag.h b/projects/rocr-runtime/runtime/hsa-runtime/core/util/flag.h index fcba3536cd..fec4d646ff 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/util/flag.h +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/util/flag.h @@ -273,6 +273,9 @@ class Flag { else fprintf(stderr, "Failed to parse HSA_ASYNCEVENTS_THREAD_PRIORITY"); } + + var = os::GetEnvVar("HSA_IMAGE_ENABLE_3D_SWIZZLE_DEBUG"); + enable_3d_swizzle_ = (var == "1") ? true : false; } void parse_masks(uint32_t maxGpu, uint32_t maxCU) { @@ -391,6 +394,8 @@ class Flag { int async_events_thread_priority() const { return async_events_thread_priority_; } + bool enable_3d_swizzle() const { return enable_3d_swizzle_; } + private: bool check_flat_scratch_; bool enable_vm_fault_message_; @@ -423,6 +428,7 @@ class Flag { bool dev_mem_queue_; uint32_t signal_abort_timeout_; int async_events_thread_priority_; + bool enable_3d_swizzle_ = false; SDMA_OVERRIDE enable_sdma_; SDMA_OVERRIDE enable_peer_sdma_; diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx12/gfx12addrlib.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx12/gfx12addrlib.cpp index 1b2e5e563d..d80b221bb4 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx12/gfx12addrlib.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/addrlib/src/gfx12/gfx12addrlib.cpp @@ -1253,7 +1253,8 @@ void Gfx12Lib::SanityCheckSurfSize( // image, at least for single samples) but they still have the same number of mip levels as the // parent image. This disconnect produces false assertions below as the image size doesn't apparently // support the specified number of mip levels. - ((pIn->flags.hiZHiS == 0) || (pIn->numMipLevels == 1))) + ((pIn->flags.hiZHiS == 0) || (pIn->numMipLevels == 1)) && + !(pIn->flags.view3dAs2dArray)) { UINT_32 lastMipSize = 1; UINT_32 dataChainSize = 0; diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_gfx12.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_gfx12.cpp index a573d69911..8606f279dc 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_gfx12.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/image_manager_gfx12.cpp @@ -48,6 +48,7 @@ #include #include +#include "core/inc/runtime.h" #include "inc/hsa_ext_amd.h" #include "core/inc/hsa_internal.h" #include "core/util/utils.h" @@ -681,9 +682,39 @@ uint32_t ImageManagerGfx12::GetAddrlibSurfaceInfoNv( break; case HSA_EXT_IMAGE_GEOMETRY_3D: - in.resourceType = ADDR_RSRC_TEX_3D; - break; + { + in.resourceType = ADDR_RSRC_TEX_3D; + /* + * 3D swizzle modes on GFX12 enforces alignment + * of the number of slices to the block depth. + * If numSlices = 3 then the 3 slices are + * interleaved for 3D locality among the 8 slices + * that make up each block. This causes the memory + * footprint to jump from an ideal size of ~12 GB + * to ~32 GB. + * 'enable3DSwizzleMode' flag tests for env variable + * HSA_IMAGE_ENABLE_3D_SWIZZLE_DEBUG to enable or disable + * 3D swizzle: + * true: Keep view3dAs2dArray = 0 for real 3D interleaving. + * false: Use view3dAs2dArray = 1 to avoid the alignment + * expansion. + * 2D swizzle modes can lower size overhead but may yield + * suboptimal cache behavior for fully 3D volumetric + * operations. + */ + bool enable3DSwizzleMode = core::Runtime::runtime_singleton_->flag().enable_3d_swizzle(); + if (enable3DSwizzleMode) + { + in.flags.view3dAs2dArray = 0; + } + else + { + in.flags.view3dAs2dArray = 1; + } + break; + } } + in.flags.texture = 1; if (tileMode == Image::TileMode::LINEAR) @@ -779,6 +810,7 @@ uint32_t ImageManagerGfx12::GetAddrlibSurfaceInfoNv( minSize = surfaceSize; bestSwizzle = (Addr3SwizzleMode) i; } else if ((surfaceSize * ratioHigh) <= (minSize * ratioLow)) { + minSize = surfaceSize; bestSwizzle = (Addr3SwizzleMode) i; } }