diff --git a/projects/rocprofiler-compute/CHANGELOG.md b/projects/rocprofiler-compute/CHANGELOG.md index 9b50097899..c7d4873edb 100644 --- a/projects/rocprofiler-compute/CHANGELOG.md +++ b/projects/rocprofiler-compute/CHANGELOG.md @@ -13,6 +13,12 @@ Full documentation for ROCm Compute Profiler is available at [https://rocm.docs. * ``--no-native-tool`` option is provided, forcing usage of the default profiler. * When performing a dynamic attach to a process for profiling. +* Iteration multiplexing to collect counters in single application run: + * Is incompatible with --no-native-tool + * Two options: + * kernel: Counters are collected in a round robin fashion for unique kernels. + * kernel_launch_params: Counters are collected in a round robin fashion for unique kernels having the exact same launch parameters. + ### Changed * Default output format for the underlying ROCprofiler-SDK tool has been changed from ``csv`` to ``rocpd``. diff --git a/projects/rocprofiler-compute/CMakeLists.txt b/projects/rocprofiler-compute/CMakeLists.txt index 25fdf218d2..8e10a7034f 100644 --- a/projects/rocprofiler-compute/CMakeLists.txt +++ b/projects/rocprofiler-compute/CMakeLists.txt @@ -340,6 +340,15 @@ add_test( WORKING_DIRECTORY ${PROJECT_SOURCE_DIR} ) +add_test( + NAME test_profile_iteration_multiplexing + COMMAND + ${Python3_EXECUTABLE} -m pytest -s -m iteration_multiplexing + --junitxml=tests/test_profile_iteration_multiplexing.xml ${COV_OPTION} + ${PROJECT_SOURCE_DIR}/tests/test_profile_general.py + WORKING_DIRECTORY ${PROJECT_SOURCE_DIR} +) + set_tests_properties( test_profile_kernel_execution test_profile_dispatch @@ -354,6 +363,7 @@ set_tests_properties( test_profile_pc_sampling test_profile_sets_func test_profile_live_attach_detach + test_profile_iteration_multiplexing PROPERTIES LABELS "profile" RESOURCE_GROUPS gpus:1 TIMEOUT 1800 ) @@ -583,7 +593,7 @@ install( COMPONENT main ) -#install librocprofiler-compute-tool.so +# install librocprofiler-compute-tool.so install( TARGETS rocprofiler-compute-tool LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR}/rocprofiler-compute COMPONENT main diff --git a/projects/rocprofiler-compute/docs/how-to/analyze/cli.rst b/projects/rocprofiler-compute/docs/how-to/analyze/cli.rst index c6013455d3..035eb0992e 100644 --- a/projects/rocprofiler-compute/docs/how-to/analyze/cli.rst +++ b/projects/rocprofiler-compute/docs/how-to/analyze/cli.rst @@ -350,6 +350,11 @@ Show System Speed-of-Light and CS_Busy blocks only this case, ``1`` is the ID for System Speed-of-Light and ``5.1.0`` the ID for GPU Busy Cycles metric. +.. note:: + + Dispatch filtering via ``-d`` or ``--dispatch`` is not supported for profiling + data collected with ``--iteration-multiplexing`` option. + Filter kernels First, list the top kernels in your application using `--list-stats`. diff --git a/projects/rocprofiler-compute/docs/how-to/profile/mode.rst b/projects/rocprofiler-compute/docs/how-to/profile/mode.rst index 47397da4c1..b2e6206a68 100644 --- a/projects/rocprofiler-compute/docs/how-to/profile/mode.rst +++ b/projects/rocprofiler-compute/docs/how-to/profile/mode.rst @@ -39,6 +39,9 @@ Profiling with ROCm Compute Profiler yields the following benefits. * :ref:`Standalone roofline `: Isolate a subset of built-in metrics or build your own profiling configuration. +* :ref:`Iteration multiplexing `: Collect a large number of + performance counters with minimal profiling overhead. + Run ``rocprof-compute profile -h`` for more details. See :ref:`Basic usage `. @@ -655,3 +658,104 @@ plot. :align: center :alt: Sample ROCm Compute Profiler roofline output :width: 800 + + +.. _iteration-multiplexing: + +Iteration Multiplexing +======================== + +To reduce profiling overhead when collecting a large number of performance counters, +ROCm Compute Profiler supports iteration multiplexing. This technique divides the +total set of requested performance counters into smaller subsets that can be collected +over multiple iterations of the kernel execution. Each iteration collects a different +subset of counters, and the results are later combined to provide a comprehensive view +of the performance metrics. + +Usage +----- + +To enable iteration multiplexing in ROCm Compute Profiler, use the +``--iteration-multiplexing`` option in your profiling command. You can optionally specify +the policy for multiplexing. The available policies are: + +* ``kernel`` + The counters are divided based on the kernels being executed. Each kernel call + for a particular kernel collects a different subset of counters. +* ``kernel_launch_params`` + The counters are divided based on both the kernels and their launch parameters. + This allows for more granular control over counter collection. Each unique combination of kernel and launch + parameters collects a different subset of counters. + +By default, if no policy is specified, ROCm Compute Profiler uses the ``kernel_launch_params`` policy. + +.. note:: + + * Do not use ``--no-native-tool`` with ``--iteration-multiplexing``. + Iteration multiplexing is only supported when using ROCm Compute Profiler with + the native counter collection tool. Ensure that ``--no-native-tool`` is not used in your profiling command. + + * Ensure that your workload runs for enough iterations to cover all counter subsets. + When using iteration multiplexing, the total number of iterations, for each kernel (for ``kernel`` policy) + or for each unique kernel and launch parameters combination (for ``kernel_launch_params`` policy), + specified in the workload should be sufficient to cover all subsets of counters. If the number of iterations + is too low, some counters may not be collected. + + * Launch paramaters for ``kernel_launch_params`` policy. + Launch parameters refer to the following paramaters. + - Grid size + - Workgroup size + - LDS size + +The following example demonstrates how to use iteration multiplexing with the +``vcopy`` workload: + +.. code-block:: shell-session + + $ rocprof-compute profile --name vcopy --iteration-multiplexing kernel -- ./vcopy -i 20 -n 1048576 -b 256 + + ... + [INFO] Rocprofiler-Compute version: 3.3.1 + [INFO] Profiler choice: rocprofiler-sdk + [INFO] Path: /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200 + [INFO] Target: MI200 + [INFO] Command: ./vcopy -i 20 -n 1048576 -b 256 + [INFO] Kernel Selection: None + [INFO] Dispatch Selection: None + [INFO] Filtered sections: All + [INFO] + [INFO] ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + [INFO] Collecting Performance Counters + [INFO] ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + [INFO] + [INFO] Using native counter collection tool: /tmp/rocprofiler-compute-tool-hlz4fagh/librocprofiler-compute-tool.so + [INFO] Iteration multiplexing: kernel + [INFO] [profiling] Current input files: /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/SQC_DCACHE_INFLIGHT_LEVEL.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/SQC_ICACHE_INFLIGHT_LEVEL.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/SQ_IFETCH_LEVEL.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/SQ_INST_LEVEL_LDS.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/SQ_INST_LEVEL_SMEM.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/SQ_INST_LEVEL_VMEM.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/SQ_LEVEL_WAVES.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_0.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_1.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_10.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_11.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_12.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_2.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_3.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_4.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_5.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_6.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_7.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_8.txt, /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/perfmon/pmc_perf_9.txt + [INFO] |-> [rocprofiler-sdk] [rocprofiler-compute] [rocprofiler_configure] (priority=1) is using rocprofiler-sdk v1.0.0 (1.0.0) + [INFO] |-> [rocprofiler-sdk] [rocprofiler-compute] [create_tool_data] Logging counter collection to: /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/out/pmc_1/counter_collection_dc877c12.csv + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:29.205097 139710715580160 simple_timer.cpp:55] [rocprofv3] tool initialization :: 0.393942 sec + [INFO] |-> [rocprofiler-sdk] [rocprofiler-compute] In tool init + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:29.205260 139710715580160 simple_timer.cpp:55] [rocprofv3] './vcopy -i 20 -n 1048576 -b 256' :: 0.000000 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:29.320658 139710715580160 tool.cpp:2420] HSA version 8.20.0 initialized (instance=0) + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:29.541811 139710715580160 simple_timer.cpp:55] [rocprofv3] './vcopy -i 20 -n 1048576 -b 256' :: 0.336552 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:29.551750 139710715580160 generateRocpd.cpp:582] writing SQL database for process 2606306 on node 1574819130 + [INFO] |-> [rocprofiler-sdk] E20251106 22:30:29.552127 139710715580160 generateRocpd.cpp:605] Opened result file: /home/rocm-systems/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI200/out/pmc_1/MI200-1/2606306_results.db (UUID=ab2345e4-7f3e-4f7c-8f6d-1c9e4f5b6c7d) + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:29.584905 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_string :: 0.016552 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:29.585113 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_info_node :: 0.000200 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:29.586186 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_info_process :: 0.001069 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:29.592977 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_info_agent :: 0.006506 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.791895 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_info_pmc :: 2.198912 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.792565 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd kernel info :: 0.000645 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.792572 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_region :: 0.000002 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.795306 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_kernel_dispatch :: 0.002731 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.795311 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_pmc_event :: 0.000000 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.795313 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_memory_copy :: 0.000000 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.795315 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_memory_allocate :: 0.000001 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.795405 139710715580160 simple_timer.cpp:55] SQLite3 generation :: SQL indexing :: 0.000089 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.796398 139710715580160 simple_timer.cpp:55] SQLite3 generation :: total :: 2.244648 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.797844 139710715580160 simple_timer.cpp:55] [rocprofv3] output generation :: 2.254739 sec + [INFO] |-> [rocprofiler-sdk] W20251106 22:30:31.800089 139710715580160 simple_timer.cpp:55] [rocprofv3] tool finalization :: 2.258250 sec + [INFO] |-> [rocprofiler-sdk] [rocprofiler-compute] In tool fini + [INFO] |-> [rocprofiler-sdk] vcopy testing on GCD 0 + [INFO] |-> [rocprofiler-sdk] Finished allocating vectors on the CPU + ... diff --git a/projects/rocprofiler-compute/pyproject.toml b/projects/rocprofiler-compute/pyproject.toml index 713c67928f..5544f61c85 100644 --- a/projects/rocprofiler-compute/pyproject.toml +++ b/projects/rocprofiler-compute/pyproject.toml @@ -107,4 +107,5 @@ markers = [ "roofline_2", "path", "sci_notion", + "iteration_multiplexing", ] diff --git a/projects/rocprofiler-compute/src/argparser.py b/projects/rocprofiler-compute/src/argparser.py index 5036481093..3b89f87dbf 100644 --- a/projects/rocprofiler-compute/src/argparser.py +++ b/projects/rocprofiler-compute/src/argparser.py @@ -263,6 +263,29 @@ Examples: "\t\t\t(e.g. 1 3:5 captures 1st, 3rd, 4th and 5th iterations)." ), ) + profile_group.add_argument( + "--iteration-multiplexing", + type=str, + dest="iteration_multiplexing", + metavar="", + required=False, + nargs="?", + choices=[ + # "simple", + "kernel", + "kernel_launch_params", + ], + const="kernel_launch_params", + help=( + "\t\t\tChoose the iteration multiplexing policy: " + "(DEFAULT: kernel_launch_params).\n" + # "\t\t\t simple (i.e. Round robin over all kernel dispatches\n" + "\t\t\t kernel (i.e. Round robin counters over kernel calls with " + "unique kernel names.)\n" + "\t\t\t kernel_launch_params (i.e. Round robin counters over " + "kernel calls with unique kernel and launch parameters)" + ), + ) profile_group.add_argument( "--list-available-metrics", diff --git a/projects/rocprofiler-compute/src/lib/helper.cpp b/projects/rocprofiler-compute/src/lib/helper.cpp index 1f5d05f8b9..97eb249d04 100644 --- a/projects/rocprofiler-compute/src/lib/helper.cpp +++ b/projects/rocprofiler-compute/src/lib/helper.cpp @@ -142,4 +142,25 @@ std::string cxa_demangle(std::string_view _mangled_name, int *_status) { return _demangled_name; } +std::vector split_by_regex(const std::string &s, + const std::string ®ex_pattern) { + std::vector tokens; + std::regex re(regex_pattern); + + // -1 indicates to return the submatches that are not part of the delimiter + // itself + std::sregex_token_iterator iter(s.begin(), s.end(), re, -1); + std::sregex_token_iterator end; + + while (iter != end) { + // Ensure that empty strings resulting from consecutive delimiters are not + // added + if (!iter->str().empty()) { + tokens.push_back(*iter); + } + ++iter; + } + return tokens; +} + } // namespace helper_utils diff --git a/projects/rocprofiler-compute/src/lib/helper.hpp b/projects/rocprofiler-compute/src/lib/helper.hpp index 26a3f17764..f1a761e4a4 100644 --- a/projects/rocprofiler-compute/src/lib/helper.hpp +++ b/projects/rocprofiler-compute/src/lib/helper.hpp @@ -21,11 +21,15 @@ // SOFTWARE. #pragma once +#include #include +#include namespace helper_utils { std::string truncate_name(std::string_view name); std::string cxa_demangle(std::string_view _mangled_name, int *_status); +std::vector split_by_regex(const std::string &s, + const std::string ®ex_pattern); } // namespace helper_utils \ No newline at end of file diff --git a/projects/rocprofiler-compute/src/lib/rocprofiler_compute_tool.cpp b/projects/rocprofiler-compute/src/lib/rocprofiler_compute_tool.cpp index 5b2f311846..ce33ff4d87 100644 --- a/projects/rocprofiler-compute/src/lib/rocprofiler_compute_tool.cpp +++ b/projects/rocprofiler-compute/src/lib/rocprofiler_compute_tool.cpp @@ -78,7 +78,6 @@ for the agent and returns a pointer to it. #include #include #include -#include #include #include #include @@ -103,10 +102,44 @@ for the agent and returns a pointer to it. namespace { +// Multiplexing modes enum +enum class iteration_multiplexing_mode_t { DISABLED, SIMPLE, KERNEL, LAUNCH }; + +// Kernel dispatch info struct for iteration multiplexing +struct kernel_dispatch_info_t { + uint64_t kernel_id; + uint64_t queue_id; + rocprofiler_dim3_t workgroup_size; + rocprofiler_dim3_t grid_size; + uint32_t LDS_memory_size; + + // Overload operator< for strict weak ordering + bool operator<(const kernel_dispatch_info_t other) const { + // Compare based on kernel_id first, then queue_id, then workgroup_size, + // then grid_size, and finally LDS_memory_size + return std::tie(kernel_id, queue_id, workgroup_size.x, workgroup_size.y, + workgroup_size.z, grid_size.x, grid_size.y, grid_size.z, + LDS_memory_size) < + std::tie(other.kernel_id, other.queue_id, other.workgroup_size.x, + other.workgroup_size.y, other.workgroup_size.z, + other.grid_size.x, other.grid_size.y, other.grid_size.z, + other.LDS_memory_size); + } +}; + +// Iteration multiplexing data struct +struct iteration_multiplexing_dispatch_record_t { + std::size_t config; + std::map kernel_config; + std::map dispatch_config; +}; + // Struct to store a single counter info record struct counter_info_record_t { uint64_t dispatch_id; + uint64_t agent_id; uint64_t kernel_id; + uint32_t LDS_memory_size; uint64_t counter_id; std::string counter_name; double counter_value; @@ -122,6 +155,8 @@ struct tool_data_t { std::vector> kernel_filter_ranges{}; std::vector counter_records; std::set target_kernel_ids{}; + iteration_multiplexing_mode_t iteration_multiplexing_mode{ + iteration_multiplexing_mode_t::DISABLED}; }; using kernel_symbol_data_t = @@ -132,6 +167,19 @@ rocprofiler_context_id_t &get_client_ctx() { return ctx; } +iteration_multiplexing_mode_t +iteration_multiplexing_mode(const std::string &mode) { + // if (mode == "simple") + // return iteration_multiplexing_mode_t::SIMPLE; + // else + if (mode == "kernel") + return iteration_multiplexing_mode_t::KERNEL; + else if (mode == "kernel_launch_params") + return iteration_multiplexing_mode_t::LAUNCH; + else + return iteration_multiplexing_mode_t::DISABLED; +} + void record_callback(rocprofiler_dispatch_counting_service_data_t dispatch_data, rocprofiler_counter_record_t *record_data, size_t record_count, @@ -155,7 +203,9 @@ void record_callback(rocprofiler_dispatch_counting_service_data_t dispatch_data, // Store the counter info record in tool_data counter_info_record_t record{dispatch_data.dispatch_info.dispatch_id, + dispatch_data.dispatch_info.agent_id.handle, dispatch_data.dispatch_info.kernel_id, + dispatch_data.dispatch_info.group_segment_size, counter_id.handle, tool->counter_id_name_map[counter_id.handle], record_data[i].counter_value}; @@ -272,26 +322,31 @@ bool is_targetted_dispatch(const tool_data_t *tool, uint64_t kernel_id, * 3. Filters the supported counters to match only those requested * 4. Logs warnings for any requested counters that are not supported by the * agent - * 5. Creates and returns a rocprofiler counter configuration for the valid + * 5. Creates rocprofiler counter configurations for the valid * counters - * 6. Updates the tool's counter ID to name mapping for later reference * * @note If no counters are requested or none of the requested counters are * supported, an empty profile may be created. Unsupported counters are logged * as warnings but do not cause the function to fail. */ -rocprofiler_counter_config_id_t create_counter_collection_profile( - tool_data_t *tool, - rocprofiler_dispatch_counting_service_data_t dispatch_data) { +void create_counter_collection_profile( + tool_data_t *tool, rocprofiler_agent_id_t agent_id, + std::unordered_map> + &profile_cache) { // get counters to collect - std::set counters_to_collect; - const std::string &counters_str = tool->requested_counters; - if (!counters_str.empty()) { - auto pos = counters_str.find(':'); - if (pos != std::string::npos) { - std::istringstream ss(counters_str.substr(pos + 1)); - for (std::string token; ss >> token;) - counters_to_collect.insert(token); + std::set> counters_to_collect; + for (const std::string &counters_str : + helper_utils::split_by_regex(tool->requested_counters, "[,]")) { + if (!counters_str.empty()) { + auto pos = counters_str.find(':'); + if (pos != std::string::npos) { + std::istringstream ss(counters_str.substr(pos + 1)); + std::set counters; + for (std::string token; ss >> token;) { + counters.insert(token); + } + counters_to_collect.insert(counters); + } } } @@ -299,7 +354,7 @@ rocprofiler_counter_config_id_t create_counter_collection_profile( std::vector gpu_counters; ROCPROFILER_CALL( rocprofiler_iterate_agent_supported_counters( - dispatch_data.dispatch_info.agent_id, + agent_id, [](rocprofiler_agent_id_t, rocprofiler_counter_id_t *counters, size_t num_counters, void *user_data) { std::vector *vec = @@ -312,30 +367,40 @@ rocprofiler_counter_config_id_t create_counter_collection_profile( static_cast(&gpu_counters)), "fetch supported counters"); - // Identify counters requested to collect which are available - std::vector collect_counters; - std::vector collect_counters_names; + std::vector gpu_counter_names; + std::map gpu_counter_map; for (auto &counter : gpu_counters) { rocprofiler_counter_info_v0_t info; ROCPROFILER_CALL(rocprofiler_query_counter_info( counter, ROCPROFILER_COUNTER_INFO_VERSION_0, static_cast(&info)), "query counter info"); - if (counters_to_collect.count(std::string(info.name)) > 0) { - collect_counters.push_back(counter); - collect_counters_names.push_back(std::string(info.name)); - tool->counter_id_name_map[counter.handle] = std::string(info.name); - } + gpu_counter_names.push_back(std::string(info.name)); + gpu_counter_map.insert({std::string(info.name), counter}); } - // Log unsupported counters in a concise, comma-separated line + // Identify counters requested to collect which are available + std::vector> collect_counter_names; + std::vector> collect_counters; std::vector unsupported_counters; - for (const auto &requested : counters_to_collect) { - if (std::find(collect_counters_names.begin(), collect_counters_names.end(), - requested) == collect_counters_names.end()) { - unsupported_counters.push_back(requested); + for (const auto &counters : counters_to_collect) { + std::vector counter_names; + std::vector counter_ids; + for (const auto &counter_name : counters) { + if (std::find(gpu_counter_names.begin(), gpu_counter_names.end(), + counter_name) != gpu_counter_names.end()) { + counter_names.push_back(counter_name); + counter_ids.push_back(gpu_counter_map[counter_name]); + tool->counter_id_name_map[gpu_counter_map[counter_name].handle] = + counter_name; + } else { + unsupported_counters.push_back(counter_name); + } } + collect_counter_names.push_back(counter_names); + collect_counters.push_back(counter_ids); } + if (!unsupported_counters.empty()) { std::clog << "\033[33m[rocprofiler-compute] [" << __FUNCTION__ << "] WARNING: Requested counters not available: "; @@ -347,14 +412,18 @@ rocprofiler_counter_config_id_t create_counter_collection_profile( std::clog << "\033[0m" << std::endl; } - // Create and return collection profile for the counters - rocprofiler_counter_config_id_t profile = {.handle = 0}; - ROCPROFILER_CALL( - rocprofiler_create_counter_config(dispatch_data.dispatch_info.agent_id, - collect_counters.data(), - collect_counters.size(), &profile), - "construct profile cfg"); - return profile; + // Create a profile cache for the agent + std::vector profiles{}; + // Create a collection profile for the counters + for (auto &collect_counters_one_iter : collect_counters) { + rocprofiler_counter_config_id_t profile = {.handle = 0}; + ROCPROFILER_CALL(rocprofiler_create_counter_config( + agent_id, collect_counters_one_iter.data(), + collect_counters_one_iter.size(), &profile), + "construct profile cfg"); + profiles.push_back(profile); + profile_cache[agent_id.handle] = profiles; + } } /** @@ -372,6 +441,7 @@ void dispatch_callback( rocprofiler_user_data_t * /*user_data*/, void *callback_data_args) { auto kernel_id = dispatch_data.dispatch_info.kernel_id; + auto agent_id = dispatch_data.dispatch_info.agent_id.handle; // create static map of kernel_id to number of dispatches (zero indexed) and // update it @@ -401,36 +471,112 @@ void dispatch_callback( } static std::shared_mutex m_mutex = {}; - static std::unordered_map + static std::unordered_map> profile_cache = {}; + static std::unordered_map + iteration_multiplexing_data = {}; // check cache for existing profile for this agent - auto search_cache = [&]() { - if (auto pos = - profile_cache.find(dispatch_data.dispatch_info.agent_id.handle); - pos != profile_cache.end()) { - *config = pos->second; + auto search_profile_cache = [&]() { + if (auto pos = profile_cache.find(agent_id); pos != profile_cache.end()) return true; - } return false; }; + + auto set_config_from_cache = [&]() { + if (tool->iteration_multiplexing_mode != + iteration_multiplexing_mode_t::DISABLED && + iteration_multiplexing_data.find(agent_id) == + iteration_multiplexing_data.end()) { + // First time setting up iteration multiplexing data for this agent + iteration_multiplexing_data[agent_id] = + iteration_multiplexing_dispatch_record_t{}; + if (tool->iteration_multiplexing_mode == + iteration_multiplexing_mode_t::SIMPLE) { + iteration_multiplexing_data[agent_id].config = + -1; // so first increment sets to 0 + } + } + + kernel_dispatch_info_t dispatch_info{ + dispatch_data.dispatch_info.kernel_id, + dispatch_data.dispatch_info.queue_id.handle, + dispatch_data.dispatch_info.workgroup_size, + dispatch_data.dispatch_info.grid_size, + dispatch_data.dispatch_info.group_segment_size}; + switch (tool->iteration_multiplexing_mode) { + case iteration_multiplexing_mode_t::DISABLED: + *config = profile_cache[agent_id][0]; + return; + + case iteration_multiplexing_mode_t::SIMPLE: + iteration_multiplexing_data[agent_id].config = + (iteration_multiplexing_data[agent_id].config + 1) % + profile_cache[agent_id].size(); + *config = + profile_cache[agent_id][iteration_multiplexing_data[agent_id].config]; + return; + + case iteration_multiplexing_mode_t::KERNEL: + if (iteration_multiplexing_data[agent_id].kernel_config.find(kernel_id) == + iteration_multiplexing_data[agent_id].kernel_config.end()) { + // First time seeing this kernel_id for this agent + iteration_multiplexing_data[agent_id].kernel_config[kernel_id] = + -1; // so first increment sets to 0 + } + iteration_multiplexing_data[agent_id].kernel_config[kernel_id] = + (iteration_multiplexing_data[agent_id].kernel_config[kernel_id] + 1) % + profile_cache[agent_id].size(); + *config = profile_cache[agent_id][iteration_multiplexing_data[agent_id] + .kernel_config[kernel_id]]; + return; + + case iteration_multiplexing_mode_t::LAUNCH: + if (iteration_multiplexing_data[agent_id].dispatch_config.find( + dispatch_info) == + iteration_multiplexing_data[agent_id].dispatch_config.end()) { + // First time seeing this dispatch_info for this agent + iteration_multiplexing_data[agent_id].dispatch_config[dispatch_info] = + -1; // so first increment sets to 0 + } + iteration_multiplexing_data[agent_id].dispatch_config[dispatch_info] = + (iteration_multiplexing_data[agent_id] + .dispatch_config[dispatch_info] + + 1) % + profile_cache[agent_id].size(); + *config = profile_cache[agent_id][iteration_multiplexing_data[agent_id] + .dispatch_config[dispatch_info]]; + return; + + default: + throw std::runtime_error("[" + std::string(__FUNCTION__) + + "] Unsupported iteration multiplexing mode"); + } + }; + { auto rlock = std::shared_lock{m_mutex}; - if (search_cache()) + if ((tool->iteration_multiplexing_mode == + iteration_multiplexing_mode_t::DISABLED) && + search_profile_cache()) { + *config = profile_cache[agent_id][0]; return; + } } // get write lock to update cache auto wlock = std::unique_lock{m_mutex}; - if (search_cache()) + if (search_profile_cache()) { + set_config_from_cache(); return; + } + + create_counter_collection_profile(tool, dispatch_data.dispatch_info.agent_id, + profile_cache); - // cache the profile for this agent - rocprofiler_counter_config_id_t profile = - create_counter_collection_profile(tool, dispatch_data); - profile_cache.emplace(dispatch_data.dispatch_info.agent_id.handle, profile); // Return the profile to collect those counters for this dispatch - *config = profile; + set_config_from_cache(); } int tool_init(rocprofiler_client_finalize_t, void *user_data) { @@ -472,7 +618,8 @@ void generate_output(tool_data_t *tool_data) { // Write collected counter records and clean up if (auto &os = tool_data->output_stream) { for (const auto &r : tool_data->counter_records) - *os << r.dispatch_id << ',' << r.counter_id << ',' << r.counter_name + *os << r.dispatch_id << ',' << r.agent_id << "," << r.kernel_id << ',' + << r.LDS_memory_size << ',' << r.counter_id << ',' << r.counter_name << ',' << r.counter_value << '\n'; os->flush(); } @@ -517,7 +664,6 @@ std::unique_ptr create_tool_data(rocprofiler_client_id_t *id) { // Use the generated base filename along with ROCPROF_OUTPUT_PATH filename += base_filename; - // Set output stream to file // Set output stream to file auto ofs = std::make_unique(filename); if (!ofs->is_open()) { @@ -525,8 +671,8 @@ std::unique_ptr create_tool_data(rocprofiler_client_id_t *id) { } tool_data->output_stream = std::move(ofs); // Write header at the beginning of the file - *tool_data->output_stream - << "dispatch_id,counter_id,counter_name,counter_value\n"; + *tool_data->output_stream << "dispatch_id,gpu_id,kernel_id,lds_per_workgroup," + "counter_id,counter_name,counter_value\n"; tool_data->output_stream->flush(); // Write to clog the path of the logging file @@ -539,6 +685,9 @@ std::unique_ptr create_tool_data(rocprofiler_client_id_t *id) { if (const char *v = getenv("ROCPROF_COUNTERS")) tool_data->requested_counters = v; + if (const char *v = getenv("ROCPROF_ITERATION_MULTIPLEXING")) + tool_data->iteration_multiplexing_mode = iteration_multiplexing_mode(v); + // ROCPROF_KERNEL_FILTER_INCLUDE_REGEX env. var. is a regex string like // kernel_name_1|kernel_name_2|... Used to collect counters only for kernels // with names matching the regex diff --git a/projects/rocprofiler-compute/src/rocprof_compute_analyze/analysis_base.py b/projects/rocprofiler-compute/src/rocprof_compute_analyze/analysis_base.py index 464edf8cd4..abb8021eba 100644 --- a/projects/rocprofiler-compute/src/rocprof_compute_analyze/analysis_base.py +++ b/projects/rocprofiler-compute/src/rocprof_compute_analyze/analysis_base.py @@ -49,6 +49,7 @@ from utils.utils import ( get_panel_alias, get_uuid, is_workload_empty, + merge_counters_iteration_multiplex, merge_counters_spatial_multiplex, ) @@ -102,6 +103,12 @@ class OmniAnalyze_Base: def spatial_multiplex_merge_counters(self, df: pd.DataFrame) -> pd.DataFrame: return merge_counters_spatial_multiplex(df) + @demarcate + def iteration_multiplex_merge_counters( + self, df: pd.DataFrame, policy: str + ) -> pd.DataFrame: + return merge_counters_iteration_multiplex(df, policy) + @demarcate def generate_configs( self, @@ -395,6 +402,17 @@ class OmniAnalyze_Base: # Read profiling config self._profiling_config = file_io.load_profiling_config(args.path[0][0]) + # Check dispatch filtering isn't used with iteration multiplexing + if ( + self._profiling_config.get("iteration_multiplexing") is not None + and args.gpu_dispatch_id + ): + console_error( + "analysis", + "Dispatch filtering (-d/--dispatch) cannot be used " + "with profiling data collected with iteration multiplexing.", + ) + # initalize runs self._runs = self.initalize_runs() @@ -422,3 +440,12 @@ class OmniAnalyze_Base: def run_analysis(self) -> None: """Run analysis.""" console_debug("analysis", "generating analysis") + if self._profiling_config.get("iteration_multiplexing") is not None: + console_log( + "analysis", + ( + "Profiling data was collected using iteration multiplexing. " + "Some metrics may represent aggregated values " + "across multiple iterations." + ), + ) diff --git a/projects/rocprofiler-compute/src/rocprof_compute_analyze/analysis_cli.py b/projects/rocprofiler-compute/src/rocprof_compute_analyze/analysis_cli.py index a1b3e0884e..451f2bc72b 100644 --- a/projects/rocprofiler-compute/src/rocprof_compute_analyze/analysis_cli.py +++ b/projects/rocprofiler-compute/src/rocprof_compute_analyze/analysis_cli.py @@ -60,6 +60,12 @@ class cli_analysis(OmniAnalyze_Base): workload.raw_pmc ) + if self._profiling_config.get("iteration_multiplexing") is not None: + workload.raw_pmc = self.iteration_multiplex_merge_counters( + workload.raw_pmc, + policy=self._profiling_config["iteration_multiplexing"], + ) + file_io.create_df_kernel_top_stats( df_in=workload.raw_pmc, raw_data_dir=path_info[0], diff --git a/projects/rocprofiler-compute/src/rocprof_compute_profile/profiler_base.py b/projects/rocprofiler-compute/src/rocprof_compute_profile/profiler_base.py index 079a9b3045..ad8fd3ed33 100644 --- a/projects/rocprofiler-compute/src/rocprof_compute_profile/profiler_base.py +++ b/projects/rocprofiler-compute/src/rocprof_compute_profile/profiler_base.py @@ -98,6 +98,12 @@ class RocProfCompute_Base: "Access denied. Cannot access parent directories in path (i.e. ../)" ) + if args.no_native_tool and args.iteration_multiplexing is not None: + console_error( + "--no-native-tool cannot be used with --iteration-multiplexing. " + "Please remove one of these options." + ) + # verify correct formatting for application binary args.remaining = args.remaining[1:] if args.remaining: @@ -410,11 +416,6 @@ class RocProfCompute_Base: status_msg = f"{msg} (Roofline Only)" if self.__args.roof_only else msg print_status(status_msg) - # Run profiling on each input file - input_files = sorted(Path(args.path).glob("perfmon/*.txt")) - total_runs = len(input_files) - total_profiling_time = 0.0 - native_tool_path = None # Native counter collection tool is only compatible with # rocprofiler-sdk public API for ROCm version >= 7.x.x @@ -467,25 +468,17 @@ class RocProfCompute_Base: if not success: console_error("Failed to build native counter collection tool.") - for i, fname in enumerate(input_files): - run_number = i + 1 + if self.__profiler == "rocprofiler-sdk": + options = self.get_profiler_options(native_tool_path=native_tool_path) + else: + options = self.get_profiler_options() - # Log progress and time estimation - if i > 0: - avg_time = total_profiling_time / i - time_left_seconds = (total_runs - run_number) * avg_time - time_left = format_time(time_left_seconds) - console_log( - f"[Run {run_number}/{total_runs}]" - f"[Approximate profiling time left: {time_left}]..." - ) - else: - console_log( - f"[Run {run_number}/{total_runs}]" - "[Approximate profiling time left: " - "pending first measurement...]" - ) + # Run profiling on each input file + input_files = sorted(Path(args.path).glob("perfmon/*.txt")) + total_runs = len(input_files) + total_profiling_time = 0.0 + for fname in input_files: # Kernel filtering (in-place replacement) if not args.kernel == None: success, output = capture_subprocess_output([ @@ -502,7 +495,7 @@ class RocProfCompute_Base: console_debug(output) # Dispatch filtering (inplace replacement) - if not args.dispatch == None: + if args.dispatch is not None: success, output = capture_subprocess_output([ "sed", "-i", @@ -516,12 +509,20 @@ class RocProfCompute_Base: else: console_debug(output) - console_log("profiling", f"Current input file: {fname}") - if self.__profiler == "rocprofiler-sdk": - options = self.get_profiler_options(native_tool_path=native_tool_path) + def profile( + fnames: Union[list[Path], Path], options: Union[list[str], dict[str, Any]] + ) -> float: + if isinstance(fnames, list): + console_log( + "profiling", f"Current input files: {', '.join(map(str, fnames))}" + ) + str_fnames = [str(fname) for fname in fnames] else: - options = self.get_profiler_options() + console_log("profiling", f"Current input file: {fnames}") + str_fnames = str(fnames) + start_time = time.time() + if self.__profiler == "rocprofv3" or self.__profiler == "rocprofiler-sdk": # Only 1-run case is permitted for attach/detach if (isinstance(options, list) and "--pid" in options) or ( @@ -538,7 +539,7 @@ class RocProfCompute_Base: f"to adjust or reduce the requested performance metrics!" ) run_prof( - fname=str(fname), + fnames=str_fnames, profiler_options=options, workload_dir=args.path, mspec=self._soc._mspec, @@ -546,16 +547,69 @@ class RocProfCompute_Base: format_rocprof_output=args.format_rocprof_output, retain_rocpd_output=args.retain_rocpd_output, ) + end_time = time.time() duration = end_time - start_time - total_profiling_time += duration console_debug( f"The time of run_prof of {fname} is {int(duration / 60)} min" f" {duration % 60} sec" ) + return duration else: console_error("Profiler not supported") + return 0.0 + + if args.iteration_multiplexing is not None: + console_log( + "profiling", f"Iteration multiplexing: {args.iteration_multiplexing}" + ) + if args.iteration_multiplexing == "kernel": + console_warning( + "profiling", + ( + "Each kernel should be called atleast " + f"{len(input_files)} times to collect all counters." + ), + ) + elif args.iteration_multiplexing == "kernel_launch_params": + console_warning( + "profiling", + ( + "Each kernel should be called atleast " + f"{len(input_files)} times with the exact launch parameters " + "to collect all counters." + ), + ) + + profile(input_files, options) + else: + console_log("profiling", "Iteration multiplexing: Disabled") + + total_runs = len(input_files) + total_profiling_time = 0.0 + + for i, fname in enumerate(input_files): + run_number = i + 1 + + # Log progress and time estimation + if i > 0: + avg_time = total_profiling_time / i + time_left_seconds = (total_runs - run_number) * avg_time + time_left = format_time(time_left_seconds) + console_log( + f"[Run {run_number}/{total_runs}]" + f"[Approximate profiling time left: {time_left}]..." + ) + else: + console_log( + f"[Run {run_number}/{total_runs}]" + "[Approximate profiling time left: " + "pending first measurement...]" + ) + + duration = profile(fname, options) + total_profiling_time += duration # Delete temporary native tool if created if native_tool_path and native_tool_path.startswith("/tmp"): diff --git a/projects/rocprofiler-compute/src/rocprof_compute_profile/profiler_rocprofiler_sdk.py b/projects/rocprofiler-compute/src/rocprof_compute_profile/profiler_rocprofiler_sdk.py index aa75baeda8..a42bf56a70 100644 --- a/projects/rocprofiler-compute/src/rocprof_compute_profile/profiler_rocprofiler_sdk.py +++ b/projects/rocprofiler-compute/src/rocprof_compute_profile/profiler_rocprofiler_sdk.py @@ -74,6 +74,11 @@ class rocprofiler_sdk_profiler(RocProfCompute_Base): # Create folder pointed by ROCPROF_OUTPUT_PATH Path(options["ROCPROF_OUTPUT_PATH"]).mkdir(parents=True, exist_ok=True) + if args.iteration_multiplexing: + options.update({ + "ROCPROF_ITERATION_MULTIPLEXING": args.iteration_multiplexing, + }) + if args.attach_pid: # In attach mode, tools are provided using ROCP_TOOL_LIBRARIES # instead of LD_PRELOAD. diff --git a/projects/rocprofiler-compute/src/utils/file_io.py b/projects/rocprofiler-compute/src/utils/file_io.py index 99caca5694..740a6db566 100644 --- a/projects/rocprofiler-compute/src/utils/file_io.py +++ b/projects/rocprofiler-compute/src/utils/file_io.py @@ -130,28 +130,59 @@ def create_df_kernel_top_stats( df = df.loc[df["Dispatch_ID"].astype(str).isin(filter_strings)] # First, create a dispatches file used to populate global vars - dispatch_columns = ( - ["Node", "Dispatch_ID", "Kernel_Name", "GPU_ID"] - if "Node" in df.columns - else ["Dispatch_ID", "Kernel_Name", "GPU_ID"] - ) + dispatch_columns = ["Kernel_Name", "GPU_ID"] + if "Dispatch_ID" in df.columns: + dispatch_columns.insert(0, "Dispatch_ID") + if "Node" in df.columns: + dispatch_columns.insert(0, "Node") + dispatch_info = df[dispatch_columns] dispatch_output_path = Path(raw_data_dir) / "pmc_dispatch_info.csv" dispatch_info.to_csv(dispatch_output_path, index=False) - # Calculate execution times - execution_times = df["End_Timestamp"] - df["Start_Timestamp"] - time_stats = pd.DataFrame({ - "Kernel_Name": df["Kernel_Name"], - "ExeTime": execution_times, - }) + if "Dispatch_ID" in df.columns: + # Calculate execution times + execution_times = df["End_Timestamp"] - df["Start_Timestamp"] + time_stats = pd.DataFrame({ + "Kernel_Name": df["Kernel_Name"], + "ExeTime": execution_times, + }) - grouped = time_stats.groupby("Kernel_Name")["ExeTime"].agg([ - "count", - "sum", - "mean", - "median", - ]) + grouped = time_stats.groupby("Kernel_Name")["ExeTime"].agg([ + "count", + "sum", + "mean", + "median", + ]) + else: + time_stats = pd.DataFrame({ + "Kernel_Name": df["Kernel_Name"], + "count": df["Count"], + "sum": df["Mean_Time"] * df["Count"], + "mean": df["Mean_Time"], + "median": df["Median_Time"], + }) + + result_data: list[dict[str, Any]] = [] + for _, group in time_stats.groupby("Kernel_Name"): + row: dict[str, Any] = {} + + row["Kernel_Name"] = group["Kernel_Name"].iloc[0] + row["count"] = group["count"].sum() + row["sum"] = group["sum"].sum() + row["mean"] = row["sum"] / row["count"] + + sorted_data_by_mean = group.sort_values("mean") + sorted_data_by_mean["count_cumsum"] = sorted_data_by_mean["count"].cumsum() + median_threshold = row["count"] / 2 + median_value = sorted_data_by_mean.loc[ + sorted_data_by_mean["count_cumsum"] >= median_threshold, "median" + ].iloc[0] + row["median"] = median_value + + result_data.append(row) + + grouped = pd.DataFrame(result_data) # Rename columns with time unit time_unit_suffix = f"({time_unit})" @@ -172,7 +203,8 @@ def create_df_kernel_top_stats( ]: grouped[col] = grouped[col] / time_divisor - grouped = grouped.reset_index() + if "Dispatch_ID" in df.columns: + grouped = grouped.reset_index() # Calculate percentage sum_column = f"Sum{time_unit_suffix}" diff --git a/projects/rocprofiler-compute/src/utils/parser.py b/projects/rocprofiler-compute/src/utils/parser.py index a2e67e906b..cb381514e2 100755 --- a/projects/rocprofiler-compute/src/utils/parser.py +++ b/projects/rocprofiler-compute/src/utils/parser.py @@ -369,6 +369,10 @@ class MetricEvaluator: console_error("analysis", str(attribute_error)) return "N/A" + except pd.errors.IntCastingNaNError as exception: + console_warning(f"Missing data: {exception}. Using empty value.") + return "" + def build_eval_string(equation: str, coll_level: str, config: dict) -> str: """ diff --git a/projects/rocprofiler-compute/src/utils/utils.py b/projects/rocprofiler-compute/src/utils/utils.py index 0950c47366..ac2bef5627 100644 --- a/projects/rocprofiler-compute/src/utils/utils.py +++ b/projects/rocprofiler-compute/src/utils/utils.py @@ -685,7 +685,7 @@ def parse_text(text_file: str) -> list[str]: def run_prof( - fname: str, + fnames: Union[list[str], str], profiler_options: Union[list[str], dict[str, Union[str, list[str]]]], workload_dir: str, mspec: Any, # noqa: ANN401 @@ -693,9 +693,28 @@ def run_prof( format_rocprof_output: str, retain_rocpd_output: bool = False, ) -> None: - fpath = Path(fname) + multiple_files = isinstance(fnames, list) + if multiple_files and ( + ( + isinstance(profiler_options, dict) + and profiler_options.get("ROCPROF_ITERATION_MULTIPLEXING") is None + ) + or ( + isinstance(profiler_options, list) + and "--iteration-multiplexing" not in profiler_options + ) + ): + console_error( + "Multiple pmc files detected but ROCPROF_ITERATION_MULTIPLEXING is not set." + ) + return + + fpath = Path(fnames[0]) if multiple_files else Path(fnames) fbase = fpath.stem - console_debug(f"pmc file: {fpath.name}") + if multiple_files: + console_debug(f"pmc files: {', '.join([Path(fname).name for fname in fnames])}") + else: + console_debug(f"pmc file: {fpath.name}") is_mode_live_attach = ( isinstance(profiler_options, list) and "--pid" in profiler_options @@ -707,10 +726,21 @@ def run_prof( # standard rocprof options if rocprof_cmd == "rocprofiler-sdk": options = cast(dict[str, Union[str, list[str]]], profiler_options).copy() - options["ROCPROF_COUNTERS"] = f"pmc: {' '.join(parse_text(fname))}" + if multiple_files: + options["ROCPROF_COUNTERS"] = ", ".join([ + f"pmc: {' '.join(parse_text(fname))}" for fname in fnames + ]) + else: + options["ROCPROF_COUNTERS"] = f"pmc: {' '.join(parse_text(fnames))}" options["ROCPROF_AGENT_INDEX"] = "absolute" else: - default_options = ["-i", fname] + if multiple_files: + console_error( + "Multiple pmc files detected but rocprofv3 does not " + "support multiple input files." + ) + return + default_options = ["-i", fnames] options = default_options + cast(list[str], profiler_options) options = ["-A", "absolute"] + options @@ -725,11 +755,13 @@ def run_prof( ) as file: counter_defs = yaml.safe_load(file) # Extra counter definitions - if Path(fname).with_suffix(".yaml").exists(): - with open(Path(fname).with_suffix(".yaml")) as file: - counter_defs["rocprofiler-sdk"]["counters"].extend( - yaml.safe_load(file)["rocprofiler-sdk"]["counters"] - ) + for fname in fnames if multiple_files else [fnames]: + if Path(fname).with_suffix(".yaml").exists(): + with open(Path(fname).with_suffix(".yaml")) as file: + counter_defs["rocprofiler-sdk"]["counters"].extend( + yaml.safe_load(file)["rocprofiler-sdk"]["counters"] + ) + # TODO: Write counter definitions to a user specified path # Write counter definitions to a temporary file tmpfile_path = ( Path(tempfile.mkdtemp(prefix="rocprof_counter_defs_", dir="/tmp")) @@ -757,6 +789,9 @@ def run_prof( time_1 = time.time() + output_path = Path(workload_dir + "/out/pmc_1") + output_path.mkdir(parents=True, exist_ok=True) + if rocprof_cmd == "rocprofiler-sdk": app_cmd = options.pop("APP_CMD") if "APP_CMD" in options else None for key, value in options.items(): @@ -1440,6 +1475,118 @@ def reverse_multi_index_df_pmc( return dfs, coll_levels +def merge_counters_iteration_multiplex( + df_multi_index: pd.DataFrame, + policy: str, +) -> pd.DataFrame: + """ + For iteration multiplexing, this merges counter values for the kernel collected + over multiple iterations. + """ + non_counter_column_index = [ + "Dispatch_ID", + "GPU_ID", + "Grid_Size", + "Workgroup_Size", + "LDS_Per_Workgroup", + "Scratch_Per_Workitem", + "Arch_VGPR", + "Accum_VGPR", + "SGPR", + "Kernel_Name", + "Start_Timestamp", + "End_Timestamp", + "Kernel_ID", + ] + + expired_column_index = [ + "Dispatch_ID", + ] + + result_dfs: list[pd.DataFrame] = [] + + # TODO: will need to optimize to avoid this conversion to single index format + # and do merge directly on multi-index dataframe + dfs, coll_levels = reverse_multi_index_df_pmc(df_multi_index) + + for df in dfs: + kernel_name_column_name = "Kernel_Name" + if "Kernel_Name" not in df and "Name" in df: + kernel_name_column_name = "Name" + + # Find the values in Kernel_Name that occur more than once + unique_occurences = ( + df.groupby(kernel_name_column_name) + if policy == "kernel" + else df.groupby( + [ + kernel_name_column_name, + "Grid_Size", + "Workgroup_Size", + "LDS_Per_Workgroup", + ], + as_index=False, + ) + ) + + # Define a list to store the merged rows + result_data: list[dict[str, Any]] = [] + + pd.set_option("display.max_columns", None) + + for name, group in unique_occurences: + # Create a dictionary to store the merged row for the current group + merged_row: dict[str, Any] = {} + + # Process non-counter columns + for col in [ + col + for col in non_counter_column_index + if col not in expired_column_index + ]: + if col == "End_Timestamp": + # For End_Timestamp, calculate the median delta time + delta_time = group["End_Timestamp"] - group["Start_Timestamp"] + median_delta_time = delta_time.median() + merged_row[col] = merged_row["Start_Timestamp"] + median_delta_time + merged_row["Median_Time"] = median_delta_time + merged_row["Mean_Time"] = delta_time.mean() + elif pd.api.types.is_numeric_dtype(group[col]): + # For other non-counter numeric columns, take the median value + merged_row[col] = group[col].median() + if pd.api.types.is_integer_dtype(group[col]): + merged_row[col] = merged_row[col].astype(int) + else: + # For other non-counter columns, take the first occurrence (0th row) + merged_row[col] = group.iloc[0][col] + + # Process counter columns (assumed to be all columns not in + # non_counter_column_index) + counter_columns = [ + col for col in group.columns if col not in non_counter_column_index + ] + for counter_col in counter_columns: + # for counter columns, take the first non-none (or non-nan) value + current_valid_counter_group = group[group[counter_col].notna()] + first_valid_value = ( + current_valid_counter_group.iloc[0][counter_col] + if len(current_valid_counter_group) > 0 + else None + ) + merged_row[counter_col] = first_valid_value + + merged_row["Count"] = group["Dispatch_ID"].nunique() + + # Append the merged row to the result list + result_data.append(merged_row) + + # Create a new DataFrame from the merged rows + result_dfs.append(pd.DataFrame(result_data)) + + final_df = pd.concat(result_dfs, keys=coll_levels, axis=1, copy=False) + return final_df + + def merge_counters_spatial_multiplex(df_multi_index: pd.DataFrame) -> pd.DataFrame: """ For spatial multiplexing, this merges counter values for the same kernel that diff --git a/projects/rocprofiler-compute/tests/test_analyze_commands.py b/projects/rocprofiler-compute/tests/test_analyze_commands.py index e726848bab..aecffeb6eb 100644 --- a/projects/rocprofiler-compute/tests/test_analyze_commands.py +++ b/projects/rocprofiler-compute/tests/test_analyze_commands.py @@ -1662,3 +1662,29 @@ def test_edge_cases_and_error_handling(): result = convert_time_columns(mixed_case_df, "ms") assert result.loc[0, "Unit"] == "ms" assert result.loc[1, "Unit"] == "ms" + + +@pytest.mark.iteration_multiplexing +def test_iteration_multiplexing(binary_handler_analyze_rocprof_compute): + workload = "tests/workloads/vcopy_iteration_multiplexing/MI350" + workload_dir = test_utils.setup_workload_dir(workload) + + # Test with dispatch filtering + code = binary_handler_analyze_rocprof_compute([ + "analyze", + "--dispatch", + "0", + "--path", + workload_dir, + ]) + assert code == 1 + + # Test without dispatch filtering + code = binary_handler_analyze_rocprof_compute([ + "analyze", + "--path", + workload_dir, + ]) + assert code == 0 + + test_utils.clean_output_dir(config["cleanup"], workload_dir) diff --git a/projects/rocprofiler-compute/tests/test_profile_general.py b/projects/rocprofiler-compute/tests/test_profile_general.py index d798359066..19ac263884 100644 --- a/projects/rocprofiler-compute/tests/test_profile_general.py +++ b/projects/rocprofiler-compute/tests/test_profile_general.py @@ -2370,3 +2370,105 @@ class TestSetsIntegration: # workload dir should not exist assert not Path(workload_dir).exists() test_utils.clean_output_dir(config["cleanup"], workload_dir) + + +@pytest.mark.iteration_multiplexing +def test_profiler_options(binary_handler_profile_rocprof_compute): + options = ["--no-native-tool", "--iteration-multiplexing"] + workload_dir = test_utils.get_output_dir() + code = binary_handler_profile_rocprof_compute( + config, workload_dir, options, check_success=False, roof=False + ) + assert code == 1 + + +@pytest.mark.iteration_multiplexing +def test_iteration_multiplexing(binary_handler_profile_rocprof_compute): + options = ["--iteration-multiplexing"] + workload_dir = test_utils.get_output_dir() + _ = binary_handler_profile_rocprof_compute( + config, workload_dir, options, check_success=True, roof=False + ) + + file_dict = test_utils.check_csv_files(workload_dir, num_devices, num_kernels) + if soc == "MI100": + assert sorted(list(file_dict.keys())) == CSVS + elif soc == "MI200": + assert sorted(list(file_dict.keys())) == CSVS + elif "MI300" in soc: + assert sorted(list(file_dict.keys())) == CSVS + elif "MI350" in soc: + assert sorted(list(file_dict.keys())) == CSVS + else: + print(f"Testing isn't supported yet for {soc}") + assert 0 + + validate( + inspect.stack()[0][3], + workload_dir, + file_dict, + ) + + test_utils.clean_output_dir(config["cleanup"], workload_dir) + + +@pytest.mark.iteration_multiplexing +def test_iteration_multiplexing_kernel(binary_handler_profile_rocprof_compute): + options = ["--iteration-multiplexing", "kernel"] + workload_dir = test_utils.get_output_dir() + _ = binary_handler_profile_rocprof_compute( + config, workload_dir, options, check_success=True, roof=False + ) + + file_dict = test_utils.check_csv_files(workload_dir, num_devices, num_kernels) + if soc == "MI100": + assert sorted(list(file_dict.keys())) == CSVS + elif soc == "MI200": + assert sorted(list(file_dict.keys())) == CSVS + elif "MI300" in soc: + assert sorted(list(file_dict.keys())) == CSVS + elif "MI350" in soc: + assert sorted(list(file_dict.keys())) == CSVS + else: + print(f"Testing isn't supported yet for {soc}") + assert 0 + + validate( + inspect.stack()[0][3], + workload_dir, + file_dict, + ) + + test_utils.clean_output_dir(config["cleanup"], workload_dir) + + +@pytest.mark.iteration_multiplexing +def test_iteration_multiplexing_kernel_launch_params( + binary_handler_profile_rocprof_compute, +): + options = ["--iteration-multiplexing", "kernel_launch_params"] + workload_dir = test_utils.get_output_dir() + _ = binary_handler_profile_rocprof_compute( + config, workload_dir, options, check_success=True, roof=False + ) + + file_dict = test_utils.check_csv_files(workload_dir, num_devices, num_kernels) + if soc == "MI100": + assert sorted(list(file_dict.keys())) == CSVS + elif soc == "MI200": + assert sorted(list(file_dict.keys())) == CSVS + elif "MI300" in soc: + assert sorted(list(file_dict.keys())) == CSVS + elif "MI350" in soc: + assert sorted(list(file_dict.keys())) == CSVS + else: + print(f"Testing isn't supported yet for {soc}") + assert 0 + + validate( + inspect.stack()[0][3], + workload_dir, + file_dict, + ) + + test_utils.clean_output_dir(config["cleanup"], workload_dir) diff --git a/projects/rocprofiler-compute/tests/test_utils.py b/projects/rocprofiler-compute/tests/test_utils.py index 4e00b2c544..01b5c8bdd8 100644 --- a/projects/rocprofiler-compute/tests/test_utils.py +++ b/projects/rocprofiler-compute/tests/test_utils.py @@ -8670,3 +8670,123 @@ def test_get_gpu_memory_partition(): ): partition = get_gpu_memory_partition() assert partition == "N/A" + + +# ============================================================================= +# TESTS FOR ITERATION MULTIPLEXING +# ============================================================================= + + +def test_merge_counters_iteration_multiplex(): + """Test merge_counters_iteration_multiplex with sample DataFrame.""" + import pandas as pd + + import utils.utils as utils_mod + + data = { + ("file1", "Dispatch_ID"): [1, 2, 3], + ("file1", "GPU_ID"): [0, 0, 0], + ("file1", "Grid_Size"): [1024, 512, 1024], + ("file1", "Workgroup_Size"): [64, 64, 64], + ("file1", "LDS_Per_Workgroup"): [32, 32, 32], + ("file1", "Scratch_Per_Workitem"): [0, 0, 0], + ("file1", "Arch_VGPR"): [16, 16, 16], + ("file1", "Accum_VGPR"): [0, 0, 0], + ("file1", "SGPR"): [32, 32, 32], + ("file1", "Kernel_Name"): ["kernel_a", "kernel_a", "kernel_a"], + ("file1", "Start_Timestamp"): [1000, 1200, 1400], + ("file1", "End_Timestamp"): [1500, 1700, 1900], + ("file1", "Kernel_ID"): [1, 1, 1], + ("file1", "Counter1"): [100, 200, 300], + ("file1", "Counter2"): [400, 500, 600], + } + + df = pd.DataFrame(data) + df.columns = pd.MultiIndex.from_tuples(df.columns) + + # For "kernel" policy + result = utils_mod.merge_counters_iteration_multiplex(df, "kernel") + column_headers = [headers[1] for headers in result.columns.tolist()] + + assert isinstance(result, pd.DataFrame) + assert "Mean_Time" in column_headers + assert "Median_Time" in column_headers + assert len(result) == 1 # Only one unique kernel_name 'kernel_a' + + # For "kernel_launch_params" policy + result = utils_mod.merge_counters_iteration_multiplex(df, "kernel_launch_params") + column_headers = [headers[1] for headers in result.columns.tolist()] + + assert isinstance(result, pd.DataFrame) + assert "Mean_Time" in column_headers + assert "Median_Time" in column_headers + assert len(result) == 2 + + data = { + ("file1", "Dispatch_ID"): [1, 2, 3], + ("file1", "GPU_ID"): [0, 0, 0], + ("file1", "Grid_Size"): [1024, 1024, 1024], + ("file1", "Workgroup_Size"): [64, 64, 32], + ("file1", "LDS_Per_Workgroup"): [32, 24, 32], + ("file1", "Scratch_Per_Workitem"): [0, 0, 0], + ("file1", "Arch_VGPR"): [16, 16, 16], + ("file1", "Accum_VGPR"): [0, 0, 0], + ("file1", "SGPR"): [32, 32, 32], + ("file1", "Kernel_Name"): ["kernel_a", "kernel_a", "kernel_a"], + ("file1", "Start_Timestamp"): [1000, 1200, 1400], + ("file1", "End_Timestamp"): [1500, 1700, 1900], + ("file1", "Kernel_ID"): [1, 1, 1], + ("file1", "Counter1"): [100, 200, 300], + ("file1", "Counter2"): [400, 500, 600], + } + + df = pd.DataFrame(data) + df.columns = pd.MultiIndex.from_tuples(df.columns) + + result = utils_mod.merge_counters_iteration_multiplex(df, "kernel_launch_params") + column_headers = [headers[1] for headers in result.columns.tolist()] + + assert isinstance(result, pd.DataFrame) + assert "Mean_Time" in column_headers + assert "Median_Time" in column_headers + assert len(result) == 3 + + # Test multi_kernel + data = { + ("file1", "Dispatch_ID"): [1, 2, 3], + ("file1", "GPU_ID"): [0, 0, 0], + ("file1", "Grid_Size"): [1024, 1024, 512], + ("file1", "Workgroup_Size"): [64, 64, 64], + ("file1", "LDS_Per_Workgroup"): [32, 32, 32], + ("file1", "Scratch_Per_Workitem"): [0, 0, 0], + ("file1", "Arch_VGPR"): [16, 16, 16], + ("file1", "Accum_VGPR"): [0, 0, 0], + ("file1", "SGPR"): [32, 32, 32], + ("file1", "Kernel_Name"): ["kernel_a", "kernel_b", "kernel_a"], + ("file1", "Start_Timestamp"): [1000, 1200, 1400], + ("file1", "End_Timestamp"): [1500, 1700, 1900], + ("file1", "Kernel_ID"): [1, 1, 1], + ("file1", "Counter1"): [100, 200, 300], + ("file1", "Counter2"): [400, 500, 600], + } + + df = pd.DataFrame(data) + df.columns = pd.MultiIndex.from_tuples(df.columns) + + # For "kernel" policy + result = utils_mod.merge_counters_iteration_multiplex(df, "kernel") + column_headers = [headers[1] for headers in result.columns.tolist()] + + assert isinstance(result, pd.DataFrame) + assert "Mean_Time" in column_headers + assert "Median_Time" in column_headers + assert len(result) == 2 + + # For "kernel_launch_params" policy + result = utils_mod.merge_counters_iteration_multiplex(df, "kernel_launch_params") + column_headers = [headers[1] for headers in result.columns.tolist()] + + assert isinstance(result, pd.DataFrame) + assert "Mean_Time" in column_headers + assert "Median_Time" in column_headers + assert len(result) == 3 diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/log.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/log.txt new file mode 100644 index 0000000000..fd9cfc077b --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/log.txt @@ -0,0 +1,46 @@ +Rocprofiler-Compute version: 3.3.1 +Profiler choice: rocprofiler-sdk +Path: /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350 +Target: MI350 +Command: ./vcopy -i 20 -n 1048576 -b 256 +Kernel Selection: None +Dispatch Selection: None +Filtered sections: All + +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Collecting Performance Counters +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Using native counter collection tool: /tmp/rocprofiler-compute-tool-hlz4fagh/librocprofiler-compute-tool.so +Iteration multiplexing: kernel +[profiling] Current input files: /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/SQC_DCACHE_INFLIGHT_LEVEL.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/SQC_ICACHE_INFLIGHT_LEVEL.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/SQ_IFETCH_LEVEL.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/SQ_INST_LEVEL_LDS.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/SQ_INST_LEVEL_SMEM.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/SQ_INST_LEVEL_VMEM.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/SQ_LEVEL_WAVES.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_0.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_1.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_10.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_11.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_12.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_2.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_3.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_4.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_5.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_6.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_7.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_8.txt, /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/perfmon/pmc_perf_9.txt + |-> [rocprofiler-sdk] [rocprofiler-compute] [rocprofiler_configure] (priority=1) is using rocprofiler-sdk v1.0.0 (1.0.0) + |-> [rocprofiler-sdk] [rocprofiler-compute] [create_tool_data] Logging counter collection to: /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/out/pmc_1/counter_collection_dc877c12.csv + |-> [rocprofiler-sdk] W20251106 22:30:29.205097 139710715580160 simple_timer.cpp:55] [rocprofv3] tool initialization :: 0.393942 sec + |-> [rocprofiler-sdk] [rocprofiler-compute] In tool init + |-> [rocprofiler-sdk] W20251106 22:30:29.205260 139710715580160 simple_timer.cpp:55] [rocprofv3] './vcopy -i 20 -n 1048576 -b 256' :: 0.000000 sec + |-> [rocprofiler-sdk] W20251106 22:30:29.320658 139710715580160 tool.cpp:2420] HSA version 8.20.0 initialized (instance=0) + |-> [rocprofiler-sdk] W20251106 22:30:29.541811 139710715580160 simple_timer.cpp:55] [rocprofv3] './vcopy -i 20 -n 1048576 -b 256' :: 0.336552 sec + |-> [rocprofiler-sdk] W20251106 22:30:29.551750 139710715580160 generateRocpd.cpp:582] writing SQL database for process 2606306 on node 1574819130 + |-> [rocprofiler-sdk] E20251106 22:30:29.552127 139710715580160 generateRocpd.cpp:605] Opened result file: /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350/out/pmc_1/smci350-zts-gtu-e14-25/2606306_results.db (UUID=000024e7-2937-7937-957f-585d5fb64277) + |-> [rocprofiler-sdk] W20251106 22:30:29.584905 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_string :: 0.016552 sec + |-> [rocprofiler-sdk] W20251106 22:30:29.585113 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_info_node :: 0.000200 sec + |-> [rocprofiler-sdk] W20251106 22:30:29.586186 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_info_process :: 0.001069 sec + |-> [rocprofiler-sdk] W20251106 22:30:29.592977 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_info_agent :: 0.006506 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.791895 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_info_pmc :: 2.198912 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.792565 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd kernel info :: 0.000645 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.792572 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_region :: 0.000002 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.795306 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_kernel_dispatch :: 0.002731 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.795311 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_pmc_event :: 0.000000 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.795313 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_memory_copy :: 0.000000 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.795315 139710715580160 simple_timer.cpp:55] SQLite3 generation :: rocpd_memory_allocate :: 0.000001 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.795405 139710715580160 simple_timer.cpp:55] SQLite3 generation :: SQL indexing :: 0.000089 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.796398 139710715580160 simple_timer.cpp:55] SQLite3 generation :: total :: 2.244648 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.797844 139710715580160 simple_timer.cpp:55] [rocprofv3] output generation :: 2.254739 sec + |-> [rocprofiler-sdk] W20251106 22:30:31.800089 139710715580160 simple_timer.cpp:55] [rocprofv3] tool finalization :: 2.258250 sec + |-> [rocprofiler-sdk] [rocprofiler-compute] In tool fini + |-> [rocprofiler-sdk] vcopy testing on GCD 0 + |-> [rocprofiler-sdk] Finished allocating vectors on the CPU +PC sampling data collection skipped as block 21 is not specified. +[roofline] Skipping roofline +[roofline] Skipping roofline diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_DCACHE_INFLIGHT_LEVEL.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_DCACHE_INFLIGHT_LEVEL.txt new file mode 100644 index 0000000000..7c6096d3f8 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_DCACHE_INFLIGHT_LEVEL.txt @@ -0,0 +1,5 @@ +pmc: SQC_DCACHE_INFLIGHT_LEVEL SQC_DCACHE_INFLIGHT_LEVEL_ACCUM SQC_DCACHE_ATOMIC SQC_DCACHE_HITS SQC_DCACHE_MISSES SQC_DCACHE_MISSES_DUPLICATE SQC_DCACHE_REQ SQC_DCACHE_REQ_READ_1 TA_ADDR_STALLED_BY_TC_CYCLES_sum TA_ADDR_STALLED_BY_TD_CYCLES_sum TD_ATOMIC_WAVEFRONT_sum TD_COALESCABLE_WAVEFRONT_sum TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum TCP_CLIENT_UTCL1_INFLIGHT_sum TCP_GATE_EN1_sum TCP_GATE_EN2_sum TCC_ALL_TC_OP_INV_EVICT_sum TCC_ALL_TC_OP_WB_WRITEBACK_sum TCC_ATOMIC[0] TCC_ATOMIC[100] TCC_ATOMIC[101] TCC_ATOMIC[102] TCC_ATOMIC[103] TCC_ATOMIC[104] TCC_ATOMIC[105] TCC_ATOMIC[106] TCC_ATOMIC[107] TCC_ATOMIC[108] TCC_ATOMIC[109] TCC_ATOMIC[10] TCC_ATOMIC[110] TCC_ATOMIC[111] TCC_ATOMIC[112] TCC_ATOMIC[113] TCC_ATOMIC[114] TCC_ATOMIC[115] TCC_ATOMIC[116] TCC_ATOMIC[117] TCC_ATOMIC[118] TCC_ATOMIC[119] TCC_ATOMIC[11] TCC_ATOMIC[120] TCC_ATOMIC[121] TCC_ATOMIC[122] TCC_ATOMIC[123] TCC_ATOMIC[124] TCC_ATOMIC[125] TCC_ATOMIC[126] TCC_ATOMIC[127] TCC_ATOMIC[12] TCC_ATOMIC[13] TCC_ATOMIC[14] TCC_ATOMIC[15] TCC_ATOMIC[16] TCC_ATOMIC[17] TCC_ATOMIC[18] TCC_ATOMIC[19] TCC_ATOMIC[1] TCC_ATOMIC[20] TCC_ATOMIC[21] TCC_ATOMIC[22] TCC_ATOMIC[23] TCC_ATOMIC[24] TCC_ATOMIC[25] TCC_ATOMIC[26] TCC_ATOMIC[27] TCC_ATOMIC[28] TCC_ATOMIC[29] TCC_ATOMIC[2] TCC_ATOMIC[30] TCC_ATOMIC[31] TCC_ATOMIC[32] TCC_ATOMIC[33] TCC_ATOMIC[34] TCC_ATOMIC[35] TCC_ATOMIC[36] TCC_ATOMIC[37] TCC_ATOMIC[38] TCC_ATOMIC[39] TCC_ATOMIC[3] TCC_ATOMIC[40] TCC_ATOMIC[41] TCC_ATOMIC[42] TCC_ATOMIC[43] TCC_ATOMIC[44] TCC_ATOMIC[45] TCC_ATOMIC[46] TCC_ATOMIC[47] TCC_ATOMIC[48] TCC_ATOMIC[49] TCC_ATOMIC[4] TCC_ATOMIC[50] TCC_ATOMIC[51] TCC_ATOMIC[52] TCC_ATOMIC[53] TCC_ATOMIC[54] TCC_ATOMIC[55] TCC_ATOMIC[56] TCC_ATOMIC[57] TCC_ATOMIC[58] TCC_ATOMIC[59] TCC_ATOMIC[5] TCC_ATOMIC[60] TCC_ATOMIC[61] TCC_ATOMIC[62] TCC_ATOMIC[63] TCC_ATOMIC[64] TCC_ATOMIC[65] TCC_ATOMIC[66] TCC_ATOMIC[67] TCC_ATOMIC[68] TCC_ATOMIC[69] TCC_ATOMIC[6] TCC_ATOMIC[70] TCC_ATOMIC[71] TCC_ATOMIC[72] TCC_ATOMIC[73] TCC_ATOMIC[74] TCC_ATOMIC[75] TCC_ATOMIC[76] TCC_ATOMIC[77] TCC_ATOMIC[78] TCC_ATOMIC[79] TCC_ATOMIC[7] TCC_ATOMIC[80] TCC_ATOMIC[81] TCC_ATOMIC[82] TCC_ATOMIC[83] TCC_ATOMIC[84] TCC_ATOMIC[85] TCC_ATOMIC[86] TCC_ATOMIC[87] TCC_ATOMIC[88] TCC_ATOMIC[89] TCC_ATOMIC[8] TCC_ATOMIC[90] TCC_ATOMIC[91] TCC_ATOMIC[92] TCC_ATOMIC[93] TCC_ATOMIC[94] TCC_ATOMIC[95] TCC_ATOMIC[96] TCC_ATOMIC[97] TCC_ATOMIC[98] TCC_ATOMIC[99] TCC_ATOMIC[9] TCC_ATOMIC_SECTORS_sum CPC_CANE_BUSY CPC_CANE_STALL CPF_CMP_UTCL1_STALL_ON_TRANSLATION CPF_CPF_STAT_BUSY SPI_CS0_BUSY SPI_CS0_CRAWLER_STALL SPI_CS0_NUM_THREADGROUPS SPI_CS0_WAVE SPI_CS1_BUSY SPI_CS1_CRAWLER_STALL GRBM_COUNT GRBM_GUI_ACTIVE + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_DCACHE_INFLIGHT_LEVEL.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_DCACHE_INFLIGHT_LEVEL.yaml new file mode 100644 index 0000000000..8816536a55 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_DCACHE_INFLIGHT_LEVEL.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_ATOMIC[0] + description: TCC_ATOMIC on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_ATOMIC[100] + description: TCC_ATOMIC on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_ATOMIC[101] + description: TCC_ATOMIC on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_ATOMIC[102] + description: TCC_ATOMIC on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_ATOMIC[103] + description: TCC_ATOMIC on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_ATOMIC[104] + description: TCC_ATOMIC on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_ATOMIC[105] + description: TCC_ATOMIC on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_ATOMIC[106] + description: TCC_ATOMIC on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_ATOMIC[107] + description: TCC_ATOMIC on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_ATOMIC[108] + description: TCC_ATOMIC on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_ATOMIC[109] + description: TCC_ATOMIC on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_ATOMIC[10] + description: TCC_ATOMIC on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_ATOMIC[110] + description: TCC_ATOMIC on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_ATOMIC[111] + description: TCC_ATOMIC on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_ATOMIC[112] + description: TCC_ATOMIC on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_ATOMIC[113] + description: TCC_ATOMIC on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_ATOMIC[114] + description: TCC_ATOMIC on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_ATOMIC[115] + description: TCC_ATOMIC on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_ATOMIC[116] + description: TCC_ATOMIC on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_ATOMIC[117] + description: TCC_ATOMIC on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_ATOMIC[118] + description: TCC_ATOMIC on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_ATOMIC[119] + description: TCC_ATOMIC on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_ATOMIC[11] + description: TCC_ATOMIC on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_ATOMIC[120] + description: TCC_ATOMIC on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_ATOMIC[121] + description: TCC_ATOMIC on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_ATOMIC[122] + description: TCC_ATOMIC on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_ATOMIC[123] + description: TCC_ATOMIC on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_ATOMIC[124] + description: TCC_ATOMIC on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_ATOMIC[125] + description: TCC_ATOMIC on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_ATOMIC[126] + description: TCC_ATOMIC on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_ATOMIC[127] + description: TCC_ATOMIC on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_ATOMIC[12] + description: TCC_ATOMIC on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_ATOMIC[13] + description: TCC_ATOMIC on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_ATOMIC[14] + description: TCC_ATOMIC on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_ATOMIC[15] + description: TCC_ATOMIC on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_ATOMIC[16] + description: TCC_ATOMIC on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_ATOMIC[17] + description: TCC_ATOMIC on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_ATOMIC[18] + description: TCC_ATOMIC on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_ATOMIC[19] + description: TCC_ATOMIC on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_ATOMIC[1] + description: TCC_ATOMIC on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_ATOMIC[20] + description: TCC_ATOMIC on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_ATOMIC[21] + description: TCC_ATOMIC on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_ATOMIC[22] + description: TCC_ATOMIC on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_ATOMIC[23] + description: TCC_ATOMIC on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_ATOMIC[24] + description: TCC_ATOMIC on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_ATOMIC[25] + description: TCC_ATOMIC on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_ATOMIC[26] + description: TCC_ATOMIC on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_ATOMIC[27] + description: TCC_ATOMIC on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_ATOMIC[28] + description: TCC_ATOMIC on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_ATOMIC[29] + description: TCC_ATOMIC on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_ATOMIC[2] + description: TCC_ATOMIC on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_ATOMIC[30] + description: TCC_ATOMIC on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_ATOMIC[31] + description: TCC_ATOMIC on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_ATOMIC[32] + description: TCC_ATOMIC on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_ATOMIC[33] + description: TCC_ATOMIC on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_ATOMIC[34] + description: TCC_ATOMIC on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_ATOMIC[35] + description: TCC_ATOMIC on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_ATOMIC[36] + description: TCC_ATOMIC on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_ATOMIC[37] + description: TCC_ATOMIC on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_ATOMIC[38] + description: TCC_ATOMIC on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_ATOMIC[39] + description: TCC_ATOMIC on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_ATOMIC[3] + description: TCC_ATOMIC on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_ATOMIC[40] + description: TCC_ATOMIC on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_ATOMIC[41] + description: TCC_ATOMIC on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_ATOMIC[42] + description: TCC_ATOMIC on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_ATOMIC[43] + description: TCC_ATOMIC on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_ATOMIC[44] + description: TCC_ATOMIC on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_ATOMIC[45] + description: TCC_ATOMIC on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_ATOMIC[46] + description: TCC_ATOMIC on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_ATOMIC[47] + description: TCC_ATOMIC on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_ATOMIC[48] + description: TCC_ATOMIC on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_ATOMIC[49] + description: TCC_ATOMIC on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_ATOMIC[4] + description: TCC_ATOMIC on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_ATOMIC[50] + description: TCC_ATOMIC on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_ATOMIC[51] + description: TCC_ATOMIC on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_ATOMIC[52] + description: TCC_ATOMIC on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_ATOMIC[53] + description: TCC_ATOMIC on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_ATOMIC[54] + description: TCC_ATOMIC on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_ATOMIC[55] + description: TCC_ATOMIC on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_ATOMIC[56] + description: TCC_ATOMIC on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_ATOMIC[57] + description: TCC_ATOMIC on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_ATOMIC[58] + description: TCC_ATOMIC on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_ATOMIC[59] + description: TCC_ATOMIC on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_ATOMIC[5] + description: TCC_ATOMIC on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_ATOMIC[60] + description: TCC_ATOMIC on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_ATOMIC[61] + description: TCC_ATOMIC on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_ATOMIC[62] + description: TCC_ATOMIC on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_ATOMIC[63] + description: TCC_ATOMIC on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_ATOMIC[64] + description: TCC_ATOMIC on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_ATOMIC[65] + description: TCC_ATOMIC on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_ATOMIC[66] + description: TCC_ATOMIC on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_ATOMIC[67] + description: TCC_ATOMIC on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_ATOMIC[68] + description: TCC_ATOMIC on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_ATOMIC[69] + description: TCC_ATOMIC on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_ATOMIC[6] + description: TCC_ATOMIC on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_ATOMIC[70] + description: TCC_ATOMIC on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_ATOMIC[71] + description: TCC_ATOMIC on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_ATOMIC[72] + description: TCC_ATOMIC on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_ATOMIC[73] + description: TCC_ATOMIC on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_ATOMIC[74] + description: TCC_ATOMIC on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_ATOMIC[75] + description: TCC_ATOMIC on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_ATOMIC[76] + description: TCC_ATOMIC on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_ATOMIC[77] + description: TCC_ATOMIC on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_ATOMIC[78] + description: TCC_ATOMIC on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_ATOMIC[79] + description: TCC_ATOMIC on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_ATOMIC[7] + description: TCC_ATOMIC on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_ATOMIC[80] + description: TCC_ATOMIC on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_ATOMIC[81] + description: TCC_ATOMIC on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_ATOMIC[82] + description: TCC_ATOMIC on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_ATOMIC[83] + description: TCC_ATOMIC on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_ATOMIC[84] + description: TCC_ATOMIC on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_ATOMIC[85] + description: TCC_ATOMIC on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_ATOMIC[86] + description: TCC_ATOMIC on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_ATOMIC[87] + description: TCC_ATOMIC on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_ATOMIC[88] + description: TCC_ATOMIC on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_ATOMIC[89] + description: TCC_ATOMIC on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_ATOMIC[8] + description: TCC_ATOMIC on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_ATOMIC[90] + description: TCC_ATOMIC on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_ATOMIC[91] + description: TCC_ATOMIC on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_ATOMIC[92] + description: TCC_ATOMIC on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_ATOMIC[93] + description: TCC_ATOMIC on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_ATOMIC[94] + description: TCC_ATOMIC on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_ATOMIC[95] + description: TCC_ATOMIC on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_ATOMIC[96] + description: TCC_ATOMIC on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_ATOMIC[97] + description: TCC_ATOMIC on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_ATOMIC[98] + description: TCC_ATOMIC on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_ATOMIC[99] + description: TCC_ATOMIC on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_ATOMIC[9] + description: TCC_ATOMIC on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_ICACHE_INFLIGHT_LEVEL.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_ICACHE_INFLIGHT_LEVEL.txt new file mode 100644 index 0000000000..6efcf308ad --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_ICACHE_INFLIGHT_LEVEL.txt @@ -0,0 +1,5 @@ +pmc: SQC_ICACHE_INFLIGHT_LEVEL SQC_ICACHE_INFLIGHT_LEVEL_ACCUM SQC_DCACHE_REQ_READ_16 SQC_DCACHE_REQ_READ_2 SQC_DCACHE_REQ_READ_4 SQC_DCACHE_REQ_READ_8 SQC_ICACHE_HITS SQC_ICACHE_MISSES TA_BUFFER_ATOMIC_WAVEFRONTS_sum TA_BUFFER_COALESCEABLE_WAVEFRONTS_sum TD_LOAD_WAVEFRONT_sum TD_SPI_STALL_sum TCP_LFIFO_STALL_CYCLES_sum TCP_PENDING_STALL_CYCLES_sum TCP_READ_TAGCONFLICT_STALL_CYCLES_sum TCP_RFIFO_STALL_CYCLES_sum TCC_ATOMIC_sum TCC_BUBBLE[0] TCC_BUBBLE[100] TCC_BUBBLE[101] TCC_BUBBLE[102] TCC_BUBBLE[103] TCC_BUBBLE[104] TCC_BUBBLE[105] TCC_BUBBLE[106] TCC_BUBBLE[107] TCC_BUBBLE[108] TCC_BUBBLE[109] TCC_BUBBLE[10] TCC_BUBBLE[110] TCC_BUBBLE[111] TCC_BUBBLE[112] TCC_BUBBLE[113] TCC_BUBBLE[114] TCC_BUBBLE[115] TCC_BUBBLE[116] TCC_BUBBLE[117] TCC_BUBBLE[118] TCC_BUBBLE[119] TCC_BUBBLE[11] TCC_BUBBLE[120] TCC_BUBBLE[121] TCC_BUBBLE[122] TCC_BUBBLE[123] TCC_BUBBLE[124] TCC_BUBBLE[125] TCC_BUBBLE[126] TCC_BUBBLE[127] TCC_BUBBLE[12] TCC_BUBBLE[13] TCC_BUBBLE[14] TCC_BUBBLE[15] TCC_BUBBLE[16] TCC_BUBBLE[17] TCC_BUBBLE[18] TCC_BUBBLE[19] TCC_BUBBLE[1] TCC_BUBBLE[20] TCC_BUBBLE[21] TCC_BUBBLE[22] TCC_BUBBLE[23] TCC_BUBBLE[24] TCC_BUBBLE[25] TCC_BUBBLE[26] TCC_BUBBLE[27] TCC_BUBBLE[28] TCC_BUBBLE[29] TCC_BUBBLE[2] TCC_BUBBLE[30] TCC_BUBBLE[31] TCC_BUBBLE[32] TCC_BUBBLE[33] TCC_BUBBLE[34] TCC_BUBBLE[35] TCC_BUBBLE[36] TCC_BUBBLE[37] TCC_BUBBLE[38] TCC_BUBBLE[39] TCC_BUBBLE[3] TCC_BUBBLE[40] TCC_BUBBLE[41] TCC_BUBBLE[42] TCC_BUBBLE[43] TCC_BUBBLE[44] TCC_BUBBLE[45] TCC_BUBBLE[46] TCC_BUBBLE[47] TCC_BUBBLE[48] TCC_BUBBLE[49] TCC_BUBBLE[4] TCC_BUBBLE[50] TCC_BUBBLE[51] TCC_BUBBLE[52] TCC_BUBBLE[53] TCC_BUBBLE[54] TCC_BUBBLE[55] TCC_BUBBLE[56] TCC_BUBBLE[57] TCC_BUBBLE[58] TCC_BUBBLE[59] TCC_BUBBLE[5] TCC_BUBBLE[60] TCC_BUBBLE[61] TCC_BUBBLE[62] TCC_BUBBLE[63] TCC_BUBBLE[64] TCC_BUBBLE[65] TCC_BUBBLE[66] TCC_BUBBLE[67] TCC_BUBBLE[68] TCC_BUBBLE[69] TCC_BUBBLE[6] TCC_BUBBLE[70] TCC_BUBBLE[71] TCC_BUBBLE[72] TCC_BUBBLE[73] TCC_BUBBLE[74] TCC_BUBBLE[75] TCC_BUBBLE[76] TCC_BUBBLE[77] TCC_BUBBLE[78] TCC_BUBBLE[79] TCC_BUBBLE[7] TCC_BUBBLE[80] TCC_BUBBLE[81] TCC_BUBBLE[82] TCC_BUBBLE[83] TCC_BUBBLE[84] TCC_BUBBLE[85] TCC_BUBBLE[86] TCC_BUBBLE[87] TCC_BUBBLE[88] TCC_BUBBLE[89] TCC_BUBBLE[8] TCC_BUBBLE[90] TCC_BUBBLE[91] TCC_BUBBLE[92] TCC_BUBBLE[93] TCC_BUBBLE[94] TCC_BUBBLE[95] TCC_BUBBLE[96] TCC_BUBBLE[97] TCC_BUBBLE[98] TCC_BUBBLE[99] TCC_BUBBLE[9] TCC_BUBBLE_sum TCC_BUSY_sum CPC_CPC_STAT_BUSY CPC_CPC_STAT_IDLE CPF_CPF_STAT_IDLE CPF_CPF_STAT_STALL SPI_CS1_NUM_THREADGROUPS SPI_CS1_WAVE SPI_CS2_BUSY SPI_CS2_CRAWLER_STALL SPI_CS2_NUM_THREADGROUPS SPI_CS2_WAVE GRBM_SPI_BUSY + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_ICACHE_INFLIGHT_LEVEL.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_ICACHE_INFLIGHT_LEVEL.yaml new file mode 100644 index 0000000000..8c74c495f4 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQC_ICACHE_INFLIGHT_LEVEL.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_BUBBLE[0] + description: TCC_BUBBLE on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_BUBBLE[100] + description: TCC_BUBBLE on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_BUBBLE[101] + description: TCC_BUBBLE on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_BUBBLE[102] + description: TCC_BUBBLE on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_BUBBLE[103] + description: TCC_BUBBLE on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_BUBBLE[104] + description: TCC_BUBBLE on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_BUBBLE[105] + description: TCC_BUBBLE on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_BUBBLE[106] + description: TCC_BUBBLE on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_BUBBLE[107] + description: TCC_BUBBLE on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_BUBBLE[108] + description: TCC_BUBBLE on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_BUBBLE[109] + description: TCC_BUBBLE on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_BUBBLE[10] + description: TCC_BUBBLE on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_BUBBLE[110] + description: TCC_BUBBLE on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_BUBBLE[111] + description: TCC_BUBBLE on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_BUBBLE[112] + description: TCC_BUBBLE on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_BUBBLE[113] + description: TCC_BUBBLE on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_BUBBLE[114] + description: TCC_BUBBLE on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_BUBBLE[115] + description: TCC_BUBBLE on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_BUBBLE[116] + description: TCC_BUBBLE on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_BUBBLE[117] + description: TCC_BUBBLE on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_BUBBLE[118] + description: TCC_BUBBLE on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_BUBBLE[119] + description: TCC_BUBBLE on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_BUBBLE[11] + description: TCC_BUBBLE on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_BUBBLE[120] + description: TCC_BUBBLE on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_BUBBLE[121] + description: TCC_BUBBLE on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_BUBBLE[122] + description: TCC_BUBBLE on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_BUBBLE[123] + description: TCC_BUBBLE on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_BUBBLE[124] + description: TCC_BUBBLE on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_BUBBLE[125] + description: TCC_BUBBLE on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_BUBBLE[126] + description: TCC_BUBBLE on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_BUBBLE[127] + description: TCC_BUBBLE on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_BUBBLE[12] + description: TCC_BUBBLE on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_BUBBLE[13] + description: TCC_BUBBLE on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_BUBBLE[14] + description: TCC_BUBBLE on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_BUBBLE[15] + description: TCC_BUBBLE on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_BUBBLE[16] + description: TCC_BUBBLE on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_BUBBLE[17] + description: TCC_BUBBLE on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_BUBBLE[18] + description: TCC_BUBBLE on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_BUBBLE[19] + description: TCC_BUBBLE on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_BUBBLE[1] + description: TCC_BUBBLE on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_BUBBLE[20] + description: TCC_BUBBLE on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_BUBBLE[21] + description: TCC_BUBBLE on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_BUBBLE[22] + description: TCC_BUBBLE on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_BUBBLE[23] + description: TCC_BUBBLE on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_BUBBLE[24] + description: TCC_BUBBLE on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_BUBBLE[25] + description: TCC_BUBBLE on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_BUBBLE[26] + description: TCC_BUBBLE on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_BUBBLE[27] + description: TCC_BUBBLE on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_BUBBLE[28] + description: TCC_BUBBLE on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_BUBBLE[29] + description: TCC_BUBBLE on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_BUBBLE[2] + description: TCC_BUBBLE on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_BUBBLE[30] + description: TCC_BUBBLE on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_BUBBLE[31] + description: TCC_BUBBLE on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_BUBBLE[32] + description: TCC_BUBBLE on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_BUBBLE[33] + description: TCC_BUBBLE on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_BUBBLE[34] + description: TCC_BUBBLE on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_BUBBLE[35] + description: TCC_BUBBLE on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_BUBBLE[36] + description: TCC_BUBBLE on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_BUBBLE[37] + description: TCC_BUBBLE on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_BUBBLE[38] + description: TCC_BUBBLE on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_BUBBLE[39] + description: TCC_BUBBLE on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_BUBBLE[3] + description: TCC_BUBBLE on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_BUBBLE[40] + description: TCC_BUBBLE on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_BUBBLE[41] + description: TCC_BUBBLE on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_BUBBLE[42] + description: TCC_BUBBLE on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_BUBBLE[43] + description: TCC_BUBBLE on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_BUBBLE[44] + description: TCC_BUBBLE on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_BUBBLE[45] + description: TCC_BUBBLE on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_BUBBLE[46] + description: TCC_BUBBLE on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_BUBBLE[47] + description: TCC_BUBBLE on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_BUBBLE[48] + description: TCC_BUBBLE on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_BUBBLE[49] + description: TCC_BUBBLE on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_BUBBLE[4] + description: TCC_BUBBLE on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_BUBBLE[50] + description: TCC_BUBBLE on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_BUBBLE[51] + description: TCC_BUBBLE on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_BUBBLE[52] + description: TCC_BUBBLE on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_BUBBLE[53] + description: TCC_BUBBLE on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_BUBBLE[54] + description: TCC_BUBBLE on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_BUBBLE[55] + description: TCC_BUBBLE on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_BUBBLE[56] + description: TCC_BUBBLE on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_BUBBLE[57] + description: TCC_BUBBLE on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_BUBBLE[58] + description: TCC_BUBBLE on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_BUBBLE[59] + description: TCC_BUBBLE on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_BUBBLE[5] + description: TCC_BUBBLE on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_BUBBLE[60] + description: TCC_BUBBLE on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_BUBBLE[61] + description: TCC_BUBBLE on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_BUBBLE[62] + description: TCC_BUBBLE on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_BUBBLE[63] + description: TCC_BUBBLE on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_BUBBLE[64] + description: TCC_BUBBLE on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_BUBBLE[65] + description: TCC_BUBBLE on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_BUBBLE[66] + description: TCC_BUBBLE on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_BUBBLE[67] + description: TCC_BUBBLE on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_BUBBLE[68] + description: TCC_BUBBLE on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_BUBBLE[69] + description: TCC_BUBBLE on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_BUBBLE[6] + description: TCC_BUBBLE on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_BUBBLE[70] + description: TCC_BUBBLE on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_BUBBLE[71] + description: TCC_BUBBLE on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_BUBBLE[72] + description: TCC_BUBBLE on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_BUBBLE[73] + description: TCC_BUBBLE on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_BUBBLE[74] + description: TCC_BUBBLE on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_BUBBLE[75] + description: TCC_BUBBLE on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_BUBBLE[76] + description: TCC_BUBBLE on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_BUBBLE[77] + description: TCC_BUBBLE on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_BUBBLE[78] + description: TCC_BUBBLE on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_BUBBLE[79] + description: TCC_BUBBLE on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_BUBBLE[7] + description: TCC_BUBBLE on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_BUBBLE[80] + description: TCC_BUBBLE on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_BUBBLE[81] + description: TCC_BUBBLE on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_BUBBLE[82] + description: TCC_BUBBLE on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_BUBBLE[83] + description: TCC_BUBBLE on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_BUBBLE[84] + description: TCC_BUBBLE on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_BUBBLE[85] + description: TCC_BUBBLE on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_BUBBLE[86] + description: TCC_BUBBLE on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_BUBBLE[87] + description: TCC_BUBBLE on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_BUBBLE[88] + description: TCC_BUBBLE on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_BUBBLE[89] + description: TCC_BUBBLE on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_BUBBLE[8] + description: TCC_BUBBLE on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_BUBBLE[90] + description: TCC_BUBBLE on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_BUBBLE[91] + description: TCC_BUBBLE on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_BUBBLE[92] + description: TCC_BUBBLE on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_BUBBLE[93] + description: TCC_BUBBLE on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_BUBBLE[94] + description: TCC_BUBBLE on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_BUBBLE[95] + description: TCC_BUBBLE on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_BUBBLE[96] + description: TCC_BUBBLE on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_BUBBLE[97] + description: TCC_BUBBLE on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_BUBBLE[98] + description: TCC_BUBBLE on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_BUBBLE[99] + description: TCC_BUBBLE on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_BUBBLE[9] + description: TCC_BUBBLE on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_BUBBLE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_IFETCH_LEVEL.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_IFETCH_LEVEL.txt new file mode 100644 index 0000000000..99c23d4fe2 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_IFETCH_LEVEL.txt @@ -0,0 +1,5 @@ +pmc: SQ_IFETCH_LEVEL SQ_IFETCH_LEVEL_ACCUM SQC_ICACHE_MISSES_DUPLICATE SQC_ICACHE_REQ SQC_TC_DATA_ATOMIC_REQ SQC_TC_DATA_READ_REQ SQC_TC_DATA_WRITE_REQ SQC_TC_INST_REQ TA_BUFFER_COALESCED_READ_CYCLES_sum TA_BUFFER_COALESCED_WRITE_CYCLES_sum TD_STORE_WAVEFRONT_sum TD_TC_STALL_sum TCP_TAGRAM0_REQ_sum TCP_TAGRAM1_REQ_sum TCP_TAGRAM2_REQ_sum TCP_TAGRAM3_REQ_sum TCC_BYPASS_REQ_sum TCC_CC_REQ_sum TCC_EA0_ATOMIC[0] TCC_EA0_ATOMIC[100] TCC_EA0_ATOMIC[101] TCC_EA0_ATOMIC[102] TCC_EA0_ATOMIC[103] TCC_EA0_ATOMIC[104] TCC_EA0_ATOMIC[105] TCC_EA0_ATOMIC[106] TCC_EA0_ATOMIC[107] TCC_EA0_ATOMIC[108] TCC_EA0_ATOMIC[109] TCC_EA0_ATOMIC[10] TCC_EA0_ATOMIC[110] TCC_EA0_ATOMIC[111] TCC_EA0_ATOMIC[112] TCC_EA0_ATOMIC[113] TCC_EA0_ATOMIC[114] TCC_EA0_ATOMIC[115] TCC_EA0_ATOMIC[116] TCC_EA0_ATOMIC[117] TCC_EA0_ATOMIC[118] TCC_EA0_ATOMIC[119] TCC_EA0_ATOMIC[11] TCC_EA0_ATOMIC[120] TCC_EA0_ATOMIC[121] TCC_EA0_ATOMIC[122] TCC_EA0_ATOMIC[123] TCC_EA0_ATOMIC[124] TCC_EA0_ATOMIC[125] TCC_EA0_ATOMIC[126] TCC_EA0_ATOMIC[127] TCC_EA0_ATOMIC[12] TCC_EA0_ATOMIC[13] TCC_EA0_ATOMIC[14] TCC_EA0_ATOMIC[15] TCC_EA0_ATOMIC[16] TCC_EA0_ATOMIC[17] TCC_EA0_ATOMIC[18] TCC_EA0_ATOMIC[19] TCC_EA0_ATOMIC[1] TCC_EA0_ATOMIC[20] TCC_EA0_ATOMIC[21] TCC_EA0_ATOMIC[22] TCC_EA0_ATOMIC[23] TCC_EA0_ATOMIC[24] TCC_EA0_ATOMIC[25] TCC_EA0_ATOMIC[26] TCC_EA0_ATOMIC[27] TCC_EA0_ATOMIC[28] TCC_EA0_ATOMIC[29] TCC_EA0_ATOMIC[2] TCC_EA0_ATOMIC[30] TCC_EA0_ATOMIC[31] TCC_EA0_ATOMIC[32] TCC_EA0_ATOMIC[33] TCC_EA0_ATOMIC[34] TCC_EA0_ATOMIC[35] TCC_EA0_ATOMIC[36] TCC_EA0_ATOMIC[37] TCC_EA0_ATOMIC[38] TCC_EA0_ATOMIC[39] TCC_EA0_ATOMIC[3] TCC_EA0_ATOMIC[40] TCC_EA0_ATOMIC[41] TCC_EA0_ATOMIC[42] TCC_EA0_ATOMIC[43] TCC_EA0_ATOMIC[44] TCC_EA0_ATOMIC[45] TCC_EA0_ATOMIC[46] TCC_EA0_ATOMIC[47] TCC_EA0_ATOMIC[48] TCC_EA0_ATOMIC[49] TCC_EA0_ATOMIC[4] TCC_EA0_ATOMIC[50] TCC_EA0_ATOMIC[51] TCC_EA0_ATOMIC[52] TCC_EA0_ATOMIC[53] TCC_EA0_ATOMIC[54] TCC_EA0_ATOMIC[55] TCC_EA0_ATOMIC[56] TCC_EA0_ATOMIC[57] TCC_EA0_ATOMIC[58] TCC_EA0_ATOMIC[59] TCC_EA0_ATOMIC[5] TCC_EA0_ATOMIC[60] TCC_EA0_ATOMIC[61] TCC_EA0_ATOMIC[62] TCC_EA0_ATOMIC[63] TCC_EA0_ATOMIC[64] TCC_EA0_ATOMIC[65] TCC_EA0_ATOMIC[66] TCC_EA0_ATOMIC[67] TCC_EA0_ATOMIC[68] TCC_EA0_ATOMIC[69] TCC_EA0_ATOMIC[6] TCC_EA0_ATOMIC[70] TCC_EA0_ATOMIC[71] TCC_EA0_ATOMIC[72] TCC_EA0_ATOMIC[73] TCC_EA0_ATOMIC[74] TCC_EA0_ATOMIC[75] TCC_EA0_ATOMIC[76] TCC_EA0_ATOMIC[77] TCC_EA0_ATOMIC[78] TCC_EA0_ATOMIC[79] TCC_EA0_ATOMIC[7] TCC_EA0_ATOMIC[80] TCC_EA0_ATOMIC[81] TCC_EA0_ATOMIC[82] TCC_EA0_ATOMIC[83] TCC_EA0_ATOMIC[84] TCC_EA0_ATOMIC[85] TCC_EA0_ATOMIC[86] TCC_EA0_ATOMIC[87] TCC_EA0_ATOMIC[88] TCC_EA0_ATOMIC[89] TCC_EA0_ATOMIC[8] TCC_EA0_ATOMIC[90] TCC_EA0_ATOMIC[91] TCC_EA0_ATOMIC[92] TCC_EA0_ATOMIC[93] TCC_EA0_ATOMIC[94] TCC_EA0_ATOMIC[95] TCC_EA0_ATOMIC[96] TCC_EA0_ATOMIC[97] TCC_EA0_ATOMIC[98] TCC_EA0_ATOMIC[99] TCC_EA0_ATOMIC[9] TCC_EA0_ATOMIC_LEVEL[0] TCC_EA0_ATOMIC_LEVEL[100] TCC_EA0_ATOMIC_LEVEL[101] TCC_EA0_ATOMIC_LEVEL[102] TCC_EA0_ATOMIC_LEVEL[103] TCC_EA0_ATOMIC_LEVEL[104] TCC_EA0_ATOMIC_LEVEL[105] TCC_EA0_ATOMIC_LEVEL[106] TCC_EA0_ATOMIC_LEVEL[107] TCC_EA0_ATOMIC_LEVEL[108] TCC_EA0_ATOMIC_LEVEL[109] TCC_EA0_ATOMIC_LEVEL[10] TCC_EA0_ATOMIC_LEVEL[110] TCC_EA0_ATOMIC_LEVEL[111] TCC_EA0_ATOMIC_LEVEL[112] TCC_EA0_ATOMIC_LEVEL[113] TCC_EA0_ATOMIC_LEVEL[114] TCC_EA0_ATOMIC_LEVEL[115] TCC_EA0_ATOMIC_LEVEL[116] TCC_EA0_ATOMIC_LEVEL[117] TCC_EA0_ATOMIC_LEVEL[118] TCC_EA0_ATOMIC_LEVEL[119] TCC_EA0_ATOMIC_LEVEL[11] TCC_EA0_ATOMIC_LEVEL[120] TCC_EA0_ATOMIC_LEVEL[121] TCC_EA0_ATOMIC_LEVEL[122] TCC_EA0_ATOMIC_LEVEL[123] TCC_EA0_ATOMIC_LEVEL[124] TCC_EA0_ATOMIC_LEVEL[125] TCC_EA0_ATOMIC_LEVEL[126] TCC_EA0_ATOMIC_LEVEL[127] TCC_EA0_ATOMIC_LEVEL[12] TCC_EA0_ATOMIC_LEVEL[13] TCC_EA0_ATOMIC_LEVEL[14] TCC_EA0_ATOMIC_LEVEL[15] TCC_EA0_ATOMIC_LEVEL[16] TCC_EA0_ATOMIC_LEVEL[17] TCC_EA0_ATOMIC_LEVEL[18] TCC_EA0_ATOMIC_LEVEL[19] TCC_EA0_ATOMIC_LEVEL[1] TCC_EA0_ATOMIC_LEVEL[20] TCC_EA0_ATOMIC_LEVEL[21] TCC_EA0_ATOMIC_LEVEL[22] TCC_EA0_ATOMIC_LEVEL[23] TCC_EA0_ATOMIC_LEVEL[24] TCC_EA0_ATOMIC_LEVEL[25] TCC_EA0_ATOMIC_LEVEL[26] TCC_EA0_ATOMIC_LEVEL[27] TCC_EA0_ATOMIC_LEVEL[28] TCC_EA0_ATOMIC_LEVEL[29] TCC_EA0_ATOMIC_LEVEL[2] TCC_EA0_ATOMIC_LEVEL[30] TCC_EA0_ATOMIC_LEVEL[31] TCC_EA0_ATOMIC_LEVEL[32] TCC_EA0_ATOMIC_LEVEL[33] TCC_EA0_ATOMIC_LEVEL[34] TCC_EA0_ATOMIC_LEVEL[35] TCC_EA0_ATOMIC_LEVEL[36] TCC_EA0_ATOMIC_LEVEL[37] TCC_EA0_ATOMIC_LEVEL[38] TCC_EA0_ATOMIC_LEVEL[39] TCC_EA0_ATOMIC_LEVEL[3] TCC_EA0_ATOMIC_LEVEL[40] TCC_EA0_ATOMIC_LEVEL[41] TCC_EA0_ATOMIC_LEVEL[42] TCC_EA0_ATOMIC_LEVEL[43] TCC_EA0_ATOMIC_LEVEL[44] TCC_EA0_ATOMIC_LEVEL[45] TCC_EA0_ATOMIC_LEVEL[46] TCC_EA0_ATOMIC_LEVEL[47] TCC_EA0_ATOMIC_LEVEL[48] TCC_EA0_ATOMIC_LEVEL[49] TCC_EA0_ATOMIC_LEVEL[4] TCC_EA0_ATOMIC_LEVEL[50] TCC_EA0_ATOMIC_LEVEL[51] TCC_EA0_ATOMIC_LEVEL[52] TCC_EA0_ATOMIC_LEVEL[53] TCC_EA0_ATOMIC_LEVEL[54] TCC_EA0_ATOMIC_LEVEL[55] TCC_EA0_ATOMIC_LEVEL[56] TCC_EA0_ATOMIC_LEVEL[57] TCC_EA0_ATOMIC_LEVEL[58] TCC_EA0_ATOMIC_LEVEL[59] TCC_EA0_ATOMIC_LEVEL[5] TCC_EA0_ATOMIC_LEVEL[60] TCC_EA0_ATOMIC_LEVEL[61] TCC_EA0_ATOMIC_LEVEL[62] TCC_EA0_ATOMIC_LEVEL[63] TCC_EA0_ATOMIC_LEVEL[64] TCC_EA0_ATOMIC_LEVEL[65] TCC_EA0_ATOMIC_LEVEL[66] TCC_EA0_ATOMIC_LEVEL[67] TCC_EA0_ATOMIC_LEVEL[68] TCC_EA0_ATOMIC_LEVEL[69] TCC_EA0_ATOMIC_LEVEL[6] TCC_EA0_ATOMIC_LEVEL[70] TCC_EA0_ATOMIC_LEVEL[71] TCC_EA0_ATOMIC_LEVEL[72] TCC_EA0_ATOMIC_LEVEL[73] TCC_EA0_ATOMIC_LEVEL[74] TCC_EA0_ATOMIC_LEVEL[75] TCC_EA0_ATOMIC_LEVEL[76] TCC_EA0_ATOMIC_LEVEL[77] TCC_EA0_ATOMIC_LEVEL[78] TCC_EA0_ATOMIC_LEVEL[79] TCC_EA0_ATOMIC_LEVEL[7] TCC_EA0_ATOMIC_LEVEL[80] TCC_EA0_ATOMIC_LEVEL[81] TCC_EA0_ATOMIC_LEVEL[82] TCC_EA0_ATOMIC_LEVEL[83] TCC_EA0_ATOMIC_LEVEL[84] TCC_EA0_ATOMIC_LEVEL[85] TCC_EA0_ATOMIC_LEVEL[86] TCC_EA0_ATOMIC_LEVEL[87] TCC_EA0_ATOMIC_LEVEL[88] TCC_EA0_ATOMIC_LEVEL[89] TCC_EA0_ATOMIC_LEVEL[8] TCC_EA0_ATOMIC_LEVEL[90] TCC_EA0_ATOMIC_LEVEL[91] TCC_EA0_ATOMIC_LEVEL[92] TCC_EA0_ATOMIC_LEVEL[93] TCC_EA0_ATOMIC_LEVEL[94] TCC_EA0_ATOMIC_LEVEL[95] TCC_EA0_ATOMIC_LEVEL[96] TCC_EA0_ATOMIC_LEVEL[97] TCC_EA0_ATOMIC_LEVEL[98] TCC_EA0_ATOMIC_LEVEL[99] TCC_EA0_ATOMIC_LEVEL[9] CPC_CPC_STAT_STALL CPC_CPC_TCIU_BUSY CPF_CPF_TCIU_BUSY CPF_CPF_TCIU_IDLE SPI_CS3_BUSY SPI_CS3_CRAWLER_STALL SPI_CS3_NUM_THREADGROUPS SPI_CS3_WAVE SPI_CSC_WAVE_CNT_BUSY SPI_CSQ_P0_OCCUPANCY + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_IFETCH_LEVEL.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_IFETCH_LEVEL.yaml new file mode 100644 index 0000000000..3f1924a17d --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_IFETCH_LEVEL.yaml @@ -0,0 +1,1795 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_ATOMIC[0] + description: TCC_EA0_ATOMIC on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC[100] + description: TCC_EA0_ATOMIC on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC[101] + description: TCC_EA0_ATOMIC on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC[102] + description: TCC_EA0_ATOMIC on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC[103] + description: TCC_EA0_ATOMIC on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC[104] + description: TCC_EA0_ATOMIC on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC[105] + description: TCC_EA0_ATOMIC on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC[106] + description: TCC_EA0_ATOMIC on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC[107] + description: TCC_EA0_ATOMIC on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC[108] + description: TCC_EA0_ATOMIC on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC[109] + description: TCC_EA0_ATOMIC on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC[10] + description: TCC_EA0_ATOMIC on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC[110] + description: TCC_EA0_ATOMIC on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC[111] + description: TCC_EA0_ATOMIC on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC[112] + description: TCC_EA0_ATOMIC on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC[113] + description: TCC_EA0_ATOMIC on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC[114] + description: TCC_EA0_ATOMIC on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC[115] + description: TCC_EA0_ATOMIC on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC[116] + description: TCC_EA0_ATOMIC on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC[117] + description: TCC_EA0_ATOMIC on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC[118] + description: TCC_EA0_ATOMIC on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC[119] + description: TCC_EA0_ATOMIC on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC[11] + description: TCC_EA0_ATOMIC on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC[120] + description: TCC_EA0_ATOMIC on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC[121] + description: TCC_EA0_ATOMIC on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC[122] + description: TCC_EA0_ATOMIC on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC[123] + description: TCC_EA0_ATOMIC on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC[124] + description: TCC_EA0_ATOMIC on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC[125] + description: TCC_EA0_ATOMIC on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC[126] + description: TCC_EA0_ATOMIC on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC[127] + description: TCC_EA0_ATOMIC on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC[12] + description: TCC_EA0_ATOMIC on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC[13] + description: TCC_EA0_ATOMIC on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC[14] + description: TCC_EA0_ATOMIC on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC[15] + description: TCC_EA0_ATOMIC on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC[16] + description: TCC_EA0_ATOMIC on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC[17] + description: TCC_EA0_ATOMIC on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC[18] + description: TCC_EA0_ATOMIC on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC[19] + description: TCC_EA0_ATOMIC on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC[1] + description: TCC_EA0_ATOMIC on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC[20] + description: TCC_EA0_ATOMIC on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC[21] + description: TCC_EA0_ATOMIC on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC[22] + description: TCC_EA0_ATOMIC on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC[23] + description: TCC_EA0_ATOMIC on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC[24] + description: TCC_EA0_ATOMIC on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC[25] + description: TCC_EA0_ATOMIC on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC[26] + description: TCC_EA0_ATOMIC on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC[27] + description: TCC_EA0_ATOMIC on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC[28] + description: TCC_EA0_ATOMIC on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC[29] + description: TCC_EA0_ATOMIC on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC[2] + description: TCC_EA0_ATOMIC on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC[30] + description: TCC_EA0_ATOMIC on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC[31] + description: TCC_EA0_ATOMIC on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC[32] + description: TCC_EA0_ATOMIC on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC[33] + description: TCC_EA0_ATOMIC on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC[34] + description: TCC_EA0_ATOMIC on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC[35] + description: TCC_EA0_ATOMIC on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC[36] + description: TCC_EA0_ATOMIC on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC[37] + description: TCC_EA0_ATOMIC on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC[38] + description: TCC_EA0_ATOMIC on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC[39] + description: TCC_EA0_ATOMIC on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC[3] + description: TCC_EA0_ATOMIC on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC[40] + description: TCC_EA0_ATOMIC on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC[41] + description: TCC_EA0_ATOMIC on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC[42] + description: TCC_EA0_ATOMIC on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC[43] + description: TCC_EA0_ATOMIC on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC[44] + description: TCC_EA0_ATOMIC on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC[45] + description: TCC_EA0_ATOMIC on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC[46] + description: TCC_EA0_ATOMIC on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC[47] + description: TCC_EA0_ATOMIC on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC[48] + description: TCC_EA0_ATOMIC on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC[49] + description: TCC_EA0_ATOMIC on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC[4] + description: TCC_EA0_ATOMIC on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC[50] + description: TCC_EA0_ATOMIC on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC[51] + description: TCC_EA0_ATOMIC on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC[52] + description: TCC_EA0_ATOMIC on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC[53] + description: TCC_EA0_ATOMIC on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC[54] + description: TCC_EA0_ATOMIC on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC[55] + description: TCC_EA0_ATOMIC on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC[56] + description: TCC_EA0_ATOMIC on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC[57] + description: TCC_EA0_ATOMIC on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC[58] + description: TCC_EA0_ATOMIC on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC[59] + description: TCC_EA0_ATOMIC on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC[5] + description: TCC_EA0_ATOMIC on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC[60] + description: TCC_EA0_ATOMIC on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC[61] + description: TCC_EA0_ATOMIC on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC[62] + description: TCC_EA0_ATOMIC on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC[63] + description: TCC_EA0_ATOMIC on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC[64] + description: TCC_EA0_ATOMIC on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC[65] + description: TCC_EA0_ATOMIC on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC[66] + description: TCC_EA0_ATOMIC on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC[67] + description: TCC_EA0_ATOMIC on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC[68] + description: TCC_EA0_ATOMIC on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC[69] + description: TCC_EA0_ATOMIC on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC[6] + description: TCC_EA0_ATOMIC on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC[70] + description: TCC_EA0_ATOMIC on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC[71] + description: TCC_EA0_ATOMIC on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC[72] + description: TCC_EA0_ATOMIC on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC[73] + description: TCC_EA0_ATOMIC on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC[74] + description: TCC_EA0_ATOMIC on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC[75] + description: TCC_EA0_ATOMIC on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC[76] + description: TCC_EA0_ATOMIC on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC[77] + description: TCC_EA0_ATOMIC on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC[78] + description: TCC_EA0_ATOMIC on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC[79] + description: TCC_EA0_ATOMIC on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC[7] + description: TCC_EA0_ATOMIC on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC[80] + description: TCC_EA0_ATOMIC on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC[81] + description: TCC_EA0_ATOMIC on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC[82] + description: TCC_EA0_ATOMIC on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC[83] + description: TCC_EA0_ATOMIC on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC[84] + description: TCC_EA0_ATOMIC on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC[85] + description: TCC_EA0_ATOMIC on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC[86] + description: TCC_EA0_ATOMIC on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC[87] + description: TCC_EA0_ATOMIC on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC[88] + description: TCC_EA0_ATOMIC on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC[89] + description: TCC_EA0_ATOMIC on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC[8] + description: TCC_EA0_ATOMIC on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC[90] + description: TCC_EA0_ATOMIC on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC[91] + description: TCC_EA0_ATOMIC on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC[92] + description: TCC_EA0_ATOMIC on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC[93] + description: TCC_EA0_ATOMIC on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC[94] + description: TCC_EA0_ATOMIC on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC[95] + description: TCC_EA0_ATOMIC on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC[96] + description: TCC_EA0_ATOMIC on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC[97] + description: TCC_EA0_ATOMIC on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC[98] + description: TCC_EA0_ATOMIC on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC[99] + description: TCC_EA0_ATOMIC on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC[9] + description: TCC_EA0_ATOMIC on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC_LEVEL[0] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC_LEVEL[100] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC_LEVEL[101] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC_LEVEL[102] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC_LEVEL[103] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC_LEVEL[104] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC_LEVEL[105] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC_LEVEL[106] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC_LEVEL[107] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC_LEVEL[108] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC_LEVEL[109] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC_LEVEL[10] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC_LEVEL[110] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC_LEVEL[111] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC_LEVEL[112] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC_LEVEL[113] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC_LEVEL[114] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC_LEVEL[115] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC_LEVEL[116] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC_LEVEL[117] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC_LEVEL[118] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC_LEVEL[119] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC_LEVEL[11] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC_LEVEL[120] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC_LEVEL[121] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC_LEVEL[122] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC_LEVEL[123] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC_LEVEL[124] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC_LEVEL[125] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC_LEVEL[126] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC_LEVEL[127] + description: TCC_EA0_ATOMIC_LEVEL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC_LEVEL[12] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC_LEVEL[13] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC_LEVEL[14] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC_LEVEL[15] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC_LEVEL[16] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC_LEVEL[17] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC_LEVEL[18] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC_LEVEL[19] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC_LEVEL[1] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC_LEVEL[20] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC_LEVEL[21] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC_LEVEL[22] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC_LEVEL[23] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC_LEVEL[24] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC_LEVEL[25] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC_LEVEL[26] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC_LEVEL[27] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC_LEVEL[28] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC_LEVEL[29] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC_LEVEL[2] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC_LEVEL[30] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC_LEVEL[31] + description: TCC_EA0_ATOMIC_LEVEL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC_LEVEL[32] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC_LEVEL[33] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC_LEVEL[34] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC_LEVEL[35] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC_LEVEL[36] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC_LEVEL[37] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC_LEVEL[38] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC_LEVEL[39] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC_LEVEL[3] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC_LEVEL[40] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC_LEVEL[41] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC_LEVEL[42] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC_LEVEL[43] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC_LEVEL[44] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC_LEVEL[45] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC_LEVEL[46] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC_LEVEL[47] + description: TCC_EA0_ATOMIC_LEVEL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC_LEVEL[48] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC_LEVEL[49] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC_LEVEL[4] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC_LEVEL[50] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC_LEVEL[51] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC_LEVEL[52] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC_LEVEL[53] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC_LEVEL[54] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC_LEVEL[55] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC_LEVEL[56] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC_LEVEL[57] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC_LEVEL[58] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC_LEVEL[59] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC_LEVEL[5] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC_LEVEL[60] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC_LEVEL[61] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC_LEVEL[62] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC_LEVEL[63] + description: TCC_EA0_ATOMIC_LEVEL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC_LEVEL[64] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC_LEVEL[65] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC_LEVEL[66] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC_LEVEL[67] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC_LEVEL[68] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC_LEVEL[69] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC_LEVEL[6] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC_LEVEL[70] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC_LEVEL[71] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC_LEVEL[72] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC_LEVEL[73] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC_LEVEL[74] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC_LEVEL[75] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC_LEVEL[76] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC_LEVEL[77] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC_LEVEL[78] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC_LEVEL[79] + description: TCC_EA0_ATOMIC_LEVEL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC_LEVEL[7] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC_LEVEL[80] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC_LEVEL[81] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC_LEVEL[82] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC_LEVEL[83] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC_LEVEL[84] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_ATOMIC_LEVEL[85] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_ATOMIC_LEVEL[86] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_ATOMIC_LEVEL[87] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_ATOMIC_LEVEL[88] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC_LEVEL[89] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_ATOMIC_LEVEL[8] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_ATOMIC_LEVEL[90] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_ATOMIC_LEVEL[91] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_ATOMIC_LEVEL[92] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_ATOMIC_LEVEL[93] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_ATOMIC_LEVEL[94] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_ATOMIC_LEVEL[95] + description: TCC_EA0_ATOMIC_LEVEL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_ATOMIC_LEVEL[96] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_ATOMIC_LEVEL[97] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_ATOMIC_LEVEL[98] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_ATOMIC_LEVEL[99] + description: TCC_EA0_ATOMIC_LEVEL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_ATOMIC_LEVEL[9] + description: TCC_EA0_ATOMIC_LEVEL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_ATOMIC_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_LDS.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_LDS.txt new file mode 100644 index 0000000000..f1a9ab48aa --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_LDS.txt @@ -0,0 +1,5 @@ +pmc: SQ_INST_LEVEL_LDS SQ_INST_LEVEL_LDS_ACCUM SQC_TC_STALL SQ_ACTIVE_INST_ANY SQ_ACTIVE_INST_FLAT SQ_ACTIVE_INST_LDS SQ_ACTIVE_INST_MISC SQ_ACTIVE_INST_SCA TA_BUFFER_READ_LDS_WAVEFRONTS_sum TA_BUFFER_READ_WAVEFRONTS_sum TD_TD_BUSY_sum TD_WRITE_ACKT_WAVEFRONT_sum TCP_TA_TCP_STATE_READ_sum TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum TCP_TCC_ATOMIC_WITH_RET_REQ_sum TCP_TCC_CC_ATOMIC_REQ_sum TCC_EA0_ATOMIC_LEVEL_sum TCC_EA0_ATOMIC_sum TCC_EA0_RDREQ[0] TCC_EA0_RDREQ[100] TCC_EA0_RDREQ[101] TCC_EA0_RDREQ[102] TCC_EA0_RDREQ[103] TCC_EA0_RDREQ[104] TCC_EA0_RDREQ[105] TCC_EA0_RDREQ[106] TCC_EA0_RDREQ[107] TCC_EA0_RDREQ[108] TCC_EA0_RDREQ[109] TCC_EA0_RDREQ[10] TCC_EA0_RDREQ[110] TCC_EA0_RDREQ[111] TCC_EA0_RDREQ[112] TCC_EA0_RDREQ[113] TCC_EA0_RDREQ[114] TCC_EA0_RDREQ[115] TCC_EA0_RDREQ[116] TCC_EA0_RDREQ[117] TCC_EA0_RDREQ[118] TCC_EA0_RDREQ[119] TCC_EA0_RDREQ[11] TCC_EA0_RDREQ[120] TCC_EA0_RDREQ[121] TCC_EA0_RDREQ[122] TCC_EA0_RDREQ[123] TCC_EA0_RDREQ[124] TCC_EA0_RDREQ[125] TCC_EA0_RDREQ[126] TCC_EA0_RDREQ[127] TCC_EA0_RDREQ[12] TCC_EA0_RDREQ[13] TCC_EA0_RDREQ[14] TCC_EA0_RDREQ[15] TCC_EA0_RDREQ[16] TCC_EA0_RDREQ[17] TCC_EA0_RDREQ[18] TCC_EA0_RDREQ[19] TCC_EA0_RDREQ[1] TCC_EA0_RDREQ[20] TCC_EA0_RDREQ[21] TCC_EA0_RDREQ[22] TCC_EA0_RDREQ[23] TCC_EA0_RDREQ[24] TCC_EA0_RDREQ[25] TCC_EA0_RDREQ[26] TCC_EA0_RDREQ[27] TCC_EA0_RDREQ[28] TCC_EA0_RDREQ[29] TCC_EA0_RDREQ[2] TCC_EA0_RDREQ[30] TCC_EA0_RDREQ[31] TCC_EA0_RDREQ[32] TCC_EA0_RDREQ[33] TCC_EA0_RDREQ[34] TCC_EA0_RDREQ[35] TCC_EA0_RDREQ[36] TCC_EA0_RDREQ[37] TCC_EA0_RDREQ[38] TCC_EA0_RDREQ[39] TCC_EA0_RDREQ[3] TCC_EA0_RDREQ[40] TCC_EA0_RDREQ[41] TCC_EA0_RDREQ[42] TCC_EA0_RDREQ[43] TCC_EA0_RDREQ[44] TCC_EA0_RDREQ[45] TCC_EA0_RDREQ[46] TCC_EA0_RDREQ[47] TCC_EA0_RDREQ[48] TCC_EA0_RDREQ[49] TCC_EA0_RDREQ[4] TCC_EA0_RDREQ[50] TCC_EA0_RDREQ[51] TCC_EA0_RDREQ[52] TCC_EA0_RDREQ[53] TCC_EA0_RDREQ[54] TCC_EA0_RDREQ[55] TCC_EA0_RDREQ[56] TCC_EA0_RDREQ[57] TCC_EA0_RDREQ[58] TCC_EA0_RDREQ[59] TCC_EA0_RDREQ[5] TCC_EA0_RDREQ[60] TCC_EA0_RDREQ[61] TCC_EA0_RDREQ[62] TCC_EA0_RDREQ[63] TCC_EA0_RDREQ[64] TCC_EA0_RDREQ[65] TCC_EA0_RDREQ[66] TCC_EA0_RDREQ[67] TCC_EA0_RDREQ[68] TCC_EA0_RDREQ[69] TCC_EA0_RDREQ[6] TCC_EA0_RDREQ[70] TCC_EA0_RDREQ[71] TCC_EA0_RDREQ[72] TCC_EA0_RDREQ[73] TCC_EA0_RDREQ[74] TCC_EA0_RDREQ[75] TCC_EA0_RDREQ[76] TCC_EA0_RDREQ[77] TCC_EA0_RDREQ[78] TCC_EA0_RDREQ[79] TCC_EA0_RDREQ[7] TCC_EA0_RDREQ[80] TCC_EA0_RDREQ[81] TCC_EA0_RDREQ[82] TCC_EA0_RDREQ[83] TCC_EA0_RDREQ[84] TCC_EA0_RDREQ[85] TCC_EA0_RDREQ[86] TCC_EA0_RDREQ[87] TCC_EA0_RDREQ[88] TCC_EA0_RDREQ[89] TCC_EA0_RDREQ[8] TCC_EA0_RDREQ[90] TCC_EA0_RDREQ[91] TCC_EA0_RDREQ[92] TCC_EA0_RDREQ[93] TCC_EA0_RDREQ[94] TCC_EA0_RDREQ[95] TCC_EA0_RDREQ[96] TCC_EA0_RDREQ[97] TCC_EA0_RDREQ[98] TCC_EA0_RDREQ[99] TCC_EA0_RDREQ[9] TCC_EA0_RDREQ_128B_sum CPC_CPC_TCIU_IDLE CPC_CPC_UTCL2IU_BUSY CPF_CPF_TCIU_STALL SPI_CSQ_P1_OCCUPANCY SPI_CSQ_P2_OCCUPANCY SPI_CSQ_P3_OCCUPANCY SPI_RA_BAR_CU_FULL_CSN SPI_RA_LDS_CU_FULL_CSN SPI_RA_REQ_NO_ALLOC + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_LDS.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_LDS.yaml new file mode 100644 index 0000000000..f3492877b5 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_LDS.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_RDREQ[0] + description: TCC_EA0_RDREQ on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ[100] + description: TCC_EA0_RDREQ on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ[101] + description: TCC_EA0_RDREQ on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ[102] + description: TCC_EA0_RDREQ on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ[103] + description: TCC_EA0_RDREQ on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ[104] + description: TCC_EA0_RDREQ on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ[105] + description: TCC_EA0_RDREQ on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ[106] + description: TCC_EA0_RDREQ on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ[107] + description: TCC_EA0_RDREQ on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ[108] + description: TCC_EA0_RDREQ on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ[109] + description: TCC_EA0_RDREQ on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ[10] + description: TCC_EA0_RDREQ on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ[110] + description: TCC_EA0_RDREQ on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ[111] + description: TCC_EA0_RDREQ on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ[112] + description: TCC_EA0_RDREQ on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ[113] + description: TCC_EA0_RDREQ on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ[114] + description: TCC_EA0_RDREQ on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ[115] + description: TCC_EA0_RDREQ on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ[116] + description: TCC_EA0_RDREQ on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ[117] + description: TCC_EA0_RDREQ on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ[118] + description: TCC_EA0_RDREQ on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ[119] + description: TCC_EA0_RDREQ on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ[11] + description: TCC_EA0_RDREQ on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ[120] + description: TCC_EA0_RDREQ on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ[121] + description: TCC_EA0_RDREQ on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ[122] + description: TCC_EA0_RDREQ on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ[123] + description: TCC_EA0_RDREQ on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ[124] + description: TCC_EA0_RDREQ on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ[125] + description: TCC_EA0_RDREQ on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ[126] + description: TCC_EA0_RDREQ on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ[127] + description: TCC_EA0_RDREQ on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ[12] + description: TCC_EA0_RDREQ on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ[13] + description: TCC_EA0_RDREQ on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ[14] + description: TCC_EA0_RDREQ on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ[15] + description: TCC_EA0_RDREQ on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ[16] + description: TCC_EA0_RDREQ on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ[17] + description: TCC_EA0_RDREQ on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ[18] + description: TCC_EA0_RDREQ on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ[19] + description: TCC_EA0_RDREQ on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ[1] + description: TCC_EA0_RDREQ on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ[20] + description: TCC_EA0_RDREQ on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ[21] + description: TCC_EA0_RDREQ on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ[22] + description: TCC_EA0_RDREQ on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ[23] + description: TCC_EA0_RDREQ on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ[24] + description: TCC_EA0_RDREQ on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ[25] + description: TCC_EA0_RDREQ on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ[26] + description: TCC_EA0_RDREQ on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ[27] + description: TCC_EA0_RDREQ on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ[28] + description: TCC_EA0_RDREQ on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ[29] + description: TCC_EA0_RDREQ on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ[2] + description: TCC_EA0_RDREQ on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ[30] + description: TCC_EA0_RDREQ on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ[31] + description: TCC_EA0_RDREQ on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ[32] + description: TCC_EA0_RDREQ on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ[33] + description: TCC_EA0_RDREQ on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ[34] + description: TCC_EA0_RDREQ on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ[35] + description: TCC_EA0_RDREQ on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ[36] + description: TCC_EA0_RDREQ on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ[37] + description: TCC_EA0_RDREQ on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ[38] + description: TCC_EA0_RDREQ on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ[39] + description: TCC_EA0_RDREQ on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ[3] + description: TCC_EA0_RDREQ on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ[40] + description: TCC_EA0_RDREQ on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ[41] + description: TCC_EA0_RDREQ on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ[42] + description: TCC_EA0_RDREQ on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ[43] + description: TCC_EA0_RDREQ on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ[44] + description: TCC_EA0_RDREQ on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ[45] + description: TCC_EA0_RDREQ on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ[46] + description: TCC_EA0_RDREQ on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ[47] + description: TCC_EA0_RDREQ on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ[48] + description: TCC_EA0_RDREQ on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ[49] + description: TCC_EA0_RDREQ on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ[4] + description: TCC_EA0_RDREQ on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ[50] + description: TCC_EA0_RDREQ on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ[51] + description: TCC_EA0_RDREQ on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ[52] + description: TCC_EA0_RDREQ on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ[53] + description: TCC_EA0_RDREQ on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ[54] + description: TCC_EA0_RDREQ on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ[55] + description: TCC_EA0_RDREQ on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ[56] + description: TCC_EA0_RDREQ on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ[57] + description: TCC_EA0_RDREQ on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ[58] + description: TCC_EA0_RDREQ on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ[59] + description: TCC_EA0_RDREQ on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ[5] + description: TCC_EA0_RDREQ on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ[60] + description: TCC_EA0_RDREQ on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ[61] + description: TCC_EA0_RDREQ on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ[62] + description: TCC_EA0_RDREQ on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ[63] + description: TCC_EA0_RDREQ on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ[64] + description: TCC_EA0_RDREQ on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ[65] + description: TCC_EA0_RDREQ on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ[66] + description: TCC_EA0_RDREQ on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ[67] + description: TCC_EA0_RDREQ on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ[68] + description: TCC_EA0_RDREQ on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ[69] + description: TCC_EA0_RDREQ on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ[6] + description: TCC_EA0_RDREQ on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ[70] + description: TCC_EA0_RDREQ on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ[71] + description: TCC_EA0_RDREQ on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ[72] + description: TCC_EA0_RDREQ on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ[73] + description: TCC_EA0_RDREQ on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ[74] + description: TCC_EA0_RDREQ on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ[75] + description: TCC_EA0_RDREQ on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ[76] + description: TCC_EA0_RDREQ on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ[77] + description: TCC_EA0_RDREQ on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ[78] + description: TCC_EA0_RDREQ on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ[79] + description: TCC_EA0_RDREQ on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ[7] + description: TCC_EA0_RDREQ on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ[80] + description: TCC_EA0_RDREQ on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ[81] + description: TCC_EA0_RDREQ on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ[82] + description: TCC_EA0_RDREQ on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ[83] + description: TCC_EA0_RDREQ on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ[84] + description: TCC_EA0_RDREQ on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ[85] + description: TCC_EA0_RDREQ on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ[86] + description: TCC_EA0_RDREQ on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ[87] + description: TCC_EA0_RDREQ on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ[88] + description: TCC_EA0_RDREQ on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ[89] + description: TCC_EA0_RDREQ on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ[8] + description: TCC_EA0_RDREQ on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ[90] + description: TCC_EA0_RDREQ on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ[91] + description: TCC_EA0_RDREQ on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ[92] + description: TCC_EA0_RDREQ on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ[93] + description: TCC_EA0_RDREQ on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ[94] + description: TCC_EA0_RDREQ on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ[95] + description: TCC_EA0_RDREQ on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ[96] + description: TCC_EA0_RDREQ on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ[97] + description: TCC_EA0_RDREQ on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ[98] + description: TCC_EA0_RDREQ on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ[99] + description: TCC_EA0_RDREQ on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ[9] + description: TCC_EA0_RDREQ on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_SMEM.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_SMEM.txt new file mode 100644 index 0000000000..3e0d6e1461 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_SMEM.txt @@ -0,0 +1,5 @@ +pmc: SQ_INST_LEVEL_SMEM SQ_INST_LEVEL_SMEM_ACCUM SQ_ACTIVE_INST_VALU SQ_ACTIVE_INST_VALU2 SQ_ACTIVE_INST_VMEM SQ_BUSY_CU_CYCLES SQ_BUSY_CYCLES SQ_IFETCH TA_BUFFER_TOTAL_CYCLES_sum TA_BUFFER_WAVEFRONTS_sum TCP_TCC_CC_READ_REQ_sum TCP_TCC_CC_WRITE_REQ_sum TCP_TCC_NC_ATOMIC_REQ_sum TCP_TCC_NC_READ_REQ_sum TCC_EA0_RDREQ_32B_sum TCC_EA0_RDREQ_64B_sum TCC_EA0_RDREQ_DRAM_32B_sum TCC_EA0_RDREQ_DRAM_CREDIT_STALL[0] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[100] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[101] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[102] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[103] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[104] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[105] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[106] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[107] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[108] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[109] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[10] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[110] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[111] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[112] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[113] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[114] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[115] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[116] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[117] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[118] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[119] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[11] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[120] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[121] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[122] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[123] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[124] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[125] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[126] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[127] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[12] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[13] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[14] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[15] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[16] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[17] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[18] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[19] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[1] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[20] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[21] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[22] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[23] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[24] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[25] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[26] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[27] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[28] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[29] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[2] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[30] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[31] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[32] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[33] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[34] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[35] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[36] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[37] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[38] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[39] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[3] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[40] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[41] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[42] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[43] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[44] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[45] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[46] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[47] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[48] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[49] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[4] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[50] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[51] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[52] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[53] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[54] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[55] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[56] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[57] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[58] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[59] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[5] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[60] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[61] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[62] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[63] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[64] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[65] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[66] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[67] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[68] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[69] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[6] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[70] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[71] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[72] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[73] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[74] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[75] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[76] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[77] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[78] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[79] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[7] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[80] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[81] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[82] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[83] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[84] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[85] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[86] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[87] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[88] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[89] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[8] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[90] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[91] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[92] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[93] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[94] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[95] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[96] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[97] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[98] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[99] TCC_EA0_RDREQ_DRAM_CREDIT_STALL[9] CPC_CPC_UTCL2IU_IDLE CPC_GD_BUSY SPI_RA_REQ_NO_ALLOC_CSN SPI_RA_RES_STALL_CSN SPI_RA_SGPR_SIMD_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN SPI_RA_TMP_STALL_CSN SPI_RA_VGPR_SIMD_FULL_CSN + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_SMEM.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_SMEM.yaml new file mode 100644 index 0000000000..fd05b7f559 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_SMEM.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[0] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[100] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[101] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[102] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[103] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[104] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[105] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[106] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[107] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[108] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[109] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[10] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[110] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[111] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[112] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[113] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[114] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[115] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[116] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[117] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[118] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[119] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[11] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[120] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[121] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[122] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[123] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[124] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[125] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[126] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[127] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[12] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[13] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[14] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[15] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[16] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[17] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[18] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[19] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[1] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[20] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[21] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[22] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[23] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[24] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[25] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[26] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[27] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[28] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[29] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[2] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[30] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[31] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[32] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[33] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[34] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[35] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[36] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[37] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[38] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[39] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[3] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[40] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[41] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[42] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[43] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[44] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[45] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[46] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[47] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[48] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[49] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[4] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[50] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[51] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[52] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[53] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[54] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[55] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[56] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[57] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[58] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[59] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[5] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[60] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[61] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[62] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[63] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[64] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[65] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[66] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[67] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[68] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[69] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[6] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[70] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[71] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[72] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[73] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[74] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[75] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[76] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[77] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[78] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[79] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[7] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[80] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[81] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[82] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[83] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[84] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[85] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[86] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[87] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[88] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[89] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[8] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[90] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[91] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[92] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[93] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[94] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[95] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[96] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[97] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[98] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[99] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_DRAM_CREDIT_STALL[9] + description: TCC_EA0_RDREQ_DRAM_CREDIT_STALL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_VMEM.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_VMEM.txt new file mode 100644 index 0000000000..750a2e7701 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_VMEM.txt @@ -0,0 +1,5 @@ +pmc: SQ_INST_LEVEL_VMEM SQ_INST_LEVEL_VMEM_ACCUM SQ_INSTS SQ_INSTS_BRANCH SQ_INSTS_GDS SQ_INSTS_LDS SQ_INSTS_LDS_ATOMIC SQ_INSTS_LDS_ATOMIC_BANDWIDTH TA_BUFFER_WRITE_WAVEFRONTS_sum TA_DATA_STALLED_BY_TC_CYCLES_sum TCP_TCC_NC_WRITE_REQ_sum TCP_TCC_READ_REQ_LATENCY_sum TCP_TCC_READ_REQ_sum TCP_TCC_RW_ATOMIC_REQ_sum TCC_EA0_RDREQ_DRAM_CREDIT_STALL_sum TCC_EA0_RDREQ_DRAM_sum TCC_EA0_RDREQ_GMI_32B_sum TCC_EA0_RDREQ_GMI_CREDIT_STALL[0] TCC_EA0_RDREQ_GMI_CREDIT_STALL[100] TCC_EA0_RDREQ_GMI_CREDIT_STALL[101] TCC_EA0_RDREQ_GMI_CREDIT_STALL[102] TCC_EA0_RDREQ_GMI_CREDIT_STALL[103] TCC_EA0_RDREQ_GMI_CREDIT_STALL[104] TCC_EA0_RDREQ_GMI_CREDIT_STALL[105] TCC_EA0_RDREQ_GMI_CREDIT_STALL[106] TCC_EA0_RDREQ_GMI_CREDIT_STALL[107] TCC_EA0_RDREQ_GMI_CREDIT_STALL[108] TCC_EA0_RDREQ_GMI_CREDIT_STALL[109] TCC_EA0_RDREQ_GMI_CREDIT_STALL[10] TCC_EA0_RDREQ_GMI_CREDIT_STALL[110] TCC_EA0_RDREQ_GMI_CREDIT_STALL[111] TCC_EA0_RDREQ_GMI_CREDIT_STALL[112] TCC_EA0_RDREQ_GMI_CREDIT_STALL[113] TCC_EA0_RDREQ_GMI_CREDIT_STALL[114] TCC_EA0_RDREQ_GMI_CREDIT_STALL[115] TCC_EA0_RDREQ_GMI_CREDIT_STALL[116] TCC_EA0_RDREQ_GMI_CREDIT_STALL[117] TCC_EA0_RDREQ_GMI_CREDIT_STALL[118] TCC_EA0_RDREQ_GMI_CREDIT_STALL[119] TCC_EA0_RDREQ_GMI_CREDIT_STALL[11] TCC_EA0_RDREQ_GMI_CREDIT_STALL[120] TCC_EA0_RDREQ_GMI_CREDIT_STALL[121] TCC_EA0_RDREQ_GMI_CREDIT_STALL[122] TCC_EA0_RDREQ_GMI_CREDIT_STALL[123] TCC_EA0_RDREQ_GMI_CREDIT_STALL[124] TCC_EA0_RDREQ_GMI_CREDIT_STALL[125] TCC_EA0_RDREQ_GMI_CREDIT_STALL[126] TCC_EA0_RDREQ_GMI_CREDIT_STALL[127] TCC_EA0_RDREQ_GMI_CREDIT_STALL[12] TCC_EA0_RDREQ_GMI_CREDIT_STALL[13] TCC_EA0_RDREQ_GMI_CREDIT_STALL[14] TCC_EA0_RDREQ_GMI_CREDIT_STALL[15] TCC_EA0_RDREQ_GMI_CREDIT_STALL[16] TCC_EA0_RDREQ_GMI_CREDIT_STALL[17] TCC_EA0_RDREQ_GMI_CREDIT_STALL[18] TCC_EA0_RDREQ_GMI_CREDIT_STALL[19] TCC_EA0_RDREQ_GMI_CREDIT_STALL[1] TCC_EA0_RDREQ_GMI_CREDIT_STALL[20] TCC_EA0_RDREQ_GMI_CREDIT_STALL[21] TCC_EA0_RDREQ_GMI_CREDIT_STALL[22] TCC_EA0_RDREQ_GMI_CREDIT_STALL[23] TCC_EA0_RDREQ_GMI_CREDIT_STALL[24] TCC_EA0_RDREQ_GMI_CREDIT_STALL[25] TCC_EA0_RDREQ_GMI_CREDIT_STALL[26] TCC_EA0_RDREQ_GMI_CREDIT_STALL[27] TCC_EA0_RDREQ_GMI_CREDIT_STALL[28] TCC_EA0_RDREQ_GMI_CREDIT_STALL[29] TCC_EA0_RDREQ_GMI_CREDIT_STALL[2] TCC_EA0_RDREQ_GMI_CREDIT_STALL[30] TCC_EA0_RDREQ_GMI_CREDIT_STALL[31] TCC_EA0_RDREQ_GMI_CREDIT_STALL[32] TCC_EA0_RDREQ_GMI_CREDIT_STALL[33] TCC_EA0_RDREQ_GMI_CREDIT_STALL[34] TCC_EA0_RDREQ_GMI_CREDIT_STALL[35] TCC_EA0_RDREQ_GMI_CREDIT_STALL[36] TCC_EA0_RDREQ_GMI_CREDIT_STALL[37] TCC_EA0_RDREQ_GMI_CREDIT_STALL[38] TCC_EA0_RDREQ_GMI_CREDIT_STALL[39] TCC_EA0_RDREQ_GMI_CREDIT_STALL[3] TCC_EA0_RDREQ_GMI_CREDIT_STALL[40] TCC_EA0_RDREQ_GMI_CREDIT_STALL[41] TCC_EA0_RDREQ_GMI_CREDIT_STALL[42] TCC_EA0_RDREQ_GMI_CREDIT_STALL[43] TCC_EA0_RDREQ_GMI_CREDIT_STALL[44] TCC_EA0_RDREQ_GMI_CREDIT_STALL[45] TCC_EA0_RDREQ_GMI_CREDIT_STALL[46] TCC_EA0_RDREQ_GMI_CREDIT_STALL[47] TCC_EA0_RDREQ_GMI_CREDIT_STALL[48] TCC_EA0_RDREQ_GMI_CREDIT_STALL[49] TCC_EA0_RDREQ_GMI_CREDIT_STALL[4] TCC_EA0_RDREQ_GMI_CREDIT_STALL[50] TCC_EA0_RDREQ_GMI_CREDIT_STALL[51] TCC_EA0_RDREQ_GMI_CREDIT_STALL[52] TCC_EA0_RDREQ_GMI_CREDIT_STALL[53] TCC_EA0_RDREQ_GMI_CREDIT_STALL[54] TCC_EA0_RDREQ_GMI_CREDIT_STALL[55] TCC_EA0_RDREQ_GMI_CREDIT_STALL[56] TCC_EA0_RDREQ_GMI_CREDIT_STALL[57] TCC_EA0_RDREQ_GMI_CREDIT_STALL[58] TCC_EA0_RDREQ_GMI_CREDIT_STALL[59] TCC_EA0_RDREQ_GMI_CREDIT_STALL[5] TCC_EA0_RDREQ_GMI_CREDIT_STALL[60] TCC_EA0_RDREQ_GMI_CREDIT_STALL[61] TCC_EA0_RDREQ_GMI_CREDIT_STALL[62] TCC_EA0_RDREQ_GMI_CREDIT_STALL[63] TCC_EA0_RDREQ_GMI_CREDIT_STALL[64] TCC_EA0_RDREQ_GMI_CREDIT_STALL[65] TCC_EA0_RDREQ_GMI_CREDIT_STALL[66] TCC_EA0_RDREQ_GMI_CREDIT_STALL[67] TCC_EA0_RDREQ_GMI_CREDIT_STALL[68] TCC_EA0_RDREQ_GMI_CREDIT_STALL[69] TCC_EA0_RDREQ_GMI_CREDIT_STALL[6] TCC_EA0_RDREQ_GMI_CREDIT_STALL[70] TCC_EA0_RDREQ_GMI_CREDIT_STALL[71] TCC_EA0_RDREQ_GMI_CREDIT_STALL[72] TCC_EA0_RDREQ_GMI_CREDIT_STALL[73] TCC_EA0_RDREQ_GMI_CREDIT_STALL[74] TCC_EA0_RDREQ_GMI_CREDIT_STALL[75] TCC_EA0_RDREQ_GMI_CREDIT_STALL[76] TCC_EA0_RDREQ_GMI_CREDIT_STALL[77] TCC_EA0_RDREQ_GMI_CREDIT_STALL[78] TCC_EA0_RDREQ_GMI_CREDIT_STALL[79] TCC_EA0_RDREQ_GMI_CREDIT_STALL[7] TCC_EA0_RDREQ_GMI_CREDIT_STALL[80] TCC_EA0_RDREQ_GMI_CREDIT_STALL[81] TCC_EA0_RDREQ_GMI_CREDIT_STALL[82] TCC_EA0_RDREQ_GMI_CREDIT_STALL[83] TCC_EA0_RDREQ_GMI_CREDIT_STALL[84] TCC_EA0_RDREQ_GMI_CREDIT_STALL[85] TCC_EA0_RDREQ_GMI_CREDIT_STALL[86] TCC_EA0_RDREQ_GMI_CREDIT_STALL[87] TCC_EA0_RDREQ_GMI_CREDIT_STALL[88] TCC_EA0_RDREQ_GMI_CREDIT_STALL[89] TCC_EA0_RDREQ_GMI_CREDIT_STALL[8] TCC_EA0_RDREQ_GMI_CREDIT_STALL[90] TCC_EA0_RDREQ_GMI_CREDIT_STALL[91] TCC_EA0_RDREQ_GMI_CREDIT_STALL[92] TCC_EA0_RDREQ_GMI_CREDIT_STALL[93] TCC_EA0_RDREQ_GMI_CREDIT_STALL[94] TCC_EA0_RDREQ_GMI_CREDIT_STALL[95] TCC_EA0_RDREQ_GMI_CREDIT_STALL[96] TCC_EA0_RDREQ_GMI_CREDIT_STALL[97] TCC_EA0_RDREQ_GMI_CREDIT_STALL[98] TCC_EA0_RDREQ_GMI_CREDIT_STALL[99] TCC_EA0_RDREQ_GMI_CREDIT_STALL[9] CPC_ME1_BUSY_FOR_PACKET_DECODE CPC_ME1_DC0_SPI_BUSY SPI_RA_WAVE_SIMD_FULL_CSN SPI_RA_WVLIM_STALL_CSN SPI_SWC_CSC_WR SPI_VWC0_VDATA_VALID_WR SPI_VWC1_VDATA_VALID_WR + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_VMEM.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_VMEM.yaml new file mode 100644 index 0000000000..28b21a8ab6 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_INST_LEVEL_VMEM.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[0] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[100] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[101] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[102] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[103] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[104] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[105] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[106] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[107] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[108] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[109] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[10] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[110] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[111] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[112] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[113] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[114] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[115] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[116] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[117] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[118] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[119] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[11] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[120] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[121] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[122] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[123] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[124] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[125] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[126] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[127] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[12] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[13] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[14] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[15] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[16] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[17] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[18] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[19] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[1] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[20] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[21] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[22] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[23] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[24] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[25] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[26] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[27] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[28] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[29] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[2] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[30] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[31] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[32] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[33] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[34] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[35] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[36] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[37] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[38] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[39] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[3] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[40] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[41] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[42] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[43] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[44] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[45] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[46] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[47] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[48] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[49] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[4] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[50] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[51] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[52] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[53] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[54] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[55] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[56] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[57] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[58] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[59] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[5] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[60] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[61] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[62] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[63] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[64] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[65] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[66] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[67] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[68] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[69] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[6] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[70] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[71] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[72] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[73] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[74] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[75] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[76] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[77] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[78] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[79] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[7] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[80] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[81] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[82] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[83] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[84] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[85] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[86] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[87] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[88] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[89] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[8] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[90] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[91] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[92] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[93] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[94] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[95] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[96] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[97] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[98] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[99] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_GMI_CREDIT_STALL[9] + description: TCC_EA0_RDREQ_GMI_CREDIT_STALL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_LEVEL_WAVES.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_LEVEL_WAVES.txt new file mode 100644 index 0000000000..14d06aea5e --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_LEVEL_WAVES.txt @@ -0,0 +1,5 @@ +pmc: SQ_LEVEL_WAVES SQ_LEVEL_WAVES_ACCUM SQ_INSTS_LDS_LOAD SQ_INSTS_LDS_LOAD_BANDWIDTH SQ_INSTS_LDS_STORE SQ_INSTS_LDS_STORE_BANDWIDTH SQ_INSTS_MFMA SQ_INSTS_SALU TA_FLAT_ATOMIC_WAVEFRONTS_sum TA_FLAT_READ_LDS_WAVEFRONTS_sum TCP_TCC_RW_READ_REQ_sum TCP_TCC_RW_WRITE_REQ_sum TCP_TCC_UC_ATOMIC_REQ_sum TCP_TCC_UC_READ_REQ_sum TCC_EA0_RDREQ_GMI_CREDIT_STALL_sum TCC_EA0_RDREQ_IO_32B_sum TCC_EA0_RDREQ_IO_CREDIT_STALL[0] TCC_EA0_RDREQ_IO_CREDIT_STALL[100] TCC_EA0_RDREQ_IO_CREDIT_STALL[101] TCC_EA0_RDREQ_IO_CREDIT_STALL[102] TCC_EA0_RDREQ_IO_CREDIT_STALL[103] TCC_EA0_RDREQ_IO_CREDIT_STALL[104] TCC_EA0_RDREQ_IO_CREDIT_STALL[105] TCC_EA0_RDREQ_IO_CREDIT_STALL[106] TCC_EA0_RDREQ_IO_CREDIT_STALL[107] TCC_EA0_RDREQ_IO_CREDIT_STALL[108] TCC_EA0_RDREQ_IO_CREDIT_STALL[109] TCC_EA0_RDREQ_IO_CREDIT_STALL[10] TCC_EA0_RDREQ_IO_CREDIT_STALL[110] TCC_EA0_RDREQ_IO_CREDIT_STALL[111] TCC_EA0_RDREQ_IO_CREDIT_STALL[112] TCC_EA0_RDREQ_IO_CREDIT_STALL[113] TCC_EA0_RDREQ_IO_CREDIT_STALL[114] TCC_EA0_RDREQ_IO_CREDIT_STALL[115] TCC_EA0_RDREQ_IO_CREDIT_STALL[116] TCC_EA0_RDREQ_IO_CREDIT_STALL[117] TCC_EA0_RDREQ_IO_CREDIT_STALL[118] TCC_EA0_RDREQ_IO_CREDIT_STALL[119] TCC_EA0_RDREQ_IO_CREDIT_STALL[11] TCC_EA0_RDREQ_IO_CREDIT_STALL[120] TCC_EA0_RDREQ_IO_CREDIT_STALL[121] TCC_EA0_RDREQ_IO_CREDIT_STALL[122] TCC_EA0_RDREQ_IO_CREDIT_STALL[123] TCC_EA0_RDREQ_IO_CREDIT_STALL[124] TCC_EA0_RDREQ_IO_CREDIT_STALL[125] TCC_EA0_RDREQ_IO_CREDIT_STALL[126] TCC_EA0_RDREQ_IO_CREDIT_STALL[127] TCC_EA0_RDREQ_IO_CREDIT_STALL[12] TCC_EA0_RDREQ_IO_CREDIT_STALL[13] TCC_EA0_RDREQ_IO_CREDIT_STALL[14] TCC_EA0_RDREQ_IO_CREDIT_STALL[15] TCC_EA0_RDREQ_IO_CREDIT_STALL[16] TCC_EA0_RDREQ_IO_CREDIT_STALL[17] TCC_EA0_RDREQ_IO_CREDIT_STALL[18] TCC_EA0_RDREQ_IO_CREDIT_STALL[19] TCC_EA0_RDREQ_IO_CREDIT_STALL[1] TCC_EA0_RDREQ_IO_CREDIT_STALL[20] TCC_EA0_RDREQ_IO_CREDIT_STALL[21] TCC_EA0_RDREQ_IO_CREDIT_STALL[22] TCC_EA0_RDREQ_IO_CREDIT_STALL[23] TCC_EA0_RDREQ_IO_CREDIT_STALL[24] TCC_EA0_RDREQ_IO_CREDIT_STALL[25] TCC_EA0_RDREQ_IO_CREDIT_STALL[26] TCC_EA0_RDREQ_IO_CREDIT_STALL[27] TCC_EA0_RDREQ_IO_CREDIT_STALL[28] TCC_EA0_RDREQ_IO_CREDIT_STALL[29] TCC_EA0_RDREQ_IO_CREDIT_STALL[2] TCC_EA0_RDREQ_IO_CREDIT_STALL[30] TCC_EA0_RDREQ_IO_CREDIT_STALL[31] TCC_EA0_RDREQ_IO_CREDIT_STALL[32] TCC_EA0_RDREQ_IO_CREDIT_STALL[33] TCC_EA0_RDREQ_IO_CREDIT_STALL[34] TCC_EA0_RDREQ_IO_CREDIT_STALL[35] TCC_EA0_RDREQ_IO_CREDIT_STALL[36] TCC_EA0_RDREQ_IO_CREDIT_STALL[37] TCC_EA0_RDREQ_IO_CREDIT_STALL[38] TCC_EA0_RDREQ_IO_CREDIT_STALL[39] TCC_EA0_RDREQ_IO_CREDIT_STALL[3] TCC_EA0_RDREQ_IO_CREDIT_STALL[40] TCC_EA0_RDREQ_IO_CREDIT_STALL[41] TCC_EA0_RDREQ_IO_CREDIT_STALL[42] TCC_EA0_RDREQ_IO_CREDIT_STALL[43] TCC_EA0_RDREQ_IO_CREDIT_STALL[44] TCC_EA0_RDREQ_IO_CREDIT_STALL[45] TCC_EA0_RDREQ_IO_CREDIT_STALL[46] TCC_EA0_RDREQ_IO_CREDIT_STALL[47] TCC_EA0_RDREQ_IO_CREDIT_STALL[48] TCC_EA0_RDREQ_IO_CREDIT_STALL[49] TCC_EA0_RDREQ_IO_CREDIT_STALL[4] TCC_EA0_RDREQ_IO_CREDIT_STALL[50] TCC_EA0_RDREQ_IO_CREDIT_STALL[51] TCC_EA0_RDREQ_IO_CREDIT_STALL[52] TCC_EA0_RDREQ_IO_CREDIT_STALL[53] TCC_EA0_RDREQ_IO_CREDIT_STALL[54] TCC_EA0_RDREQ_IO_CREDIT_STALL[55] TCC_EA0_RDREQ_IO_CREDIT_STALL[56] TCC_EA0_RDREQ_IO_CREDIT_STALL[57] TCC_EA0_RDREQ_IO_CREDIT_STALL[58] TCC_EA0_RDREQ_IO_CREDIT_STALL[59] TCC_EA0_RDREQ_IO_CREDIT_STALL[5] TCC_EA0_RDREQ_IO_CREDIT_STALL[60] TCC_EA0_RDREQ_IO_CREDIT_STALL[61] TCC_EA0_RDREQ_IO_CREDIT_STALL[62] TCC_EA0_RDREQ_IO_CREDIT_STALL[63] TCC_EA0_RDREQ_IO_CREDIT_STALL[64] TCC_EA0_RDREQ_IO_CREDIT_STALL[65] TCC_EA0_RDREQ_IO_CREDIT_STALL[66] TCC_EA0_RDREQ_IO_CREDIT_STALL[67] TCC_EA0_RDREQ_IO_CREDIT_STALL[68] TCC_EA0_RDREQ_IO_CREDIT_STALL[69] TCC_EA0_RDREQ_IO_CREDIT_STALL[6] TCC_EA0_RDREQ_IO_CREDIT_STALL[70] TCC_EA0_RDREQ_IO_CREDIT_STALL[71] TCC_EA0_RDREQ_IO_CREDIT_STALL[72] TCC_EA0_RDREQ_IO_CREDIT_STALL[73] TCC_EA0_RDREQ_IO_CREDIT_STALL[74] TCC_EA0_RDREQ_IO_CREDIT_STALL[75] TCC_EA0_RDREQ_IO_CREDIT_STALL[76] TCC_EA0_RDREQ_IO_CREDIT_STALL[77] TCC_EA0_RDREQ_IO_CREDIT_STALL[78] TCC_EA0_RDREQ_IO_CREDIT_STALL[79] TCC_EA0_RDREQ_IO_CREDIT_STALL[7] TCC_EA0_RDREQ_IO_CREDIT_STALL[80] TCC_EA0_RDREQ_IO_CREDIT_STALL[81] TCC_EA0_RDREQ_IO_CREDIT_STALL[82] TCC_EA0_RDREQ_IO_CREDIT_STALL[83] TCC_EA0_RDREQ_IO_CREDIT_STALL[84] TCC_EA0_RDREQ_IO_CREDIT_STALL[85] TCC_EA0_RDREQ_IO_CREDIT_STALL[86] TCC_EA0_RDREQ_IO_CREDIT_STALL[87] TCC_EA0_RDREQ_IO_CREDIT_STALL[88] TCC_EA0_RDREQ_IO_CREDIT_STALL[89] TCC_EA0_RDREQ_IO_CREDIT_STALL[8] TCC_EA0_RDREQ_IO_CREDIT_STALL[90] TCC_EA0_RDREQ_IO_CREDIT_STALL[91] TCC_EA0_RDREQ_IO_CREDIT_STALL[92] TCC_EA0_RDREQ_IO_CREDIT_STALL[93] TCC_EA0_RDREQ_IO_CREDIT_STALL[94] TCC_EA0_RDREQ_IO_CREDIT_STALL[95] TCC_EA0_RDREQ_IO_CREDIT_STALL[96] TCC_EA0_RDREQ_IO_CREDIT_STALL[97] TCC_EA0_RDREQ_IO_CREDIT_STALL[98] TCC_EA0_RDREQ_IO_CREDIT_STALL[99] TCC_EA0_RDREQ_IO_CREDIT_STALL[9] TCC_EA0_RDREQ_IO_CREDIT_STALL_sum CPC_SYNC_FIFO_FULL CPC_SYNC_WRREQ_FIFO_BUSY + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_LEVEL_WAVES.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_LEVEL_WAVES.yaml new file mode 100644 index 0000000000..50e6a72e37 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/SQ_LEVEL_WAVES.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[0] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[100] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[101] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[102] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[103] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[104] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[105] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[106] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[107] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[108] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[109] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[10] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[110] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[111] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[112] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[113] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[114] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[115] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[116] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[117] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[118] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[119] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[11] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[120] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[121] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[122] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[123] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[124] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[125] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[126] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[127] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[12] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[13] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[14] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[15] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[16] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[17] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[18] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[19] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[1] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[20] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[21] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[22] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[23] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[24] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[25] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[26] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[27] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[28] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[29] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[2] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[30] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[31] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[32] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[33] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[34] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[35] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[36] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[37] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[38] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[39] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[3] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[40] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[41] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[42] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[43] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[44] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[45] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[46] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[47] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[48] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[49] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[4] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[50] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[51] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[52] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[53] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[54] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[55] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[56] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[57] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[58] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[59] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[5] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[60] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[61] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[62] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[63] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[64] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[65] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[66] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[67] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[68] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[69] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[6] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[70] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[71] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[72] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[73] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[74] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[75] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[76] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[77] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[78] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[79] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[7] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[80] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[81] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[82] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[83] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[84] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[85] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[86] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[87] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[88] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[89] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[8] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[90] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[91] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[92] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[93] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[94] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[95] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[96] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[97] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[98] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[99] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_IO_CREDIT_STALL[9] + description: TCC_EA0_RDREQ_IO_CREDIT_STALL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_0.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_0.txt new file mode 100644 index 0000000000..505d34d13d --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_0.txt @@ -0,0 +1,5 @@ +pmc: SQ_INSTS_SENDMSG SQ_INSTS_SMEM SQ_INSTS_VALU SQ_INSTS_VALU_ADD_F16 SQ_INSTS_VALU_ADD_F32 SQ_INSTS_VALU_ADD_F64 SQ_INSTS_VALU_CVT SQ_INSTS_VALU_FMA_F16 TA_FLAT_READ_WAVEFRONTS_sum TA_FLAT_WAVEFRONTS_sum TCP_TCC_UC_WRITE_REQ_sum TCP_TCC_WRITE_REQ_LATENCY_sum TCP_TCC_WRITE_REQ_sum TCP_TCP_LATENCY_sum TCC_EA0_RDREQ_LEVEL[0] TCC_EA0_RDREQ_LEVEL[100] TCC_EA0_RDREQ_LEVEL[101] TCC_EA0_RDREQ_LEVEL[102] TCC_EA0_RDREQ_LEVEL[103] TCC_EA0_RDREQ_LEVEL[104] TCC_EA0_RDREQ_LEVEL[105] TCC_EA0_RDREQ_LEVEL[106] TCC_EA0_RDREQ_LEVEL[107] TCC_EA0_RDREQ_LEVEL[108] TCC_EA0_RDREQ_LEVEL[109] TCC_EA0_RDREQ_LEVEL[10] TCC_EA0_RDREQ_LEVEL[110] TCC_EA0_RDREQ_LEVEL[111] TCC_EA0_RDREQ_LEVEL[112] TCC_EA0_RDREQ_LEVEL[113] TCC_EA0_RDREQ_LEVEL[114] TCC_EA0_RDREQ_LEVEL[115] TCC_EA0_RDREQ_LEVEL[116] TCC_EA0_RDREQ_LEVEL[117] TCC_EA0_RDREQ_LEVEL[118] TCC_EA0_RDREQ_LEVEL[119] TCC_EA0_RDREQ_LEVEL[11] TCC_EA0_RDREQ_LEVEL[120] TCC_EA0_RDREQ_LEVEL[121] TCC_EA0_RDREQ_LEVEL[122] TCC_EA0_RDREQ_LEVEL[123] TCC_EA0_RDREQ_LEVEL[124] TCC_EA0_RDREQ_LEVEL[125] TCC_EA0_RDREQ_LEVEL[126] TCC_EA0_RDREQ_LEVEL[127] TCC_EA0_RDREQ_LEVEL[12] TCC_EA0_RDREQ_LEVEL[13] TCC_EA0_RDREQ_LEVEL[14] TCC_EA0_RDREQ_LEVEL[15] TCC_EA0_RDREQ_LEVEL[16] TCC_EA0_RDREQ_LEVEL[17] TCC_EA0_RDREQ_LEVEL[18] TCC_EA0_RDREQ_LEVEL[19] TCC_EA0_RDREQ_LEVEL[1] TCC_EA0_RDREQ_LEVEL[20] TCC_EA0_RDREQ_LEVEL[21] TCC_EA0_RDREQ_LEVEL[22] TCC_EA0_RDREQ_LEVEL[23] TCC_EA0_RDREQ_LEVEL[24] TCC_EA0_RDREQ_LEVEL[25] TCC_EA0_RDREQ_LEVEL[26] TCC_EA0_RDREQ_LEVEL[27] TCC_EA0_RDREQ_LEVEL[28] TCC_EA0_RDREQ_LEVEL[29] TCC_EA0_RDREQ_LEVEL[2] TCC_EA0_RDREQ_LEVEL[30] TCC_EA0_RDREQ_LEVEL[31] TCC_EA0_RDREQ_LEVEL[32] TCC_EA0_RDREQ_LEVEL[33] TCC_EA0_RDREQ_LEVEL[34] TCC_EA0_RDREQ_LEVEL[35] TCC_EA0_RDREQ_LEVEL[36] TCC_EA0_RDREQ_LEVEL[37] TCC_EA0_RDREQ_LEVEL[38] TCC_EA0_RDREQ_LEVEL[39] TCC_EA0_RDREQ_LEVEL[3] TCC_EA0_RDREQ_LEVEL[40] TCC_EA0_RDREQ_LEVEL[41] TCC_EA0_RDREQ_LEVEL[42] TCC_EA0_RDREQ_LEVEL[43] TCC_EA0_RDREQ_LEVEL[44] TCC_EA0_RDREQ_LEVEL[45] TCC_EA0_RDREQ_LEVEL[46] TCC_EA0_RDREQ_LEVEL[47] TCC_EA0_RDREQ_LEVEL[48] TCC_EA0_RDREQ_LEVEL[49] TCC_EA0_RDREQ_LEVEL[4] TCC_EA0_RDREQ_LEVEL[50] TCC_EA0_RDREQ_LEVEL[51] TCC_EA0_RDREQ_LEVEL[52] TCC_EA0_RDREQ_LEVEL[53] TCC_EA0_RDREQ_LEVEL[54] TCC_EA0_RDREQ_LEVEL[55] TCC_EA0_RDREQ_LEVEL[56] TCC_EA0_RDREQ_LEVEL[57] TCC_EA0_RDREQ_LEVEL[58] TCC_EA0_RDREQ_LEVEL[59] TCC_EA0_RDREQ_LEVEL[5] TCC_EA0_RDREQ_LEVEL[60] TCC_EA0_RDREQ_LEVEL[61] TCC_EA0_RDREQ_LEVEL[62] TCC_EA0_RDREQ_LEVEL[63] TCC_EA0_RDREQ_LEVEL[64] TCC_EA0_RDREQ_LEVEL[65] TCC_EA0_RDREQ_LEVEL[66] TCC_EA0_RDREQ_LEVEL[67] TCC_EA0_RDREQ_LEVEL[68] TCC_EA0_RDREQ_LEVEL[69] TCC_EA0_RDREQ_LEVEL[6] TCC_EA0_RDREQ_LEVEL[70] TCC_EA0_RDREQ_LEVEL[71] TCC_EA0_RDREQ_LEVEL[72] TCC_EA0_RDREQ_LEVEL[73] TCC_EA0_RDREQ_LEVEL[74] TCC_EA0_RDREQ_LEVEL[75] TCC_EA0_RDREQ_LEVEL[76] TCC_EA0_RDREQ_LEVEL[77] TCC_EA0_RDREQ_LEVEL[78] TCC_EA0_RDREQ_LEVEL[79] TCC_EA0_RDREQ_LEVEL[7] TCC_EA0_RDREQ_LEVEL[80] TCC_EA0_RDREQ_LEVEL[81] TCC_EA0_RDREQ_LEVEL[82] TCC_EA0_RDREQ_LEVEL[83] TCC_EA0_RDREQ_LEVEL[84] TCC_EA0_RDREQ_LEVEL[85] TCC_EA0_RDREQ_LEVEL[86] TCC_EA0_RDREQ_LEVEL[87] TCC_EA0_RDREQ_LEVEL[88] TCC_EA0_RDREQ_LEVEL[89] TCC_EA0_RDREQ_LEVEL[8] TCC_EA0_RDREQ_LEVEL[90] TCC_EA0_RDREQ_LEVEL[91] TCC_EA0_RDREQ_LEVEL[92] TCC_EA0_RDREQ_LEVEL[93] TCC_EA0_RDREQ_LEVEL[94] TCC_EA0_RDREQ_LEVEL[95] TCC_EA0_RDREQ_LEVEL[96] TCC_EA0_RDREQ_LEVEL[97] TCC_EA0_RDREQ_LEVEL[98] TCC_EA0_RDREQ_LEVEL[99] TCC_EA0_RDREQ_LEVEL[9] TCC_EA0_RDREQ_LEVEL_sum TCC_EA0_RDREQ_sum TCC_EA0_RD_UNCACHED_32B_sum CPC_TG_SEND CPC_UTCL1_STALL_ON_TRANSLATION + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_0.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_0.yaml new file mode 100644 index 0000000000..8286b6e61a --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_0.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_RDREQ_LEVEL[0] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_LEVEL[100] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_LEVEL[101] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_LEVEL[102] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_LEVEL[103] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_LEVEL[104] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_LEVEL[105] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_LEVEL[106] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_LEVEL[107] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_LEVEL[108] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_LEVEL[109] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_LEVEL[10] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_LEVEL[110] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_LEVEL[111] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_LEVEL[112] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_LEVEL[113] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_LEVEL[114] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_LEVEL[115] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_LEVEL[116] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_LEVEL[117] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_LEVEL[118] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_LEVEL[119] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_LEVEL[11] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_LEVEL[120] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_LEVEL[121] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_LEVEL[122] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_LEVEL[123] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_LEVEL[124] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_LEVEL[125] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_LEVEL[126] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_LEVEL[127] + description: TCC_EA0_RDREQ_LEVEL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_LEVEL[12] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_LEVEL[13] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_LEVEL[14] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_LEVEL[15] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_LEVEL[16] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_LEVEL[17] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_LEVEL[18] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_LEVEL[19] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_LEVEL[1] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_LEVEL[20] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_LEVEL[21] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_LEVEL[22] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_LEVEL[23] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_LEVEL[24] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_LEVEL[25] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_LEVEL[26] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_LEVEL[27] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_LEVEL[28] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_LEVEL[29] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_LEVEL[2] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_LEVEL[30] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_LEVEL[31] + description: TCC_EA0_RDREQ_LEVEL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_LEVEL[32] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_LEVEL[33] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_LEVEL[34] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_LEVEL[35] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_LEVEL[36] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_LEVEL[37] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_LEVEL[38] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_LEVEL[39] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_LEVEL[3] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_LEVEL[40] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_LEVEL[41] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_LEVEL[42] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_LEVEL[43] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_LEVEL[44] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_LEVEL[45] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_LEVEL[46] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_LEVEL[47] + description: TCC_EA0_RDREQ_LEVEL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_LEVEL[48] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_LEVEL[49] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_LEVEL[4] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_LEVEL[50] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_LEVEL[51] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_LEVEL[52] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_LEVEL[53] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_LEVEL[54] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_LEVEL[55] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_LEVEL[56] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_LEVEL[57] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_LEVEL[58] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_LEVEL[59] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_LEVEL[5] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_LEVEL[60] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_LEVEL[61] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_LEVEL[62] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_LEVEL[63] + description: TCC_EA0_RDREQ_LEVEL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_LEVEL[64] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_LEVEL[65] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_LEVEL[66] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_LEVEL[67] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_LEVEL[68] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_LEVEL[69] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_LEVEL[6] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_LEVEL[70] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_LEVEL[71] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_LEVEL[72] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_LEVEL[73] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_LEVEL[74] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_LEVEL[75] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_LEVEL[76] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_LEVEL[77] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_LEVEL[78] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_LEVEL[79] + description: TCC_EA0_RDREQ_LEVEL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_LEVEL[7] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_LEVEL[80] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_LEVEL[81] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_LEVEL[82] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_LEVEL[83] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_LEVEL[84] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_RDREQ_LEVEL[85] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_RDREQ_LEVEL[86] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_RDREQ_LEVEL[87] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_RDREQ_LEVEL[88] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_LEVEL[89] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_RDREQ_LEVEL[8] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_RDREQ_LEVEL[90] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_RDREQ_LEVEL[91] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_RDREQ_LEVEL[92] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_RDREQ_LEVEL[93] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_RDREQ_LEVEL[94] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_RDREQ_LEVEL[95] + description: TCC_EA0_RDREQ_LEVEL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_RDREQ_LEVEL[96] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_RDREQ_LEVEL[97] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_RDREQ_LEVEL[98] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_RDREQ_LEVEL[99] + description: TCC_EA0_RDREQ_LEVEL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_RDREQ_LEVEL[9] + description: TCC_EA0_RDREQ_LEVEL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_RDREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_1.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_1.txt new file mode 100644 index 0000000000..99921c43ad --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_1.txt @@ -0,0 +1,5 @@ +pmc: SQ_INSTS_VALU_FMA_F32 SQ_INSTS_VALU_FMA_F64 SQ_INSTS_VALU_INT32 SQ_INSTS_VALU_INT64 SQ_INSTS_VALU_MFMA_BF16 SQ_INSTS_VALU_MFMA_F16 SQ_INSTS_VALU_MFMA_F32 SQ_INSTS_VALU_MFMA_F64 TA_FLAT_WRITE_WAVEFRONTS_sum TA_TA_BUSY_sum TCP_TCP_TA_ADDR_STALL_CYCLES_sum TCP_TCP_TA_DATA_STALL_CYCLES_sum TCP_TCR_RDRET_STALL_sum TCP_TCR_TCP_STALL_CYCLES_sum TCC_EA0_WRREQ[0] TCC_EA0_WRREQ[100] TCC_EA0_WRREQ[101] TCC_EA0_WRREQ[102] TCC_EA0_WRREQ[103] TCC_EA0_WRREQ[104] TCC_EA0_WRREQ[105] TCC_EA0_WRREQ[106] TCC_EA0_WRREQ[107] TCC_EA0_WRREQ[108] TCC_EA0_WRREQ[109] TCC_EA0_WRREQ[10] TCC_EA0_WRREQ[110] TCC_EA0_WRREQ[111] TCC_EA0_WRREQ[112] TCC_EA0_WRREQ[113] TCC_EA0_WRREQ[114] TCC_EA0_WRREQ[115] TCC_EA0_WRREQ[116] TCC_EA0_WRREQ[117] TCC_EA0_WRREQ[118] TCC_EA0_WRREQ[119] TCC_EA0_WRREQ[11] TCC_EA0_WRREQ[120] TCC_EA0_WRREQ[121] TCC_EA0_WRREQ[122] TCC_EA0_WRREQ[123] TCC_EA0_WRREQ[124] TCC_EA0_WRREQ[125] TCC_EA0_WRREQ[126] TCC_EA0_WRREQ[127] TCC_EA0_WRREQ[12] TCC_EA0_WRREQ[13] TCC_EA0_WRREQ[14] TCC_EA0_WRREQ[15] TCC_EA0_WRREQ[16] TCC_EA0_WRREQ[17] TCC_EA0_WRREQ[18] TCC_EA0_WRREQ[19] TCC_EA0_WRREQ[1] TCC_EA0_WRREQ[20] TCC_EA0_WRREQ[21] TCC_EA0_WRREQ[22] TCC_EA0_WRREQ[23] TCC_EA0_WRREQ[24] TCC_EA0_WRREQ[25] TCC_EA0_WRREQ[26] TCC_EA0_WRREQ[27] TCC_EA0_WRREQ[28] TCC_EA0_WRREQ[29] TCC_EA0_WRREQ[2] TCC_EA0_WRREQ[30] TCC_EA0_WRREQ[31] TCC_EA0_WRREQ[32] TCC_EA0_WRREQ[33] TCC_EA0_WRREQ[34] TCC_EA0_WRREQ[35] TCC_EA0_WRREQ[36] TCC_EA0_WRREQ[37] TCC_EA0_WRREQ[38] TCC_EA0_WRREQ[39] TCC_EA0_WRREQ[3] TCC_EA0_WRREQ[40] TCC_EA0_WRREQ[41] TCC_EA0_WRREQ[42] TCC_EA0_WRREQ[43] TCC_EA0_WRREQ[44] TCC_EA0_WRREQ[45] TCC_EA0_WRREQ[46] TCC_EA0_WRREQ[47] TCC_EA0_WRREQ[48] TCC_EA0_WRREQ[49] TCC_EA0_WRREQ[4] TCC_EA0_WRREQ[50] TCC_EA0_WRREQ[51] TCC_EA0_WRREQ[52] TCC_EA0_WRREQ[53] TCC_EA0_WRREQ[54] TCC_EA0_WRREQ[55] TCC_EA0_WRREQ[56] TCC_EA0_WRREQ[57] TCC_EA0_WRREQ[58] TCC_EA0_WRREQ[59] TCC_EA0_WRREQ[5] TCC_EA0_WRREQ[60] TCC_EA0_WRREQ[61] TCC_EA0_WRREQ[62] TCC_EA0_WRREQ[63] TCC_EA0_WRREQ[64] TCC_EA0_WRREQ[65] TCC_EA0_WRREQ[66] TCC_EA0_WRREQ[67] TCC_EA0_WRREQ[68] TCC_EA0_WRREQ[69] TCC_EA0_WRREQ[6] TCC_EA0_WRREQ[70] TCC_EA0_WRREQ[71] TCC_EA0_WRREQ[72] TCC_EA0_WRREQ[73] TCC_EA0_WRREQ[74] TCC_EA0_WRREQ[75] TCC_EA0_WRREQ[76] TCC_EA0_WRREQ[77] TCC_EA0_WRREQ[78] TCC_EA0_WRREQ[79] TCC_EA0_WRREQ[7] TCC_EA0_WRREQ[80] TCC_EA0_WRREQ[81] TCC_EA0_WRREQ[82] TCC_EA0_WRREQ[83] TCC_EA0_WRREQ[84] TCC_EA0_WRREQ[85] TCC_EA0_WRREQ[86] TCC_EA0_WRREQ[87] TCC_EA0_WRREQ[88] TCC_EA0_WRREQ[89] TCC_EA0_WRREQ[8] TCC_EA0_WRREQ[90] TCC_EA0_WRREQ[91] TCC_EA0_WRREQ[92] TCC_EA0_WRREQ[93] TCC_EA0_WRREQ[94] TCC_EA0_WRREQ[95] TCC_EA0_WRREQ[96] TCC_EA0_WRREQ[97] TCC_EA0_WRREQ[98] TCC_EA0_WRREQ[99] TCC_EA0_WRREQ[9] TCC_EA0_WRREQ_64B_sum TCC_EA0_WRREQ_ATOMIC_DRAM_32B_sum TCC_EA0_WRREQ_ATOMIC_DRAM_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_1.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_1.yaml new file mode 100644 index 0000000000..8dd5fe0116 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_1.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_WRREQ[0] + description: TCC_EA0_WRREQ on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ[100] + description: TCC_EA0_WRREQ on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ[101] + description: TCC_EA0_WRREQ on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ[102] + description: TCC_EA0_WRREQ on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ[103] + description: TCC_EA0_WRREQ on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ[104] + description: TCC_EA0_WRREQ on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ[105] + description: TCC_EA0_WRREQ on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ[106] + description: TCC_EA0_WRREQ on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ[107] + description: TCC_EA0_WRREQ on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ[108] + description: TCC_EA0_WRREQ on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ[109] + description: TCC_EA0_WRREQ on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ[10] + description: TCC_EA0_WRREQ on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ[110] + description: TCC_EA0_WRREQ on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ[111] + description: TCC_EA0_WRREQ on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ[112] + description: TCC_EA0_WRREQ on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ[113] + description: TCC_EA0_WRREQ on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ[114] + description: TCC_EA0_WRREQ on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ[115] + description: TCC_EA0_WRREQ on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ[116] + description: TCC_EA0_WRREQ on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ[117] + description: TCC_EA0_WRREQ on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ[118] + description: TCC_EA0_WRREQ on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ[119] + description: TCC_EA0_WRREQ on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ[11] + description: TCC_EA0_WRREQ on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ[120] + description: TCC_EA0_WRREQ on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ[121] + description: TCC_EA0_WRREQ on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ[122] + description: TCC_EA0_WRREQ on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ[123] + description: TCC_EA0_WRREQ on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ[124] + description: TCC_EA0_WRREQ on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ[125] + description: TCC_EA0_WRREQ on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ[126] + description: TCC_EA0_WRREQ on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ[127] + description: TCC_EA0_WRREQ on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ[12] + description: TCC_EA0_WRREQ on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ[13] + description: TCC_EA0_WRREQ on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ[14] + description: TCC_EA0_WRREQ on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ[15] + description: TCC_EA0_WRREQ on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ[16] + description: TCC_EA0_WRREQ on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ[17] + description: TCC_EA0_WRREQ on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ[18] + description: TCC_EA0_WRREQ on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ[19] + description: TCC_EA0_WRREQ on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ[1] + description: TCC_EA0_WRREQ on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ[20] + description: TCC_EA0_WRREQ on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ[21] + description: TCC_EA0_WRREQ on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ[22] + description: TCC_EA0_WRREQ on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ[23] + description: TCC_EA0_WRREQ on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ[24] + description: TCC_EA0_WRREQ on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ[25] + description: TCC_EA0_WRREQ on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ[26] + description: TCC_EA0_WRREQ on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ[27] + description: TCC_EA0_WRREQ on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ[28] + description: TCC_EA0_WRREQ on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ[29] + description: TCC_EA0_WRREQ on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ[2] + description: TCC_EA0_WRREQ on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ[30] + description: TCC_EA0_WRREQ on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ[31] + description: TCC_EA0_WRREQ on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ[32] + description: TCC_EA0_WRREQ on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ[33] + description: TCC_EA0_WRREQ on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ[34] + description: TCC_EA0_WRREQ on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ[35] + description: TCC_EA0_WRREQ on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ[36] + description: TCC_EA0_WRREQ on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ[37] + description: TCC_EA0_WRREQ on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ[38] + description: TCC_EA0_WRREQ on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ[39] + description: TCC_EA0_WRREQ on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ[3] + description: TCC_EA0_WRREQ on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ[40] + description: TCC_EA0_WRREQ on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ[41] + description: TCC_EA0_WRREQ on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ[42] + description: TCC_EA0_WRREQ on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ[43] + description: TCC_EA0_WRREQ on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ[44] + description: TCC_EA0_WRREQ on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ[45] + description: TCC_EA0_WRREQ on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ[46] + description: TCC_EA0_WRREQ on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ[47] + description: TCC_EA0_WRREQ on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ[48] + description: TCC_EA0_WRREQ on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ[49] + description: TCC_EA0_WRREQ on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ[4] + description: TCC_EA0_WRREQ on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ[50] + description: TCC_EA0_WRREQ on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ[51] + description: TCC_EA0_WRREQ on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ[52] + description: TCC_EA0_WRREQ on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ[53] + description: TCC_EA0_WRREQ on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ[54] + description: TCC_EA0_WRREQ on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ[55] + description: TCC_EA0_WRREQ on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ[56] + description: TCC_EA0_WRREQ on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ[57] + description: TCC_EA0_WRREQ on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ[58] + description: TCC_EA0_WRREQ on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ[59] + description: TCC_EA0_WRREQ on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ[5] + description: TCC_EA0_WRREQ on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ[60] + description: TCC_EA0_WRREQ on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ[61] + description: TCC_EA0_WRREQ on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ[62] + description: TCC_EA0_WRREQ on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ[63] + description: TCC_EA0_WRREQ on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ[64] + description: TCC_EA0_WRREQ on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ[65] + description: TCC_EA0_WRREQ on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ[66] + description: TCC_EA0_WRREQ on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ[67] + description: TCC_EA0_WRREQ on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ[68] + description: TCC_EA0_WRREQ on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ[69] + description: TCC_EA0_WRREQ on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ[6] + description: TCC_EA0_WRREQ on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ[70] + description: TCC_EA0_WRREQ on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ[71] + description: TCC_EA0_WRREQ on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ[72] + description: TCC_EA0_WRREQ on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ[73] + description: TCC_EA0_WRREQ on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ[74] + description: TCC_EA0_WRREQ on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ[75] + description: TCC_EA0_WRREQ on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ[76] + description: TCC_EA0_WRREQ on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ[77] + description: TCC_EA0_WRREQ on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ[78] + description: TCC_EA0_WRREQ on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ[79] + description: TCC_EA0_WRREQ on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ[7] + description: TCC_EA0_WRREQ on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ[80] + description: TCC_EA0_WRREQ on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ[81] + description: TCC_EA0_WRREQ on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ[82] + description: TCC_EA0_WRREQ on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ[83] + description: TCC_EA0_WRREQ on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ[84] + description: TCC_EA0_WRREQ on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ[85] + description: TCC_EA0_WRREQ on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ[86] + description: TCC_EA0_WRREQ on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ[87] + description: TCC_EA0_WRREQ on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ[88] + description: TCC_EA0_WRREQ on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ[89] + description: TCC_EA0_WRREQ on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ[8] + description: TCC_EA0_WRREQ on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ[90] + description: TCC_EA0_WRREQ on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ[91] + description: TCC_EA0_WRREQ on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ[92] + description: TCC_EA0_WRREQ on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ[93] + description: TCC_EA0_WRREQ on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ[94] + description: TCC_EA0_WRREQ on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ[95] + description: TCC_EA0_WRREQ on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ[96] + description: TCC_EA0_WRREQ on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ[97] + description: TCC_EA0_WRREQ on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ[98] + description: TCC_EA0_WRREQ on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ[99] + description: TCC_EA0_WRREQ on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ[9] + description: TCC_EA0_WRREQ on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_10.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_10.txt new file mode 100644 index 0000000000..969d6553b7 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_10.txt @@ -0,0 +1,5 @@ +pmc: TCC_REQ[0] TCC_REQ[100] TCC_REQ[101] TCC_REQ[102] TCC_REQ[103] TCC_REQ[104] TCC_REQ[105] TCC_REQ[106] TCC_REQ[107] TCC_REQ[108] TCC_REQ[109] TCC_REQ[10] TCC_REQ[110] TCC_REQ[111] TCC_REQ[112] TCC_REQ[113] TCC_REQ[114] TCC_REQ[115] TCC_REQ[116] TCC_REQ[117] TCC_REQ[118] TCC_REQ[119] TCC_REQ[11] TCC_REQ[120] TCC_REQ[121] TCC_REQ[122] TCC_REQ[123] TCC_REQ[124] TCC_REQ[125] TCC_REQ[126] TCC_REQ[127] TCC_REQ[12] TCC_REQ[13] TCC_REQ[14] TCC_REQ[15] TCC_REQ[16] TCC_REQ[17] TCC_REQ[18] TCC_REQ[19] TCC_REQ[1] TCC_REQ[20] TCC_REQ[21] TCC_REQ[22] TCC_REQ[23] TCC_REQ[24] TCC_REQ[25] TCC_REQ[26] TCC_REQ[27] TCC_REQ[28] TCC_REQ[29] TCC_REQ[2] TCC_REQ[30] TCC_REQ[31] TCC_REQ[32] TCC_REQ[33] TCC_REQ[34] TCC_REQ[35] TCC_REQ[36] TCC_REQ[37] TCC_REQ[38] TCC_REQ[39] TCC_REQ[3] TCC_REQ[40] TCC_REQ[41] TCC_REQ[42] TCC_REQ[43] TCC_REQ[44] TCC_REQ[45] TCC_REQ[46] TCC_REQ[47] TCC_REQ[48] TCC_REQ[49] TCC_REQ[4] TCC_REQ[50] TCC_REQ[51] TCC_REQ[52] TCC_REQ[53] TCC_REQ[54] TCC_REQ[55] TCC_REQ[56] TCC_REQ[57] TCC_REQ[58] TCC_REQ[59] TCC_REQ[5] TCC_REQ[60] TCC_REQ[61] TCC_REQ[62] TCC_REQ[63] TCC_REQ[64] TCC_REQ[65] TCC_REQ[66] TCC_REQ[67] TCC_REQ[68] TCC_REQ[69] TCC_REQ[6] TCC_REQ[70] TCC_REQ[71] TCC_REQ[72] TCC_REQ[73] TCC_REQ[74] TCC_REQ[75] TCC_REQ[76] TCC_REQ[77] TCC_REQ[78] TCC_REQ[79] TCC_REQ[7] TCC_REQ[80] TCC_REQ[81] TCC_REQ[82] TCC_REQ[83] TCC_REQ[84] TCC_REQ[85] TCC_REQ[86] TCC_REQ[87] TCC_REQ[88] TCC_REQ[89] TCC_REQ[8] TCC_REQ[90] TCC_REQ[91] TCC_REQ[92] TCC_REQ[93] TCC_REQ[94] TCC_REQ[95] TCC_REQ[96] TCC_REQ[97] TCC_REQ[98] TCC_REQ[99] TCC_REQ[9] TCC_REQ_sum TCC_RW_REQ_sum TCC_SRC_FIFO_FULL_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_10.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_10.yaml new file mode 100644 index 0000000000..a2d6b2698d --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_10.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_REQ[0] + description: TCC_REQ on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_REQ[100] + description: TCC_REQ on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_REQ[101] + description: TCC_REQ on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_REQ[102] + description: TCC_REQ on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_REQ[103] + description: TCC_REQ on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_REQ[104] + description: TCC_REQ on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_REQ[105] + description: TCC_REQ on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_REQ[106] + description: TCC_REQ on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_REQ[107] + description: TCC_REQ on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_REQ[108] + description: TCC_REQ on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_REQ[109] + description: TCC_REQ on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_REQ[10] + description: TCC_REQ on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_REQ[110] + description: TCC_REQ on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_REQ[111] + description: TCC_REQ on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_REQ[112] + description: TCC_REQ on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_REQ[113] + description: TCC_REQ on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_REQ[114] + description: TCC_REQ on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_REQ[115] + description: TCC_REQ on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_REQ[116] + description: TCC_REQ on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_REQ[117] + description: TCC_REQ on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_REQ[118] + description: TCC_REQ on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_REQ[119] + description: TCC_REQ on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_REQ[11] + description: TCC_REQ on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_REQ[120] + description: TCC_REQ on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_REQ[121] + description: TCC_REQ on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_REQ[122] + description: TCC_REQ on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_REQ[123] + description: TCC_REQ on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_REQ[124] + description: TCC_REQ on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_REQ[125] + description: TCC_REQ on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_REQ[126] + description: TCC_REQ on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_REQ[127] + description: TCC_REQ on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_REQ[12] + description: TCC_REQ on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_REQ[13] + description: TCC_REQ on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_REQ[14] + description: TCC_REQ on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_REQ[15] + description: TCC_REQ on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_REQ[16] + description: TCC_REQ on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_REQ[17] + description: TCC_REQ on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_REQ[18] + description: TCC_REQ on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_REQ[19] + description: TCC_REQ on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_REQ[1] + description: TCC_REQ on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_REQ[20] + description: TCC_REQ on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_REQ[21] + description: TCC_REQ on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_REQ[22] + description: TCC_REQ on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_REQ[23] + description: TCC_REQ on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_REQ[24] + description: TCC_REQ on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_REQ[25] + description: TCC_REQ on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_REQ[26] + description: TCC_REQ on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_REQ[27] + description: TCC_REQ on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_REQ[28] + description: TCC_REQ on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_REQ[29] + description: TCC_REQ on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_REQ[2] + description: TCC_REQ on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_REQ[30] + description: TCC_REQ on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_REQ[31] + description: TCC_REQ on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_REQ[32] + description: TCC_REQ on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_REQ[33] + description: TCC_REQ on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_REQ[34] + description: TCC_REQ on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_REQ[35] + description: TCC_REQ on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_REQ[36] + description: TCC_REQ on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_REQ[37] + description: TCC_REQ on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_REQ[38] + description: TCC_REQ on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_REQ[39] + description: TCC_REQ on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_REQ[3] + description: TCC_REQ on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_REQ[40] + description: TCC_REQ on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_REQ[41] + description: TCC_REQ on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_REQ[42] + description: TCC_REQ on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_REQ[43] + description: TCC_REQ on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_REQ[44] + description: TCC_REQ on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_REQ[45] + description: TCC_REQ on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_REQ[46] + description: TCC_REQ on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_REQ[47] + description: TCC_REQ on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_REQ[48] + description: TCC_REQ on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_REQ[49] + description: TCC_REQ on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_REQ[4] + description: TCC_REQ on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_REQ[50] + description: TCC_REQ on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_REQ[51] + description: TCC_REQ on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_REQ[52] + description: TCC_REQ on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_REQ[53] + description: TCC_REQ on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_REQ[54] + description: TCC_REQ on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_REQ[55] + description: TCC_REQ on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_REQ[56] + description: TCC_REQ on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_REQ[57] + description: TCC_REQ on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_REQ[58] + description: TCC_REQ on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_REQ[59] + description: TCC_REQ on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_REQ[5] + description: TCC_REQ on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_REQ[60] + description: TCC_REQ on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_REQ[61] + description: TCC_REQ on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_REQ[62] + description: TCC_REQ on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_REQ[63] + description: TCC_REQ on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_REQ[64] + description: TCC_REQ on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_REQ[65] + description: TCC_REQ on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_REQ[66] + description: TCC_REQ on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_REQ[67] + description: TCC_REQ on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_REQ[68] + description: TCC_REQ on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_REQ[69] + description: TCC_REQ on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_REQ[6] + description: TCC_REQ on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_REQ[70] + description: TCC_REQ on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_REQ[71] + description: TCC_REQ on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_REQ[72] + description: TCC_REQ on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_REQ[73] + description: TCC_REQ on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_REQ[74] + description: TCC_REQ on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_REQ[75] + description: TCC_REQ on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_REQ[76] + description: TCC_REQ on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_REQ[77] + description: TCC_REQ on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_REQ[78] + description: TCC_REQ on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_REQ[79] + description: TCC_REQ on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_REQ[7] + description: TCC_REQ on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_REQ[80] + description: TCC_REQ on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_REQ[81] + description: TCC_REQ on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_REQ[82] + description: TCC_REQ on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_REQ[83] + description: TCC_REQ on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_REQ[84] + description: TCC_REQ on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_REQ[85] + description: TCC_REQ on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_REQ[86] + description: TCC_REQ on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_REQ[87] + description: TCC_REQ on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_REQ[88] + description: TCC_REQ on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_REQ[89] + description: TCC_REQ on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_REQ[8] + description: TCC_REQ on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_REQ[90] + description: TCC_REQ on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_REQ[91] + description: TCC_REQ on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_REQ[92] + description: TCC_REQ on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_REQ[93] + description: TCC_REQ on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_REQ[94] + description: TCC_REQ on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_REQ[95] + description: TCC_REQ on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_REQ[96] + description: TCC_REQ on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_REQ[97] + description: TCC_REQ on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_REQ[98] + description: TCC_REQ on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_REQ[99] + description: TCC_REQ on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_REQ[9] + description: TCC_REQ on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_REQ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_11.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_11.txt new file mode 100644 index 0000000000..2aa480d560 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_11.txt @@ -0,0 +1,5 @@ +pmc: TCC_STREAMING_REQ_sum TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_TOO_MANY_EA_WRREQS_STALL[100] TCC_TOO_MANY_EA_WRREQS_STALL[101] TCC_TOO_MANY_EA_WRREQS_STALL[102] TCC_TOO_MANY_EA_WRREQS_STALL[103] TCC_TOO_MANY_EA_WRREQS_STALL[104] TCC_TOO_MANY_EA_WRREQS_STALL[105] TCC_TOO_MANY_EA_WRREQS_STALL[106] TCC_TOO_MANY_EA_WRREQS_STALL[107] TCC_TOO_MANY_EA_WRREQS_STALL[108] TCC_TOO_MANY_EA_WRREQS_STALL[109] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[110] TCC_TOO_MANY_EA_WRREQS_STALL[111] TCC_TOO_MANY_EA_WRREQS_STALL[112] TCC_TOO_MANY_EA_WRREQS_STALL[113] TCC_TOO_MANY_EA_WRREQS_STALL[114] TCC_TOO_MANY_EA_WRREQS_STALL[115] TCC_TOO_MANY_EA_WRREQS_STALL[116] TCC_TOO_MANY_EA_WRREQS_STALL[117] TCC_TOO_MANY_EA_WRREQS_STALL[118] TCC_TOO_MANY_EA_WRREQS_STALL[119] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[120] TCC_TOO_MANY_EA_WRREQS_STALL[121] TCC_TOO_MANY_EA_WRREQS_STALL[122] TCC_TOO_MANY_EA_WRREQS_STALL[123] TCC_TOO_MANY_EA_WRREQS_STALL[124] TCC_TOO_MANY_EA_WRREQS_STALL[125] TCC_TOO_MANY_EA_WRREQS_STALL[126] TCC_TOO_MANY_EA_WRREQS_STALL[127] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[16] TCC_TOO_MANY_EA_WRREQS_STALL[17] TCC_TOO_MANY_EA_WRREQS_STALL[18] TCC_TOO_MANY_EA_WRREQS_STALL[19] TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_TOO_MANY_EA_WRREQS_STALL[20] TCC_TOO_MANY_EA_WRREQS_STALL[21] TCC_TOO_MANY_EA_WRREQS_STALL[22] TCC_TOO_MANY_EA_WRREQS_STALL[23] TCC_TOO_MANY_EA_WRREQS_STALL[24] TCC_TOO_MANY_EA_WRREQS_STALL[25] TCC_TOO_MANY_EA_WRREQS_STALL[26] TCC_TOO_MANY_EA_WRREQS_STALL[27] TCC_TOO_MANY_EA_WRREQS_STALL[28] TCC_TOO_MANY_EA_WRREQS_STALL[29] TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_TOO_MANY_EA_WRREQS_STALL[30] TCC_TOO_MANY_EA_WRREQS_STALL[31] TCC_TOO_MANY_EA_WRREQS_STALL[32] TCC_TOO_MANY_EA_WRREQS_STALL[33] TCC_TOO_MANY_EA_WRREQS_STALL[34] TCC_TOO_MANY_EA_WRREQS_STALL[35] TCC_TOO_MANY_EA_WRREQS_STALL[36] TCC_TOO_MANY_EA_WRREQS_STALL[37] TCC_TOO_MANY_EA_WRREQS_STALL[38] TCC_TOO_MANY_EA_WRREQS_STALL[39] TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_TOO_MANY_EA_WRREQS_STALL[40] TCC_TOO_MANY_EA_WRREQS_STALL[41] TCC_TOO_MANY_EA_WRREQS_STALL[42] TCC_TOO_MANY_EA_WRREQS_STALL[43] TCC_TOO_MANY_EA_WRREQS_STALL[44] TCC_TOO_MANY_EA_WRREQS_STALL[45] TCC_TOO_MANY_EA_WRREQS_STALL[46] TCC_TOO_MANY_EA_WRREQS_STALL[47] TCC_TOO_MANY_EA_WRREQS_STALL[48] TCC_TOO_MANY_EA_WRREQS_STALL[49] TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_TOO_MANY_EA_WRREQS_STALL[50] TCC_TOO_MANY_EA_WRREQS_STALL[51] TCC_TOO_MANY_EA_WRREQS_STALL[52] TCC_TOO_MANY_EA_WRREQS_STALL[53] TCC_TOO_MANY_EA_WRREQS_STALL[54] TCC_TOO_MANY_EA_WRREQS_STALL[55] TCC_TOO_MANY_EA_WRREQS_STALL[56] TCC_TOO_MANY_EA_WRREQS_STALL[57] TCC_TOO_MANY_EA_WRREQS_STALL[58] TCC_TOO_MANY_EA_WRREQS_STALL[59] TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_TOO_MANY_EA_WRREQS_STALL[60] TCC_TOO_MANY_EA_WRREQS_STALL[61] TCC_TOO_MANY_EA_WRREQS_STALL[62] TCC_TOO_MANY_EA_WRREQS_STALL[63] TCC_TOO_MANY_EA_WRREQS_STALL[64] TCC_TOO_MANY_EA_WRREQS_STALL[65] TCC_TOO_MANY_EA_WRREQS_STALL[66] TCC_TOO_MANY_EA_WRREQS_STALL[67] TCC_TOO_MANY_EA_WRREQS_STALL[68] TCC_TOO_MANY_EA_WRREQS_STALL[69] TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_TOO_MANY_EA_WRREQS_STALL[70] TCC_TOO_MANY_EA_WRREQS_STALL[71] TCC_TOO_MANY_EA_WRREQS_STALL[72] TCC_TOO_MANY_EA_WRREQS_STALL[73] TCC_TOO_MANY_EA_WRREQS_STALL[74] TCC_TOO_MANY_EA_WRREQS_STALL[75] TCC_TOO_MANY_EA_WRREQS_STALL[76] TCC_TOO_MANY_EA_WRREQS_STALL[77] TCC_TOO_MANY_EA_WRREQS_STALL[78] TCC_TOO_MANY_EA_WRREQS_STALL[79] TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_TOO_MANY_EA_WRREQS_STALL[80] TCC_TOO_MANY_EA_WRREQS_STALL[81] TCC_TOO_MANY_EA_WRREQS_STALL[82] TCC_TOO_MANY_EA_WRREQS_STALL[83] TCC_TOO_MANY_EA_WRREQS_STALL[84] TCC_TOO_MANY_EA_WRREQS_STALL[85] TCC_TOO_MANY_EA_WRREQS_STALL[86] TCC_TOO_MANY_EA_WRREQS_STALL[87] TCC_TOO_MANY_EA_WRREQS_STALL[88] TCC_TOO_MANY_EA_WRREQS_STALL[89] TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_TOO_MANY_EA_WRREQS_STALL[90] TCC_TOO_MANY_EA_WRREQS_STALL[91] TCC_TOO_MANY_EA_WRREQS_STALL[92] TCC_TOO_MANY_EA_WRREQS_STALL[93] TCC_TOO_MANY_EA_WRREQS_STALL[94] TCC_TOO_MANY_EA_WRREQS_STALL[95] TCC_TOO_MANY_EA_WRREQS_STALL[96] TCC_TOO_MANY_EA_WRREQS_STALL[97] TCC_TOO_MANY_EA_WRREQS_STALL[98] TCC_TOO_MANY_EA_WRREQS_STALL[99] TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_TOO_MANY_EA_WRREQS_STALL_sum TCC_UC_REQ_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_11.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_11.yaml new file mode 100644 index 0000000000..95c08a832a --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_11.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_TOO_MANY_EA_WRREQS_STALL[0] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[100] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[101] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[102] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[103] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[104] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[105] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[106] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[107] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[108] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[109] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[10] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[110] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[111] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[112] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[113] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[114] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[115] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[116] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[117] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[118] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[119] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[11] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[120] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[121] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[122] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[123] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[124] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[125] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[126] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[127] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[12] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[13] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[14] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[15] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[16] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[17] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[18] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[19] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[1] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[20] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[21] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[22] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[23] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[24] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[25] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[26] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[27] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[28] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[29] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[2] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[30] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[31] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[32] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[33] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[34] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[35] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[36] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[37] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[38] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[39] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[3] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[40] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[41] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[42] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[43] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[44] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[45] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[46] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[47] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[48] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[49] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[4] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[50] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[51] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[52] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[53] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[54] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[55] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[56] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[57] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[58] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[59] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[5] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[60] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[61] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[62] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[63] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[64] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[65] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[66] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[67] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[68] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[69] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[6] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[70] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[71] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[72] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[73] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[74] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[75] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[76] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[77] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[78] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[79] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[7] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[80] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[81] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[82] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[83] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[84] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[85] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[86] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[87] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[88] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[89] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[8] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[90] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[91] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[92] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[93] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[94] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[95] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[96] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[97] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[98] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[99] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_TOO_MANY_EA_WRREQS_STALL[9] + description: TCC_TOO_MANY_EA_WRREQS_STALL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_TOO_MANY_EA_WRREQS_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_12.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_12.txt new file mode 100644 index 0000000000..c2fec1970b --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_12.txt @@ -0,0 +1,5 @@ +pmc: TCC_WRITEBACK_sum TCC_WRITE[0] TCC_WRITE[100] TCC_WRITE[101] TCC_WRITE[102] TCC_WRITE[103] TCC_WRITE[104] TCC_WRITE[105] TCC_WRITE[106] TCC_WRITE[107] TCC_WRITE[108] TCC_WRITE[109] TCC_WRITE[10] TCC_WRITE[110] TCC_WRITE[111] TCC_WRITE[112] TCC_WRITE[113] TCC_WRITE[114] TCC_WRITE[115] TCC_WRITE[116] TCC_WRITE[117] TCC_WRITE[118] TCC_WRITE[119] TCC_WRITE[11] TCC_WRITE[120] TCC_WRITE[121] TCC_WRITE[122] TCC_WRITE[123] TCC_WRITE[124] TCC_WRITE[125] TCC_WRITE[126] TCC_WRITE[127] TCC_WRITE[12] TCC_WRITE[13] TCC_WRITE[14] TCC_WRITE[15] TCC_WRITE[16] TCC_WRITE[17] TCC_WRITE[18] TCC_WRITE[19] TCC_WRITE[1] TCC_WRITE[20] TCC_WRITE[21] TCC_WRITE[22] TCC_WRITE[23] TCC_WRITE[24] TCC_WRITE[25] TCC_WRITE[26] TCC_WRITE[27] TCC_WRITE[28] TCC_WRITE[29] TCC_WRITE[2] TCC_WRITE[30] TCC_WRITE[31] TCC_WRITE[32] TCC_WRITE[33] TCC_WRITE[34] TCC_WRITE[35] TCC_WRITE[36] TCC_WRITE[37] TCC_WRITE[38] TCC_WRITE[39] TCC_WRITE[3] TCC_WRITE[40] TCC_WRITE[41] TCC_WRITE[42] TCC_WRITE[43] TCC_WRITE[44] TCC_WRITE[45] TCC_WRITE[46] TCC_WRITE[47] TCC_WRITE[48] TCC_WRITE[49] TCC_WRITE[4] TCC_WRITE[50] TCC_WRITE[51] TCC_WRITE[52] TCC_WRITE[53] TCC_WRITE[54] TCC_WRITE[55] TCC_WRITE[56] TCC_WRITE[57] TCC_WRITE[58] TCC_WRITE[59] TCC_WRITE[5] TCC_WRITE[60] TCC_WRITE[61] TCC_WRITE[62] TCC_WRITE[63] TCC_WRITE[64] TCC_WRITE[65] TCC_WRITE[66] TCC_WRITE[67] TCC_WRITE[68] TCC_WRITE[69] TCC_WRITE[6] TCC_WRITE[70] TCC_WRITE[71] TCC_WRITE[72] TCC_WRITE[73] TCC_WRITE[74] TCC_WRITE[75] TCC_WRITE[76] TCC_WRITE[77] TCC_WRITE[78] TCC_WRITE[79] TCC_WRITE[7] TCC_WRITE[80] TCC_WRITE[81] TCC_WRITE[82] TCC_WRITE[83] TCC_WRITE[84] TCC_WRITE[85] TCC_WRITE[86] TCC_WRITE[87] TCC_WRITE[88] TCC_WRITE[89] TCC_WRITE[8] TCC_WRITE[90] TCC_WRITE[91] TCC_WRITE[92] TCC_WRITE[93] TCC_WRITE[94] TCC_WRITE[95] TCC_WRITE[96] TCC_WRITE[97] TCC_WRITE[98] TCC_WRITE[99] TCC_WRITE[9] TCC_WRITE_SECTORS_sum TCC_WRITE_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_12.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_12.yaml new file mode 100644 index 0000000000..8bf75e6ac5 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_12.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_WRITE[0] + description: TCC_WRITE on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_WRITE[100] + description: TCC_WRITE on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_WRITE[101] + description: TCC_WRITE on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_WRITE[102] + description: TCC_WRITE on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_WRITE[103] + description: TCC_WRITE on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_WRITE[104] + description: TCC_WRITE on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_WRITE[105] + description: TCC_WRITE on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_WRITE[106] + description: TCC_WRITE on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_WRITE[107] + description: TCC_WRITE on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_WRITE[108] + description: TCC_WRITE on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_WRITE[109] + description: TCC_WRITE on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_WRITE[10] + description: TCC_WRITE on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_WRITE[110] + description: TCC_WRITE on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_WRITE[111] + description: TCC_WRITE on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_WRITE[112] + description: TCC_WRITE on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_WRITE[113] + description: TCC_WRITE on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_WRITE[114] + description: TCC_WRITE on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_WRITE[115] + description: TCC_WRITE on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_WRITE[116] + description: TCC_WRITE on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_WRITE[117] + description: TCC_WRITE on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_WRITE[118] + description: TCC_WRITE on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_WRITE[119] + description: TCC_WRITE on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_WRITE[11] + description: TCC_WRITE on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_WRITE[120] + description: TCC_WRITE on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_WRITE[121] + description: TCC_WRITE on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_WRITE[122] + description: TCC_WRITE on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_WRITE[123] + description: TCC_WRITE on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_WRITE[124] + description: TCC_WRITE on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_WRITE[125] + description: TCC_WRITE on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_WRITE[126] + description: TCC_WRITE on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_WRITE[127] + description: TCC_WRITE on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_WRITE[12] + description: TCC_WRITE on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_WRITE[13] + description: TCC_WRITE on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_WRITE[14] + description: TCC_WRITE on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_WRITE[15] + description: TCC_WRITE on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_WRITE[16] + description: TCC_WRITE on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_WRITE[17] + description: TCC_WRITE on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_WRITE[18] + description: TCC_WRITE on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_WRITE[19] + description: TCC_WRITE on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_WRITE[1] + description: TCC_WRITE on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_WRITE[20] + description: TCC_WRITE on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_WRITE[21] + description: TCC_WRITE on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_WRITE[22] + description: TCC_WRITE on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_WRITE[23] + description: TCC_WRITE on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_WRITE[24] + description: TCC_WRITE on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_WRITE[25] + description: TCC_WRITE on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_WRITE[26] + description: TCC_WRITE on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_WRITE[27] + description: TCC_WRITE on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_WRITE[28] + description: TCC_WRITE on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_WRITE[29] + description: TCC_WRITE on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_WRITE[2] + description: TCC_WRITE on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_WRITE[30] + description: TCC_WRITE on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_WRITE[31] + description: TCC_WRITE on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_WRITE[32] + description: TCC_WRITE on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_WRITE[33] + description: TCC_WRITE on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_WRITE[34] + description: TCC_WRITE on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_WRITE[35] + description: TCC_WRITE on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_WRITE[36] + description: TCC_WRITE on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_WRITE[37] + description: TCC_WRITE on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_WRITE[38] + description: TCC_WRITE on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_WRITE[39] + description: TCC_WRITE on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_WRITE[3] + description: TCC_WRITE on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_WRITE[40] + description: TCC_WRITE on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_WRITE[41] + description: TCC_WRITE on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_WRITE[42] + description: TCC_WRITE on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_WRITE[43] + description: TCC_WRITE on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_WRITE[44] + description: TCC_WRITE on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_WRITE[45] + description: TCC_WRITE on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_WRITE[46] + description: TCC_WRITE on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_WRITE[47] + description: TCC_WRITE on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_WRITE[48] + description: TCC_WRITE on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_WRITE[49] + description: TCC_WRITE on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_WRITE[4] + description: TCC_WRITE on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_WRITE[50] + description: TCC_WRITE on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_WRITE[51] + description: TCC_WRITE on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_WRITE[52] + description: TCC_WRITE on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_WRITE[53] + description: TCC_WRITE on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_WRITE[54] + description: TCC_WRITE on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_WRITE[55] + description: TCC_WRITE on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_WRITE[56] + description: TCC_WRITE on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_WRITE[57] + description: TCC_WRITE on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_WRITE[58] + description: TCC_WRITE on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_WRITE[59] + description: TCC_WRITE on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_WRITE[5] + description: TCC_WRITE on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_WRITE[60] + description: TCC_WRITE on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_WRITE[61] + description: TCC_WRITE on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_WRITE[62] + description: TCC_WRITE on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_WRITE[63] + description: TCC_WRITE on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_WRITE[64] + description: TCC_WRITE on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_WRITE[65] + description: TCC_WRITE on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_WRITE[66] + description: TCC_WRITE on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_WRITE[67] + description: TCC_WRITE on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_WRITE[68] + description: TCC_WRITE on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_WRITE[69] + description: TCC_WRITE on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_WRITE[6] + description: TCC_WRITE on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_WRITE[70] + description: TCC_WRITE on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_WRITE[71] + description: TCC_WRITE on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_WRITE[72] + description: TCC_WRITE on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_WRITE[73] + description: TCC_WRITE on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_WRITE[74] + description: TCC_WRITE on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_WRITE[75] + description: TCC_WRITE on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_WRITE[76] + description: TCC_WRITE on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_WRITE[77] + description: TCC_WRITE on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_WRITE[78] + description: TCC_WRITE on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_WRITE[79] + description: TCC_WRITE on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_WRITE[7] + description: TCC_WRITE on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_WRITE[80] + description: TCC_WRITE on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_WRITE[81] + description: TCC_WRITE on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_WRITE[82] + description: TCC_WRITE on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_WRITE[83] + description: TCC_WRITE on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_WRITE[84] + description: TCC_WRITE on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_WRITE[85] + description: TCC_WRITE on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_WRITE[86] + description: TCC_WRITE on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_WRITE[87] + description: TCC_WRITE on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_WRITE[88] + description: TCC_WRITE on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_WRITE[89] + description: TCC_WRITE on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_WRITE[8] + description: TCC_WRITE on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_WRITE[90] + description: TCC_WRITE on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_WRITE[91] + description: TCC_WRITE on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_WRITE[92] + description: TCC_WRITE on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_WRITE[93] + description: TCC_WRITE on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_WRITE[94] + description: TCC_WRITE on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_WRITE[95] + description: TCC_WRITE on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_WRITE[96] + description: TCC_WRITE on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_WRITE[97] + description: TCC_WRITE on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_WRITE[98] + description: TCC_WRITE on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_WRITE[99] + description: TCC_WRITE on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_WRITE[9] + description: TCC_WRITE on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_WRITE,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_2.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_2.txt new file mode 100644 index 0000000000..682109c797 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_2.txt @@ -0,0 +1,5 @@ +pmc: SQ_INSTS_VALU_MFMA_F6F4 SQ_INSTS_VALU_MFMA_F8 SQ_INSTS_VALU_MFMA_I8 SQ_INSTS_VALU_MFMA_MOPS_BF16 SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_F32 SQ_INSTS_VALU_MFMA_MOPS_F64 SQ_INSTS_VALU_MFMA_MOPS_F6F4 TA_TOTAL_WAVEFRONTS_sum TCP_TOTAL_ACCESSES_sum TCP_TOTAL_ATOMIC_WITHOUT_RET_sum TCP_TOTAL_ATOMIC_WITH_RET_sum TCP_TOTAL_CACHE_ACCESSES_sum TCC_EA0_WRREQ_ATOMIC_GMI_32B_sum TCC_EA0_WRREQ_ATOMIC_IO_32B_sum TCC_EA0_WRREQ_DRAM_CREDIT_STALL[0] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[100] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[101] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[102] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[103] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[104] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[105] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[106] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[107] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[108] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[109] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[10] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[110] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[111] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[112] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[113] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[114] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[115] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[116] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[117] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[118] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[119] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[11] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[120] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[121] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[122] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[123] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[124] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[125] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[126] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[127] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[12] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[13] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[14] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[15] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[16] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[17] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[18] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[19] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[1] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[20] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[21] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[22] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[23] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[24] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[25] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[26] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[27] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[28] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[29] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[2] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[30] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[31] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[32] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[33] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[34] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[35] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[36] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[37] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[38] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[39] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[3] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[40] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[41] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[42] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[43] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[44] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[45] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[46] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[47] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[48] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[49] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[4] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[50] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[51] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[52] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[53] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[54] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[55] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[56] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[57] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[58] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[59] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[5] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[60] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[61] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[62] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[63] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[64] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[65] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[66] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[67] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[68] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[69] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[6] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[70] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[71] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[72] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[73] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[74] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[75] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[76] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[77] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[78] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[79] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[7] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[80] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[81] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[82] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[83] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[84] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[85] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[86] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[87] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[88] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[89] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[8] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[90] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[91] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[92] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[93] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[94] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[95] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[96] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[97] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[98] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[99] TCC_EA0_WRREQ_DRAM_CREDIT_STALL[9] TCC_EA0_WRREQ_DRAM_CREDIT_STALL_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_2.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_2.yaml new file mode 100644 index 0000000000..c1d845327f --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_2.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[0] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[100] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[101] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[102] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[103] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[104] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[105] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[106] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[107] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[108] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[109] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[10] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[110] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[111] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[112] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[113] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[114] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[115] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[116] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[117] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[118] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[119] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[11] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[120] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[121] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[122] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[123] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[124] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[125] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[126] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[127] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[12] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[13] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[14] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[15] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[16] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[17] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[18] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[19] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[1] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[20] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[21] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[22] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[23] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[24] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[25] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[26] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[27] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[28] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[29] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[2] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[30] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[31] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[32] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[33] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[34] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[35] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[36] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[37] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[38] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[39] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[3] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[40] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[41] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[42] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[43] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[44] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[45] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[46] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[47] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[48] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[49] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[4] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[50] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[51] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[52] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[53] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[54] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[55] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[56] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[57] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[58] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[59] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[5] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[60] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[61] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[62] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[63] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[64] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[65] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[66] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[67] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[68] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[69] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[6] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[70] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[71] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[72] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[73] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[74] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[75] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[76] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[77] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[78] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[79] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[7] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[80] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[81] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[82] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[83] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[84] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[85] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[86] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[87] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[88] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[89] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[8] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[90] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[91] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[92] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[93] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[94] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[95] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[96] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[97] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[98] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[99] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_DRAM_CREDIT_STALL[9] + description: TCC_EA0_WRREQ_DRAM_CREDIT_STALL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_DRAM_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_3.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_3.txt new file mode 100644 index 0000000000..046b57f358 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_3.txt @@ -0,0 +1,5 @@ +pmc: SQ_INSTS_VALU_MFMA_MOPS_F8 SQ_INSTS_VALU_MFMA_MOPS_I8 SQ_INSTS_VALU_MUL_F16 SQ_INSTS_VALU_MUL_F32 SQ_INSTS_VALU_MUL_F64 SQ_INSTS_VALU_TRANS_F16 SQ_INSTS_VALU_TRANS_F32 SQ_INSTS_VALU_TRANS_F64 TCP_TOTAL_READ_sum TCP_TOTAL_WRITEBACK_INVALIDATES_sum TCP_TOTAL_WRITE_sum TCP_UTCL1_LFIFO_FULL_sum TCC_EA0_WRREQ_DRAM_sum TCC_EA0_WRREQ_GMI_CREDIT_STALL[0] TCC_EA0_WRREQ_GMI_CREDIT_STALL[100] TCC_EA0_WRREQ_GMI_CREDIT_STALL[101] TCC_EA0_WRREQ_GMI_CREDIT_STALL[102] TCC_EA0_WRREQ_GMI_CREDIT_STALL[103] TCC_EA0_WRREQ_GMI_CREDIT_STALL[104] TCC_EA0_WRREQ_GMI_CREDIT_STALL[105] TCC_EA0_WRREQ_GMI_CREDIT_STALL[106] TCC_EA0_WRREQ_GMI_CREDIT_STALL[107] TCC_EA0_WRREQ_GMI_CREDIT_STALL[108] TCC_EA0_WRREQ_GMI_CREDIT_STALL[109] TCC_EA0_WRREQ_GMI_CREDIT_STALL[10] TCC_EA0_WRREQ_GMI_CREDIT_STALL[110] TCC_EA0_WRREQ_GMI_CREDIT_STALL[111] TCC_EA0_WRREQ_GMI_CREDIT_STALL[112] TCC_EA0_WRREQ_GMI_CREDIT_STALL[113] TCC_EA0_WRREQ_GMI_CREDIT_STALL[114] TCC_EA0_WRREQ_GMI_CREDIT_STALL[115] TCC_EA0_WRREQ_GMI_CREDIT_STALL[116] TCC_EA0_WRREQ_GMI_CREDIT_STALL[117] TCC_EA0_WRREQ_GMI_CREDIT_STALL[118] TCC_EA0_WRREQ_GMI_CREDIT_STALL[119] TCC_EA0_WRREQ_GMI_CREDIT_STALL[11] TCC_EA0_WRREQ_GMI_CREDIT_STALL[120] TCC_EA0_WRREQ_GMI_CREDIT_STALL[121] TCC_EA0_WRREQ_GMI_CREDIT_STALL[122] TCC_EA0_WRREQ_GMI_CREDIT_STALL[123] TCC_EA0_WRREQ_GMI_CREDIT_STALL[124] TCC_EA0_WRREQ_GMI_CREDIT_STALL[125] TCC_EA0_WRREQ_GMI_CREDIT_STALL[126] TCC_EA0_WRREQ_GMI_CREDIT_STALL[127] TCC_EA0_WRREQ_GMI_CREDIT_STALL[12] TCC_EA0_WRREQ_GMI_CREDIT_STALL[13] TCC_EA0_WRREQ_GMI_CREDIT_STALL[14] TCC_EA0_WRREQ_GMI_CREDIT_STALL[15] TCC_EA0_WRREQ_GMI_CREDIT_STALL[16] TCC_EA0_WRREQ_GMI_CREDIT_STALL[17] TCC_EA0_WRREQ_GMI_CREDIT_STALL[18] TCC_EA0_WRREQ_GMI_CREDIT_STALL[19] TCC_EA0_WRREQ_GMI_CREDIT_STALL[1] TCC_EA0_WRREQ_GMI_CREDIT_STALL[20] TCC_EA0_WRREQ_GMI_CREDIT_STALL[21] TCC_EA0_WRREQ_GMI_CREDIT_STALL[22] TCC_EA0_WRREQ_GMI_CREDIT_STALL[23] TCC_EA0_WRREQ_GMI_CREDIT_STALL[24] TCC_EA0_WRREQ_GMI_CREDIT_STALL[25] TCC_EA0_WRREQ_GMI_CREDIT_STALL[26] TCC_EA0_WRREQ_GMI_CREDIT_STALL[27] TCC_EA0_WRREQ_GMI_CREDIT_STALL[28] TCC_EA0_WRREQ_GMI_CREDIT_STALL[29] TCC_EA0_WRREQ_GMI_CREDIT_STALL[2] TCC_EA0_WRREQ_GMI_CREDIT_STALL[30] TCC_EA0_WRREQ_GMI_CREDIT_STALL[31] TCC_EA0_WRREQ_GMI_CREDIT_STALL[32] TCC_EA0_WRREQ_GMI_CREDIT_STALL[33] TCC_EA0_WRREQ_GMI_CREDIT_STALL[34] TCC_EA0_WRREQ_GMI_CREDIT_STALL[35] TCC_EA0_WRREQ_GMI_CREDIT_STALL[36] TCC_EA0_WRREQ_GMI_CREDIT_STALL[37] TCC_EA0_WRREQ_GMI_CREDIT_STALL[38] TCC_EA0_WRREQ_GMI_CREDIT_STALL[39] TCC_EA0_WRREQ_GMI_CREDIT_STALL[3] TCC_EA0_WRREQ_GMI_CREDIT_STALL[40] TCC_EA0_WRREQ_GMI_CREDIT_STALL[41] TCC_EA0_WRREQ_GMI_CREDIT_STALL[42] TCC_EA0_WRREQ_GMI_CREDIT_STALL[43] TCC_EA0_WRREQ_GMI_CREDIT_STALL[44] TCC_EA0_WRREQ_GMI_CREDIT_STALL[45] TCC_EA0_WRREQ_GMI_CREDIT_STALL[46] TCC_EA0_WRREQ_GMI_CREDIT_STALL[47] TCC_EA0_WRREQ_GMI_CREDIT_STALL[48] TCC_EA0_WRREQ_GMI_CREDIT_STALL[49] TCC_EA0_WRREQ_GMI_CREDIT_STALL[4] TCC_EA0_WRREQ_GMI_CREDIT_STALL[50] TCC_EA0_WRREQ_GMI_CREDIT_STALL[51] TCC_EA0_WRREQ_GMI_CREDIT_STALL[52] TCC_EA0_WRREQ_GMI_CREDIT_STALL[53] TCC_EA0_WRREQ_GMI_CREDIT_STALL[54] TCC_EA0_WRREQ_GMI_CREDIT_STALL[55] TCC_EA0_WRREQ_GMI_CREDIT_STALL[56] TCC_EA0_WRREQ_GMI_CREDIT_STALL[57] TCC_EA0_WRREQ_GMI_CREDIT_STALL[58] TCC_EA0_WRREQ_GMI_CREDIT_STALL[59] TCC_EA0_WRREQ_GMI_CREDIT_STALL[5] TCC_EA0_WRREQ_GMI_CREDIT_STALL[60] TCC_EA0_WRREQ_GMI_CREDIT_STALL[61] TCC_EA0_WRREQ_GMI_CREDIT_STALL[62] TCC_EA0_WRREQ_GMI_CREDIT_STALL[63] TCC_EA0_WRREQ_GMI_CREDIT_STALL[64] TCC_EA0_WRREQ_GMI_CREDIT_STALL[65] TCC_EA0_WRREQ_GMI_CREDIT_STALL[66] TCC_EA0_WRREQ_GMI_CREDIT_STALL[67] TCC_EA0_WRREQ_GMI_CREDIT_STALL[68] TCC_EA0_WRREQ_GMI_CREDIT_STALL[69] TCC_EA0_WRREQ_GMI_CREDIT_STALL[6] TCC_EA0_WRREQ_GMI_CREDIT_STALL[70] TCC_EA0_WRREQ_GMI_CREDIT_STALL[71] TCC_EA0_WRREQ_GMI_CREDIT_STALL[72] TCC_EA0_WRREQ_GMI_CREDIT_STALL[73] TCC_EA0_WRREQ_GMI_CREDIT_STALL[74] TCC_EA0_WRREQ_GMI_CREDIT_STALL[75] TCC_EA0_WRREQ_GMI_CREDIT_STALL[76] TCC_EA0_WRREQ_GMI_CREDIT_STALL[77] TCC_EA0_WRREQ_GMI_CREDIT_STALL[78] TCC_EA0_WRREQ_GMI_CREDIT_STALL[79] TCC_EA0_WRREQ_GMI_CREDIT_STALL[7] TCC_EA0_WRREQ_GMI_CREDIT_STALL[80] TCC_EA0_WRREQ_GMI_CREDIT_STALL[81] TCC_EA0_WRREQ_GMI_CREDIT_STALL[82] TCC_EA0_WRREQ_GMI_CREDIT_STALL[83] TCC_EA0_WRREQ_GMI_CREDIT_STALL[84] TCC_EA0_WRREQ_GMI_CREDIT_STALL[85] TCC_EA0_WRREQ_GMI_CREDIT_STALL[86] TCC_EA0_WRREQ_GMI_CREDIT_STALL[87] TCC_EA0_WRREQ_GMI_CREDIT_STALL[88] TCC_EA0_WRREQ_GMI_CREDIT_STALL[89] TCC_EA0_WRREQ_GMI_CREDIT_STALL[8] TCC_EA0_WRREQ_GMI_CREDIT_STALL[90] TCC_EA0_WRREQ_GMI_CREDIT_STALL[91] TCC_EA0_WRREQ_GMI_CREDIT_STALL[92] TCC_EA0_WRREQ_GMI_CREDIT_STALL[93] TCC_EA0_WRREQ_GMI_CREDIT_STALL[94] TCC_EA0_WRREQ_GMI_CREDIT_STALL[95] TCC_EA0_WRREQ_GMI_CREDIT_STALL[96] TCC_EA0_WRREQ_GMI_CREDIT_STALL[97] TCC_EA0_WRREQ_GMI_CREDIT_STALL[98] TCC_EA0_WRREQ_GMI_CREDIT_STALL[99] TCC_EA0_WRREQ_GMI_CREDIT_STALL[9] TCC_EA0_WRREQ_GMI_CREDIT_STALL_sum TCC_EA0_WRREQ_IO_CREDIT_STALL[0] TCC_EA0_WRREQ_IO_CREDIT_STALL[100] TCC_EA0_WRREQ_IO_CREDIT_STALL[101] TCC_EA0_WRREQ_IO_CREDIT_STALL[102] TCC_EA0_WRREQ_IO_CREDIT_STALL[103] TCC_EA0_WRREQ_IO_CREDIT_STALL[104] TCC_EA0_WRREQ_IO_CREDIT_STALL[105] TCC_EA0_WRREQ_IO_CREDIT_STALL[106] TCC_EA0_WRREQ_IO_CREDIT_STALL[107] TCC_EA0_WRREQ_IO_CREDIT_STALL[108] TCC_EA0_WRREQ_IO_CREDIT_STALL[109] TCC_EA0_WRREQ_IO_CREDIT_STALL[10] TCC_EA0_WRREQ_IO_CREDIT_STALL[110] TCC_EA0_WRREQ_IO_CREDIT_STALL[111] TCC_EA0_WRREQ_IO_CREDIT_STALL[112] TCC_EA0_WRREQ_IO_CREDIT_STALL[113] TCC_EA0_WRREQ_IO_CREDIT_STALL[114] TCC_EA0_WRREQ_IO_CREDIT_STALL[115] TCC_EA0_WRREQ_IO_CREDIT_STALL[116] TCC_EA0_WRREQ_IO_CREDIT_STALL[117] TCC_EA0_WRREQ_IO_CREDIT_STALL[118] TCC_EA0_WRREQ_IO_CREDIT_STALL[119] TCC_EA0_WRREQ_IO_CREDIT_STALL[11] TCC_EA0_WRREQ_IO_CREDIT_STALL[120] TCC_EA0_WRREQ_IO_CREDIT_STALL[121] TCC_EA0_WRREQ_IO_CREDIT_STALL[122] TCC_EA0_WRREQ_IO_CREDIT_STALL[123] TCC_EA0_WRREQ_IO_CREDIT_STALL[124] TCC_EA0_WRREQ_IO_CREDIT_STALL[125] TCC_EA0_WRREQ_IO_CREDIT_STALL[126] TCC_EA0_WRREQ_IO_CREDIT_STALL[127] TCC_EA0_WRREQ_IO_CREDIT_STALL[12] TCC_EA0_WRREQ_IO_CREDIT_STALL[13] TCC_EA0_WRREQ_IO_CREDIT_STALL[14] TCC_EA0_WRREQ_IO_CREDIT_STALL[15] TCC_EA0_WRREQ_IO_CREDIT_STALL[16] TCC_EA0_WRREQ_IO_CREDIT_STALL[17] TCC_EA0_WRREQ_IO_CREDIT_STALL[18] TCC_EA0_WRREQ_IO_CREDIT_STALL[19] TCC_EA0_WRREQ_IO_CREDIT_STALL[1] TCC_EA0_WRREQ_IO_CREDIT_STALL[20] TCC_EA0_WRREQ_IO_CREDIT_STALL[21] TCC_EA0_WRREQ_IO_CREDIT_STALL[22] TCC_EA0_WRREQ_IO_CREDIT_STALL[23] TCC_EA0_WRREQ_IO_CREDIT_STALL[24] TCC_EA0_WRREQ_IO_CREDIT_STALL[25] TCC_EA0_WRREQ_IO_CREDIT_STALL[26] TCC_EA0_WRREQ_IO_CREDIT_STALL[27] TCC_EA0_WRREQ_IO_CREDIT_STALL[28] TCC_EA0_WRREQ_IO_CREDIT_STALL[29] TCC_EA0_WRREQ_IO_CREDIT_STALL[2] TCC_EA0_WRREQ_IO_CREDIT_STALL[30] TCC_EA0_WRREQ_IO_CREDIT_STALL[31] TCC_EA0_WRREQ_IO_CREDIT_STALL[32] TCC_EA0_WRREQ_IO_CREDIT_STALL[33] TCC_EA0_WRREQ_IO_CREDIT_STALL[34] TCC_EA0_WRREQ_IO_CREDIT_STALL[35] TCC_EA0_WRREQ_IO_CREDIT_STALL[36] TCC_EA0_WRREQ_IO_CREDIT_STALL[37] TCC_EA0_WRREQ_IO_CREDIT_STALL[38] TCC_EA0_WRREQ_IO_CREDIT_STALL[39] TCC_EA0_WRREQ_IO_CREDIT_STALL[3] TCC_EA0_WRREQ_IO_CREDIT_STALL[40] TCC_EA0_WRREQ_IO_CREDIT_STALL[41] TCC_EA0_WRREQ_IO_CREDIT_STALL[42] TCC_EA0_WRREQ_IO_CREDIT_STALL[43] TCC_EA0_WRREQ_IO_CREDIT_STALL[44] TCC_EA0_WRREQ_IO_CREDIT_STALL[45] TCC_EA0_WRREQ_IO_CREDIT_STALL[46] TCC_EA0_WRREQ_IO_CREDIT_STALL[47] TCC_EA0_WRREQ_IO_CREDIT_STALL[48] TCC_EA0_WRREQ_IO_CREDIT_STALL[49] TCC_EA0_WRREQ_IO_CREDIT_STALL[4] TCC_EA0_WRREQ_IO_CREDIT_STALL[50] TCC_EA0_WRREQ_IO_CREDIT_STALL[51] TCC_EA0_WRREQ_IO_CREDIT_STALL[52] TCC_EA0_WRREQ_IO_CREDIT_STALL[53] TCC_EA0_WRREQ_IO_CREDIT_STALL[54] TCC_EA0_WRREQ_IO_CREDIT_STALL[55] TCC_EA0_WRREQ_IO_CREDIT_STALL[56] TCC_EA0_WRREQ_IO_CREDIT_STALL[57] TCC_EA0_WRREQ_IO_CREDIT_STALL[58] TCC_EA0_WRREQ_IO_CREDIT_STALL[59] TCC_EA0_WRREQ_IO_CREDIT_STALL[5] TCC_EA0_WRREQ_IO_CREDIT_STALL[60] TCC_EA0_WRREQ_IO_CREDIT_STALL[61] TCC_EA0_WRREQ_IO_CREDIT_STALL[62] TCC_EA0_WRREQ_IO_CREDIT_STALL[63] TCC_EA0_WRREQ_IO_CREDIT_STALL[64] TCC_EA0_WRREQ_IO_CREDIT_STALL[65] TCC_EA0_WRREQ_IO_CREDIT_STALL[66] TCC_EA0_WRREQ_IO_CREDIT_STALL[67] TCC_EA0_WRREQ_IO_CREDIT_STALL[68] TCC_EA0_WRREQ_IO_CREDIT_STALL[69] TCC_EA0_WRREQ_IO_CREDIT_STALL[6] TCC_EA0_WRREQ_IO_CREDIT_STALL[70] TCC_EA0_WRREQ_IO_CREDIT_STALL[71] TCC_EA0_WRREQ_IO_CREDIT_STALL[72] TCC_EA0_WRREQ_IO_CREDIT_STALL[73] TCC_EA0_WRREQ_IO_CREDIT_STALL[74] TCC_EA0_WRREQ_IO_CREDIT_STALL[75] TCC_EA0_WRREQ_IO_CREDIT_STALL[76] TCC_EA0_WRREQ_IO_CREDIT_STALL[77] TCC_EA0_WRREQ_IO_CREDIT_STALL[78] TCC_EA0_WRREQ_IO_CREDIT_STALL[79] TCC_EA0_WRREQ_IO_CREDIT_STALL[7] TCC_EA0_WRREQ_IO_CREDIT_STALL[80] TCC_EA0_WRREQ_IO_CREDIT_STALL[81] TCC_EA0_WRREQ_IO_CREDIT_STALL[82] TCC_EA0_WRREQ_IO_CREDIT_STALL[83] TCC_EA0_WRREQ_IO_CREDIT_STALL[84] TCC_EA0_WRREQ_IO_CREDIT_STALL[85] TCC_EA0_WRREQ_IO_CREDIT_STALL[86] TCC_EA0_WRREQ_IO_CREDIT_STALL[87] TCC_EA0_WRREQ_IO_CREDIT_STALL[88] TCC_EA0_WRREQ_IO_CREDIT_STALL[89] TCC_EA0_WRREQ_IO_CREDIT_STALL[8] TCC_EA0_WRREQ_IO_CREDIT_STALL[90] TCC_EA0_WRREQ_IO_CREDIT_STALL[91] TCC_EA0_WRREQ_IO_CREDIT_STALL[92] TCC_EA0_WRREQ_IO_CREDIT_STALL[93] TCC_EA0_WRREQ_IO_CREDIT_STALL[94] TCC_EA0_WRREQ_IO_CREDIT_STALL[95] TCC_EA0_WRREQ_IO_CREDIT_STALL[96] TCC_EA0_WRREQ_IO_CREDIT_STALL[97] TCC_EA0_WRREQ_IO_CREDIT_STALL[98] TCC_EA0_WRREQ_IO_CREDIT_STALL[99] TCC_EA0_WRREQ_IO_CREDIT_STALL[9] + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_3.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_3.yaml new file mode 100644 index 0000000000..5438307b8e --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_3.yaml @@ -0,0 +1,1795 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[0] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[100] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[101] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[102] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[103] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[104] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[105] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[106] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[107] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[108] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[109] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[10] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[110] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[111] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[112] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[113] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[114] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[115] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[116] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[117] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[118] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[119] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[11] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[120] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[121] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[122] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[123] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[124] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[125] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[126] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[127] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[12] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[13] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[14] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[15] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[16] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[17] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[18] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[19] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[1] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[20] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[21] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[22] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[23] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[24] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[25] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[26] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[27] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[28] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[29] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[2] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[30] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[31] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[32] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[33] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[34] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[35] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[36] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[37] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[38] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[39] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[3] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[40] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[41] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[42] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[43] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[44] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[45] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[46] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[47] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[48] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[49] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[4] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[50] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[51] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[52] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[53] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[54] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[55] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[56] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[57] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[58] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[59] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[5] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[60] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[61] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[62] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[63] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[64] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[65] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[66] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[67] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[68] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[69] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[6] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[70] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[71] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[72] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[73] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[74] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[75] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[76] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[77] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[78] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[79] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[7] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[80] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[81] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[82] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[83] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[84] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[85] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[86] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[87] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[88] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[89] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[8] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[90] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[91] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[92] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[93] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[94] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[95] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[96] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[97] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[98] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[99] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_GMI_CREDIT_STALL[9] + description: TCC_EA0_WRREQ_GMI_CREDIT_STALL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_GMI_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[0] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[100] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[101] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[102] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[103] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[104] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[105] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[106] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[107] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[108] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[109] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[10] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[110] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[111] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[112] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[113] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[114] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[115] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[116] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[117] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[118] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[119] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[11] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[120] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[121] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[122] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[123] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[124] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[125] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[126] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[127] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[12] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[13] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[14] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[15] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[16] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[17] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[18] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[19] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[1] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[20] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[21] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[22] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[23] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[24] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[25] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[26] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[27] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[28] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[29] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[2] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[30] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[31] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[32] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[33] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[34] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[35] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[36] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[37] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[38] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[39] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[3] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[40] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[41] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[42] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[43] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[44] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[45] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[46] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[47] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[48] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[49] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[4] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[50] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[51] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[52] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[53] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[54] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[55] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[56] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[57] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[58] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[59] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[5] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[60] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[61] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[62] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[63] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[64] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[65] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[66] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[67] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[68] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[69] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[6] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[70] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[71] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[72] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[73] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[74] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[75] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[76] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[77] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[78] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[79] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[7] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[80] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[81] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[82] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[83] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[84] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[85] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[86] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[87] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[88] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[89] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[8] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[90] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[91] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[92] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[93] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[94] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[95] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[96] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[97] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[98] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[99] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_IO_CREDIT_STALL[9] + description: TCC_EA0_WRREQ_IO_CREDIT_STALL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_IO_CREDIT_STALL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_4.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_4.txt new file mode 100644 index 0000000000..97dcd6d2d6 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_4.txt @@ -0,0 +1,5 @@ +pmc: SQ_INSTS_VMEM SQ_INSTS_VSKIPPED SQ_LDS_ADDR_CONFLICT SQ_LDS_ATOMIC_RETURN SQ_LDS_BANK_CONFLICT SQ_LDS_CMD_FIFO_FULL SQ_LDS_DATA_FIFO_FULL SQ_LDS_IDX_ACTIVE TCP_UTCL1_PERMISSION_MISS_sum TCP_UTCL1_REQUEST_sum TCP_UTCL1_SERIALIZATION_STALL_sum TCP_UTCL1_STALL_INFLIGHT_MAX_sum TCC_EA0_WRREQ_IO_CREDIT_STALL_sum TCC_EA0_WRREQ_LEVEL[0] TCC_EA0_WRREQ_LEVEL[100] TCC_EA0_WRREQ_LEVEL[101] TCC_EA0_WRREQ_LEVEL[102] TCC_EA0_WRREQ_LEVEL[103] TCC_EA0_WRREQ_LEVEL[104] TCC_EA0_WRREQ_LEVEL[105] TCC_EA0_WRREQ_LEVEL[106] TCC_EA0_WRREQ_LEVEL[107] TCC_EA0_WRREQ_LEVEL[108] TCC_EA0_WRREQ_LEVEL[109] TCC_EA0_WRREQ_LEVEL[10] TCC_EA0_WRREQ_LEVEL[110] TCC_EA0_WRREQ_LEVEL[111] TCC_EA0_WRREQ_LEVEL[112] TCC_EA0_WRREQ_LEVEL[113] TCC_EA0_WRREQ_LEVEL[114] TCC_EA0_WRREQ_LEVEL[115] TCC_EA0_WRREQ_LEVEL[116] TCC_EA0_WRREQ_LEVEL[117] TCC_EA0_WRREQ_LEVEL[118] TCC_EA0_WRREQ_LEVEL[119] TCC_EA0_WRREQ_LEVEL[11] TCC_EA0_WRREQ_LEVEL[120] TCC_EA0_WRREQ_LEVEL[121] TCC_EA0_WRREQ_LEVEL[122] TCC_EA0_WRREQ_LEVEL[123] TCC_EA0_WRREQ_LEVEL[124] TCC_EA0_WRREQ_LEVEL[125] TCC_EA0_WRREQ_LEVEL[126] TCC_EA0_WRREQ_LEVEL[127] TCC_EA0_WRREQ_LEVEL[12] TCC_EA0_WRREQ_LEVEL[13] TCC_EA0_WRREQ_LEVEL[14] TCC_EA0_WRREQ_LEVEL[15] TCC_EA0_WRREQ_LEVEL[16] TCC_EA0_WRREQ_LEVEL[17] TCC_EA0_WRREQ_LEVEL[18] TCC_EA0_WRREQ_LEVEL[19] TCC_EA0_WRREQ_LEVEL[1] TCC_EA0_WRREQ_LEVEL[20] TCC_EA0_WRREQ_LEVEL[21] TCC_EA0_WRREQ_LEVEL[22] TCC_EA0_WRREQ_LEVEL[23] TCC_EA0_WRREQ_LEVEL[24] TCC_EA0_WRREQ_LEVEL[25] TCC_EA0_WRREQ_LEVEL[26] TCC_EA0_WRREQ_LEVEL[27] TCC_EA0_WRREQ_LEVEL[28] TCC_EA0_WRREQ_LEVEL[29] TCC_EA0_WRREQ_LEVEL[2] TCC_EA0_WRREQ_LEVEL[30] TCC_EA0_WRREQ_LEVEL[31] TCC_EA0_WRREQ_LEVEL[32] TCC_EA0_WRREQ_LEVEL[33] TCC_EA0_WRREQ_LEVEL[34] TCC_EA0_WRREQ_LEVEL[35] TCC_EA0_WRREQ_LEVEL[36] TCC_EA0_WRREQ_LEVEL[37] TCC_EA0_WRREQ_LEVEL[38] TCC_EA0_WRREQ_LEVEL[39] TCC_EA0_WRREQ_LEVEL[3] TCC_EA0_WRREQ_LEVEL[40] TCC_EA0_WRREQ_LEVEL[41] TCC_EA0_WRREQ_LEVEL[42] TCC_EA0_WRREQ_LEVEL[43] TCC_EA0_WRREQ_LEVEL[44] TCC_EA0_WRREQ_LEVEL[45] TCC_EA0_WRREQ_LEVEL[46] TCC_EA0_WRREQ_LEVEL[47] TCC_EA0_WRREQ_LEVEL[48] TCC_EA0_WRREQ_LEVEL[49] TCC_EA0_WRREQ_LEVEL[4] TCC_EA0_WRREQ_LEVEL[50] TCC_EA0_WRREQ_LEVEL[51] TCC_EA0_WRREQ_LEVEL[52] TCC_EA0_WRREQ_LEVEL[53] TCC_EA0_WRREQ_LEVEL[54] TCC_EA0_WRREQ_LEVEL[55] TCC_EA0_WRREQ_LEVEL[56] TCC_EA0_WRREQ_LEVEL[57] TCC_EA0_WRREQ_LEVEL[58] TCC_EA0_WRREQ_LEVEL[59] TCC_EA0_WRREQ_LEVEL[5] TCC_EA0_WRREQ_LEVEL[60] TCC_EA0_WRREQ_LEVEL[61] TCC_EA0_WRREQ_LEVEL[62] TCC_EA0_WRREQ_LEVEL[63] TCC_EA0_WRREQ_LEVEL[64] TCC_EA0_WRREQ_LEVEL[65] TCC_EA0_WRREQ_LEVEL[66] TCC_EA0_WRREQ_LEVEL[67] TCC_EA0_WRREQ_LEVEL[68] TCC_EA0_WRREQ_LEVEL[69] TCC_EA0_WRREQ_LEVEL[6] TCC_EA0_WRREQ_LEVEL[70] TCC_EA0_WRREQ_LEVEL[71] TCC_EA0_WRREQ_LEVEL[72] TCC_EA0_WRREQ_LEVEL[73] TCC_EA0_WRREQ_LEVEL[74] TCC_EA0_WRREQ_LEVEL[75] TCC_EA0_WRREQ_LEVEL[76] TCC_EA0_WRREQ_LEVEL[77] TCC_EA0_WRREQ_LEVEL[78] TCC_EA0_WRREQ_LEVEL[79] TCC_EA0_WRREQ_LEVEL[7] TCC_EA0_WRREQ_LEVEL[80] TCC_EA0_WRREQ_LEVEL[81] TCC_EA0_WRREQ_LEVEL[82] TCC_EA0_WRREQ_LEVEL[83] TCC_EA0_WRREQ_LEVEL[84] TCC_EA0_WRREQ_LEVEL[85] TCC_EA0_WRREQ_LEVEL[86] TCC_EA0_WRREQ_LEVEL[87] TCC_EA0_WRREQ_LEVEL[88] TCC_EA0_WRREQ_LEVEL[89] TCC_EA0_WRREQ_LEVEL[8] TCC_EA0_WRREQ_LEVEL[90] TCC_EA0_WRREQ_LEVEL[91] TCC_EA0_WRREQ_LEVEL[92] TCC_EA0_WRREQ_LEVEL[93] TCC_EA0_WRREQ_LEVEL[94] TCC_EA0_WRREQ_LEVEL[95] TCC_EA0_WRREQ_LEVEL[96] TCC_EA0_WRREQ_LEVEL[97] TCC_EA0_WRREQ_LEVEL[98] TCC_EA0_WRREQ_LEVEL[99] TCC_EA0_WRREQ_LEVEL[9] TCC_EA0_WRREQ_LEVEL_sum TCC_EA0_WRREQ_STALL_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_4.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_4.yaml new file mode 100644 index 0000000000..781bc76637 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_4.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_EA0_WRREQ_LEVEL[0] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_LEVEL[100] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_LEVEL[101] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_LEVEL[102] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_LEVEL[103] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_LEVEL[104] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_LEVEL[105] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_LEVEL[106] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_LEVEL[107] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_LEVEL[108] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_LEVEL[109] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_LEVEL[10] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_LEVEL[110] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_LEVEL[111] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_LEVEL[112] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_LEVEL[113] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_LEVEL[114] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_LEVEL[115] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_LEVEL[116] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_LEVEL[117] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_LEVEL[118] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_LEVEL[119] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_LEVEL[11] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_LEVEL[120] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_LEVEL[121] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_LEVEL[122] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_LEVEL[123] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_LEVEL[124] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_LEVEL[125] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_LEVEL[126] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_LEVEL[127] + description: TCC_EA0_WRREQ_LEVEL on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_LEVEL[12] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_LEVEL[13] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_LEVEL[14] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_LEVEL[15] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_LEVEL[16] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_LEVEL[17] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_LEVEL[18] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_LEVEL[19] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_LEVEL[1] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_LEVEL[20] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_LEVEL[21] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_LEVEL[22] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_LEVEL[23] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_LEVEL[24] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_LEVEL[25] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_LEVEL[26] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_LEVEL[27] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_LEVEL[28] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_LEVEL[29] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_LEVEL[2] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_LEVEL[30] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_LEVEL[31] + description: TCC_EA0_WRREQ_LEVEL on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_LEVEL[32] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_LEVEL[33] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_LEVEL[34] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_LEVEL[35] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_LEVEL[36] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_LEVEL[37] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_LEVEL[38] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_LEVEL[39] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_LEVEL[3] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_LEVEL[40] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_LEVEL[41] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_LEVEL[42] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_LEVEL[43] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_LEVEL[44] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_LEVEL[45] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_LEVEL[46] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_LEVEL[47] + description: TCC_EA0_WRREQ_LEVEL on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_LEVEL[48] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_LEVEL[49] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_LEVEL[4] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_LEVEL[50] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_LEVEL[51] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_LEVEL[52] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_LEVEL[53] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_LEVEL[54] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_LEVEL[55] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_LEVEL[56] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_LEVEL[57] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_LEVEL[58] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_LEVEL[59] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_LEVEL[5] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_LEVEL[60] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_LEVEL[61] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_LEVEL[62] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_LEVEL[63] + description: TCC_EA0_WRREQ_LEVEL on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_LEVEL[64] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_LEVEL[65] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_LEVEL[66] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_LEVEL[67] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_LEVEL[68] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_LEVEL[69] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_LEVEL[6] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_LEVEL[70] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_LEVEL[71] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_LEVEL[72] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_LEVEL[73] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_LEVEL[74] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_LEVEL[75] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_LEVEL[76] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_LEVEL[77] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_LEVEL[78] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_LEVEL[79] + description: TCC_EA0_WRREQ_LEVEL on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_LEVEL[7] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_LEVEL[80] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_LEVEL[81] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_LEVEL[82] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_LEVEL[83] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_LEVEL[84] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_EA0_WRREQ_LEVEL[85] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_EA0_WRREQ_LEVEL[86] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_EA0_WRREQ_LEVEL[87] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_EA0_WRREQ_LEVEL[88] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_LEVEL[89] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_EA0_WRREQ_LEVEL[8] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_EA0_WRREQ_LEVEL[90] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_EA0_WRREQ_LEVEL[91] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_EA0_WRREQ_LEVEL[92] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_EA0_WRREQ_LEVEL[93] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_EA0_WRREQ_LEVEL[94] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_EA0_WRREQ_LEVEL[95] + description: TCC_EA0_WRREQ_LEVEL on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_EA0_WRREQ_LEVEL[96] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_EA0_WRREQ_LEVEL[97] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_EA0_WRREQ_LEVEL[98] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_EA0_WRREQ_LEVEL[99] + description: TCC_EA0_WRREQ_LEVEL on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_EA0_WRREQ_LEVEL[9] + description: TCC_EA0_WRREQ_LEVEL on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_EA0_WRREQ_LEVEL,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_5.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_5.txt new file mode 100644 index 0000000000..e6ea937e3d --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_5.txt @@ -0,0 +1,5 @@ +pmc: SQ_LDS_MEM_VIOLATIONS SQ_LDS_UNALIGNED_STALL SQ_THREAD_CYCLES_VALU SQ_VALU_MFMA_BUSY_CYCLES SQ_VMEM_TA_ADDR_FIFO_FULL SQ_VMEM_TA_CMD_FIFO_FULL SQ_VMEM_WR_TA_DATA_FIFO_FULL SQ_WAIT_ANY TCP_UTCL1_STALL_LFIFO_NO_RES_sum TCP_UTCL1_STALL_MULTI_MISS_sum TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS_sum TCP_UTCL1_THRASHING_STALL_sum TCC_EA0_WRREQ_WRITE_DRAM_32B_sum TCC_EA0_WRREQ_WRITE_DRAM_sum TCC_EA0_WRREQ_WRITE_GMI_32B_sum TCC_EA0_WRREQ_WRITE_IO_32B_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_6.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_6.txt new file mode 100644 index 0000000000..d904a2b514 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_6.txt @@ -0,0 +1,5 @@ +pmc: SQ_WAIT_INST_ANY SQ_WAVES SQ_WAVES_RESTORED SQ_WAVES_SAVED SQ_WAVE_CYCLES TCP_UTCL1_TRANSLATION_HIT_sum TCP_UTCL1_TRANSLATION_MISS_UNDER_MISS_sum TCP_UTCL1_TRANSLATION_MISS_sum TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum TCC_EA0_WRREQ_sum TCC_EA0_WR_UNCACHED_32B_sum TCC_HIT[0] TCC_HIT[100] TCC_HIT[101] TCC_HIT[102] TCC_HIT[103] TCC_HIT[104] TCC_HIT[105] TCC_HIT[106] TCC_HIT[107] TCC_HIT[108] TCC_HIT[109] TCC_HIT[10] TCC_HIT[110] TCC_HIT[111] TCC_HIT[112] TCC_HIT[113] TCC_HIT[114] TCC_HIT[115] TCC_HIT[116] TCC_HIT[117] TCC_HIT[118] TCC_HIT[119] TCC_HIT[11] TCC_HIT[120] TCC_HIT[121] TCC_HIT[122] TCC_HIT[123] TCC_HIT[124] TCC_HIT[125] TCC_HIT[126] TCC_HIT[127] TCC_HIT[12] TCC_HIT[13] TCC_HIT[14] TCC_HIT[15] TCC_HIT[16] TCC_HIT[17] TCC_HIT[18] TCC_HIT[19] TCC_HIT[1] TCC_HIT[20] TCC_HIT[21] TCC_HIT[22] TCC_HIT[23] TCC_HIT[24] TCC_HIT[25] TCC_HIT[26] TCC_HIT[27] TCC_HIT[28] TCC_HIT[29] TCC_HIT[2] TCC_HIT[30] TCC_HIT[31] TCC_HIT[32] TCC_HIT[33] TCC_HIT[34] TCC_HIT[35] TCC_HIT[36] TCC_HIT[37] TCC_HIT[38] TCC_HIT[39] TCC_HIT[3] TCC_HIT[40] TCC_HIT[41] TCC_HIT[42] TCC_HIT[43] TCC_HIT[44] TCC_HIT[45] TCC_HIT[46] TCC_HIT[47] TCC_HIT[48] TCC_HIT[49] TCC_HIT[4] TCC_HIT[50] TCC_HIT[51] TCC_HIT[52] TCC_HIT[53] TCC_HIT[54] TCC_HIT[55] TCC_HIT[56] TCC_HIT[57] TCC_HIT[58] TCC_HIT[59] TCC_HIT[5] TCC_HIT[60] TCC_HIT[61] TCC_HIT[62] TCC_HIT[63] TCC_HIT[64] TCC_HIT[65] TCC_HIT[66] TCC_HIT[67] TCC_HIT[68] TCC_HIT[69] TCC_HIT[6] TCC_HIT[70] TCC_HIT[71] TCC_HIT[72] TCC_HIT[73] TCC_HIT[74] TCC_HIT[75] TCC_HIT[76] TCC_HIT[77] TCC_HIT[78] TCC_HIT[79] TCC_HIT[7] TCC_HIT[80] TCC_HIT[81] TCC_HIT[82] TCC_HIT[83] TCC_HIT[84] TCC_HIT[85] TCC_HIT[86] TCC_HIT[87] TCC_HIT[88] TCC_HIT[89] TCC_HIT[8] TCC_HIT[90] TCC_HIT[91] TCC_HIT[92] TCC_HIT[93] TCC_HIT[94] TCC_HIT[95] TCC_HIT[96] TCC_HIT[97] TCC_HIT[98] TCC_HIT[99] TCC_HIT[9] TCC_HIT_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_6.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_6.yaml new file mode 100644 index 0000000000..d6ee5bbe4c --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_6.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_HIT[0] + description: TCC_HIT on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_HIT[100] + description: TCC_HIT on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_HIT[101] + description: TCC_HIT on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_HIT[102] + description: TCC_HIT on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_HIT[103] + description: TCC_HIT on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_HIT[104] + description: TCC_HIT on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_HIT[105] + description: TCC_HIT on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_HIT[106] + description: TCC_HIT on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_HIT[107] + description: TCC_HIT on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_HIT[108] + description: TCC_HIT on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_HIT[109] + description: TCC_HIT on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_HIT[10] + description: TCC_HIT on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_HIT[110] + description: TCC_HIT on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_HIT[111] + description: TCC_HIT on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_HIT[112] + description: TCC_HIT on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_HIT[113] + description: TCC_HIT on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_HIT[114] + description: TCC_HIT on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_HIT[115] + description: TCC_HIT on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_HIT[116] + description: TCC_HIT on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_HIT[117] + description: TCC_HIT on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_HIT[118] + description: TCC_HIT on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_HIT[119] + description: TCC_HIT on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_HIT[11] + description: TCC_HIT on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_HIT[120] + description: TCC_HIT on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_HIT[121] + description: TCC_HIT on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_HIT[122] + description: TCC_HIT on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_HIT[123] + description: TCC_HIT on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_HIT[124] + description: TCC_HIT on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_HIT[125] + description: TCC_HIT on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_HIT[126] + description: TCC_HIT on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_HIT[127] + description: TCC_HIT on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_HIT[12] + description: TCC_HIT on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_HIT[13] + description: TCC_HIT on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_HIT[14] + description: TCC_HIT on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_HIT[15] + description: TCC_HIT on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_HIT[16] + description: TCC_HIT on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_HIT[17] + description: TCC_HIT on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_HIT[18] + description: TCC_HIT on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_HIT[19] + description: TCC_HIT on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_HIT[1] + description: TCC_HIT on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_HIT[20] + description: TCC_HIT on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_HIT[21] + description: TCC_HIT on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_HIT[22] + description: TCC_HIT on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_HIT[23] + description: TCC_HIT on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_HIT[24] + description: TCC_HIT on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_HIT[25] + description: TCC_HIT on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_HIT[26] + description: TCC_HIT on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_HIT[27] + description: TCC_HIT on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_HIT[28] + description: TCC_HIT on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_HIT[29] + description: TCC_HIT on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_HIT[2] + description: TCC_HIT on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_HIT[30] + description: TCC_HIT on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_HIT[31] + description: TCC_HIT on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_HIT[32] + description: TCC_HIT on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_HIT[33] + description: TCC_HIT on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_HIT[34] + description: TCC_HIT on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_HIT[35] + description: TCC_HIT on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_HIT[36] + description: TCC_HIT on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_HIT[37] + description: TCC_HIT on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_HIT[38] + description: TCC_HIT on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_HIT[39] + description: TCC_HIT on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_HIT[3] + description: TCC_HIT on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_HIT[40] + description: TCC_HIT on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_HIT[41] + description: TCC_HIT on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_HIT[42] + description: TCC_HIT on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_HIT[43] + description: TCC_HIT on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_HIT[44] + description: TCC_HIT on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_HIT[45] + description: TCC_HIT on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_HIT[46] + description: TCC_HIT on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_HIT[47] + description: TCC_HIT on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_HIT[48] + description: TCC_HIT on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_HIT[49] + description: TCC_HIT on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_HIT[4] + description: TCC_HIT on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_HIT[50] + description: TCC_HIT on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_HIT[51] + description: TCC_HIT on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_HIT[52] + description: TCC_HIT on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_HIT[53] + description: TCC_HIT on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_HIT[54] + description: TCC_HIT on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_HIT[55] + description: TCC_HIT on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_HIT[56] + description: TCC_HIT on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_HIT[57] + description: TCC_HIT on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_HIT[58] + description: TCC_HIT on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_HIT[59] + description: TCC_HIT on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_HIT[5] + description: TCC_HIT on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_HIT[60] + description: TCC_HIT on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_HIT[61] + description: TCC_HIT on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_HIT[62] + description: TCC_HIT on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_HIT[63] + description: TCC_HIT on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_HIT[64] + description: TCC_HIT on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_HIT[65] + description: TCC_HIT on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_HIT[66] + description: TCC_HIT on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_HIT[67] + description: TCC_HIT on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_HIT[68] + description: TCC_HIT on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_HIT[69] + description: TCC_HIT on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_HIT[6] + description: TCC_HIT on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_HIT[70] + description: TCC_HIT on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_HIT[71] + description: TCC_HIT on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_HIT[72] + description: TCC_HIT on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_HIT[73] + description: TCC_HIT on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_HIT[74] + description: TCC_HIT on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_HIT[75] + description: TCC_HIT on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_HIT[76] + description: TCC_HIT on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_HIT[77] + description: TCC_HIT on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_HIT[78] + description: TCC_HIT on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_HIT[79] + description: TCC_HIT on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_HIT[7] + description: TCC_HIT on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_HIT[80] + description: TCC_HIT on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_HIT[81] + description: TCC_HIT on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_HIT[82] + description: TCC_HIT on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_HIT[83] + description: TCC_HIT on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_HIT[84] + description: TCC_HIT on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_HIT[85] + description: TCC_HIT on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_HIT[86] + description: TCC_HIT on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_HIT[87] + description: TCC_HIT on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_HIT[88] + description: TCC_HIT on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_HIT[89] + description: TCC_HIT on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_HIT[8] + description: TCC_HIT on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_HIT[90] + description: TCC_HIT on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_HIT[91] + description: TCC_HIT on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_HIT[92] + description: TCC_HIT on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_HIT[93] + description: TCC_HIT on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_HIT[94] + description: TCC_HIT on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_HIT[95] + description: TCC_HIT on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_HIT[96] + description: TCC_HIT on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_HIT[97] + description: TCC_HIT on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_HIT[98] + description: TCC_HIT on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_HIT[99] + description: TCC_HIT on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_HIT[9] + description: TCC_HIT on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_HIT,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_7.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_7.txt new file mode 100644 index 0000000000..677c5dbee1 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_7.txt @@ -0,0 +1,5 @@ +pmc: TCC_IB_REQ_sum TCC_IB_STALL_sum TCC_LATENCY_FIFO_FULL_sum TCC_MISS[0] TCC_MISS[100] TCC_MISS[101] TCC_MISS[102] TCC_MISS[103] TCC_MISS[104] TCC_MISS[105] TCC_MISS[106] TCC_MISS[107] TCC_MISS[108] TCC_MISS[109] TCC_MISS[10] TCC_MISS[110] TCC_MISS[111] TCC_MISS[112] TCC_MISS[113] TCC_MISS[114] TCC_MISS[115] TCC_MISS[116] TCC_MISS[117] TCC_MISS[118] TCC_MISS[119] TCC_MISS[11] TCC_MISS[120] TCC_MISS[121] TCC_MISS[122] TCC_MISS[123] TCC_MISS[124] TCC_MISS[125] TCC_MISS[126] TCC_MISS[127] TCC_MISS[12] TCC_MISS[13] TCC_MISS[14] TCC_MISS[15] TCC_MISS[16] TCC_MISS[17] TCC_MISS[18] TCC_MISS[19] TCC_MISS[1] TCC_MISS[20] TCC_MISS[21] TCC_MISS[22] TCC_MISS[23] TCC_MISS[24] TCC_MISS[25] TCC_MISS[26] TCC_MISS[27] TCC_MISS[28] TCC_MISS[29] TCC_MISS[2] TCC_MISS[30] TCC_MISS[31] TCC_MISS[32] TCC_MISS[33] TCC_MISS[34] TCC_MISS[35] TCC_MISS[36] TCC_MISS[37] TCC_MISS[38] TCC_MISS[39] TCC_MISS[3] TCC_MISS[40] TCC_MISS[41] TCC_MISS[42] TCC_MISS[43] TCC_MISS[44] TCC_MISS[45] TCC_MISS[46] TCC_MISS[47] TCC_MISS[48] TCC_MISS[49] TCC_MISS[4] TCC_MISS[50] TCC_MISS[51] TCC_MISS[52] TCC_MISS[53] TCC_MISS[54] TCC_MISS[55] TCC_MISS[56] TCC_MISS[57] TCC_MISS[58] TCC_MISS[59] TCC_MISS[5] TCC_MISS[60] TCC_MISS[61] TCC_MISS[62] TCC_MISS[63] TCC_MISS[64] TCC_MISS[65] TCC_MISS[66] TCC_MISS[67] TCC_MISS[68] TCC_MISS[69] TCC_MISS[6] TCC_MISS[70] TCC_MISS[71] TCC_MISS[72] TCC_MISS[73] TCC_MISS[74] TCC_MISS[75] TCC_MISS[76] TCC_MISS[77] TCC_MISS[78] TCC_MISS[79] TCC_MISS[7] TCC_MISS[80] TCC_MISS[81] TCC_MISS[82] TCC_MISS[83] TCC_MISS[84] TCC_MISS[85] TCC_MISS[86] TCC_MISS[87] TCC_MISS[88] TCC_MISS[89] TCC_MISS[8] TCC_MISS[90] TCC_MISS[91] TCC_MISS[92] TCC_MISS[93] TCC_MISS[94] TCC_MISS[95] TCC_MISS[96] TCC_MISS[97] TCC_MISS[98] TCC_MISS[99] TCC_MISS[9] + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_7.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_7.yaml new file mode 100644 index 0000000000..0214037162 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_7.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_MISS[0] + description: TCC_MISS on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_MISS[100] + description: TCC_MISS on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_MISS[101] + description: TCC_MISS on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_MISS[102] + description: TCC_MISS on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_MISS[103] + description: TCC_MISS on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_MISS[104] + description: TCC_MISS on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_MISS[105] + description: TCC_MISS on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_MISS[106] + description: TCC_MISS on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_MISS[107] + description: TCC_MISS on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_MISS[108] + description: TCC_MISS on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_MISS[109] + description: TCC_MISS on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_MISS[10] + description: TCC_MISS on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_MISS[110] + description: TCC_MISS on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_MISS[111] + description: TCC_MISS on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_MISS[112] + description: TCC_MISS on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_MISS[113] + description: TCC_MISS on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_MISS[114] + description: TCC_MISS on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_MISS[115] + description: TCC_MISS on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_MISS[116] + description: TCC_MISS on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_MISS[117] + description: TCC_MISS on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_MISS[118] + description: TCC_MISS on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_MISS[119] + description: TCC_MISS on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_MISS[11] + description: TCC_MISS on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_MISS[120] + description: TCC_MISS on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_MISS[121] + description: TCC_MISS on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_MISS[122] + description: TCC_MISS on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_MISS[123] + description: TCC_MISS on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_MISS[124] + description: TCC_MISS on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_MISS[125] + description: TCC_MISS on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_MISS[126] + description: TCC_MISS on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_MISS[127] + description: TCC_MISS on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_MISS[12] + description: TCC_MISS on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_MISS[13] + description: TCC_MISS on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_MISS[14] + description: TCC_MISS on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_MISS[15] + description: TCC_MISS on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_MISS[16] + description: TCC_MISS on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_MISS[17] + description: TCC_MISS on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_MISS[18] + description: TCC_MISS on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_MISS[19] + description: TCC_MISS on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_MISS[1] + description: TCC_MISS on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_MISS[20] + description: TCC_MISS on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_MISS[21] + description: TCC_MISS on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_MISS[22] + description: TCC_MISS on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_MISS[23] + description: TCC_MISS on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_MISS[24] + description: TCC_MISS on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_MISS[25] + description: TCC_MISS on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_MISS[26] + description: TCC_MISS on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_MISS[27] + description: TCC_MISS on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_MISS[28] + description: TCC_MISS on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_MISS[29] + description: TCC_MISS on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_MISS[2] + description: TCC_MISS on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_MISS[30] + description: TCC_MISS on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_MISS[31] + description: TCC_MISS on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_MISS[32] + description: TCC_MISS on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_MISS[33] + description: TCC_MISS on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_MISS[34] + description: TCC_MISS on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_MISS[35] + description: TCC_MISS on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_MISS[36] + description: TCC_MISS on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_MISS[37] + description: TCC_MISS on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_MISS[38] + description: TCC_MISS on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_MISS[39] + description: TCC_MISS on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_MISS[3] + description: TCC_MISS on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_MISS[40] + description: TCC_MISS on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_MISS[41] + description: TCC_MISS on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_MISS[42] + description: TCC_MISS on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_MISS[43] + description: TCC_MISS on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_MISS[44] + description: TCC_MISS on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_MISS[45] + description: TCC_MISS on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_MISS[46] + description: TCC_MISS on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_MISS[47] + description: TCC_MISS on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_MISS[48] + description: TCC_MISS on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_MISS[49] + description: TCC_MISS on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_MISS[4] + description: TCC_MISS on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_MISS[50] + description: TCC_MISS on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_MISS[51] + description: TCC_MISS on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_MISS[52] + description: TCC_MISS on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_MISS[53] + description: TCC_MISS on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_MISS[54] + description: TCC_MISS on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_MISS[55] + description: TCC_MISS on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_MISS[56] + description: TCC_MISS on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_MISS[57] + description: TCC_MISS on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_MISS[58] + description: TCC_MISS on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_MISS[59] + description: TCC_MISS on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_MISS[5] + description: TCC_MISS on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_MISS[60] + description: TCC_MISS on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_MISS[61] + description: TCC_MISS on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_MISS[62] + description: TCC_MISS on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_MISS[63] + description: TCC_MISS on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_MISS[64] + description: TCC_MISS on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_MISS[65] + description: TCC_MISS on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_MISS[66] + description: TCC_MISS on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_MISS[67] + description: TCC_MISS on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_MISS[68] + description: TCC_MISS on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_MISS[69] + description: TCC_MISS on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_MISS[6] + description: TCC_MISS on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_MISS[70] + description: TCC_MISS on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_MISS[71] + description: TCC_MISS on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_MISS[72] + description: TCC_MISS on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_MISS[73] + description: TCC_MISS on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_MISS[74] + description: TCC_MISS on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_MISS[75] + description: TCC_MISS on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_MISS[76] + description: TCC_MISS on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_MISS[77] + description: TCC_MISS on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_MISS[78] + description: TCC_MISS on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_MISS[79] + description: TCC_MISS on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_MISS[7] + description: TCC_MISS on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_MISS[80] + description: TCC_MISS on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_MISS[81] + description: TCC_MISS on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_MISS[82] + description: TCC_MISS on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_MISS[83] + description: TCC_MISS on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_MISS[84] + description: TCC_MISS on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_MISS[85] + description: TCC_MISS on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_MISS[86] + description: TCC_MISS on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_MISS[87] + description: TCC_MISS on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_MISS[88] + description: TCC_MISS on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_MISS[89] + description: TCC_MISS on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_MISS[8] + description: TCC_MISS on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_MISS[90] + description: TCC_MISS on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_MISS[91] + description: TCC_MISS on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_MISS[92] + description: TCC_MISS on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_MISS[93] + description: TCC_MISS on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_MISS[94] + description: TCC_MISS on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_MISS[95] + description: TCC_MISS on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_MISS[96] + description: TCC_MISS on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_MISS[97] + description: TCC_MISS on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_MISS[98] + description: TCC_MISS on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_MISS[99] + description: TCC_MISS on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_MISS[9] + description: TCC_MISS on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_MISS,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_8.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_8.txt new file mode 100644 index 0000000000..bef110ceb6 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_8.txt @@ -0,0 +1,5 @@ +pmc: TCC_MISS_sum TCC_NC_REQ_sum TCC_NORMAL_EVICT_sum TCC_NORMAL_WRITEBACK_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_9.txt b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_9.txt new file mode 100644 index 0000000000..9bc7c2bdc5 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_9.txt @@ -0,0 +1,5 @@ +pmc: TCC_PROBE_sum TCC_READ[0] TCC_READ[100] TCC_READ[101] TCC_READ[102] TCC_READ[103] TCC_READ[104] TCC_READ[105] TCC_READ[106] TCC_READ[107] TCC_READ[108] TCC_READ[109] TCC_READ[10] TCC_READ[110] TCC_READ[111] TCC_READ[112] TCC_READ[113] TCC_READ[114] TCC_READ[115] TCC_READ[116] TCC_READ[117] TCC_READ[118] TCC_READ[119] TCC_READ[11] TCC_READ[120] TCC_READ[121] TCC_READ[122] TCC_READ[123] TCC_READ[124] TCC_READ[125] TCC_READ[126] TCC_READ[127] TCC_READ[12] TCC_READ[13] TCC_READ[14] TCC_READ[15] TCC_READ[16] TCC_READ[17] TCC_READ[18] TCC_READ[19] TCC_READ[1] TCC_READ[20] TCC_READ[21] TCC_READ[22] TCC_READ[23] TCC_READ[24] TCC_READ[25] TCC_READ[26] TCC_READ[27] TCC_READ[28] TCC_READ[29] TCC_READ[2] TCC_READ[30] TCC_READ[31] TCC_READ[32] TCC_READ[33] TCC_READ[34] TCC_READ[35] TCC_READ[36] TCC_READ[37] TCC_READ[38] TCC_READ[39] TCC_READ[3] TCC_READ[40] TCC_READ[41] TCC_READ[42] TCC_READ[43] TCC_READ[44] TCC_READ[45] TCC_READ[46] TCC_READ[47] TCC_READ[48] TCC_READ[49] TCC_READ[4] TCC_READ[50] TCC_READ[51] TCC_READ[52] TCC_READ[53] TCC_READ[54] TCC_READ[55] TCC_READ[56] TCC_READ[57] TCC_READ[58] TCC_READ[59] TCC_READ[5] TCC_READ[60] TCC_READ[61] TCC_READ[62] TCC_READ[63] TCC_READ[64] TCC_READ[65] TCC_READ[66] TCC_READ[67] TCC_READ[68] TCC_READ[69] TCC_READ[6] TCC_READ[70] TCC_READ[71] TCC_READ[72] TCC_READ[73] TCC_READ[74] TCC_READ[75] TCC_READ[76] TCC_READ[77] TCC_READ[78] TCC_READ[79] TCC_READ[7] TCC_READ[80] TCC_READ[81] TCC_READ[82] TCC_READ[83] TCC_READ[84] TCC_READ[85] TCC_READ[86] TCC_READ[87] TCC_READ[88] TCC_READ[89] TCC_READ[8] TCC_READ[90] TCC_READ[91] TCC_READ[92] TCC_READ[93] TCC_READ[94] TCC_READ[95] TCC_READ[96] TCC_READ[97] TCC_READ[98] TCC_READ[99] TCC_READ[9] TCC_READ_SECTORS_sum TCC_READ_sum + +gpu: +range: +kernel: diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_9.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_9.yaml new file mode 100644 index 0000000000..8694da2570 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/perfmon/pmc_perf_9.yaml @@ -0,0 +1,899 @@ +rocprofiler-sdk: + counters-schema-version: 1 + counters: + - name: TCC_READ[0] + description: TCC_READ on 0th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[0]]) + - name: TCC_READ[100] + description: TCC_READ on 6th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[4]]) + - name: TCC_READ[101] + description: TCC_READ on 6th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[5]]) + - name: TCC_READ[102] + description: TCC_READ on 6th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[6]]) + - name: TCC_READ[103] + description: TCC_READ on 6th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[7]]) + - name: TCC_READ[104] + description: TCC_READ on 6th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[8]]) + - name: TCC_READ[105] + description: TCC_READ on 6th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[9]]) + - name: TCC_READ[106] + description: TCC_READ on 6th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[10]]) + - name: TCC_READ[107] + description: TCC_READ on 6th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[11]]) + - name: TCC_READ[108] + description: TCC_READ on 6th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[12]]) + - name: TCC_READ[109] + description: TCC_READ on 6th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[13]]) + - name: TCC_READ[10] + description: TCC_READ on 0th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[10]]) + - name: TCC_READ[110] + description: TCC_READ on 6th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[14]]) + - name: TCC_READ[111] + description: TCC_READ on 6th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[15]]) + - name: TCC_READ[112] + description: TCC_READ on 7th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[0]]) + - name: TCC_READ[113] + description: TCC_READ on 7th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[1]]) + - name: TCC_READ[114] + description: TCC_READ on 7th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[2]]) + - name: TCC_READ[115] + description: TCC_READ on 7th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[3]]) + - name: TCC_READ[116] + description: TCC_READ on 7th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[4]]) + - name: TCC_READ[117] + description: TCC_READ on 7th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[5]]) + - name: TCC_READ[118] + description: TCC_READ on 7th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[6]]) + - name: TCC_READ[119] + description: TCC_READ on 7th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[7]]) + - name: TCC_READ[11] + description: TCC_READ on 0th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[11]]) + - name: TCC_READ[120] + description: TCC_READ on 7th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[8]]) + - name: TCC_READ[121] + description: TCC_READ on 7th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[9]]) + - name: TCC_READ[122] + description: TCC_READ on 7th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[10]]) + - name: TCC_READ[123] + description: TCC_READ on 7th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[11]]) + - name: TCC_READ[124] + description: TCC_READ on 7th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[12]]) + - name: TCC_READ[125] + description: TCC_READ on 7th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[13]]) + - name: TCC_READ[126] + description: TCC_READ on 7th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[14]]) + - name: TCC_READ[127] + description: TCC_READ on 7th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[7], DIMENSION_INSTANCE=[15]]) + - name: TCC_READ[12] + description: TCC_READ on 0th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[12]]) + - name: TCC_READ[13] + description: TCC_READ on 0th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[13]]) + - name: TCC_READ[14] + description: TCC_READ on 0th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[14]]) + - name: TCC_READ[15] + description: TCC_READ on 0th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[15]]) + - name: TCC_READ[16] + description: TCC_READ on 1th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[0]]) + - name: TCC_READ[17] + description: TCC_READ on 1th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[1]]) + - name: TCC_READ[18] + description: TCC_READ on 1th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[2]]) + - name: TCC_READ[19] + description: TCC_READ on 1th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[3]]) + - name: TCC_READ[1] + description: TCC_READ on 0th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[1]]) + - name: TCC_READ[20] + description: TCC_READ on 1th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[4]]) + - name: TCC_READ[21] + description: TCC_READ on 1th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[5]]) + - name: TCC_READ[22] + description: TCC_READ on 1th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[6]]) + - name: TCC_READ[23] + description: TCC_READ on 1th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[7]]) + - name: TCC_READ[24] + description: TCC_READ on 1th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[8]]) + - name: TCC_READ[25] + description: TCC_READ on 1th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[9]]) + - name: TCC_READ[26] + description: TCC_READ on 1th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[10]]) + - name: TCC_READ[27] + description: TCC_READ on 1th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[11]]) + - name: TCC_READ[28] + description: TCC_READ on 1th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[12]]) + - name: TCC_READ[29] + description: TCC_READ on 1th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[13]]) + - name: TCC_READ[2] + description: TCC_READ on 0th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[2]]) + - name: TCC_READ[30] + description: TCC_READ on 1th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[14]]) + - name: TCC_READ[31] + description: TCC_READ on 1th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[1], DIMENSION_INSTANCE=[15]]) + - name: TCC_READ[32] + description: TCC_READ on 2th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[0]]) + - name: TCC_READ[33] + description: TCC_READ on 2th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[1]]) + - name: TCC_READ[34] + description: TCC_READ on 2th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[2]]) + - name: TCC_READ[35] + description: TCC_READ on 2th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[3]]) + - name: TCC_READ[36] + description: TCC_READ on 2th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[4]]) + - name: TCC_READ[37] + description: TCC_READ on 2th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[5]]) + - name: TCC_READ[38] + description: TCC_READ on 2th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[6]]) + - name: TCC_READ[39] + description: TCC_READ on 2th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[7]]) + - name: TCC_READ[3] + description: TCC_READ on 0th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[3]]) + - name: TCC_READ[40] + description: TCC_READ on 2th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[8]]) + - name: TCC_READ[41] + description: TCC_READ on 2th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[9]]) + - name: TCC_READ[42] + description: TCC_READ on 2th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[10]]) + - name: TCC_READ[43] + description: TCC_READ on 2th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[11]]) + - name: TCC_READ[44] + description: TCC_READ on 2th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[12]]) + - name: TCC_READ[45] + description: TCC_READ on 2th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[13]]) + - name: TCC_READ[46] + description: TCC_READ on 2th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[14]]) + - name: TCC_READ[47] + description: TCC_READ on 2th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[2], DIMENSION_INSTANCE=[15]]) + - name: TCC_READ[48] + description: TCC_READ on 3th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[0]]) + - name: TCC_READ[49] + description: TCC_READ on 3th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[1]]) + - name: TCC_READ[4] + description: TCC_READ on 0th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[4]]) + - name: TCC_READ[50] + description: TCC_READ on 3th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[2]]) + - name: TCC_READ[51] + description: TCC_READ on 3th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[3]]) + - name: TCC_READ[52] + description: TCC_READ on 3th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[4]]) + - name: TCC_READ[53] + description: TCC_READ on 3th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[5]]) + - name: TCC_READ[54] + description: TCC_READ on 3th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[6]]) + - name: TCC_READ[55] + description: TCC_READ on 3th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[7]]) + - name: TCC_READ[56] + description: TCC_READ on 3th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[8]]) + - name: TCC_READ[57] + description: TCC_READ on 3th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[9]]) + - name: TCC_READ[58] + description: TCC_READ on 3th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[10]]) + - name: TCC_READ[59] + description: TCC_READ on 3th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[11]]) + - name: TCC_READ[5] + description: TCC_READ on 0th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[5]]) + - name: TCC_READ[60] + description: TCC_READ on 3th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[12]]) + - name: TCC_READ[61] + description: TCC_READ on 3th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[13]]) + - name: TCC_READ[62] + description: TCC_READ on 3th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[14]]) + - name: TCC_READ[63] + description: TCC_READ on 3th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[3], DIMENSION_INSTANCE=[15]]) + - name: TCC_READ[64] + description: TCC_READ on 4th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[0]]) + - name: TCC_READ[65] + description: TCC_READ on 4th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[1]]) + - name: TCC_READ[66] + description: TCC_READ on 4th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[2]]) + - name: TCC_READ[67] + description: TCC_READ on 4th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[3]]) + - name: TCC_READ[68] + description: TCC_READ on 4th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[4]]) + - name: TCC_READ[69] + description: TCC_READ on 4th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[5]]) + - name: TCC_READ[6] + description: TCC_READ on 0th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[6]]) + - name: TCC_READ[70] + description: TCC_READ on 4th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[6]]) + - name: TCC_READ[71] + description: TCC_READ on 4th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[7]]) + - name: TCC_READ[72] + description: TCC_READ on 4th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[8]]) + - name: TCC_READ[73] + description: TCC_READ on 4th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[9]]) + - name: TCC_READ[74] + description: TCC_READ on 4th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[10]]) + - name: TCC_READ[75] + description: TCC_READ on 4th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[11]]) + - name: TCC_READ[76] + description: TCC_READ on 4th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[12]]) + - name: TCC_READ[77] + description: TCC_READ on 4th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[13]]) + - name: TCC_READ[78] + description: TCC_READ on 4th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[14]]) + - name: TCC_READ[79] + description: TCC_READ on 4th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[4], DIMENSION_INSTANCE=[15]]) + - name: TCC_READ[7] + description: TCC_READ on 0th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[7]]) + - name: TCC_READ[80] + description: TCC_READ on 5th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[0]]) + - name: TCC_READ[81] + description: TCC_READ on 5th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[1]]) + - name: TCC_READ[82] + description: TCC_READ on 5th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[2]]) + - name: TCC_READ[83] + description: TCC_READ on 5th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[3]]) + - name: TCC_READ[84] + description: TCC_READ on 5th XCC and 4th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[4]]) + - name: TCC_READ[85] + description: TCC_READ on 5th XCC and 5th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[5]]) + - name: TCC_READ[86] + description: TCC_READ on 5th XCC and 6th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[6]]) + - name: TCC_READ[87] + description: TCC_READ on 5th XCC and 7th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[7]]) + - name: TCC_READ[88] + description: TCC_READ on 5th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[8]]) + - name: TCC_READ[89] + description: TCC_READ on 5th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[9]]) + - name: TCC_READ[8] + description: TCC_READ on 0th XCC and 8th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[8]]) + - name: TCC_READ[90] + description: TCC_READ on 5th XCC and 10th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[10]]) + - name: TCC_READ[91] + description: TCC_READ on 5th XCC and 11th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[11]]) + - name: TCC_READ[92] + description: TCC_READ on 5th XCC and 12th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[12]]) + - name: TCC_READ[93] + description: TCC_READ on 5th XCC and 13th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[13]]) + - name: TCC_READ[94] + description: TCC_READ on 5th XCC and 14th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[14]]) + - name: TCC_READ[95] + description: TCC_READ on 5th XCC and 15th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[5], DIMENSION_INSTANCE=[15]]) + - name: TCC_READ[96] + description: TCC_READ on 6th XCC and 0th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[0]]) + - name: TCC_READ[97] + description: TCC_READ on 6th XCC and 1th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[1]]) + - name: TCC_READ[98] + description: TCC_READ on 6th XCC and 2th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[2]]) + - name: TCC_READ[99] + description: TCC_READ on 6th XCC and 3th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[6], DIMENSION_INSTANCE=[3]]) + - name: TCC_READ[9] + description: TCC_READ on 0th XCC and 9th channel + properties: [] + definitions: + - architectures: + - gfx950 + expression: select(TCC_READ,[DIMENSION_XCC=[0], DIMENSION_INSTANCE=[9]]) diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/pmc_dispatch_info.csv b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/pmc_dispatch_info.csv new file mode 100644 index 0000000000..80705d3b6c --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/pmc_dispatch_info.csv @@ -0,0 +1,2 @@ +Kernel_Name,GPU_ID +"vecCopy(double*, double*, double*, int, int)",0 diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/pmc_perf.csv b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/pmc_perf.csv new file mode 100644 index 0000000000..a2369ac1c4 --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/pmc_perf.csv @@ -0,0 +1,2874 @@ +GPU_ID,Dispatch_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,Kernel_Name,Start_Timestamp,End_Timestamp,Kernel_ID,Counter_Name,Counter_Value +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,CPC_CANE_BUSY,6893.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,CPC_CANE_STALL,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,CPF_CMP_UTCL1_STALL_ON_TRANSLATION,8333.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,CPF_CPF_STAT_BUSY,270456.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,GRBM_COUNT,270456.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,GRBM_GUI_ACTIVE,270456.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SPI_CS0_BUSY,312768.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SPI_CS0_CRAWLER_STALL,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SPI_CS0_NUM_THREADGROUPS,4096.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SPI_CS0_WAVE,16384.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SPI_CS1_BUSY,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SPI_CS1_CRAWLER_STALL,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SQC_DCACHE_ATOMIC,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SQC_DCACHE_HITS,61041.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SQC_DCACHE_INFLIGHT_LEVEL,18444152.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SQC_DCACHE_INFLIGHT_LEVEL_ACCUM,18444152.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SQC_DCACHE_MISSES,145.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SQC_DCACHE_MISSES_DUPLICATE,4350.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SQC_DCACHE_REQ,65536.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,SQC_DCACHE_REQ_READ_1,32768.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TA_ADDR_STALLED_BY_TC_CYCLES_sum,200841.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TA_ADDR_STALLED_BY_TD_CYCLES_sum,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ALL_TC_OP_INV_EVICT_sum,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ALL_TC_OP_WB_WRITEBACK_sum,63224.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[0],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[100],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[101],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[102],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[103],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[104],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[105],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[106],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[107],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[108],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[109],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[10],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[110],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[111],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[112],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[113],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[114],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[115],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[116],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[117],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[118],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[119],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[11],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[120],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[121],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[122],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[123],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[124],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[125],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[126],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[127],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[12],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[13],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[14],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[15],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[16],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[17],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[18],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[19],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[1],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[20],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[21],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[22],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[23],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[24],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[25],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[26],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[27],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[28],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[29],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[2],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[30],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[31],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[32],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[33],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[34],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[35],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[36],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[37],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[38],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[39],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[3],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[40],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[41],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[42],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[43],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[44],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[45],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[46],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[47],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[48],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[49],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[4],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[50],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[51],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[52],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[53],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[54],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[55],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[56],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[57],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[58],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[59],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[5],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[60],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[61],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[62],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[63],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[64],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[65],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[66],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[67],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[68],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[69],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[6],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[70],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[71],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[72],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[73],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[74],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[75],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[76],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[77],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[78],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[79],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[7],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[80],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[81],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[82],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[83],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[84],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[85],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[86],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[87],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[88],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[89],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[8],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[90],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[91],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[92],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[93],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[94],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[95],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[96],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[97],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[98],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[99],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC[9],0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCC_ATOMIC_SECTORS_sum,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCP_CLIENT_UTCL1_INFLIGHT_sum,23837100.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCP_GATE_EN1_sum,2871970.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TCP_GATE_EN2_sum,1397350.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TD_ATOMIC_WAVEFRONT_sum,0.0 +2,1,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964266001,619129964274121,12,TD_COALESCABLE_WAVEFRONT_sum,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,CPC_CPC_STAT_BUSY,192793.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,CPC_CPC_STAT_IDLE,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,CPF_CPF_STAT_IDLE,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,CPF_CPF_STAT_STALL,8133.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,GRBM_SPI_BUSY,58386.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SPI_CS1_NUM_THREADGROUPS,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SPI_CS1_WAVE,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SPI_CS2_BUSY,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SPI_CS2_CRAWLER_STALL,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SPI_CS2_NUM_THREADGROUPS,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SPI_CS2_WAVE,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SQC_DCACHE_REQ_READ_16,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SQC_DCACHE_REQ_READ_2,32768.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SQC_DCACHE_REQ_READ_4,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SQC_DCACHE_REQ_READ_8,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SQC_ICACHE_HITS,59829.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SQC_ICACHE_INFLIGHT_LEVEL,3249746.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SQC_ICACHE_INFLIGHT_LEVEL_ACCUM,3249746.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,SQC_ICACHE_MISSES,145.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TA_BUFFER_COALESCEABLE_WAVEFRONTS_sum,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_ATOMIC_sum,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[0],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[100],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[101],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[102],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[103],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[104],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[105],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[106],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[107],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[108],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[109],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[10],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[110],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[111],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[112],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[113],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[114],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[115],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[116],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[117],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[118],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[119],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[11],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[120],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[121],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[122],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[123],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[124],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[125],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[126],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[127],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[12],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[13],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[14],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[15],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[16],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[17],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[18],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[19],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[1],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[20],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[21],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[22],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[23],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[24],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[25],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[26],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[27],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[28],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[29],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[2],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[30],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[31],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[32],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[33],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[34],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[35],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[36],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[37],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[38],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[39],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[3],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[40],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[41],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[42],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[43],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[44],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[45],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[46],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[47],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[48],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[49],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[4],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[50],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[51],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[52],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[53],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[54],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[55],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[56],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[57],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[58],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[59],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[5],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[60],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[61],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[62],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[63],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[64],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[65],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[66],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[67],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[68],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[69],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[6],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[70],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[71],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[72],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[73],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[74],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[75],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[76],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[77],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[78],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[79],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[7],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[80],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[81],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[82],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[83],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[84],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[85],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[86],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[87],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[88],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[89],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[8],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[90],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[91],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[92],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[93],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[94],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[95],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[96],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[97],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[98],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[99],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE[9],0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUBBLE_sum,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCC_BUSY_sum,1036230.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCP_LFIFO_STALL_CYCLES_sum,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCP_PENDING_STALL_CYCLES_sum,585552.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TCP_RFIFO_STALL_CYCLES_sum,0.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TD_LOAD_WAVEFRONT_sum,32768.0 +2,2,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129964799444,619129964804044,12,TD_SPI_STALL_sum,171.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,CPC_CPC_STAT_STALL,51500.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,CPC_CPC_TCIU_BUSY,1092.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,CPF_CPF_TCIU_BUSY,21052.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,CPF_CPF_TCIU_IDLE,167133.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SPI_CS3_BUSY,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SPI_CS3_CRAWLER_STALL,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SPI_CS3_NUM_THREADGROUPS,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SPI_CS3_WAVE,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SPI_CSC_WAVE_CNT_BUSY,193776.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SPI_CSQ_P0_OCCUPANCY,38467390.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SQC_ICACHE_MISSES_DUPLICATE,5547.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SQC_ICACHE_REQ,65536.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SQC_TC_DATA_ATOMIC_REQ,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SQC_TC_DATA_READ_REQ,145.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SQC_TC_DATA_WRITE_REQ,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SQC_TC_INST_REQ,2610.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SQ_IFETCH_LEVEL,3824320.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,SQ_IFETCH_LEVEL_ACCUM,3824320.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TA_BUFFER_COALESCED_READ_CYCLES_sum,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_BYPASS_REQ_sum,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_CC_REQ_sum,0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[0],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[100],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[101],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[102],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[103],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[104],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[105],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[106],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[107],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[108],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[109],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[10],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[110],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[111],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[112],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[113],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[114],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[115],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[116],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[117],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[118],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[119],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[11],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[120],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[121],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[122],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[123],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[124],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[125],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[126],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[127],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[12],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[13],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[14],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[15],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[16],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[17],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[18],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[19],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[1],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[20],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[21],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[22],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[23],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[24],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[25],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[26],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[27],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[28],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[29],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[2],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[30],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[31],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[32],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[33],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[34],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[35],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[36],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[37],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[38],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[39],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[3],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[40],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[41],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[42],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[43],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[44],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[45],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[46],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[47],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[48],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[49],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[4],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[50],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[51],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[52],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[53],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[54],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[55],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[56],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[57],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[58],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[59],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[5],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[60],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[61],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[62],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[63],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[64],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[65],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[66],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[67],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[68],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[69],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[6],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[70],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[71],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[72],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[73],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[74],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[75],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[76],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[77],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[78],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[79],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[7],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[80],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[81],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[82],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[83],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[84],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[85],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[86],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[87],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[88],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[89],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[8],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[90],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[91],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[92],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[93],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[94],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[95],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[96],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[97],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[98],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[99],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC[9],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[0],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[100],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[101],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[102],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[103],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[104],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[105],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[106],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[107],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[108],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[109],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[10],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[110],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[111],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[112],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[113],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[114],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[115],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[116],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[117],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[118],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[119],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[11],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[120],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[121],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[122],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[123],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[124],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[125],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[126],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[127],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[12],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[13],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[14],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[15],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[16],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[17],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[18],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[19],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[1],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[20],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[21],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[22],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[23],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[24],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[25],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[26],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[27],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[28],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[29],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[2],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[30],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[31],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[32],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[33],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[34],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[35],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[36],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[37],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[38],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[39],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[3],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[40],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[41],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[42],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[43],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[44],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[45],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[46],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[47],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[48],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[49],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[4],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[50],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[51],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[52],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[53],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[54],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[55],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[56],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[57],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[58],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[59],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[5],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[60],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[61],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[62],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[63],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[64],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[65],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[66],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[67],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[68],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[69],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[6],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[70],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[71],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[72],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[73],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[74],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[75],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[76],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[77],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[78],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[79],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[7],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[80],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[81],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[82],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[83],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[84],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[85],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[86],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[87],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[88],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[89],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[8],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[90],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[91],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[92],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[93],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[94],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[95],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[96],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[97],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[98],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[99],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCC_EA0_ATOMIC_LEVEL[9],0.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCP_TAGRAM0_REQ_sum,55704.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCP_TAGRAM1_REQ_sum,42600.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCP_TAGRAM2_REQ_sum,55704.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TCP_TAGRAM3_REQ_sum,42600.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TD_STORE_WAVEFRONT_sum,16384.0 +2,3,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965313488,619129965318128,12,TD_TC_STALL_sum,677750.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,CPC_CPC_TCIU_IDLE,196339.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,CPC_CPC_UTCL2IU_BUSY,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,CPF_CPF_TCIU_STALL,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SPI_CSQ_P1_OCCUPANCY,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SPI_CSQ_P2_OCCUPANCY,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SPI_CSQ_P3_OCCUPANCY,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SPI_RA_BAR_CU_FULL_CSN,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SPI_RA_LDS_CU_FULL_CSN,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SPI_RA_REQ_NO_ALLOC,19876.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SQC_TC_STALL,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SQ_ACTIVE_INST_ANY,278528.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SQ_ACTIVE_INST_FLAT,32768.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SQ_ACTIVE_INST_LDS,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SQ_ACTIVE_INST_MISC,32768.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SQ_ACTIVE_INST_SCA,114688.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SQ_INST_LEVEL_LDS,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,SQ_INST_LEVEL_LDS_ACCUM,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TA_BUFFER_READ_LDS_WAVEFRONTS_sum,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TA_BUFFER_READ_WAVEFRONTS_sum,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_ATOMIC_LEVEL_sum,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_ATOMIC_sum,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[0],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[100],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[101],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[102],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[103],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[104],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[105],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[106],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[107],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[108],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[109],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[10],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[110],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[111],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[112],513.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[113],514.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[114],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[115],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[116],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[117],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[118],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[119],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[11],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[120],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[121],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[122],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[123],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[124],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[125],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[126],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[127],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[12],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[13],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[14],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[15],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[16],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[17],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[18],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[19],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[1],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[20],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[21],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[22],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[23],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[24],513.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[25],514.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[26],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[27],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[28],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[29],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[2],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[30],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[31],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[32],513.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[33],514.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[34],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[35],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[36],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[37],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[38],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[39],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[3],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[40],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[41],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[42],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[43],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[44],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[45],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[46],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[47],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[48],513.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[49],514.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[4],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[50],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[51],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[52],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[53],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[54],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[55],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[56],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[57],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[58],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[59],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[5],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[60],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[61],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[62],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[63],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[64],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[65],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[66],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[67],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[68],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[69],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[6],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[70],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[71],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[72],513.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[73],514.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[74],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[75],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[76],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[77],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[78],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[79],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[7],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[80],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[81],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[82],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[83],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[84],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[85],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[86],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[87],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[88],513.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[89],514.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[8],513.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[90],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[91],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[92],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[93],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[94],516.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[95],517.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[96],513.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[97],514.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[98],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[99],512.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ[9],514.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCC_EA0_RDREQ_128B_sum,65536.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCP_TA_TCP_STATE_READ_sum,32768.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TCP_TCC_CC_ATOMIC_REQ_sum,0.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TD_TD_BUSY_sum,1002640.0 +2,4,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129965829292,619129965833972,12,TD_WRITE_ACKT_WAVEFRONT_sum,16384.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,CPC_CPC_UTCL2IU_IDLE,193361.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,CPC_GD_BUSY,38837.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SPI_RA_REQ_NO_ALLOC_CSN,17440.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SPI_RA_RES_STALL_CSN,18768.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SPI_RA_SGPR_SIMD_FULL_CSN,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SPI_RA_TGLIM_CU_FULL_CSN,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SPI_RA_TMP_STALL_CSN,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SPI_RA_VGPR_SIMD_FULL_CSN,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SQ_ACTIVE_INST_VALU,98304.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SQ_ACTIVE_INST_VALU2,4000.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SQ_ACTIVE_INST_VMEM,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SQ_BUSY_CU_CYCLES,1425190.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SQ_BUSY_CYCLES,193214.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SQ_IFETCH,65536.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SQ_INST_LEVEL_SMEM,20366438.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,SQ_INST_LEVEL_SMEM_ACCUM,20366438.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TA_BUFFER_TOTAL_CYCLES_sum,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TA_BUFFER_WAVEFRONTS_sum,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_32B_sum,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_64B_sum,168.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_32B_sum,262480.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[0],308.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[100],18.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[101],23.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[102],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[103],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[104],286.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[105],288.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[106],218.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[107],281.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[108],161.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[109],143.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[10],265.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[110],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[111],286.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[112],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[113],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[114],169.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[115],187.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[116],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[117],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[118],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[119],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[11],219.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[120],243.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[121],240.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[122],109.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[123],250.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[124],75.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[125],35.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[126],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[127],159.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[12],8.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[13],9.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[14],14.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[15],18.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[16],264.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[17],266.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[18],191.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[19],266.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[1],308.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[20],126.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[21],109.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[22],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[23],187.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[24],7.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[25],10.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[26],313.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[27],311.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[28],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[29],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[2],310.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[30],29.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[31],35.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[32],8.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[33],8.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[34],256.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[35],266.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[36],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[37],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[38],30.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[39],38.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[3],308.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[40],279.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[41],281.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[42],216.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[43],291.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[44],167.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[45],141.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[46],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[47],284.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[48],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[49],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[4],258.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[50],317.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[51],312.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[52],26.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[53],36.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[54],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[55],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[56],296.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[57],297.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[58],140.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[59],282.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[5],247.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[60],40.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[61],11.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[62],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[63],251.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[64],288.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[65],305.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[66],230.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[67],294.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[68],68.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[69],98.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[6],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[70],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[71],303.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[72],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[73],4.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[74],277.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[75],288.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[76],4.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[77],4.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[78],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[79],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[7],310.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[80],264.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[81],266.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[82],157.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[83],275.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[84],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[85],1.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[86],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[87],165.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[88],24.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[89],20.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[8],62.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[90],312.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[91],310.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[92],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[93],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[94],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[95],0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[96],24.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[97],36.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[98],248.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[99],263.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL[9],75.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCP_TCC_CC_READ_REQ_sum,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCP_TCC_CC_WRITE_REQ_sum,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCP_TCC_NC_ATOMIC_REQ_sum,0.0 +2,5,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966317735,619129966322335,12,TCP_TCC_NC_READ_REQ_sum,0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,CPC_ME1_BUSY_FOR_PACKET_DECODE,130400.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,CPC_ME1_DC0_SPI_BUSY,38910.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SPI_RA_WAVE_SIMD_FULL_CSN,596428.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SPI_RA_WVLIM_STALL_CSN,0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SPI_SWC_CSC_WR,32768.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SPI_VWC0_VDATA_VALID_WR,32768.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SPI_VWC1_VDATA_VALID_WR,32768.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SQ_INSTS,327680.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SQ_INSTS_BRANCH,16384.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SQ_INSTS_GDS,0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SQ_INSTS_LDS,0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SQ_INSTS_LDS_ATOMIC,0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SQ_INSTS_LDS_ATOMIC_BANDWIDTH,0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SQ_INST_LEVEL_VMEM,25721446.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,SQ_INST_LEVEL_VMEM_ACCUM,25721446.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TA_BUFFER_WRITE_WAVEFRONTS_sum,0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TA_DATA_STALLED_BY_TC_CYCLES_sum,74933.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_DRAM_CREDIT_STALL_sum,18904.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_DRAM_sum,65704.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_32B_sum,0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[0],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[100],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[101],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[102],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[103],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[104],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[105],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[106],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[107],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[108],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[109],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[10],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[110],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[111],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[112],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[113],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[114],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[115],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[116],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[117],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[118],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[119],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[11],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[120],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[121],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[122],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[123],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[124],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[125],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[126],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[127],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[12],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[13],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[14],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[15],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[16],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[17],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[18],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[19],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[1],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[20],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[21],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[22],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[23],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[24],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[25],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[26],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[27],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[28],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[29],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[2],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[30],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[31],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[32],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[33],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[34],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[35],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[36],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[37],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[38],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[39],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[3],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[40],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[41],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[42],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[43],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[44],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[45],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[46],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[47],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[48],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[49],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[4],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[50],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[51],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[52],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[53],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[54],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[55],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[56],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[57],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[58],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[59],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[5],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[60],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[61],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[62],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[63],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[64],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[65],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[66],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[67],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[68],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[69],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[6],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[70],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[71],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[72],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[73],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[74],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[75],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[76],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[77],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[78],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[79],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[7],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[80],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[81],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[82],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[83],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[84],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[85],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[86],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[87],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[88],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[89],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[8],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[90],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[91],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[92],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[93],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[94],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[95],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[96],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[97],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[98],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[99],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL[9],0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCP_TCC_NC_WRITE_REQ_sum,0.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCP_TCC_READ_REQ_LATENCY_sum,41930600.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCP_TCC_READ_REQ_sum,65536.0 +2,6,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129966751819,619129966756499,12,TCP_TCC_RW_ATOMIC_REQ_sum,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,CPC_SYNC_FIFO_FULL,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,CPC_SYNC_WRREQ_FIFO_BUSY,16.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,SQ_INSTS_LDS_LOAD,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,SQ_INSTS_LDS_LOAD_BANDWIDTH,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,SQ_INSTS_LDS_STORE,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,SQ_INSTS_LDS_STORE_BANDWIDTH,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,SQ_INSTS_MFMA,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,SQ_INSTS_SALU,49152.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,SQ_LEVEL_WAVES,38285430.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,SQ_LEVEL_WAVES_ACCUM,38285430.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TA_FLAT_ATOMIC_WAVEFRONTS_sum,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TA_FLAT_READ_LDS_WAVEFRONTS_sum,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_GMI_CREDIT_STALL_sum,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_32B_sum,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[0],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[100],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[101],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[102],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[103],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[104],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[105],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[106],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[107],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[108],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[109],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[10],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[110],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[111],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[112],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[113],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[114],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[115],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[116],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[117],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[118],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[119],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[11],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[120],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[121],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[122],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[123],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[124],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[125],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[126],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[127],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[12],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[13],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[14],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[15],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[16],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[17],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[18],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[19],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[1],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[20],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[21],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[22],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[23],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[24],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[25],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[26],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[27],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[28],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[29],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[2],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[30],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[31],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[32],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[33],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[34],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[35],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[36],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[37],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[38],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[39],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[3],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[40],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[41],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[42],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[43],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[44],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[45],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[46],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[47],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[48],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[49],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[4],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[50],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[51],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[52],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[53],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[54],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[55],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[56],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[57],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[58],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[59],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[5],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[60],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[61],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[62],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[63],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[64],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[65],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[66],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[67],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[68],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[69],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[6],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[70],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[71],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[72],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[73],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[74],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[75],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[76],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[77],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[78],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[79],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[7],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[80],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[81],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[82],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[83],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[84],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[85],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[86],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[87],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[88],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[89],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[8],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[90],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[91],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[92],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[93],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[94],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[95],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[96],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[97],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[98],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[99],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL[9],0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCC_EA0_RDREQ_IO_CREDIT_STALL_sum,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCP_TCC_RW_READ_REQ_sum,65536.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCP_TCC_RW_WRITE_REQ_sum,131072.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCP_TCC_UC_ATOMIC_REQ_sum,0.0 +2,7,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967188182,619129967192822,12,TCP_TCC_UC_READ_REQ_sum,0.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,CPC_TG_SEND,4096.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,CPC_UTCL1_STALL_ON_TRANSLATION,0.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,SQ_INSTS_SENDMSG,16384.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,SQ_INSTS_SMEM,65536.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,SQ_INSTS_VALU,98304.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,SQ_INSTS_VALU_ADD_F16,0.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,SQ_INSTS_VALU_ADD_F32,0.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,SQ_INSTS_VALU_ADD_F64,0.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,SQ_INSTS_VALU_CVT,0.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,SQ_INSTS_VALU_FMA_F16,0.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TA_FLAT_READ_WAVEFRONTS_sum,16384.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TA_FLAT_WAVEFRONTS_sum,32768.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[0],481517.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[100],442072.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[101],446173.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[102],451479.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[103],447970.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[104],478689.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[105],481468.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[106],483214.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[107],472541.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[108],466395.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[109],464455.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[10],491512.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[110],418537.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[111],475818.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[112],398981.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[113],396090.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[114],426032.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[115],437672.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[116],378986.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[117],387358.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[118],407257.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[119],404651.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[11],497227.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[120],431430.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[121],436658.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[122],450161.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[123],447665.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[124],405253.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[125],400882.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[126],367342.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[127],439445.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[12],444681.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[13],449664.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[14],477268.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[15],477331.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[16],472906.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[17],492027.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[18],500186.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[19],485967.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[1],496110.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[20],479681.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[21],494612.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[22],423755.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[23],495931.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[24],455208.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[25],453405.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[26],485206.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[27],476833.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[28],465484.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[29],467775.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[2],512282.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[30],456675.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[31],458669.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[32],439578.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[33],436946.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[34],482844.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[35],485229.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[36],442520.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[37],448636.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[38],458364.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[39],461455.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[3],498792.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[40],494668.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[41],495379.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[42],490001.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[43],476215.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[44],468863.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[45],463967.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[46],441820.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[47],483352.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[48],431635.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[49],433448.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[4],505458.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[50],478767.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[51],491711.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[52],441767.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[53],445180.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[54],443789.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[55],444446.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[56],471659.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[57],472010.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[58],506884.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[59],488812.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[5],503065.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[60],481886.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[61],477639.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[62],430210.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[63],493933.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[64],448765.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[65],460273.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[66],463177.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[67],451107.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[68],434398.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[69],448390.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[6],453652.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[70],421657.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[71],468410.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[72],410624.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[73],411185.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[74],447807.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[75],449536.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[76],409548.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[77],412655.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[78],429495.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[79],427838.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[7],509404.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[80],431151.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[81],439692.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[82],461443.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[83],450430.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[84],451789.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[85],449627.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[86],384346.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[87],456986.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[88],410161.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[89],404330.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[8],454192.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[90],446947.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[91],449415.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[92],401583.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[93],405656.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[94],409962.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[95],410042.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[96],440483.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[97],443814.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[98],468314.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[99],468998.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL[9],458116.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_LEVEL_sum,58002900.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RDREQ_sum,65704.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCC_EA0_RD_UNCACHED_32B_sum,32.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCP_TCC_UC_WRITE_REQ_sum,0.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCP_TCC_WRITE_REQ_LATENCY_sum,23663400.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCP_TCC_WRITE_REQ_sum,131072.0 +2,8,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967583825,619129967588545,12,TCP_TCP_LATENCY_sum,21812900.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,SQ_INSTS_VALU_FMA_F32,0.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,SQ_INSTS_VALU_FMA_F64,0.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,SQ_INSTS_VALU_INT32,49152.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,SQ_INSTS_VALU_INT64,32768.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,SQ_INSTS_VALU_MFMA_BF16,0.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,SQ_INSTS_VALU_MFMA_F16,0.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,SQ_INSTS_VALU_MFMA_F32,0.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,SQ_INSTS_VALU_MFMA_F64,0.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TA_FLAT_WRITE_WAVEFRONTS_sum,16384.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TA_TA_BUSY_sum,719562.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[0],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[100],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[101],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[102],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[103],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[104],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[105],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[106],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[107],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[108],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[109],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[10],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[110],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[111],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[112],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[113],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[114],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[115],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[116],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[117],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[118],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[119],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[11],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[120],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[121],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[122],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[123],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[124],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[125],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[126],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[127],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[12],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[13],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[14],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[15],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[16],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[17],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[18],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[19],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[1],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[20],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[21],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[22],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[23],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[24],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[25],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[26],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[27],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[28],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[29],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[2],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[30],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[31],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[32],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[33],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[34],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[35],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[36],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[37],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[38],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[39],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[3],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[40],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[41],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[42],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[43],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[44],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[45],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[46],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[47],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[48],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[49],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[4],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[50],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[51],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[52],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[53],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[54],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[55],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[56],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[57],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[58],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[59],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[5],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[60],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[61],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[62],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[63],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[64],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[65],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[66],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[67],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[68],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[69],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[6],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[70],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[71],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[72],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[73],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[74],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[75],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[76],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[77],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[78],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[79],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[7],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[80],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[81],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[82],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[83],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[84],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[85],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[86],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[87],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[88],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[89],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[8],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[90],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[91],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[92],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[93],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[94],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[95],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[96],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[97],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[98],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[99],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ[9],1024.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ_64B_sum,131072.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ_ATOMIC_DRAM_32B_sum,0.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCC_EA0_WRREQ_ATOMIC_DRAM_sum,0.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCP_TCP_TA_ADDR_STALL_CYCLES_sum,0.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCP_TCP_TA_DATA_STALL_CYCLES_sum,76865.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCP_TCR_RDRET_STALL_sum,22758.0 +2,9,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129967987548,619129967992228,12,TCP_TCR_TCP_STALL_CYCLES_sum,147.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,SQ_INSTS_VALU_MFMA_F6F4,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,SQ_INSTS_VALU_MFMA_F8,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,SQ_INSTS_VALU_MFMA_I8,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,SQ_INSTS_VALU_MFMA_MOPS_BF16,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,SQ_INSTS_VALU_MFMA_MOPS_F16,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,SQ_INSTS_VALU_MFMA_MOPS_F32,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,SQ_INSTS_VALU_MFMA_MOPS_F64,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,SQ_INSTS_VALU_MFMA_MOPS_F6F4,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TA_TOTAL_WAVEFRONTS_sum,32768.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_ATOMIC_GMI_32B_sum,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_ATOMIC_IO_32B_sum,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[0],906.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[100],669.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[101],682.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[102],670.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[103],686.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[104],800.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[105],748.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[106],771.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[107],734.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[108],731.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[109],772.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[10],863.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[110],726.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[111],750.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[112],684.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[113],704.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[114],704.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[115],703.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[116],729.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[117],735.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[118],709.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[119],736.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[11],865.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[120],723.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[121],724.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[122],720.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[123],764.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[124],763.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[125],734.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[126],768.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[127],751.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[12],799.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[13],821.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[14],866.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[15],875.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[16],1286.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[17],1329.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[18],1313.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[19],1285.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[1],924.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[20],1290.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[21],1299.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[22],1300.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[23],1303.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[24],1283.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[25],1297.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[26],1295.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[27],1281.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[28],1318.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[29],1335.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[2],923.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[30],1308.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[31],1314.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[32],783.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[33],884.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[34],913.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[35],944.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[36],807.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[37],957.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[38],959.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[39],975.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[3],892.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[40],920.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[41],940.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[42],923.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[43],849.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[44],934.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[45],919.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[46],868.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[47],856.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[48],1443.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[49],1350.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[4],907.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[50],1354.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[51],1343.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[52],1487.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[53],1358.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[54],1341.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[55],1371.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[56],1302.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[57],1327.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[58],1320.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[59],1304.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[5],910.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[60],1321.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[61],1308.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[62],1320.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[63],1324.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[64],721.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[65],741.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[66],735.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[67],736.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[68],779.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[69],750.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[6],888.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[70],764.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[71],762.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[72],657.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[73],678.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[74],689.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[75],695.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[76],701.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[77],721.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[78],705.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[79],698.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[7],878.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[80],774.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[81],759.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[82],757.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[83],779.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[84],752.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[85],776.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[86],820.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[87],786.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[88],772.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[89],812.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[8],779.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[90],810.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[91],828.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[92],802.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[93],812.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[94],782.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[95],776.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[96],631.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[97],659.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[98],660.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[99],656.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL[9],824.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCC_EA0_WRREQ_DRAM_CREDIT_STALL_sum,117885.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCP_TOTAL_ACCESSES_sum,2097150.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCP_TOTAL_ATOMIC_WITH_RET_sum,0.0 +2,10,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968406911,619129968411671,12,TCP_TOTAL_CACHE_ACCESSES_sum,524288.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,SQ_INSTS_VALU_MFMA_MOPS_F8,0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,SQ_INSTS_VALU_MFMA_MOPS_I8,0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,SQ_INSTS_VALU_MUL_F16,0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,SQ_INSTS_VALU_MUL_F32,0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,SQ_INSTS_VALU_MUL_F64,0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,SQ_INSTS_VALU_TRANS_F16,0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,SQ_INSTS_VALU_TRANS_F32,0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,SQ_INSTS_VALU_TRANS_F64,0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_DRAM_sum,131072.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[0],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[100],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[101],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[102],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[103],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[104],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[105],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[106],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[107],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[108],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[109],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[10],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[110],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[111],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[112],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[113],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[114],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[115],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[116],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[117],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[118],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[119],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[11],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[120],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[121],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[122],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[123],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[124],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[125],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[126],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[127],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[12],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[13],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[14],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[15],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[16],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[17],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[18],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[19],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[1],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[20],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[21],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[22],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[23],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[24],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[25],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[26],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[27],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[28],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[29],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[2],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[30],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[31],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[32],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[33],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[34],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[35],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[36],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[37],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[38],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[39],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[3],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[40],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[41],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[42],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[43],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[44],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[45],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[46],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[47],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[48],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[49],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[4],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[50],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[51],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[52],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[53],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[54],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[55],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[56],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[57],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[58],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[59],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[5],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[60],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[61],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[62],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[63],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[64],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[65],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[66],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[67],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[68],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[69],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[6],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[70],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[71],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[72],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[73],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[74],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[75],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[76],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[77],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[78],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[79],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[7],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[80],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[81],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[82],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[83],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[84],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[85],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[86],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[87],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[88],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[89],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[8],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[90],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[91],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[92],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[93],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[94],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[95],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[96],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[97],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[98],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[99],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL[9],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_GMI_CREDIT_STALL_sum,0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[0],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[100],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[101],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[102],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[103],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[104],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[105],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[106],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[107],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[108],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[109],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[10],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[110],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[111],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[112],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[113],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[114],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[115],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[116],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[117],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[118],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[119],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[11],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[120],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[121],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[122],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[123],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[124],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[125],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[126],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[127],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[12],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[13],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[14],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[15],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[16],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[17],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[18],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[19],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[1],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[20],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[21],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[22],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[23],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[24],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[25],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[26],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[27],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[28],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[29],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[2],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[30],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[31],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[32],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[33],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[34],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[35],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[36],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[37],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[38],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[39],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[3],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[40],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[41],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[42],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[43],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[44],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[45],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[46],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[47],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[48],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[49],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[4],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[50],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[51],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[52],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[53],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[54],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[55],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[56],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[57],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[58],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[59],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[5],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[60],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[61],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[62],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[63],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[64],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[65],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[66],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[67],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[68],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[69],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[6],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[70],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[71],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[72],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[73],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[74],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[75],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[76],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[77],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[78],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[79],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[7],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[80],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[81],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[82],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[83],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[84],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[85],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[86],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[87],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[88],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[89],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[8],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[90],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[91],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[92],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[93],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[94],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[95],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[96],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[97],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[98],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[99],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCC_EA0_WRREQ_IO_CREDIT_STALL[9],0.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCP_TOTAL_READ_sum,1048580.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,256.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCP_TOTAL_WRITE_sum,1048580.0 +2,11,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129968749874,619129968754554,12,TCP_UTCL1_LFIFO_FULL_sum,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,SQ_INSTS_VMEM,32768.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,SQ_INSTS_VSKIPPED,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,SQ_LDS_ADDR_CONFLICT,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,SQ_LDS_ATOMIC_RETURN,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,SQ_LDS_BANK_CONFLICT,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,SQ_LDS_CMD_FIFO_FULL,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,SQ_LDS_DATA_FIFO_FULL,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,SQ_LDS_IDX_ACTIVE,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_IO_CREDIT_STALL_sum,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[0],553161.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[100],450606.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[101],451604.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[102],465372.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[103],461941.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[104],456267.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[105],456636.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[106],455081.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[107],444615.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[108],452768.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[109],458545.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[10],537882.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[110],452697.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[111],446544.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[112],415291.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[113],411072.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[114],411560.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[115],414428.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[116],418319.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[117],414941.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[118],421853.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[119],420724.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[11],541547.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[120],406269.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[121],407190.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[122],413398.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[123],406138.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[124],407572.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[125],409007.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[126],401218.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[127],411582.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[12],527137.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[13],539604.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[14],548762.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[15],547601.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[16],509841.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[17],514324.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[18],520281.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[19],508597.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[1],556942.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[20],510195.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[21],515497.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[22],511383.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[23],513936.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[24],518374.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[25],513960.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[26],514897.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[27],517893.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[28],527860.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[29],519753.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[2],551129.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[30],525706.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[31],524764.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[32],551072.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[33],567164.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[34],576498.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[35],581441.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[36],566216.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[37],565979.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[38],585669.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[39],579603.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[3],532131.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[40],554778.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[41],556884.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[42],564545.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[43],531743.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[44],554941.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[45],563180.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[46],527610.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[47],533369.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[48],537529.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[49],527684.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[4],541700.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[50],536697.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[51],542732.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[52],540081.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[53],534938.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[54],543567.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[55],541551.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[56],537334.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[57],541908.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[58],542736.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[59],532729.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[5],546588.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[60],536143.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[61],542857.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[62],532740.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[63],536349.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[64],461404.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[65],466904.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[66],464230.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[67],453631.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[68],464889.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[69],461877.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[6],529762.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[70],449713.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[71],458229.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[72],448356.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[73],453415.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[74],451283.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[75],455947.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[76],449167.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[77],452419.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[78],463173.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[79],464460.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[7],537088.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[80],419028.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[81],422519.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[82],423467.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[83],414879.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[84],420722.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[85],423060.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[86],415860.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[87],418723.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[88],416995.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[89],416456.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[8],525666.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[90],416498.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[91],423672.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[92],422248.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[93],418447.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[94],425174.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[95],426395.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[96],449692.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[97],452715.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[98],456620.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[99],461693.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL[9],535115.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_LEVEL_sum,62394500.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCC_EA0_WRREQ_STALL_sum,123535.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCP_UTCL1_PERMISSION_MISS_sum,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCP_UTCL1_REQUEST_sum,524288.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCP_UTCL1_SERIALIZATION_STALL_sum,0.0 +2,12,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969060636,619129969065316,12,TCP_UTCL1_STALL_INFLIGHT_MAX_sum,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,SQ_LDS_MEM_VIOLATIONS,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,SQ_LDS_UNALIGNED_STALL,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,SQ_THREAD_CYCLES_VALU,6291456.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,SQ_VALU_MFMA_BUSY_CYCLES,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,SQ_VMEM_TA_ADDR_FIFO_FULL,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,SQ_VMEM_TA_CMD_FIFO_FULL,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,SQ_VMEM_WR_TA_DATA_FIFO_FULL,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,SQ_WAIT_ANY,8515727.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,TCC_EA0_WRREQ_WRITE_DRAM_32B_sum,262144.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,TCC_EA0_WRREQ_WRITE_DRAM_sum,131072.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,TCC_EA0_WRREQ_WRITE_GMI_32B_sum,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,TCC_EA0_WRREQ_WRITE_IO_32B_sum,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,TCP_UTCL1_STALL_LFIFO_NO_RES_sum,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,TCP_UTCL1_STALL_MULTI_MISS_sum,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,TCP_UTCL1_STALL_UTCL2_REQ_OUT_OF_CREDITS_sum,0.0 +2,13,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969394279,619129969398959,12,TCP_UTCL1_THRASHING_STALL_sum,0.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,SQ_WAIT_INST_ANY,696864.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,SQ_WAVES,16384.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,SQ_WAVES_RESTORED,0.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,SQ_WAVES_SAVED,0.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,SQ_WAVE_CYCLES,9542777.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_EA0_WRREQ_sum,131072.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_EA0_WR_UNCACHED_32B_sum,0.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[0],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[100],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[101],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[102],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[103],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[104],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[105],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[106],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[107],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[108],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[109],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[10],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[110],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[111],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[112],529.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[113],547.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[114],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[115],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[116],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[117],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[118],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[119],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[11],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[120],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[121],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[122],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[123],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[124],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[125],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[126],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[127],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[12],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[13],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[14],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[15],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[16],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[17],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[18],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[19],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[1],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[20],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[21],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[22],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[23],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[24],529.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[25],547.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[26],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[27],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[28],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[29],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[2],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[30],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[31],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[32],529.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[33],547.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[34],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[35],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[36],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[37],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[38],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[39],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[3],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[40],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[41],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[42],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[43],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[44],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[45],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[46],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[47],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[48],529.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[49],547.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[4],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[50],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[51],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[52],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[53],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[54],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[55],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[56],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[57],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[58],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[59],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[5],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[60],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[61],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[62],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[63],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[64],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[65],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[66],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[67],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[68],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[69],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[6],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[70],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[71],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[72],529.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[73],547.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[74],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[75],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[76],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[77],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[78],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[79],582.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[7],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[80],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[81],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[82],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[83],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[84],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[85],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[86],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[87],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[88],530.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[89],549.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[8],529.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[90],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[91],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[92],586.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[93],586.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[94],586.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[95],586.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[96],529.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[97],547.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[98],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[99],512.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT[9],547.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCC_HIT_sum,68211.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCP_UTCL1_TRANSLATION_HIT_sum,524288.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCP_UTCL1_TRANSLATION_MISS_UNDER_MISS_sum,0.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCP_UTCL1_TRANSLATION_MISS_sum,0.0 +2,14,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969718241,619129969722921,12,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,0.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_IB_REQ_sum,199379.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_IB_STALL_sum,40588.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_LATENCY_FIFO_FULL_sum,0.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[0],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[100],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[101],1027.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[102],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[103],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[104],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[105],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[106],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[107],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[108],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[109],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[10],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[110],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[111],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[112],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[113],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[114],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[115],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[116],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[117],1027.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[118],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[119],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[11],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[120],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[121],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[122],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[123],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[124],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[125],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[126],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[127],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[12],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[13],1027.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[14],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[15],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[16],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[17],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[18],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[19],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[1],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[20],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[21],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[22],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[23],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[24],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[25],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[26],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[27],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[28],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[29],1027.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[2],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[30],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[31],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[32],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[33],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[34],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[35],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[36],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[37],1027.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[38],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[39],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[3],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[40],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[41],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[42],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[43],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[44],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[45],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[46],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[47],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[48],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[49],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[4],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[50],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[51],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[52],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[53],1027.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[54],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[55],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[56],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[57],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[58],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[59],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[5],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[60],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[61],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[62],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[63],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[64],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[65],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[66],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[67],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[68],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[69],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[6],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[70],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[71],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[72],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[73],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[74],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[75],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[76],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[77],1027.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[78],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[79],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[7],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[80],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[81],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[82],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[83],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[84],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[85],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[86],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[87],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[88],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[89],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[8],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[90],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[91],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[92],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[93],1027.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[94],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[95],1026.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[96],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[97],1025.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[98],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[99],1024.0 +2,15,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129969986043,619129969990763,12,TCC_MISS[9],1025.0 +2,16,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970140245,619129970145005,12,TCC_MISS_sum,131168.0 +2,16,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970140245,619129970145005,12,TCC_NC_REQ_sum,0.0 +2,16,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970140245,619129970145005,12,TCC_NORMAL_EVICT_sum,0.0 +2,16,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970140245,619129970145005,12,TCC_NORMAL_WRITEBACK_sum,2022.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_PROBE_sum,0.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[0],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[100],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[101],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[102],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[103],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[104],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[105],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[106],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[107],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[108],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[109],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[10],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[110],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[111],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[112],530.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[113],548.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[114],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[115],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[116],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[117],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[118],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[119],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[11],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[120],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[121],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[122],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[123],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[124],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[125],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[126],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[127],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[12],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[13],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[14],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[15],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[16],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[17],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[18],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[19],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[1],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[20],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[21],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[22],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[23],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[24],530.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[25],548.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[26],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[27],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[28],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[29],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[2],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[30],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[31],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[32],530.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[33],548.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[34],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[35],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[36],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[37],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[38],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[39],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[3],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[40],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[41],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[42],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[43],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[44],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[45],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[46],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[47],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[48],530.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[49],548.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[4],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[50],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[51],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[52],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[53],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[54],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[55],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[56],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[57],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[58],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[59],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[5],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[60],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[61],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[62],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[63],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[64],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[65],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[66],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[67],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[68],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[69],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[6],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[70],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[71],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[72],530.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[73],548.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[74],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[75],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[76],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[77],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[78],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[79],584.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[7],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[80],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[81],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[82],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[83],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[84],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[85],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[86],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[87],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[88],531.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[89],550.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[8],530.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[90],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[91],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[92],588.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[93],588.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[94],588.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[95],588.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[96],530.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[97],548.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[98],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[99],512.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ[9],548.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ_SECTORS_sum,267654.0 +2,17,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970289286,619129970294006,12,TCC_READ_sum,68291.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[0],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[100],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[101],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[102],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[103],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[104],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[105],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[106],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[107],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[108],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[109],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[10],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[110],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[111],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[112],1554.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[113],1572.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[114],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[115],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[116],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[117],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[118],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[119],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[11],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[120],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[121],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[122],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[123],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[124],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[125],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[126],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[127],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[12],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[13],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[14],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[15],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[16],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[17],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[18],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[19],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[1],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[20],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[21],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[22],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[23],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[24],1554.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[25],1572.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[26],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[27],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[28],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[29],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[2],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[30],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[31],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[32],1554.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[33],1572.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[34],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[35],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[36],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[37],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[38],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[39],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[3],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[40],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[41],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[42],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[43],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[44],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[45],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[46],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[47],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[48],1554.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[49],1572.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[4],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[50],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[51],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[52],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[53],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[54],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[55],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[56],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[57],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[58],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[59],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[5],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[60],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[61],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[62],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[63],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[64],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[65],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[66],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[67],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[68],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[69],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[6],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[70],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[71],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[72],1554.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[73],1572.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[74],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[75],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[76],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[77],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[78],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[79],1608.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[7],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[80],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[81],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[82],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[83],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[84],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[85],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[86],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[87],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[88],1555.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[89],1574.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[8],1554.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[90],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[91],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[92],1612.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[93],1612.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[94],1612.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[95],1612.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[96],1554.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[97],1572.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[98],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[99],1536.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ[9],1572.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_REQ_sum,199363.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_RW_REQ_sum,199363.0 +2,18,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970422967,619129970427727,12,TCC_SRC_FIFO_FULL_sum,0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_STREAMING_REQ_sum,0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[0],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[100],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[101],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[102],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[103],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[104],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[105],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[106],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[107],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[108],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[109],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[10],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[110],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[111],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[112],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[113],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[114],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[115],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[116],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[117],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[118],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[119],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[11],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[120],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[121],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[122],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[123],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[124],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[125],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[126],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[127],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[12],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[13],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[14],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[15],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[16],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[17],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[18],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[19],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[1],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[20],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[21],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[22],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[23],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[24],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[25],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[26],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[27],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[28],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[29],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[2],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[30],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[31],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[32],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[33],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[34],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[35],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[36],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[37],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[38],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[39],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[3],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[40],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[41],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[42],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[43],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[44],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[45],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[46],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[47],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[48],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[49],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[4],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[50],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[51],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[52],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[53],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[54],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[55],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[56],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[57],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[58],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[59],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[5],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[60],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[61],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[62],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[63],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[64],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[65],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[66],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[67],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[68],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[69],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[6],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[70],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[71],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[72],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[73],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[74],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[75],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[76],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[77],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[78],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[79],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[7],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[80],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[81],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[82],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[83],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[84],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[85],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[86],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[87],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[88],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[89],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[8],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[90],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[91],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[92],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[93],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[94],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[95],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[96],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[97],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[98],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[99],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL[9],0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_TOO_MANY_EA_WRREQS_STALL_sum,0.0 +2,19,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970566568,619129970571208,12,TCC_UC_REQ_sum,0.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITEBACK_sum,65656.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[0],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[100],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[101],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[102],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[103],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[104],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[105],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[106],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[107],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[108],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[109],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[10],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[110],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[111],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[112],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[113],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[114],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[115],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[116],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[117],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[118],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[119],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[11],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[120],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[121],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[122],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[123],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[124],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[125],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[126],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[127],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[12],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[13],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[14],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[15],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[16],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[17],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[18],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[19],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[1],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[20],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[21],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[22],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[23],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[24],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[25],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[26],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[27],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[28],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[29],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[2],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[30],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[31],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[32],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[33],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[34],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[35],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[36],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[37],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[38],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[39],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[3],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[40],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[41],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[42],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[43],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[44],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[45],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[46],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[47],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[48],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[49],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[4],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[50],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[51],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[52],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[53],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[54],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[55],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[56],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[57],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[58],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[59],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[5],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[60],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[61],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[62],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[63],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[64],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[65],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[66],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[67],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[68],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[69],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[6],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[70],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[71],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[72],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[73],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[74],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[75],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[76],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[77],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[78],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[79],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[7],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[80],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[81],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[82],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[83],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[84],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[85],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[86],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[87],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[88],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[89],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[8],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[90],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[91],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[92],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[93],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[94],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[95],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[96],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[97],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[98],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[99],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE[9],1024.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE_SECTORS_sum,262144.0 +2,20,1048576,256,0,0,4,0,16,"vecCopy(double*, double*, double*, int, int)",619129970700249,619129970704969,12,TCC_WRITE_sum,131072.0 diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/profiling_config.yaml b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/profiling_config.yaml new file mode 100644 index 0000000000..6c71f754ff --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/profiling_config.yaml @@ -0,0 +1,40 @@ +attach_duration_msec: null +attach_pid: null +config_dir: /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/src/rocprof_compute_soc/analysis_configs +device: 0 +dispatch: null +filter_blocks: [] +format_rocprof_output: rocpd +hip_trace: false +iteration_multiplexing: kernel +join_type: grid +kernel: null +kernel_names: false +kokkos_trace: false +list_available_metrics: false +list_blocks: null +list_metrics: null +list_sets: false +loglevel: 20 +mem_level: ALL +mode: profile +name: vcopy_kernel +no_native_tool: false +no_roof: true +path: /home/abchoudh/rocm/iteration_multiplexing/projects/rocprofiler-compute/sample/workloads/vcopy_kernel/MI350 +pc_sampling_interval: 1048576 +pc_sampling_method: stochastic +quiet: false +remaining: ./vcopy -i 20 -n 1048576 -b 256 +retain_rocpd_output: false +rocprofiler_sdk_tool_path: /opt/rocm/lib/rocprofiler-sdk/librocprofiler-sdk-tool.so +roof_only: false +roofline_data_type: +- FP32 +set_selected: null +sort: kernels +spatial_multiplexing: null +specs: false +subpath: gpu_model +target: null +verbose: 0 diff --git a/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/sysinfo.csv b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/sysinfo.csv new file mode 100644 index 0000000000..74bfd30f0e --- /dev/null +++ b/projects/rocprofiler-compute/tests/workloads/vcopy_iteration_multiplexing/MI350/sysinfo.csv @@ -0,0 +1,2 @@ +workload_name,command,ip_blocks,timestamp,version,hostname,cpu_model,sbios,linux_distro,linux_kernel_version,amd_gpu_kernel_version,cpu_memory,gpu_memory,rocm_version,vbios,compute_partition,memory_partition,gpu_series,gpu_model,gpu_arch,gpu_chip_id,gpu_l1,gpu_l2,cu_per_gpu,simd_per_cu,se_per_gpu,wave_size,workgroup_max_size,max_waves_per_cu,max_sclk,max_mclk,cur_sclk,cur_mclk,l2_banks,total_l2_chan,lds_banks_per_cu,sqc_per_gpu,pipes_per_gpu,num_xcd,num_hbm_channels +vcopy_kernel,./vcopy -i 20 -n 1048576 -b 256,SQ|LDS|SQC|TA|TD|TCP|TCC|SPI|CPC|CPF,Thu Nov 6 22:30:17 2025 (CST),3,smci350-zts-gtu-e14-25,AMD EPYC 9575F 64-Core Processor,"American Megatrends International, LLC.1.4a",Ubuntu 22.04.5 LTS,5.15.160+,,3170269860,,7.2.0,113-M350-01-1K1-1010,SPX,NPS1,MI350,MI350,gfx950,30112,32,4096,256,4,32,64,1024,32,2200,2200,2200,2200,16,128,32,128,4,8,128