diff --git a/projects/clr/rocclr/compiler/lib/backends/common/library.hpp b/projects/clr/rocclr/compiler/lib/backends/common/library.hpp index ede00fc922..e2d94ecf5a 100644 --- a/projects/clr/rocclr/compiler/lib/backends/common/library.hpp +++ b/projects/clr/rocclr/compiler/lib/backends/common/library.hpp @@ -61,7 +61,7 @@ int getLibDescs ( int& LibDescSize // output -- LibDesc[0:LibDescSize-1] ); -static const char* amdRTFuns[] = { +static constexpr const char* amdRTFuns[] = { "__amdrt_div_i64", "__amdrt_div_u64", "__amdrt_mod_i64", diff --git a/projects/clr/rocclr/compiler/lib/include/acl.h b/projects/clr/rocclr/compiler/lib/include/acl.h index e3bd13325a..d95518e013 100644 --- a/projects/clr/rocclr/compiler/lib/include/acl.h +++ b/projects/clr/rocclr/compiler/lib/include/acl.h @@ -305,9 +305,9 @@ acl_error ACL_API_ENTRY aclInsertKernelStatistics(aclCompiler *cl, aclBinary *bin); //! Define hardware info constants for SI and above devices -const static unsigned SI_sgprs_avail = 102; -const static unsigned SI_vgprs_avail = 256; -const static unsigned SI_ldssize_avail = 32*1024; +static constexpr unsigned SI_sgprs_avail = 102; +static constexpr unsigned SI_vgprs_avail = 256; +static constexpr unsigned SI_ldssize_avail = 32*1024; //!--------------------------------------------------------------------------!// // Functions that deal with memory. diff --git a/projects/clr/rocclr/compiler/lib/utils/bif_section_labels.hpp b/projects/clr/rocclr/compiler/lib/utils/bif_section_labels.hpp index f89bfebb1b..a5322e94fa 100644 --- a/projects/clr/rocclr/compiler/lib/utils/bif_section_labels.hpp +++ b/projects/clr/rocclr/compiler/lib/utils/bif_section_labels.hpp @@ -71,7 +71,7 @@ struct oclBIFSymbolStruct { // TODO: analyze the changes since 30 and remove unused anymore symbols, // for example, symISAMeta, update convert functions, check backward compatibility. // These are the symbols that are defined by the BIF 3.1 spec -static const oclBIFSymbolStruct BIF31[28] = +static constexpr oclBIFSymbolStruct BIF31[28] = { // 0: BIF 3.0 compiler options, .comment section via library support. {symOpenclCompilerOptions, @@ -136,7 +136,7 @@ static const oclBIFSymbolStruct BIF31[28] = }; // BIF31 // These are the symbols that are defined by the BIF 3.0 spec -static const oclBIFSymbolStruct BIF30[28] = +static constexpr oclBIFSymbolStruct BIF30[28] = { // 0: BIF 3.0 compiler options, .comment section via library support. {symOpenclCompilerOptions, @@ -202,7 +202,7 @@ static const oclBIFSymbolStruct BIF30[28] = // These are the sections that are defined by the BIF 2.0 spec -static const oclBIFSymbolStruct BIF20[13] = +static constexpr oclBIFSymbolStruct BIF20[13] = { {symOpenclCompilerOptions, { "__OpenCL_compile_options", "" }, {aclCOMMENT, aclCOMMENT}}, diff --git a/projects/clr/rocclr/device/comgrctx.cpp b/projects/clr/rocclr/device/comgrctx.cpp index 0a72b97c74..492c5852cc 100644 --- a/projects/clr/rocclr/device/comgrctx.cpp +++ b/projects/clr/rocclr/device/comgrctx.cpp @@ -31,7 +31,7 @@ bool Comgr::is_ready_ = false; bool Comgr::LoadLib() { #if defined(COMGR_DYN_DLL) ClPrint(amd::LOG_INFO, amd::LOG_CODE, "Loading COMGR library."); - static const char* ComgrLibName = + static constexpr const char* ComgrLibName = LP64_SWITCH(WINDOWS_SWITCH("amd_comgr32.dll", "libamd_comgr32.so.1"), WINDOWS_SWITCH("amd_comgr.dll", "libamd_comgr.so.1")); cep_.handle = Os::loadLibrary(ComgrLibName); diff --git a/projects/clr/rocclr/device/device.hpp b/projects/clr/rocclr/device/device.hpp index ed4194b17e..bef896de03 100755 --- a/projects/clr/rocclr/device/device.hpp +++ b/projects/clr/rocclr/device/device.hpp @@ -160,7 +160,7 @@ enum OclExtensions { ClExtTotal }; -static const char* OclExtensionsString[] = {"cl_khr_fp64 ", +static constexpr const char* OclExtensionsString[] = {"cl_khr_fp64 ", "cl_amd_fp64 ", "cl_khr_select_fprounding_mode ", "cl_khr_global_int32_base_atomics ", diff --git a/projects/clr/rocclr/device/devkernel.cpp b/projects/clr/rocclr/device/devkernel.cpp index f12431da3b..94c2dba341 100755 --- a/projects/clr/rocclr/device/devkernel.cpp +++ b/projects/clr/rocclr/device/devkernel.cpp @@ -37,7 +37,7 @@ namespace device { // ================================================================================================ -static const clk_value_type_t ClkValueMapType[6][6] = { +static constexpr clk_value_type_t ClkValueMapType[6][6] = { {T_CHAR, T_CHAR2, T_CHAR3, T_CHAR4, T_CHAR8, T_CHAR16}, {T_SHORT, T_SHORT2, T_SHORT3, T_SHORT4, T_SHORT8, T_SHORT16}, {T_INT, T_INT2, T_INT3, T_INT4, T_INT8, T_INT16}, @@ -465,7 +465,6 @@ static amd_comgr_status_t populateKernelMetaV3(const amd_comgr_metadata_node_t k amd_comgr_metadata_kind_t kind; size_t size = 0; std::string buf; - // get the key of the argument field status = amd::Comgr::get_metadata_kind(key, &kind); if (kind == AMD_COMGR_METADATA_KIND_STRING && status == AMD_COMGR_STATUS_SUCCESS) { diff --git a/projects/clr/rocclr/device/devwavelimiter.hpp b/projects/clr/rocclr/device/devwavelimiter.hpp index 5bde929a1a..394c2cef33 100644 --- a/projects/clr/rocclr/device/devwavelimiter.hpp +++ b/projects/clr/rocclr/device/devwavelimiter.hpp @@ -87,7 +87,7 @@ class WaveLimiter : public amd::ProfilingCallback { static uint MaxWave; // Maximum number of waves per SIMD static uint RunCount; // Number of kernel executions for normal run static uint AdaptCount; // Number of kernel executions for adapting - const static uint MaxContinuousSamples = 2; + static constexpr uint MaxContinuousSamples = 2; //! Call back from Event::recordProfilingInfo to get execution time. virtual void callback(ulong duration, uint32_t waves) = 0; diff --git a/projects/clr/rocclr/device/gpu/gpublit.cpp b/projects/clr/rocclr/device/gpu/gpublit.cpp index d08360150e..44c58cb01b 100644 --- a/projects/clr/rocclr/device/gpu/gpublit.cpp +++ b/projects/clr/rocclr/device/gpu/gpublit.cpp @@ -766,7 +766,7 @@ struct FormatConvertion { }; // The list of rejected data formats and corresponding conversion -static const FormatConvertion RejectedData[] = { +static constexpr FormatConvertion RejectedData[] = { {CL_UNORM_INT8, CL_UNSIGNED_INT8}, {CL_UNORM_INT16, CL_UNSIGNED_INT16}, {CL_SNORM_INT8, CL_UNSIGNED_INT8}, {CL_SNORM_INT16, CL_UNSIGNED_INT16}, {CL_HALF_FLOAT, CL_UNSIGNED_INT16}, {CL_FLOAT, CL_UNSIGNED_INT32}, @@ -774,7 +774,7 @@ static const FormatConvertion RejectedData[] = { {CL_UNORM_INT_101010, CL_UNSIGNED_INT8}, {CL_SIGNED_INT32, CL_UNSIGNED_INT32}}; // The list of rejected channel's order and corresponding conversion -static const FormatConvertion RejectedOrder[] = { +static constexpr FormatConvertion RejectedOrder[] = { {CL_A, CL_R}, {CL_RA, CL_RG}, {CL_LUMINANCE, CL_R}, {CL_INTENSITY, CL_R}, {CL_RGB, CL_RGBA}, {CL_BGRA, CL_RGBA}, {CL_ARGB, CL_RGBA}, {CL_sRGB, CL_RGBA}, {CL_sRGBx, CL_RGBA}, {CL_sRGBA, CL_RGBA}, {CL_sBGRA, CL_RGBA}}; diff --git a/projects/clr/rocclr/device/gpu/gpublit.hpp b/projects/clr/rocclr/device/gpu/gpublit.hpp index ace85f20be..b9b8f70023 100644 --- a/projects/clr/rocclr/device/gpu/gpublit.hpp +++ b/projects/clr/rocclr/device/gpu/gpublit.hpp @@ -157,7 +157,7 @@ class DmaBlitManager : public device::HostBlitManager { ) const; protected: - const static uint MaxPinnedBuffers = 4; + static constexpr uint MaxPinnedBuffers = 4; //! Synchronizes the blit operations if necessary inline void synchronize() const; @@ -365,8 +365,8 @@ class KernelBlitManager : public DmaBlitManager { ) const; private: - static const size_t MaxXferBuffers = 2; - static const uint TransferSplitSize = 3; + static constexpr size_t MaxXferBuffers = 2; + static constexpr uint TransferSplitSize = 3; //! Copies a buffer object to an image object bool copyBufferToImageKernel(device::Memory& srcMemory, //!< Source memory object @@ -413,7 +413,7 @@ class KernelBlitManager : public DmaBlitManager { amd::Monitor* lockXferOps_; //!< Lock transfer operation }; -static const char* BlitName[KernelBlitManager::BlitTotal] = { +static constexpr const char* BlitName[KernelBlitManager::BlitTotal] = { "copyImage", "copyImage1DA", "copyImageToBuffer", "copyBufferToImage", "copyBufferRect", "copyBufferRectAligned", "copyBuffer", "copyBufferAligned", "fillBuffer", diff --git a/projects/clr/rocclr/device/gpu/gpuconstbuf.hpp b/projects/clr/rocclr/device/gpu/gpuconstbuf.hpp index 36b24bd130..c4cbb1340d 100644 --- a/projects/clr/rocclr/device/gpu/gpuconstbuf.hpp +++ b/projects/clr/rocclr/device/gpu/gpuconstbuf.hpp @@ -30,7 +30,7 @@ namespace gpu { class ConstBuffer : public Memory { public: //! Vector size of the constant buffer - static const size_t VectorSize = 16; + static constexpr size_t VectorSize = 16; //! Constructor for the ConstBuffer class ConstBuffer(VirtualGPU& gpu, //!< Virtual GPU device object diff --git a/projects/clr/rocclr/device/gpu/gpudebugger.hpp b/projects/clr/rocclr/device/gpu/gpudebugger.hpp index d93ec6c5ad..261406b03e 100644 --- a/projects/clr/rocclr/device/gpu/gpudebugger.hpp +++ b/projects/clr/rocclr/device/gpu/gpudebugger.hpp @@ -29,7 +29,7 @@ #include "device/hwdebug.hpp" #include "acl.h" -static const int NumberReserveVgprs = 4; +static constexpr int NumberReserveVgprs = 4; namespace gpu { diff --git a/projects/clr/rocclr/device/gpu/gpudefs.hpp b/projects/clr/rocclr/device/gpu/gpudefs.hpp index 7c852a3bc2..06055adc34 100644 --- a/projects/clr/rocclr/device/gpu/gpudefs.hpp +++ b/projects/clr/rocclr/device/gpu/gpudefs.hpp @@ -41,44 +41,44 @@ extern bool getFuncInfoFromImage(CALimage image, CALfuncInfo* pFuncInfo); namespace gpu { //! Maximum number of the supported global atomic counters -const static uint MaxAtomicCounters = 8; +static constexpr uint MaxAtomicCounters = 8; //! Maximum number of the supported samplers -const static uint MaxSamplers = 16; +static constexpr uint MaxSamplers = 16; //! Maximum number of supported read images -const static uint MaxReadImage = 128; +static constexpr uint MaxReadImage = 128; //! Maximum number of supported write images -const static uint MaxWriteImage = 8; +static constexpr uint MaxWriteImage = 8; //! Maximum number of supported read/write images for OCL20 -const static uint MaxReadWriteImage = 64; +static constexpr uint MaxReadWriteImage = 64; //! Maximum number of supported constant arguments -const static uint MaxConstArguments = 8; +static constexpr uint MaxConstArguments = 8; //! Maximum number of supported kernel UAV arguments -const static uint MaxUavArguments = 1024; +static constexpr uint MaxUavArguments = 1024; //! Maximum number of pixels for a 1D image created from a buffer -const static size_t MaxImageBufferSize = 1 << 27; +static constexpr size_t MaxImageBufferSize = 1 << 27; //! Maximum number of pixels for a 1D image created from a buffer -const static size_t MaxImageArraySize = 2048; +static constexpr size_t MaxImageArraySize = 2048; //! Maximum number of supported constant buffers -const static uint MaxConstBuffers = MaxConstArguments + 8; +static constexpr uint MaxConstBuffers = MaxConstArguments + 8; //! Maximum number of constant buffers for arguments -const static uint MaxConstBuffersArguments = 2; +static constexpr uint MaxConstBuffersArguments = 2; //! Define offline CAL implementation -const static uint CalOfflineImpl = 0xffffffff; +static constexpr uint CalOfflineImpl = 0xffffffff; //! Alignment restriciton for the pinned memory -const static size_t PinnedMemoryAlignment = 4 * Ki; +static constexpr size_t PinnedMemoryAlignment = 4 * Ki; //! HSA path specific defines for images -const static uint HsaImageObjectSize = 48; -const static uint HsaImageObjectAlignment = 16; -const static uint HsaSamplerObjectSize = 32; -const static uint HsaSamplerObjectAlignment = 16; +static constexpr uint HsaImageObjectSize = 48; +static constexpr uint HsaImageObjectAlignment = 16; +static constexpr uint HsaSamplerObjectSize = 32; +static constexpr uint HsaSamplerObjectAlignment = 16; //! HSA path specific defines for images -const static uint DeviceQueueMaskSize = 32; +static constexpr uint DeviceQueueMaskSize = 32; //! Defines all supported ASIC families enum AsicFamilies { Family7xx, Family8xx, FamilyTotal }; @@ -97,7 +97,7 @@ struct AMDDeviceInfo { }; -static const AMDDeviceInfo DeviceInfo[] = { +static constexpr AMDDeviceInfo DeviceInfo[] = { // Machine targetName machineTarget /* CAL_TARGET_600 */ {ED_ATI_CAL_MACHINE_R600_ISA, "", "", 0, 0, 0, 0, 0, 0, 0}, /* CAL_TARGET_610 */ {ED_ATI_CAL_MACHINE_R610_ISA, "", "", 0, 0, 0, 0, 0, 0, 0}, @@ -199,17 +199,17 @@ enum gfx_handle { gfx906 = 906 }; -static const char* Gfx700 = "amdgcn-amd-amdhsa--gfx700"; -static const char* Gfx701 = "amdgcn-amd-amdhsa--gfx701"; -static const char* Gfx800 = "amdgcn-amd-amdhsa--gfx800"; -static const char* Gfx801 = "amdgcn-amd-amdhsa--gfx801+xnack"; -static const char* Gfx804 = "amdgcn-amd-amdhsa--gfx804"; -static const char* Gfx810 = "amdgcn-amd-amdhsa--gfx810+xnack"; -static const char* Gfx900 = "amdgcn-amd-amdhsa--gfx900"; -static const char* Gfx902 = "amdgcn-amd-amdhsa--gfx902+xnack"; -static const char* Gfx903 = "amdgcn-amd-amdhsa--gfx902"; // NOTE: gfx903 is gfx902 with xnack -static const char* Gfx904 = "amdgcn-amd-amdhsa--gfx904"; -static const char* Gfx906 = "amdgcn-amd-amdhsa--gfx906"; +static constexpr const char* Gfx700 = "amdgcn-amd-amdhsa--gfx700"; +static constexpr const char* Gfx701 = "amdgcn-amd-amdhsa--gfx701"; +static constexpr const char* Gfx800 = "amdgcn-amd-amdhsa--gfx800"; +static constexpr const char* Gfx801 = "amdgcn-amd-amdhsa--gfx801+xnack"; +static constexpr const char* Gfx804 = "amdgcn-amd-amdhsa--gfx804"; +static constexpr const char* Gfx810 = "amdgcn-amd-amdhsa--gfx810+xnack"; +static constexpr const char* Gfx900 = "amdgcn-amd-amdhsa--gfx900"; +static constexpr const char* Gfx902 = "amdgcn-amd-amdhsa--gfx902+xnack"; +static constexpr const char* Gfx903 = "amdgcn-amd-amdhsa--gfx902"; // NOTE: gfx903 is gfx902 with xnack +static constexpr const char* Gfx904 = "amdgcn-amd-amdhsa--gfx904"; +static constexpr const char* Gfx906 = "amdgcn-amd-amdhsa--gfx906"; // Supported OpenCL versions enum OclVersion { OpenCL10, OpenCL11, OpenCL12, OpenCL20, OpenCL21 }; @@ -224,7 +224,7 @@ struct MemoryFormat { CalFormat calFormat_; //!< CAL image format }; -static const MemoryFormat MemoryFormatMap[] = { +static constexpr MemoryFormat MemoryFormatMap[] = { // R {{CL_R, CL_UNORM_INT8}, {GSL_CHANNEL_ORDER_R, CM_SURF_FMT_INTENSITY8}}, {{CL_R, CL_UNORM_INT16}, {GSL_CHANNEL_ORDER_R, CM_SURF_FMT_R16}}, @@ -384,7 +384,7 @@ struct MemFormatStruct { uint components_; }; -static const MemFormatStruct MemoryFormatSize[] = { +static constexpr MemFormatStruct MemoryFormatSize[] = { {CM_SURF_FMT_INTENSITY8, 1, 1}, /**< 1 component, normalized unsigned 8-bit integer value per component */ {CM_SURF_FMT_RG8, 2, diff --git a/projects/clr/rocclr/device/gpu/gpudevice.hpp b/projects/clr/rocclr/device/gpu/gpudevice.hpp index 6b36b2ab23..6c33e5a920 100644 --- a/projects/clr/rocclr/device/gpu/gpudevice.hpp +++ b/projects/clr/rocclr/device/gpu/gpudevice.hpp @@ -205,10 +205,10 @@ class Device : public NullDevice, public CALGSLDevice { class Heap : public amd::EmbeddedObject { public: //! The size of a heap element in bytes - static const size_t ElementSize = 4; + static constexpr size_t ElementSize = 4; //! The type of a heap element in bytes - static const cmSurfFmt ElementType = CM_SURF_FMT_R32I; + static constexpr cmSurfFmt ElementType = CM_SURF_FMT_R32I; Heap() : resource_(NULL), baseAddress_(0) {} @@ -280,7 +280,7 @@ class Device : public NullDevice, public CALGSLDevice { //! Transfer buffers class XferBuffers : public amd::HeapObject { public: - static const size_t MaxXferBufListSize = 8; + static constexpr size_t MaxXferBufListSize = 8; //! Default constructor XferBuffers(const Device& device, Resource::MemoryType type, size_t bufSize) @@ -369,7 +369,7 @@ class Device : public NullDevice, public CALGSLDevice { Chunk() : buf_(NULL), flags_(NULL) {} }; - static const uint MaskBits = 32; + static constexpr uint MaskBits = 32; const Device& dev_; //!< GPU device for the chunk manager amd::Monitor ml_; //!< Global lock for the SRD manager std::vector pool_; //!< Pool of SRD buffers diff --git a/projects/clr/rocclr/device/gpu/gpukernel.cpp b/projects/clr/rocclr/device/gpu/gpukernel.cpp index 35a7c6d66a..005e5a7b7b 100644 --- a/projects/clr/rocclr/device/gpu/gpukernel.cpp +++ b/projects/clr/rocclr/device/gpu/gpukernel.cpp @@ -159,7 +159,7 @@ struct BufDataConst { }; }; -static const BufDataConst BufType[] = {{"g", KernelArg::PointerGlobal, {1, 0, 0, 0}}, +static constexpr BufDataConst BufType[] = {{"g", KernelArg::PointerGlobal, {1, 0, 0, 0}}, {"p", KernelArg::PointerPrivate, {1, 1, 1, 0}}, {"l", KernelArg::PointerLocal, {1, 1, 1, 0}}, {"uav", KernelArg::PointerGlobal, {1, 1, 1, 0}}, @@ -167,10 +167,10 @@ static const BufDataConst BufType[] = {{"g", KernelArg::PointerGlobal, {1, 0, 0, {"hl", KernelArg::PointerHwLocal, {1, 1, 1, 0}}, {"hp", KernelArg::PointerHwPrivate, {1, 1, 1, 0}}, {"hc", KernelArg::PointerHwConst, {1, 1, 1, 0}}}; -static const uint BufTypeTotal = sizeof(BufType) / sizeof(BufDataConst); +static constexpr uint BufTypeTotal = sizeof(BufType) / sizeof(BufDataConst); //! The mathlib constants for each kernel execution -static const float MathLibConst[4] = {0.0f, 0.5f, 1.0f, 2.0f}; +static constexpr float MathLibConst[4] = {0.0f, 0.5f, 1.0f, 2.0f}; bool expect(const std::string& str, size_t* pos, const std::string& sym) { bool result = true; diff --git a/projects/clr/rocclr/device/gpu/gpukernel.hpp b/projects/clr/rocclr/device/gpu/gpukernel.hpp index 22777f93ad..20353441ee 100644 --- a/projects/clr/rocclr/device/gpu/gpukernel.hpp +++ b/projects/clr/rocclr/device/gpu/gpukernel.hpp @@ -294,7 +294,7 @@ struct KernelArg : public amd::HeapObject { } //! Special case for vectors with component size <= 16bit - const static uint VectorSizeLimit = 4; + static constexpr uint VectorSizeLimit = 4; size_t specialVector() const; }; @@ -360,7 +360,7 @@ class NullKernel : public device::Kernel { public: typedef std::vector arguments_t; - const static uint UavIdUndefined = 0xffff; + static constexpr uint UavIdUndefined = 0xffff; enum Flags { LimitWorkgroup = 1 << 0, //!< Limits the workgroup size @@ -782,7 +782,7 @@ class HSAILKernel : public device::Kernel { }; // Max number of possible extra (hidden) kernel arguments - static const uint MaxExtraArgumentsNum = 6; + static constexpr uint MaxExtraArgumentsNum = 6; HSAILKernel(std::string name, HSAILProgram* prog, std::string compileOptions, uint extraArgsNum); diff --git a/projects/clr/rocclr/device/gpu/gpumemory.hpp b/projects/clr/rocclr/device/gpu/gpumemory.hpp index e9b0edcc37..234ef22ebe 100644 --- a/projects/clr/rocclr/device/gpu/gpumemory.hpp +++ b/projects/clr/rocclr/device/gpu/gpumemory.hpp @@ -232,10 +232,10 @@ class Buffer : public gpu::Memory { Buffer& operator=(const Buffer&); //! The size of buffer element in bytes - static const size_t ElementSize = 4; + static constexpr size_t ElementSize = 4; //! The type of buffer element - static const cmSurfFmt ElementType = CM_SURF_FMT_R32I; + static constexpr cmSurfFmt ElementType = CM_SURF_FMT_R32I; }; class Image : public gpu::Memory { diff --git a/projects/clr/rocclr/device/gpu/gpuprintf.cpp b/projects/clr/rocclr/device/gpu/gpuprintf.cpp index c1ec45869e..157d0c7999 100644 --- a/projects/clr/rocclr/device/gpu/gpuprintf.cpp +++ b/projects/clr/rocclr/device/gpu/gpuprintf.cpp @@ -236,8 +236,8 @@ int PrintfDbg::checkVectorSpecifier(const std::string& fmt, size_t startPos, siz return vectorSize; } -static const size_t ConstStr = 0xffffffff; -static const char Separator[] = ",\0"; +static constexpr size_t ConstStr = 0xffffffff; +static constexpr char Separator[] = ",\0"; size_t PrintfDbg::outputArgument(const std::string& fmt, bool printFloat, size_t size, const uint32_t* argument) const { diff --git a/projects/clr/rocclr/device/gpu/gpuprintf.hpp b/projects/clr/rocclr/device/gpu/gpuprintf.hpp index 22074c7c7e..bbab1bf1b1 100644 --- a/projects/clr/rocclr/device/gpu/gpuprintf.hpp +++ b/projects/clr/rocclr/device/gpu/gpuprintf.hpp @@ -54,7 +54,7 @@ class Memory; class PrintfDbg : public amd::HeapObject { public: //! Debug buffer size per workitem - static const uint WorkitemDebugSize = 4096; + static constexpr uint WorkitemDebugSize = 4096; //! Default constructor PrintfDbg(Device& device, FILE* file = NULL); diff --git a/projects/clr/rocclr/device/gpu/gpuschedcl.cpp b/projects/clr/rocclr/device/gpu/gpuschedcl.cpp index 8dd27e5ecc..d6d8ac1abb 100644 --- a/projects/clr/rocclr/device/gpu/gpuschedcl.cpp +++ b/projects/clr/rocclr/device/gpu/gpuschedcl.cpp @@ -164,17 +164,17 @@ typedef struct _HwDispatch { uint padd41; // 0x00000021 } HwDispatch; \n -static const uint WavefrontSize = 64; -static const uint MaxWaveSize = 0x400; -static const uint UsrRegOffset = 0x240; -static const uint Pm4Nop = 0xC0001002; -static const uint Pm4UserRegs = 0xC0007602; -static const uint Pm4CopyReg = 0xC0044000; -static const uint PrivateSegEna = 0x1; -static const uint DispatchEna = 0x2; -static const uint QueuePtrEna = 0x4; -static const uint KernelArgEna = 0x8; -static const uint FlatScratchEna = 0x20; +static constexpr uint WavefrontSize = 64; +static constexpr uint MaxWaveSize = 0x400; +static constexpr uint UsrRegOffset = 0x240; +static constexpr uint Pm4Nop = 0xC0001002; +static constexpr uint Pm4UserRegs = 0xC0007602; +static constexpr uint Pm4CopyReg = 0xC0044000; +static constexpr uint PrivateSegEna = 0x1; +static constexpr uint DispatchEna = 0x2; +static constexpr uint QueuePtrEna = 0x4; +static constexpr uint KernelArgEna = 0x8; +static constexpr uint FlatScratchEna = 0x20; \n uint GetCmdTemplateHeaderSize() { return sizeof(HwDispatchHeader); } \n diff --git a/projects/clr/rocclr/device/gpu/gputimestamp.hpp b/projects/clr/rocclr/device/gpu/gputimestamp.hpp index db66db0ae5..8c37ab8d01 100644 --- a/projects/clr/rocclr/device/gpu/gputimestamp.hpp +++ b/projects/clr/rocclr/device/gpu/gputimestamp.hpp @@ -116,8 +116,8 @@ class TimeStampCache : public amd::HeapObject { void freeTimeStamp(TimeStamp* ts) { freedTS_.push_back(ts); } private: - static const uint TimerSlotSize = TimeStamp::CommandTotal * sizeof(uint64_t); - static const uint TimerBufSize = TimerSlotSize * 4096; + static constexpr uint TimerSlotSize = TimeStamp::CommandTotal * sizeof(uint64_t); + static constexpr uint TimerBufSize = TimerSlotSize * 4096; //! Disable copy constructor TimeStampCache(const TimeStampCache&); diff --git a/projects/clr/rocclr/device/gpu/gputrap.hpp b/projects/clr/rocclr/device/gpu/gputrap.hpp index 1494710819..9a7517e9ea 100644 --- a/projects/clr/rocclr/device/gpu/gputrap.hpp +++ b/projects/clr/rocclr/device/gpu/gputrap.hpp @@ -116,7 +116,7 @@ end *******************************************************************************/ /// shader codes with "asic(TAHITI)" instruction -static const uint32_t RuntimeTrapCode[] = { +static constexpr uint32_t RuntimeTrapCode[] = { 0x7e008200, 0xbf8c0000, 0xbef8036c, 0x8779ff6d, 0x0000ffff, 0x8879ff79, 0x01000000, 0xbefa03ff, 0x00002000, 0xbefb03ff, 0x00024fac, 0x80f8ff78, 0x00000100, 0xbef70300, 0xc2007900, 0xbf8c0000, 0xbeee0300, 0xc2007901, 0xbf8c0000, 0xbeef0300, 0xbe800377, 0xbef60398, 0x8078766e, 0x8779ff6f, @@ -128,7 +128,7 @@ static const uint32_t RuntimeTrapCode[] = { /// shader codes with "asic(VI)" instruction -static const uint32_t RuntimeTrapCodeVi[] = { +static constexpr uint32_t RuntimeTrapCodeVi[] = { 0x7e006a00, 0xbf8c0000, 0xbef8006c, 0x8679ff6d, 0x0000ffff, 0x8779ff79, 0x01000000, 0xbefa00ff, 0x00002000, 0xbefb00ff, 0x00024fac, 0x80f8ff78, 0x00000100, 0xbef70000, 0xc022003c, 0x00000000, 0xbf8c0000, 0xbeee0000, 0xc022003c, 0x00000004, 0xbf8c0000, 0xbeef0000, 0xbe800077, 0xbef60098, diff --git a/projects/clr/rocclr/device/gpu/gslbe/src/rt/EventQueue.h b/projects/clr/rocclr/device/gpu/gslbe/src/rt/EventQueue.h index 5c02b00923..7b4f9055ac 100644 --- a/projects/clr/rocclr/device/gpu/gslbe/src/rt/EventQueue.h +++ b/projects/clr/rocclr/device/gpu/gslbe/src/rt/EventQueue.h @@ -39,7 +39,7 @@ enum EQManagerConfig class EventQueue { public: - static const unsigned int c_staticQueueSize = EQManager_HIGH; + static constexpr unsigned int c_staticQueueSize = EQManager_HIGH; EventQueue(); ~EventQueue(); diff --git a/projects/clr/rocclr/device/gpu/gslbe/src/rt/GSLDeviceGL.cpp b/projects/clr/rocclr/device/gpu/gslbe/src/rt/GSLDeviceGL.cpp index 1e90d7e113..42f576a46d 100644 --- a/projects/clr/rocclr/device/gpu/gslbe/src/rt/GSLDeviceGL.cpp +++ b/projects/clr/rocclr/device/gpu/gslbe/src/rt/GSLDeviceGL.cpp @@ -42,7 +42,7 @@ typedef struct cmFormatXlateRec{ } cmFormatXlateParams; // relates full range of cm surface formats to those supported by CAL -static const cmFormatXlateParams cmFormatXlateTable [] = { +static constexpr cmFormatXlateParams cmFormatXlateTable [] = { {CM_SURF_FMT_LUMINANCE8, CM_SURF_FMT_R8I, GSL_CHANNEL_ORDER_R}, {CM_SURF_FMT_LUMINANCE16, CM_SURF_FMT_R16, GSL_CHANNEL_ORDER_R}, {CM_SURF_FMT_LUMINANCE16F, CM_SURF_FMT_R16F, GSL_CHANNEL_ORDER_R}, diff --git a/projects/clr/rocclr/device/gpu/gslbe/src/rt/backend.h b/projects/clr/rocclr/device/gpu/gslbe/src/rt/backend.h index db2d4d942d..90215e78eb 100644 --- a/projects/clr/rocclr/device/gpu/gslbe/src/rt/backend.h +++ b/projects/clr/rocclr/device/gpu/gslbe/src/rt/backend.h @@ -207,7 +207,7 @@ enum EngineType struct GpuEvent { - static const unsigned int InvalidID = ((1<<30) - 1); + static constexpr unsigned int InvalidID = ((1<<30) - 1); EngineType engineId_; ///< type of the id unsigned int id; ///< actual event id diff --git a/projects/clr/rocclr/device/hwdebug.hpp b/projects/clr/rocclr/device/hwdebug.hpp index 9f90227d24..08d830b130 100644 --- a/projects/clr/rocclr/device/hwdebug.hpp +++ b/projects/clr/rocclr/device/hwdebug.hpp @@ -24,15 +24,15 @@ #include "device.hpp" #include "amdocl/cl_debugger_amd.h" -static const int TbaStartOffset = 256; +static constexpr int TbaStartOffset = 256; -static const int RtTrapBufferWaveSize = 64; -static const int RtTrapBufferSeNum = 4; -static const int RtTrapBufferShNum = 2; -static const int RtTrapBufferCuNum = 16; -static const int RtTrapBufferSimdNum = 4; -static const int RtTrapBufferWaveNum = 16; -static const int RtTrapBufferTotalWaveNum = +static constexpr int RtTrapBufferWaveSize = 64; +static constexpr int RtTrapBufferSeNum = 4; +static constexpr int RtTrapBufferShNum = 2; +static constexpr int RtTrapBufferCuNum = 16; +static constexpr int RtTrapBufferSimdNum = 4; +static constexpr int RtTrapBufferWaveNum = 16; +static constexpr int RtTrapBufferTotalWaveNum = ((RtTrapBufferSeNum) * (RtTrapBufferShNum) * (RtTrapBufferCuNum) * (RtTrapBufferSimdNum) * (RtTrapBufferWaveNum)); diff --git a/projects/clr/rocclr/device/pal/palblit.cpp b/projects/clr/rocclr/device/pal/palblit.cpp index 67fb581b24..23291e209c 100644 --- a/projects/clr/rocclr/device/pal/palblit.cpp +++ b/projects/clr/rocclr/device/pal/palblit.cpp @@ -753,7 +753,7 @@ struct FormatConvertion { }; // The list of rejected data formats and corresponding conversion -static const FormatConvertion RejectedData[] = { +static constexpr FormatConvertion RejectedData[] = { {CL_UNORM_INT8, CL_UNSIGNED_INT8}, {CL_UNORM_INT16, CL_UNSIGNED_INT16}, {CL_SNORM_INT8, CL_UNSIGNED_INT8}, {CL_SNORM_INT16, CL_UNSIGNED_INT16}, {CL_HALF_FLOAT, CL_UNSIGNED_INT16}, {CL_FLOAT, CL_UNSIGNED_INT32}, @@ -761,7 +761,7 @@ static const FormatConvertion RejectedData[] = { {CL_UNORM_INT_101010, CL_UNSIGNED_INT8}, {CL_SIGNED_INT32, CL_UNSIGNED_INT32}}; // The list of rejected channel's order and corresponding conversion -static const FormatConvertion RejectedOrder[] = { +static constexpr FormatConvertion RejectedOrder[] = { {CL_A, CL_R}, {CL_RA, CL_RG}, {CL_LUMINANCE, CL_R}, {CL_INTENSITY, CL_R}, {CL_RGB, CL_RGBA}, {CL_BGRA, CL_RGBA}, {CL_ARGB, CL_RGBA}, {CL_sRGB, CL_RGBA}, {CL_sRGBx, CL_RGBA}, {CL_sRGBA, CL_RGBA}, {CL_sBGRA, CL_RGBA}, {CL_DEPTH, CL_R}}; diff --git a/projects/clr/rocclr/device/pal/palblit.hpp b/projects/clr/rocclr/device/pal/palblit.hpp index 1767f509b5..cdca86fa16 100644 --- a/projects/clr/rocclr/device/pal/palblit.hpp +++ b/projects/clr/rocclr/device/pal/palblit.hpp @@ -156,7 +156,7 @@ class DmaBlitManager : public device::HostBlitManager { ) const; protected: - const static uint MaxPinnedBuffers = 4; + static constexpr uint MaxPinnedBuffers = 4; //! Synchronizes the blit operations if necessary inline void synchronize() const; @@ -377,8 +377,8 @@ class KernelBlitManager : public DmaBlitManager { virtual amd::Monitor* lockXfer() const { return &lockXferOps_; } private: - static const size_t MaxXferBuffers = 2; - static const uint TransferSplitSize = 3; + static constexpr size_t MaxXferBuffers = 2; + static constexpr uint TransferSplitSize = 3; //! Copies a buffer object to an image object bool copyBufferToImageKernel(device::Memory& srcMemory, //!< Source memory object @@ -424,7 +424,7 @@ class KernelBlitManager : public DmaBlitManager { mutable amd::Monitor lockXferOps_; //!< Lock transfer operation }; -static const char* BlitName[KernelBlitManager::BlitTotal] = { +static constexpr const char* BlitName[KernelBlitManager::BlitTotal] = { "copyImage", "copyImage1DA", "copyImageToBuffer", "copyBufferToImage", "copyBufferRect", "copyBufferRectAligned", "copyBuffer", "copyBufferAligned", "fillBuffer", diff --git a/projects/clr/rocclr/device/pal/palcounters.cpp b/projects/clr/rocclr/device/pal/palcounters.cpp index 3d95bd84c9..e8cf9c48d8 100644 --- a/projects/clr/rocclr/device/pal/palcounters.cpp +++ b/projects/clr/rocclr/device/pal/palcounters.cpp @@ -154,7 +154,7 @@ bool PalCounterReference::finalize() { } } -static const std::array blockIdToIndexSelect = {{ +static constexpr std::array blockIdToIndexSelect = {{ PCIndexSelect::None, // CPF PCIndexSelect::ShaderEngine, // IA PCIndexSelect::ShaderEngine, // VGT @@ -211,7 +211,7 @@ static const std::array blockIdToIndexSelect = {{ static_assert(blockIdToIndexSelect.size() == static_cast(Pal::GpuBlock::Count), "size of blockIdToIndexSelect does not match GpuBlock::Count"); // Converting from ORCA cmndefs.h to PAL palPerfExperiment.h -static const std::array, 83> ciBlockIdOrcaToPal = {{ +static constexpr std::array, 83> ciBlockIdOrcaToPal = {{ {0x0E, 0}, // CB0 {0x0E, 1}, // CB1 {0x0E, 2}, // CB2 @@ -297,7 +297,7 @@ static const std::array, 83> ciBlockIdOrcaToPal = {{ {0x17, 0}, // CPC }}; -static const std::array, 97> viBlockIdOrcaToPal = {{ +static constexpr std::array, 97> viBlockIdOrcaToPal = {{ {0x0E, 0}, // CB0 {0x0E, 1}, // CB1 {0x0E, 2}, // CB2 @@ -400,7 +400,7 @@ static const std::array, 97> viBlockIdOrcaToPal = {{ // The number of counters per block has been increased for gfx9 but this table may not reflect all // of them // as compute may not use all of them. -static const std::array, 123> gfx9BlockIdPal = {{ +static constexpr std::array, 123> gfx9BlockIdPal = {{ {0x0E, 0}, // CB0 - 0 {0x0E, 1}, // CB1 - 1 {0x0E, 2}, // CB2 - 2 @@ -526,7 +526,7 @@ static const std::array, 123> gfx9BlockIdPal = {{ {0x1F, 7}, // RMI7 - 122 }}; -static const std::array, 139> gfx10BlockIdPal = {{ +static constexpr std::array, 139> gfx10BlockIdPal = {{ {0x0E, 0}, // CB0 - 0 {0x0E, 1}, // CB1 - 1 {0x0E, 2}, // CB2 - 2 diff --git a/projects/clr/rocclr/device/pal/paldebugger.hpp b/projects/clr/rocclr/device/pal/paldebugger.hpp index 48bd8143a2..29e9648379 100644 --- a/projects/clr/rocclr/device/pal/paldebugger.hpp +++ b/projects/clr/rocclr/device/pal/paldebugger.hpp @@ -28,7 +28,7 @@ #include "device/hwdebug.hpp" #include "acl.h" -static const int NumberReserveVgprs = 4; +static constexpr int NumberReserveVgprs = 4; namespace pal { diff --git a/projects/clr/rocclr/device/pal/paldefs.hpp b/projects/clr/rocclr/device/pal/paldefs.hpp index 18097c439d..bccde80987 100644 --- a/projects/clr/rocclr/device/pal/paldefs.hpp +++ b/projects/clr/rocclr/device/pal/paldefs.hpp @@ -96,41 +96,41 @@ struct GpuEvent { namespace pal { //! Maximum number of the supported global atomic counters -const static uint MaxAtomicCounters = 8; +static constexpr uint MaxAtomicCounters = 8; //! Maximum number of the supported samplers -const static uint MaxSamplers = 16; +static constexpr uint MaxSamplers = 16; //! Maximum number of supported read images -const static uint MaxReadImage = 128; +static constexpr uint MaxReadImage = 128; //! Maximum number of supported write images -const static uint MaxWriteImage = 8; +static constexpr uint MaxWriteImage = 8; //! Maximum number of supported read/write images for OCL20 -const static uint MaxReadWriteImage = 64; +static constexpr uint MaxReadWriteImage = 64; //! Maximum number of supported constant arguments -const static uint MaxConstArguments = 8; +static constexpr uint MaxConstArguments = 8; //! Maximum number of supported kernel UAV arguments -const static uint MaxUavArguments = 1024; +static constexpr uint MaxUavArguments = 1024; //! Maximum number of pixels for a 1D image created from a buffer -const static size_t MaxImageBufferSize = 1 << 27; +static constexpr size_t MaxImageBufferSize = 1 << 27; //! Maximum number of pixels for a 1D image created from a buffer -const static size_t MaxImageArraySize = 2048; +static constexpr size_t MaxImageArraySize = 2048; //! Maximum number of supported constant buffers -const static uint MaxConstBuffers = MaxConstArguments + 8; +static constexpr uint MaxConstBuffers = MaxConstArguments + 8; //! Maximum number of constant buffers for arguments -const static uint MaxConstBuffersArguments = 2; +static constexpr uint MaxConstBuffersArguments = 2; //! Alignment restriciton for the pinned memory -const static size_t PinnedMemoryAlignment = 4 * Ki; +static constexpr size_t PinnedMemoryAlignment = 4 * Ki; //! HSA path specific defines for images -const static uint HsaImageObjectSize = 48; -const static uint HsaImageObjectAlignment = 16; -const static uint HsaSamplerObjectSize = 32; -const static uint HsaSamplerObjectAlignment = 16; +static constexpr uint HsaImageObjectSize = 48; +static constexpr uint HsaImageObjectAlignment = 16; +static constexpr uint HsaSamplerObjectSize = 32; +static constexpr uint HsaSamplerObjectAlignment = 16; //! HSA path specific defines for images -const static uint DeviceQueueMaskSize = 32; +static constexpr uint DeviceQueueMaskSize = 32; struct AMDDeviceInfo { const char* machineTarget_; //!< Machine target @@ -237,7 +237,7 @@ struct MemoryFormat { Pal::ChannelMapping palChannel_; //!< PAL channel mapping }; -static const MemoryFormat MemoryFormatMap[] = { +static constexpr MemoryFormat MemoryFormatMap[] = { // R {{CL_R, CL_UNORM_INT8}, Pal::ChNumFormat::X8_Unorm, diff --git a/projects/clr/rocclr/device/pal/paldevice.hpp b/projects/clr/rocclr/device/pal/paldevice.hpp index f19b7429f8..10a9e9cb79 100644 --- a/projects/clr/rocclr/device/pal/paldevice.hpp +++ b/projects/clr/rocclr/device/pal/paldevice.hpp @@ -222,7 +222,7 @@ class Device : public NullDevice { //! Transfer buffers class XferBuffers : public amd::HeapObject { public: - static const size_t MaxXferBufListSize = 8; + static constexpr size_t MaxXferBufListSize = 8; //! Default constructor XferBuffers(const Device& device, Resource::MemoryType type, size_t bufSize) @@ -310,7 +310,7 @@ class Device : public NullDevice { Chunk() : buf_(NULL), flags_(NULL) {} }; - static const uint MaskBits = 32; + static constexpr uint MaskBits = 32; const Device& dev_; //!< GPU device for the chunk manager amd::Monitor ml_; //!< Global lock for the SRD manager std::vector pool_; //!< Pool of SRD buffers diff --git a/projects/clr/rocclr/device/pal/paldeviced3d10.cpp b/projects/clr/rocclr/device/pal/paldeviced3d10.cpp index f65a53bd95..5d391619b2 100644 --- a/projects/clr/rocclr/device/pal/paldeviced3d10.cpp +++ b/projects/clr/rocclr/device/pal/paldeviced3d10.cpp @@ -49,9 +49,9 @@ static bool queryD3D10DeviceGPUMask(ID3D10Device* pd3d10Device, UINT* pd3d10Devi // Get a handle to the DXX DLL with extension API support #if defined _WIN64 - static const CHAR dxxModuleName[13] = "atidxx64.dll"; + static constexpr CHAR dxxModuleName[13] = "atidxx64.dll"; #else - static const CHAR dxxModuleName[13] = "atidxx32.dll"; + static constexpr CHAR dxxModuleName[13] = "atidxx32.dll"; #endif hDLL = GetModuleHandle(dxxModuleName); diff --git a/projects/clr/rocclr/device/pal/paldeviced3d11.cpp b/projects/clr/rocclr/device/pal/paldeviced3d11.cpp index 2ede570b4d..e74292c830 100644 --- a/projects/clr/rocclr/device/pal/paldeviced3d11.cpp +++ b/projects/clr/rocclr/device/pal/paldeviced3d11.cpp @@ -49,9 +49,9 @@ static bool queryD3D11DeviceGPUMask(ID3D11Device* pd3d11Device, UINT* pd3d11Devi // Get a handle to the DXX DLL with extension API support #if defined _WIN64 - static const CHAR dxxModuleName[13] = "atidxx64.dll"; + static constexpr CHAR dxxModuleName[13] = "atidxx64.dll"; #else - static const CHAR dxxModuleName[13] = "atidxx32.dll"; + static constexpr CHAR dxxModuleName[13] = "atidxx32.dll"; #endif hDLL = GetModuleHandle(dxxModuleName); diff --git a/projects/clr/rocclr/device/pal/palprintf.cpp b/projects/clr/rocclr/device/pal/palprintf.cpp index f0ea16b9cf..acdc6dbdaa 100644 --- a/projects/clr/rocclr/device/pal/palprintf.cpp +++ b/projects/clr/rocclr/device/pal/palprintf.cpp @@ -234,8 +234,8 @@ int PrintfDbg::checkVectorSpecifier(const std::string& fmt, size_t startPos, siz return vectorSize; } -static const size_t ConstStr = 0xffffffff; -static const char Separator[] = ",\0"; +static constexpr size_t ConstStr = 0xffffffff; +static constexpr char Separator[] = ",\0"; size_t PrintfDbg::outputArgument(const std::string& fmt, bool printFloat, size_t size, const uint32_t* argument) const { diff --git a/projects/clr/rocclr/device/pal/palprintf.hpp b/projects/clr/rocclr/device/pal/palprintf.hpp index 303a8ef837..bf3d6ef041 100644 --- a/projects/clr/rocclr/device/pal/palprintf.hpp +++ b/projects/clr/rocclr/device/pal/palprintf.hpp @@ -57,7 +57,7 @@ class Memory; class PrintfDbg : public amd::HeapObject { public: //! Debug buffer size per workitem - static const uint WorkitemDebugSize = 4096; + static constexpr uint WorkitemDebugSize = 4096; //! Default constructor PrintfDbg(Device& device, FILE* file = NULL); diff --git a/projects/clr/rocclr/device/pal/palprogram.cpp b/projects/clr/rocclr/device/pal/palprogram.cpp index 83a4fe3c4c..310658a86b 100644 --- a/projects/clr/rocclr/device/pal/palprogram.cpp +++ b/projects/clr/rocclr/device/pal/palprogram.cpp @@ -170,7 +170,7 @@ bool Segment::freeze(bool destroySysmem) { return result; } -const static char* Carrizo = "Carrizo"; +static constexpr const char* Carrizo = "Carrizo"; HSAILProgram::HSAILProgram(Device& device, amd::Program& owner) : Program(device, owner), rawBinary_(nullptr), diff --git a/projects/clr/rocclr/device/pal/paltimestamp.hpp b/projects/clr/rocclr/device/pal/paltimestamp.hpp index fa242e911a..add6bd5f8a 100644 --- a/projects/clr/rocclr/device/pal/paltimestamp.hpp +++ b/projects/clr/rocclr/device/pal/paltimestamp.hpp @@ -114,8 +114,8 @@ class TimeStampCache : public amd::HeapObject { void freeTimeStamp(TimeStamp* ts) { freedTS_.push_back(ts); } private: - static const uint TimerSlotSize = TimeStamp::CommandTotal * sizeof(uint64_t); - static const uint TimerBufSize = TimerSlotSize * 4096; + static constexpr uint TimerSlotSize = TimeStamp::CommandTotal * sizeof(uint64_t); + static constexpr uint TimerBufSize = TimerSlotSize * 4096; //! Disable copy constructor TimeStampCache(const TimeStampCache&); diff --git a/projects/clr/rocclr/device/pal/paltrap.hpp b/projects/clr/rocclr/device/pal/paltrap.hpp index 0c5c294f03..e62cfb59b6 100644 --- a/projects/clr/rocclr/device/pal/paltrap.hpp +++ b/projects/clr/rocclr/device/pal/paltrap.hpp @@ -136,7 +136,7 @@ end *******************************************************************************/ /// shader codes with "asic(TAHITI)" instruction -static const uint32_t RuntimeTrapCode[] = { +static constexpr uint32_t RuntimeTrapCode[] = { 0x7e008200, 0xbf8c0000, 0xbef8036c, 0x8779ff6d, 0x0000ffff, 0x8879ff79, 0x01000000, 0xbefa03ff, 0x00002000, 0xbefb03ff, 0x00024fac, 0x80f8ff78, 0x00000100, 0xbef70300, 0xc2007900, 0xbf8c0000, 0xbeee0300, 0xc2007901, 0xbf8c0000, 0xbeef0300, 0xbe800377, 0xbef60398, 0x8078766e, 0x8779ff6f, @@ -148,7 +148,7 @@ static const uint32_t RuntimeTrapCode[] = { /// shader codes with "asic(VI)" instruction -static const uint32_t RuntimeTrapCodeVi[] = { +static constexpr uint32_t RuntimeTrapCodeVi[] = { 0x7e006a00, 0xbf8c0000, 0xbef8006c, 0x8679ff6d, 0x0000ffff, 0x8779ff79, 0x01000000, 0xbefa00ff, 0x00002000, 0xbefb00ff, 0x00024fac, 0x80f8ff78, 0x00000100, 0xbef70000, 0xc022003c, 0x00000000, 0xbf8c0000, 0xbeee0000, 0xc022003c, 0x00000004, 0xbf8c0000, 0xbeef0000, 0xbe800077, 0xbef60098, diff --git a/projects/clr/rocclr/device/pal/palvirtual.hpp b/projects/clr/rocclr/device/pal/palvirtual.hpp index ac417da4c8..696749d7c2 100644 --- a/projects/clr/rocclr/device/pal/palvirtual.hpp +++ b/projects/clr/rocclr/device/pal/palvirtual.hpp @@ -59,11 +59,11 @@ class VirtualGPU : public device::VirtualDevice { public: class Queue : public amd::HeapObject { public: - static const uint MaxCommands = 256; - static const uint StartCmdBufIdx = 1; - static const uint FirstMemoryReference = 0x80000000; - static const uint64_t WaitTimeoutInNsec = 6000000000; - static const uint64_t PollIntervalInNsec = 200000; + static constexpr uint MaxCommands = 256; + static constexpr uint StartCmdBufIdx = 1; + static constexpr uint FirstMemoryReference = 0x80000000; + static constexpr uint64_t WaitTimeoutInNsec = 6000000000; + static constexpr uint64_t PollIntervalInNsec = 200000; Queue(const Queue&) = delete; Queue& operator=(const Queue&) = delete; diff --git a/projects/clr/rocclr/device/rocm/rocblit.cpp b/projects/clr/rocclr/device/rocm/rocblit.cpp index de60713165..5b75a28b63 100644 --- a/projects/clr/rocclr/device/rocm/rocblit.cpp +++ b/projects/clr/rocclr/device/rocm/rocblit.cpp @@ -859,7 +859,7 @@ struct FormatConvertion { }; // The list of rejected data formats and corresponding conversion -static const FormatConvertion RejectedData[] = { +static constexpr FormatConvertion RejectedData[] = { {CL_UNORM_INT8, CL_UNSIGNED_INT8}, {CL_UNORM_INT16, CL_UNSIGNED_INT16}, {CL_SNORM_INT8, CL_UNSIGNED_INT8}, {CL_SNORM_INT16, CL_UNSIGNED_INT16}, {CL_HALF_FLOAT, CL_UNSIGNED_INT16}, {CL_FLOAT, CL_UNSIGNED_INT32}, @@ -867,7 +867,7 @@ static const FormatConvertion RejectedData[] = { {CL_UNORM_INT_101010, CL_UNSIGNED_INT8}, {CL_SIGNED_INT32, CL_UNSIGNED_INT32}}; // The list of rejected channel's order and corresponding conversion -static const FormatConvertion RejectedOrder[] = { +static constexpr FormatConvertion RejectedOrder[] = { {CL_A, CL_R}, {CL_RA, CL_RG}, {CL_LUMINANCE, CL_R}, {CL_INTENSITY, CL_R}, {CL_RGB, CL_RGBA}, {CL_BGRA, CL_RGBA}, {CL_ARGB, CL_RGBA}, {CL_sRGB, CL_RGBA}, {CL_sRGBx, CL_RGBA}, {CL_sRGBA, CL_RGBA}, {CL_sBGRA, CL_RGBA}, {CL_DEPTH, CL_R}}; diff --git a/projects/clr/rocclr/device/rocm/rocblit.hpp b/projects/clr/rocclr/device/rocm/rocblit.hpp index ea4ac996a9..b12614bd76 100644 --- a/projects/clr/rocclr/device/rocm/rocblit.hpp +++ b/projects/clr/rocclr/device/rocm/rocblit.hpp @@ -167,9 +167,9 @@ class DmaBlitManager : public device::HostBlitManager { ) const; protected: - const static uint MaxPinnedBuffers = 4; - constexpr static size_t kMaxH2dMemcpySize = 8 * Ki; - constexpr static size_t kMaxD2hMemcpySize = 64; //!< 1 cacheline + static constexpr uint MaxPinnedBuffers = 4; + static constexpr size_t kMaxH2dMemcpySize = 8 * Ki; + static constexpr size_t kMaxD2hMemcpySize = 64; //!< 1 cacheline //! Synchronizes the blit operations if necessary inline void synchronize() const; @@ -401,9 +401,9 @@ class KernelBlitManager : public DmaBlitManager { virtual amd::Monitor* lockXfer() const { return &lockXferOps_; } private: - static const size_t MaxXferBuffers = 2; - static const uint TransferSplitSize = 1; - static const uint MaxNumIssuedTransfers = 3; + static constexpr size_t MaxXferBuffers = 2; + static constexpr uint TransferSplitSize = 1; + static constexpr uint MaxNumIssuedTransfers = 3; //! Copies a buffer object to an image object bool copyBufferToImageKernel(device::Memory& srcMemory, //!< Source memory object @@ -471,7 +471,7 @@ class KernelBlitManager : public DmaBlitManager { mutable amd::Monitor lockXferOps_; //!< Lock transfer operation }; -static const char* BlitName[KernelBlitManager::BlitTotal] = { +static constexpr const char* BlitName[KernelBlitManager::BlitTotal] = { "copyImage", "copyImage1DA", "copyImageToBuffer", "copyBufferToImage", "copyBufferRect", "copyBufferRectAligned", "copyBuffer", "copyBufferAligned", "fillBuffer", diff --git a/projects/clr/rocclr/device/rocm/roccounters.cpp b/projects/clr/rocclr/device/rocm/roccounters.cpp index acd57c8169..19a7080f33 100644 --- a/projects/clr/rocclr/device/rocm/roccounters.cpp +++ b/projects/clr/rocclr/device/rocm/roccounters.cpp @@ -45,7 +45,7 @@ namespace roc { Note that some blocks are not defined in cmndefs.h */ -static const std::array, 97> viBlockIdOrcaToRocr = {{ +static constexpr std::array, 97> viBlockIdOrcaToRocr = {{ {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 0}, // CB0 - 0 {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 1}, // CB1 - 1 {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 2}, // CB2 - 2 @@ -148,7 +148,7 @@ static const std::array, 97> // The number of counters per block has been increased for gfx9 but this table may not reflect all // of them // as compute may not use all of them. -static const std::array, 125> gfx9BlockIdOrcaToRocr = {{ +static constexpr std::array, 125> gfx9BlockIdOrcaToRocr = {{ {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 0}, // CB0 {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 1}, // CB1 {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 2}, // CB2 @@ -275,7 +275,7 @@ static const std::array, 125 {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 7}, // RMI - 124 }}; -static const std::array, 139> gfx10BlockIdOrcaToRocr = {{ +static constexpr std::array, 139> gfx10BlockIdOrcaToRocr = {{ {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 0}, // CB0 - 0 {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 1}, // CB1 - 1 {HSA_VEN_AMD_AQLPROFILE_BLOCKS_NUMBER, 2}, // CB2 - 2 diff --git a/projects/clr/rocclr/device/rocm/rocdefs.hpp b/projects/clr/rocclr/device/rocm/rocdefs.hpp index fb86e0b2a7..a86d71177f 100644 --- a/projects/clr/rocclr/device/rocm/rocdefs.hpp +++ b/projects/clr/rocclr/device/rocm/rocdefs.hpp @@ -25,10 +25,10 @@ namespace roc { //! Alignment restriciton for the pinned memory -const static size_t PinnedMemoryAlignment = 4 * Ki; +static constexpr size_t PinnedMemoryAlignment = 4 * Ki; //! Specific defines for images for Dynamic Parallelism -const static uint DeviceQueueMaskSize = 32; +static constexpr uint DeviceQueueMaskSize = 32; typedef uint HsaDeviceId; @@ -51,28 +51,28 @@ struct AMDDeviceInfo { }; // The device ID must match with the device's index into DeviceInfo -const HsaDeviceId HSA_SPECTRE_ID = 0; -const HsaDeviceId HSA_SPOOKY_ID = 1; -const HsaDeviceId HSA_TONGA_ID = 2; -const HsaDeviceId HSA_CARRIZO_ID = 3; -const HsaDeviceId HSA_ICELAND_ID = 4; -const HsaDeviceId HSA_FIJI_ID = 5; -const HsaDeviceId HSA_HAWAII_ID = 6; -const HsaDeviceId HSA_ELLESMERE_ID = 7; -const HsaDeviceId HSA_BAFFIN_ID = 8; -const HsaDeviceId HSA_VEGA10_ID = 9; -const HsaDeviceId HSA_VEGA10_HBCC_ID = 10; -const HsaDeviceId HSA_RAVEN_ID = 11; -const HsaDeviceId HSA_VEGA12_ID = 12; -const HsaDeviceId HSA_VEGA20_ID = 13; -const HsaDeviceId HSA_ARIEL_ID = 14; -const HsaDeviceId HSA_NAVI10_ID = 15; -const HsaDeviceId HSA_MI100_ID = 16; -const HsaDeviceId HSA_NAVI12_ID = 17; -const HsaDeviceId HSA_NAVI14_ID = 18; -const HsaDeviceId HSA_INVALID_DEVICE_ID = -1; +constexpr HsaDeviceId HSA_SPECTRE_ID = 0; +constexpr HsaDeviceId HSA_SPOOKY_ID = 1; +constexpr HsaDeviceId HSA_TONGA_ID = 2; +constexpr HsaDeviceId HSA_CARRIZO_ID = 3; +constexpr HsaDeviceId HSA_ICELAND_ID = 4; +constexpr HsaDeviceId HSA_FIJI_ID = 5; +constexpr HsaDeviceId HSA_HAWAII_ID = 6; +constexpr HsaDeviceId HSA_ELLESMERE_ID = 7; +constexpr HsaDeviceId HSA_BAFFIN_ID = 8; +constexpr HsaDeviceId HSA_VEGA10_ID = 9; +constexpr HsaDeviceId HSA_VEGA10_HBCC_ID = 10; +constexpr HsaDeviceId HSA_RAVEN_ID = 11; +constexpr HsaDeviceId HSA_VEGA12_ID = 12; +constexpr HsaDeviceId HSA_VEGA20_ID = 13; +constexpr HsaDeviceId HSA_ARIEL_ID = 14; +constexpr HsaDeviceId HSA_NAVI10_ID = 15; +constexpr HsaDeviceId HSA_MI100_ID = 16; +constexpr HsaDeviceId HSA_NAVI12_ID = 17; +constexpr HsaDeviceId HSA_NAVI14_ID = 18; +constexpr HsaDeviceId HSA_INVALID_DEVICE_ID = -1; -static const AMDDeviceInfo DeviceInfo[] = { +static constexpr AMDDeviceInfo DeviceInfo[] = { // targetName machineTarget /* TARGET_KAVERI_SPECTRE */ {HSA_SPECTRE_ID, "", "kaveri", "", "Spectre", 4, 16, 1, 256, 64 * Ki, 32, 7, 0, 1, 0}, @@ -115,5 +115,5 @@ static const AMDDeviceInfo DeviceInfo[] = { }; } -const uint kMaxAsyncQueues = 8; // set to match the number of pipes, which is 8 +constexpr uint kMaxAsyncQueues = 8; // set to match the number of pipes, which is 8 #endif diff --git a/projects/clr/rocclr/device/rocm/rocdevice.cpp b/projects/clr/rocclr/device/rocm/rocdevice.cpp index d3c405da57..4b01fe7bc3 100755 --- a/projects/clr/rocclr/device/rocm/rocdevice.cpp +++ b/projects/clr/rocclr/device/rocm/rocdevice.cpp @@ -68,8 +68,6 @@ bool roc::Device::isHsaInitialized_ = false; std::vector roc::Device::gpu_agents_; std::vector roc::Device::cpu_agents_; -const bool roc::Device::offlineDevice_ = false; -const bool roc::NullDevice::offlineDevice_ = true; address Device::mg_sync_ = nullptr; static HsaDeviceId getHsaDeviceId(hsa_agent_t device, uint32_t& pci_id) { diff --git a/projects/clr/rocclr/device/rocm/rocdevice.hpp b/projects/clr/rocclr/device/rocm/rocdevice.hpp index 14f5c04453..237847b541 100755 --- a/projects/clr/rocclr/device/rocm/rocdevice.hpp +++ b/projects/clr/rocclr/device/rocm/rocdevice.hpp @@ -231,7 +231,7 @@ class NullDevice : public amd::Device { AMDDeviceInfo deviceInfo_; private: - static const bool offlineDevice_; + static constexpr bool offlineDevice_ = true; }; struct AgentInfo { @@ -481,7 +481,7 @@ class Device : public NullDevice { bool SvmAllocInit(void* memory, size_t size) const; private: - static const hsa_signal_value_t InitSignalValue = 1; + static constexpr hsa_signal_value_t InitSignalValue = 1; static hsa_ven_amd_loader_1_00_pfn_t amd_loader_ext_table; @@ -507,7 +507,7 @@ class Device : public NullDevice { size_t gpuvm_segment_max_alloc_; size_t alloc_granularity_; - static const bool offlineDevice_; + static constexpr bool offlineDevice_ = false; amd::Context* context_; //!< A dummy context for internal data transfer VirtualGPU* xferQueue_; //!< Transfer queue, created on demand diff --git a/projects/clr/rocclr/device/rocm/rocglinterop.cpp b/projects/clr/rocclr/device/rocm/rocglinterop.cpp index dbbf50c08b..9d81e4495d 100644 --- a/projects/clr/rocclr/device/rocm/rocglinterop.cpp +++ b/projects/clr/rocclr/device/rocm/rocglinterop.cpp @@ -41,7 +41,7 @@ static PFNMESAGLINTEROPEGLEXPORTOBJECTPROC* EglExport = nullptr; static MESA_INTEROP_KIND loadedGLAPITypes(MESA_INTEROP_NONE); #endif -static const char* errorStrings[] = {"MESA_GLINTEROP_SUCCESS", +static constexpr const char* errorStrings[] = {"MESA_GLINTEROP_SUCCESS", "MESA_GLINTEROP_OUT_OF_RESOURCES", "MESA_GLINTEROP_OUT_OF_HOST_MEMORY", "MESA_GLINTEROP_INVALID_OPERATION", diff --git a/projects/clr/rocclr/device/rocm/rocmemory.cpp b/projects/clr/rocclr/device/rocm/rocmemory.cpp index 22d33ad261..aa83ff74cb 100755 --- a/projects/clr/rocclr/device/rocm/rocmemory.cpp +++ b/projects/clr/rocclr/device/rocm/rocmemory.cpp @@ -900,7 +900,7 @@ typedef struct ChannelTypeMap { hsa_ext_image_channel_type_t hsa_channel_type; } ChannelTypeMap; -static const ChannelOrderMap kChannelOrderMapping[] = { +static constexpr ChannelOrderMap kChannelOrderMapping[] = { {CL_R, HSA_EXT_IMAGE_CHANNEL_ORDER_R}, {CL_A, HSA_EXT_IMAGE_CHANNEL_ORDER_A}, {CL_RG, HSA_EXT_IMAGE_CHANNEL_ORDER_RG}, @@ -923,7 +923,7 @@ static const ChannelOrderMap kChannelOrderMapping[] = { {CL_ABGR, HSA_EXT_IMAGE_CHANNEL_ORDER_ABGR}, }; -static const ChannelTypeMap kChannelTypeMapping[] = { +static constexpr ChannelTypeMap kChannelTypeMapping[] = { {CL_SNORM_INT8, HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT8}, {CL_SNORM_INT16, HSA_EXT_IMAGE_CHANNEL_TYPE_SNORM_INT16}, {CL_UNORM_INT8, HSA_EXT_IMAGE_CHANNEL_TYPE_UNORM_INT8}, diff --git a/projects/clr/rocclr/device/rocm/rocprintf.cpp b/projects/clr/rocclr/device/rocm/rocprintf.cpp index 1e684516c1..83088a7531 100644 --- a/projects/clr/rocclr/device/rocm/rocprintf.cpp +++ b/projects/clr/rocclr/device/rocm/rocprintf.cpp @@ -123,8 +123,8 @@ int PrintfDbg::checkVectorSpecifier(const std::string& fmt, size_t startPos, siz return vectorSize; } -static const size_t ConstStr = 0xffffffff; -static const char Separator[] = ",\0"; +static constexpr size_t ConstStr = 0xffffffff; +static constexpr char Separator[] = ",\0"; size_t PrintfDbg::outputArgument(const std::string& fmt, bool printFloat, size_t size, const uint32_t* argument) const { diff --git a/projects/clr/rocclr/device/rocm/rocprintf.hpp b/projects/clr/rocclr/device/rocm/rocprintf.hpp index 9203b98ad3..7a87aa86d5 100644 --- a/projects/clr/rocclr/device/rocm/rocprintf.hpp +++ b/projects/clr/rocclr/device/rocm/rocprintf.hpp @@ -51,7 +51,7 @@ class Device; class PrintfDbg : public amd::HeapObject { public: //! Debug buffer size per workitem - static const uint WorkitemDebugSize = 4096; + static constexpr uint WorkitemDebugSize = 4096; //! constructor PrintfDbg(Device& device, FILE* file = nullptr); diff --git a/projects/clr/rocclr/device/rocm/rocvirtual.cpp b/projects/clr/rocclr/device/rocm/rocvirtual.cpp index a72acca5c1..42e3352c61 100644 --- a/projects/clr/rocclr/device/rocm/rocvirtual.cpp +++ b/projects/clr/rocclr/device/rocm/rocvirtual.cpp @@ -65,28 +65,28 @@ namespace roc { // (HSA_FENCE_SCOPE_SYSTEM << HSA_PACKET_HEADER_RELEASE_FENCE_SCOPE) invalidates L1, L2 and flushes // L2 -static const uint16_t kInvalidAql = +static constexpr uint16_t kInvalidAql = (HSA_PACKET_TYPE_INVALID << HSA_PACKET_HEADER_TYPE); -static const uint16_t kBarrierPacketHeader = +static constexpr uint16_t kBarrierPacketHeader = (HSA_PACKET_TYPE_BARRIER_AND << HSA_PACKET_HEADER_TYPE) | (1 << HSA_PACKET_HEADER_BARRIER) | (HSA_FENCE_SCOPE_SYSTEM << HSA_PACKET_HEADER_ACQUIRE_FENCE_SCOPE) | (HSA_FENCE_SCOPE_SYSTEM << HSA_PACKET_HEADER_RELEASE_FENCE_SCOPE); -static const uint16_t kBarrierPacketAcquireHeader = +static constexpr uint16_t kBarrierPacketAcquireHeader = (HSA_PACKET_TYPE_BARRIER_AND << HSA_PACKET_HEADER_TYPE) | (1 << HSA_PACKET_HEADER_BARRIER) | (HSA_FENCE_SCOPE_SYSTEM << HSA_PACKET_HEADER_ACQUIRE_FENCE_SCOPE) | (HSA_FENCE_SCOPE_NONE << HSA_PACKET_HEADER_RELEASE_FENCE_SCOPE); -static const uint16_t kBarrierPacketReleaseHeader = +static constexpr uint16_t kBarrierPacketReleaseHeader = (HSA_PACKET_TYPE_BARRIER_AND << HSA_PACKET_HEADER_TYPE) | (1 << HSA_PACKET_HEADER_BARRIER) | (HSA_FENCE_SCOPE_NONE << HSA_PACKET_HEADER_ACQUIRE_FENCE_SCOPE) | (HSA_FENCE_SCOPE_SYSTEM << HSA_PACKET_HEADER_RELEASE_FENCE_SCOPE); -static const hsa_barrier_and_packet_t kBarrierAcquirePacket = { +static constexpr hsa_barrier_and_packet_t kBarrierAcquirePacket = { kBarrierPacketAcquireHeader, 0, 0, {{0}}, 0, {0}}; -static const hsa_barrier_and_packet_t kBarrierReleasePacket = { +static constexpr hsa_barrier_and_packet_t kBarrierReleasePacket = { kBarrierPacketReleaseHeader, 0, 0, {{0}}, 0, {0}}; double Timestamp::ticksToTime_ = 0; diff --git a/projects/clr/rocclr/include/top.hpp b/projects/clr/rocclr/include/top.hpp index 5c087393db..44e2076760 100644 --- a/projects/clr/rocclr/include/top.hpp +++ b/projects/clr/rocclr/include/top.hpp @@ -89,13 +89,13 @@ const pointer badPointer = (pointer)(intptr_t)_BAD_INTPTR; const address badAddress = (address)(intptr_t)_BAD_INTPTR; //! \endcond -const size_t Ki = 1024; -const size_t Mi = Ki * Ki; -const size_t Gi = Ki * Ki * Ki; +constexpr size_t Ki = 1024; +constexpr size_t Mi = Ki * Ki; +constexpr size_t Gi = Ki * Ki * Ki; -const size_t K = 1000; -const size_t M = K * K; -const size_t G = K * K * K; +constexpr size_t K = 1000; +constexpr size_t M = K * K; +constexpr size_t G = K * K * K; #include "utils/debug.hpp" diff --git a/projects/clr/rocclr/os/os.hpp b/projects/clr/rocclr/os/os.hpp index bb7fa2ccdc..65f5d0cefe 100644 --- a/projects/clr/rocclr/os/os.hpp +++ b/projects/clr/rocclr/os/os.hpp @@ -95,7 +95,7 @@ class Os : AllStatic { static bool MemoryUnmapFile(const void* mmap_ptr, size_t mmap_size); private: - static const size_t FILE_PATH_MAX_LENGTH = 1024; + static constexpr size_t FILE_PATH_MAX_LENGTH = 1024; static size_t pageSize_; //!< The default os page size. static int processorCount_; //!< The number of active processors. diff --git a/projects/clr/rocclr/platform/activity.hpp b/projects/clr/rocclr/platform/activity.hpp index 2a6701cb55..f2474b4b6b 100644 --- a/projects/clr/rocclr/platform/activity.hpp +++ b/projects/clr/rocclr/platform/activity.hpp @@ -93,7 +93,7 @@ class CallbacksTable { class ActivityProf { public: // Domain ID - static const int ACTIVITY_DOMAIN_ID = ACTIVITY_DOMAIN_HIP_VDI; + static constexpr int ACTIVITY_DOMAIN_ID = ACTIVITY_DOMAIN_HIP_VDI; ActivityProf() : command_id_(0), queue_id_(0), device_id_(0), record_id_(0), enabled_(false) {} diff --git a/projects/clr/rocclr/platform/agent.cpp b/projects/clr/rocclr/platform/agent.cpp index ed56c63d5c..46bce0b612 100644 --- a/projects/clr/rocclr/platform/agent.cpp +++ b/projects/clr/rocclr/platform/agent.cpp @@ -276,7 +276,7 @@ static int32_t CL_API_CALL SetICDDispatchTable(vdi_agent* agent, const cl_icd_di } // namespace agent -vdi_agent Agent::entryPoints_ = {agent::GetVersionNumber, +const vdi_agent Agent::entryPoints_ = {agent::GetVersionNumber, agent::GetPlatform, agent::GetTime, agent::SetCallbacks, diff --git a/projects/clr/rocclr/platform/agent.hpp b/projects/clr/rocclr/platform/agent.hpp index 1a02f446c1..77c046d5d2 100644 --- a/projects/clr/rocclr/platform/agent.hpp +++ b/projects/clr/rocclr/platform/agent.hpp @@ -33,7 +33,7 @@ class Agent : public _vdi_agent { //! Linked list of agent instances static Agent* list_; //! Agent API entry points - static vdi_agent entryPoints_; + static const vdi_agent entryPoints_; //! Capabilities supported by this Agent implementation static vdi_agent_capabilities potentialCapabilities_; //! Union of all agent's enabled capabilities diff --git a/projects/clr/rocclr/platform/command.hpp b/projects/clr/rocclr/platform/command.hpp index 2816654633..1eb7d0f0b0 100644 --- a/projects/clr/rocclr/platform/command.hpp +++ b/projects/clr/rocclr/platform/command.hpp @@ -551,7 +551,7 @@ class WriteMemoryCommand : public OneMemoryArgCommand { class FillMemoryCommand : public OneMemoryArgCommand { public: - const static size_t MaxFillPatterSize = sizeof(double[16]); + static constexpr size_t MaxFillPatterSize = sizeof(double[16]); private: Coord3D origin_; //!< Origin of the region to write to. @@ -1309,9 +1309,9 @@ class SvmUnmapMemoryCommand : public Command { */ class TransferBufferFileCommand : public OneMemoryArgCommand { public: - static const uint NumStagingBuffers = 2; - static const size_t StagingBufferSize = 4 * Mi; - static const uint StagingBufferMemType = CL_MEM_USE_PERSISTENT_MEM_AMD; + static constexpr uint NumStagingBuffers = 2; + static constexpr size_t StagingBufferSize = 4 * Mi; + static constexpr uint StagingBufferMemType = CL_MEM_USE_PERSISTENT_MEM_AMD; protected: const Coord3D origin_; //!< Origin of the region to write to diff --git a/projects/clr/rocclr/platform/commandqueue.hpp b/projects/clr/rocclr/platform/commandqueue.hpp index cd39a041c9..fbe7b5b401 100644 --- a/projects/clr/rocclr/platform/commandqueue.hpp +++ b/projects/clr/rocclr/platform/commandqueue.hpp @@ -46,7 +46,7 @@ class DeviceQueue; class CommandQueue : public RuntimeObject { public: - static const uint RealTimeDisabled = 0xffffffff; + static constexpr uint RealTimeDisabled = 0xffffffff; enum class Priority : uint { Low = 0, Normal , Medium, High }; struct Properties { diff --git a/projects/clr/rocclr/platform/memory.cpp b/projects/clr/rocclr/platform/memory.cpp index 28d0544eeb..66c0a3bf36 100644 --- a/projects/clr/rocclr/platform/memory.cpp +++ b/projects/clr/rocclr/platform/memory.cpp @@ -862,7 +862,7 @@ bool Image::Format::isValid() const { } // definition of list of supported formats -cl_image_format Image::supportedFormats[] = { +const cl_image_format Image::supportedFormats[]= { // R {CL_R, CL_SNORM_INT8}, {CL_R, CL_SNORM_INT16}, @@ -975,14 +975,14 @@ const uint32_t NUM_CHANNEL_ORDER_OF_DEPTH = 2; // The number of channel orders of DEPTH at the end of the table supportedFormats above. // definition of list of supported RA formats -cl_image_format Image::supportedFormatsRA[] = { +const cl_image_format Image::supportedFormatsRA[] = { {CL_RA, CL_SNORM_INT8}, {CL_RA, CL_SNORM_INT16}, {CL_RA, CL_UNORM_INT8}, {CL_RA, CL_UNORM_INT16}, {CL_RA, CL_SIGNED_INT8}, {CL_RA, CL_SIGNED_INT16}, {CL_RA, CL_SIGNED_INT32}, {CL_RA, CL_UNSIGNED_INT8}, {CL_RA, CL_UNSIGNED_INT16}, {CL_RA, CL_UNSIGNED_INT32}, {CL_RA, CL_HALF_FLOAT}, {CL_RA, CL_FLOAT}, }; -cl_image_format Image::supportedDepthStencilFormats[] = { +const cl_image_format Image::supportedDepthStencilFormats[] = { // DEPTH STENCIL {CL_DEPTH_STENCIL, CL_FLOAT}, {CL_DEPTH_STENCIL, CL_UNORM_INT24}}; diff --git a/projects/clr/rocclr/platform/memory.hpp b/projects/clr/rocclr/platform/memory.hpp index 531016d219..37a45bb97d 100755 --- a/projects/clr/rocclr/platform/memory.hpp +++ b/projects/clr/rocclr/platform/memory.hpp @@ -420,9 +420,9 @@ class Pipe : public Buffer { class Image : public Memory { public: // declaration of list of supported formats - static cl_image_format supportedFormats[]; - static cl_image_format supportedFormatsRA[]; - static cl_image_format supportedDepthStencilFormats[]; + static const cl_image_format supportedFormats[]; + static const cl_image_format supportedFormatsRA[]; + static const cl_image_format supportedDepthStencilFormats[]; static uint32_t numSupportedFormats(const Context& context, cl_mem_object_type image_type, cl_mem_flags flags = 0); static uint32_t getSupportedFormats(const Context& context, cl_mem_object_type image_type, diff --git a/projects/clr/rocclr/thread/monitor.hpp b/projects/clr/rocclr/thread/monitor.hpp index 120714fa5c..7581d13778 100644 --- a/projects/clr/rocclr/thread/monitor.hpp +++ b/projects/clr/rocclr/thread/monitor.hpp @@ -74,10 +74,10 @@ class Monitor : public HeapObject { typedef details::SimplyLinkedNode LinkedNode; private: - static const intptr_t kLockBit = 0x1; + static constexpr intptr_t kLockBit = 0x1; - static const int kMaxSpinIter = 55; //!< Total number of spin iterations. - static const int kMaxReadSpinIter = 50; //!< Read iterations before yielding + static constexpr int kMaxSpinIter = 55; //!< Total number of spin iterations. + static constexpr int kMaxReadSpinIter = 50; //!< Read iterations before yielding /*! Linked list of semaphores the contending threads are waiting on * and main lock. diff --git a/projects/clr/rocclr/utils/concurrent.hpp b/projects/clr/rocclr/utils/concurrent.hpp index 050371fc66..6814864408 100644 --- a/projects/clr/rocclr/utils/concurrent.hpp +++ b/projects/clr/rocclr/utils/concurrent.hpp @@ -34,7 +34,7 @@ namespace amd { /*@{*/ namespace details { template struct TaggedPointerHelper { - static const uintptr_t TagMask = (1u << N) - 1; + static constexpr uintptr_t TagMask = (1u << N) - 1; private: TaggedPointerHelper(); // Cannot instantiate diff --git a/projects/clr/rocclr/utils/util.hpp b/projects/clr/rocclr/utils/util.hpp index c36705456e..0c47539372 100644 --- a/projects/clr/rocclr/utils/util.hpp +++ b/projects/clr/rocclr/utils/util.hpp @@ -55,13 +55,13 @@ template <> struct NextPowerOfTwoFunction<1> { }; template struct NextPowerOfTwoHelper { - static const uint prev = NextPowerOfTwoHelper::value; - static const uint value = (prev >> S) | prev; + static constexpr uint prev = NextPowerOfTwoHelper::value; + static constexpr uint value = (prev >> S) | prev; }; -template struct NextPowerOfTwoHelper { static const int value = (N >> 1) | N; }; +template struct NextPowerOfTwoHelper { static constexpr int value = (N >> 1) | N; }; template struct NextPowerOfTwo { - static const uint value = NextPowerOfTwoHelper::value + 1; + static constexpr uint value = NextPowerOfTwoHelper::value + 1; }; //! \endcond @@ -83,10 +83,10 @@ template inline T nextPowerOfTwo(T val) { } // Compute log2(N) -template struct Log2 { static const uint value = Log2::value + 1; }; +template struct Log2 { static constexpr uint value = Log2::value + 1; }; // Break the recursion -template <> struct Log2<1> { static const uint value = 0; }; +template <> struct Log2<1> { static constexpr uint value = 0; }; /*! \brief Return the log2 for a value of type T. * @@ -190,7 +190,7 @@ inline uint leastBitSet64(uint64_t value) { #elif defined(__GNUC__) return value ? __builtin_ctzll(value) : (uint)-1; #else - static const uint8_t lookup67[67 + 1] = { + static constexpr uint8_t lookup67[67 + 1] = { 64, 0, 1, 39, 2, 15, 40, 23, 3, 12, 16, 59, 41, 19, 24, 54, 4, -1, 13, 10, 17, 62, 60, 28, 42, 30, 20, 51, 25, 44, 55, 47, 5, 32, -1, 38, 14, 22, 11, 58, 18, 53, 63, 9, 61, 27, 29, 50, 43, 46, 31, 37, 21, 57, 52, 8, 26, 49, 45, 36, 56, 7, 48, 35, 6, 34, 33, -1};