fix: [SWDEV-458862] [rocm/rocm_smi_lib]
Fixes reading pp_od_clk_voltage new variable format and size. Code changes related to the following: * get_od_clk_volt_info() * get_od_clk_volt_curve_regions() * Unit tests * CLI options removed: --showclkvolt, --showvc, --showvoltagerange, --setvc Change-Id: Ieedb845eeadcea2f2e447ec576c253ad2a814176 Signed-off-by: Oliveira, Daniel <daniel.oliveira@amd.com>
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Oliveira, Daniel authored and 
Maisam Arif committed
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@@ -1262,18 +1262,6 @@ For the new format, GFXCLK field will show min and max values(0/1). If the curre
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frequency in neither min/max but lies within the range, this is indicated by
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an additional value followed by * at index 1 and max value at index 2.
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*/
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constexpr uint32_t kOD_SCLK_label_array_index = 0;
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constexpr uint32_t kOD_MCLK_label_array_index =
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kOD_SCLK_label_array_index + 3;
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constexpr uint32_t kOD_VDDC_CURVE_label_array_index =
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kOD_MCLK_label_array_index + 2;
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constexpr uint32_t kOD_OD_RANGE_label_array_index =
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kOD_VDDC_CURVE_label_array_index + 4;
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constexpr uint32_t kOD_VDDC_CURVE_start_index =
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kOD_OD_RANGE_label_array_index + 3;
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// constexpr uint32_t kOD_VDDC_CURVE_num_lines =
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// kOD_VDDC_CURVE_start_index + 4;
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constexpr uint32_t kMIN_VALID_LINES = 2;
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static rsmi_status_t get_od_clk_volt_info(uint32_t dv_ind,
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@@ -1298,62 +1286,75 @@ static rsmi_status_t get_od_clk_volt_info(uint32_t dv_ind,
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return RSMI_STATUS_NOT_YET_IMPLEMENTED;
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}
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assert(val_vec[kOD_SCLK_label_array_index] == "OD_SCLK:" ||
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val_vec[kOD_SCLK_label_array_index] == "GFXCLK:");
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if ((val_vec[kOD_SCLK_label_array_index] != "OD_SCLK:") &&
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(val_vec[kOD_SCLK_label_array_index] != "GFXCLK:")) {
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return RSMI_STATUS_UNEXPECTED_DATA;
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//
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const std::string kTAG_OD_SCLK{"OD_SCLK:"};
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const std::string kTAG_GFXCLK{"GFXCLK:"};
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const std::string KTAG_OD_MCLK{"OD_MCLK:"};
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const std::string KTAG_MCLK{"MCLK:"};
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const std::string KTAG_FIRST_FREQ_IDX{"0:"};
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amd::smi::TextFileTagContents_t txt_power_dev_od_voltage(val_vec);
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txt_power_dev_od_voltage
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.set_title_terminator(":", amd::smi::TagSplitterPositional_t::kLAST)
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.set_key_data_splitter(":", amd::smi::TagSplitterPositional_t::kBETWEEN)
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.structure_content();
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//
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// Note: We must have minimum of 'GFXCLK:' && 'MCLK:' OR:
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// 'OD_SCLK:' && 'OD_MCLK:' tags.
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if (txt_power_dev_od_voltage.get_title_size() < kMIN_VALID_LINES) {
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return rsmi_status_t::RSMI_STATUS_NO_DATA;
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}
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// find last_item but skip empty lines
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int last_item = val_vec.size()-1;
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while (val_vec[last_item].empty() || val_vec[last_item][0] == 0)
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last_item--;
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p->curr_sclk_range.lower_bound = freq_string_to_int(val_vec, nullptr,
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nullptr, kOD_SCLK_label_array_index + 1);
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p->curr_sclk_range.upper_bound = freq_string_to_int(val_vec, nullptr,
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nullptr, kOD_SCLK_label_array_index + 2);
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if (val_vec.size() < (kOD_MCLK_label_array_index + 1)) {
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return RSMI_STATUS_UNEXPECTED_SIZE;
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}
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// The condition below checks if it is the old style or new style format.
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if (val_vec[kOD_MCLK_label_array_index] == "OD_MCLK:") {
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p->curr_mclk_range.lower_bound = 0;
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p->curr_mclk_range.upper_bound = freq_string_to_int(val_vec, nullptr,
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nullptr, kOD_MCLK_label_array_index + 1);
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} else if (val_vec[kOD_MCLK_label_array_index] == "MCLK:") {
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p->curr_mclk_range.lower_bound = freq_string_to_int(val_vec, nullptr,
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nullptr, kOD_MCLK_label_array_index + 1);
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// the upper memory frequency is the last
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p->curr_mclk_range.upper_bound = freq_string_to_int(val_vec, nullptr,
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nullptr, last_item);
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return RSMI_STATUS_SUCCESS;
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} else {
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if (val_vec.size() < (kOD_MCLK_label_array_index + 3)) {
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return RSMI_STATUS_UNEXPECTED_SIZE;
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}
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if (val_vec[kOD_MCLK_label_array_index + 1] == "MCLK:") {
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p->curr_sclk_range.upper_bound = freq_string_to_int(val_vec, nullptr,
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nullptr, kOD_SCLK_label_array_index + 3);
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p->curr_mclk_range.lower_bound = freq_string_to_int(val_vec, nullptr,
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nullptr, kOD_MCLK_label_array_index + 2);
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// the upper memory frequency is the last
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p->curr_mclk_range.upper_bound = freq_string_to_int(val_vec, nullptr,
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nullptr, last_item);
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return RSMI_STATUS_SUCCESS;
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}
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return RSMI_STATUS_NOT_YET_IMPLEMENTED;
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// Note: For debug builds/purposes only.
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assert(txt_power_dev_od_voltage.contains_title_key(kTAG_GFXCLK) ||
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txt_power_dev_od_voltage.contains_title_key(kTAG_OD_SCLK));
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// Note: For release builds/purposes.
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if (!txt_power_dev_od_voltage.contains_title_key(kTAG_GFXCLK) &&
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!txt_power_dev_od_voltage.contains_title_key(kTAG_OD_SCLK)) {
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return rsmi_status_t::RSMI_STATUS_UNEXPECTED_DATA;
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}
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if (val_vec.size() < kOD_VDDC_CURVE_label_array_index) {
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return RSMI_STATUS_UNEXPECTED_SIZE;
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}
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// Note: Quick helpers for getting 1st and last elements found
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auto build_lower_bound = [&](const std::string& prim_key) {
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auto lower_bound_data = txt_power_dev_od_voltage.get_structured_data_subkey_first(prim_key);
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return std::vector<std::string>{lower_bound_data};
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};
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p->num_regions =
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static_cast<uint32_t>((val_vec.size()) / 2);
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auto build_upper_bound = [&](const std::string& prim_key) {
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auto upper_bound_data = txt_power_dev_od_voltage.get_structured_data_subkey_last(prim_key);
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return std::vector<std::string>{upper_bound_data};
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};
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// Validates 'OD_SCLK' is in the structure
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if (txt_power_dev_od_voltage.contains_structured_key(kTAG_OD_SCLK,
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KTAG_FIRST_FREQ_IDX)) {
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p->curr_sclk_range.lower_bound = freq_string_to_int(build_lower_bound(kTAG_OD_SCLK), nullptr, nullptr, 0);
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p->curr_sclk_range.upper_bound = freq_string_to_int(build_upper_bound(kTAG_OD_SCLK), nullptr, nullptr, 0);
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// Validates 'OD_MCLK' is in the structure
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if (txt_power_dev_od_voltage.contains_structured_key(KTAG_OD_MCLK,
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KTAG_FIRST_FREQ_IDX)) {
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p->curr_mclk_range.lower_bound = freq_string_to_int(build_lower_bound(KTAG_OD_MCLK), nullptr, nullptr, 0);
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p->curr_mclk_range.upper_bound = freq_string_to_int(build_upper_bound(KTAG_OD_MCLK), nullptr, nullptr, 0);
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}
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}
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// Validates 'GFXCLK' is in the structure
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else if (txt_power_dev_od_voltage.contains_structured_key(kTAG_GFXCLK,
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KTAG_FIRST_FREQ_IDX)) {
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p->curr_sclk_range.lower_bound = freq_string_to_int(build_lower_bound(kTAG_GFXCLK), nullptr, nullptr, 0);
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p->curr_sclk_range.upper_bound = freq_string_to_int(build_upper_bound(kTAG_GFXCLK), nullptr, nullptr, 0);
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// Validates 'MCLK' is in the structure
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if (txt_power_dev_od_voltage.contains_structured_key(KTAG_MCLK,
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KTAG_FIRST_FREQ_IDX)) {
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p->curr_mclk_range.lower_bound = freq_string_to_int(build_lower_bound(KTAG_MCLK), nullptr, nullptr, 0);
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p->curr_mclk_range.upper_bound = freq_string_to_int(build_upper_bound(KTAG_MCLK), nullptr, nullptr, 0);
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}
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}
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else {
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return RSMI_STATUS_NOT_YET_IMPLEMENTED;
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}
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p->num_regions = 0;
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return RSMI_STATUS_SUCCESS;
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CATCH
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@@ -1561,30 +1562,6 @@ rsmi_status_t rsmi_dev_od_volt_info_set(uint32_t dv_ind, uint32_t vpoint,
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}
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static void get_vc_region(uint32_t start_ind,
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std::vector<std::string> *val_vec, rsmi_freq_volt_region_t *p) {
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std::ostringstream ss;
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ss << __PRETTY_FUNCTION__ << " | ======= start =======";
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LOG_TRACE(ss);
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assert(p != nullptr);
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assert(val_vec != nullptr);
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THROW_IF_NULLPTR_DEREF(p)
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THROW_IF_NULLPTR_DEREF(val_vec)
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// There must be at least 1 region to read in
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assert(val_vec->size() >= kOD_OD_RANGE_label_array_index + 2);
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assert((*val_vec)[kOD_OD_RANGE_label_array_index] == "OD_RANGE:");
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if ((val_vec->size() < kOD_OD_RANGE_label_array_index + 2) ||
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((*val_vec)[kOD_OD_RANGE_label_array_index] != "OD_RANGE:") ) {
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ss << __PRETTY_FUNCTION__ << " | ======= end ======= | returning "
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<< getRSMIStatusString(RSMI_STATUS_UNEXPECTED_DATA);
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LOG_TRACE(ss);
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throw amd::smi::rsmi_exception(RSMI_STATUS_UNEXPECTED_DATA, __FUNCTION__);
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}
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od_value_pair_str_to_range((*val_vec)[start_ind], &p->freq_range);
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od_value_pair_str_to_range((*val_vec)[start_ind + 1], &p->volt_range);
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}
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/*
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* num_regions [inout] on calling, the number of regions requested to be read
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* in. At completion, the number of regions actually read in
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@@ -1616,23 +1593,20 @@ static rsmi_status_t get_od_clk_volt_curve_regions(uint32_t dv_ind,
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// This is a work-around to handle systems where kDevPowerODVoltage is not
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// fully supported yet.
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if (val_vec.size() < 2) {
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if (val_vec.size() < kMIN_VALID_LINES) {
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ss << __PRETTY_FUNCTION__
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<< " | Issue: val_vec.size() < 2" << "; returning "
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<< " | Issue: val_vec.size() < " << kMIN_VALID_LINES << "; returning "
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<< getRSMIStatusString(RSMI_STATUS_NOT_YET_IMPLEMENTED);
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LOG_ERROR(ss);
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return RSMI_STATUS_NOT_YET_IMPLEMENTED;
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}
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uint32_t val_vec_size = static_cast<uint32_t>(val_vec.size());
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assert((val_vec_size - kOD_VDDC_CURVE_start_index) > 0);
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ss << __PRETTY_FUNCTION__
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<< " | val_vec_size = " << std::dec
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<< val_vec_size
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<< " | kOD_VDDC_CURVE_start_index = " << kOD_VDDC_CURVE_start_index;
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<< val_vec_size;
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LOG_DEBUG(ss);
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*num_regions = std::min((val_vec_size) / 2, *num_regions);
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*num_regions = 0;
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return RSMI_STATUS_SUCCESS;
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CATCH
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@@ -1098,14 +1098,6 @@ std::string print_rsmi_od_volt_freq_data_t(rsmi_od_volt_freq_data_t *odv) {
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ss << pt_rng_Mhz("\t**Current SCLK frequency range: ", &odv->curr_sclk_range);
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ss << pt_rng_Mhz("\t**Current MCLK frequency range: ", &odv->curr_mclk_range);
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ss << pt_rng_Mhz("\t**Min/Max Possible SCLK frequency range: ",
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&odv->sclk_freq_limits);
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ss << pt_rng_Mhz("\t**Min/Max Possible MCLK frequency range: ",
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&odv->mclk_freq_limits);
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ss << "\t**Current Freq/Volt. curve: " << "\n";
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ss << pt_vddc_curve(&odv->curve);
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ss << "\t**Number of Freq./Volt. regions: " << odv->num_regions << "\n\n";
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return ss.str();
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}
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@@ -1203,5 +1195,6 @@ std::queue<std::string> getAllDeviceGfxVers() {
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return deviceGfxVersions;
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}
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} // namespace smi
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} // namespace amd
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