Add HSA_CU_MASK
New environment variable HSA_CU_MASK allows users to
specify a cu mask to every queue allocated from any
GPU. hsa_amd_queue_cu_set_mask is restricted from
escaping this mask.
A new API hsa_amd_queue_cu_get_mask is added to query
the current cu mask.
Change-Id: I846c03a5faaca9b95067c31db84b59cc9fce2f03
[ROCm/ROCR-Runtime commit: 4455250be1]
This commit is contained in:
@@ -185,7 +185,16 @@ class AqlQueue : public core::Queue, private core::LocalSignal, public core::Doo
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/// @param cu_mask pointer to cu mask
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///
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/// @return hsa_status_t
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hsa_status_t SetCUMasking(const uint32_t num_cu_mask_count, const uint32_t* cu_mask) override;
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hsa_status_t SetCUMasking(uint32_t num_cu_mask_count, const uint32_t* cu_mask) override;
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/// @brief Get CU Masking
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///
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/// @param num_cu_mask_count size of mask bit array
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///
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/// @param cu_mask pointer to cu mask
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///
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/// @return hsa_status_t
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hsa_status_t GetCUMasking(uint32_t num_cu_mask_count, uint32_t* cu_mask) override;
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// @brief Submits a block of PM4 and waits until it has been executed.
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void ExecutePM4(uint32_t* cmd_data, size_t cmd_size_b) override;
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@@ -277,6 +286,12 @@ class AqlQueue : public core::Queue, private core::LocalSignal, public core::Doo
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// Exception notification signal
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Signal* exception_signal_;
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// CU mask lock
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KernelMutex mask_lock_;
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// Current CU mask
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std::vector<uint32_t> cu_mask_;
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// Shared event used for queue errors
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static HsaEvent* queue_event_;
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@@ -174,7 +174,7 @@ class GpuAgent : public GpuAgentInt {
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// id.
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// @param [in] node_props Node property.
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// @param [in] xnack_mode XNACK mode of device.
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GpuAgent(HSAuint32 node, const HsaNodeProperties& node_props, bool xnack_mode);
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GpuAgent(HSAuint32 node, const HsaNodeProperties& node_props, bool xnack_mode, uint32_t index);
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// @brief GPU agent destructor.
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~GpuAgent();
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@@ -322,6 +322,10 @@ class GpuAgent : public GpuAgentInt {
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return memory_max_frequency_;
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}
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// @brief Order the device is surfaced in hsa_iterate_agents counting only
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// GPU devices.
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__forceinline uint32_t enumeration_index() const { return enum_index_; }
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void Trim() override;
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protected:
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@@ -454,6 +458,9 @@ class GpuAgent : public GpuAgentInt {
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// @brief The GPU memory maximum frequency in MHz.
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uint32_t memory_max_frequency_;
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// @brief Enumeration index
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uint32_t enum_index_;
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// @brief HDP flush registers
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hsa_amd_hdp_flush_t HDP_flush_ = {nullptr, nullptr};
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@@ -144,8 +144,12 @@ class HostQueue : public Queue {
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std::memory_order_release);
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}
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hsa_status_t SetCUMasking(const uint32_t num_cu_mask_count, const uint32_t* cu_mask) override {
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return HSA_STATUS_ERROR;
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hsa_status_t SetCUMasking(uint32_t num_cu_mask_count, const uint32_t* cu_mask) override {
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return HSA_STATUS_ERROR_INVALID_QUEUE;
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}
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hsa_status_t GetCUMasking(uint32_t num_cu_mask_count, uint32_t* cu_mask) override {
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return HSA_STATUS_ERROR_INVALID_QUEUE;
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}
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void ExecutePM4(uint32_t* cmd_data, size_t cmd_size_b) override {
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@@ -113,6 +113,10 @@ hsa_status_t hsa_amd_queue_cu_set_mask(const hsa_queue_t* queue,
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uint32_t num_cu_mask_count,
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const uint32_t* cu_mask);
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// Mirrors Amd Extension Apis
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hsa_status_t HSA_API hsa_amd_queue_cu_get_mask(const hsa_queue_t* queue, uint32_t num_cu_mask_count,
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uint32_t* cu_mask);
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// Mirrors Amd Extension Apis
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hsa_status_t
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hsa_amd_memory_pool_get_info(hsa_amd_memory_pool_t memory_pool,
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@@ -114,9 +114,12 @@ class QueueWrapper : public Queue {
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uint64_t AddWriteIndexRelease(uint64_t value) override {
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return wrapped->AddWriteIndexRelease(value);
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}
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hsa_status_t SetCUMasking(const uint32_t num_cu_mask_count, const uint32_t* cu_mask) override {
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hsa_status_t SetCUMasking(uint32_t num_cu_mask_count, const uint32_t* cu_mask) override {
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return wrapped->SetCUMasking(num_cu_mask_count, cu_mask);
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}
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hsa_status_t GetCUMasking(uint32_t num_cu_mask_count, uint32_t* cu_mask) override {
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return wrapped->GetCUMasking(num_cu_mask_count, cu_mask);
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}
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void ExecutePM4(uint32_t* cmd_data, size_t cmd_size_b) override {
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wrapped->ExecutePM4(cmd_data, cmd_size_b);
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}
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@@ -295,8 +295,16 @@ class Queue : public Checked<0xFA3906A679F9DB49>, private LocalQueue {
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/// @param cu_mask pointer to cu mask
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///
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/// @return hsa_status_t
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virtual hsa_status_t SetCUMasking(const uint32_t num_cu_mask_count,
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const uint32_t* cu_mask) = 0;
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virtual hsa_status_t SetCUMasking(uint32_t num_cu_mask_count, const uint32_t* cu_mask) = 0;
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/// @brief Get CU Masking
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///
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/// @param num_cu_mask_count size of mask bit array
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///
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/// @param cu_mask pointer to cu mask
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///
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/// @return hsa_status_t
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virtual hsa_status_t GetCUMasking(uint32_t num_cu_mask_count, uint32_t* cu_mask) = 0;
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// @brief Submits a block of PM4 and waits until it has been executed.
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virtual void ExecutePM4(uint32_t* cmd_data, size_t cmd_size_b) = 0;
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