From 4d4616c7dd5ecc0df791047b5ed6dd4c48233634 Mon Sep 17 00:00:00 2001 From: Ramesh Errabolu Date: Tue, 19 Jul 2016 17:06:12 -0500 Subject: [PATCH] Fix computation of max_wave_id property Change-Id: I2ab145d301c92f39bbdb911e48aecccbd64ac82b [ROCm/ROCR-Runtime commit: da52417c147b9e9f6f605220bb19e425ad58dc26] --- .../runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp index 81b08e8e1e..3999fd5568 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp @@ -174,7 +174,7 @@ AqlQueue::AqlQueue(GpuAgent* agent, size_t req_size_pkts, HSAuint32 node_id, const auto& props = agent->properties(); amd_queue_.max_cu_id = (props.NumFComputeCores / props.NumSIMDPerCU) - 1; - amd_queue_.max_wave_id = props.MaxWavesPerSIMD - 1; + amd_queue_.max_wave_id = (props.MaxWavesPerSIMD * props.NumSIMDPerCU) - 1; #ifdef HSA_LARGE_MODEL AMD_HSA_BITS_SET(amd_queue_.queue_properties, AMD_QUEUE_PROPERTIES_IS_PTR64,