diff --git a/projects/amdsmi/CHANGELOG.md b/projects/amdsmi/CHANGELOG.md index ce8076f279..728dc727d6 100644 --- a/projects/amdsmi/CHANGELOG.md +++ b/projects/amdsmi/CHANGELOG.md @@ -51,6 +51,10 @@ Full documentation for amd_smi_lib is available at [https://rocm.docs.amd.com/pr - amdsmi_get_gpu_compute_process_info() - amdsmi_get_gpu_compute_process_info_by_pid() +- **Added new VRAM types to `amdsmi_vram_type_t`**. + - `amd-smi static --vram` & `amdsmi_get_gpu_vram_info()` now support the following types: + - DDR5, LPDDR4, LPDDR5, and HBM3E + ### Changed - N/A diff --git a/projects/amdsmi/include/amd_smi/amdsmi.h b/projects/amdsmi/include/amd_smi/amdsmi.h index 4c8a377971..33c4ab4696 100644 --- a/projects/amdsmi/include/amd_smi/amdsmi.h +++ b/projects/amdsmi/include/amd_smi/amdsmi.h @@ -619,7 +619,7 @@ typedef enum { * @cond @tag{gpu_bm_linux} @tag{host} @endcond */ typedef enum { - AMDSMI_VRAM_TYPE_UNKNOWN = 0, //!< Unknown memory type + AMDSMI_VRAM_TYPE_UNKNOWN = 0, //!< Unknown memory type // HBM AMDSMI_VRAM_TYPE_HBM = 1, //!< High Bandwidth Memory AMDSMI_VRAM_TYPE_HBM2 = 2, //!< High Bandwidth Memory, Generation 2 @@ -630,6 +630,7 @@ typedef enum { AMDSMI_VRAM_TYPE_DDR2 = 10, //!< Double Data Rate, Generation 2 AMDSMI_VRAM_TYPE_DDR3 = 11, //!< Double Data Rate, Generation 3 AMDSMI_VRAM_TYPE_DDR4 = 12, //!< Double Data Rate, Generation 4 + AMDSMI_VRAM_TYPE_DDR5 = 13, //!< Double Data Rate, Generation 5 // GDDR AMDSMI_VRAM_TYPE_GDDR1 = 17, //!< Graphics Double Data Rate, Generation 1 AMDSMI_VRAM_TYPE_GDDR2 = 18, //!< Graphics Double Data Rate, Generation 2 @@ -638,7 +639,10 @@ typedef enum { AMDSMI_VRAM_TYPE_GDDR5 = 21, //!< Graphics Double Data Rate, Generation 5 AMDSMI_VRAM_TYPE_GDDR6 = 22, //!< Graphics Double Data Rate, Generation 6 AMDSMI_VRAM_TYPE_GDDR7 = 23, //!< Graphics Double Data Rate, Generation 7 - AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_GDDR7 + // LPDDR + AMDSMI_VRAM_TYPE_LPDDR4 = 30, //!< Low Power Double Data Rate, Generation 4 + AMDSMI_VRAM_TYPE_LPDDR5 = 31, //!< Low Power Double Data Rate, Generation 5 + AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_LPDDR5 } amdsmi_vram_type_t; /** diff --git a/projects/amdsmi/include/amd_smi/impl/amd_smi_common.h b/projects/amdsmi/include/amd_smi/impl/amd_smi_common.h index 9dfdc09b2b..66b7082a8b 100644 --- a/projects/amdsmi/include/amd_smi/impl/amd_smi_common.h +++ b/projects/amdsmi/include/amd_smi/impl/amd_smi_common.h @@ -74,6 +74,10 @@ const std::map vram_type_map = { {7, AMDSMI_VRAM_TYPE_DDR3}, {8, AMDSMI_VRAM_TYPE_DDR4}, {9, AMDSMI_VRAM_TYPE_GDDR6}, + {10, AMDSMI_VRAM_TYPE_DDR5}, + {11, AMDSMI_VRAM_TYPE_LPDDR4}, + {12, AMDSMI_VRAM_TYPE_LPDDR5}, + {13, AMDSMI_VRAM_TYPE_HBM3E}, }; amdsmi_status_t rsmi_to_amdsmi_status(rsmi_status_t status); diff --git a/projects/amdsmi/py-interface/amdsmi_wrapper.py b/projects/amdsmi/py-interface/amdsmi_wrapper.py index 8bbffd2b1e..25fa782ec1 100644 --- a/projects/amdsmi/py-interface/amdsmi_wrapper.py +++ b/projects/amdsmi/py-interface/amdsmi_wrapper.py @@ -782,6 +782,7 @@ amdsmi_vram_type_t__enumvalues = { 10: 'AMDSMI_VRAM_TYPE_DDR2', 11: 'AMDSMI_VRAM_TYPE_DDR3', 12: 'AMDSMI_VRAM_TYPE_DDR4', + 13: 'AMDSMI_VRAM_TYPE_DDR5', 17: 'AMDSMI_VRAM_TYPE_GDDR1', 18: 'AMDSMI_VRAM_TYPE_GDDR2', 19: 'AMDSMI_VRAM_TYPE_GDDR3', @@ -789,7 +790,9 @@ amdsmi_vram_type_t__enumvalues = { 21: 'AMDSMI_VRAM_TYPE_GDDR5', 22: 'AMDSMI_VRAM_TYPE_GDDR6', 23: 'AMDSMI_VRAM_TYPE_GDDR7', - 23: 'AMDSMI_VRAM_TYPE__MAX', + 30: 'AMDSMI_VRAM_TYPE_LPDDR4', + 31: 'AMDSMI_VRAM_TYPE_LPDDR5', + 31: 'AMDSMI_VRAM_TYPE__MAX', } AMDSMI_VRAM_TYPE_UNKNOWN = 0 AMDSMI_VRAM_TYPE_HBM = 1 @@ -800,6 +803,7 @@ AMDSMI_VRAM_TYPE_HBM3E = 5 AMDSMI_VRAM_TYPE_DDR2 = 10 AMDSMI_VRAM_TYPE_DDR3 = 11 AMDSMI_VRAM_TYPE_DDR4 = 12 +AMDSMI_VRAM_TYPE_DDR5 = 13 AMDSMI_VRAM_TYPE_GDDR1 = 17 AMDSMI_VRAM_TYPE_GDDR2 = 18 AMDSMI_VRAM_TYPE_GDDR3 = 19 @@ -807,7 +811,9 @@ AMDSMI_VRAM_TYPE_GDDR4 = 20 AMDSMI_VRAM_TYPE_GDDR5 = 21 AMDSMI_VRAM_TYPE_GDDR6 = 22 AMDSMI_VRAM_TYPE_GDDR7 = 23 -AMDSMI_VRAM_TYPE__MAX = 23 +AMDSMI_VRAM_TYPE_LPDDR4 = 30 +AMDSMI_VRAM_TYPE_LPDDR5 = 31 +AMDSMI_VRAM_TYPE__MAX = 31 amdsmi_vram_type_t = ctypes.c_uint32 # enum class struct_amdsmi_range_t(Structure): pass @@ -904,22 +910,22 @@ amdsmi_frequency_range_t = struct_amdsmi_frequency_range_t class union_amdsmi_bdf_t(Union): pass -class struct_bdf_(Structure): +class struct_amdsmi_bdf_t(Structure): pass -struct_bdf_._pack_ = 1 # source:False -struct_bdf_._fields_ = [ +struct_amdsmi_bdf_t._pack_ = 1 # source:False +struct_amdsmi_bdf_t._fields_ = [ ('function_number', ctypes.c_uint64, 3), ('device_number', ctypes.c_uint64, 5), ('bus_number', ctypes.c_uint64, 8), ('domain_number', ctypes.c_uint64, 48), ] -class struct_amdsmi_bdf_t(Structure): +class struct_bdf_(Structure): pass -struct_amdsmi_bdf_t._pack_ = 1 # source:False -struct_amdsmi_bdf_t._fields_ = [ +struct_bdf_._pack_ = 1 # source:False +struct_bdf_._fields_ = [ ('function_number', ctypes.c_uint64, 3), ('device_number', ctypes.c_uint64, 5), ('bus_number', ctypes.c_uint64, 8), @@ -964,21 +970,6 @@ amdsmi_card_form_factor_t = ctypes.c_uint32 # enum class struct_amdsmi_pcie_info_t(Structure): pass -class struct_pcie_static_(Structure): - pass - -struct_pcie_static_._pack_ = 1 # source:False -struct_pcie_static_._fields_ = [ - ('max_pcie_width', ctypes.c_uint16), - ('PADDING_0', ctypes.c_ubyte * 2), - ('max_pcie_speed', ctypes.c_uint32), - ('pcie_interface_version', ctypes.c_uint32), - ('slot_type', amdsmi_card_form_factor_t), - ('max_pcie_interface_version', ctypes.c_uint32), - ('PADDING_1', ctypes.c_ubyte * 4), - ('reserved', ctypes.c_uint64 * 9), -] - class struct_pcie_metric_(Structure): pass @@ -999,6 +990,21 @@ struct_pcie_metric_._fields_ = [ ('reserved', ctypes.c_uint64 * 12), ] +class struct_pcie_static_(Structure): + pass + +struct_pcie_static_._pack_ = 1 # source:False +struct_pcie_static_._fields_ = [ + ('max_pcie_width', ctypes.c_uint16), + ('PADDING_0', ctypes.c_ubyte * 2), + ('max_pcie_speed', ctypes.c_uint32), + ('pcie_interface_version', ctypes.c_uint32), + ('slot_type', amdsmi_card_form_factor_t), + ('max_pcie_interface_version', ctypes.c_uint32), + ('PADDING_1', ctypes.c_ubyte * 4), + ('reserved', ctypes.c_uint64 * 9), +] + struct_amdsmi_pcie_info_t._pack_ = 1 # source:False struct_amdsmi_pcie_info_t._fields_ = [ ('pcie_static', struct_pcie_static_), @@ -1399,7 +1405,6 @@ struct_amdsmi_proc_info_t._fields_ = [ ('cu_occupancy', ctypes.c_uint32), ('evicted_time', ctypes.c_uint32), ('reserved', ctypes.c_uint32 * 10), - ('PADDING_1', ctypes.c_ubyte * 4), ] amdsmi_proc_info_t = struct_amdsmi_proc_info_t @@ -3328,16 +3333,17 @@ __all__ = \ 'AMDSMI_VOLT_TYPE_LAST', 'AMDSMI_VOLT_TYPE_VDDBOARD', 'AMDSMI_VOLT_TYPE_VDDGFX', 'AMDSMI_VRAM_TYPE_DDR2', 'AMDSMI_VRAM_TYPE_DDR3', 'AMDSMI_VRAM_TYPE_DDR4', - 'AMDSMI_VRAM_TYPE_GDDR1', 'AMDSMI_VRAM_TYPE_GDDR2', - 'AMDSMI_VRAM_TYPE_GDDR3', 'AMDSMI_VRAM_TYPE_GDDR4', - 'AMDSMI_VRAM_TYPE_GDDR5', 'AMDSMI_VRAM_TYPE_GDDR6', - 'AMDSMI_VRAM_TYPE_GDDR7', 'AMDSMI_VRAM_TYPE_HBM', - 'AMDSMI_VRAM_TYPE_HBM2', 'AMDSMI_VRAM_TYPE_HBM2E', - 'AMDSMI_VRAM_TYPE_HBM3', 'AMDSMI_VRAM_TYPE_HBM3E', - 'AMDSMI_VRAM_TYPE_UNKNOWN', 'AMDSMI_VRAM_TYPE__MAX', - 'AMDSMI_XGMI_LINK_DISABLE', 'AMDSMI_XGMI_LINK_DOWN', - 'AMDSMI_XGMI_LINK_UP', 'AMDSMI_XGMI_STATUS_ERROR', - 'AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS', + 'AMDSMI_VRAM_TYPE_DDR5', 'AMDSMI_VRAM_TYPE_GDDR1', + 'AMDSMI_VRAM_TYPE_GDDR2', 'AMDSMI_VRAM_TYPE_GDDR3', + 'AMDSMI_VRAM_TYPE_GDDR4', 'AMDSMI_VRAM_TYPE_GDDR5', + 'AMDSMI_VRAM_TYPE_GDDR6', 'AMDSMI_VRAM_TYPE_GDDR7', + 'AMDSMI_VRAM_TYPE_HBM', 'AMDSMI_VRAM_TYPE_HBM2', + 'AMDSMI_VRAM_TYPE_HBM2E', 'AMDSMI_VRAM_TYPE_HBM3', + 'AMDSMI_VRAM_TYPE_HBM3E', 'AMDSMI_VRAM_TYPE_LPDDR4', + 'AMDSMI_VRAM_TYPE_LPDDR5', 'AMDSMI_VRAM_TYPE_UNKNOWN', + 'AMDSMI_VRAM_TYPE__MAX', 'AMDSMI_XGMI_LINK_DISABLE', + 'AMDSMI_XGMI_LINK_DOWN', 'AMDSMI_XGMI_LINK_UP', + 'AMDSMI_XGMI_STATUS_ERROR', 'AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS', 'AMDSMI_XGMI_STATUS_NO_ERRORS', 'CLK_LIMIT_MAX', 'CLK_LIMIT_MIN', 'RD_BW0', 'WR_BW0', 'amd_metrics_table_header_t', 'amdsmi_accelerator_partition_profile_config_t',