SWDEV-371123 - Use barrier value packet for event records

Change-Id: I5e5e5e89e0d96a2430b4682d168b76848fa5b94e

rocclr/device/rocm/rocsettings.cpp

@@ -102,12 +102,14 @@ Settings::Settings() {
   fgs_kernel_arg_ = false;
   // by default for asics < gfx940 old single grid sync path is followed
   coop_sync_ = false;
+  barrier_value_packet_ = false;
 }
 
 // ================================================================================================
 bool Settings::create(bool fullProfile, uint32_t gfxipMajor, uint32_t gfxipMinor,
                       uint32_t gfxStepping, bool enableXNACK, bool coop_groups) {
   customHostAllocator_ = false;
+  uint32_t gcnArch = gfxipMajor * 100 + gfxipMinor * 10 + gfxStepping;
 
   if (fullProfile) {
     pinnedXferSize_ = 0;
@@ -162,6 +164,11 @@ bool Settings::create(bool fullProfile, uint32_t gfxipMajor, uint32_t gfxipMinor
     enableExtension(ClAmdFp64);
   }
 
+  if (gcnArch == 910) {
+    // Barrier Value packet is only supported on MI200 for now
+    barrier_value_packet_ = true;
+  }
+
   if (gfxipMajor >= 10) {
      enableWave32Mode_ = true;
      enableWgpMode_ = GPU_ENABLE_WGP_MODE;
@@ -175,7 +182,7 @@ bool Settings::create(bool fullProfile, uint32_t gfxipMajor, uint32_t gfxipMinor
     enableWave32Mode_ = GPU_ENABLE_WAVE32_MODE;
   }
 
-  if (gfxipMajor >= 9 && gfxipMinor >= 4 && gfxStepping >= 0) {
+  if (gcnArch >= 940) {
     coop_sync_ = true;
   }