rocprofv3: PC Sampling Support (#14)

* Adding tool pc sampling support

Fixing merge issue

tool support on SDKupdates

link amd-comgr

Sanitizer failure fix

fix format

Addressing review comments

misc fix

Adding dispatch id to the CSV output

AddingCHANGELOG

[ROCProfV3][PC Sampling] Initial ROCProfV3 PC sampling tests for JSON and CSV formats (#17)

ROCProfV3 initial tests for JSON and CSV output.

Simple kernels that simplify the verification of samples to instruction decoding
has been introduced.

removing option to enable pc sampling explicitly

Adding documentation

no pc-sampling option in tests anymore

Addressing review comments

Updating docs

an option for choosing whether all units must be sampled

try ignoring PC sampling tests (#36)

* run pc-sampling tests on MI2xx runners
* use v_fmac_f32 instead of s_nop 0 in tests

* fixing docs

source/lib/output/generateCSV.cpp

@@ -717,6 +717,65 @@ generate_csv(const output_config&                                           cfg,
     }
 }
 
+void
+generate_csv(const output_config&                                              cfg,
+             const metadata&                                                   tool_metadata,
+             const generator<rocprofiler_tool_pc_sampling_host_trap_record_t>& data,
+             const stats_entry_t&                                              stats)
+{
+    if(data.empty()) return;
+
+    if(cfg.stats && stats)
+        write_stats(get_stats_output_file(cfg, domain_type::PC_SAMPLING_HOST_TRAP), stats.entries);
+
+    auto ofs = tool::csv_output_file{cfg,
+                                     domain_type::PC_SAMPLING_HOST_TRAP,
+                                     tool::csv::pc_sampling_host_trap_csv_encoder{},
+                                     {"Sample_Timestamp",
+                                      "Exec_Mask",
+                                      "Dispatch_Id",
+                                      "Instruction",
+                                      "Instruction_Comment",
+                                      "Correlation_Id"}};
+    for(auto ditr : data)
+    {
+        for(const auto& record : data.get(ditr))
+        {
+            if(record.inst_index == -1)
+            {
+                auto        row_ss = std::stringstream{};
+                std::string inst_comment =
+                    "Unrecognized code object id, physical virtual address of PC:" +
+                    std::to_string(record.pc_sample_record.pc.code_object_offset);
+                rocprofiler::tool::csv::pc_sampling_host_trap_csv_encoder::write_row(
+                    row_ss,
+                    record.pc_sample_record.timestamp,
+                    record.pc_sample_record.exec_mask,
+                    record.pc_sample_record.dispatch_id,
+                    "",
+                    inst_comment,
+                    record.pc_sample_record.correlation_id.internal);
+
+                ofs << row_ss.str();
+            }
+            else
+            {
+                auto row_ss = std::stringstream{};
+                rocprofiler::tool::csv::pc_sampling_host_trap_csv_encoder::write_row(
+                    row_ss,
+                    record.pc_sample_record.timestamp,
+                    record.pc_sample_record.exec_mask,
+                    record.pc_sample_record.dispatch_id,
+                    tool_metadata.get_instruction(record.inst_index),
+                    tool_metadata.get_comment(record.inst_index),
+                    record.pc_sample_record.correlation_id.internal);
+
+                ofs << row_ss.str();
+            }
+        }
+    }
+}
+
 void
 generate_csv(const output_config& cfg,
              const metadata& /*tool_metadata*/,