diff --git a/projects/hip-tests/catch/unit/memory/hipMemcpy3D.cc b/projects/hip-tests/catch/unit/memory/hipMemcpy3D.cc index 79b9d0f90f..026be6c5d6 100644 --- a/projects/hip-tests/catch/unit/memory/hipMemcpy3D.cc +++ b/projects/hip-tests/catch/unit/memory/hipMemcpy3D.cc @@ -33,7 +33,7 @@ THE SOFTWARE. TEST_CASE("Unit_hipMemcpy3D_Positive_Basic") { constexpr bool async = false; - //SWDEV-409754 SECTION("Device to Host") { Memcpy3DDeviceToHostShell(Memcpy3DWrapper<>); } + SECTION("Device to Host") { Memcpy3DDeviceToHostShell(Memcpy3DWrapper<>); } SECTION("Device to Device") { SECTION("Peer access disabled") { @@ -42,9 +42,9 @@ TEST_CASE("Unit_hipMemcpy3D_Positive_Basic") { SECTION("Peer access enabled") { Memcpy3DDeviceToDeviceShell(Memcpy3DWrapper<>); } } - //SWDEV-409754 SECTION("Host to Device") { Memcpy3DHostToDeviceShell(Memcpy3DWrapper<>); } + SECTION("Host to Device") { Memcpy3DHostToDeviceShell(Memcpy3DWrapper<>); } - //SWDEV-409754 SECTION("Host to Host") { Memcpy3DHostToHostShell(Memcpy3DWrapper<>); } + SECTION("Host to Host") { Memcpy3DHostToHostShell(Memcpy3DWrapper<>); } } TEST_CASE("Unit_hipMemcpy3D_Positive_Synchronization_Behavior") { @@ -76,7 +76,7 @@ TEST_CASE("Unit_hipMemcpy3D_Positive_Parameters") { TEST_CASE("Unit_hipMemcpy3D_Positive_Array") { constexpr bool async = false; - //SWDEV-409754 SECTION("Array from/to Host") { Memcpy3DArrayHostShell(Memcpy3DWrapper); } + SECTION("Array from/to Host") { Memcpy3DArrayHostShell(Memcpy3DWrapper); } #if HT_NVIDIA // Disabled on AMD due to defect - EXSWHTEC-238 SECTION("Array from/to Device") { Memcpy3DArrayDeviceShell(Memcpy3DWrapper); } #endif diff --git a/projects/hip-tests/catch/unit/memory/hipMemcpy3DAsync.cc b/projects/hip-tests/catch/unit/memory/hipMemcpy3DAsync.cc index d346bdcac5..93baeb42d2 100644 --- a/projects/hip-tests/catch/unit/memory/hipMemcpy3DAsync.cc +++ b/projects/hip-tests/catch/unit/memory/hipMemcpy3DAsync.cc @@ -50,7 +50,7 @@ TEST_CASE("Unit_hipMemcpy3DAsync_Positive_Basic") { SECTION("Host to Device") { Memcpy3DHostToDeviceShell(Memcpy3DWrapper, stream); } - //SWDEV-409754 SECTION("Host to Host") { Memcpy3DHostToHostShell(Memcpy3DWrapper, stream); } + SECTION("Host to Host") { Memcpy3DHostToHostShell(Memcpy3DWrapper, stream); } } TEST_CASE("Unit_hipMemcpy3DAsync_Positive_Synchronization_Behavior") { @@ -84,7 +84,7 @@ TEST_CASE("Unit_hipMemcpy3DAsync_Positive_Parameters") { TEST_CASE("Unit_hipMemcpy3DAsync_Positive_Array") { constexpr bool async = true; - //SWDEV-409754 SECTION("Array from/to Host") { Memcpy3DArrayHostShell(Memcpy3DWrapper); } + SECTION("Array from/to Host") { Memcpy3DArrayHostShell(Memcpy3DWrapper); } #if HT_NVIDIA // Disabled on AMD due to defect - EXSWHTEC-238 SECTION("Array from/to Device") { Memcpy3DArrayDeviceShell(Memcpy3DWrapper); } #endif