Add 'projects/rocr-runtime/libhsakmt/include/impl/' from commit 'c34ec1e52fcb52da248c00207ebe646197ea9d3e'
git-subtree-dir: projects/rocr-runtime/libhsakmt/include/impl git-subtree-mainline:55f7d39fa5git-subtree-split:c34ec1e52f
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#ifndef _WSL_INC_THUNK_PROXY_H_
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#define _WSL_INC_THUNK_PROXY_H_
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#include <vector>
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namespace thunk_proxy {
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enum AllocDomain {
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kSystem,
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kLocal,
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kUserMemory,
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kUserQueue,
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kDomainCount,
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};
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enum MemFlag {
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kFineGrain = (1ULL << 0),
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kKernarg = (1ULL << 1),
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};
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enum EngineFlag {
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KCOMPUTE0 = (1ULL << 0),
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KDRMDMA = (1ULL << 1),
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KDRMDMA1 = (1ULL << 2),
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};
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enum SchedLevel {
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kLow = 0,
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kNormal = 1,
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kHigh = 2,
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};
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struct HwsInfo {
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union {
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struct {
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uint32_t gfxHwsEnabled : 1;
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uint32_t computeHwsEnabled : 1;
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uint32_t dmaHwsEnabled : 1;
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uint32_t dma1HwsEnabled : 1;
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uint32_t reserved : 28;
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} hwsMask;
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uint32_t osHwsEnableFlags;
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};
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uint64_t engineOrdinalMask; // Indicates which engines (by ordinal) support MES HWS
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};
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typedef struct {
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int major;
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int minor;
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int stepping;
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bool is_dgpu;
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char product_name[MAX_PATH];
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uint64_t uuid;
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uint32_t family;
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uint32_t device_id;
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uint32_t wavefront_size;
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uint32_t compute_unit_count;
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uint32_t max_engine_clock_mhz;
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uint32_t watch_points_num;
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uint32_t pci_bus_addr;
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uint32_t memory_bus_width;
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uint32_t max_memory_clock_mhz;
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uint64_t gpu_counter_frequency;
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uint32_t wave_per_cu;
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uint32_t simd_per_cu;
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uint32_t max_scratch_slots_per_cu;
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uint32_t num_shader_engine;
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uint32_t shader_array_per_shader_engine;
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uint32_t domain;
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uint32_t num_gws;
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uint32_t asic_revision;
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uint64_t local_visible_heap_size;
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uint64_t local_invisible_heap_size;
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uint64_t non_local_heap_size;
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uint64_t private_aperture_base;
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uint64_t private_aperture_size;
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uint64_t shared_aperture_base;
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uint64_t shared_aperture_size;
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uint32_t user_queue_size;
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uint32_t lds_size;
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uint32_t big_page_alignment_size;
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uint32_t hw_big_page_min_alignment_size;
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uint32_t hw_big_page_alignment_size;
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bool enable_big_page_alignment;
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uint32_t mec_fw_version;
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uint32_t sdma_fw_version;
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uint32_t l1_cache_size;
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uint32_t l2_cache_size;
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uint32_t l3_cache_size;
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uint32_t gl2_cacheline_size;
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uint32_t num_cp_queues;
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HwsInfo hwsInfo;
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std::vector<int> sdma_schedid;
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uint32_t compute_schedid;
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bool state_shadowing_by_cpfw;
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bool platform_atomic_support;
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void *adapter_info;
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uint32_t kmd_version;
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} DeviceInfo;
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int EngineOrdinal(int engine, DeviceInfo *device_info);
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bool GetHwsEnabled(int engine, DeviceInfo *device_info);
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bool ShouldDisableGpuTimeout(int engine, DeviceInfo *device_info);
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bool ParseAdapterInfo(D3DKMT_HANDLE adapter, DeviceInfo *device_info);
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bool QueryAdapterSupported(unsigned int device_id);
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uint32_t QueueEngine2EngineFlag(uint32_t queue_engine);
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void SetAllocationInfo(void *data, uint64_t size, AllocDomain domain,
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uint64_t addr, uint32_t mem_flags, uint32_t engine_flag, const DeviceInfo &device_info);
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void GetAllocPrivDataSize(int *priv_drv_data_size, int *priv_alloc_data_size);
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void FillinAllocPrivDrvData(void *drv_priv, int priv_alloc_data_size);
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int GetSubmitPrivDataSize();
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void FillinSubmitPrivData(void *priv_data, D3DKMT_HANDLE queue, uint64_t command_addr,
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uint64_t command_size, bool is_hw_queue);
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int GetHwQueuePrivDataSize();
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void FillinHwQueuePrivData(void *priv_data, bool FwManagedGfxState, SchedLevel level = kNormal);
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int GetContextPrivDataSize();
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void FillinContextPrivData(void *priv_data, bool FwManagedGfxState);
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int GetPowerOptPrivDataSize();
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void FillinPowerOptPrivData(void *priv_data, bool restore);
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}
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#endif
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@@ -0,0 +1,169 @@
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////////////////////////////////////////////////////////////////////////////////
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//
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// The University of Illinois/NCSA
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// Open Source License (NCSA)
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//
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// Copyright (c) 2014-2015, Advanced Micro Devices, Inc. All rights reserved.
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//
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// Developed by:
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//
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// AMD Research and AMD HSA Software Development
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//
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// Advanced Micro Devices, Inc.
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//
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// www.amd.com
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to
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// deal with the Software without restriction, including without limitation
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// the rights to use, copy, modify, merge, publish, distribute, sublicense,
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// and/or sell copies of the Software, and to permit persons to whom the
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// Software is furnished to do so, subject to the following conditions:
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//
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// - Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimers.
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// - Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimers in
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// the documentation and/or other materials provided with the distribution.
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// - Neither the names of Advanced Micro Devices, Inc,
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// nor the names of its contributors may be used to endorse or promote
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// products derived from this Software without specific prior written
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// permission.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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// THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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// DEALINGS WITH THE SOFTWARE.
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//
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////////////////////////////////////////////////////////////////////////////////
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#ifndef _WSL_INC_THUNK_PROXY_WDDM_TYPES_H_
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#define _WSL_INC_THUNK_PROXY_WDDM_TYPES_H_
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#include <stdint.h>
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#include <no_sal2.h>
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typedef uint32_t UINT, *UINT_PTR;
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typedef int32_t INT32;
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typedef int32_t LONG;
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typedef uint32_t ULONG, *ULONG_PTR;
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typedef int64_t LONGLONG;
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typedef int64_t LONG64;
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typedef uint64_t ULONGLONG;
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typedef uint64_t ULONG64, *ULONG64_PTR;
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typedef uint8_t BYTE;
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typedef uint16_t WORD;
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typedef uint32_t DWORD;
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typedef int32_t BOOL;
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typedef int32_t NTSTATUS;
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typedef uint16_t USHORT;
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typedef uint16_t UINT16;
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typedef uint32_t UINT32;
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typedef uint64_t UINT64;
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typedef int32_t INT;
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typedef uint64_t SIZE_T;
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typedef void VOID;
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typedef float FLOAT;
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typedef char CHAR;
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typedef unsigned char UCHAR;
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typedef UCHAR BOOLEAN;
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typedef int16_t WCHAR;
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typedef void *HANDLE;
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typedef void *PVOID;
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typedef void *LPVOID;
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typedef const int16_t *PCWSTR;
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#define ULONG ULONG
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#define ULONG_PTR ULONG_PTR
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#define USHORT USHORT
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#define DECLARE_HANDLE(name) struct name##__{int unused;}; typedef struct name##__ *name
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#define C_ASSERT(e) typedef char __C_ASSERT__[(e)?1:-1]
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DECLARE_HANDLE(HWND);
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DECLARE_HANDLE(HDC);
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DECLARE_HANDLE(PALETTEENTRY);
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typedef struct tagPOINT {
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LONG x;
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LONG y;
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} POINT;
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typedef struct tagRECT {
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LONG left;
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LONG top;
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LONG right;
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LONG bottom;
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} RECT;
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typedef struct tagRECTL {
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LONG left;
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LONG top;
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LONG right;
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LONG bottom;
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} RECTL;
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typedef union _LARGE_INTEGER {
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struct {
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DWORD LowPart;
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DWORD HighPart;
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} u;
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LONGLONG QuadPart;
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} LARGE_INTEGER;
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typedef LARGE_INTEGER *PLARGE_INTEGER;
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typedef union _ULARGE_INTEGER {
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struct {
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ULONG LowPart;
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ULONG HighPart;
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} DUMMYSTRUCTNAME;
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struct {
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ULONG LowPart;
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ULONG HighPart;
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} u;
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ULONGLONG QuadPart;
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} ULARGE_INTEGER;
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typedef ULARGE_INTEGER *PULARGE_INTEGER;
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typedef struct _LUID {
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ULONG LowPart;
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LONG HighPart;
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} LUID, *PLUID;
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typedef enum _DEVICE_POWER_STATE {
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PowerDeviceUnspecified = 0,
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PowerDeviceD0,
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PowerDeviceD1,
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PowerDeviceD2,
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PowerDeviceD3,
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PowerDeviceMaximum
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} DEVICE_POWER_STATE, *PDEVICE_POWER_STATE;
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#define _Check_return_
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#define APIENTRY
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#define CONST const
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#define IN
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#define OUT
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#define FAR
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#define MAX_PATH 260
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#define __stdcall
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#ifndef GUID_DEFINED
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#define GUID_DEFINED
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typedef struct _GUID {
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uint32_t Data1;
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uint16_t Data2;
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uint16_t Data3;
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uint8_t Data4[ 8 ];
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} GUID;
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#endif
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#include <guiddef.h>
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#endif
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