[rocprof-compute] Generalize Roofline (#325)
* per kernel analysis Roofline * added per-kernel eval_metric calculation with display * fixed typo * updated tty.py show_all() * formatting * fixed ctest failures and updated equations * formatting * updated metric descriptoins * review tweaks * update docs * added roofline gui analysis * updated GUI docs * updated print statement * comment tweaks and ran ruff formatting
Tá an tiomantas seo le fáil i:
tiomanta ag
GitHub
tuismitheoir
71b725f307
tiomantas
5840940caa
@@ -23,12 +23,12 @@ src/rocprof_compute_soc/analysis_configs/gfx940/0300_memory_chart.yaml: cff5509a
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src/rocprof_compute_soc/analysis_configs/gfx941/0300_memory_chart.yaml: cff5509ac8502bad6dbd75e3058159fe429aece5d93279c66b2a6a8c887b43b6
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src/rocprof_compute_soc/analysis_configs/gfx942/0300_memory_chart.yaml: cff5509ac8502bad6dbd75e3058159fe429aece5d93279c66b2a6a8c887b43b6
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src/rocprof_compute_soc/analysis_configs/gfx950/0300_memory_chart.yaml: 643b31ffa43bc3613d6f90b0c23d95093d0d0aa5bc8e72d9a0fbc1b739a08b67
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src/rocprof_compute_soc/analysis_configs/gfx908/0400_roofline.yaml: 57f95dcd487dfcdf24e1c2d8eb16d14dc3462df83d11a08e7de2b06343b48c3e
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src/rocprof_compute_soc/analysis_configs/gfx90a/0400_roofline.yaml: 57f95dcd487dfcdf24e1c2d8eb16d14dc3462df83d11a08e7de2b06343b48c3e
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src/rocprof_compute_soc/analysis_configs/gfx940/0400_roofline.yaml: 57f95dcd487dfcdf24e1c2d8eb16d14dc3462df83d11a08e7de2b06343b48c3e
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src/rocprof_compute_soc/analysis_configs/gfx941/0400_roofline.yaml: 57f95dcd487dfcdf24e1c2d8eb16d14dc3462df83d11a08e7de2b06343b48c3e
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src/rocprof_compute_soc/analysis_configs/gfx942/0400_roofline.yaml: 57f95dcd487dfcdf24e1c2d8eb16d14dc3462df83d11a08e7de2b06343b48c3e
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src/rocprof_compute_soc/analysis_configs/gfx950/0400_roofline.yaml: 57f95dcd487dfcdf24e1c2d8eb16d14dc3462df83d11a08e7de2b06343b48c3e
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src/rocprof_compute_soc/analysis_configs/gfx908/0400_roofline.yaml: 6406ce67cd55064f0d2db2a3511c6536cc1625314ddb31366900fbf3c60ed523
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src/rocprof_compute_soc/analysis_configs/gfx90a/0400_roofline.yaml: 100d555cf9e70b892e22f92ddd9c0a5d1f914d07077c4a8d35941e8ad62b5b30
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src/rocprof_compute_soc/analysis_configs/gfx940/0400_roofline.yaml: f8bf66f43c9afede4fd1f17c279050cc27cc6fbc1cdb53a71ae8ceb0eb84dc37
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src/rocprof_compute_soc/analysis_configs/gfx941/0400_roofline.yaml: 6fae04dcf4bcabe4a71f5d9eefc379a38d30cdf05fbb14e2c276e1c272fdb3f6
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src/rocprof_compute_soc/analysis_configs/gfx942/0400_roofline.yaml: c8dfe7df24f94dfa229ffa2035b802c6833ce98f7710e0889bc5710f2167d4c0
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src/rocprof_compute_soc/analysis_configs/gfx950/0400_roofline.yaml: 734fdfa818bfd8a87e01a0dd795c502a567c72158ca9b7bfe01e99451e8aa537
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src/rocprof_compute_soc/analysis_configs/gfx908/0500_command_processor_cpc_cpf.yaml: da1c2997d42d66da2aa069caa741cf9eade124357c56e4290333de2f3e0412bb
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src/rocprof_compute_soc/analysis_configs/gfx90a/0500_command_processor_cpc_cpf.yaml: da1c2997d42d66da2aa069caa741cf9eade124357c56e4290333de2f3e0412bb
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src/rocprof_compute_soc/analysis_configs/gfx940/0500_command_processor_cpc_cpf.yaml: da1c2997d42d66da2aa069caa741cf9eade124357c56e4290333de2f3e0412bb
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@@ -87,7 +87,9 @@ def update_analysis_config():
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data_source_config["metric_table"]["metric"],
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gfx_version,
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)
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new_panel_config["Panel Config"]["data source"].append(data_source_config)
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new_panel_config["Panel Config"]["data source"].append(
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data_source_config
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)
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# Write panel config to file
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filename = Path(
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TARGET_DIR.joinpath(gfx_version, f"{panel_id}_{panel_title}.yaml")
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@@ -134,9 +136,9 @@ def update_sets_config():
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}
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for metric_id in sets["metric"][gfx_version]:
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current_set["metric"].append(
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{metric_id: METRIC_ID_TO_NAME_MAP[gfx_version][str(metric_id)]}
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)
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current_set["metric"].append({
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metric_id: METRIC_ID_TO_NAME_MAP[gfx_version][str(metric_id)]
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})
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new_sets["sets"].append(current_set)
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@@ -2801,9 +2801,963 @@ panels:
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- id: 400
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title: Roofline
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data source:
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- None:
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- metric_table:
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id: 401
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title: Roofline
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title: Roofline Performance Rates
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cli_style: Roofline
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tui_style: Roofline
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header:
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metric: Metric
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value: Value
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unit: Unit
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peak: Peak (Empirical)
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metric:
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gfx90a:
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VALU FLOPs:
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value: AVG((($wave_size * (
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(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
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(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
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(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
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)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
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MFMA FLOPs (F64):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF64Flops_empirical_peak
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MFMA FLOPs (F32):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF32Flops_empirical_peak
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MFMA FLOPs (F16):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF16Flops_empirical_peak
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MFMA FLOPs (BF16):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMABF16Flops_empirical_peak
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MFMA IOPs (Int8):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GIOP/s
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peak: $MFMAI8Ops_empirical_peak
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HBM Bandwidth:
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value: AVG(((
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(TCC_EA_RDREQ_32B_sum * 32) +
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((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) * 64) +
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(TCC_EA_WRREQ_64B_sum * 64) +
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((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) * 32)
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) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GB/s
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peak: $HBMBw_empirical_peak
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L2 Cache Bandwidth:
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value: AVG(((((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
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TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) *
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64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GB/s
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peak: $L2Bw_empirical_peak
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L1 Cache Bandwidth:
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value: AVG((((TCP_TOTAL_CACHE_ACCESSES_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GB/s
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peak: $L1Bw_empirical_peak
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LDS Bandwidth:
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value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) *
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4 * $lds_banks_per_cu)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GB/s
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peak: $LDSBw_empirical_peak
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gfx908:
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VALU FLOPs:
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value: AVG((($wave_size * (
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(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
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(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
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(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
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)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
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MFMA FLOPs (F64):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF64Flops_empirical_peak
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MFMA FLOPs (F32):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF32Flops_empirical_peak
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MFMA FLOPs (F16):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF16Flops_empirical_peak
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MFMA FLOPs (BF16):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMABF16Flops_empirical_peak
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MFMA IOPs (Int8):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GIOP/s
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peak: $MFMAI8Ops_empirical_peak
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HBM Bandwidth:
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value: AVG(((
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(TCC_BUBBLE_sum * 128) +
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(TCC_EA0_RDREQ_32B_sum * 32) +
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((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64) +
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((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) +
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(TCC_EA0_WRREQ_64B_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GB/s
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peak: $HBMBw_empirical_peak
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L2 Cache Bandwidth:
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value: AVG(((((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
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TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) *
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64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GB/s
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peak: $L2Bw_empirical_peak
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L1 Cache Bandwidth:
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value: AVG((((TCP_TOTAL_CACHE_ACCESSES_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GB/s
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peak: $L1Bw_empirical_peak
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LDS Bandwidth:
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value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) *
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4 * $lds_banks_per_cu)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GB/s
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peak: $LDSBw_empirical_peak
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gfx940:
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VALU FLOPs:
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value: AVG(($wave_size * (
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(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
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(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
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(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
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) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
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MFMA FLOPs (F64):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF64Flops_empirical_peak
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MFMA FLOPs (F32):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF32Flops_empirical_peak
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MFMA FLOPs (F16):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF16Flops_empirical_peak
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MFMA FLOPs (BF16):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMABF16Flops_empirical_peak
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MFMA FLOPs (F8):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GFLOP/s
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peak: $MFMAF8Flops_empirical_peak
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MFMA IOPs (Int8):
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value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GIOP/s
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peak: $MFMAI8Ops_empirical_peak
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HBM Bandwidth:
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value: AVG(((
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(TCC_BUBBLE_sum * 128) +
|
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(TCC_EA0_RDREQ_32B_sum * 32) +
|
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((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64) +
|
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((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) +
|
||||
(TCC_EA0_WRREQ_64B_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
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unit: GB/s
|
||||
peak: $HBMBw_empirical_peak
|
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L2 Cache Bandwidth:
|
||||
value: AVG(((((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
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TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) *
|
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64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $L2Bw_empirical_peak
|
||||
L1 Cache Bandwidth:
|
||||
value: AVG((((TCP_TOTAL_CACHE_ACCESSES_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $L1Bw_empirical_peak
|
||||
LDS Bandwidth:
|
||||
value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) *
|
||||
4 * $lds_banks_per_cu)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
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unit: GB/s
|
||||
peak: $LDSBw_empirical_peak
|
||||
gfx941:
|
||||
VALU FLOPs:
|
||||
value: AVG(($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF64Flops_empirical_peak
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF32Flops_empirical_peak
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF16Flops_empirical_peak
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMABF16Flops_empirical_peak
|
||||
MFMA FLOPs (F8):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF8Flops_empirical_peak
|
||||
MFMA IOPs (Int8):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GIOP/s
|
||||
peak: $MFMAI8Ops_empirical_peak
|
||||
HBM Bandwidth:
|
||||
value: AVG(((
|
||||
(TCC_BUBBLE_sum * 128) +
|
||||
(TCC_EA0_RDREQ_32B_sum * 32) +
|
||||
((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64) +
|
||||
((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) +
|
||||
(TCC_EA0_WRREQ_64B_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $HBMBw_empirical_peak
|
||||
L2 Cache Bandwidth:
|
||||
value: AVG(((((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
||||
TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) *
|
||||
64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $L2Bw_empirical_peak
|
||||
L1 Cache Bandwidth:
|
||||
value: AVG((((TCP_TOTAL_CACHE_ACCESSES_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $L1Bw_empirical_peak
|
||||
LDS Bandwidth:
|
||||
value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) *
|
||||
4 * $lds_banks_per_cu)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $LDSBw_empirical_peak
|
||||
gfx942:
|
||||
VALU FLOPs:
|
||||
value: AVG((($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF64Flops_empirical_peak
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF32Flops_empirical_peak
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF16Flops_empirical_peak
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMABF16Flops_empirical_peak
|
||||
MFMA FLOPs (F8):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF8Flops_empirical_peak
|
||||
MFMA IOPs (Int8):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GIOP/s
|
||||
peak: $MFMAI8Ops_empirical_peak
|
||||
HBM Bandwidth:
|
||||
value: AVG(((
|
||||
(TCC_BUBBLE_sum * 128) +
|
||||
(TCC_EA0_RDREQ_32B_sum * 32) +
|
||||
((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64) +
|
||||
((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) +
|
||||
(TCC_EA0_WRREQ_64B_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $HBMBw_empirical_peak
|
||||
L2 Cache Bandwidth:
|
||||
value: AVG(((((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
||||
TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) *
|
||||
64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $L2Bw_empirical_peak
|
||||
L1 Cache Bandwidth:
|
||||
value: AVG((((TCP_TOTAL_CACHE_ACCESSES_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $L1Bw_empirical_peak
|
||||
LDS Bandwidth:
|
||||
value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) *
|
||||
4 * $lds_banks_per_cu)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $LDSBw_empirical_peak
|
||||
gfx950:
|
||||
VALU FLOPs:
|
||||
value: AVG((($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: (((($max_sclk * $cu_per_gpu) * 64) * 2) / 1000)
|
||||
MFMA FLOPs (F64):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF64Flops_empirical_peak
|
||||
MFMA FLOPs (F32):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF32Flops_empirical_peak
|
||||
MFMA FLOPs (F16):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF16Flops_empirical_peak
|
||||
MFMA FLOPs (BF16):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMABF16Flops_empirical_peak
|
||||
MFMA FLOPs (F8):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMAF8Flops_empirical_peak
|
||||
MFMA FLOPs (F6F4):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_F6F4 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GFLOP/s
|
||||
peak: $MFMA_FLOPs_F6F4_empirical_peak
|
||||
MFMA IOPs (Int8):
|
||||
value: AVG((((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GIOP/s
|
||||
peak: $MFMAI8Ops_empirical_peak
|
||||
HBM Bandwidth:
|
||||
value: AVG(((
|
||||
(TCC_BUBBLE_sum * 128) +
|
||||
(TCC_EA0_RDREQ_32B_sum * 32) +
|
||||
((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64) +
|
||||
((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) +
|
||||
(TCC_EA0_WRREQ_64B_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $HBMBw_empirical_peak
|
||||
L2 Cache Bandwidth:
|
||||
value: AVG(((((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
||||
TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) *
|
||||
64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $L2Bw_empirical_peak
|
||||
L1 Cache Bandwidth:
|
||||
value: AVG((((TCP_TOTAL_CACHE_ACCESSES_sum * 64)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $L1Bw_empirical_peak
|
||||
LDS Bandwidth:
|
||||
value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) *
|
||||
4 * $lds_banks_per_cu)) / ((End_Timestamp - Start_Timestamp) / 1e9)) / 1e9)
|
||||
unit: GB/s
|
||||
peak: $LDSBw_empirical_peak
|
||||
- metric_table:
|
||||
id: 402
|
||||
title: Roofline Plot Points
|
||||
cli_style: Roofline
|
||||
tui_style: Roofline
|
||||
header:
|
||||
metric: Metric
|
||||
value: Value
|
||||
unit: Unit
|
||||
metric:
|
||||
gfx90a:
|
||||
AI HBM:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)
|
||||
) /
|
||||
SUM(
|
||||
(TCC_EA_RDREQ_32B_sum * 32) +
|
||||
((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) * 64) +
|
||||
(TCC_EA_WRREQ_64B_sum * 64) +
|
||||
((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) * 32)
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L2:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)
|
||||
) /
|
||||
SUM(
|
||||
(TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
||||
TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) * 64
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L1:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)
|
||||
) /
|
||||
SUM(TCP_TOTAL_CACHE_ACCESSES_sum * 64)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
Performance GFLOPs:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)
|
||||
) /
|
||||
(SUM(End_Timestamp - Start_Timestamp) / 1e9)
|
||||
) / 1e9
|
||||
unit: GFLOP/s
|
||||
gfx908:
|
||||
AI HBM:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)
|
||||
) /
|
||||
SUM(
|
||||
(TCC_BUBBLE_sum * 128) +
|
||||
(TCC_EA0_RDREQ_32B_sum * 32) +
|
||||
((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64) +
|
||||
((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) +
|
||||
(TCC_EA0_WRREQ_64B_sum * 64)
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L2:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)
|
||||
) /
|
||||
SUM(
|
||||
(TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
||||
TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) * 64
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L1:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)
|
||||
) /
|
||||
SUM(TCP_TOTAL_CACHE_ACCESSES_sum * 64)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
Performance GFLOPs:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512)
|
||||
) /
|
||||
(SUM(End_Timestamp - Start_Timestamp) / 1e9)
|
||||
) / 1e9
|
||||
unit: GFLOP/s
|
||||
gfx940:
|
||||
AI HBM:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)
|
||||
) /
|
||||
SUM(
|
||||
(TCC_BUBBLE_sum * 128) +
|
||||
(TCC_EA0_RDREQ_32B_sum * 32) +
|
||||
((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64) +
|
||||
((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) +
|
||||
(TCC_EA0_WRREQ_64B_sum * 64)
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L2:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
) /
|
||||
SUM(
|
||||
(TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
||||
TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) * 64
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L1:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
) /
|
||||
SUM(TCP_TOTAL_CACHE_ACCESSES_sum * 64)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
Performance GFLOPs:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)
|
||||
) /
|
||||
(SUM(End_Timestamp - Start_Timestamp) / 1e9)
|
||||
) / 1e9
|
||||
unit: GFLOP/s
|
||||
gfx941:
|
||||
AI HBM:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)
|
||||
) /
|
||||
SUM(
|
||||
(TCC_BUBBLE_sum * 128) +
|
||||
(TCC_EA0_RDREQ_32B_sum * 32) +
|
||||
((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64) +
|
||||
((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) +
|
||||
(TCC_EA0_WRREQ_64B_sum * 64)
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L2:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)
|
||||
) /
|
||||
SUM(
|
||||
(TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
||||
TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) * 64
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L1:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)
|
||||
) /
|
||||
SUM(TCP_TOTAL_CACHE_ACCESSES_sum * 64)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
Performance GFLOPs:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512)
|
||||
) /
|
||||
(SUM(End_Timestamp - Start_Timestamp) / 1e9)
|
||||
) / 1e9
|
||||
unit: GFLOP/s
|
||||
gfx942:
|
||||
AI HBM:
|
||||
value: ( SUM( ($wave_size * ( (SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) + (SQ_INSTS_VALU_ADD_F32
|
||||
+ SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64)
|
||||
+ SQ_INSTS_VALU_TRANS_F64) )) + (SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) + (SQ_INSTS_VALU_MFMA_MOPS_F32 *
|
||||
512) + (SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) + (SQ_INSTS_VALU_MFMA_MOPS_F8
|
||||
* 512) ) / SUM( (TCC_BUBBLE_sum * 128) + (TCC_EA0_RDREQ_32B_sum * 32)
|
||||
+ ((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64)
|
||||
+ ((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) + (TCC_EA0_WRREQ_64B_sum
|
||||
* 64) ) )
|
||||
unit: FLOPs/Byte
|
||||
AI L2:
|
||||
value: ( SUM( ($wave_size * ( (SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) + (SQ_INSTS_VALU_ADD_F32
|
||||
+ SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64)
|
||||
+ SQ_INSTS_VALU_TRANS_F64) )) + (SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) + (SQ_INSTS_VALU_MFMA_MOPS_F32 *
|
||||
512) + (SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) + (SQ_INSTS_VALU_MFMA_MOPS_F8
|
||||
* 512) ) / SUM( (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
||||
TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) * 64 ) )
|
||||
unit: FLOPs/Byte
|
||||
AI L1:
|
||||
value: ( SUM( ($wave_size * ( (SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) + (SQ_INSTS_VALU_ADD_F32
|
||||
+ SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64)
|
||||
+ SQ_INSTS_VALU_TRANS_F64) )) + (SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) + (SQ_INSTS_VALU_MFMA_MOPS_F32 *
|
||||
512) + (SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) + (SQ_INSTS_VALU_MFMA_MOPS_F8
|
||||
* 512) ) / SUM( TCP_TOTAL_CACHE_ACCESSES_sum * 64 ) )
|
||||
unit: FLOPs/Byte
|
||||
Performance (GFLOPs):
|
||||
value: ( SUM( ($wave_size * ( (SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16
|
||||
+ (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) + (SQ_INSTS_VALU_ADD_F32
|
||||
+ SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32)
|
||||
+ (SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64)
|
||||
+ SQ_INSTS_VALU_TRANS_F64) )) + (SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) + (SQ_INSTS_VALU_MFMA_MOPS_F32 *
|
||||
512) + (SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) + (SQ_INSTS_VALU_MFMA_MOPS_F8
|
||||
* 512) ) / (SUM(End_Timestamp - Start_Timestamp) / 1e9) ) / 1e9
|
||||
unit: GFLOP/s
|
||||
gfx950:
|
||||
AI HBM:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F6F4 * 512)
|
||||
) /
|
||||
SUM(
|
||||
(TCC_BUBBLE_sum * 128) +
|
||||
(TCC_EA0_RDREQ_32B_sum * 32) +
|
||||
((TCC_EA0_RDREQ_sum - TCC_BUBBLE_sum - TCC_EA0_RDREQ_32B_sum) * 64) +
|
||||
((TCC_EA0_WRREQ_sum - TCC_EA0_WRREQ_64B_sum) * 32) +
|
||||
(TCC_EA0_WRREQ_64B_sum * 64)
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L2:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F6F4 * 512)
|
||||
) /
|
||||
SUM(
|
||||
(TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum +
|
||||
TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum + TCP_TCC_READ_REQ_sum) * 64
|
||||
)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
AI L1:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F6F4 * 512)
|
||||
) /
|
||||
SUM(TCP_TOTAL_CACHE_ACCESSES_sum * 64)
|
||||
)
|
||||
unit: FLOPs/Byte
|
||||
Performance GFLOPs:
|
||||
value: (
|
||||
SUM(
|
||||
($wave_size * (
|
||||
(SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16 + (2 * SQ_INSTS_VALU_FMA_F16) + SQ_INSTS_VALU_TRANS_F16) +
|
||||
(SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32 + (2 * SQ_INSTS_VALU_FMA_F32) + SQ_INSTS_VALU_TRANS_F32) +
|
||||
(SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64 + (2 * SQ_INSTS_VALU_FMA_F64) + SQ_INSTS_VALU_TRANS_F64)
|
||||
)) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F8 * 512) +
|
||||
(SQ_INSTS_VALU_MFMA_MOPS_F6F4 * 512)
|
||||
) /
|
||||
(SUM(End_Timestamp - Start_Timestamp) / 1e9)
|
||||
) / 1e9
|
||||
unit: GFLOP/s
|
||||
metrics_description:
|
||||
VALU FLOPs:
|
||||
plain: 'The total floating-point operations executed per second on the VALU.
|
||||
This is also presented as a percent of the peak theoretical FLOPs achievable
|
||||
on the specific accelerator. Note: this does not include any floating-point
|
||||
operations from MFMA instructions.'
|
||||
rst: 'The total floating-point operations executed per second on the :ref:`VALU
|
||||
<desc-valu>`. This is also presented as a percent of the peak theoretical
|
||||
FLOPs achievable on the specific accelerator. Note: this does not include
|
||||
any floating-point operations from :ref:`MFMA <desc-mfma>` instructions.'
|
||||
unit: GFLOPs
|
||||
MFMA FLOPs (F8):
|
||||
plain: The total number of 8-bit brain floating point MFMA operations executed
|
||||
per second. This does not include any 16-bit brain floating point operations
|
||||
from VALU instructions. The peak empirically measured F8 MFMA operations
|
||||
achievable on the specific accelerator is displayed alongside for comparison.
|
||||
It is supported on AMD Instinct MI300 series and later only.
|
||||
rst: 'The total number of 8-bit brain floating point :ref:`MFMA <desc-mfma>`
|
||||
operations executed per second. Note: this does not include any 16-bit brain
|
||||
floating point operations from :ref:`VALU <desc-valu>` instructions. The
|
||||
peak empirically measured F8 MFMA operations achievable on the specific
|
||||
accelerator is displayed alongside for comparison. It is supported on AMD
|
||||
Instinct MI300 series and later only.'
|
||||
unit: GFLOPs
|
||||
MFMA FLOPs (BF16):
|
||||
plain: 'The total number of 16-bit brain floating point MFMA operations executed
|
||||
per second. Note: this does not include any 16-bit brain floating point
|
||||
operations from VALU instructions. The peak empirically measured BF16 MFMA
|
||||
operations achievable on the specific accelerator is displayed alongside
|
||||
for comparison.'
|
||||
rst: 'The total number of 16-bit brain floating point :ref:`MFMA <desc-mfma>`
|
||||
operations executed per second. Note: this does not include any 16-bit brain
|
||||
floating point operations from :ref:`VALU <desc-valu>` instructions. The
|
||||
peak empirically measured BF16 MFMA operations achievable on the specific
|
||||
accelerator is displayed alongside for comparison.'
|
||||
unit: GFLOPs
|
||||
MFMA FLOPs (F16):
|
||||
plain: 'The total number of 16-bit floating point MFMA operations executed per
|
||||
second. Note: this does not include any 16-bit floating point operations from
|
||||
VALU instructions. The peak empirically measured F16 MFMA operations
|
||||
achievable on the specific accelerator is displayed alongside for comparison.'
|
||||
rst: 'The total number of 16-bit floating point :ref:`MFMA <desc-mfma>` operations
|
||||
executed per second. Note: this does not include any 16-bit floating point
|
||||
operations from :ref:`VALU <desc-valu>` instructions. The peak empirically
|
||||
measured F16 MFMA operations achievable on the specific accelerator is
|
||||
displayed alongside for comparison.'
|
||||
unit: GFLOPs
|
||||
MFMA FLOPs (F32):
|
||||
plain: 'The total number of 32-bit floating point MFMA operations executed per
|
||||
second. Note: this does not include any 32-bit floating point operations from
|
||||
VALU instructions. The peak empirically measured F32 MFMA operations
|
||||
achievable on the specific accelerator is displayed alongside for comparison.'
|
||||
rst: 'The total number of 32-bit floating point :ref:`MFMA <desc-mfma>` operations
|
||||
executed per second. Note: this does not include any 32-bit floating point
|
||||
operations from :ref:`VALU <desc-valu>` instructions. The peak empirically
|
||||
measured F32 MFMA operations achievable on the specific accelerator is
|
||||
displayed alongside for comparison.'
|
||||
unit: GFLOPs
|
||||
MFMA FLOPs (F64):
|
||||
plain: 'The total number of 64-bit floating point MFMA operations executed per
|
||||
second. Note: this does not include any 64-bit floating point operations from
|
||||
VALU instructions. The peak empirically measured F64 MFMA operations
|
||||
achievable on the specific accelerator is displayed alongside for comparison.'
|
||||
rst: 'The total number of 64-bit floating point :ref:`MFMA <desc-mfma>` operations
|
||||
executed per second. Note: this does not include any 64-bit floating point
|
||||
operations from :ref:`VALU <desc-valu>` instructions. The peak empirically
|
||||
measured F64 MFMA operations achievable on the specific accelerator is
|
||||
displayed alongside for comparison.'
|
||||
unit: GFLOPs
|
||||
MFMA IOPs (Int8):
|
||||
plain: 'The total number of 8-bit integer MFMA operations executed per second.
|
||||
Note: this does not include any 8-bit integer operations from VALU instructions.
|
||||
The peak empirically measured INT8 MFMA operations achievable on the specific
|
||||
accelerator is displayed alongside for comparison.'
|
||||
rst: 'The total number of 8-bit integer :ref:`MFMA <desc-mfma>` operations executed
|
||||
per second. Note: this does not include any 8-bit integer operations from
|
||||
:ref:`VALU <desc-valu>` instructions. The peak empirically measured INT8 MFMA
|
||||
operations achievable on the specific accelerator is displayed alongside
|
||||
for comparison.'
|
||||
unit: GIOPs
|
||||
HBM Bandwidth:
|
||||
plain: 'The total number of bytes read from and written to High-Bandwidth
|
||||
Memory (HBM) per second. The peak empirically measured bandwidth achievable
|
||||
on the specific accelerator is displayed alongside for comparison.'
|
||||
rst: 'The total number of bytes read from and written to High-Bandwidth
|
||||
Memory (HBM) per second. The peak empirically measured bandwidth achievable
|
||||
on the specific accelerator is displayed alongside for comparison.'
|
||||
unit: GB/s
|
||||
L2 Cache Bandwidth:
|
||||
plain: The number of bytes looked up in the L2 cache per unit time. The number
|
||||
of bytes is calculated as the number of cache lines requested multiplied by
|
||||
the cache line size. This value does not consider partial requests, so e.g.,
|
||||
if only a single value is requested in a cache line, the data movement will
|
||||
still be counted as a full cache line. The peak empirically measured bandwidth
|
||||
achievable on the specific accelerator is displayed alongside for comparison.
|
||||
rst: The number of bytes looked up in the L2 cache per unit time. The number of
|
||||
bytes is calculated as the number of cache lines requested multiplied by
|
||||
the cache line size. This value does not consider partial requests, so e.g.,
|
||||
if only a single value is requested in a cache line, the data movement will
|
||||
still be counted as a full cache line. The peak empirically measured
|
||||
bandwidth achievable on the specific accelerator is displayed alongside
|
||||
for comparison.
|
||||
unit: GB/s
|
||||
L1 Cache Bandwidth:
|
||||
plain: The number of bytes looked up in the vL1D cache as a result of VMEM
|
||||
instructions per unit time. The number of bytes is calculated as the number
|
||||
of cache lines requested multiplied by the cache line size. This value does
|
||||
not consider partial requests, so e.g., if only a single value is requested
|
||||
in a cache line, the data movement will still be counted as a full cache line.
|
||||
The peak empirically measured bandwidth achievable on the specific accelerator
|
||||
is displayed alongside for comparison.
|
||||
rst: The number of bytes looked up in the vL1D cache as a result of :ref:`VMEM
|
||||
<desc-vmem>` instructions per unit time. The number of bytes is calculated
|
||||
as the number of cache lines requested multiplied by the cache line size.
|
||||
This value does not consider partial requests, so e.g., if only a single
|
||||
value is requested in a cache line, the data movement will still be counted
|
||||
as a full cache line. The peak empirically measured bandwidth achievable on
|
||||
the specific accelerator is displayed alongside for comparison.
|
||||
unit: GB/s
|
||||
LDS Bandwidth:
|
||||
plain: Indicates the maximum amount of bytes that could have been loaded from,
|
||||
stored to, or atomically updated in the LDS per unit time (see LDS Bandwidth
|
||||
example for more detail). The peak empirically measured LDS bandwidth
|
||||
achievable on the specific accelerator is displayed alongside for comparison.
|
||||
rst: Indicates the maximum amount of bytes that could have been loaded from,
|
||||
stored to, or atomically updated in the LDS per unit time (see :ref:`LDS
|
||||
Bandwidth <lds-bandwidth>` example for more detail). The peak empirically
|
||||
measured LDS bandwidth achievable on the specific accelerator is displayed
|
||||
alongside for comparison.
|
||||
unit: GB/s
|
||||
AI L1:
|
||||
plain: 'The Arithmetic Intensity (AI) relative to the L1 Cache. It is the ratio
|
||||
of total floating-point operations (FLOPs) to total bytes transferred between
|
||||
the L1 cache and the processing units. This value is used as the x-coordinate
|
||||
for the L1 roofline.'
|
||||
rst: 'The Arithmetic Intensity (AI) relative to the L1 Cache. It is the ratio
|
||||
of total floating-point operations (FLOPs) to total bytes transferred between
|
||||
the L1 cache and the processing units. This value is used as the x-coordinate
|
||||
for the L1 roofline.'
|
||||
unit: FLOPs/Byte
|
||||
AI L2:
|
||||
plain: 'The Arithmetic Intensity (AI) relative to the L2 Cache. It is the ratio
|
||||
of total floating-point operations (FLOPs) to total bytes transferred between
|
||||
the L2 cache and the L1 cache. This value is used as the x-coordinate for
|
||||
the L2 roofline.'
|
||||
rst: 'The Arithmetic Intensity (AI) relative to the L2 Cache. It is the ratio
|
||||
of total floating-point operations (FLOPs) to total bytes transferred between
|
||||
the L2 cache and the L1 cache. This value is used as the x-coordinate for
|
||||
the L2 roofline.'
|
||||
unit: FLOPs/Byte
|
||||
AI HBM:
|
||||
plain: 'The Arithmetic Intensity (AI) relative to High-Bandwidth Memory (HBM).
|
||||
It is the ratio of total floating-point operations (FLOPs) to total bytes
|
||||
transferred between HBM and the L2 cache. This value is used as the x-coordinate
|
||||
for the HBM roofline.'
|
||||
rst: 'The Arithmetic Intensity (AI) relative to High-Bandwidth Memory (HBM).
|
||||
It is the ratio of total floating-point operations (FLOPs) to total bytes
|
||||
transferred between HBM and the L2 cache. This value is used as the x-coordinate
|
||||
for the HBM roofline.'
|
||||
unit: FLOPs/Byte
|
||||
Performance (GFLOPs):
|
||||
plain: 'The overall achieved performance, measured in GigaFLOPs
|
||||
per second (GFLOP/s). This is calculated as the sum of all VALU and MFMA floating-point
|
||||
operations divided by the total execution time. This value is used as the y-coordinate
|
||||
for the kernel''s point on the Roofline plot.'
|
||||
rst: 'The overall achieved performance, measured in GigaFLOPs
|
||||
per second (GFLOP/s). This is calculated as the sum of all VALU and MFMA floating-point
|
||||
operations divided by the total execution time. This value is used as the y-coordinate
|
||||
for the kernel''s point on the Roofline plot.'
|
||||
unit: GFLOP/s
|
||||
- id: 500
|
||||
title: Command Processor (CPC/CPF)
|
||||
data source:
|
||||
|
||||
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