Migrate XML counter defs and reader from v1/v2 (#25)
* Migrate XML counter defs and reader from v1/v2 * working set * more fixes * Update CMakeLists.txt * source formatting (clang-format v11) (#83) Co-authored-by: bwelton <bwelton@users.noreply.github.com> * Update source/lib/rocprofiler/counters/CMakeLists.txt --------- Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com> Co-authored-by: bwelton <bwelton@users.noreply.github.com> Co-authored-by: Jonathan R. Madsen <jrmadsen@users.noreply.github.com>
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@@ -0,0 +1,24 @@
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rocprofiler_deactivate_clang_tidy()
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include(GoogleTest)
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set(ROCPROFILER_LIB_COUNTER_TEST_SOURCES "metrics_test.cpp")
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add_executable(counter-test)
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target_sources(
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counter-test PRIVATE ${ROCPROFILER_LIB_COUNTER_TEST_SOURCES}
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$<TARGET_OBJECTS:rocprofiler::rocprofiler-object-library>)
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target_link_libraries(
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counter-test
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PRIVATE rocprofiler::rocprofiler-hip rocprofiler::rocprofiler-common-library
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rocprofiler::rocprofiler-object-library GTest::gtest GTest::gtest_main)
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gtest_add_tests(
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TARGET counter-test
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SOURCES ${ROCPROFILER_LIB_COUNTER_TEST_SOURCES}
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TEST_LIST counter-test_TESTS
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WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR})
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set_tests_properties(${counter-tests_TESTS} PROPERTIES TIMEOUT 45 LABELS "unittests")
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@@ -0,0 +1,42 @@
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#include "metrics_test.h"
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#include <gtest/gtest.h>
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#include "lib/rocprofiler/counters/metrics.hpp"
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namespace
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{
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auto
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loadTestData(std::unordered_map<std::string, std::vector<std::vector<std::string>>> map)
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{
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std::unordered_map<std::string, std::vector<counters::Metric>> ret;
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for(auto& [gfx, dataMap] : map)
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{
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auto& metric_vec = ret.emplace(gfx, std::vector<counters::Metric>{}).first->second;
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for(auto& data_vec : dataMap)
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{
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metric_vec.emplace_back(
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data_vec.at(0), data_vec.at(1), data_vec.at(2), data_vec.at(4), data_vec.at(3));
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}
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}
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return ret;
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}
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} // namespace
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TEST(MetricsTest, BaseMetricLoad)
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{
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auto x = counters::getBaseHardwareMetrics();
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auto test_data = loadTestData(basic_gfx908);
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ASSERT_EQ(x.count("gfx908"), 1);
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ASSERT_EQ(test_data.count("gfx908"), 1);
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EXPECT_EQ(fmt::format("{}", x["gfx908"]), fmt::format("{}", test_data["gfx908"]));
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}
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TEST(MetricsTest, DerrivedMetricLoad)
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{
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auto x = counters::getDerrivedHardwareMetrics();
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auto test_data = loadTestData(derrived_gfx908);
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ASSERT_EQ(x.count("gfx908"), 1);
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ASSERT_EQ(test_data.count("gfx908"), 1);
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EXPECT_EQ(fmt::format("{}", x["gfx908"]), fmt::format("{}", test_data["gfx908"]));
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}
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@@ -0,0 +1,323 @@
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#pragma once
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#include <string>
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#include <unordered_map>
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#include <vector>
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// Expected values for GFX908. GFX908 was chosen because it is not the first
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// arch defined in the XML and it is also an arch that inherits values (from gfx9)
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// Layout is: {name, block, event, expression, description}.
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static const std::unordered_map<std::string, std::vector<std::vector<std::string>>> basic_gfx908 = {
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{"gfx908",
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{{"SQ_INSTS_VMEM_WR",
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"SQ",
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"28",
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"<None>",
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"Number of VMEM write instructions issued (including FLAT). (per-simd, emulated)"},
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{"SQ_INSTS_VMEM_RD",
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"SQ",
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"29",
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"<None>",
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"Number of VMEM read instructions issued (including FLAT). (per-simd, emulated)"},
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{"SQ_INSTS_SALU",
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"SQ",
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"31",
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"<None>",
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"Number of SALU instructions issued. (per-simd, emulated)"},
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{"SQ_INSTS_SMEM",
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"SQ",
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"32",
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"<None>",
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"Number of SMEM instructions issued. (per-simd, emulated)"},
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{"SQ_INSTS_FLAT",
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"SQ",
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"33",
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"<None>",
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"Number of FLAT instructions issued. (per-simd, emulated)"},
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{"SQ_INSTS_FLAT_LDS_ONLY",
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"SQ",
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"34",
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"<None>",
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"Number of FLAT instructions issued that read/wrote only from/to LDS (only works if "
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"EARLY_TA_DONE is enabled). (per-simd, emulated)"},
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{"SQ_INSTS_LDS",
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"SQ",
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"35",
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"<None>",
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"Number of LDS instructions issued (including FLAT). (per-simd, emulated)"},
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{"SQ_INSTS_GDS",
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"SQ",
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"36",
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"<None>",
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"Number of GDS instructions issued. (per-simd, emulated)"},
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{"SQ_WAIT_INST_LDS",
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"SQ",
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"64",
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"<None>",
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"Number of wave-cycles spent waiting for LDS instruction issue. In units of 4 cycles. "
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"(per-simd, nondeterministic)"},
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{"SQ_ACTIVE_INST_VALU",
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"SQ",
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"72",
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"<None>",
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"regspec 71? Number of cycles the SQ instruction arbiter is working on a VALU instruction. "
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"(per-simd, nondeterministic). Units in quad-cycles(4 cycles)"},
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{"SQ_INST_CYCLES_SALU",
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"SQ",
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"85",
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"<None>",
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"Number of cycles needed to execute non-memory read scalar operations. (per-simd, "
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"emulated)"},
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{"SQ_THREAD_CYCLES_VALU",
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"SQ",
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"86",
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"<None>",
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"Number of thread-cycles used to execute VALU operations (similar to INST_CYCLES_VALU but "
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"multiplied by # of active threads). (per-simd)"},
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{"SQ_LDS_BANK_CONFLICT",
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"SQ",
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"94",
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"<None>",
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"Number of cycles LDS is stalled by bank conflicts. (emulated)"},
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{"TCC_HIT", "TCC", "17", "<None>", "Number of cache hits."},
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{"TCC_MISS", "TCC", "19", "<None>", "Number of cache misses. UC reads count as misses."},
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{"TCC_EA_WRREQ",
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"TCC",
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"26",
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"<None>",
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"Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq interface. "
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"Atomics may travel over the same interface and are generally classified as write requests. "
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"This does not include probe commands."},
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{"TCC_EA_WRREQ_64B",
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"TCC",
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"27",
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"<None>",
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"Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq "
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"interface."},
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{"TCC_EA_WRREQ_STALL",
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"TCC",
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"30",
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"<None>",
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"Number of cycles a write request was stalled."},
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{"TCC_EA_RDREQ",
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"TCC",
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"38",
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"<None>",
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"Number of TCC/EA read requests (either 32-byte or 64-byte)"},
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{"TCC_EA_RDREQ_32B", "TCC", "39", "<None>", "Number of 32-byte TCC/EA read requests"},
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{"GRBM_COUNT", "GRBM", "0", "<None>", "Tie High - Count Number of Clocks"},
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{"GRBM_GUI_ACTIVE", "GRBM", "2", "<None>", "The GUI is Active"},
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{"SQ_WAVES",
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"SQ",
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"4",
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"<None>",
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"Count number of waves sent to SQs. (per-simd, emulated, global)"},
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{"SQ_INSTS_VALU",
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"SQ",
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"26",
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"<None>",
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"Number of VALU instructions issued. (per-simd, emulated)"},
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{"TA_TA_BUSY",
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"TA",
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"15",
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"<None>",
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"TA block is busy. Perf_Windowing not supported for this counter."},
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{"TA_FLAT_READ_WAVEFRONTS",
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"TA",
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"101",
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"<None>",
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"Number of flat opcode reads processed by the TA."},
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{"TA_FLAT_WRITE_WAVEFRONTS",
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"TA",
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"102",
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"<None>",
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"Number of flat opcode writes processed by the TA."},
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{"TCP_TCP_TA_DATA_STALL_CYCLES",
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"TCP",
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"6",
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"<None>",
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"TCP stalls TA data interface. Now Windowed."}}}};
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static const std::unordered_map<std::string, std::vector<std::vector<std::string>>>
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derrived_gfx908 = {
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{"gfx908",
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{{"TCC_HIT_sum",
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"",
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"",
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"sum(TCC_HIT,32)",
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"Number of cache hits. Sum over TCC instances."},
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{"TCC_MISS_sum",
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"",
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"",
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"sum(TCC_MISS,32)",
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"Number of cache misses. Sum over TCC instances."},
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{"TCC_EA_RDREQ_32B_sum",
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"",
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"",
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"sum(TCC_EA_RDREQ_32B,32)",
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"Number of 32-byte TCC/EA read requests. Sum over TCC instances."},
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{"TCC_EA_RDREQ_sum",
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"",
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"",
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"sum(TCC_EA_RDREQ,32)",
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"Number of TCC/EA read requests (either 32-byte or 64-byte). Sum over TCC instances."},
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{"TCC_EA_WRREQ_sum",
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"",
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"",
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"sum(TCC_EA_WRREQ,32)",
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"Number of transactions (either 32-byte or 64-byte) going over the TC_EA_wrreq "
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"interface. Sum over TCC instances."},
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{"TCC_EA_WRREQ_64B_sum",
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"",
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"",
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"sum(TCC_EA_WRREQ_64B,32)",
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"Number of 64-byte transactions going (64-byte write or CMPSWAP) over the TC_EA_wrreq "
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"interface. Sum over TCC instances."},
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{"TCC_WRREQ_STALL_max",
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"",
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"",
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"max(TCC_EA_WRREQ_STALL,32)",
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"Number of cycles a write request was stalled. Max over TCC instances."},
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{"CU_UTILIZATION",
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"",
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"",
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"GRBM_GUI_ACTIVE/GRBM_COUNT",
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"The total number of active cycles divided by total number of elapsed cycles"},
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{"KERNEL_DURATION", "", "", "1", "The duration of the kernel dispatch"},
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{"TA_BUSY_avr",
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"",
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"",
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"avr(TA_TA_BUSY,16)",
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"TA block is busy. Average over TA instances."},
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{"TA_BUSY_max", "", "", "max(TA_TA_BUSY,16)", "TA block is busy. Max over TA instances."},
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{"TA_BUSY_min", "", "", "min(TA_TA_BUSY,16)", "TA block is busy. Min over TA instances."},
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{"TA_FLAT_READ_WAVEFRONTS_sum",
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"",
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"",
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"sum(TA_FLAT_READ_WAVEFRONTS,16)",
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"Number of flat opcode reads processed by the TA. Sum over TA instances."},
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{"TA_FLAT_WRITE_WAVEFRONTS_sum",
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"",
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"",
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"sum(TA_FLAT_WRITE_WAVEFRONTS,16)",
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"Number of flat opcode writes processed by the TA. Sum over TA instances."},
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{"TCP_TCP_TA_DATA_STALL_CYCLES_sum",
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"",
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"",
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"sum(TCP_TCP_TA_DATA_STALL_CYCLES,16)",
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"Total number of TCP stalls TA data interface."},
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{"TCP_TCP_TA_DATA_STALL_CYCLES_max",
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"",
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"",
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"max(TCP_TCP_TA_DATA_STALL_CYCLES,16)",
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"Maximum number of TCP stalls TA data interface."},
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{"FETCH_SIZE",
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"",
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"",
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"(TCC_EA_RDREQ_32B_sum*32+(TCC_EA_RDREQ_sum-TCC_EA_RDREQ_32B_sum)*64)/1024",
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"The total kilobytes fetched from the video memory. This is measured with all extra "
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"fetches and any cache or memory effects taken into account."},
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{"WRITE_SIZE",
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"",
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"",
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"((TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum)*32+TCC_EA_WRREQ_64B_sum*64)/1024",
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"The total kilobytes written to the video memory. This is measured with all extra "
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"fetches and any cache or memory effects taken into account."},
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{"WRITE_REQ_32B",
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"",
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"",
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"TCC_EA_WRREQ_64B_sum*2+(TCC_EA_WRREQ_sum-TCC_EA_WRREQ_64B_sum)",
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"The total number of 32-byte effective memory writes."},
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{"VFetchInsts",
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"",
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"",
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"(SQ_INSTS_VMEM_RD-TA_FLAT_READ_WAVEFRONTS_sum)/SQ_WAVES",
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"The average number of vector fetch instructions from the video memory executed per "
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"work-item (affected by flow control). Excludes FLAT instructions that fetch from video "
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"memory."},
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{"VWriteInsts",
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"",
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"",
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"(SQ_INSTS_VMEM_WR-TA_FLAT_WRITE_WAVEFRONTS_sum)/SQ_WAVES",
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"The average number of vector write instructions to the video memory executed per "
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"work-item (affected by flow control). Excludes FLAT instructions that write to video "
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"memory."},
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{"FlatVMemInsts",
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"",
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"",
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"(SQ_INSTS_FLAT-SQ_INSTS_FLAT_LDS_ONLY)/SQ_WAVES",
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"The average number of FLAT instructions that read from or write to the video memory "
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"executed per work item (affected by flow control). Includes FLAT instructions that "
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"read from or write to scratch."},
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{"LDSInsts",
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"",
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"",
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"(SQ_INSTS_LDS-SQ_INSTS_FLAT_LDS_ONLY)/SQ_WAVES",
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"The average number of LDS read or LDS write instructions executed per work item "
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"(affected by flow control). Excludes FLAT instructions that read from or write to "
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"LDS."},
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{"FlatLDSInsts",
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"",
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"",
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"SQ_INSTS_FLAT_LDS_ONLY/SQ_WAVES",
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"The average number of FLAT instructions that read or write to LDS executed per work "
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"item (affected by flow control)."},
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{"VALUUtilization",
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"",
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"",
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"100*SQ_THREAD_CYCLES_VALU/(SQ_ACTIVE_INST_VALU*MAX_WAVE_SIZE)",
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"The percentage of active vector ALU threads in a wave. A lower number can mean either "
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"more thread divergence in a wave or that the work-group size is not a multiple of 64. "
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"Value range: 0\% (bad), 100\% (ideal - no thread divergence)."},
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{"VALUBusy",
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"",
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"",
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"100*SQ_ACTIVE_INST_VALU*4/SIMD_NUM/GRBM_GUI_ACTIVE",
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"The percentage of GPUTime vector ALU instructions are processed. Value range: 0\% "
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"(bad) to 100\% (optimal)."},
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{"SALUBusy",
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"",
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"",
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"100*SQ_INST_CYCLES_SALU*4/SIMD_NUM/GRBM_GUI_ACTIVE",
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"The percentage of GPUTime scalar ALU instructions are processed. Value range: 0% (bad) "
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"to 100% (optimal)."},
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{"FetchSize",
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"",
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"",
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"FETCH_SIZE",
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"The total kilobytes fetched from the video memory. This is measured with all extra "
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"fetches and any cache or memory effects taken into account."},
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{"WriteSize",
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"",
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"",
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"WRITE_SIZE",
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"The total kilobytes written to the video memory. This is measured with all extra "
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"fetches and any cache or memory effects taken into account."},
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{"MemWrites32B",
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"",
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"",
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"WRITE_REQ_32B",
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"The total number of effective 32B write transactions to the memory"},
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{"L2CacheHit",
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"",
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"",
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"100*sum(TCC_HIT,16)/(sum(TCC_HIT,16)+sum(TCC_MISS,16))",
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"The percentage of fetch, write, atomic, and other instructions that hit the data in L2 "
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"cache. Value range: 0\% (no hit) to 100\% (optimal)."},
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{"MemUnitStalled",
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"",
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"",
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"100*TCP_TCP_TA_DATA_STALL_CYCLES_max/GRBM_GUI_ACTIVE/SE_NUM",
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"The percentage of GPUTime the memory unit is stalled. Try reducing the number or size "
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"of fetches and writes if possible. Value range: 0\% (optimal) to 100\% (bad)."},
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{"WriteUnitStalled",
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"",
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"",
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"100*TCC_WRREQ_STALL_max/GRBM_GUI_ACTIVE",
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"The percentage of GPUTime the Write unit is stalled. Value range: 0\% to 100\% (bad)."},
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{"LDSBankConflict",
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"",
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"",
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"100*SQ_LDS_BANK_CONFLICT/GRBM_GUI_ACTIVE/CU_NUM",
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"The percentage of GPUTime LDS is stalled by bank conflicts. Value range: 0\% (optimal) "
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"to 100\% (bad)."}}}};
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