diff --git a/projects/amdsmi/include/rocm_smi/rocm_smi.h b/projects/amdsmi/include/rocm_smi/rocm_smi.h index f6dc922747..84ae0f0ad6 100755 --- a/projects/amdsmi/include/rocm_smi/rocm_smi.h +++ b/projects/amdsmi/include/rocm_smi/rocm_smi.h @@ -2315,6 +2315,32 @@ rsmi_status_t rsmi_dev_od_volt_info_get(uint32_t dv_ind, rsmi_status_t rsmi_dev_gpu_metrics_info_get(uint32_t dv_ind, rsmi_gpu_metrics_t *pgpu_metrics); +/** + * @brief This function sets the clock range information + * + * @details Given a device index @p dv_ind, a minimum clock value @p minclkvalue, + * a maximum clock value @p maxclkvalue and a clock type @p clkType this function + * will set the sclk|mclk range + * + * @param[in] dv_ind a device index + * + * @param[in] minclkvalue value to apply to the clock range. Frequency values + * are in MHz. + * + * @param[in] maxclkvalue value to apply to the clock range. Frequency values + * are in MHz. + * + * @param[in] clkType RSMI_CLK_TYPE_SYS | RSMI_CLK_TYPE_MEM range type + * + * @retval ::RSMI_STATUS_SUCCESS call was successful + * @retval ::RSMI_STATUS_NOT_SUPPORTED installed software or hardware does not + * support this function with the given arguments + * @retval ::RSMI_STATUS_INVALID_ARGS the provided arguments are not valid + */ +rsmi_status_t rsmi_dev_clk_range_set(uint32_t dv_ind, uint64_t minclkvalue, + uint64_t maxclkvalue, + rsmi_clk_type_t clkType); + /** * @brief This function sets the clock frequency information * diff --git a/projects/amdsmi/src/rocm_smi.cc b/projects/amdsmi/src/rocm_smi.cc index 9d24744c70..693992553f 100755 --- a/projects/amdsmi/src/rocm_smi.cc +++ b/projects/amdsmi/src/rocm_smi.cc @@ -1086,6 +1086,58 @@ static rsmi_status_t get_od_clk_volt_info(uint32_t dv_ind, CATCH } +rsmi_status_t rsmi_dev_clk_range_set(uint32_t dv_ind, uint64_t minclkvalue, + uint64_t maxclkvalue, + rsmi_clk_type_t clkType) { + TRY + rsmi_status_t ret; + + assert(minclkvalue < maxclkvalue); + std::string min_sysvalue, max_sysvalue; + std::map ClkStateMap = { + {RSMI_CLK_TYPE_SYS, "s"}, + {RSMI_CLK_TYPE_MEM, "m"}, + }; + DEVICE_MUTEX + assert(clkType == RSMI_CLK_TYPE_SYS || clkType == RSMI_CLK_TYPE_MEM); + + // Set perf. level to manual so that we can then set the power profile + ret = rsmi_dev_perf_level_set_v1(dv_ind, RSMI_DEV_PERF_LEVEL_MANUAL); + if (ret != RSMI_STATUS_SUCCESS) { + return ret; + } + + // For clock frequency setting, enter a new value by writing a string that + // contains "s/m index clock" to the file. The index should be 0 if to set + // minimum clock. And 1 if to set maximum clock. E.g., "s 0 500" will update + // minimum sclk to be 500 MHz. "m 1 800" will update maximum mclk to 800Mhz. + + min_sysvalue = ClkStateMap[clkType]; + min_sysvalue += ' ' + std::to_string(RSMI_FREQ_IND_MIN); + min_sysvalue += ' ' + std::to_string(minclkvalue); + min_sysvalue += '\n'; + max_sysvalue = ClkStateMap[clkType]; + max_sysvalue += ' ' + std::to_string(RSMI_FREQ_IND_MAX); + max_sysvalue += ' ' + std::to_string(maxclkvalue); + max_sysvalue += '\n'; + + ret = set_dev_range(dv_ind, min_sysvalue); + if (ret != RSMI_STATUS_SUCCESS) { + return ret; + } + ret = set_dev_range(dv_ind, max_sysvalue); + if (ret != RSMI_STATUS_SUCCESS) { + return ret; + } + ret = set_dev_range(dv_ind, "c"); + if (ret != RSMI_STATUS_SUCCESS) { + return ret; + } + + return RSMI_STATUS_SUCCESS; + CATCH +} + rsmi_status_t rsmi_dev_od_clk_info_set(uint32_t dv_ind, rsmi_freq_ind_t level, uint64_t clkvalue, rsmi_clk_type_t clkType) {