diff --git a/projects/rccl/src/init.cc b/projects/rccl/src/init.cc
index af64ad01ee..8f85de6e57 100644
--- a/projects/rccl/src/init.cc
+++ b/projects/rccl/src/init.cc
@@ -209,7 +209,7 @@ static ncclResult_t commFree(ncclComm_t comm) {
     wait_send_cycle += prof->wait_send_cycle[chan];
     wait_recv_cycle += prof->wait_recv_cycle[chan];
   }
-  #define VEGA_GPU_RTC_FREQUENCY 2.7E7
+  #define VEGA_GPU_RTC_FREQUENCY 2.5E7
   if (comm->rank == 0) {
     INFO(NCCL_INIT, "# %4s %6s %6s %6s %6s %6s %7s %6s %6s %6s %6s %6s", "Rank", "total", "w_send", "w_recv", "send", "rcRdS", "dRcRdCS", "dRcCS", "dRc", "cS", "rc", "rcCS");
     INFO(NCCL_INIT, "# %4s %6s %6s %6s %6s %6s %7s %6s %6s %6s %6s %6s", "", "(s)", "(s)", "(s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)", "(GB/s)");
diff --git a/projects/rccl/tools/rccl-prim-test/rccl_prim_test.cpp b/projects/rccl/tools/rccl-prim-test/rccl_prim_test.cpp
index c0593a4aab..23db2c8285 100644
--- a/projects/rccl/tools/rccl-prim-test/rccl_prim_test.cpp
+++ b/projects/rccl/tools/rccl-prim-test/rccl_prim_test.cpp
@@ -49,11 +49,11 @@ THE SOFTWARE.
 #define FBLU(x) KBLU x RST
 #define BOLD(x) "\x1B[1m" x RST
 
-#define RTC_CLOCK_FREQ_VEGA20 2.7E07
+#define RTC_CLOCK_FREQ_VEGA20 2.5E07
 //Right now kept the MI100 RTC frequency same as Vega20
 //as we are not aware of MI100 frequency, once we we come to know about it
 //we will update it.
-#define RTC_CLOCK_FREQ_MI100 2.7E07
+#define RTC_CLOCK_FREQ_MI100 2.5E07
 #define RTC_CLOCK_FREQ_DEFAULT 2.7E07
 
 struct transfer_data_t {