From 66d812d0ec4c85e53f0ff6002a1e19266a795140 Mon Sep 17 00:00:00 2001
From: Sean Keely <Sean.Keely@amd.com>
Date: Mon, 5 Mar 2018 20:01:27 -0600
Subject: [PATCH] Revert "Reduce to only one internal compute queue."

This reverts commit c1147397e020f1aec43a4c580655f6e624b9af63.

Change-Id: Ifcc5e148457243a6cf9ef277da7ab7c4e10f6fc9


[ROCm/ROCR-Runtime commit: f4521ce7826831bd9183b365034591e8659d555a]
---
 .../runtime/hsa-runtime/core/inc/amd_gpu_agent.h       |  3 ++-
 .../runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp | 10 ++++++----
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/inc/amd_gpu_agent.h b/projects/rocr-runtime/runtime/hsa-runtime/core/inc/amd_gpu_agent.h
index 792ef4622a..fd5c8f8d56 100644
--- a/projects/rocr-runtime/runtime/hsa-runtime/core/inc/amd_gpu_agent.h
+++ b/projects/rocr-runtime/runtime/hsa-runtime/core/inc/amd_gpu_agent.h
@@ -379,7 +379,8 @@ class GpuAgent : public GpuAgentInt {
 
   // @brief AQL queues for cache management and blit compute usage.
   enum QueueEnum {
-    QueueUtility,  // Cache management and blit compute
+    QueueUtility,   // Cache management and device to {host,device} blit compute
+    QueueBlitOnly,  // Host to device blit
     QueueCount
   };
 
diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp
index fce4fe71e2..413f4e49c1 100644
--- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp
+++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp
@@ -554,25 +554,27 @@ void GpuAgent::InitDma() {
                                "Internal queue creation failed.");
     return ret;
   };
+  // Dedicated compute queue for host-to-device blits.
+  queues_[QueueBlitOnly].reset(queue_lambda);
   // Share utility queue with device-to-host blits.
   queues_[QueueUtility].reset(queue_lambda);
 
   // Blits, try create SDMA blit first.
   // Disable SDMA on specific ISA targets until they are fully qualified.
-  auto blit_lambda = [this]() {
+  auto blit_lambda = [this](lazy_ptr<core::Queue>& queue) {
     if ((isa_->GetMajorVersion() != 8) && core::Runtime::runtime_singleton_->flag().enable_sdma() &&
         (HSA_PROFILE_BASE == profile_)) {
       auto ret = CreateBlitSdma();
       if (ret != nullptr) return ret;
     }
-    auto ret = CreateBlitKernel((*queues_[QueueUtility]).get());
+    auto ret = CreateBlitKernel((*queue).get());
     if (ret == nullptr)
       throw AMD::hsa_exception(HSA_STATUS_ERROR_OUT_OF_RESOURCES, "Blit creation failed.");
     return ret;
   };
 
-  blits_[BlitHostToDev].reset(blit_lambda);
-  blits_[BlitDevToHost].reset(blit_lambda);
+  blits_[BlitHostToDev].reset([blit_lambda, this]() { return blit_lambda(queues_[QueueBlitOnly]); });
+  blits_[BlitDevToHost].reset([blit_lambda, this]() { return blit_lambda(queues_[QueueUtility]); });
   blits_[BlitDevToDev].reset([this]() {
     auto ret = CreateBlitKernel((*queues_[QueueUtility]).get());
     if (ret == nullptr)